DELD Question Bank (End-sem)

Digital Electronics & Logic Design

Question Bank (Endsem)

UNIT III
1) Design mod-5 synchronous counter using J-K flip-flop.
2) Draw the excitation table of J-K Flip-flop.
3) Design a Mod 20 counter using decade counter IC7490.
4) Design 3-bit synchronous counter using T filp-flop.
5) Design a sequence generator for the sequence 1010 using shift register.
6) Design 3-bit synchronous counter using T filp-flop.
7) Desing full adder using two half adder.
8) Explain tyes of shift registers.
9) Explain mealy and moore machine with state diagram.
10) write a short note on one-bit memory cell.
11) Draw and explain 4-bit Ring counter.
12) What is Mod counter ? Explain MOD-26 counter using IC 7490.Draw design for the same.
13) What is the advantage of MS J-K Flip-Flop ? Explain theworking of MS J-K Flip-Flop in
detail
14) Explain the difference between Combinational and SequentialCircuit. Also convert J-K Flip-
Flop to D Flip-Flop.
15) Draw and explain Johnson counter with initial state ‘‘1010’’,from initial state explain all
possible states
16) Draw basic internal structure of Decade counter IC 7490 and explain operation.
17) Convert the following flip-flop :D-Flip-Flop to T-Flip-Flop
18) Design a sequence generator using J-K flip-flop se quence is :
1-> 3-> 5-> 6-> 7-> 1.
19) Design 3-bit parity generator for even parity bit.
20) Design mealy type sequence detector to detect a serial input sequence of 1101 using Delay FF
(D-FF).
21) Draw and explain 3-bit asynchronous UP-counter.Also draw the necessary timing diagram.
What is the difference between Synchronous counters and Asynchronous Counter?
22) Design following using IC 7490.
i) MOD 7 counter
ii) MOD 46 counter.
23) What is race-around condition ? Explain with the help of timing diagram.
How is it removed in basic flip flop circuit ?
24) Design a sequence generator using shift register and decoder circuit to generate
thesequence ......1101011...... .
25) How will you convert the basic SR-flip-flop (SR-FF) into JK-flip-flop ?
26) Design a MOD-11 counter using IC7490. Show states with the help of timing diagram.
27) Design and implement 3-bit Asynchronous up-counter using T-FF. [Use negative edge
triggered clock signal.
28) Convert the SR flip-flop to D flip-flop.Draw the truth table, excitation table, K-map and
connectiondiagram for each conversion.
29) What is the advantage of M-S flip-flop ? Explain working of MS J-K flip-flop in detail.

Prof. Bhagyashri More, Department of Computer Engineering, MESCOE, Pune.

 DELD Question Bank (End-sem)

Unit IV
ASM

Q1:What is ASM chart. Explain in detail ASM technique of designing the sequential circuit. What is
the difference between ASM chart and conventional flow chart. 6

Q2: Explain MUX Conmtroller method with suitable example.

Q3: Explain ASM chart for 3 bit counter having one enable line such that:
E = 1 counter enabled
E = 0 counter disabled
Also draw the State diagram.

Q4: Draw ASM chart for 3-bit octal number sequence with up-down conditions.

Q5: A sequential circuit has to count down from 111 to 100. The circuit also has an input X. If X = 0
then the circuit will count down & if X = 1 then they will remain in the current state . Draw an ASM
chart and state table for this circuit and design the circuit to generate the output using MUX
controller method.

PLD
Q1: What is PLD. State two advantages of PLD over fixed function IC and application specific IC.
What are the different types of PLDs.

Q2: Explain in brief the internal architecture of PLA. Explain in brief design model of PLA for any
code conversion example.

Q3: Explain input bufffer AND and OR matrix in PLA. Design 3:8 decoder using PLD.

Q4: Implement the following functions using PLA:

F1(A,B,C) = SOP(1,2,4,6)
F2(A,B,C) = SOP(0,1,6,7)

Q5: What is PAL. Explain design model of PAL. What is the difference between PLA, PAL, and

Q6. Design BCD to Excess-3 code converter using PLA.

7. Implement 3 bit binary to gray code converter using PLA.

8. Design BCD to Excess-3 code converter using PLA.

9. A Combinationa; circuit is defined by the following function:

F1(A,B,C) = ∑m (0,1,3,7)

Prof. Bhagyashri More, Department of Computer Engineering, MESCOE, Pune.

 DELD Question Bank (End-sem)

F1(A,B,C) = ∑m (1,2,5,6)

10. A combinational circuit is defined by the function:

F1 = ∑m (0,1,3,4)
Implement this circuit with PAL.

11. Design 4 input & 6 output combinational circuit using PLA. The input variables are A, B,C & D:
Y1 = ∑m (0,3,5,6,9,10,12,15)
Y2 = ∑m (0,1,2,3,11,12,14,15)
Y3 = ∑m (0,4,8,12)
Y4 = ∑m (0,2,3,5,7,6,12,13)
Y5 = ∑m (0,1,3,4,5,6,11,13,14,15)
Y6 = ∑m (1,2,6,8,15)
12. Draw block diagram of PLA device & explain.
13. A combinational circuit is defined by the functions:
F1(A,B,C)= ∑m (0,2,5,7)
F2(A,B,C)= ∑m (0,1,6,7)
Implement this circuit with PLA.
14. Comparison between PROM, PLA & PAL.

UNIT V. Logic Families

1. Explain with neat diagram CMOS inverter.

2. State the following characteristics of digital IC logic family
TTL and CMOS :
( i ) FAN out
( ii ) Noise Margin
3. Explain TTL open collector logic.
4. Give the classification of logic family.
5. Draw three input standard TTL NAND gate and explain its operation.
6. Explain wired logic in CMOS.
7. Define the following terms & mention the standard values for TTL logic family:
( i ) Noise Margin
( ii ) Fan Out
(iii) Power Dissipation
(iv) Propagation Delay
8. Draw & explain 2-input NAND TTL logic gate with tetem pole ouput driver.
9. Explain the advantage of open collector output.
10. Explain characteristics of digital ICs (any four).
11. Why wired logic is not possible in CMOS operation.
12. Explain tristate logic.
13. Explain the operation of CMOS NOR gate.
14. List the difference between CMOS & TTL.
15. Explain standard TTL characteristics in detail.
16. Explain with neat diagram two input CMOS NAND gate.
17. Exaplin the wired logic output of TTL with neat diagram.

Prof. Bhagyashri More, Department of Computer Engineering, MESCOE, Pune.

 DELD Question Bank (End-sem)

18. What is Logic family? Give the classificationof logic family.

19. What are the advantages of digital integrated circuits?
20. Define current sinking & current sourcing.
21. What is Totem-pole ouput? Exaplin with the help of circuit diagram.

UNIT VI. Introduction to Computer Architecture

1. What is the bus? Explain its type.

2. What are the basic operations of microprocessor.
3. What is ALU? Explain with IC 74181.
4. What is microprocessor? Explain 8086 microprocessor with diagram.
5. Explain the registeres in microprocessor.
6. Explain basic Arithmetic operations using ALU IC 74181?
7. Explain the microprocessor components.
8. Write a short note on Memory organization.

Prof. Bhagyashri More, Department of Computer Engineering, MESCOE, Pune.