Assignment No.

1 CS501
Submitted By BC190404087 (Husanin Iqbal)

Question No.1
Write the equivalent assembly language instructions for the given machine language instructions.
Write all the conversion steps for all instructions sequence wise.
Sr # Machine Language Instruction Equivalent Assmebly Language
Instruction
1 E1C60004 h SHL, R7, R3, RO
2 61885000 h add, R6, R4, R5
3 724E8000 h sub, R9, R7, R8
4 1A4000D4 h st, R9, 212(RO)
5 084000D0 h Id, R1, 208(RO)

Solution:
E1060004
First convert the hexadecimal into binary pattern which is:
1110 0001 1100 0110 0000 0000 0000 0100
The first 5 bits of the binary pattern represent the opcode which is 28. This
opcode 28 belongs to "shl" shl is shift left by using register rc. The instructipm is modified
form of type D.

31 27 26 22 21 17 16 12 11 5 4 0

Op-code ra rb rc unused 00000

11100 00111 00011 00000 0000000 00100

In modified D instruction, the bits are as above

11100 00111 00011 00000 0000000 00100

SHL R7 R3 R0 Un-used 0100
Hence, the SHL instruction will be SHL, R7, R3, R0

61885000

First convert the hexadecimal into binary pattern which is:

0110 0001 1000 1000 0101 0000 0000 0000

The first five bits of the binary pattern represent the opcode which is 12. This opcode 12
belongs to “add” add the instruction for 2’s compliment register addition. The instruction is
type of D

31 27 26 22 21 17 16 12 11 0

Op-code ra rb rc unused

01100 00110 00100 00101 000000000000

In type D instruction, the bits are as above.
Next, we specify the instruction field for each the section as following.

01100 00110 00100 00101 000000000000

add R6 R4 R5 Un-used

Hence, the add instruction will be add, R6, R4, R5

724E8000
First convert the hexadecimal into binary pattern which is:
0111 0010 0100 1110 1000 0000 0000 0000

31 27 26 22 21 17 16 12 11 0
 Op-code ra rb rc unused

The first 5 bits of the binary pattern represent the opcode which is 14. This opcode 14 belongs
to "sub" sub the instruction for 2's complement register subtraction. The instructipm is of type
D
01110 01001 00111 01000 000000000000
In type D instruction the bits are as above
Next we specify the instruction field for each the section as following.

01110 01001 00111 01000 000000000000

Sub R9 R7 R8 Un-used

Hence, the sub instruction will be : sub, R9, R7, R8

1A4000D4
First convert the hexadecimal into binary pattern which is:
0001 1010 0100 0000 0000 0000 1101 0100
The first 5 bits of the binary pattern represent the opcode which is 3. This opcode 3 belongs to
"st" The st instructions is used to store register contents to memory. The instructions is of type
C:

31 27 26 22 21 17 16 0

Op-code ra rb C2 00011 01001

00000

00000000011010100
In type C instruction the bits are as above:
Next, we specify the instruction filed for each the section as following:
00011 01001 00000 00000000011010100
st R9 R0 212
Hence, the st instruction will be: st, R9, 212(R0)
084000D0
First convert the hexadecimal into binary pattern which is:
0000 1000 0100 0000 0000 0000 1101 0000
The first 5 bits of the binary pattern represent the opcode which is 1. This opcode 1
belongs to "Id" The id, instruction load register from memory instruction. The
instruction is of type C:

31 27 26 22 21 17 16 0

Op-code ra rb C2

00001 00001 00000 00000000011010000

In type C instruction, the bits are as above
Next we specify the instructions filed for each the section as following:
00001 00001 00000 00000000011010000
Id R1 R0 208

Hence, the id instruction will be: Id, R1, 208(R0)