The document summarizes the results of simulating a design including compiling the main module and test bench module, synthesizing the design and top module, and showing the results of running the test bench which verified the design worked as intended.
The document summarizes the results of simulating a design including compiling the main module and test bench module, synthesizing the design and top module, and showing the results of running the test bench which verified the design worked as intended.
The document summarizes the results of simulating a design including compiling the main module and test bench module, synthesizing the design and top module, and showing the results of running the test bench which verified the design worked as intended.