05FPGA的inout双向端口的使用之IIC读写eeprom

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Little Panda Academy ZYNQ Teaching Documentation

FPGA's inout type bidirectional port uses

------ Based on ZYNQ MINI development board

Writers: Teacher Yang, Teacher Wu

Date of writing final draft: 2022.10.12

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Little Panda Academy ZYNQ Teaching Documentation

Table of contents

1. Document Implementation Function Introduction................................... ................................................... ..................................3

2. ZYNQ project establishment............ ................................................... ................................................... .............. 3 3.

Principles of INOUT..................................... ................................................... ................................................... ..... 3 4.

Example of INOUT port of IIC................................... ................................................... ................................................ 4 5. On-

line debugging and verification............ ................................................... ................................................... ................................... 5

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Little Panda Academy ZYNQ Teaching Documentation

1. Document Implementation Function Introduction

This document realizes how to use the inout bidirectional port to learn, through the inout port, you can realize the data connection

Receive and send, time-division multiplexing through one signal line. This tutorial does not explain the IIC timing separately, you can see the source code

Code analysis learning, this tutorial only learns the INOUT bidirectional port. For the method of creating a new project, please refer to the document "Development Software Installation

And Introduction/Introduction to VIVADO and New ZYNQ Engineering Tutorial under the Software".

2. ZYNQ project establishment

Start page (or file->Project->New) Create a new project (CreateNewProject)

Wizard start page Click Next->

ProjectName (project name) Project name: fpga_05_pl_iic_eeprom

Project path: (choose by yourself, do not have a Chinese path)

Check CreateProjectSubdirectory, click Next->

AddSource (add design source file) Click Next->

AddExsixtingIP (add existing IP) Click Next->

AddConstraints (add existing constraint files) Click Next->

Default Part (default configuration, chip selection) Family->Zynq-7000


Package->clg400

Speed->7010 selection-1,7020

selection-2 7010 version selection target device:

xc7z010clg400-1 7020 version selection target device: xc7z020clg400-2

Click Next->

NewProjectSummary (new project overview) Confirm project information, type selection, etc., click Finish to complete

3. INOUT Implementation Principle

When we use a bidirectional inout signal, both input and output are required, what should we do? When we were learning in verilog, there was a value

called high-impedance state. The high-impedance state of a bit is represented by 1'bz. The high-impedance state is a signal that can be regarded as an internal

disconnection of the chip. We know that if a pin is in a high-impedance state, then its value depends on the external input signal when it is driven from the outside.

Therefore, in the implementation of input input and output, if we need to output a signal externally, we directly assign a value to the inout signal. When it needs to

switch to receiving, assign it to a high-impedance state, and then read the value of this signal pin. The following shows the simplest bidirectional input implementation:

reg inout_indicate_reg;//Indicates whether it is currently input or output inout

bi_derection_singnal;//Bidirectional input and output signal wire read_value;//The signal

line read from the bidirectional input and output signal

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wire send_value;//Need to send, put it on the signal line of the bidirectional input and output signal//The

line below, when the indicator signal is 1, the bidirectional signal is connected to the signal line of the sending data

assign bi_derection_singnal=(inout_indicate_reg==1'b1)?send_value:1'bz; //The following line, when the indication signal is 0, the

bidirectional signal is connected to the receiving data signal line

assign read_value=(inout_indicate_reg==1’b0)?sbi_derection_singnal:1’bz;

The above code is only for learning and demonstration, without actual operation, it only shows the assignment as input and output under what circumstances

switch. As can be seen above, when it is used as an input, that is, the indicator signal is determined to be 0, the assignment is high impedance, so that the

external signal will not be affected, and it can be input for use by the internal receiving signal. When the determination signal is 1, the input The output signal is

driven internally by the transmit signal.

4. Example of INOUT port of IIC

The routine of fpga_05_pl_iic_eeprom provides a complete example of IIC transceiver, where SDA of IIC is an INOUT bidirectional

port. We will not explain much about the IIC communication protocol, you can check the 24C02 data sheet for comparison

Code state machine learning. The whole process of the code is: through a 3-second cycle count, to trigger the reading and writing of the state machine.

The code for timing triggers is as follows:

//During the 3-second period, the first count value reaches 1 second to trigger a write operation

assign write_start_flag_wire=(auto_read_write_cnt_reg==CNT_1SEC)?1'b1:1'b0; //After the count value reaches 3 seconds, trigger a

read assign read_start_flag_wire=(auto_read_write_cnt_reg==CNT_3SEC)?1'b1:1'b0;

always@(posedge clk or negedge rst_n)begin if(rst_n=='b0)begin

auto_read_write_cnt_reg<='d0; end

else begin

if(auto_read_write_cnt_reg<CNT_3SEC)begin

auto_read_write_cnt_reg<=auto_read_write_cnt_reg+'d1; end

else begin

auto_read_write_cnt_reg<='b0; end

end

end

Line 64 of the code indicates that when the SDA enable is 1, that is, it needs to be sent out, the SDAR register is assigned. If

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If it is not 1, it needs to be set to high impedance so that the external signal can drive it, and then it can be judged by the external value read by the code.

assign SDA = SDAEN ? SDAR : 1'bz;

Careful friends read the entire code, and may find that there is no place to use the code to read the SDA value. In principle, in the IIC communication,

there will be a response signal outside the SDA to be judged after the operation is completed, but our FPGA can do it without judging. Here we only provide a

simple driver for demonstration, and only learn the bidirectional port INOUT. For the entire code project, you can check the corresponding routines by yourself.

5. Online debugging and verification

We download the bit file generated by the routine to the development version for online debugging. Please use the routines we provide directly,

because we have set up online debugging, please do not copy the code from this tutorial to create a new project yourself, because online debugging is not set, and

waveform capture is not supported. There is a special document chapter to learn after the detailed tutorial on online debugging. Please use the routines directly here .

In the routine, the pins we use are bound as follows. In our code, the LED is still used to indicate the current state during the state machine transition process.

After the bit file is generated, we open the hardware manager, then connect the development board, click the right button of the chip xc7z020 and

select program to burn, the pop-up interface can be seen, there will be two files after burning, the upper one is the bit file, and the lower one is We grab the files

for online debugging:

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Little Panda Academy ZYNQ Teaching Documentation

Click the symbol to start capturing, and the captured waveform is as follows: (Do not modify any settings, we have also set the

trigger signal, if it is changed, it may not capture this waveform)

As can be seen from the above capture, the INOUT signal will actually be logically divided into two registers internally, one

SDA_IBUF, one SDA_OBUF, one input and one output. It just shares one pin, and the input and output to the chip pass through these two

BUFs. The high-impedance control is the output register, setting its output to a high-impedance state does not affect the input. From the above,

the values of the two registers are actually different.

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