B.TECH (PART-II) EXAMINATION-2022 BASIC ELECTRONICS (203) BRANCH- ECE/ CSE/EE/ME PAPER II Time : 3 Hours Maximum Marks : 70 | Note : Candidates are required to give answer in their own words as far as practicable. The questions are of equal value. Answer any five questions. 1. (a) In the circuit diagram of Fig.1, it is aimed to maintain the load voltage at 12V if current through it varies between 0 to 200 mA. Find, resistance 'R'. power rating. and voltage rating of Zener diode (7] Fig. | Circuit Diagram for Q.1 (a)ction diodes (Diode-l and (p) There are 8? pn-jun Diode~ in Diode-I are- 10° gout the ratio of capacitance of Dict that the Fevers! acceptor ions concentrations 2). the donor and m?, and for Diode-2 are: 10" em 3, Fin de-1 to > by considering © bias Diode-2 voltage is far greater than buit-in potentials of diodes. 7 ong Half-wave rectifier, a) Compare in tabular format am Full-wave ye nD center taped rectifier, and Fullwave bridge terms of conduction angle, rms values rectifier In e factor, crest factor, m 2, Sketch the average value, Form Factor rippl piv, efficiency, TUF. and regulation Fig. network given 9 input sinusoidal e V® for the given 0 sin at . The given diode is made 71 b) Consider the output voltagt wwaw-form, = ofsilicon having culm voltage 0.7 V- c si ‘vie t208in ot) rR vo (+20V Fig 2 Circuit Diagram For Q2b) (2) 4. 3 (a) Explai xplain in d letail the base width modulat dulation and its effects on current transfer ratio @ and fp. What is io a an Wi (b) Transistor given in Fig, 3 is an havin| - " npn BJT having B= ind the 7 Fig 3 Cores . Diagram for 0.3 (6) (a) The drain t ae a saturation current of a JFET is 8 eo oltageis-4V Let the ae i Died by eentying 1 BY between gate and “ounce, ae ictance of the transistor. Now, ae oltage is changed from -1.8 V a ‘oltage amplification factor. ey (b) Explain . Mose aa the channel length modulat can mitigat its effect on drain current. H oe od tigate the effects of this ch vows modulation? channel length @) i]built-in potential ina P-r junction (b) Let the operation amplifier given in Fig. 6 is ideal s._ a) Deserts its derivation with the help of The 7 for diode is | and the reverse saturation current ong with its Ge diode ons "1 for the diode 1#A, Consider normal operating § diagram. , energy band OS -Vin) varies between 20 10 30 V. temperature. Find, the output voltage for the input nage ( . (py Lethe spe O°" Fg Vv, current gain of the voltage v, =-1V. 7 63 95 = Om . A oo The current through the resisior R, ° a sistor #8 issipated in wan Find the maximum power dissipal ‘ — ‘ode of Fig. 4- i) t00K0 transistor and Zener Di w ©) wow Fig. 6 Circuit Diagram for Q.6 (b) 7. a) Explain in detail the working principle of silicon controlled rectifier by giving its: constructional Te a Circuit Diagram for 5 (0) Fg 4 Circa in Fig 6 is ideal diagram, symbol, I-V characteristics ete. 7 ‘nin 6 (a) Let the operation amplifier give 1 Find the gain of the circurt- b) Compare the negative feedback and positive feedback amplifiers by deriving their gain with the help of open loop gain and feedback factor. Justify, why Positive feedback in operational amplifier cannot support virtual short? 0) —x— Fig. 5 Cerca Diagram for 0.6(8) - (4)