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CDP-NW10

SERVICE MANUAL
Ver. 1.1 2005.12

US Model

This Unit incorporates Dolby* Digital and Pro Logic surround and the DTS** Digital Surround System. * Manufactured under license from Dolby Laboratories. Dolby, Pro Logic, and the double-D symbol are trademarks of Dolby Laboratories. ** Manufactured under licence from Digital Theater System, Inc. DTS and DTS Digital Surround are registered trademarks of Digital Theater System, Inc.

Model Name Using Similar Mechanism Mechanism Type

NEW DA23ZPH

SPECIFICATIONS
Laser Semiconductor laser (: = 780nm) Emission duration: continuous General DC power consumption: Operating temperature: Dimensions: DC 29.5 V/1A DC 14V/1.2A 0C to 40C ( 32F to 104F) 230 266 104 mm (9 1/8 10 1/2 4 1/8 inches) (w/h/d) 2.5 kg (5 lbs 8 oz)

Audio section 20 Hz to 20 kHz ( 1 dB) Frequency response 95 dB Signal-to-noise ratio Rated output power 1kHz into 8ohms THD: 3% 30 W + 30 W Less than 0.1 % Harmonic distortion Less than detected value Wow and flutter ( 0.001 % W PEAK) Tuner section Frequency range

87.5 Hz to 108 kHz (100kHz step) 530 kHz to 1710 kHz (10kHz step) 54 dB Signal-to-noise ratio 76 dB (MONO) 70 dB (STEREO) 0.5 % THD at 400Hz 0.3 % (MONO) THD at 1kHz 0.5 % (STEREO) FM wire antenna (aerial) Antenna (aerial) Antenna (aerial) terminals 75 ohms, unbalanced 10.7 MHz Intermediate frequency AM tuner section AM loop antenna (aerial) Antenna (aerial) 450 kHz Intermediate frequency

Mass: Supplied accessories : Remote commander (remote)(RM-ANU001)(1) Wall mounting bracket (1) Wall stopper (4) TEMPLATE (1) Plug-in 4P terminal (for speakers)(1) Plug-in 5P terminal (for AC power unit)(1) Screws for fixing the Unit to the wall mounting bracket (Short)(4) Screws for wall stopper (long)(4) Screws for AM antenna (2) AM loop antenna (aerial)(1) R6 (size-AA) battery (2) Utility for In-Wall Unit CD-ROM (1) Users manual (1) Installers manual (1) Design and specifications are subject to change without notice.

COMPACT DISC PLAYER


9-879-751-02
2005L1678-1 2005.12

Sony Corporation
Home Audio Division Published by Sony Engineering Corporation

CDP-NW10

Notes on chip component replacement Never reuse a disconnected chip component. Notice that the minus side of a tantalum capacitor may be damaged by heat. Flexible Circuit Board Repairing Keep the temperature of the soldering iron around 270 C during repairing. Do not touch the soldering iron on the same conductor of the circuit board (within 3 times). Be careful not to apply force on the conductor when soldering or unsoldering. SAFETY CHECK-OUT After correcting the original service problem, perform the following safety check before releasing the set to the customer: Check the antenna terminals, metal trim, metallized knobs, screws, and all other exposed metal parts for AC leakage. Check leakage as described below. LEAKAGE TEST The AC leakage from any exposed metal part to earth ground and from all exposed metal parts to any exposed metal part having a return to chassis, must not exceed 0.5 mA (500 microamperes.). Leakage current can be measured by any one of three methods. 1. A commercial leakage tester, such as the Simpson 229 or RCA WT-540A. Follow the manufacturers instructions to use these instruments. 2. A battery-operated AC milliammeter. The Data Precision 245 digital multimeter is suitable for this job. 3. Measuring the voltage drop across a resistor by means of a VOM or battery-operated AC voltmeter. The limit indication is 0.75 V, so analog meters must have an accurate low-voltage scale. The Simpson 250 and Sanwa SH-63Trd are examples of a passive VOM that is suitable. Nearly all battery operated digital multimeters that have a 2 V AC range are suitable. (See Fig. A)
To Exposed Metal Parts on Set

CAUTION Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure. This appliance is classified as a CLASS 1 LASER product. The CLASS 1 LASER PRODUCT MARKING is located on the exterior.

Laser component in this product is capable of emitting radiation exceeding the limit for Class 1. NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK OR BASE UNIT The laser diode in the optical pick-up block may suffer electrostatic break-down because of the potential difference generated by the charged electrostatic load, etc. on clothing and the human body. During repair, pay attention to electrostatic break-down and also use the procedure in the printed matter which is included in the repair parts. The flexible board is easily damaged and should be handled with care. NOTES ON LASER DIODE EMISSION CHECK The laser beam on this model is concentrated so as to be focused on the disc reflective surface by the objective lens in the optical pickup block. Therefore, when checking the laser diode emission, observe from more than 30 cm away from the objective lens. LASER DIODE AND FOCUS SEARCH OPERATION CHECK Carry out the S curve check in CD section adjustment and check that the S curve waveforms is output three times.

0.15 F

1.5 k

AC voltmeter (0.75 V)

Earth Ground

Fig. A. Using an AC voltmeter to check AC leakage.

SAFETY-RELATED COMPONENT WARNING!! COMPONENTS IDENTIFIED BY MARK 0 OR DOTTED LINE WITH MARK 0 ON THE SCHEMATIC DIAGRAMS AND IN THE PARTS LIST ARE CRITICAL TO SAFE OPERATION. REPLACE THESE COMPONENTS WITH SONY PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR IN SUPPLEMENTS PUBLISHED BY SONY.

CDP-NW10

TABLE OF CONTENTS 1. 2. 3.
3-1. 3-2. 3-3. 3-4. 3-5. 3-6. 3-7. 3-8. 3-9. 3-10. 3-11. 3-12.

SERVICING NOTES ................................................ 4 GENERAL ................................................................... 5 DISASSEMBLY


Disassembly Flow ........................................................... Front Kit Assy, Main Kit Assy ........................................ MAIN Board .................................................................... Tuner, CD AMP Board .................................................... Front Assy ........................................................................ FRONT Board ................................................................. Speaker ............................................................................ CD SERVO Board ........................................................... CD Mecha Assy ............................................................... Motor Assy ...................................................................... Door Assy ........................................................................ Rotary Switch, DC Motor ............................................... 10 11 11 12 12 13 13 14 14 15 15 16

6-6. 6-7. 6-8. 6-9. 6-10. 6-11. 6-12. 6-13. 6-14. 6-15. 6-16. 6-17.

Printed Wiring Board CD SERVO Section .......... Schematic Diagram CD SERVO Section ............. Printed Wiring Board MAIN Section (Side A) .... Printed Wiring Board MAIN Section (Side B) .... Schematic Diagram MAIN Section (1/5) ............. Schematic Diagram MAIN Section (2/5) ............. Schematic Diagram MAIN Section (3/5) ............. Schematic Diagram MAIN Section (4/5) ............. Schematic Diagram MAIN Section (5/5) ............. Printed Wiring Board FRONT Section ................. Schematic Diagram FRONT Section ................... Printed Wiring Board CD AMP Section (Side A) ..................................... 6-18. Printed Wiring Board CD AMP Section (Side B) ..................................... 6-19. Schematic Diagram CD AMP Section (1/2) ......... 6-20. Schematic Diagram CD AMP Section (2/2) .........

28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

4. 5. 6.
6-1. 6-2. 6-3. 6-4. 6-5.

CONFIRMATION OF NETWORK SETTING ... 17 ELECTRICAL ADJUSTMENTS .......................... 20 DIAGRAMS


Block Diagram Block Diagram Block Diagram Block Diagram Block Diagram CD SERVO Section .................... MAIN (1) Section ....................... MAIN (2) Section ....................... MAIN (3) Section ....................... AMP Section ............................... 23 24 25 26 27

7.

EXPLODED VIEWS

7-1. Overall Section ................................................................ 60 7-2. Main Kit Assy .................................................................. 61 7-3. Motor Assy ...................................................................... 62

8.

ELECTRICAL PARTS LIST .................................. 63

CDP-NW10 SECTION 1 SERVICING NOTES


SERVICE POSITION (CD SECTION/MAIN BOARD/CD AMP BOARD)

CD AMP board CD section

insulation sheet

MAIN board

tuner pack

CDP-NW10 SECTION 2 GENERAL


Key operation on the Unit
This section is extracted from instruction manual.

1 REMOTE SENSOR 2 SPEAKER (for INTERCOM/MONITOR) (page 38, 39) Receives the sound while INTERCOM or MONITOR is set to ON. 3 ?/1 (POWER) (page 20, 22, 23) Press to turn the power on/off. 4 SELECT (page 18) Press to select an item on the front panel display, such as menu items, settings, tracks, etc. 5 MODE Press to jump to the Mode Menu of each function. 6 BACK (page 12, 42) Press to return to the previous menu or to view the current status of the disc title list or the Preset station list. 7 m/M (SCROLL DOWN/UP) Press to scroll the LCD menu. When you listen to the radio, you can adjust the frequency by all kinds of tuning. 8 HOME Press to return to the Home Menu.

9 MUTING (page 20, 22) Press to mute the speaker output from the Unit, or to cancel muting when it is set to ON. 0 +/ VOLUME (page 38, 39) Press to adjust the volume of the speaker output from the Unit. qa OPEN/CLOSE (page 20, 22, 23) Press to open/close the door on the Unit. qs MICROPHONE Picks up the sound while INTERCOM is set to ON. qd OPERATIONAL BUTTONS (page 20, 22, 23) N(PLAY): Press to play the selected source X (PAUSE) : Press to pause playback x (STOP) : Press to stop playback ./> : Locates a specific track qf Display (page 18) Displays the Home Menu and the Setup Menu, etc. You can operate the Home Menu and the Setup Menu, etc., using any SELECT (4).

CDP-NW10

Hooking up the system

Audio component hookup You can listen to the sound from external audio equipment via the Unit. 3 LINE (Analog) IN (L/R) Connects the OUTPUT jacks (L/R) of the audio equipment to the LINE IN (L/R) jacks of the Unit using audio cables (not supplied). IR IN/OUT hookup You can control components with the remote in a wider range by connecting the Unit and the component to IR IN/OUT. 4 IR IN Connect IR IN of the Unit and IR OUT of a component, such as a TV so that you can operate the Unit with the remote by aiming it at the TV. 4 IR OUT Connect IR OUT of the Unit and IR IN of a component, such as a CD Changer, so that you can operate the DVD Changer with the remote by aiming it at the Unit. Speaker hookup Before connecting each of speaker cables to the Unit, you must connect them to the supplied speaker connector. See Connecting speaker cables to the speaker connector. 7 SPEAKERS Connects speakers in a room using a speaker cable. Other hookup 9 DC IN Connects the DC IN connector using the power supply cables inserted to connect the AC power unit and a Unit.

Antenna hookup You can tune in AM/FM stations using the Unit. 1 ANTENNA (AM/FM) Connects the AM loop antenna to the AM terminal. Connect a 75 ohm coaxial cable (not supplied) from an outdoor FM antenna (not supplied). Network hookup You can connect Units to other Units or computers via a router or a hub. 2 ETHERNET Connects the Units to a router or a hub using a Ethernet cable.

CDP-NW10

Key operation on the remote

RM SETUP TV/VIDEO

TV

1 5 9

2 6 0

3 7

4 8

ENTER SELECT MODE BACK

CLEAR

HOME

DOWN

UP

MUTING

MASTER VOL

TV VOL

TV CH

CDP-NW10

1 RM SETUP (page 18) Press to preset the remote code, and switch between CIS2/CIS3. 2 TV/VIDEO (page 47) Press to switch signals between TV input and Video input for the Sony TV monitor. 3 Numeral buttons Press to select a number, representing, for example, a desired track of the audio source. 4 SELECT (page 18) Press to select an item on the front panel display, such as menu items, settings, tracks, etc. 5 MODE Press to jump to Mode Menu of each function. 6 HOME Press to return to the Home Menu on the display. 7 DOWN/UP Press to scroll the LCD menu. When you listen to the radio, you can adjust the frequency by all kinds of tuning (except for Automatic tuning). 8 ./> (page 21, 25) Press to locate a specific track of the source or to select a preset station. 9 X (PAUSE) Press to pause the playback of the source. 0 H (PLAY) (page 20, 22, 23) Press to operate the selected source. H (PLAY) button has a tactile dot.** qh TV VOL +/ (page 47) Press to adjust the Sony TV volume. TV VOL + button has a tactile dot.** qj TV CH +/ (page 47) Press to change the Sony TV channel. TV CH + button has a tactile dot.**

qk ?/1 (page 20, 22, 23) Press to turn the Unit on/off. ql TV ?/1 (page 47) Press to turn the Sony TV on/off. w; CLEAR Press to clear a number which you entered. wa ENTER Press to set the number you entered using the numeric buttons. ws BACK (page 12, 42) Press to return to the previous menu or to view the current status, etc. wd m/M (page 21, 25) Press to locate a portion you want to play within a track of the source. wf x (STOP) (page 20, 22, 23) Press to stop the current playback. wh MUTING (page 20, 22) Press to mute the speaker output from the Unit on/off. wj MASTER VOL +/ Press to adjust the volume of the speaker output from the Unit. MASTER VOL + button has a tactile dot.**
** Use the tactile dot as a reference when operating the system.

CDP-NW10

Setting the time


You must set the time to make functions available, such as an alarm or a sleep timer. Display the Home Menu as shown below beforehand (see page 18).

Menu operation
The Home Menu is displayed on the Unit (A). Using the Home Menu, you can select the sound and make various adjustments to items.

Press the V SELECT on the HOME Menu, then press the CLOCK SELECT. The Clock Menu appears.

Press the TIME SET SELECT. The Time set Menu appears.

Using any SELECT (B), you can select an item on the front panel display. When the item is displayed on the left side, press a SELECT on the left side. When the item is displayed on the right side, press a SELECT on the right side. For example, when you want to select DVD, press the F SELECT. When you want to see items below those currently displayed, press the H SELECT. (When there are additional items, V is displayed). When you want to see items above those currently displayed, press the G SELECT. (When there are additional items, v is displayed). For details on the Menu tree, see the next page. C Press to jump to the Mode Menu of each function. D Press to return to the previous menu. E Press to return to the top menu.

Press the 24H (or the 12H) SELECT on the Time set Menu to select the time display mode. The time display mode toggles between 24H and 12H as you press the button. Set the hour and minute using the HOUR and the MIN SELECT. Press HOME to return to Home Menu. The time is displayed on the right side of the upper line on the HOME Menu.

4 5

Note
The clock is not displayed when the Unit is in the Edit Menu or Party mode.

CDP-NW10 SECTION 3 DISASSEMBLY


This set can be disassembled in the order shown below.

3-1. DISASSEMBLY FLOW

SET

3-2. FRONT KIT ASSY, MAIN KIT ASSY (Page 11)

3-3. MAIN BOARD (Page 11)

3-5. FRONT ASSY (Page 12)

3-7. SPEAKER (Page 13)

3-4. TUNER, CD AMP BOARD (Page 12)

3-8. CD SERVO BOARD (Page 14)

3-6. FRONT BOARD (Page 13)

3-9. CD MECHA ASSY (Page 14)

3-10. MOTOR ASSY (Page 15)

3-11. DOOR ASSY (Page 15)

3-12. ROTARY SWITCH, DC MOTOR (Page 16)

10

CDP-NW10

Note: Follow the disassembly procedure in the numerical order given.

3-2. FRONT KIT ASSY, MAIN KIT ASSY


6 front kit assy

3 connector (CP101) 1 two tapping screws (M3.0 8, PAN) 4 connector (CP102)

2 three claws

5 wire (flat type) 40 core (J1)

7 main kit assy

3-3. MAIN BOARD


1 four screws (+BV 3 8) 5 separate cover 7 wire (flat type) 40 core (J2) 6 six tapping screws (M3.0 8, PAN)

9 MAIN board 3 connector (J9)

2 connector (J14)

4 connector (J15)

8 separate cover

11

CDP-NW10

3-4. TUNER, CD AMP BOARD


3 four S tight screws (+PTTWH M3.0 8)

2 tuner

6 CD AMP board 5 connector (CON2)

1 taptite screw (M3.0 8, PAN)

7 CD back chassis

3-5. FRONT ASSY

4 two tapping screws (M3.0 10, PAN)

6 two tapping screws (M3.0 8, PAN) 4 side strip 7 front assy

5 connector (J3)

1 two claws

2 side strip 3 two claws

12

CDP-NW10

3-6. FRONT BOARD

1 four tapping screws (M2.6 6, PAN)

3 FRONT board

2 two claws

3-7. SPEAKER

1 two tapping screws (M3.0 10, PAN)

2 speaker

13

CDP-NW10

3-8. CD SERVO BOARD


2 two tapping screws (M2.6 8, PAN)

1 tapping screw (M3.0 8, PAN)

6 CD SERVO board

4 connector (CP104)

5 connector (CP103)

3 connector (CON1)

3-9. CD MECHA ASSY


1 three damper screws "C"

3 CD mecha assy

4 three dampers "C"

14

CDP-NW10

3-10. MOTOR ASSY


1 four tapping screws (M3.0 10, PAN)

2 motor assy

3-11. DOOR ASSY

1 two tapping screws (M2.6 6, PAN)

4 door assy

2 door support rail 3 Undo the linked portion.

15

CDP-NW10

3-12. ROTARY SWITCH, DC MOTOR

1 belt (IW)

2 drive pulley 3 two machine screws (M2.6 4, PAN)

6 rotary switch

9 DC motor

7 Remove two solders.

5 Remove five solders.

8 motor plate

4 taptite screw (M3.0 8, PAN)

16

CDP-NW10 SECTION 4 CONFIRMATION OF NETWORK SETTING


1. Confirmation of LAN Setup of the InWall Unit *1
*1 InWall Unit: CDP-NW10, AC-NW10 1-1. Use the LAN Setup Diagnostics function of the InWall Unit. 1. Turn the power on. The HOME menu appears. (2) IP Conflict OK IP address has no conflict. NG Two or more Units are using the same IP address. [Remedial action to take when result of DIAGNOSIS shows NG (No Good)] If result of DIAGNOSIS shows NG, the IP address of the NG Unit has conflict with the IP address of other Units or other equipment. To resolve IP address conflict: 1. Set IP ADDRESS Settings of all InWall Units to Auto. 2. When the network equipment that are connected to the same network as the NG InWall Unit, need to set their IP addresses statically, perform the followings (such as printer etc.): If IP address can be changed from the network equipment: Change the IP address of the network equipment so that the IP address stays within the static IP region. If IP address cannot be changed from the network equipment: Change the Automatic Assignment Region of the router side by changing the Starting IP Address value and the Maximum number value of DHCP of the router side so that it does not have conflict with the InWall Unit.

2. Press the V SELECT on the HOME Menu, then press the SETUP SELECT. The Setup Menu appears.

3. Press the V SELECT repeatedly until LAN appears on the front panel display. 4. Press the LAN SELECT. The LAN setup Menu appears.

(3) Cable Connect OK Ethernet cable is inserted normally. NG Ethernet cable is not inserted normally. [Remedial action to take when result of DIAGNOSIS shows NG (No Good)] Disconnection, un-insertion or loose connection of the Ethernet cable is probable. Reconfirm the wiring. The straight cable of 100 Mbps must be used. IF result of the LAN Setup Diagnostics function shows OK, You need not to perform the remaining sections that follow.

5. Press the DIAGNOSIS SELECT. In ten and several seconds after DIAGNOSIS is selected (display remains unchanged), result of DIAGNOSIS is displayed. Confirm that result of DIAGNOSIS is OK. If it shows NG (No Good), take a remedial action as described below. (1) IP Assign OK IP address is assigned correctly. NG Illegal address has been assigned. [Remedial action to take when result of DIAGNOSIS shows NG (No Good)] Compare the specific InWall Unit with other InWall Units that are known-to-be-good within the same LAN. If the other InWall Units that are known-to-be-good within the same LAN work normally, the Ethernet-related parts of the NG Unit are suspected to be defective.

17

CDP-NW10

1-2. Verify the LAN Setup of the InWall Unit. 1. Turn the power on. The HOME menu appears.

6. Press AUTO or STATIC SELECT. STATIC: You can set up the IP address manually. Because some knowledge of networking is required to use this setting, we recommend you normally to select AUTO.

2. Press the V SELECT on the HOME Menu, then press the SETUP SELECT. The Setup Menu appears. Set IP ADDRESS is confirmed. [At the use of a Broadband router] (IP address) 192.168.aaa.bbb *4 (Subnet mask) 255.255.255.000

t (IP address) t (Subnet mask)

3. Press the V SELECT repeatedly until LAN appears on the front panel display. 4. Press the LAN SELECT. The LAN setup Menu appears.

*4 The DHCP function of the router side must be effective. The value of aaa.bbb is decided on the unit side automatically. It doesnt compete with another unit similarly set as AUTO if correctly connected and set. [At the use of HUB] Not use with STATIC. Please go with AUTO.

5. Press the IP ADDRESS SELECT. The IP address setup Menu appears. AUTO: You can acquire the IP address automatically. Normally, select this setting.

t (IP address) t (Subnet mask)

Displayed IP ADDRESS is confirmed. [At the use of a Broadband router] (IP address) 192.168.aaa.bbb *2 (Subnet mask) 255.255.255.000 *2 The DHCP function of the router side must be effective. The value of aaa.bbb is decided on the InWall Unit side automatically. It doesnt conflict with another unit similarly set as AUTO if correctly connected and set.

[At the use of HUB] (IP address) 169.254.xxx.yyy *3 (Subnet mask) 255.255.000.000 *3 The value of xxx.yyy is decided on the unit side automatically. It doesnt conflict with another unit similarly set as AUTO if correctly connected and set.

18

CDP-NW10

2.

Confirmation of wiring environment

2-1. Network Wiring patterns A. Broadband router (4, 8 or 16 port: built-in type) is used. B. Broadband router + Switching HUB (4, 8 or 16 ports etc.) is used. C. Switching HUB is used. 2-2. At the Broadband router use (type A and B) Confirmation of the Broadband router setup (Refer to the manual of the router for details.) 1. Confirmation of the WAN side setup (the Internet side) IP Address, Subnet Mask, Gateway It follows the instruction of the Internet provider. (Normally, Auto is selected.) DNS It follows the instruction of the Internet provider. (Normally, Auto is selected.) 2. Confirmation of the LAN side setup (the InWall network side) IP Address, Subnet Mask The followings are recommended unless otherwise specified. - IP Address : 192.168.xxx.001 (xxx: It depends on the router. It is fixation/changeable. ) - Subnet Mask: 255.255.255.000 DHCP DHCP should be set to Valid unless otherwise specified. It is one example of the setting related to DHCP - Starting IP Address : 192.168.xxx.020 - Max number of DHCP : 100 In this case, the area from 192.168.xxx.002 to 192.168.xxx.019 can be used as the fixed IP region. The IP Address from 192.168.xxx.020 up to 100 maximum becomes the automatic assignment region. 2-3. At the both the broadband router and the hub are used (type B) [Router setup] Refer to the above description. [Hub setup and connection] Verify connection between router and hub. (For details of connection, refer to Operating Instruction of the respective equipment) The connection methods between router and hub are different depending on the hub type. 1. When a hub has the UpLink dedicated terminal: Connect a hub to a router using the dedicated terminal. In this connection configuration, leave the neighboring ports of the dedicated terminal the blank (unconnected) ports to which any equipment should not be connected. (For details, refer to Operating Instruction.) 2. When a hub has the UpLink ON/OFF selector switch: Set the UpLink ON/OFF selector switch to ON, and connect a hub to a router. 3. When a hub does not have the UpLink function: Connect a hub to a router using a [Cross-cable] (sex inverted cable). (This connection is not recommended because this connection becomes an exceptional connection since almost all other connections are performed using the straight cables.)

2-4. Broadband router and hub specifications Both must support 100 Mbps. (Cables must support 100 Mbps too.) If a hub that supports only 10BaseT is used, noise occurs in the playback sound during streaming. 2-5. Verification of the connected equipment Verify what types of equipment are connected to the LAN other than the InWall Unit. PC with [Utility for InWall Unit] (The InWall system supports only a single unit.) If any network equipment as listed below, of other types than the InWall Unit is connected in the same LAN, 100% guarantee of the InWall Unit network operation becomes difficult. Network AV players PC in which server software controlling contents of the above players is installed.

19

CDP-NW10 SECTION 5 ELECTRICAL ADJSTMENT


CD SECTION
Note:

2. RFDC Level Check


[TEST DISC] PATD-012 (CD) : Part No. 4-225-203-01 TCD-W082L (CD-RW) : Part No. J-2502-063-2 Connection:
oscilloscope CD SERVO board CP106 Pin 3 (RFDC) CP106 Pin 2 (VC)
+

1. Use an oscilloscope with more than 10M impedance. 2. Clean the object lens by an applicator with neutral detergent when the signal level is low than specified value with the following checks.

1. RFAC Level/RF Waveform Check


[TEST DISC] PATD-012 (CD) : Part No. 4-225-203-01 TCD-W082L (CD-RW) : Part No. J-2502-063-2 Connection:
oscilloscope CD SERVO board CP106 Pin 1 (RFAC) CP106 Pin 2 (VC)
+

Procedure: 1. Connect an oscilloscope to CP106 Pin 1 (RFAC) and CP106 Pin 2 (VC) on the CD SERVO board. 2. Turn the power on. 3. Put the disc (PATD-012) in to playback the number two track. 4. Confirm that oscilloscope waveform is clear and check RFAC signal level is correct or not.
Note: A clear RFAC signal waveform means that the shape can be clearly distinguished at the center of the waveform.

Procedure: 1. Connect an oscilloscope to CP106 Pin 3 (RFDC) and CP106 Pin 2 (VC) on the CD SERVO board. 2. Turn the power on. 3. Put the disc (PATD-012) in to playback the number two track. 4. Confirm that oscilloscope waveform is clear and check RFDC signal level is correct or not. 5. Change the disc (TCD-W082L) and repeat from procedure 1 to procedure 4.
RFDC signal waveform VOLT/DIV: 200 mV TIME/DIV: 500 ns

5. Change the disc (TCD-W082L) and repeat from procedure 1 to procedure 4.


RFAC signal waveform VOLT/DIV: 200 mV TIME/DIV: 500 ns

level: 1.8 0.3 Vp-p (CD) 1.3 0.3 Vp-p (CD-RW)

3. Iop (CD) Check


[TEST DISC] PATD-012 (CD) :Part No. 4-225-203-01 Connection:
level: 1.0 0.15 Vp-p (CD) 0.8 0.15 Vp-p (CD-RW)

CD SERVO board digital voltmeter

R303

Procedure: 1. Connect an digital voltmeter across R303 (22 ) on the CD SERVO board. 2. Turn the power on. 3. Put the test disc (PATD-012) into playback the number two track. 4. Measure the voltage across R303 (22 ) on the CD SERVO board. 5. Confirm the Iop value is less than 40 mA. Iop value (mA) = The voltage across R303 (22 )/22

20

CDP-NW10

4. CD Vertical Deviation 1.0 mA check


[TEST DISC] TCD-731RA (CD) :Part No. J-2501-059-A Procedure: 1. Turn the power on. 2. Put the test disc (TCD-731RA) into playback the number fifteen track. 3. Play the test disc (TCD-731RA) back and confirm that the disc is played back normally without any problem.

5. CD Eccentricity 140 m check


[TEST DISC] TCD-712R (CD) :Part No. J-2501-260-A Procedure: 1. Turn the power on. 2. Put the test disc (TCD-712R) into playback the number one track. 3. Play the test disc (TCD-712R) back and confirm that the disc is played back normally without any problem.

6. CD-RW Low Reflection Disc check


[TEST DISC] TCD-W082L (CD-RW) :Part No. J-2501-063-2 Procedure: 1. Turn the power on. 2. Put the test disc (TCD-W082L) into playback the number one track. 3. Play the test disc (TCD-W082L) back and confirm that the disc is played back normally without any problem. Checking Location: CD SERVO board (Side B)

CD SERVO BOARD

(SIDE B)

IC201

IC301

R303 (Iop)

CP106 pin 1 (RFAC) CP106 pin 2 (VC)

IC401

CP106

1 3

CP106 pin 3 (RFDC)

IC101

21

CDP-NW10 SECTION 6 DIAGRAMS

THIS NOTE IS COMMON FOR PRINTED WIRING BOARDS AND SCHEMATIC DIAGRAMS. (In addition to this, the necessary note is printed in each block.)
Note on Schematic Diagram: All capacitors are in F unless otherwise noted. (p: pF) 50 WV or less are not indicated except for electrolytics and tantalums. All resistors are in and 1/4 W or less unless otherwise specified. f : internal component. C : panel designation. Note: The components identified by mark 0 or dotted line with mark 0 are critical for safety. Replace only with part number specified. H : adjustment for repair. A : B+ Line. Voltages and waveforms are dc with respect to ground under no-signal (detuned) conditions. Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances. No mark: CD PLAY Waveforms are taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances. Circled numbers refer to waveforms. Signal path. F : AUDIO (ANALOG) J : AUDIO (DIGITAL) c : CD PLAY d : TUNER : LINE IN N : MIC Note on Printed Wiring Boards: X : parts extracted from the component side. Y : parts extracted from the conductor side. : Pattern from the side which enables seeing. Caution: Pattern face side: (Side B) Parts face side: (Side A) Parts on the pattern face side seen from the pattern face are indicated. Parts on the parts face side seen from the parts face are indicated.

Indication of transistor.
C Q B E These are omitted.

Q B C E These are omitted.


Note

Circuit Boards Location

MOTOR board FRONT board

CD SERVO board

MAIN board CD AMP board

22

CDP-NW10
6-1. BLOCK DIAGRAM CD SERVO SECTION
OPTICAL PICK-UP BLOCK
Signal Path

VCC A B C D E F
Q301
6 7 8 9

: CD PLAY : AUDIO (DIGITAL)


A RFAC 15 B RFDCO 28 C DVC(OUT) 14 D
38 VC
42 CE

50 RFAC 43 RFDC

10 E 11 F

IC301 CD RF

T.E 18 F.E 16

41 T.E 39 F.E

DOUT 64
1

SPDIF$IN EECLK EEDATA DVD$CE

LD MD VC

SWITCH

LD

SW 12
26 SSTP

IC201 CD DSP

MAIN(1) SECTION (Page 24)

PD
31 TFDR

27 VC(OUT) 32 TRDR 33 FFDR 34 FRDR 29 SFDR 9 VREF IN 30 SRDR 25 MDP

IC401 MOTOR DRIVER

IN4REF 26 TRKG IN(+) 4

FOCUS + FOCUS TRACKING TRACKING+

12 CH2OUTF

TRKG IN(-) 5 SQSO


76 52

SQCK

MUTE

SCOR

FOCS IN(+) 6
13 CH1OUTR

FOCS IN(-) 7
14 CH1OUTF

SCLK

GFS

22

15

13

77

68

IN3F 23 IN3R 22
SPINDLE MOTOR

OPEN+ 2
15 CH4OUTF 16 CH4OUTR

62

13

19

17

20

15

14

51

SCOR

DSP-MUTE

FOK

SQCK

SENS

GFS

SCLK

SQSO

XRST

SLED MOTOR
11 CH3OUTR 2

18 LDON

CH3OUTF

Q102,103 SWITCH

16 LDRW

LIMIT SW

LOADING MOTOR
1 7

IC402 MOTOR DRIVER OUT1 OUT2 Fin 4 Rin 5


39 CLOSE 38 OPEN

IC101 MICRO CONTROLLER

SYS-CLK 22 SYS-DATA 23 SYS-CE 24 EXTAL 31 X101 12MHz IC102 RESET


3 OUT

OPEN SW
40 OPSW

XTAL 32 RESET 30

26 CLSW

EMPHASIS

CLOK

XLAT

DATA

EMPH
29

SENS

CLOK

XRST

11 CH2OUTR

DATA

XLAT

FOK

IN 1

+3.3V

CLOSE SW

CD MECHANISM DECK

CDP-NW10

23

23

CDP-NW10
6-2. BLOCK DIAGRAM MAIN (1) SECTION

SPDIF$IN U16 DIGITAL AUDIO RECEIVER X2 11.2896MHz

CD SERVO SECTION (Page 23)

EECLK EEDATA DVD$CE EGP1004 EGP1005 EGP1006 EGP1007 EG$RESET

5 RXO

XTI 8

VCXO_PWM U17 BUFFER 2 1A 5 2A 9 3A 12 4A 1Y 3 2Y 6 3Y 8 4Y 11 U21 BUFFER 13 4OE 2 1A 5 2A 1Y 3 2Y 6

20 CSN 19 CCLK 18 CDTI 17 CDTO 23 PDN MCLK 14 LRCLK 10 BICLK 11 SDTO 12

U8 BUFFER 2 1A 5 2A 9 3A 12 4A 1Y 3 2Y 6 3Y 8 4Y 11

U43 NOISE DETECT 1 1A 12 2Q U6 BUFFER 2 1A 1Y 3 2Y 6 3Y 8 4Y 11 MCLK LRCK SCLK INTERCOM 7 1OE SDIN SDOUT

MAIN(2) SECTION (Page 25)

13 4OE

5 2A 9 3A 12 4A

U27 BUFFER 2 1A 5 2A 9 3A 12 4A 1Y 3 2Y 6 3Y 8 4Y 11 D5 13 4OE Q9

13 4OE

U18 BUFFER 2 1A 5 2A 9 3A 12 4A Q10 13 4OE U19 BUFFER 12 4A 4Y 11 1Y 3 2Y 6 3Y 8 4Y 11

INTERCOM MCLK LRCK SCLK SDATA

C
TXD ARM RXD_ARM U23 BUFFER 2 1A 5 2A 13 4OE

AMP SECTION (Page 27)

199

104 76

156 107 89 154

92
ASDO

163

114 110

109

HPGI02

RTSN

DTRN

ABITCLK

ASYNC

EPGI014

ARSTN

RXD1

ASDI

TXD1

EG$RESET EECLK EEDATA DVD$CE EGP1004 EGP1005 EGP1006 EGP1007

124 RSTON

RXD0

87 EECLK 88 EEDAT
170 FGPIO1 147 EGPIO04 146 EGPIO05 145 EGPIO06 144 EGPIO06

SIGNAL PATH : AUDIO(DIGITAL)


U1 (1/3) SYSTEM CONTROLLER

CDP-NW10

24

24

CDP-NW10
6-3. BLOCK DIAGRAM MAIN (2) SECTION
U11 DE CODER CS1 6
15 I 9 7

U1 (2/3) SYSTEM CONTROLLER KEY_CS1 EP$KEY00 EP$KEY01 EP$KEY02


164 EGPI013 202 HGPI05 201 HGPI04 200 HGPI03

LCD(LIQUID CRYSTAL DISPLAY)

EGPI000 153 EGPI001 152 EGPI002 151 EGPI003 148 EGPI010 141

6 LCD_DATA 7 LCD_CLK 16 LCD_RS 17 LCD_RESET 18 CS1 ESD2 ESD3 ESD4 LED+ 19 LED- 20 ESD2 - 4 PROTECTOR Q1 LED DRIVER DIMMING_COM ESD1 PROTECTOR VCC

Y0 I Y7

A0 1 A1 2 A2 3

KEY00 KEY SW S1 - S23 J7


1

160 FGPI015 169 FGPI02 168 FGPI03

KEY01 KEY02

AMP SECTION (Page 27)

IR IN RXD J15 +9V 9 TUNED 4 STEREO 6 SCL 2 TUNER SDA 3

IR REMOTE IR IN

2 4 5

Q11,Q3 INVERTER

101 INT3 109 RXD0

D17
135 ADC0 134 ADC1 140 EGPIO11 165 EGPIO12

GRLED 97 D16 RDLED 98 U10 RESET PRSTN 125 7 1


4

U9 A/D,D/A CONVERTER L-CH 5 R-CH 7 11 AIN1A 12 AIN1B CCLK 2


1

U12
2

J13 L R
2 3 4

RVDD

U2 NAND CGPI00 115 U25 TIMER (40KHz) 1 1A 1Y 3

CDOUT 1 9 AIN2A 10 AIN2B U41 PROTECTOR U38 PROTECTOR SDIN MCLK SCLK LRCK SDOUT INTERCOM Q 3 2 1B MAIN(1) SECTION (Page 24) TXD0 113 RESET 6

Q4 J8 IR REMOTE IR OUT

LINE IN

SDIN 37 MCLK1 44 25 MIC BIAS SCLK1 42 LRCK1 43 SDOUT 41 5 1 7 21 MIC1 22 MIC2 33 AOUTA 34 AOUTB

J4 MIC
3 2

U44 (1/2) MIC AMP


1

U31 SWITCH 6 3 2

U26 PHYSICAL LAYER TRANSEIVER TXCLK 181 TXEN 176 TXERR 175 15 TXCLK 16 TXEN 14 TXER 10 RXCLK 9 RXDV 11 RXER 22 CRS/RMII 21 COL/RMII 2 MDC 1 MDIO LED0/TEST 26 D21 D20 D18 D13 VCC RX+ 33 RX- 32 U37 U40 TX+ 41 TX- 40 U39 U40 VCC U37,U39,U40,U42 PROTECTOR J23

AC5V
6 7 5

U44 (2/2) MIC AMP

IN

U45 MIC LEVEL DETECT

D3 D4

RXCLK 190 RXDVAL 183 Q1 MIC SWITCH RXERR 182 CRS 174 CLD 173 MDC 192 MDIO 191

O2
7 U30
1 4 2

IN

D1 7 O2 6 O1 D2

U29 LEVEL DETECT

MIITXD0 177 I I MIITXD3 180 MIIRXD0 I MIIRXD3


142 EGPI009 184 I 186 189

17 I 20

TXD0 I TXD3 MIIRXD0 I MIIRXD3

LED1/SPD100 27 LED2/DUPLEX 28 LED3/NWAYEN 29

4 U32 RESET

MONITOR_CHILD U1 REMOTE CONTROL RECEIVER U24


2 4

6 I 3

X0 45 48 RST X1 46

Y3 25MHz

SIGNAL PATH : TUNER : LINE IN : MIC : AUDIO(DIGITAL) : AUDIO(ANALOG)

IR OUT 1

103 INT0

INT1 102 U5 AUDIO AMP 4 IN V01 5 V02 8

25 INT

SPEAKER$VO1 (+) 1 SPEAKER$VO2 (-) 2

J3 SPEAKER

CDP-NW10

25

25

CDP-NW10
6-4. BLOCK DIAGRAM MAIN (3) SECTION

U1 (3/3) SYSTEM CONTROLLER DQM0 24 DQM1 23 SD WEN 14 CASN 22 RASN 21 SDCLKEN 208 SDCLK 10 SDCSN3 15 15 LDQM 39 UDQM 16 WE 17 CAS 18 RAS 37 CKE 38 CK 19 CS
A0-A12 I BA0,BA1 DQ0 I DQ15

U3 SDRAM

20,21 22-26 29-36 48,46 44,40 38,36 32,30 73,71 69,65 63,61 59,55 195,196 205,206 207,26 25,11

2,4,5,7,8,10,11 13,42,44,45,47 48,50,51,53

AD0 I AD23

ADDRES BUS

U15 OSC
2 4 2

U22 OSC
4

CVDD (1.8V)

137 RTCXTALI

U13 REG D15 RVDD (3.3V) L11 CD$VCC3V

3.3VDC

AMP SECTION (Page 27)

Y1 36.768KHz

DA0 I DA15

74,72 70,68 64,62 60,56 47,45 43,39 37,33 31,29

D14
DATA BUS

CD$VCC5V 12T05VCC

VCC5V

U14 +5V REG

14VDC

X1 14.7456MHz

118 XTALI

VCC9V

U20 +9V REG

RVDD J3
155 TRSTN 77 TCK

28 - 17 13 - 10 8 - 3, 1, 30

33,35,38,40,44 46,49,51,34,36 39,41,45,47,50,52


DQ0 I DQ15

CS6 2 RSTON 124 RDN 193 WRN 194


EP$RD EP$WR

14 CE0 16 RST 54 OE 55 WE

A1 I A23

JTAG PART

78 TDI 79 TDO 80 TMS

U4 FLASH MEMORY

CDP-NW10

26

26

CDP-NW10
6-5. BLOCK DIAGRAM AMP SECTION

U3 DIGITAL AUDIO PROCESSOR LRCK SCLK SDATA MCLK MAIN(1) SECTION (Page 24) 26 LRCLK 27 SCLK 31 SDIN1 63 MCLK 19 XTL .OUT 20 XTL .IN VALID 39 BKND_ERR 37 33 PA4(ADC4) 13 PD4(OC1B) 16 PD7(OC2) 7 XTAL2 PWM_M_1 40 8 XTAL1 PD5(OC1A) 14 PD2(INT0) 11 MAIN(2) SECTION (Page 25) RXD_ARM 11 RESET 14 MUTE PWM_P_1 41 PC1(SDA) 20 PC0(SCL) 19 24 SDA 25 SCL PWM_M_2 42 PWM_P_2 43

U4 DIGITAL AUDIO AMPLIFIER 7 PWM_DP 10 PWM_CM 8 PWM_DM 11 PWM_CP OUT_C 47 LPF OUT_D 51 OUT_D 50 LPF J2-A

L
SPEAKERS
Q2, Q3 DC DETECT OUT_C 46

INTERCOM VCXO_PWM RXD_ARM TXD_ARM U501 CPU

X2 13.5MHz

9 RESET_CD 5 SD_CD 6 SD_AB

(IMPEDANCE USE 8-16)

17 PWM_BP 20 PWM_AM 18 PWM_BM 21 PWM_AP

OUT_B 39 OUT_B 38 LPF

J2-B

X3 7.3278MHz

R
OUT_A 35 LPF

OUT_A 34 9 RESET_AB Q4, Q5 DC DETECT 9 PD0(RX0) 10 PD1(IXD) PD3(INT1) 12 PC2(TMS) 21 Q1 PROTECT SWITCH

J1 VCC29.5VDC
29.5VDC

SIGNAL PATH : AUDIO(ANALOG) : AUDIO(DIGITAL)


MAIN(3) SECTION (Page 26)

14VDC

DC IN
U2 3.3V REG
14VDC

E
3.3VDC

(TO AC-NW10)

CDP-NW10

27

27

CDP-NW10
6-6. PRINTED WIRING BOARD CD SERVO SECTION
See page 22 for Circuit Boards Location.

1 A
MOTOR BOARD

2
(SIDE A)

10

11

12

13

14
(SIDE B)

MOTOR BOARD

CD SERVO BOARD

(SIDE A)

CD SERVO BOARD

(SIDE B)

B
M
M1 (LOADING)

1 CP101 4 2

15 16

B
D
MAIN BOARD J6 (Page 31)

IC201

IC301

CP103

CON1 5 1

OPTICAL PICK-UP BLOCK E

15 E
(Iop)

E
CP102

A
MAIN BOARD J11 (Page 31)

1 CP106 3

for CHECK

F
1

IC401
CP104 1

IC101
6

CD MECHANISM DECK

G
IC102

3 1

IC402
CN105 5

Semiconductor Location
Ref. No. D301 IC101 IC102 IC201 IC301 IC401 IC402 Q102 Q103 Q301 Location C-12 F-11 G-9 D-10 D-12 F-12 G-12 E-9 E-9 D-13

CDP-NW10

28

28

CDP-NW10
6-7. SCHEMATIC DIAGRAM CD SERVO SECTION
See page 43 for Waveforms. See page 44 to 46 for IC Block Diagrams. See page 48 for IC Pin Function Description.

L304

C205 0.047

R305 27k L302

C317 20p

R202 33k

C201 0.47 50V C202 0.01 C203 0.01 RFDC

R204 3.3k C204 0.0015 C210 0.01

R206 470k

L301

R201 100k

R205 1k

C206 220p

R208 1M C225 0.01 C226 0.001 C227 220 10V CP101 4p

C207 0.1 R209 470k

R237 0

R236 15k C223 470p

R207 10k

IC301 CXA2647N R307 7.5k

R306 5.6k

R203 10k

C305 0.1

C306 47 16V

C307 4.7 50V

TE

L201

CP103 16p R301 12k C308 0.1

R308 1k

R310 15k R311 82k R313 100k R314 150k C320 0.1 C301 47 16V C302 1 50V D301 1N4148 L303 Q301 KTA1504 R302 12k R315 150k C318 C303 0.001 C316 0.1 C315 0.001 C319 100 10V R319 470 C312 47 16V 0.1

C309 47 16V

R309 100k

C310 0.1

C321 0.1

C222 0.1 R235 100k R234 15k

C221 470p

C220 0.022

SE FE

C208 0.1 C209 100 10V

R312 91k

R215 47 R316 47k CP102 15p

R317 47k R318 150k C313 0.0033 IC201 CXD3068Q

R219 4.7k R220 1M R238 680 X201 16.9344MHz C214 24p C215 27p

R303 22

C304 100 10V R304 100k C401 0.1 C402 220 10V

C314 100 10V DVC

R233 10k

R401 1k C219 0.01 R222 1k R223 1k

C216 0.001 R402 1k SPDL

C217 0.1 C403 0.0033 R403 82k R232 1k R231 1k R230 1k R227 1k R229 1k R226 1k R228 1k R224 1k R225 1k

IC401 SAC4509L

CP106 3p

R405 1k

C404

0.47

50V

CP104 6p

C406 0.1

C405 220 10V

Q103 KRA102S Q102 KRC102S R110 1.5k

R410 10 R407 1k C103 0.022

R105 10k

IC402 BA6417F

R104 100

C104 0.022

R111 4.7k IC102 KIA7027

R409 0

R406 1k R408 0 C110 100 10V

IC101 CXP84632

X101 12MHz

CON1 5P M1

CN105 5P

C408 0.1

C407 220 10V

R106 10k

C105 0.1

R108 1k

R411 1k C409 SW1 C410 0.1 0.1 R412 1k

C106 0.022 C109 0.001

C107 100 10V

R109 1k

CDP-NW10

29

29

R107 10k

L101

CDP-NW10
6-8. PRINTED WIRING BOARD MAIN SECTION (SIDE A)
See page 22 for Circuit Boards Location.

1 A

8
Semiconductor Location
Ref. No. D5 D7 D8 D11 D13 D14 D15 D16 D17 D18 D20 D21 D24 Q3 Q4 Q9 Q10 Q11 U1 U2 U3 U4 U5 U6 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 U18 U19 U20 U21 U22 U23 U24 U25 U26 U27 U32 U43 Location E-4 G-5 D-3 F-3 D-6 D-2 F-3 E-4 E-4 D-6 D-6 D-6 G-4 G-3 G-4 F-4 G-3 G-4 E-5 G-5 D-3 C-4 E-6 F-2 E-3 E-7 G-5 G-6 G-5 F-3 D-2 F-5 F-6 F-4 F-3 F-4 B-4 F-4 F-5 F-2 G-3 G-4 D-6 E-4 C-7 F-4

MAIN BOARD
(SIDE A)

U20

29

28

U4
56 54 16 28 1

U32
1 3

U14

8 9

U26
24 27 52 53 1 208

13 12

1 48 37 36

U3
1

U1
14 1

U8

8 14 71

U27 7
104 157 105 156 24 E 13 16 1 1 7 14 8

U5
1 4 36

24 25 37

U9 13
12 48 1

U13

U15 U22

8 45

U43 9

U23 7
8

17 14 8

U6

1 14

7 8

U18
E

U191 7U17 1
14 8 7 E 8

1 1

U16

12

U21 1
5 14 4 1

14 5 E 1 14 1 5 8 34 8 4

U10
1

U25

U24

4 1 3E

U12

U11

16

U2

CDP-NW10

30

30

CDP-NW10
6-9. PRINTED WIRING BOARD MAIN SECTION (SIDE B)
See page 22 for Circuit Boards Location.

1 A

8
Semiconductor Location
Ref. No. D1 D2 D3 D4 Q1 U29 U30 U31 U37 U38 U39 U40 U41 U42 U44 U45 Location E-2 E-2 E-2 E-2 E-2 E-3 F-3 E-3 C-2 E-2 D-2 D-2 D-2 D-2 E-3 E-3

MAIN BOARD
(SIDE B)

J9 J15

B
TUNER

E
10 1

CD AMP BOARD CON2 (Page 40)

C
J23 J23 7 8 KK A A KK 1

J6

D
J13 L LINE IN R KK A J7 IR IN IR REMOTE J8 KK A

KK KK A A

B
4

CD SERVO BOARD CP101 (Page 28)

U31

1 4 1 8

8 5 1 4

U44

J3 19 20

8 5

U29

U45

U30

E
4

5 3 41 5

8 5 1 2

for JTAG PART

IR OUT 1 40

G
15 J11 1 12 J14 1

D
FRONT BOARD J1 (Page 37)

A
CD SERVO BOARD CP102 (Page 28)

C
CD AMP BOARD CON4 (Page 40)

CDP-NW10

31

31

CDP-NW10
6-10. SCHEMATIC DIAGRAM MAIN SECTION (1/5) See page 43 for Waveforms. See page 49 for IC Pin Function Description.

PLL VDD

U4 JS28F640J3C115 R30 47k U1 EP9301 ADC VDD C9 0.1

C8 10 16V

FB2 PBY3216

C15 1

C16 1

C17 1

C18 1

C19 1

C20 1

C21 1

C107 1

C31 10 16V

R6 4.7k
R33 4.7k

R27 47k

R29 5.1k

R31 10k

R5 10k

C10 0.1

C11 10 16V

FB3 PBY3216

C7 0.1

BEAD4 1608T

R67 100k R88 470k R22 47k R19 47k D16(1/2) R3 680 D17(1/2) R4 680 C56 1 C42 1 U12 SN74LVCG14DBVR R28 22k C41 0.1 R102 O

U10 MAX708CSA

R64 10k

R57 100

R21 2.2k
R36 47

R20 2.2k

R127 33

C64 5p

R126 33

R132 4.7k

R12 33 R40 33 R125 33 FB20 C39 10 16V R124 33

C35 1

C94 1

C95 1

C34 1

C33 1

C3 1

C2 1

C1 10 16V

C36 1

C37 1

C38 1

R123 33

FB21 PBY3216 U3 K4S561632E-UC75T R122 33

R131 O R145 R146 R147 R148 R121 33 33 O 33 33

R117 33

R113 33

R69 33 R160 33 R2 33 R141 33

R25 33

R81 33 R108 47R

R97 33 C93 5p

DSR CTS R199 33 R200 33

J4 03SG

J3 HEADER2X10 R32 10k R186 33 R149 R194 10k R197 10k R114 4.7k R1 33 U15 NC7SPU04 C193 0.1 U22 NC7SPU04 TP1 R16 10k XTALO 33

R151 2.2k R158 33

R204 5.1M

R244 470k C133 0.1

R14 47k R8 47k

C28 1

C27 1

C26 1

C22 1

C29 1

C25 1

C13 1

C24 1

C14 1

C23 1

C96 1

C97 1

C30 1

C98 1

X1 14.7456MHz

C106 1

C105 1

C103 1

C181 22p

Y1 32.768KHZ

C182 22p

BEAD5 160808T

C32 10 16V

C183 1

J1 03SG R18 10k

R17 10k

CDP-NW10

32

32

CDP-NW10
6-11. SCHEMATIC DIAGRAM MAIN SECTION (2/5) See page 47 for IC Block Diagram.

R201 1k U24 SN74LVCG14DBVR R118 1k U2 74HC00MX_N

R193 33 R128 3.3k J8 BD3.5

R96 33 R98 33

Q4 STN2222A R150 220 R242 10k R154 1k R162 33 R115 3.3k J7 BD3.5 R205 1.2k R207 O U25 NE555DR R206 1k Q11 STN2222A C162 10n R163 10k R159 220P C69 0.1 R208 1k

R243 220

Q3 STN2222A

C121 10 16V

J2 05002HR-40A

D24 RLS4148

R202 1.2k C122 0.01

TP21

C163 12n L5 PBY3216

R26 33 R62 33 R34 33 R116 33

TP26

TP20

TP14

TP15

TP18

TP16

TP19

TP17

R101 10k

R100 10k

R99 4.7k R71 4.7k


TP12 TP13 TP11 TP10 TP4 TP2 TP8 TP5 TP9 TP6 TP7

R351 33

R66 4.7k

U11 MM74HC138MX_NS

R138 1k

R411

33

C76 0.1

R421

33

L2 BEAD

TP24

J11 15P-2.0

R112 33 R111 33 R166 33 REMOTE

CDP-NW10

TP22

TP23

33

33

CDP-NW10
6-12. SCHEMATIC DIAGRAM MAIN SECTION (3/5) See page 43 for Waveform. See page 47 for IC Block Diagrams.

U21 74HC126D R215 4.7k C112 1 C111 0.1 C113 10 16V R261 4.7k C110 1 C109 10 16V R164 4.7k

R23 10k

U16 AK4117VF-EZ R55 12k

C114 0.1 U18 74HC126D TP3 R87 33 R103 33 R104 33 R105 33


C45 47p C60 47p C5 47p

U6 74HC126D R212 33 R214 33 R211 33 R213 33

BEAD7 PBY0603

R68 4.7k R259 4.7k

LRCLK

C140 0.1

R260 1k R184 33 C227 0.1 C228 10 16V

U17 74HC126D

C6 0.1 R73 33

MCLK

SDATA

X2 11.2896MHz

SCLK

R156 4.7k

C132 0.1

TX

RX

J14 12P-2.0

C124 47p

R83 33

Q10 STN2222A

R93 33

R95 33 R72 4.7k R82 4.7k R157 4.7k U19 74HC126D R38 1k R39 33 R70 4.7k Q9 STN2222A C108 0.1 U8 74HC126D R155 22k U23 74HC126D R51 33 R52 33 R264 2k

C118 0.1

R221 4.7k

C46 0.1

U27 74HC126D U43 74HC123D

C191 0.1

R183 10k

R270 33

R267 270k C104 0.022

R269 10k

C102 0.022

R268 820k

D5 RLS4148

C47 0.1

R209 O

R210 O

CDP-NW10

34

34

CDP-NW10
6-13. SCHEMATIC DIAGRAM MAIN SECTION (4/5) See page 43 for Waveform. See page 47 for IC Block Diagrams. See page 54 for IC Pin Function Description.

J15 20010WS TUNER L TUNER R R134 47k R143 47k R238 33R R182 3.3k R181 3.3k

R262 33R

FB18 C176 10 25V

C55 1

C54 1

FB23

R58 47k C222 0.1 L7 C208 U5 1000p LM4871MM R74 100k C221 0.1 R203 15k R133 100k D2 RLS4148 D1 RLS4148 U29 NJM2072 R61 O C61 1 R45 100 R46 100 R48 10k C218 0.1 C219 1000p R77 100k R63 100k U30 MC74HC1G08DTT1G R15 100k C223 0.1

C74 1

C73 1

C72 1

C201 10 16V

C233 10 16V

R59 15k

R190 1M

R53 100k

R258 100k

C216 0.1 R152 33 R153 33 R165 33 R179 33 R185 33 C52 150p C53 150p U9 CS4245

R75 O

R191 1M

R94 1M

R92 1M

R60 O

R120 C235 1.2k 0.47

C99 10 16V C100 10 16V

D3 RLS4148

R222 2.7k

C220 3.3

R252 4.7k

C90 10 16V

FB24 BEAD

U31 TC7W66F

C65 1800p

C66 1000p

C67 1000p

R188 1M

R189 1M

R89 1M

R11 10k

R86 1M

R10 10k

C101 1800p

C89 10 16V R50 33k

R47 10k R44 C50 33k 18n C4 18n

R106 3.3k C143 10 16V C142 1 C62 1 C129 1

D4 RLS4148 Q1 STN2222A R254 10k

R257 10k

R139 O R140 O R192 10k U41 PACDNO42 U38 PACDNO42

J13 02G

C84 10 16V C83 10 16V

C79 0.1

C81 47 16V C82 47 16V

C77 0.1 C71 2200p C78 0.1

R49 100k

R43 100k

C12 47 16V

C210 0.1

C80 0.1

C70 2200p

R54 2.2k C234 0.47 R245 100 R251 10k R250 10k R246 100k R249 3.3k R247

C214 10 16V

U45 NJM2072M

R255 15k

R256 15k

C209 0.1

U44(1/2) MC33202DR2G 100k

C215 0.1

R7 O

C206 1000p

FB7

C207

2.2

R248 3.3k C57 1 C58 1 C59 1 C91 10 16V C146 1 C186 10 16V FB4 FB12 FB6 C178 0.1 U39 PACDNO42 U44(2/2) MC33202DR2G

C204 470p

C185 1

C148 1

C147 10 16V

U40 PACDNO42

R84 51

R85 51

R91 51

R240 10k

R230 4.7k J23 P65-10Z-2AG9

R79 33

TP25 U42 PACDNO42 U37 PACDNO42

R225 6.2k

R241

33

U26 KSZ8721BL

R239 33 D21(1/2) D20(2/2) D18(1/2) D13(2/2) R229 220 R228 220 R227 220 R226 220

R237 33 R236 33 R235 33k R234 33k R233 33k R232 33k R231 33k C159 22p Y3 25MHZ C160 22p

R224 4.7k U32 KIA7032AF/P

FB11

FB5

C44 1

C49 1

CDP-NW10

R90 51
R223 10k

35

35

CDP-NW10
6-14. SCHEMATIC DIAGRAM MAIN SECTION (5/5)

D11 SDB10A40 J9 YAW396-06 FB16 BEAD U13 TPS77618QDR

FB10 BEAD C180 100 35V

C184 1

D15 SDZ6V2D

FB30 BEAD FB33 BEAD

C502 1

C503 100 35V

C117 10 16V ALU_CAP

C87 1

R65 240k

C86 10 16V

14
C174 1 C175 100 35V L11

C149 1

C126 100 35V

C125 1

D14 SDZ5V1D

C120 100 35V

FB26 BEAD

C150 1

C151 100 35V FB9 BEAD

C152 10 16V ALU_CAP

C154 1

C75 1

C85 10 16V

C115 10 16V ALU_CAP

U14 TPS54350PWPR C155 0.1 L3 FB1 BEAD L1

C173 100 35V

C167 0.1

D8 SDB30A40

R129 4.7

C165 100 35V

C164 0.1

C123 1

C501 1

C119 100 35V

C205 1

C211 100 35V

C158 1

C153 3300p

FB17 BEAD C166 82n C157 1800p FB15 BEAD R137 680 R135 120 R136 1k C156 33n

C128 1

C127 10 16V ALU_CAP

C130 10 16V ALU_CAP

C131 1

U20 LM1117IDT-ADJ

C170 1

C171 100 35V R195 2.7k C172 10 25V ALU_CAP

R196 430

C169 10 25V ALU_CAP

C168 1

J6 4P-2.5

CDP-NW10

36

36

CDP-NW10
6-15. PRINTED WIRING BOARD FRONT SECTION
See page 22 for Circuit Boards Location.

1 A

10

FRONT BOARD

(SIDE A)
Semiconductor Location
S7

Ref. No. D1

Location H-4 H-4 G-5 G-5 G-6 H-4 B-3

S1

?/1

S2

S3

S4

S5

S6

B
1

U1
1 2

(MICROPHONE)

ESD1 ESD2 ESD3 ESD4 Q1

3
LCD

U1

LIQUID CRYSTAL DISPLAY

C
1 20

D
S19 MODE S18 BACK S17 S16 S1 - S23 S15 HOME S14 MUTING S13 S12

E
FRONT BOARD
(SIDE B)

MAIN BOARD J2 (Page 31)

SP

A K K

A K

K K

E A K K

1 2

H
40

CDP-NW10

37

37

CDP-NW10
6-16. SCHEMATIC DIAGRAM FRONT SECTION

J3 12505WR-02A00

J4 BOB-S274MD

J1 FPC_40P 05002HR -40A01S(G) C4 0.1

FB1 SBK160808T -110Y-N C3 10 16V C6 0.1

J2 050021HR -18A01(G)

R11 100

ESD2 PACDN042

R10 100

ESD3 PACDN042

ESD4 PACDN042

R3 100 R6 100 R13 100 R12 1k R2 47k

D1 SDB10A40 R17 1k R16 1k R24 1k R15 1k R14 1k R23 1k R22 1k R21 1k R20 1k R19 1k R18 1k
C10 150p C11 150p C12 150p C13 150p C18 150p C14 150p C15 150p C16 150p C1 150p C2 150p C9 150p

J5 24-8000-002

S1

S2

S3

S4

S5

S6

S7

S8

R9 22 FB2 SBK160808T -110Y-N R5 4.7k

C17 0.1

C19 10 16V

S16

S15

S14

S13

S12

S11

S10

S9 C5 0.1 R7 4.7k

Q1 STN2222A

C20 0.1

C21 10 16V

S17

S18

S19

S20

S21

S22

S23

R8 47k

ESD1 PACDN042

U1 PIC37041TM2

R1 10k

R4 33

C7 10 16V

C8 0.1

CDP-NW10

38

38

CDP-NW10
6-17. PRINTED WIRING BOARD CD AMP SECTION (SIDE A)
See page 22 for Circuit Boards Location.

1 A

2
CD AMP BOARD

10

(SIDE A)
Semiconductor Location
Ref. No. D1 D2 D4 D5 D7 D8 D9 D4 D5 D7 D8 D9
U2
1 16

Location G-5 C-8 F-5 F-5 G-5 G-2 F-2 F-5 F-5 G-5 G-2 F-2 G-3 G-3 G-2 F-3 F-2 C-7 F-7 G-6 G-8

Q1 Q2 Q3 Q4 Q5 U2 U3 U4 U501

33
29 28

32

17

16

F
E E

U3
48 49 1 64

U4

56

22 23

12 11

U501
33 1 34 44

CDP-NW10

39

39

CDP-NW10
6-18. PRINTED WIRING BOARD CD AMP SECTION (SIDE B)
See page 22 for Circuit Boards Location.

1 A

2
CD AMP BOARD

10

(SIDE B)

B
CON3
3 1 for TEST

CON4

C
L SPEAKERS

12

J2
1

C
MAIN BOARD J14 (Page 31)

1
4

F
CON2 J1
GND

1
5

AC-NW10 SMPS BOARD (DC OUT)

14V DC IN GND 29.5V

MAIN BOARD J9 (Page 31)

CDP-NW10

40

40

CDP-NW10
6-19. SCHEMATIC DIAGRAM CD AMP SECTION (1/2)
See pa ge 43 f or Waveform. See pa ge 59 f or IC Pin Function Description.

C24 10 16V

MCLK

LRCK

C62 0.1

R73 4.7k R71 4.7k R70 4.7k R79 100 R78 100 R61 4.7k R25 470 TP2 TP4 TP5 R77 100 R76 100

SCLK

C49 0.1

C50 0.1

C63 0.1

C55 0.1

C61 0.1

SDATA

CON4 12P-2.0-150

7_3728MHZ C51 27p

X3 7.3728MHz

U501 ATMEGA32L-8AU

R66 100

C52 27p R14 390 R2 390 CON3 03SG

R1 390

R62 100

R63 100

R74 100

R75 100

RX TX

R67 4.7k

R68 4.7k

J1 MSTBA2.5-5 -G-5.08 BEAD6 PBY321611T R11 10k 1W C31 0.1 50V C16 1000 50V C23 1000 50V

29V

14V

BEAD3 PBY321611T C64 0.1

BEAD2 PBY321611T BEAD4 PBY321611T

C39 0.1

C69 0.1 50V

C5 330 35V

BEAD1 PBY321611T

C12 330 35V

C19 0.1 50V

BEAD10 PBY321611T

U2 TPS54350PWPR

TP 3_3V C9 0.1 L2 BEAD5 PBY321611T

CON2 YAW396-06

C48 100 35V

BEAD15 PBY321611T

C2 330 35V

C1 0.1 50V

D2 SDB30A40

R9 4.7 C8 3300p

C10 100 35V

C11 0.1

C73 0.1

C81 0.1

C18 10 16V

R10 2k C56 47n C3 82n C4 1800p R6 360 R7 120 R5 680

C7 1

R8 1k

C6 33n

CDP-NW10

41

41

CDP-NW10
6-20. SCHEMATIC DIAGRAM CD AMP SECTION (2/2)
See page 43 for Waveform. See page 55, 57 for IC Pin Function Description.

R21 10k C25 10 16V R80 150k

C76 0.1

Q1 STN2222 C72 1 R28 10k

C74 0.1 TP1 R52 200 C86 10n C89 0.1 R51 200 C53 10n C90 0.1 U4 TAS5112DFDR

C33 0.1 50V

C27 0.1 50V

C144 1000 50V

C21 1000 50V

D8 RLS4148

C54 0.1 C91 1 TP6 TP9 TP7 TP8 C82 0.1 R30 200 R44 200 R43 200 U3 TAS5508PAGR R41 200 R48 200 R47 200 R46 200 C87 0.1 C71 0.1 R31 1.5 R4 1.5 R45 1.5 C40 33n D9 RLS4148 R26 1.5 C36 0.1 D1 P6SMBJ33C(A) C29 0.1 L1 C58 R29 10n 10k R13 1 C60 10n D7 P6SMBJ33C(A) R3 1.5 C37 0.1 L5 C47 0.1 R27 10k C57 10n R12 1 R19 220k C59 10n C95 4.7 Q3 STN2907 J2-A MSTBA2.5-4-G -5.08-A R22 1.5 C46 33n

R53 4.7 C83 0.1 C84 1n

C13 470n

R18 24k

C26 10 16V

Q2 STN2907

R20 220k

C32 33n C28 0.1 L3 R23 1 D4 P6SMBJ33C(A) L4 C34 0.1 C14 470n R16 10k C70 10n R38 220k C66 10n Q5 STN2907

R54 3.3

C22 10 16V

C75 0.1

C77 0.1

C20 10 16V

R60 100 C88 0.1 C80 0.1 FB7 SBK1608 X2 13.5MHz R40 1.5 C45 0.1

J2-B MSTBA2.5-4-G -5.08-B C30 4.7 R32 24k

C68 10n C35 0.1 D5 P6SMBJ33C(A) R17 10k R15 1 C65 10n Q4 STN2907 R39 220k

R24 1.5 C67 1

C38 33n

R55 1M 13_5MHZ C79 15pF C78 15pF

CDP-NW10

42

42

CDP-NW10

Waveforms MAIN Board

CD SERVO Board

CD AMP Board

U1 <zz, (XTALI)

5 IC201 t; (RFAC)

U3 ql (XTL OUT)

5.4 Vp-p
1.1 Vp-p

67.8 ns 1 V/DIV, 20 ns/DIV


500 mV/DIV, 500 ns/DIV

74 ns 1 V/DIV, 40 ns/DIV

2.4 Vp-p

U1 <zcm (RTCXTALI)

6 IC101 es
2.1 Vp-p

(XTAL)

U501 8 (XTA1)

3.8 Vp-p

30.5 us 1 V/DIV, 20 us/DIV

82.5 ns 1 V/DIV, 40 ns/DIV

296 ns 500 mV/DIV, 100 ns/DIV

1 Vp-p

U16 8 (XT1)

7 IC201 us (XTAO)
3.8 Vp-p
5.3 Vp-p

88.4 ns 1 V/DIV, 40 ns/DIV

59.1 ns 1 V/DIV, 40 ns/DIV

U26 rg (XO)

2.9 Vp-p

40 ns
1 V/DIV, 20 ns/DIV

43

CDP-NW10

IC Block Diagrams CD SERVO Board IC201 CXD3068Q


BIAS AVDD1 PCO FILI FILO CLTV AVDD0 IGEN AVSS0 ADIO RFDC CE TE
47 46 45 44 43 42 41

60

59 58

57 56 55 54 53 52

51 50 49 48

DVDD2 61 ASYE 62 MD2 63 DOUT 64 DIGITAL OUT

OSC DIGITAL PLL ASYMMETRY CORRECTOR

AVSS1 RFAC ASYI ASYO

V16M

VPCO

VCTL

LRCK 65 PCMD 66 BCK 67

OPERATIONAL AMPLIFIER & ANALOG SWITCH

A/D CONVERTER

D/A DIGITAL INTERFACE

EFM DEMODULATOR

32K RAM

ERROR CORRECTOR

EMPH XTSL DVSS2 XTAI XTAO

68 69 70 71 72

CLOCK GENERATOR SUBCODE PROCESSOR

FOCUS SERVO DSP TRACKING SERVO DSP SLED SERVO DSP

FOCUS PWM GENERATOR TRACKING PWM GENERATOR SLED PWM GENERATOR

40 39 38 37 36 35 34

SE TE VC TES1 TEST DVSS1 FRDR

33 FFDR 32 TRDR 31 TFDR 30 SRDR 29 SFDR

SOUT 73 SOCK 74 XOLT 75

SERVO INTERFACE DIGITAL CLV PROCESSOR

28 DVDD1 27 FSTO 26 SSTP 25 MDP 24 LOCK 23 PWMI

SERVO AUTO SEQUENCER SQSO SQCK SCSY SBSO EXCK 76 77 78 79 80

CPU INTERFACE

MIRR, DFCT, FOK DETECTOR

22 FOK 21 DFCT

8 9 10 11 12 13 14 15 16 17 18 19 20

MUTE

CLOK

SENS

DVDD0

44

SCLK ATSK WFCK XUGF XPCK GFS C2PO SCOR C4M WDCK DVSS0 COUT MIRR

XRST

DATA

XLAT

CDP-NW10

IC301 CXA2647N
ROM/RW 30 DC OFST 29 RFDCI + VC VCC VC VC + DVC VOFST ROM/RW 27 VC EQ PD 2 APC AMP RF OFF AT VCC RFAC VCA ROM/RW AC SUM 4 RFAC SUMMING AMP VCC B C A A A B C D 6 7 8 9 A B C D B C D D DVC VC ROM/RW ROM/RW GM + E 10 19 BAL VOFST + + 22 VCC 21 CEI VOFST 18 TE VC ROM/RW ROM/RW ROM/RW (L/H) DVCC 13 DVC DVC 14 VC ROM/RW RFAC 15 DVC + + VC + + F 11 GM DVC OR Hi-Z SLEEP, APC OFF SW 12 VOFST + 28 RFDCO

A B C D

VC LD 1 26 RFC 25 VFC 24 BST

EQ IN

23 RFG

GND

20 CE

VC

VC

B D A C

17 FEI

16 FE

45

CDP-NW10

IC401 SAC4509L
IN4REF OPOUT PVCC2 DO3R DO4R
15

DO3F

28

27

26

25

24

23

22

21

20

19

18

17

16

POWER SAVE LOW PASS FILTER LEVEL SHIFT

DO4F
13

IN3R

IN3F

GND

VCC

P/S

IN4

CP

PVCC2

LOW PASS FILTER

LOW PASS FILTER

10

11

12

PTN26
14

OPIN+

OPIN-

DO2F

DO2R

IC402 BA6417F
OUT1 1 8 GND

VM

PVCC

7 OUT2

DRIVER TSD

DRIVER

VCC 3 CONTROL LOGIC

VREF

POWER SAVE

FIN 4

RIN

46

DO1F

IN1F

IN2F

VREF

DOIR

IN1R

IN2R

GND

SW

CDP-NW10

MAIN Board U5 LM4871MM


8
100K

U43 74HC123D
VO2

SHUTDOWN

BIAS

S 1A 1 2 3 4 T

Q Q

16 VCC 15 1REXT/CEXT 14 1CEXT 13 1Q

7 BYPASS 2

GND

1B 1RD

RD

100K

VDD

1Q

40K

+IN -IN

3 4

40K

VO1

2Q 2CEXT 2REXT/CEXT GND

5 6 7 8

Q Q

S T

12 2Q 11 2RD

RD 10 2B 9 2A

U16 AK4117VF-EZ
INPUT

U29, U45 NJM2072M


1 8 VCC

24 AVSS 23 PDN
GAIN CONT

AC-3/MPEG DETECT

OUTPUT2

ERROR & STATUS DETECT

22 INT0 21 INT1
AMP OUT 3 6 OUTPUT1

R AVDD

1 2

CLOCK RECOVERY Q Sub code BUFFER 2 to 1 INPUT SELECTOR DAIF DECODED

20 CSN 19 CCLK uP I/F 18 CDTI 17 CDTO 16 UOUT

GND

RECOVERY TIME CAP

RX1 NC RX0 DVDD DVSS XTI XTO

3 4 5 6 7 8 9

X' tal OSCILLATOR

Q-SUBCODE BUFFER CLOCK GENERATOR

15 NC

14 MCKO

LRCK 10 BICK 11 SDTO 12 AUDIO I/F 13 DAUX

U25 NE555DR
8 GND TRIGGER 1 7 2 COMPARATOR FLIP FLOP DISCHARGE VCC

U6, U8, U17, U18, U19, U21, U23, U27 74HC126D


VCC OE4 OE3 A4 Y4 A3 Y3
8 6 7

14

13

12

11

10

OUTPUT

OUTPUT STAGE

THRESHOLD

COMPARATOR RESET 4 5 CONTROL VOLTAGE

GND

OE1

OE2

A1

Y1

A2

Y2

47

CDP-NW10

IC Pin Function Description CD SERVO BOARD IC101 CXP84632 (MICRO CONTROLLER) Pin No. 1 to 4 5 6 7 8 9 to 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27, 28 29 30 31 32 33 34, 35 36 37 38 39 40 41 to 50 51 52 53 54, 55 56 57 58, 59 60, 61 62 63, 64 65 to 71 72, 73 74 to 80 Pin Name NC VSS FDK GFK SENSE NC SCLK XRST DSP_MUTE LDRW XLAT LDON CLOK DATA NC SYS-CLK SYS-DATA SYS-CS NC CLSW NC EMPHASIS RESET EXTAL XTAL VSS NC VSS AVREF OPEN CLOSE OPSW NC SQCK SQSO NC VSS RE4/RMC VSS NC VSS SCOR VSS NC VDD NC I/O I/O I I O O O O O O O O I I/O I I I I I O O O I O I O I Not used Ground terminal Focus OK signal GFS input from CD DSP Internal status (SENSE) input from CD DSP Not used SENS serial data readout clock output System reset signal output to CD DSP MUTE signal output to CD DSP LDRW signal output to AF AMP Latch pulse signal output to CD DSP LDON signal output to AF AMP Serial data transfer clock signal output to CD DSP Serial data output to CD DSP Not used System clock input from MAIN system controller MAIN system controller data signal Chip select signal input from MAIN system controller Not used CD CLOSE SW input terminal Not used Input a signal when the playback disc has emphasis system reset signal input Crystal input for main clock Crystal output for main clock Ground terminal Not used Ground terminal Power suppy +3.3V Loading motor control signal output Loading motor control signal output CD OPEN SW input terminal Not used SQSO readout clock output to CD DSP Sub-Q 80-bit, PCM peak or level data input from CD DSP Not used Ground terminal IR signal output Ground terminal Not used Ground terminal Subcode data request signal input terminal Ground terminal Not used Power supply +3.3V Not used Description

48

CDP-NW10

MAIN BOARD U1 EP9301-CQZ (CIRRUS) (SYSTEM CONTROLLER) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name CS7 CS6 CS3 CS2 CS1 AD25 VDD_RING GND_RING AD24 SDCLK AD23 VDD_CORE GND_CORE SDWEN SDCSN3 SDCSN2 SDCSN1 SDCSN0 VDD_RING GND_RING RASN CASN DQMN1 DQMN0 AD22 AD21 VDD_RING GND_RING DA15 AD7 DA14 AD6 DA13 VDD_CORE GND_CORE AD5 DA12 AD4 DA11 AD3 VDD_RING GND_RING DA10 AD2 DA9 AD1 DA8 AD0 I/O O O O O O O O O O O O O O O O O O O O O I/O O I/O O I/O O I/O O I/O O I/O O I/O O I/O O Chip select signal output (not used) FLASH MEMORY chip select signal output Chip select signal output (not used) Chip select signal output (not used) Chip select signal output (not used) Shared address bus out (not used) Power supply +3.3V Ground terminal Shared address bus out (not used) SDRAM clock out Shared address bus out Power supply +1.8V Ground terminal SDRAM write enable out SDRAM chip selects out SDRAM chip selects out (not used) SDRAM chip selects out (not used) SDRAM chip selects out (not used) Power supply +3.3V Ground terminal SDRAM RAS out SDRAM CAS out Shared data mask out Shared data mask out Shared address bus out Shared address bus out Power supply +3.3V Ground terminal Shared data bus in/out Shared address bus out Shared data bus in/out Shared address bus out Shared data bus in/out Power supply +1.8V Ground terminal Shared address bus out Shared data bus in/out Shared address bus out Shared data bus in/out Shared address bus out Power supply +3.3V Ground terminal Shared data bus in/out Shared address bus out Shared data bus in/out Shared address bus out Shared data bus in/out Shared address bus out Description

49

CDP-NW10

Pin No. 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97

Pin Name VDD_RING GND_RING NC NC VDD_RING GND_RING AD15 DA7 VDD_CORE GND_RING AD14 DA6 AD13 DA5 AD12 DA4 AD11 VDD_RING GND_RING DA3 AD10 DA2 AD9 DA1 AD8 DA0 DSRN DTRN TCK TDI TDO TMS VDD_RING GND_RING BOOT1 BOOT0 GND_RING NC EECLK EEDAT ASYNC VDD_CORE GND_CORE ASDO SCLK1 SFRM1 SSPRX1 SSPTX1 GRLED

I/O O I/O O I/O O I/O O I/O O I/O O I/O O I/O O I/O O O I I O I I I O O I O I/O I/O I/O I/O O Power supply +3.3V Ground terminal Not used Not used Power supply +3.3V Ground terminal Shared address bus out Shared data bus in/out Power supply +1.8V Ground terminal Shared address bus out Shared data bus in/out Shared address bus out Shared data bus in/out Shared address bus out Shared data bus in/out Shared address bus out Power supply +3.3V Ground terminal Shared data bus in/out Shared address bus out Shared data bus in/out Shared address bus out Shared data bus in/out Shared address bus out Shared data bus in/out

Description

Data set ready/data carrier detect (not used) Data terminal ready out JTAG clock in JTAG data in JTAG data out JTAG test mode select Power supply +3.3V Ground terminal Boot mode select in (not used) Boot mode select in (not used) Ground terminal Not used Two-wire interface clock output Two-wire interface data output Frame clock LRCK input Power supply +1.8V Ground terminal Transmit data output SPI bit clock (not used) SPI frame (not used) SPI input (not used) SPI output (not used) Green LED drive signal output

50

CDP-NW10

Pin No. 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146

Pin Name RDLED VDD_RING GND_RING INT3 INT1 INT0 RTSN USBM0 USBP0 ABITCLK CTSN RXD0 RXD1 VDD_RING GND_RING TXD0 TXD1 CGPIO0 GND_CORE PLL_GND XTALI XTALO PLL_VDD VDD_CORE GND_RING VDD_RING RSTON PRSTN CS0 GND_CORE VDD_CORE GND_RING VDD_RING ADC 4 ADC 3 ADC 2 ADC 1 ADC 0 ADC_VDD RTCXTALI RTCXTALO ADC_GND EGPIO11 EGPIO10 EGPIO09 EGPIO08 EGPIO07 EGPIO06 EGPIO05

I/O O I I I O I/O I/O I O I O O I O I O I I O O O O O O I O O O O O I O O Red LED drive signal output Power supply +3.3V Ground terminal IR remote signal input Interrupt signal input Remote control signal input Ready to send signal output USB negative signals (not used) USB positive signals (not used) Bit clock input Send / transmit enable (not used) Receive signal in Receive / IrDA output Power supply +3.3V Ground terminal Transmit signal output Transmit / IrDA input IR remote signal output Ground terminal PLL ground terminal Main oscillator input Main oscillator output Main oscillator power +1.8V Power supply +1.8V Ground terminal Power supply +3.3V Reset signal input Power on reset Chip select signal output (not used) Ground terminal Power supply +1.8V Ground terminal Power supply +3.3V Not used Not used Not used Tuner stereo signal output Tuner tuned signal output Power supply +3.3V RTC oscillator input RTC oscillator output (not used) Ground terminal Tuner SCL signal output LCD CS signal output Monitor child signal output

Description

VIDEO switch control signal output (not used) CDT signal input from DAR CDT signal output to DAR CCLK signal output to DAR

51

CDP-NW10

Pin No. 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195

Pin Name EGPIO04 EGPIO03 GND_RING VDD_RING EGPIO02 EGPIO01 EGPIO00 ARSTN TRSTN ASDI USBM2 USBP2 WAITN EGPIO15 GND_RING VDD_RING EGPIO14 EGPIO13 EGPIO12 GND_CORE VDD_CORE FGPIO3 FGPIO2 FGPIO1 GND_RING VDD_RING CLD CRS TXERR TXEN MIITXD0 MIITXD1 MIITXD2 MIITXD3 TXCLK RXERR RXDVAL MIIRXD0 MIIRXD1 MIIRXD2 GND_RING VDD_RING MIIRXD3 RXCLK MDIO MDC RDN WRN AD16

I/O O O O O O I I I I/O I/O I I O O I I I I O I O O O O O O I I I I I I I I O O O O O CSN signal output to DAR LCD RESET signal output Ground terminal Power supply +3.3V LCD RS signal output LCD CLK signal output LCD DATA signal output Reset signal input JTAG I PD JTAG reset Primary input USB negative signals (not used) USB positive signals (not used) SRAM wait in signal (not used) Key 0 signal input Ground terminal Power supply +3.3V PWM1 output Key scan signal output Tuner SDA signal input Ground terminal Power supply +1.8V Key 2 signal input Key 1 signal input DVDCE signal input Ground terminal Power supply +3.3V Collision detect Carrier sense Transmit error signal output Transmit enable output Transmit data output Transmit data output Transmit data output Transmit data output Transmit clock in PD receive data error in PD receive data valid in Receive data in Receive data in Receive data in Ground terminal Power supply +3.3V Receive data in Receive clock in Management data out Management data clock out Flash memory read / OE strobe out Flash memory write strobe out Shared address bus out

Description

52

CDP-NW10

Pin No. 196 197 198 199 200 201 202 203 204 205 206 207 208

Pin Name AD17 GND_CORE VDD_CORE HGPIO2 HGPIO3 HGPIO4 HGPIO5 GND_RING VDD_RING AD18 AD19 AD20 SDCLKEN

I/O O O O O O O O O O Shared address bus out Ground terminal Power supply +1.8V Cs signal input Key scan signal output Key scan signal output Key scan signal output Ground terminal Power supply +3.3V Shared address bus out Shared address bus out Shared address bus out SDRAM clock enable out

Description

53

CDP-NW10

MAIN BOARD U26 KSZ8721BL (PHYSICAL LAYER TRANSCEIVER) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name MDIO MDC RXD3 RXD2 RXD1 RXD0 VDDIO GND RXDV RXDCLK RXER GND VDDC TXER TXCLK TXEN TXD0 TXD1 TXD2 TXD3 COL/RMII CRS/RMII GND VDDIO INT LED0/TEST LED1/SPD100 LED2/DUPLEX LED3/NWAYEN PD VDDRX RX RX+ FXSD/FXEN GND GND REXT VDDRCV GND TX TX+ VDDTX GND GND XO XI VDDPLL RST I/O I/O I O O O O O O O I O I I I I I O O O O O O O I I I I O O O I I MII clock input MII receive data output MII receive data output MII receive data output MII receive data output Digital IO 2.5 /3.3V tolerant power supply Ground terminal MII receive data valid output MII receive clock output MII receive error output Ground terminal Digital core 2.5V only power supply MII transmit error input MII transmit clock output MII transmit enable input MII transmit data input MII transmit data input MII transmit data input MII transmit data input MII collision detect output MII carrier sense output Ground terminal Digital IO 2.5/3.3V tolerant power supply Management interface (MII) interrupt out Link/Activity LED output Speed LED output Full-duplex LED output Collision LED output Power down signal input Analog 2.5V power supply Receive input Receive input Fiber mode enable / signal detect in fiber mode (not used) Ground terminal Ground terminal External resistor (6.49kW) connects to REXT and ground Analog 2.5V power supply Ground terminal Transmit outputs Transmit outputs Transmitter 2.5V power supply Ground terminal Ground terminal Xtal feedback Crystal oscillator input Analog pll 2.5V power supply Reset signal input Description Management independent interface (MII) data input/output

54

CDP-NW10

CD AMP BOARD U3 TAS5508PAGR (DIGITAL AUDIO PROCESSOR) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name VRA_PLL PLL_FLT_RET PLL_FLTM PLL_FLTP AVSS AVSS_GR VRD_PLL AVSS_PLL AVDD_PLL VBGAP RESET HP_SEL PDN MUTE DVDD DVSS VR_DPLL OSC_CAP XTL_OUT XTL_IN RESERVED RESERVED RESERVED SDA SCL LRCLK SCLK SDIN4 SDIN3 SDIN2 SDIN1 PSVC VR_DIG DVSS DVSS DVDD BKND_ERR DVSS VALID PWM_M_1 PWM_P_1 PWM_M_2 PWM_P_2 PWM_M_3 PWM_P_3 PWM_M_4 PWM_P_4 VR_PWM I/O O O I I I I I I O I I/O I I I I I I I O I O O O O O O O O O PLL external filter return PLL negative output PLL positive input Analog ground Analog ground Voltage reference for PLL digital supply 1.8 V Analog ground for PLL 3.3V analog power supply for PLL Band gap voltage reference System reset input Headphone in/out selector (not used) Power down (not used) Soft mute of input Digital power 3.3V supply for digital core and most of I/O buffers Digital ground for digital core and most of I/O buffers Voltage reference for digital PLL supply 1.8 V Oscillator capacitor Oscillator output Oscillator input Connect to digital ground Connect to digital ground Connect to digital ground I2C serial control data interface input / output I2C serial control clock input Serial audio data Serial audio data clock (shift clock) SCLKIN Serial audio data 4 input (not used) Serial audio data 3 input (not used) Serial audio data 2 input (not used) Serial audio data 1 input Power supply volume control PWM output (not used) Voltage reference for digital core supply 1.8 V Digital ground Digital ground 3.3V digital power supply A backend error sequence Digital ground Output indicating validity of PWM outputs active high PWM 1 output (differential ) PWM 1 output (differential +) PWM 2 output (differential ) PWM 2 output (differential +) PWM 3 output (differential ) PWM 3 output (differential +) PWM 4 output (differential ) PWM 4 output (differential +) Voltage reference for digital PWM core supply 1.8 V Description Voltage reference for PLL analog supply 1.8 V

55

CDP-NW10

Pin No. 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

Pin Name PWM_M_7 PWM_P_7 PWM_M_8 PWM_P_8 DVSS_PWM DVDD_PWM PWM_M_5 PWM_P_5 PWM_M_6 PWM_P_6 PWM_HPML PWM_HPPL PWM_HPMR PWM_HPPR MCLK RESERVED

I/O O O O O O O O O O O O O I

Description PWM 7 (Line out L) output (differential ) (not used) PWM 7 (Line out L) output (differential +) (not used) PWM 8 (Line out R) output (differential ) (not used) PWM 8 (Line out R) output (differential +) (not used) Digital ground for PWM 3.3V digital power supply for PWM PWM 5 output (differential ) (not used) PWM 5 output (differential +) (not used) PWM 6 output (differential ) (not used) PWM 6 output (differential +) (not used) PWM left channel headphone (differential ) (not used) PWM left channel headphone (differential +) (not used) PWM right channel headphone (differential ) (not used) PWM right channel headphone (differential +) (not used) MCLK is a 3.3V clock master clock input Connect to digital ground

56

CDP-NW10

CD AMP BOARD U4 TAS5112DFDR (DIGITAL AUDIO AMPLIFIER) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name GND GND GREG OTW SD_CD SD_AB PWM_DP PWM_DM RESET_CD PWM_CM PWM_CP DREG_RTN M3 M2 M1 DREG PWM_BP PWM_BM RESET_AB PWM_AM PWM_AP GND DGND GND DVDD GREG GND GND GND GVDD BST_A PVDD_A PVDD_A OUT_A OUT_A GND GND OUT_B OUT_B PVDD_B PVDD_B BST_B BST_C PVDD_C PVDD_C OUT_C OUT_C GND I/O O O O I I I I I I I I I I I I I O O O O O O Power ground Power ground Gate drive voltage regulator decoupling pin Overtemperature warning output Shutdown signal for half-bridges C and D Shutdown signal for half-bridges A and B Input signal (positive), half-bridge D Input signal (negative), half-bridge D Reset signal Input signal (negative), half-bridge C Input signal (positive), half-bridge C Digital supply voltage regulator decoupling return pin Mode selection pin Mode selection pin Mode selection pin Digital supply voltage regulator decoupling pin Input signal (positive), half-bridge B Input signal (negative), half-bridge B Reset signal Input signal (negative), half-bridge A Input signal (positive), half-bridge A Power ground Digital I/O reference ground Power ground I/O reference supply input (3.3 V) Gate drive voltage regulator decoupling pin Power ground Power ground Power ground Digital supply voltage regulators External capacitor to OUT_A required Power supply input for half-bridge A Power supply input for half-bridge A Output, half-bridge A Output, half-bridge A Power ground Power ground Output, half-bridge B Output, half-bridge B Power supply input for half-bridge B Power supply input for half-bridge B External capacitor to OUT_B required External capacitor to OUT_C required Power supply input for half-bridge C Power supply input for half-bridge C Output, half-bridge C Output, half-bridge C Power ground Description

57

CDP-NW10

Pin No. 49 50 51 52 53 54 55 56

Pin Name GND OUT_D OUT_D PVDD_D PVDD_D BST_D GVDD GND

I/O O O Power ground Output, half-bridge D Output, half-bridge D Power supply input for half-bridge D Power supply input for half-bridge D

Description

External capacitor to OUT_D required Digital supply voltage regulators Power ground

58

CDP-NW10

CD AMP BOARD U501 ATMGA32L-8AU (CPU) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Pin Name PB5 (MOSI) PB6 (MISO) PB7 (SCK) RESET VCC GND XTAL2 XTAL1 PD0 (RXD) PD1 (TXD) PD2 (INT0) PD3 (INT1) PD4 (OC1B) PD5 (OC1A) PD6 (ICP) PD7 (OC2) VCC GND PC0 (SCL) PC1 (SDA) PC2 (TMS) PC3 (TCK) PC4 (TDO) PC5 (TDI) PC6 (TOSC1) PC7 (TOSC2) AVCC GND AREF PA7 (ADC7) PA6 (ADC6) PA5 (ADC5) PA4 (ADC4) PA3 (ADC3) PA2 (ADC2) PA1 (ADC1) PA0 (ADC0) VCC GND PB0 (TCK/T0) PB1 (T1) PB2 (AIN0/INT2) PB3 (AIN1/OC0) PB4 (SS) I/O O I O I O I I O O I I O O O I/O I/O I I/O O I I/O I/O I/O I/O I/O O O I O O O I/O O I/O O Description Serial SPI data output pin for DSP control (not used) Serial SPI data input pin for DSP control (not used) Serial SPI clock pin for DSP control (not used) Reset signal input (connected to VCC) Power supply +3.3V Ground terminal Output from the inverting oscillator amplifier Input to the inverting oscillator amplifier UART input pin for communicate with ARM UART output pin for communicate with ARM 5508 mute control Back end error detect pin (external interrupt pin) Connected to vcc Reset signal output Not used PWM output for front LCD back light Power supply +3.3V Ground terminal I2C clock pin for 5508 control I2C data pin for 5508 control Speaker shut down detect pin Not used Test mode pin for mass product (not used) Test mode pin for mass product (not used) Not used Not used Power supply +3.3V Ground terminal Power supply +3.3V Not used Not used Not used Intercom mode control pin Not used Not used Not used Not used Power supply +3.3V Ground terminal Not used Not used Not used Not used Serial SPI select pin for DSP control (not used)

59

CDP-NW10 SECTION 7 EXPLODED VIEWS


NOTE: -XX and -X mean standardized parts, so they may have some difference from the original one. Items marked * are not stocked since they are seldom required for routine service. Some delay should be anticipated when ordering these items. The mechanical parts with no reference number in the exploded views are not supplied. The components identified by mark 0 or dotted line with mark 0 are critical for safety. Replace only with part number specified.

11

7-1.

OVERALL SECTION

15 14
not supplied

4 16
not supplied

19

not supplied

14 19

18

13 12
not supplied

17
a

10
a

not supplied

motor assy

10
main kit assy

10

5 7 8
Ref. No. 01 2 3 4 5 6 7 8 9 10 Part No. 9-885-082-76 9-885-082-54 9-885-082-52 9-885-082-41 9-885-082-75 9-885-098-23 9-885-082-43 9-885-082-44 9-885-082-14 9-885-082-45 Description CD MECHA ASSY (DA23ZPH) DAMPER C DAMPER SCREW C SCREW TAPPING (M2.0X6, PAN) CD SERVO BOARD, COMPLETE SPEAKER 30-8AB-05N SCREW TAPPING (M2.6X8, PAN) SCREW TAPPING (M3.0X8, PAN) DOOR PLATE SCREW TAPPING (M3.0X10, PAN) Remark Ref. No. 11 12 13 14 15 16 17 18 19 Part No. 9-885-082-18 9-885-082-62 9-885-082-67 9-885-082-51 9-885-082-19 9-885-082-15 9-885-082-13 9-885-082-48 9-885-082-16 Description DOOR SLIDE BUSHING FRONT ASSY FRONT BOARD, COMPLETE SCREW SB DOOR SLIDER R DOOR FACIA C FRONT PANEL CD SCREW MACHINE (M2.0X4, CAM) SIDE STRIP Remark

60

CDP-NW10

7-2.

MAIN KIT ASSY


57 57
not supplied

56

51 54 54 55

58

not supplied

53

52

not supplied

51

Ref. No. 51 52 53 54 55

Part No. 9-885-082-44 9-885-082-47 1-693-689-11 3-703-249-22 9-885-082-60

Description SCREW TAPPING (M3.0X8, PAN) SCREW TAPTITE (M3.0X8, PAN) TUNER SCREW, S TIGHT, +PTTWH (M3X8) CD AMP BORAD, COMPLETE

Remark

Ref. No. 56 57 58

Part No.

Description

Remark

9-885-082-59 MAIN BOARD, COMPLETE 3-703-685-02 SCREW (+BV 3X8) 9-885-098-30 FLAT CABLE 0.5-40-250-C

61

CDP-NW10

7-3.

MOTOR ASSY
105 104
not supplied

103 102 102 102

not supplied

SW1

M1

not supplied

101

Ref. No. 101 102 103 104

Part No. 9-885-082-47 3-325-697-01 9-885-082-49 2-599-617-01

Description SCREW TAPTITE (M3.0X8, PAN) WASHER SCREW MACHINE (M2.6X4, PAN) BELT (IW)

Remark

Ref. No. 105 M1 SW1

Part No.

Description

Remark

9-885-082-63 MOTOR ASSY 1-763-810-11 MOTOR, DC (LOADING) 1-786-133-11 SWITCH, ROTARY (OPEN/CLOSE)

62

CDP-NW10 SECTION 8 ELECTRICAL PARTS LIST


NOTE: Due to standardization, replacements in the parts list may be different from the parts specified in the diagrams or the components used on the set. -XX and -X mean standardized parts, so they may have some difference from the original one. RESISTORS All resistors are in ohms. METAL: Metal-film resistor. METAL OXIDE: Metal oxide-film resistor. F: nonflammable CAPACITORS uF: F Ref. No. Part No. Description COILS uH: H Items marked * are not stocked since they are seldom required for routine service. Some delay should be anticipated when ordering these items. SEMICONDUCTORS In each case, u: , for example: uA. . : A. . uPA. . : PA. . uPB. . : PB. . uPC. . : PC. . uPD. . : PD. .

CD AMP CD SERVO FRONT MAIN


When indicating parts by reference number, please include the board name. The components identified by mark 0 or dotted line with mark 0 are critical for safety. Replace only with part number specified. Accessories are given in the last of this parts list.

Remark

Ref. No. S19 S20 S21 S22 S23

Part No.

Description

Remark

9-885-082-60 CD AMP BORAD, COMPLETE *********************** < JACK > J1 J2 1-819-602-11 PIN, CONNECTOR 5P (DC IN) 1-819-601-11 PIN, CONNECTOR 4P (SPEAKERS) < IC > U2 6-706-893-01 IC TPS54350PWPR U3 9-885-098-16 IC TAS5508PAGR U4 9-885-098-19 IC TAS5112DFDR U501 9-885-098-18 IC ATMEGA 32L-8AU ************************************************************* 9-885-082-75 CD SERVO BOARD, COMPLETE ************************* ************************************************************* 9-885-082-67 FRONT BOARD, COMPLETE ********************** 9-885-098-13 LCD DISPLAY SMF0015EDSN < JACK > J4 9-885-098-32 MICROPHONE BOB-S2742MD-P22-4L (MICROPHONE) < SWITCH > S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 9-885-098-21 SWITCH TACT ST-1107MU (?/1) SWITCH TACT ST-1107MU (H) SWITCH TACT ST-1107MU (X) SWITCH TACT ST-1107MU (x) SWITCH TACT ST-1107MU (.) SWITCH TACT ST-1107MU (>) SWITCH TACT ST-1107MU (OPEN/CLOSE) SWITCH TACT ST-1107MU SWITCH TACT ST-1107MU SWITCH TACT ST-1107MU SWITCH TACT ST-1107MU SWITCH TACT ST-1107MU (+VOLUME) SWITCH TACT ST-1107MU (VOLUME) SWITCH TACT ST-1107MU (MUTING) SWITCH TACT ST-1107MU (HOME)

9-885-098-21 SWITCH TACT ST-1107MU (MODE) 9-885-098-21 SWITCH TACT ST-1107MU 9-885-098-21 SWITCH TACT ST-1107MU 9-885-098-21 SWITCH TACT ST-1107MU 9-885-098-21 SWITCH TACT ST-1107MU < IC >

U1 6-600-287-01 IC PIC37041TM2 ************************************************************* 9-885-082-59 MAIN BOARD, COMPLETE ********************* < JACK > J7 J8 J13 J23 9-885-098-27 9-885-098-27 9-885-098-33 9-885-098-20 STEREO JACK BD3.5 (IR IN) STEREO JACK BD3.5 (IR OUT) AUDIO JACK 02GS (LINE IN) ETHERNET JACK P65-P0Z-1AG9 ( < IC > U1 U2 U3 U4 U5 U6 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 U18 U19 U20 U21 U22 U24 U25 U26 U27 9-885-098-14 9-885-098-39 6-705-755-01 9-885-098-15 6-703-214-01 9-885-098-25 9-885-098-25 9-885-098-17 8-759-527-42 9-885-098-36 9-885-098-38 9-885-098-24 6-706-893-01 9-885-098-37 9-885-098-22 9-885-098-25 9-885-098-25 9-885-098-25 9-885-098-28 9-885-098-25 9-885-098-37 9-885-098-38 9-885-098-31 6-706-606-01 9-885-098-25 IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC EP9301-CQZ (CIRRUS) MM74HC00MX_N K4S561632E-UC75T JS28F640J3C115 LM4871MM 74HC126D 74HC126D CS4245-CQZ MAX708CSA MM74HC138MX_NS SN74LVC1G14DBVR TPS77618QDR TPS54350PWPR NC7SPU04-MAC06A AK4117VF-EZ 74HC126D 74HC126D 74HC126D LM1117IDT-ADJ 74HC126D NC7SPU04-MAC06A SN74LVC1G14DBVR NE555DR KSZ8721BL 74HC126D

9-885-098-21 SWITCH TACT ST-1107MU (J) 9-885-098-21 SWITCH TACT ST-1107MU (j) 9-885-098-21 SWITCH TACT ST-1107MU (BACK)

63

CDP-NW10
MAIN
Ref. No. U29 U30 U31 U32 U44

MOTOR
Part No. 9-885-098-26 9-885-098-40 9-885-098-35 9-885-098-34 9-885-098-29 Description IC IC IC IC IC NJM2072M MC74HC1G08DTT1G TC7W66F KIA7032AF/P MC33202DR2G Remark

U45 9-885-098-26 IC NJM2072M ************************************************************* MOTOR BOARD ************ ************************************************************* MISCELLANEOUS ************** 01 9-885-082-76 CD MECHA ASSY (DA23ZPH) 53 1-693-689-11 TUNER 58 9-885-098-30 FLAT CABLE 0.5-40-250-C M1 1-763-810-11 MOTOR, DC (LOADING) SW1 1-786-133-11 SWITCH, ROTARY (OPEN/CLOSE) ************************************************************* ACCESSORIES ************ 1-479-269-11 REMOTE COMMANDER (RM-ANU001) (Including Battery Cover) 1-819-604-11 PIN, CONNECTOR 4P (FOR SPEAKERS) 1-819-605-11 PIN, CONNECTOR 5P (FOR AC POWER UNIT) 2-638-223-01 CD-ROM (NW10/50) 9-885-082-38 MANUAL CD (ENGLISH) 9-885-082-79 SCREW (WALL STOPPER)(LONG) 9-885-082-81 SCREW ACC (SHORT) 9-885-088-26 SCREW (AM ANTENNA)

64

CDP-NW10

MEMO

65

CDP-NW10

REVISION HISTORY
Clicking the version allows you to jump to the revised page. Also, clicking the version at the upper right on the revised page allows you to jump to the next revised page. Ver. 1.0 1.1 Date 2005.05 2005.12 New Addition of Note and SECTION 1 to SECTION 8
(SPM-05087)

Description of Revision

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