Article
Efficiency Improvement of a Cascaded Buck and Boost
Converter for Fuel Cell Hybrid Vehicles with Overlapping
Input and Output Voltages
Noass Kunstbergs 1 , Hartmut Hinz 1 *, Nigel Schofield2 , Dennis Roll 1
Citation: Lastname, F.; Lastname, F.;
Lastname, F. Title. Journal Not Specified
2022, 1, 0. https://doi.org/
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Version August 1, 2022 submitted to Journal Not Specified
1 Faculty of Computer Science and Engineering, Frankfurt University of Applied Sciences, Frankfurt am Main
60318, Germany; hhinz@fb2.fra-uas.de; dennis.roll@fb2.fra-uas.de
2 Department of Engineering and Technology, University of Huddersfield, Huddersfield HD1 3DH, United
Kingdom; n.schofield@hud.ac.uk
* Correspondence: hhinz@fb2.fra-uas.de
Abstract: Fuel cell hybrid vehicles represent an alternative to battery electric vehicles and will gain 1
importance in the future as they do not need large battery capacities and thus require less critical 2
raw materials. Depending on the electric architecture, the voltage of the fuel cell stack and traction 3
battery may overlap. Accordingly, it is necessary to use a bidirectional DC-DC converter that connects 4
the battery to the DC bus, which supports overlapping in- and output voltages. Furthermore, 5
these converters should be non-isolating in terms of compact design. Concerning complexity and 6
controllability, the bidirectional cascaded buck and boost converter is preferable and is the subject of 7
this study. Published literature present the bidirectional cascaded buck and boost converter with high 8
losses for overlapping in- and output voltages, introducing two methods for this operation mode. 9
The method selected for this study, namely buck+boost, uses two switches, whereby one switch has 10
a fixed duty cycle. However, there is no appropriate investigation to determine the impact of this 11
fixed duty cycle on converter efficiency to date. Furthermore, efficiency improvement is possible by 12
switching frequency modulation, but current literature does not address this modulation method for 13
overlapping in- and output voltages. Therefore, this paper investigates a non-isolated hard-switched 14
bidirectional cascaded buck and boost converter for fuel cell hybrid vehicles operating with up to 15
19.8 kW. The study focuses on determining the optimum fixed duty cycle and efficiency optimisation 16
through a novel critical conduction mode with adapted switching frequency by utilising the load- 17
dependent inductance of the inductor with powder cores. Measurements with an experimental 18
setup validate the proposed modulation method with Si-IGBT half-bridge modules. The results 19
demonstrate that a loss reduction of 39% is possible with switching frequency modulation and the 20
optimum duty cycle compared to fixed switching frequency. As a result, the converter achieves high 21
efficiencies of up to 99% and low device junction temperatures. 22
Keywords: Buck+boost; DC-DC converter; Fuel cell hybrid vehicles; Switching frequency modulation 23
1. Introduction 24
The electrification of the powertrain is a promising solution for a sustainable and 25
environmentally friendly transport system [1]. Furthermore, electromobility represents an 26
essential contribution to climate protection, and renewable energies in the transport sector 27
[2]. For this reason, automobile manufacturers are increasingly offering battery electric 28
vehicles (BEVs) on the market. In the electric architecture of BEVs, the battery is the only 29
energy source for the electric drive; its operating voltage is typically below the DC bus 30
to which the traction inverter is connected. Thus, a bidirectional buck-boost converter 31
connects the battery to the DC bus. Furthermore, fuel cell-based electromobility will also 32
contribute to an environmentally friendly transport system. Studies indicate that 17% of 33
the annually sold vehicles will be fuel cell-based starting in 2050 [3]—for example, the fuel 34
https://www.mdpi.com/journal/notspecified
Version August 1, 2022 submitted to Journal Not Specified 2 of 18

cell hybrid vehicle (FCHV). FCHVs use a battery as a second energy source in addition 35

to the fuel cell, providing peak power for dynamic load reduction on the fuel cell system 36

[4,5]. This battery support is essential during acceleration and cold starts. Figure 1 shows 37

the polarization curve of a proton-exchange membrane fuel cell (PEMFC) with its losses 38

typically used in automotive applications. The cell voltage is load-dependent due to the 39

reaction rate loss, resistance loss, and gas transport loss. 40

1 0.7

Power output per cell, Pc [W cm2]

0.9 Vc Reaction rate loss Peak power
Average voltage per cell, Vc [V ]

0.63
0.8 0.56
0.7 0.47
0.6 Resistance loss 0.42
0.5 0.35
0.4 Gas transport loss 0.28
0.3 0.21
0.2 0.14
0.1 Pc Typical operating range 0.07
0 0.2 0.4 0.6 0.8 1 1.2 1.4
Current density, J [A/cm2]
Figure 1. Output voltage of a PEMFC as a function of the current density, data according to [6].

Two electric architectures in FCHVs are of interest for future applications. Figure 2a 41

illustrates the system in which a boost converter connects the fuel cell to the DC bus [5,7]. 42

The motor interfaces the DC bus via a bidirectional AC-DC converter. In addition, this 43

architecture uses a bidirectional buck-boost converter in front of the battery. Figure 2b 44

illustrates an alternative solution, where the output terminals of the fuel cell are connected 45

directly to the DC bus [5,7]. However, depending on the state of charge of the battery and 46

the load-dependent fuel cell voltage (see the typical operating range in Figure 1), both 47

voltage levels can overlap. For this reason, a bidirectional DC-DC converter is necessary, 48

interfacing both voltage characteristics to enable good cold-start behaviour, flexible power 49

control, regenerative braking, and to avoid dynamic current stress of the fuel cell stack 50

by providing additional traction power during acceleration [8–10]. For these reasons, 51

optimising the bidirectional DC-DC converters in front of the battery is essential for vehicle 52

performance. Basically, three topologies are suitable, the bidirectional CúK, SEPIC/ZETA, 53

and cascaded buck and boost converter. Nevertheless, a previous study demonstrates that 54

in terms of electric stress on the power semiconductors, the resulting losses, and converter 55

volume, the cascaded buck and boost converter is the appropriate topology for FCHVs [11]. 56

Fuel Cell Drive power Fuel Cell Drive power

System DC/DC AC/DC Motor System AC/DC Motor
= = =
FC Vfc
=
Vdc
~
M FC Vfc Vdc
~
M
Charging = Boost Charging = Boost
= =
Vbat Recuperation Vbat Recuperation

Battery Battery

(a) Eletric archtiecture with a boost converter for the fuel (b) Eletric archtiecture without a boost converter for the
cell system. fuel cell system.

Figure 2. Electric architectures for FCHVs.

Version August 1, 2022 submitted to Journal Not Specified 3 of 18

Published literature introduces two modulation modes for overlapping in- and output 57

voltages with the bidirectional cascaded buck and boost converter: The buck-boost and 58

buck+boost modes. The subsequent section will quantify these modulation methods in 59

detail. However, to summarise, the buck-boost mode uses four switches; in contrast, 60

the buck+boost mode only uses two. Furthermore, the buck+boost mode operates with 61

two duty cycles. One of these duty cycles needs to be constant. The literature does not 62

sufficiently discuss the optimisation of the operation mode with overlapping in- and output 63

voltages. Instead, authors frequently introduce soft-switching concepts for efficiency 64

improvement [12]. However, the efficiency improvement does not justify the increase 65

in converter volume due to the additional snubber circuits. Moreover, the literature 66

recommends the buck-boost mode, although this operation mode considerably reduces 67

efficiency over the entire power range [14]. 68

The poor efficiency of the buck-boost mode is also demonstrated in [12]. The study in 69

[12] introduces a buck-boost + LLC cascaded 1.12 kW converter using the dual-frequency 70

PEM method. Furthermore, the authors investigate zero voltage switching (ZVS) and 71

zero current switching (ZCS). Nonetheless, they achieve poor efficiencies of around 92% 72

for the buck-boost mode. The study results in [13] confirm this statement. The 100 W 73

bidirectional cascaded buck and boost converter in [13] does not exceed an efficiency of 95% 74

at any operation point. Furthermore, the authors demonstrate efficiency improvement with 75

GaN power semiconductors compared to Si power semiconductors using soft switching. 76

However, the converter achieves a low power density of 0.5 kW/L, using a switching 77

frequency of 10 MHz. In addition, the authors are not investigating the operation for over- 78

lapping in- and output voltages. Also, [14] mentions the buck-boost mode’s disadvantages: 79

High current ripples on the inductor and poor converter efficiency. The paper presents a 80

hybrid buck-boost feedforward control method for a maximum power of 2.25 kW. Another 81

example of poor converter efficiency is [15]. The converter only achieves an efficiency of 82

93%. The authors focused on buck and boost mode transition for a 120 W bidirectional 83

cascaded buck and boost converter. 84

This article will prove that using hard switching devices in buck+boost mode and the 85

optimum fixed duty cycle and a simple modulation method can decrease power losses 86

by up to 39% for overlapping in- and output voltages. Unlike in [12] or [15], the results 87

will prove soft-switching is unnecessary for optimisation. Furthermore, in contrast to 88

[13], this article will prove that optimising converter efficiency with Si-IGBTs half-bridge 89

modules is possible. Finally, the suggested approach eliminates the drawback of [14] of 90

high computational effort and high current ripples due to its simplicity. 91

A method for efficiency optimisation is switching frequency modulation, for example, 92

by increasing the switching frequency to operate in critical conduction mode (CrCM). The 93

CrCM is the boundary limit between continuous conduction mode (CCM) and discontin- 94

uous conduction mode (DCM). Another approach is to adjust the switching frequency 95

until reaching the efficiency maximum depending on the operating point. Generally, a 96

DC-DC converter has two main power loss contributors: The power semiconductors and 97

the inductor. By increasing the switching frequency, the switching losses of the power 98

semiconductor will rise. However, losses of the inductor will decrease as higher switch- 99

ing frequencies reduce the current ripple and the AC flux density. Therefore, a critical 100

requirement for switching frequency modulation is the percentage power distribution of 101

the DC-DC converter. Authors in published literature introduce CrCM approaches for 102

DC-DC converters in the power range below 10 kW. However, for such low power ranges, 103

the power losses of the power semiconductors approximately match the power losses of 104

the DC inductor. 105

An example for this modulation method would be the study according to [16] in which 106

the authors operate the buck-boost mode with a fixed switching frequency 107

(20 kHz) and with switching frequency modulation (20 kHz - 100 kHz) in CrCM. The 108

results demonstrate poor efficiencies below 95% for P ≤ Pmax · 0.2 (light-load operation). 109

The reason for this poor efficiency is that the converter operates with high switching fre- 110
Version August 1, 2022 submitted to Journal Not Specified 4 of 18

quencies in light-load to avoid DCM. Another study presents an algorithm for the control 111

unit to adjust the switching frequency according to a calculated loss minimum depending 112

on the output power [17]. However, this approach has a high computational effort as 113

the algorithm calculates the switching frequency according to power loss models with 114

eight equations and several dynamic parameters. Moreover, the study does not investigate 115

the operation mode with overlapping in- and output voltages. The authors of the paper 116

[18] also investigate switching frequency modulation to enhance efficiency. The proposed 117

approach consists of an algorithm that adjusts the switching frequency according to power 118

loss measurements. However, such power measurements result in computational effort. In 119

addition, the converter is not avoiding DCM and operates with a maximum output power 120

of 3.6 W. 121

References [19,20] analyse converters for power factor correction in CrCM. The results 122

of these studies demonstrate a significant reduction in turn-on switching losses of the 123

power semiconductors—however, the total switching losses increases. As shown in [19,20], 124

the control unit requires high switching frequencies to avoid DCM. Indeed, the converter 125

topologies for power factor correction are irrelevant for the application of this article. 126

Nevertheless, the results prove the potential due to the turn-on of the transistors at the 127

boundary limit of 0 A. A similar approach is shown in [21] where the authors propose 128

a CrCM control method for a boost converter. With additional hardware, the approach 129

enables current-mirroring sensing with GaN transistors. The setup triggers the turn-on of 130

the transistors as soon as reaching the boundary limit. Operating at the boundary limit, 131

hence in CrCM, also reduces reverse recovery losses of diodes, which is confirmed by 132

[22]. In [22], the authors propose a control method that increases switching frequency for 133

CrCM, similar to [19,20]. Consequently, the results of [22] show that increasing switching 134

frequency in light-load for CrCM causes electromagnetic interference (EMI). Therefore, the 135

authors in [22] propose an approach to reduce input current harmonic values for a 120 W 136

prototype converter. The reason for EMI in CrCM in [22] is the high switching frequency to 137

avoid DCM. In [22] the switching frequency in light-load is higher than in full-load by a 138

factor of 5. As a result, the approach achieves poor efficiencies. 139

A study comparable to this article is [23], where the authors analyse different control 140

methods for the bidirectional cascaded buck and boost converter for hybrid electric vehicles 141

and up to 30 kW in a simulation environment. However, by operating with CrCM, the 142

converter in [23] achieves a maximum converter efficiency of approximately 97%. 143

This study aims to improve the efficiency of the bidirectional cascaded buck and boost 144

converter for operation with overlapping in- and output voltages using the buck+boost 145

mode. For this reason, this paper investigates the resulting problem of high current ripples 146

and the impact of the fixed duty cycle on converter losses. This article introduces a novel 147

load-dependent switching frequency modulation for efficiency optimisation, namely the 148

critical conduction mode with adapted switching frequency (CrCMASF). The investigation 149

exemplifies that the introduced modulation method ensures CCM using powder cores 150

for the inductor with a current-dependent inductance. The findings are validated by 151

measurements on an experimental setup and reveal that the proposed duty cycle and 152

modulation method enable converter efficiencies of up to 99%. Furthermore, measurements 153

demonstrate that the introduced approach decreases the junction temperature of the power 154

semiconductors significantly. The results of this article will prove that the suggested 155

approach will decrease computational effort considerably compared to [17] or [18]. The 156

novel method will only use one equation with one dynamic parameter, which is the current 157

dependent inductance of the inductor. Furthermore, no additional hardware is necessary 158

compared to [21]. In addition, in contrast to [22], the proposed method will decrease 159

switching frequency in light-load. Therefore, this paper will demonstrate that by CrCMASF, 160

EMI will not deteriorate. Finally, compared to [23] and [16], the proposed modulation 161

method enables high efficiencies for the entire power range. 162
Version August 1, 2022 submitted to Journal Not Specified 5 of 18

2. PWM Control Methods 163

Figure 3 depicts the non-isolated hard-switched bidirectional cascaded buck and boost 164

converter (hereinafter referred as converter). This converter is the anti-parallel combination 165

of a buck- and boost converter (half-bridge) with a connected second-order low-pass filter. 166

The half-bridge configuration enables the current to flow in both directions with positive 167

in- and output voltages using anti-parallel diodes. According to the circuit in Figure 3, the 168

converter operates in buck mode by controlling S1 or S3 and in boost mode by controlling 169

S2 or S4 . The diodes D1 , D2 , D3 , and D4 act as freewheeling diodes accordingly. The 170

converter allows the output voltage to be higher, lower, or equal to the input voltage. 171

𝑖𝑜
+ 𝑖1 𝑖3 +

𝐷1 𝐷3
𝑆1 𝑆3

𝐶1 𝑖𝐿 𝐿 𝐶2
𝑉𝑑𝑐 𝑉𝑏𝑎𝑡
𝑣𝐿
𝐷2 𝐷4
𝑆2 𝑆4

𝑖2 𝑖4
− −
Figure 3. Non-Isolated Hard-Switched Bidirectional Cascaded Buck and Boost converter.

Table 1 summarises the control of the transistors to operate in the respective mode. The 172

converter can operate in buck, boost, buck-boost, or buck+boost mode; Power flow from 173

the DC bus to the battery or vice versa is possible for all operation modes. For convenience, 174

this study assumes a power flow from the DC bus to the battery for further discussion. The 175

following section analyses the operation mode with overlapping in- and output voltages 176

(Vdc ≈ Vbat ). Literature introduces two options for power transfer. Figure 4 illustrates the 177

current i L through inductance L for switches S1 to S4 for the first method. In this method, 178

called buck-boost, switches S1 and S4 are switched simultaneously with a duty cycle γ1,4 , 179

while switches S2 and S3 are switched simultaneously with a duty cycle γ2,3 . Figure 4 180

indicates that this method ensures that the average value of the inductor current i L is 181

composed of the sum of the converter currents i1 , i4 and i2 , i3 , which represent the in- and 182

output currents of the converter [24]. This property is a disadvantage as the cores of the 183

inductor with the inductance L would need a high DC bias compatibility, especially in the 184

Table 1. Operation modes for the converter, with controlled (c), off, and on for the switches.

Voltage Power
Mode S1 S2 S3 S4
ratio flow
Vdc > Vbat DC → Bat buck c off off off
Vdc ≈ Vbat DC → Bat buck+boost c off off c
Vdc ≈ Vbat DC → Bat buck-boost c c c c
Vdc < Vbat DC → Bat boost on off off c
Vdc < Vbat DC ← Bat buck off off c off
Vdc ≈ Vbat DC ← Bat buck+boost off c c off
Vdc ≈ Vbat DC ← Bat buck-boost c c c c
Vdc > Vbat DC ← Bat boost off c on off
Version August 1, 2022 submitted to Journal Not Specified 6 of 18

high power range and for applications such as FCHVs where high currents are possible. 185

As a result, the volume would increase considerably [5]. Moreover, in order to ensure that 186

the inductor voltage v L on its average is zero, the duty cycles γ1,4 and γ2,3 must be 0.5 for 187

equal voltage on the in- and output, as otherwise the current will rise to infinity. However, 188

these fixed duty cycles cause high current ripples ∆i L , which increase the current stress on 189

the switches, as shown in Figure 4. The current stress results in considerable losses in the 190

inductor and all switches. 191

Switch current 𝑖𝑠2 and 𝑖𝑠3 Switch current 𝑖𝑠1 and 𝑖𝑠4

𝑉𝑑𝑐
𝑣𝐿
−𝑉𝑏𝑎𝑡
𝑖𝐿
𝐼𝑑𝑐 + 𝐼𝑏𝑎𝑡

𝑣𝑔1,4 On

𝑣𝑔2,3 Off

Figure 4. Characteristic of the inductor current and voltage in buck-boost mode.

The buck+boost mode in Figure 5 eliminates these drawbacks as it only uses two 192

switches, switch S1 and switch S4 . One half of the converter in Figure 3 operates as a buck 193

converter, the other half as a boost converter. Thus, for switch S1 , a fixed duty cycle γ1 194

is specified for buck mode, while switch S4 uses a variable duty cycle γ4 in boost mode. 195

It can be seen in Figure 5 that by using one half of the topology as a buck and the other 196

half as a boost converter, the inductor is energised and de-energised simultaneously after 197

the rise time of the inductor current i L . The average inductor current equals the output 198

current; in this case, the battery current ibat . Because of the characteristic of inductor voltage 199

v L , the buck+boost mode can significantly reduce the current ripple ∆i L compared to the 200

buck-boost mode [25]. Thus, for buck+boost mode, if the duty cycle γ1 of switch S1 is 201

assumed to be constant, the duty cycle γ4 for switch S4 is according to Equation (1) with 202

the input voltage Vi and output voltage Vo : 203

γ1 · Vi
γ4 = 1 − (1)
Vo

However, the question of how exactly the fixed duty cycle γ1 with an appropriate tran- 204

sition should be determined remains. Reference [26] confirms this statement as literature to 205

date does not address this topic adequately with regard to converter efficiency, and there is 206

no appropriate investigation regarding the optimum fixed duty cycle γ1 [27–29]. The duty 207

cycle γ1 for switch S1 depends on the hysteresis, the range at which the converter should 208

operate in buck and boost mode. This range is necessary to ensure a smooth transition 209

between the operation modes and considers the voltage ripple on the DC bus, as shown in 210

Figure 6 with a transition of 5%. Voltage ripples on the DC bus are typically around 10% 211

of the DC component [30]. Therefore, it is reasonable to assume a reduction of the input 212

voltage for the buck part with a duty cycle between 0.8 and 0.95, with sufficient in- and 213

output capacitance for voltage stabilisation. The current ripple ∆i L is according to Equation 214
Version August 1, 2022 submitted to Journal Not Specified 7 of 18

Equivalent inductor Equivalent inductor

current for buck mode current for boost mode

𝑉𝑑𝑐 𝑉𝑑𝑐 − 𝑉𝑏𝑎𝑡

𝑣𝐿
𝑉𝑏𝑎𝑡
𝑖𝐿 𝐼𝑏𝑎𝑡

𝑣𝑔1 On

𝑣𝑔4 Off

Figure 5. Characteristic of the inductor current and voltage in buck+boost mode.

(2) for both buck-boost and buck+boost mode with the current dependent inductance L( IL ) 215

and switching frequency f s : 216

Vi · (1 − γ1 ) · γ1
∆IL = (2)
(1 − γ4 ) · L( IL ) · f s

From Equation (2), it is evident that for the buck-boost mode, the current ripple ∆i L is 217

way higher for equal in- and output voltages, as both duty cycles are 0.5. 218

The experimental setup uses parameters for validation according to the investigation 219

in [31]. The authors in [31] assume an electric vehicle with approximately one-ton mass 220

and a maximum DC bus current of 480 A. Generally, the maximum motor power in FCHVs 221

is supplied 70% by the fuel cell stack and 30% by the battery [25]. The study in [31] uses a 222

DC bus voltage of 300 V and a maximum power of 144 kW. Increasing the DC bus voltage 223

(e.g. 500 V) decreases the maximum current. Therefore, according to the data of the FCHVs 224

Hyundai Nexo and Honda Clarity Fuel Cell and the results of [31], this article uses the 225

following parameters for the experimental setup. 226

• Maximum converter power in buck+boost mode, Pmax = 19.8 kW 227

• DC bus voltage range, Vdc = 330V − 500 V 228

• Battery voltage range, Vbat = 240V − 346 V 229

• Maximum converter current in buck+boost mode, Imax = 60 A 230

• Maximum current ripple, ∆IL,max ≈ 31.2 A 231

• In- and output capacitance, Ci = Co = 200 µF 232

• Inductance, L(60A) ≈ 222 µH 233

𝑉𝑑𝑐 [V] 𝑉𝑏𝑎𝑡 [V]

500

Buck Buck+Boost

346
330

Boost
~5% transition
240
200

Figure 6. Mode selection for the bidirectional cascaded buck and boost converter.
Version August 1, 2022 submitted to Journal Not Specified 8 of 18

3. Critical Conduction Mode with Adapted Switching Frequency (CrCMASF) 234

A common method to decrease converter losses is to adjust the switching frequency f s 235

depending on the load. DC-DC converters include DC inductors designed for a specified 236

maximum current ripple ∆i L,max . Authors in published literature adjust the switching 237

frequency depending on the load until reaching efficiency maximum, as shown in [32]. 238

However, in the mid-kW range, realising switching frequency modulation is challeng- 239

ing since the inductor usually consists of ferrite cores with low saturation flux densities 240

(0.3 - 0.4 T) with almost constant inductance over the entire power range [33,34]. 241

So far, no research has been published for the converter topology shown in Figure 3 in 242

the relevant power range with respect to the application of switching frequency modulation 243

for the buck+boost mode. Semiconductor switching losses dominate converter losses for 244

the power range of interest using Si-IGBTs. For this reason, it is necessary to reduce the 245

switching frequency to improve efficiency. However, at low switching frequencies, the 246

current ripple ∆i L increases significantly, which in turn causes the AC flux density to 247

rise, resulting in high losses on the magnetic cores. Consequently, the risk of reaching 248

saturation is high. Moreover, the DC-DC converter could reach the DCM, and in terms 249

of controller design, DCM should always be avoided. Solving these issues is possible by 250

using powder cores with soft saturation characteristics and high saturation flux densities 251

(0.5 - 1.5 T) [33,34]. The dependence of the powder cores inductance on the output current 252

is due to the DC magnetising force-dependent permeability [35]. The aim is to operate 253

in CrCM by adapting the switching frequency. Hence, the CrCMASF to operate at the 254

boundary limit between CCM and DCM while increasing efficiency. 255

Therefore, it is necessary to ensure an inductance at the maximum current for a 256

specified current ripple for powder core design. The maximum current ripple for this study 257

is approximately 31.2 A, with a maximum switching frequency of 20 kHz. The experimental 258

setup, which the subsequent section will introduce, uses an inductor consisting of three 259

parallel-connected cores (58617 from magnetics), each with three stacks and 39 turns of 260

winding (size: AWG10) and can be seen in Figure 7. 261

The inductance at the maximum output current of 60 A is approximately 262

222 µF. Figure 8a illustrates the behaviour of the inductance L as a function of the in- 263

ductor current IL . Figure 8b presents the switching frequency for overlapping in- and 264

output voltages of 330 V using Equation (3): 265

Vi · (1 − γ1 ) · γ1
fs = (3)
(1 − γ4 ) · L( IL ) · ∆IL,max

From Figure 8b it is evident that switching frequency modulation is not reason- 266

able for buck-boost mode as the switching frequency f s is not below the maximum of 267

20 kHz at all operation points. However, the switching frequency needs to decrease due to 268

the high power semiconductor switching losses to enhance efficiency. 269

On the other hand, using buck+boost mode, low switching frequencies are possible, 270

enabling efficiency optimisation. The definition of the current ripple ∆i L is according 271

to the law of induction and the effective inductor voltage-time areas for both modes in 272

Figure 4 and Figure 5. Both figures reveal that these areas are significantly larger for buck- 273

boost mode. In contrast, in buck+boost mode, the inductor is temporarily energised and 274

de-energised simultaneously, enabling low current ripples. 275

The converter also considers a minimum frequency to avoid DCM by using 276

Equation (3) and therefore setting the maximum current ripple ∆i L,max according to the 277

boundary limit between DCM and CCM, which is 2Io for output currents of up to 15.6 A 278

(0.26 p.u.). The procedure uses a maximum current ripple of 31.2 A for output currents 279

above 15.6 A. Therefore, for an output current of 60 A, a switching frequency of approx- 280

imately 2 kHz is possible, as shown in Figure 8b. With Figure 8b and Equation (3), it is 281

possible to set the switching frequency for the experimentation phase accordingly. 282
Version August 1, 2022 submitted to Journal Not Specified 9 of 18

Powder cores

Figure 7. Powder cores of the experimental setup.

290 50
buck+boost
buck-boost
280 Switching frequency, fs [kHz] 40
Inductance, L [µH]

270 buck-boost frequency

30 factor 10 higher
260

250 20
240 Until 0.26 p.u. ∆iL,max is
10 2Io to avoid DCM
230

220
0 5 10 15 20 25 30 35 40 45 50 55 60
Inductor current, IL [A]
(a) Inductance versus inductor current.
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Output current ratio, Io/Imax
(b) Switching frequency for buck-boost and
buck+boost mode for overlapping in- and output
voltages of 330 V.

Figure 8. Characteristics for switching frequency modulation.

4. Evaluation 283

4.1. Full Experimental Setup 284

The DC power supply shown in Figure 9a consists of three rectifiers connected in 285

parallel with variable transformer ratio. In this way, a maximum input voltage of 500 V can 286

be preset in the laboratory to emulate the DC bus voltage with a maximum current of 60 A. 287

Figure 9b shows the experimental setup of the converter with the associated measurement 288

equipment. In order to measure converter power losses, the setup contains the LMG671 289

PowerAnalyzer. For current and voltage measurement, the setup includes the Rogowski 290

current probe Teledyne LeCroy T3RC0120-UM and the voltage probe Fluke SI 9001. With 291

the air/water heat exchange system AirCool Ventus ACVE 002, the RG76002 water-cooled 292

heat sink has a coolant temperature of approximately 30 ◦ C. The half-bridge modules are 293

the SKM400GB066D from Semikron with the thermal interface material HT-C3200. With 294

the Benning MM12 insertion temperature probes, the setup enables the measurement of 295

device junction temperature. For this reason, the temperature sensor is placed inside the 296

case, directly on the silicon die, as shown in Figure 10. In addition, the setup contains 297

probes to measure ambient temperature. 298

Version August 1, 2022 submitted to Journal Not Specified 10 of 18

Heat Exchanger
User Interface

Load

Rectifiers Power Analyzer DC-DC Converter

(a) Rectifiers. (b) Bidirectional cascaded buck and boost converter.

Figure 9. Full experimental setup.

Figure 10. Half-bridge modules highlighting temperature measurement.

4.2. Converter Losses 299

Figure 11 presents the power losses P of the converter for a fixed switching frequency of 300

20 kHz and CrCMASF according to Equation (3) with in- and output voltages of 301

330 V. For a duty cycle γ1 of 0.95, Figure 11a reveals that the losses with switching fre- 302

quency modulation at full-load are ∼274 W. In contrast, Figure 11b depicts power losses of 303

∼339 W for γ1 = 0.9 and Figure 11c ∼388 W for γ1 = 0.8. Hence, a duty cycle γ1 of 0.95 304

decrease losses by up to 20% compared to a duty cycle γ1 of 0.9 and 25% compared to a 305

duty cycle γ1 of 0.8. 306

Moreover, the high duty cycle of γ1 = 0.95 for switch S1 decreases the switching 307

frequency according to Equation (3) considerably. For example, the converter can operate 308

with a switching frequency of 2 kHz even at an output current of approximately 30 A 309

without exceeding the maximum current ripple of 31.2 A. Due to tolerances, the switching 310

frequency deviates from the calculated values in Figure 8 at low currents. 311

Furthermore, compared to a constant switching frequency of 20 kHz, frequency mod- 312

ulation in buck+boost mode results in a power loss reduction of up to 39% by using a duty 313

cycle γ1 of 0.95, as Figure 11a illustrates. 314

Version August 1, 2022 submitted to Journal Not Specified 11 of 18

700 28 700 28
Variable frequency - eqn. (3) Variable frequency - eqn. (3)
Converter power loss, P [W ]

Converter power loss, P [W ]

Variable frequency, fs [kHz]

Variable frequency, fs [kHz]

600 Fixed frequency - 20 kHz 24 600 Fixed frequency - 20 kHz 24
Variable frequency Variable frequency
500 39% improvement 20 500 32% improvement 20
400 16 400 16
300 12 300 12
200 8 200 8
100 4 100 4

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Output current ratio, Io/Imax [p.u.] Output current ratio, Io/Imax [p.u.]
(a) Converter losses for a duty cycle of 0.95. (b) Converter losses for a duty cycle of 0.9.

700 28
Variable frequency - eqn. (3)
Converter power loss, P [W ]

Variable frequency, fs [kHz]

600 Fixed frequency - 20 kHz 24
Variable frequency
500 29% improvement 20
400 16
300 12
200 8
100 4

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Output current ratio, Io/Imax [p.u.]
(c) Converter losses for a duty cycle of 0.8.

Figure 11. Converter power losses for different duty cycles for switch 1.

4.3. Device Junction Temperature 315

Figure 12 presents the characteristic of the junction temperature Tj of switch S1 for 316

in- and output voltages of 330 V. In Figure 12a for a duty cycle γ1 of 0.95, Figure 12b for 317

γ1 = 0.9, and Figure 12c γ1 = 0.8. The junction temperature was recorded after the heat 318

exchanger stopped its active cooling process for a meaningful comparison with a coolant 319

outlet temperature between 30 ◦ C - 33 ◦ C. The coolant outlet temperature is not constant, 320

and the ambient temperature, which is uncontrolled, also affects the junction temperature 321

of the device as it acts as a heat source on the case, reaching values above 45 ◦ C in the setup. 322

Hence, the ambient is heating up due to core, capacitor, and semiconductor losses and 323

thermally couples to the half-bridge modules. Thus, the measurements were recorded in a 324

preheated ambient. For this reason, the temperature rise in Figure 12 refers to the starting 325

junction temperature Tj (∼ 0.15 p.u.) of the respective test series with Equation 4: 326

∆Tj = Tj ( Io /Imax ) − Tj (∼ 0.15 p.u.) (4)

From Figure 12, it is evident that for all duty cycles, decreasing maximum temperature 327

rise is possible. In addition, the temperature development for the proposed modulation 328

method indicates a small increase over the entire power range, which means that, in 329

contrast to fixed switching frequency, the cooling system has to use less energy to maintain 330

the coolant temperature. The improvements are particularly noticeable for output current 331

ratios above 0.5: Switching frequencies above an output current ratio of 0.5 are relatively 332

low with the proposed modulation method. Thus, the results from Figure 12 prove that 333

frequency modulation in buck+boost mode is also an appropriate optimisation method to 334

decrease device junction temperature rise ∆Tj for the entire power range. 335
Version August 1, 2022 submitted to Journal Not Specified 12 of 18

8 8
Measured for eqn. (3) Measured for eqn. (3)
7 Measured for 20 kHz 7 Measured for 20 kHz
Temperature rise, ∆T j [◦C]

Temperature rise, ∆T j [◦C]

6 6
5 5
4 4
3 3
2 2
1 1

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Current ratio, Io/Imax [p.u.] Current ratio, Io/Imax [p.u.]
(a) Junction temperature for a duty cycle of 0.95. (b) Junction temperature for a duty cycle of 0.9.

8
Measured for eqn. (3)
7 Measured for 20 kHz
Temperature rise, ∆T j [◦C]

6
5
4
3
2
1

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Current ratio, Io/Imax [p.u.]
(c) Junction temperature for a duty cycle of 0.8.

Figure 12. Junction temperature of switch 1 for different duty cycles.

4.4. Converter Efficiency 336

Figure 13 presents the efficiency η of the converter for in- and output voltages of 337

330 V and a duty cycle γ1 of 0.95. Figure 13a shows the results for overlapping in- and 338

output voltage of 330 V, 13b for an output voltage of 315 V, and Figure 13c for an output 339

voltage of 363 V. 340

The proposed modulation method improves efficiency by up to 1.43% for overlapping 341

in- and output voltages, 1.23% for an output voltage of 315 V, and 1.19% for an output 342

voltage of 363 V. The results demonstrate that significant efficiency improvement is possible 343

with the proposed duty cycle γ1 of 0.95 and the use of switching frequency modulation 344

and powder cores. 345

4.5. Converter Characteristics 346

Figure 14 illustrates the inductor current ripple ∆i L (only AC component) and voltage 347

vce,s1 on switch 1 and voltage vce,s4 on switch 4 for overlapping in- and output voltages of 348

330 V. According to Figure 8a for the inductance L( Io ) and Equation (3), the current ripple 349

∆i L for 20 kHz in Figure 14a should be 3.4 A, and in Figure 14b for CrCMASF, it should 350

be 33 A. Hence, the current ripple approximately matches the estimations. Deviations are 351

due to the tolerance of the core. For example, the inductance factor A L of the core has ± 8% 352

accuracy, while this parameter is crucial for core inductance determination [36]. 353
Version August 1, 2022 submitted to Journal Not Specified 13 of 18

100 100
Fixed frequency - 20 kHz Fixed frequency - 20 kHz
Variable frequency - eqn. (3) Variable frequency - eqn. (3)
99.5 99.5
Converter Efficiency, η [%]

Converter Efficiency, η [%]

1.43% improvement 1.23% improvement
99 99

98.5 98.5

98 98

97.5 97.5

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Output current ratio, Io/Imax [p.u.] Output current ratio, Io/Imax [p.u.]
(a) Converter efficiency for an output voltage of (b) Converter efficiency for an output voltage of
330 V. 315 V.

100
Fixed frequency - 20 kHz
Variable frequency - eqn. (3)
99.5
Converter Efficiency, η [%]

1.19% improvement
99

98.5

98

97.5

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Output current ratio, Io/Imax [p.u.]
(c) Converter efficiency for an output voltage of
363 V.

Figure 13. Converter efficiency for a duty cycle of 0.95 and an input voltage of 330 V for different
output voltages.

30 7.5
Collector-emitter voltage, vce [V ]

Collector-emitter voltage, vce [V ]

iL ∆iL ≈ 30 A
iL
0 0
Inductor current, iL [A]

Inductor current, iL [A]

450 −30 ∆iL ≈ 4.5 A

450 −7.5
vce,s4 vce,s4
300 300

150 150
vce,s1 vce,s1
0 0
0 0.25 0.5 0.75 1 1.25 1.5 0 0.03 0.05 0.08 0.1 0.13 0.15
Time, t [ms] Time, t [ms]
(a) Converter characteristics for in- and output volt- (b) Converter characteristics for in- and output volt-
ages of 330 V with 2 kHz and an output current of ages of 330 V with 20 kHz and an output current of
30 A. 30 A.

Figure 14. Characteristics for the inductor current ripple and voltages on switches S1 and S4 .
Version August 1, 2022 submitted to Journal Not Specified 14 of 18

In contrast to Figure 14, Figure 15 depicts inductor current ripple ∆i L and inductor 354

voltage v L in CCM and DCM. In Figure 15a, the characteristics in CCM are as antici- 355

pated (see Figure 5). For small output currents, the converter will reach DCM, where 356

the relationship between duty cycles and output voltages shown in Equation (3) is lost 357

as the inductor current i L temporarily reaches the value of zero, and thus, the voltage 358

on the inductance v L . Consequently, the positive voltage-time area of Vdc shown in 359

Figure 5 on the inductor no longer applies in DCM, and the mean value of the output 360

voltage, in this case, the battery voltage Vbat , increases. Figure 15b and 15c elucidates this 361

behaviour. 362

If the converter reaches the DCM mode only for a short time, then the positive voltage- 363

time area of Vdc is partly missing, as shown in Figure 15b. The output voltage for Figure 364

15b is 347 V. Hence, the voltage increase by 5.2% compared to CCM. In addition, the oscil- 365

lating behaviour is present due to the parasitics of the active components and the current 366

remaining in the inductor—for example, the freewheeling diode’s parasitic capacitance 367

results in an LC oscillation. 368

By decreasing the switching frequency or by reducing the output current further, as in 369

Figure 15c, the inductor current will operate in DCM for a longer period. Consequently, 370

the positive voltage-time area Vdc is no longer on the inductor. Hence, the output voltage 371

increases drastically to 380 V, which is an increase of 15.2% compared to CCM. Due to this 372

increase in the output voltage, the difference between the in- and the output voltage is no 373

longer zero (Vdc 6= Vbat ), as shown in Figure 15c. 374

These findings underline the importance of avoiding the DCM for converter control. 375

30 30
iL
iL
0 0
Inductor voltage, vL [V ]

Inductor voltage, vL [V ]
Inductor current, iL [A]

Inductor current, iL [A]

400 −30 400 −30
Vdc
200 200
vL vL
0 0
Inductor current
−200 −200 resonating with
the parasitics
Vbat
−400 −400
0 0.25 0.5 0.75 0 0.25 0.5 0.75
Time, t [ms] Time, t [ms]
(a) Inductor characteristics for an output current of (b) Inductor characteristics for an output current of
34 A in CCM. 16 A in CCM.

30
iL
0
Inductor voltage, vL [V ]

Inductor current, iL [A]

400 −30
No Vdc voltage-
time area
200
vL
0

−200 Vdc 6= Vbat

−400
0 0.25 0.5 0.75
Time, t [ms]
(c) Inductor characteristics for an output current of
5 A in DCM.

Figure 15. Inductor characteristics in CCM and DCM for different output currents.
Version August 1, 2022 submitted to Journal Not Specified 15 of 18

5. Discussion 376

The presented results have proven that switching frequency modulation is possible and 377

reasonable for the buck+boost mode in the mid-kW range. However, the simple approach of 378

this study (CrCMASF) for the introduced DC-DC converter is only possible for the mid-kW 379

range, as for converters with lower output powers, the magnetic core losses could represent 380

the majority of converter losses. The authors in [37–39] analyse this aspect and show that 381

by decreasing the switching frequency, the switching losses for power semiconductors 382

decrease while core losses increase. Hence, the optimum switching frequency can differ 383

significantly depending on the converter’s electric properties. Therefore, depending on 384

the application, the ratio of losses must be essential for efficiency optimisation when using 385

switching frequency modulation. 386

Another aspect to consider is semiconductor technology. For example, by using 387

SiC-MOSFETs instead of Si-IGBTs, it is possible to decrease the impact of semiconductor 388

losses on converter efficiency. In this case, the cores could mainly impact the converter 389

power losses. Consequently, if cores are the main factor of the total losses, it is reasonable 390

to increase the switching frequency to reduce the AC flux density. However, the results of 391

this study evince that lower switching frequencies are reasonable for the mid-kW range 392

using Si-IGBTs since they are the main factor of converter losses. 393

The method of switching frequency modulation is already known, as introduced 394

in [40] for zero voltage switching or in [41–44] where the authors predict losses and the 395

reasonable switching frequency with complex algorithms or optimum efficiency tracking as 396

introduced in [45]. However, the drawback of these approaches is that their applicability is 397

limited to low power ranges. Furthermore, the known methods require an increased effort 398

of computations. Also, none of these methods uses the soft saturation effect of powder 399

cores. 400

Regarding the duty cycles for the buck+boost mode, published literature discusses 401

and analyses the optimum not regarding the converter efficiency [46–48] or for lower power 402

ranges [49]. 403

The results of this study prove that a high fixed duty cycle γ1 of 0.95 and switching 404

frequency modulation increase efficiency over the entire power range, decreasing device 405

junction temperature rise. 406

6. Conclusion 407

This paper investigates the buck+boost mode of a non-isolated hard-switched bidirec- 408

tional cascaded buck and boost converter designed for fuel cell hybrid vehicles. This study 409

validates the operation mode with an experimental setup operating with currents of up to 410

60 A and 19.8 kW. As a result, this paper identifies the optimum fixed duty cycle of 0.95 for 411

the buck part of the converter. Compared to a fixed duty cycle of 0.9 and 0.8, the proposed 412

duty cycle reduces converter losses by 25% at maximum output power. Moreover, this 413

study introduces the novel critical conduction mode with adapted switching frequency 414

with powder cores for the DC-DC converter. Experimental tests confirm power loss im- 415

provement by up to 39% compared to a fixed switching frequency of 20 kHz while avoiding 416

discontinuous conduction mode. As a result, the proposed modulation method enables 417

efficiencies of 99%. Finally, this paper demonstrates that the suggested method decreases 418

device junction temperature over the entire power range by reducing semiconductor power 419

losses accordingly. 420

Author Contributions: Conceptualization, N.K.; methodology, N.K.; software, N.K.; validation, N.K., 421

D.R.; formal analysis, all authors; investigation, N.K. and H.H.; resources, N.K., D.R and H.H.; data 422

curation, all authors; writing—original draft preparation, N.K.; writing—review and editing, all 423

authors; visualization, N.K.; supervision, all authors; project administration, N.K. All authors have 424

read and agreed to the published version of the manuscript. 425

Funding: This research received no external funding. 426

Institutional Review Board Statement: Not applicable. 427

Version August 1, 2022 submitted to Journal Not Specified 16 of 18

Informed Consent Statement: Not applicable. 428

Data Availability Statement: Not applicable. 429

Acknowledgments: This work is supported by the Frankfurt University of Applied Sciences, Faculty 430

of Computer Science and Engineering. 431

Conflicts of Interest: The authors declare no conflict of interest. 432

Sample Availability: Not applicable. 433

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