Course Outline

Department of Electrical and Computer Engineering

School of Engineering and Physical Sciences
North South University, Bashundhara, Dhaka-1229, Bangladesh

Instructor: Md. Shahriar Hussain (HSM)

Office Room: SAC 11103 Course Title: Digital Logic Design
Office Hours: M: 3:00-5:00 Course CSE 231
W:12:30-1:00 Code:
RA: 2:00-4:30
Email Address: shahriar.hussain01@northsouth.edu Section: 03
LAB Lab Class SAC 507 Class Room: NAC 992
Lab Time R: 8:00-10:10 Class Time: MW: 11:30-12:30

1. Course Summary:
This course provides an introduction to logic design and basic tools for the design of digital
logic systems. A basic idea of number systems will be provided, followed by a discussion on
combinational logic: logic gates, Boolean algebra, minimization techniques, arithmetic
circuits (adders, subtractors), basic digital circuits (decoders, encoders, multiplexers, shift
registers), programmable logic devices (PROM, PAL, PLA). The course will then cover
sequential circuits: flip-flops, state transition tables and diagrams, state minimization, state
machines, design of synchronous/asynchronous counters, RAM/ROM design. An
introduction to programmable logic will also be provided. Hands-on experience will be
provided through project on design of a sequential logic system. This course has separate
mandatory laboratory session every week as CSE 231L.

2. Course Objective:
The objectives of this course are

a. to introduce Boolean logic operation and Boolean Algebra

b. to teach students how to use Boolean Algebra and K-maps to realize two-level
minimal/optimal combinational circuits
c. to exposed students in the introductory design process of combinational and
sequential circuits
d. to teach the operation of latches, flip-flops, counters and registers.
e. to explain how to analyze and design sequential circuits built with various flip-flops.
f. to introduce using simulation tool for digital system design.

3. Course Outcomes (COs):

Upon successful completion of this course, students will be able to
 Sl. CO Description
CO1 apply principles of Boolean algebra to logic functions.
CO2 use K-maps to realize two-level minimal/optimal combinational
circuits with up to 4-5 variables
CO3 construct gate-level implementation of a combinational logic
function using fundamental logic gates (AND/OR/NOT),
Multiplexers, Decoders and Programmable logic gates (ROMs,
PLAs and PALs)
CO4 analyze and Design sequential circuits built with various flip-flops,
registers, counters
CO5 use simulation tool (e.g. Logisim) to construct Digital Logic Circuit
in schematic level
CO6 operate laboratory equipment build, and troubleshoot simple
combinational and sequential circuits

4. Resources

Text books:

No Name of Year of Title of Edition Publisher’ ISBN

Author(s) Publication Book s Name
1 M Morris 2012 Digital 5th ed. Pearson ISBN-13: 978-0-13-
Mano & Design Education 277420-8
MD
Ciletti

Reference books:

No Name of Year of Title of Book Edition Publisher’s ISBN

Author(s) Publication Name
1 JF 2005 Digital 4th ed. Prentice ISBN-13: 978-
Wakerly Design: Hall 0131863897
Principles
and Practices

5. Weightage Distribution among Assessment Tools

Assessment Tools Theory Weightage (%)

Class Performance 5
Assignment 5
Quizzes 10
Midterm Exam 25
Final Exam 25
Term Project 10
 Lab work 20

6. Grading policy: As per NSU grading policy available in

http://www.northsouth.edu/academic/grading-policy.html

8. Topics covered and level of coverage (Tentative):

Course Topic Hours

Numerical representation of numbers 3 hrs
Binary, octal, decimal, hexadecimal, complements, Binary addition/subtraction ,
BCD, BCD addition, Other number systems
Boolean algebra 3hrs
Logic gates, Boolean algebra, Boolean functions, Minterm, Maxterm canonical and
standard forms, Minimization algebrically
K-Map, Dont care condition, Universal gates, Parity bit generator and checker 5 hrs
Combinational circuits 6 hrs
Analysis, design procedure, HA,FA, binary adder/subtractor, Carry look ahead
generator, Multiplier, BCD adder, Magnitude Comparator decoders, encoders,
multiplexers, combinational logic implementation using decoders and multiplexers
decoders, encoders, priority encoders, 4 hrs
multiplexers, combinational logic implementation using decoders and multiplexers
Midterm Exam Reserve Day
Synchronous sequential logic 4 hrs
Sequential circuits, flip-flops, timing diagrams, state transition tables, state transition
diagrams
Sequential circuits: Registers, Shift register, Universal shift register, counters 3 hrs

RAM/ROM 3 hrs
Designing BC, RAM and ROM
Programmable logic: 2 hrs
Implementation of logic functions using programmable logic devices ROM, PLA,
PAL
Error Detecting/Correcting Codes: Hamming Codes, Sequential PLDS, Review 2 hrs
FINAL EXAM

Exams & Make up Policy:

 No makeup exams will be taken under any circumstances.
 Midterm and Final exams will be closed book, closed notes.
 The materials for Midterm and Final exams will be informed in due time.
 Electronic devices are prohibited in exam sessions.
 If you miss the final you will get an ``F" in the course.
 If you cheat in any form or do not follow faculty instructions, your examination will be cancelled.