S.

NO
DATE NAME OF THE EXPERIMENT SIGNATURE

1. 01/08/16 Logic gates

2. 08/08/16 Adders
2.1) Half adder
2.2) 1-bit Full adder
2.3)Ripple Carry 4-bit Full adder
2.4)Carry Look Ahead 4-bit Full adder
3. 12/09/16 Combinational circuits
3.1) Encoder
3.2) Priority Encoder
3.3) Multiplexer
3.4) Binary to Gray converter
3.5) 2-bit Magnitude comparator
4. 26/09/16 Flip Flops
4.1) S-R Flip flop
4.2) J-K Flip flop
4.3) D Flip flop
4.4) T Flip flop
5. 03/10/16 Counters and Shift Registers
5.1) Up down counter
5.2) Universal shift register
5.3) Ring Counter
5.4) Johnson Counter
5.5) Clock divider using counter
5.6) Linear Feedback Shift Register
5.7) Barrel Shifter

6. 10/10/16 6.1) CMOS Inverter

6.2) Boolean expression using CMOS Inverter
7. 17/10/16 Finite State Machines
7.1) Parity Checker
7.2) Serial Adder
7.3) Sequence Detector(Mealy)
7.4) Sequence Detector(Moore)
8. 24/10/16 8.1)Traffic Light Controller
8.2) 8-bit ALU
9. 31/10/16 Memories
9.1) Single Port Synchronous Read/Write
9.2)Dual Port Asynchronous Read/Write
9.3) ROM
10. 7/11/16 Bus Arbiter