Indian Institute of Information Technology, Vadodara

International Campus Diu IIITV-ICD

Name: Megh Bhatt

Roll: 202111053
Branch: CSE
Batch: 2021
Subject: EC261 Session:
2022-23

Certificate
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This is to certify that Mr. / Ms. Megh Bhatt Of B-Tech batch
2021 Semester 3 enrolment No. 202111053 Branch CSE has
been found satisfactory in the continuous internal evaluation of
the laboratory, practical and term work in the subject EC201 for
the academic year 2022– 2023.

Date: 15/09/2022 Sign of Faculty

Date:15/09/2022

Laboratory: 2
Aim of experiment:
(i) Make the different basic logic gates using the universal gates (in this case NAND) on Logisim.
(ii) Make half adder and subtractor using universal gates (in this case NAND).
Components required:
1. Logisim
2
Theory:
Universal logic Gates: A universal gate is a gate that can implement any Boolean function without need to
use any other gate type. The NAND and NOR gates are universal gates. In practice, this is advantageous
since NAND and NOR gates are economical and easier to fabricate and are the basic gates used in all IC
digital logic families.
Half Adder: A half adder is a type of adder, an electronic circuit that performs the addition of numbers. The
half adder is able to add two single binary digits and provide the output plus a carry value. It has two inputs,
called A and B, and two outputs S (sum) and C (carry). The common representation uses a XOR logic gate
and an AND logic gate.
Half Subtractor: Half subtractor is a combination circuit with two inputs and two outputs which is
difference and borrow. It produces the difference between the two binary bits at the input and also
produces an output (Borrow) to indicate if a 1 has been borrowed.

OBSERVATION:
Circuit on Logisim:
(i)

(ii)

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RESULT:
Truth Tables:

Half Adder:

Sum Carry
A B
0 0
0 0
1 0
0 1
1 0
1 0
0 1
1 1

Half Subtractor:

Difference Borrow
A B
0 0
0 0
1 1
0 1
1 0
1 0
0 0
1 1
4
Conclusion:
We have successfully designed all basic gates using a universal gate (in this case NAND). Also, designed
circuits for half adder and subtractor and prepared truth tables of their outputs. In half adder and subtractor
sum and difference respectively commonly represents an XOR gate.