32BL95UW

CONFIDENTIAL
LED MONITOR
SERVICE MANUAL
CHASSIS : LM80G
MODEL : 32BL95U
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL70211509 (1810-REV00)
Copyright © 2018 LG Electronics Inc. All rights reserved. Only training and service purposes.
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 7
DISASSEMBLY ........................................................................................ 17
BLOCK DIAGRAM ................................................................................... 21
EXPLODED VIEW .................................................................................... 22
TROUBLE SHOOTING GUIDE .............................................................. 23
-2- Copyright © LG Electronics Inc. All rights reserved.

Only training and service purposes.
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
such as WATER PIPE,
shock.
To Instrument's CONDUIT etc.
exposed
Leakage Current Cold Check(Antenna Cold Check)
METALLIC PARTS
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

SPECIFICATION
No Item Content Remark

1 Customer BRAND BRAND : LGE Product
2 User Model Name 32UL950
3 Sale region Worldwide
4 Feature 31.5”LCD MONITOR (Nano-IPS,UHD,4side Edge)
5 Chassis Name LM80G PCB, Product spec., Adjustment
Genera External SW Up / Down / Left / Right / OK
Joystick switch Press and Hold : Power off
l & Adj. (Power)
6
Picture Mode, Ratio, S.E.S, Six Color, On Screen
Scope Function
,
Control,Dual Controller,, Factoryy calibration,, PBP
Input HDMI IN HDMI(2.0)
/ DP IN DisplayPort(1.4)
Output TBT IN Thunderbolt(Ver.3) *2ea / PD : 60W, 15W *PD : Power delivery
7
USB DN USB 3.0 Downstream x 2 Up to 5V 1.1A DC
H/P OUT Audio L/R
SPEAKER Audio L/R
O Length 1.55±0.05m:
Refer to Suffix standard and
8 Power Cord Weight 0.17kg ± 10%,
power cord Table.
Color White
Length
L ength 1.5 ± 0.05m
05m P/N : EAD63932603
USB Type-C Weight 0.06kg ± 10%, (Refer to BOM)
Color White
Length
USB A To C
Weight
Gender
Color
Length 1.5m±0.05m P/N : EAD63988302
Weight 0.06kg ± 10% (Refer to BOM)
Thunderbolt Color White
1) CABLE : 90Ω±5Ω
Impedance
9 bl
Cable 2) CONNECTOR : 90Ω±10Ω
Length 1.50m±0.05m P/N : EAD63749403
DisplayPort Color White
1) CABLE : 100Ω±5Ω
Impedance
2) CONNECTOR : 100Ω±10Ω
Length 1.50m ± 0.05m P/N : EAD63954402
HDMI Color White
1)CABLE : 100Ω
100Ω±5 5Ω
Ω
IImpedance
mpedance
2)CONNECTOR : 100Ω±10Ω
Input: 100-240V~ 50/60Hz 3A Max P/N : EAY65068601
Output: 19.5 V / 10.8 A (Refer to BOM)
(Adapter /
10 Power Color : White, Weight : 0.67kg±10%, without vinyl
PSU /LPB)
b
Adapter Name : ACC-LATP1
Vendor : Honor
11 Power Rating 19.5 V / 9.0 A Request to regulation team
12 Accessory Box Weight : 0.8 kg P/N : TBD
P/No Specification 31.5”,Nano-IPS,UHD,4side Edge
13 Applying module list
LM315WR2 SSA1
EAJ64608201 LM315WR2-SSA1 Display
Maker : LG Dis play
2. Signal Timing (Resolution)
1) Signal (Video & Sync)
i. Display Port & Thunderbolt / USB-C
Frequency Total Front

Mode section polarity Dclk[MHz] Display Sync. Back Porch Resolution Remark
[kHz]/[Hz] Period Porch
H(Pixels) - 31.469 800 640 16 96 48
1 25.175 640 x 480
V(Lines) - 59.94 525 480 10 2 33
H(Pixels) + 37.879 1056 800 40 128 88
2 40 800 x 600
V(Lines) + 60.317 628 600 1 4 23
H(Pixels) - 48.363 1344 1024 24 136 160 1024 x
3 65
V(Lines) - 60 806 768 3 6 29 768
H(Pixels) + 54.347 1472 1152 32 96 192 1152 x
4 79.99
V(Lines) + 60.05 905 864 1 3 37 864
xels)
H(Pixels)
H(Pi + 45 1650 1280 110 40 220 1280 x
5 74.25
V(Lines) + 60 750 720 5 5 20 720
H(Pixels) - 49.702 1680 1280 72 128 200 1280 x
6 83.5
V(Lines) + 59.81 831 800 3 6 22 800
H(Pixels) + 63.981 1688 1280 48 112 248 1280 x
7 108
V(Lines) + 60.02 1066 1024 1 3 38 1024
H(Pixels) + 60 1800 1600 24 80 96 1600 x
8 108
V(Lines) + 60 1000 900 1 3 96 900
H(Pixels) + 67.5 2200 1920 88 44 148 1920 x
9 148.5
V(Lines) - 60 1125 1080 4 5 36 1080
H(Pixels) + 133.32 2080 1920 48 32 160 1920 x
10 277.25 PBP Only
V(Lines) - 60 2222 2160 54 5 3 2160
H(Pixels) + 88.79 2720 2560 48 32 80 2560 x
11 241.5
V(Lines) - 59.95 1481 1440 3 5 33 1440
H(Pixels) + 66.66 4000 3840 8 144 8 3840 x
12 266.64
V(Lines) - 30 2222 2160 54 5 3 2160
(1) H(Pixels) + 133.32 4000 3840 8 144 8 3840 x
13 533
V(Lines) - 60 2222 2160 54 5 3 2160
* (1) : DP/USB-C/TBT Preferred timing.

ii. HDMI
Frequency Total Front
Mode section polarity Dclk[MHz] Display Sync. Back Porch Resolution Remark
[kHz]/[Hz] Period Porch
H(Pixels) - 31.469 800 640 16 96 48
1 25.175 640 x 480
V(Lines) - 59.94 525 480 10 2 33
H(Pixels) + 37.879 1056 800 40 128 88
2 40 800 x 600
V(Lines) + 60.317 628 600 1 4 23
H(Pixels) - 48.363 1344 1024 24 136 160 1024 x
3 65
V(Lines) - 60 806 768 3 6 29 768
H(Pixels) + 54.347 1472 1152 32 96 192 1152 x
4 79.99
V(Lines) + 60.05 905 864 1 3 37 864
H(Pixels)
H(Pi xe ls) + 45 1650 1280 110 40 220 1280 xx
5 74.25
V(Lines) + 60 750 720 5 5 20 720
H(Pixels) - 49.702 1680 1280 72 128 200 1280 x
6 83.5
V(Lines) + 59.81 831 800 3 6 22 800
H(Pixels) + 63.981 1688 1280 48 112 248 1280 x
7 108
V(Lines) + 60.02 1066 1024 1 3 38 1024
H(Pixels) + 60 1800 1600 24 80 96 1600 x
8 108
V(Lines) + 60 1000 900 1 3 96 900
H(Pixels) + 67.5 2200 1920 88 44 148 1920 x
9 148.5
V(Lines) - 60 1125 1080 4 5 36 1080
H(Pixels) + 133 29
.29 2080 1920 48 32 160 1920 xx
10 277.25 PBP Only
V(Lines) - 60 2222 2160 54 5 3 2160
H(Pixels) + 88.79 2720 2560 48 32 80 2560 x
11 241.5
V(Lines) - 59.95 1481 1440 3 5 33 1440
H(Pixels) + 67.5 4400 3840 176 88 296 3840 x
12 (2) 297
V(Lines) - 30 2250 2160 8 10 72 2160
H(Pixels) + 135 4400 3840 176 88 296 3840 x
13 (1) 594
V(Lines) - 60 2250 2160 8 10 72 2160
* (1) : HDMI2.0 Preferred timing. , HDMI ULTRA Deep Color : ON

(2) : HDMI1.4
(2) HDMI1 .4 Preferred timintimingg.. , HDMI ULTRA
Preferred ULTRADeeDeepp Color : OFF
: OFF
2 ) H D M I Video input (R efer to M anual)

Factory support H orizontal Vertical R esult
m ode frequency frequency
(Preset M ode) (KH z) (H z)
1 480P 31.5 60 Pass
2 720P 45 60 Pass
3 1080P 67.5 60 Pass
4 2160P 135 60 Pass

ADJUSTMENT INSTRUCTION
1. Application
1.1 This document is applied to LM80E chassis 32” LCD Monitor which is manufactured in Monitor Factory or is produced on the
basis of this data.
1.2 Manufacturing Type : Set
2. Designation
2.1 The adjustment is according to the order which is designated and which must be followed, according to the plan which can be
changed only on agreeing.
2.2. Power Adjustment: Free Voltage
2.3. Magnetic Field Condition: Nil.
2.4. Input signal Unit: Product Specification Standard
2.5. Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25℃±5°C
Relative humidity : 65 ±10%
Input voltage : 100 ~ 240V, 50/60Hz
2.6. Adjustment equipments: Color Analyzer (CA-210 or CA-110), DDC Adjustment Jig equipment,
3. Main PCB check process

* APC - After Manual-Insult, executing APC
3.1 ADC Process
1) 32UL950 doesn’t need ADC process because it has only digital input like TBT, DisplayPort and HDMI.
3.2 EDID Process

3.2.1 EDID Download
F/W includes default EDID for All input ports, aging on Mode If AC ON, default EDID is automatically loaded to EEPROM.
Update serial number in EDID of HDMI1.
☞ Caution: Never connect HDMI Cable when execute NVRAM Init and AC On at first for downloading HDMI EDID
automatically.

No Item Content Remark
1 Manufacturer ID GSM Hex : 1E 6D
HDMI : 30470 Hex : 77 06
2 Product ID DP : 30471 Hex : 77 07
Thunderbolt : 30498 Hex : 77 22
Year : 1C (2018 year) Inserted at Production Line
3 Year / Week
Week : 1 (1 week) (Variable data)
4 Version 1 EDID Version

HDMI : 3
5 Revision EDID Revision
DP / TBT : 4
Inserted at Production Line

6 Serial Number SET Serial Number
(Variable data)
7 Model Name LG HDR 4K
** Protocol : DDC 2AB

3.3 Function Check
3.3.1 Check Screen
■ Check input and signal items. (cf. work instructions)
1. HDMI1 (3840 x 2160 @60Hz)
2. DisplayPort1.2 (3840 x 2160 @60Hz) - using PC
3. Thunderbolt (3840 x 2160 @60Hz) - using PC
4. Total Assembly line process

4.1 Write HDCP Key
Write HDCP Key into EEPROM by using DDC2AB protocol & HDCP2.2 Adjustment Jig equipment.
If error is occurred, try to write again.
After download HDCP key, send command ‘0xE6 00 00’ for loading RAM memory correctly.

4.2 Peak Luminance check
Check that the peak luminance is above the Limit Spec.
VESA HDR Tier HDR400 HDR600 HDR1000

Limit Luminance 400cd/m² 600cd/m² 1000cd/m²
4.3 White balance adjustment

Adjust PRESET Warm(6500K) Color coordinates and Gamma calibration.
Set the CA-210 for calibration.
Input Gamma calibration Pattern (R,G,B, Grey 20 )
Set as Warm(6500K) by commanding COLOR_MODE_CHANGE Command code.
Gamma calibration and verify
Warm(6500K) color adjustment

Adjust to meet x/y color coordinate as below.
2~4 min 4~8min 8~10min 10~25min 25~40min 40min~

x 0.318 0.318 0.317 0.316 0.314 0.313
y 0.339 0.338 0.337 0.334 0.332 0.329
Save Warm(6500K) Color by commanding COLOR SAVE Command code.

Insert HDMI 1 Jack which is connected with PC for White Balance or equivalent device.
Î Total Assembly line should check whether the color coordinate(x,y) data refer to below table were meet or not.
X=0.283 (±0.03)
Cool 9,300k °K
Y=0.298 (±0.03)
<Test Signal>
Color X=0.295 (±0.03)
Medium 8,000k °K Inner pattern
Temperature Y=0.305 (±0.03)
(255gray,100IRE)
X=0.313 (±0.015)
Warm 6,500k °K
Y=0.329 (±0.015)
Cool Min : 170 <Test Signal>
Luminance
Medium Min : 200 Inner pattern
(cd/㎡)
Warm Min : 260 (255gray,100IRE)
*Note : x,y coordinates are drifted about 0.007 after 30 mins heat-run. So checking color coordinate within 5-min at total
assembly line, consider x,y coordinates might be up to 0.007 than x,y target of each color temperature. ..
*Note : Manual W/B process

1) Power off => Power on( ‘Å’ 3 times, ‘Æ’ 1 time and push ‘◎’)
2) and push the “Å” or “Æ”.
3) In Service Menu.
※ When doing Adjustment, Please make circumstance as below.
4.4 DPM Operation check

■ Measurement Condition: 100~240V@ 50/60Hz
1) Set Input to DisplayPort, HDMI
2) Go to the “Sleep Mode” on the host-side
3) Check DPM operation refer to the below table.
Operating Condition Sync (H/V) or Video EUT (MSPG6100) LED(SET) Wattage(W)
Sleep mode Off/Off Off Off 1.2
Off mode - - Off 0.3
- 10 - Copyright © LG Electronics Inc. All rights reserved.

5. Shipping condition
Item Content& Outgoing Condition Remark

Source HDMI
Power Switch (Joystick Key) OFF
Brightness 100
Quick
Contrast 70
Settings
Volume 30
Input List HDMI
Input Aspect Ratio Full Wide
PBP Off( )
Picture Mode Custom
Brightness 100
Contrast 70
Sharpness 50
SUPER
Off
RESOLUTION+
Picture
OSD is activated at HDMI input.
Adjust
Depends on HDMI input video
Black Level
signal format
(RGB: High) / (YUV: Low)
DFC Off
Picture Uniformity Off
Response Time Fast
Game
FreeSync Off
Adjust
Black Stabilizer 50
Gamma Mode 2
Color Temp Custom
Red 50
Color
Green 50
Adjust
Blue 50
Six Color (Hue / Color Hue : 50 Color : Red, Green, Blue,
Saturation) Color Saturation : 50 Cyan, Magenta, Yellow
Picture Reset No
Language English Depend on the sale region
SMART ENERGY SAVING Low
General Power LED Off
Off (Others) Depend on the sale region
Automatic Standby
4H (Europe)

1.4
(OSD is activated at DisplayPort /
DisplayPort version
Thunderbolt input)
(Default value : Enable)
HDMI ULTRA HD Deep Color ON
Local Dimming Auto
Buzzer On
OSD Lock Off
OSD Size Small
Information OK
Reset to initial Settings No
Æ Make sure to do FACTORY RESET at the final process.
6. Signal composition for adjustment
6.1 I2C (100K BPS)

6.2 COMMUNICATION START
START 6E A STOP 50Ms
#Until ACK BIT goes LOW, Repeat it.

6.3 Command form.
Command form use DDC2AB standard communication protocol.
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A STOP
a. LEN : DATA BYTE number to send.

b. CMD : Command language that monitor executes.
c. VAL : FOS DATA
d. CS : Dada’s CHECHSUM that transmit
e. DELAY : 50MS
f. A : Acknowledge

6.4 Screen adjust command (LENGTH = 84)
No. Adjustment contents CMD(hex ADR VAL(hex) Explanation

)
1 EEPROM ALL INITIAL E4 00 00 adjustment Initialization
2 EEPROM READ E7 Slave At EEPROM Read
add
3 EEPROM WRITE E8 Slave Data Write data at EEPROM
add
4 R GAIN 16 00 00-64
5 G GAIN 18 00 00-64 Tune Gain
6 B GAIN 1A 00 00-64
7 BRIGHT(Backlight) 10 00 00-64 Tune Analog Bright
8 FACTORY RESET F0 00 00 Factory reset
9 AUTO COLOR Tuning
AUTO_COLOR_ADJUST F1 00 0
0:Auto color
COLOR_MODE_CHANG 01 WARM(6500K)
10 F2 00
E 02 COOL(9300K)
Aging off &Clear

11 Elapsed time Clear E9 00 00
elapsed time
12 Aging On/Off F3 00 FF/00 FF:ON / 00:OFF
0xD0 DisplayPort
13 Input Select F4 00 0x90 HDMI1
0XD2 TBT
14 SYSTEM RESET F5 00 00 Restart System
00:English,
0x00 ~ 01: German
15 Select Language 68 00
0x0F 02: French
03: Spanish

04: Italian
05: Swedish,
06:Finnish
07: Portuguese
08: Brazil
09: Polish
0A: Russian
0B: Greek
0C: Ukrainian
0D: Chinese
0E:Japanese
0F: Korean
10 : Hindi
11 : Traditional Chinese
0x01 : HDMI1
16 EDID SN UPDATE 0x77 0 0x01~0x02
0x02 : HDMI2
0x00:OFF
17 APD command 0xF7 00 0x00~0x01
0x01:ON
LM315WR2-SSA1
18 Module name
00 Off
19 Peak Luminance B2 00
01 Peak
6.5. EEPROM Data Write
6.5.1 Signal Table
START 6E A 50 A 84+n A 03 A CMD A ADH A ADL A
Data_1 A ... Data_n A CS A STOP Delay 20m
LEN : 84h+Bytes
CMD : E8h
ADH : E2PROM Slave Address(A0,A2,A4,A6,A8,AA,AC,AE), Not 00h(Reserved by Buffer To EEPROM)
ADL : E2PROM Sub Address(00~FF)
Data : Write data
Delay : 20ms
6.5.2. Command Set

Adjustment contents CMD(hex LEN Explanation
No. )
1 EEPROM WRITE E8 94 16-Byte Write
2 (84+n) n-byte Write
* Use
FOS Default write :
<14mode data> write
SyncFlags,HPeriodH, HPeriodL, VtotalH,VtotalL, SrcHTotalH, SrcHTotalL
SrcHStartH, SrcHStartL, SrcVStartH,SrcVStartL, HsyncPhase
Temporary Data write: Write to particular address of EEPROM.
6.6 E2PROM Data Read
6.6.1 Signal Talbe
START 6E A 50 A 84 A 03 A CMD A ADH A ADL A CS A STOP
Delay 150ms
START 6F A D1 A ---------------------------------------------------------------------- Dn A STOP
128 Bytes
6.6.2 COMMAND SET
Adjustment contents CMD(hex ADH(hex) ADL(hex) Explanation
No.
)
1 EEPROM READ E7 A0 0 0-Page 0~7F Read
2 80 0-Page 80~FF Read
3 A2 0 1-Page 0~7F Read
11 AA 0 5-Page 0~7F Read
13 AC 0 6-Page 0~7F Read
15 AE 0 7-Page 0~7F Read
6.6.3 Use
Read E2PROM’s specific area as unit of 128(80h)-byte. ( 84h )
6.6.4 EDID Write
EEPROM access by using DDC2B protocol
1-Byte write
START A0 A L A D A STOP

L : 0x00~0x7F
D : data
8-byte write
START A0 A L A Data1 A …. A Data8 A STOP
L : 0x00,0x10,….0x70
6.6.5 EDID Read
DDC2B Command.(A0/A1)
START A0 A 00 START A1 A Data1 ... Data128 A CS A STOP
- 128 Byte transfer of EDID Buffer of MICOM

DISASSEMBLY
Fig.1 Place the monitor’s screen face down
Fig.2 Disassemble the Stand body with pulling down the button.

Fig 3 Remove the Screw(4EA) and disassemble the back cover
Start Point
Start Point
Fig 4 Disassemble the back cover (Latch Type) .

Fig 5 Remove thermal pad(1EA), EMI Tape(2EA)
Fig.6 Remove the side cover
Fig.7 Disassembly the LED Cable , Control Assemble (Latch Type) ,

FFC cable and Speaker

Fig. 8 Disassembly the screws between Middle(19)/Rear Frame(4) and Module

Flash
Memory
Module Clock
Generator)
SPI
System
PD Controller IC
Flash eDP
EEPROM
LED Driver 60p
Memory
SPI
SPI
TBT A Port
Thunder
Main IC PD: 85W
Bolt IC
DDR
Memory
PD Controller IC
- 21 -
Audio H/P TBT B Port
Aamp AMP
Copyright ©
BLOCK DIAGRAM
USB MUX
USB
EEPROM
Current limit 5V, 1A

USB 3.0 HUB
USB 3.0
MICOM Down Stream

Current limit 5V, 1A
USB 3.0
H/P HDMI 1 HDMI 2 DP Down Stream
SP (L) SP (R)
LG Electronics Inc. All rights reserved.

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts
are identified by in the EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as recommended
in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
920
!900
!910
400
!
540
510
500
A3
520
120
300
!
121
200
330
!
200T
-22 - Copyright © LG Electronics Inc. All rights reserved.

TROUBLE SHOOTING GUIDE
1. No Power
N Check Power connector Y
Check C701 Replace Adapter
Voltage Level (19V) OK?
Check IC701, 702 Output N Replace IC701, 702 &

Voltage Level (5V) Recheck
N Replace IC703 &

Check IC703 Output
Voltage Level (3.3V) Recheck
Check IC705 Output N Replace IC705 &

Voltage Level (2.5V, 1.2V) Recheck
Check X100 Clock N

Replace X100
27MHz
Replace IC107 Flash

Memory
Copyright © LG Electronics. Inc. All rights reserved. - 23 - LGE Internal Use Only
Only for training and service purposes
2. No Screen on
N N
Check WLED_ENABLE High? Check P201 (PIN No.69)
Module Back Light On? Replace G-SYNC Module
(IC601,IC602 27pin)
Y
Y
N
Check LED Driver Output Check IC601, IC602
(P601, P602 - 1, 2, 5, 6) Replace LED Driver IC
N
Check Panel Power 10V (L700) Replace IC700 &
Check IC700 Output 10V Recheck
Check Panel eDP AUX Check IC300, IC303 N

N
Repair Main B/D Replace G-SYNC Module
P300 (#9, 10, 36, 37)
Check FFC Cable for Damage or N

Replace FFCable
Open Conductors
Replace T-Con Board or Module
3. No Video – HDMI
Check input signal format
Is it supported?
Check HDMI Cable for Damage or

Open Connector
Check JK102 for proper N

Replace the Connector
connection or Damage
Check I2C Signal N

Replace the IC100
(EDID)
Check IC102 AUX Signal N

Replace the IC102
(#J1,H1)

Replace the IC103
(#3,4)
Replace the G-SYNC Module
4. No Video – DP
Check input signal format
Is it supported?
Check DP Cable for Damage or

Open Connector
Check JK101 for proper N

Replace the Connector
connection or Damage

Replace the IC101
(#29,30)

Replace the IC103
(#3,4)
Replace the G-SYNC Module
<LED Driver Block>
OPT
C117
100pF
100V
<LEFT SIDE> <RIGHT SIDE>
D118 P101 P102
MBRD10U100CT
A1 12507WR-H10G 12507WR-H10G
C
A2
+20V 171111 LGR +5V_LED_DRIVER
To prevent 3216 type crack issue, +5V_STANDBY LEFT_LED_8
JP118 1 RIGHT_LED_7
JP114 1
D101
BLM15PX121SN1
L100 Change Cap size (3216 --> 2012)
SB1280M-220 MBRD10U100CT
A1
22uH OPT JP105 2 JP115 2
L104
C L103 LEFT_LED_7 RIGHT_LED_6
LED+ BLM15PX121SN1
A2 120-ohm
C102 C103 C104
22uF 4.7uF 4.7uF R196 C131 JP106 3 JP116 3
63V 50V 50V LEFT_LED_6 RIGHT_LED_5
OPT 100K 1uF
AXV 50V Q118
105C C125 C127 C129 C130 SSM3J332R
22uF 22uF 22uF 22uF JP107
D
4 JP117 4
S
R102 63V 63V 63V 63V LEFT_LED_5 RIGHT_LED_4
7.5 AXV AXV AXV AXV OPT
105C 105C 105C 105C R197 C133
OPT 1uF R187 C135 C136 C137
D100 D D 100K 10K 2.2uF 1uF 2.2uF
OPT 50V JP109 5 5
G
OPT OPT OPT 10V 25V 10V LED+ LED+
1N4148W R103 R225 C116
100V R231 Q100 Q121
7.5 0 G AOD4286 0 G AOD4286 100pF
100V
S S R190 6 6
1K
Open String
R105
10K JP108
LEFT_LED_4 7 7
R101 C JP110 JP119

1K < OVP Setting > R188 LEFT_LED_3 8 RIGHT_LED_3 8
< OCP Setting > Vovp= 2.4*(R131 + R130)/ R130 4.7K B Q119
Req= 0.4//0.4//0.4 =0.13ohm 5V_LED_DRIVER_ON MMBT3904(NXP)
Vovp= 35.4V (R130 = 24K) OPT
C105 BOOST_OC_THD= "1000" <-- Binary number｡ｱ Module LED String max voltage : 29.7V R189 JP111 9 JP120 9
R104 R106 R111 R131 LEFT_LED_2 RIGHT_LED_2
220pF 0.4 0.4 0.4 OCP=OC_threshold_voltage/Req 4.7K E
50V 2W 2W 2W =(0.1+8*0.1)V/0.13ohm 330K
2012 If R130 = 18K,
=6.9A 1% Vovp = 46.4V JP112 JP121
LEFT_LED_1 10 RIGHT_LED_1 10
170922 LGR 11 11
LED Driver external 5V control pin
OPT 171030 LGR

R130 C126
R133 By Novatek recommand, Change value
+5V_LED_DRIVER 22K 30K
1000pF
(10pF --> 1000pF)
1% 1% 50V
JP113
12V_output C108 C110

0.1uF 10uF
C106 16V
10uF 10V
25V
C100
+20V
0.47uF
16V C101 C107
0.1uF R107
2200pF 25V 10
R100 50V
4.7K
171030 LGR
C109 C111
EFUSE_2.5V
0.1uF 4.7uF After check Novatek review,

50V Novatek agree to chagne Cap (E-cap--> chip cap)
EFUSE_6V
50V
BISENSE
CONFIG1
CONFIG0
VBOOST
GNDA_3
OPT
COMP
HDRV
OCIN
BDRV
GNDP
VCCB
5VDD
R119
MCP
OVP
VSW
100
FB
NC
HV
5V_LED_LDO_EN
C112 +LED_3.3V <DIMMING>
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
R115
ISENSE15[S] SYNC_VS 0.1uF 47K
1 80 16V
VSENSE15[D] 2 79 SYNC_CLK
OPT
DRV15[G] 3 78 EN R129
OPT OPT 47K +LED_3.3V
ISENSE14[S] 4 77 EXTO2 R122 R127 171113 LGR
S15 4.7K 100 Input frequency range: 47Hz~2kHz
VSENSE14[D] EXTO1 FET Spec is changed(100V)
D15 5 76 WLED_PWM
OPT Diode is changed
DRV14[G] 6 75 EXTO0
G15 R198 C121 OPT
ISENSE13[S] 7 74 BURST_DIM 100K 330pF OPT R191
S14 171111 LGR
VSENSE13[D] GPIO3 OPT R109 50V R195 4.7K Because of Stock issue
D14
G14
DRV13[G]
8
9
IC101 73
72 GPIO2 OPT R108
47K
47K R123
4.7K [170920 HW Son] Add R126 Change FET
/make net to Open drain (STN4NF20L --> AOD2922)
LEFT_LED_2
ISENSE12[S] 10 71 GPIO1 100
S13
LEFT_LED_3
LEFT_LED_8
LEFT_LED_5
LED_DRV_ON
LGP16B NT50510A 70
LEFT_LED_1
LEFT_LED_7
LEFT_LED_6
VSENSE12[D] 11 GPIO0 OPT R110 47K OPT
LEFT_LED_4
D13 C114
DRV12[G] GNDA_2 OPT R192
G13 12 69 0.1uF 100
R121
ISENSE11[S] 13 68 FDI 16V 47K
S12 TP100 OPT
VSENSE11[D] FCSB +LED_3.3V Q120
D12 14 67 TP102 MMBT3904(NXP) D115
DRV11[G] FDO D105 D107 D109 D111 D113 D102
15 66 TP103 C D103 1N4148W 1N4148W 1N4148W 1N4148W
G12 +LDO_3.3V OPT 1N4148W 1N4148W 1N4148W 1N4148W 100V
ISENSE10[S] FCK R193 100V 100V 100V 100V 100V 100V
S11 16 65 TP101 R132 4.7K 100V D7
B D8
VSENSE10[D] 17 64 WP 47K D1 D2 D3 D4 D5 D6
D11 R128
DRV10[G] RESETB 1K D D
G11 18 63 D D D D D D
ISENSE9[S] 3.3VCC E OPT R176 R137
S10 19 62 R194 R140 R158 R164 R170 330 330
R146 R152 G G
VSENSE9[D] 20 61 1.8VCC 4.7K 330 330 G 330 G 330 G 330 330 G G7 G8
D10 G G
DRV9[G] SEL_OSC C120 C124 G1 G2 G3 G4 G5 G6 S Q101
21 60 C122 Q114 S
G10 C115 0.1uF 0.01uF Q102 S Q104 S Q106 S Q108 S Q110 S Q112 S AOD2922 AOD2922
ISENSE8[S] XOUT C119 10uF AOD2922 AOD2922 AOD2922 AOD2922 AOD2922 100V
S9 22 59 0.1uF 16V 10V 50V AOD2922 100V
10uF 100V 100V 100V 100V 100V 100V S7 S8
VSENSE8[D] 23 58 XIN 16V 10V
D9 S1 S2 S3 S4 S5 S6
DRV8[G] 24 57 SDA/TX
G9
ISENSE7[S] 25 56 SCL/RX R141
S8 R112 R144 R171 R174
0 9.1 9.1 R147 R149 R153 R156 R159 R162 R168 R177 R180 R138 R139
VSENSE7[D] 26 55 VSYNC/INT 1% 9.1 R165 9.1 9.1 9.1 9.1 9.1
D8 VSYNC 1% 9.1 9.1 9.1 9.1 9.1 9.1 9.1 9.1
DRV7[G] SPI_EN OPT 3216 1% 1% 1% 1% 1% 1% 1% 1% 1%
27 54 R116 3216 1% 1% 1% 1% 1% 3216
G8 SPI_EN R199 3216 3216 3216 3216 3216 3216 3216 3216 3216 3216 3216
ISENSE6[S] SCK 1K 100 3216 3216
S7 28 53 SCK
R117 SPI_EN_SC
VSENSE6[D] 29 52 SIO 1K
D7 SIN
DRV6[G] 30 51 SO C113
G7 R136 171113 LGR
330pF R134
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
50V R120 R124 4.7K 100 4.7ohm 3216 Type De-rating is no problem
OPT 47K 47K SPI_EN VSYNC Novatek check it
GNDA_1
ISENSE5[S]
VSENSE5[D]
DRV5[G]
ISENSE4[S]
VSENSE4[D]
DRV4[G]
ISENSE3[S]
VSENSE3[D]
DRV3[G]
ISENSE2[S]
VSENSE2[D]
DRV2[G]
ISENSE1[S]
VSENSE1[D]
DRV1[G]
ISENSE0[S]
VSENSE0[D]
DRV0[G]
STATUS_SIGNAL
C128
330pF R135
50V 47K
RIGHT_LED_5
RIGHT_LED_6
RIGHT_LED_7
RIGHT_LED_1
RIGHT_LED_2
RIGHT_LED_3
RIGHT_LED_4
+LED_3.3V
+5V_STANDBY
P100
AR100 12507WS-06L
C118
10K 0.1uF D104 D112 D114 D116
AR101 JP100 1
D106 D108 D110
16V 100 1N4148W 1N4148W 1N4148W 1N4148W 1N4148W 1N4148W 1N4148W
I2C_SCL JP101 3.3V power OPT!!! 100V 100V 100V 100V 100V 100V 100V
2
D9 D10 D11 D12 D13 D14 D15
I2C_SDA JP102 3
D D D D D D D
WP JP103 4 +LED_3.3V
+3.3V_NORMAL R142 R148 R154 R160 R166 R172 R178
C123 330 G 330 G 330 G 330 G 330 G 330 G
S6
D6
G6
S5
D5
G5
S4
D4
G4
S3
D3
G3
S2
D2
G2
S1
D1
G1
5 OPT 330 G
0.1uF G9 G10 G11 G12 G13 G14 G15
BLM15PX121SN1
R113 16V JP104 L102 Q103 S S S Q109 S Q111 S Q113 S Q115 S
6 Q105 Q107
330K AOD2922 AOD2922 AOD2922 AOD2922 AOD2922 AOD2922 AOD2922
7
100V 100V 100V 100V 100V 100V 100V
+LDO_3.3V S9 S10 S11 S12 S13 S14 S15
BLM15PX121SN1
L101
R143 R145 R150 R151 R155 R157 R161 R163 R167 R169 R173 R175 R179 R181
9.1 9.1 9.1 9.1 9.1 9.1 9.1 9.1 9.1 9.1 9.1 9.1 9.1 9.1
LED_FW_WP C132 C134 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1% 1%
1% 3216
10uF 0.1uF 3216 3216 3216 3216 3216 3216 3216 3216 3216 3216 3216 3216 3216
LED_DRVIER_SDA 10V 16V
LED_DRIVER_SCL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 32UK950 2018.01.16
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LED DRIVER 1 13
+3.3V_SCALER
C221
10uF
+3.3V_NORMAL +5V_STANDBY
10V
IC100 IC100
DISPLAY PORT MST9U03V4 MST9U03V4
Mstar Request
170727
R233
R247
10K
C206
0.22uF
16V
OPT
R285
0
R295
0
BU200
PKM13EPY-4002-B0
JK200 22
DPT21C-20BM1YN10
JP230
U1 E11 1
NC_74 RESET
U2 C207 R296
1 NC_75 C212 C215 +5V_STANDBY
ML_LANE_3- T1 20pF X200 20pF 1K JP231
DP 1 DP_RX3N NC_76 50V 12MHz 50V 0.1uF
2
T2 AD36 16V
2
(Straight)
2 GND_3 NC_77 XIN

R1 AD37 OPT
3 ML_LANE_3+ NC_78 XOUT OPT R276 C
3 R2 AD34 R232 4.7K
DP_RX3P NC_79 NC_158 1M
P1 B Q201
4 ML_LANE_2- BUZZER_PWM
4 NC_80 R294 MMBT3904(NXP)
DP_RX2N P2
5 Mstar Request NC_81 171031 LGR (C215) 33
5 GND_2 170727 N3 E
GPIO_DP33 Because of noise,Add 0.1uF Cap
6 This pin can't used on PM mode N4 D6 This cap should be applied closely with buzzer
ML_LANE_2+ GPIO_DP34 SPI_CK SPI_CK
6 DP_RX2P N5 E7
7 USBPD_POL GPIO_DP32 SPI_DO SPI_DO
7 ML_LANE_1- K5 D7
DP_RX1N ALT_MOD_DET GPIO_DP30/DISP_PWM5 SPI_DI SPI_DI
8 L4 C6
8 GND_1 HRESET GPIO_DP31 SPI_CZ SPI_CS
171101 LGR D11
9 Close to Scaler (WP)/GPIO10 WP_SPI
9 ML_LANE_1+ R208 0 C2 D5
DP_RX1P DP_RX0P DP0_RX0P (HOLD)/GPIO11 HOLD
10 R209 0 C1
10 ML_LANE_0- DP_RX0N DP0_RX0N
DP_RX0N D2
DP_RX1P R216 0 DP0_RX1P
11 GND_0 D1 +3.3V_SCALER
11 DP_RX1N R217 0 R272
DP0_RX1N
12 +3.3V_SCALER +3.3V_SCALER R218 0 E2 M4 0
12 ML_LANE_0+ DP_RX2P DP0_RX2P GPIO_S0/SAR0 ALT_MOD_DET_2
DP_RX0P E1 M5
R200 R219 0
13
13 CONFIG1 1M
R207 R215
C204
0.1uF
DP_RX2N
DP_RX3P R223 0 F2
DP0_RX2N
DP0_RX3P
DP1.4 GPIO_S1/SAR1
GPIO_S2/SAR2
V3 R265
0
5V_LED_DRIVER_ON
USBPD_POL_2
R201
14 CONFIG2 1M 16V F1 U5
10K 1M DP_RX3N R224 0 DP0_RX3N GPIO_S3/SAR3 DDR_PD_CTRL AR210
14 DP_AUXP
E3 T4 4.7K
15 JP218 OPT DP_AUXN AUXRX0N/GPIO_DP03 GPIO_S4/SAR4 USBPD_AMSEL
15 AUX_CH+ R220 E4 U6 AR211
10 DP_AUXP AUXRX0P/GPIO_DP04 GPIO_S5/PWM9/DISP_PWM4 USBPD_EN 33
16 D3 JP220
16 GND_4 R221 DP_HPD GPIO_DP02/DP0_HPD AUD_AMP_SCL
DP_DET DP_SDM R4 Mstar Request AUDIO_SCL
10 DP_SDM GPIO_DP00/DP0_SDM
17 AUX_CH- 170727 AUDIO_SDA AUD_AMP_SDA
17 R244 1K K4 170922 LGR
DP_DET GPIO_DP01/DP0_PS_CTRL
18 R206 10 JP219 LED Driver external 5V control pin JP221 AR212
HOT_PLUG 33
18 DP_HPD H2
DP_AUXN HP_AMP_SCL
19 +3.3V_SCALER R214 TBT_SRC_ML0_P DP1_RX0P
19 RETURN C203 H1 J22 HP_AMP_SDA
1M 0.1uF TBT_SRC_ML0_N DP1_RX0N EDP_HPD[0]
20 16V J2 V5
20 DP_PWR[3.3V] OPT VR204 TBT_SRC_ML1_P DP1_RX1P EDP_HPD[1]
R204 10pF J1 D24
0 18V TBT_SRC_ML1_N DP1_RX1N EDP_HPD[2]
K2 T5
R205 TBT_SRC_ML2_P DP1_RX2P EDP_HPD[3] EDP_HPD_4K
21 100K K1 D22
21
TBT_SRC_ML2_N
TBT_SRC_ML3_P
L2
DP1_RX2N
DP1_RX3P
TBT3 GPIO50/UART_RX/DISP_PWM1/PWM1
GPIO51/UART_TX/DISP_PWM2/PWM2
V4
DEBUG_RX
DEBUG_TX
+3.3V_SCALER
C200 L1 F24 AR202
0.1uF TBT_SRC_ML3_N DP1_RX3N 171101 LGR GPIO52/MSCL1/UART_RX 33 HUB_SCALER_SCL
16V F4 By request of SW Team, Change I2C port U4
TBT_SRC_AUX_N AUXRX1N/GPIO_DP13 GPIO53/MSDA1/UART_TX HUB_SCALER_SDA
F5 Before : AUDIO_SCL(F22) / AUDIO_SDA(D15)
TBT_SRC_AUX_P AUXRX1P/GPIO_DP14 OPT
J4 After : AUDIO_SCL(F13) / AUDIO_SDA(F10) E5 OPT R239
TBT_SRC_HPD GPIO_DP12/DP1_HPD R278 0 DG_PM_S3_EN R237
GPIO20/PWM1 4.7K 4.7K
J5 F13 G5
TBT_SDM GPIO_DP10/DP1_SDM AUDIO_SCL GPIO00/MSCL0 GPIO21/PWM2 BUZZER_PWM
R289 0 P4 F10 F14
DG_PM_S0_EN GPIO_DP11/DP1_PS_CTRL AUDIO_SDA GPIO01/MSDA0 GPIO22/DISP_PWM0/PWM3 TBT_ON
C214 H3 F9 BOOT_GPIO42
0.1uF UART_TX GPIO02/UART_RX GPIO23/DISP_PWM1/PWM4 SPI_EN_SC
G4 H5 BOOT_GPIO43
[170920 HW Son] R288 0 170822 LGR
PORT NO.:HDMI1 Add C135 to prevent noise
16V
A6
B6
NC_82
UART_RX
SYS_SCL
D14
D4
GPIO03/UART_TX
GPIO04/MSCL0_BYPASS
GPIO24/DISP_PWM2/PWM5
GPIO25
R5
L5
LED_FW_WP
USB_HUB_RESET
For LED Driver SW update R238
4.7K R240
4.7K
JK202 NC_83 SYS_SDA GPIO05/MSDA0_BYPASS GPIO26/CEC EDID_WP_USB
A5 E14 P5
HDM2LB-19BG2RN3G NC_84 PWR_ON_PSU GPIO06/HWS2 GPIO27/IR/DISP_PWM3/PWM6 IR
B5 H4
NC_85 USB_DET GPIO07/HWS3 170822 LGR
A4 E6 AR203
NC_86 GPIO40/SSCL 33 LED_DRIVER_SCL For LED Driver SW update
DATA2+ B4 E9 2GB DDR SELECT
1 NC_87 GPIO41/SSDA LED_DRVIER_SDA
A3 Mstar Request 1-pi E10
DATA2_SHIELD AR204 NC_88 GPIO42/VID0/HWS0 BOOT_GPIO42
2 5.1 B3 170727 N14 E8 Function GPIO42 GPIO43
HDMI2 (Straight)
NC_89 GPIO_DP20 GPIO43/VID1/HWS1 BOOT_GPIO43

DATA2- HDMI2_RX2+ G24 E17
3 WLED_PWM
HDMI2_RX2-
170822 LGR H16
GPIO_X43/MSCL2/MSPI0_DO/MSPI1_DI TP200 GPIO44/PWM6
E13 H Boot_51 SAMSUNG
DATA1+ GPIO_X44/MSDA2/MSPI0_CZ/MSPI1_CK GPIO45/PWM7 PD_EN
4 HDMI2_RX1+ Change HDMI DET Circuit F17 F11
SCK GPIO_X42/MSPI0_CK GPIO46/PWM8 USBDN_VBUS_ON
DATA1_SHIELD HDMI2_RX1- (#11, #17 Detect) H24 R236 D25
5 VSYNC
R3
GPIO_X40/LD_VSYC_LIKE/DISP_PWM5
10K
GPIO47 0.95V_ON L Boot_R2 Nanya
DATA1- SIN GPIO_X41/MSPI0_DI
6 AR205
5.1 +3.3V_SCALER
DATA0+ A21 F6
7 HDMI2_RX0+ HDMI0_RXCN GPIO16 20VBUS_ON
B21 L6
DATA0_SHIELD HDMI2_RX0- HDMI0_RXCP GPIO17/DISP_PWM4/PWM0 OPT
8 A20 R308
DATA0- HDMI2_RXC+ HDMI0_RX0N 47K
B20
9 HDMI2_RXC- R302 HDMI0_RX0P
10K A19
CLK+ HDMI0_RX1N
10 B19
R287 HDMI0_RX1P
CLK_SHIELD
11
JP203
OPT
0
HDMI2_DET
A18
B18
HDMI0_RX2N HDMI2
CLK- OPT
12 OPT
R203
R222
0
+5V_STANDBY
VR208
10pF
J16
HDMI0_RX2P
GPIO_X03/DDC0_SCL/UART_RX
System EEPROM +3.3V_SCALER
CEC 0 18V E16
13 A1 GPIO_X04/DDC0_SDA/UART_TX
C H15
NC AR206 HDMI2_5V GPIO_X02/HPD0
14 4.7K H14
AR200
SCL 33 D201 A2 GPIO_X00/SAR6
BAT54C_Suzhou F23 C216
15 GPIO_X01/CABLE5V0
HDMI2_SCL 0.1uF
SDA JP216 HDMI2_5V IC202 IC200
16 16V +3.3V_SCALER
JP217 HDMI2_SDA C16 AR218
HDMI2_RXC- HDMI1_RXCN FT24C256A-ESR-T 4.7K OPT
GD25Q127CSIGY(multi fab)
DDC/CEC_GND C17
17 R297 C HDMI2_RXC+ HDMI1_RXCP R241
JP204 A16 C205
+5V_POWER 10K SCALER_FLASH_CS# R258 0.1uF
18 B Q203 HDMI2_RX0- HDMI1_RX0N 16V
B16 A0 VCC R259 0 10 CS# VCC
MMBT3904(NXP) HDMI2_RX0+ HDMI1_RX0P 1 8 1 8
HPD JP205 A15 100K SPI_CS
19
E HDMI2_RX1- HDMI1_RX1N SPI_DO FLASH HOLD
OPT OPT R299 B15 R271 OPT
This GND Pattern should be very narrow VR201 VR203 A1 10K HDMI1_RX1P A1 WP 33 R257 R262 SO 128Mb HOLD#/RESET#
10pF 10pF R230 C201 VR209 HDMI2_RX1+ 2 7 10 2 7 OPT
20 18V 18V
VR206
820 C 0.1uF
16V
10pF
18V
HDMI2_RX2-
A14
B14
HDMI1_RX2N HDMI1 AR217
SYS_WP
SCALER_FLASH_SO
0 R277
0
10pF A2 HDMI1_RX2P 33 R264
OPT HDMI2_RX2+ A2 SCL WP# SCLK SCALER_FLASH_SCLK
SHIELD 18V D202 G14 10
HDMI2_SCL GPIO_X13/DDC1_SCL/UART_RX 3 6 SYS_SCL WP_SPI 3 6 SPI_CK
R210 BAT54C_Suzhou H22
OPT 10 R305 HDMI2_SDA GPIO_X14/DDC1_SDA/UART_TX SYS_SDA
R213 J23 OPT SPI_DI
HDMI2_HPD 0 GND SDA R266
0 HDMI2_HPD R235 1K GPIO_X12/HPD1 VSS SI R280
G23 4 5 4 5 10 0
HDMI2_DET GPIO_X10/SAR7 R263 SCALER_FLASH_SI
J14 4.7K OPT OPT
HDMI2_5V GPIO_X11/CABLE5V1 C208 C210
12pF 12pF
50V 50V
C13
HDMI2_RXCN
D13
HDMI2_RXCP 170717 LGR
A13
HDMI2_RX0N Change Flash Memory (Giga Device, 128Mb)
B13
HDMI2_RX0P
A12
171101 LGR HDMI2_RX1N
By request of SW Team, Change I2C port B12
HDMI2_RX1P
+3.3V_SCALER Before : MICOM_SCL(F13) / MICOM_SDA(F10) A11
After : MICOM_SCL(F22) / MICOM_SDA(D15) HDMI2_RX2N
B11 +5V_STANDBY
HDMI2_RX2P
OPT R254 10K

MICOM_SCALER_SCL
MICOM_SCALER_SDA
F22
D15
GPIO_X23/DDC2_SCL/UART_RX
GPIO_X24/DDC2_SDA/UART_TX
For Debug Joystick Key
SPI_CS E22
LED_DRV_ON GPIO_X22/HPD2 L200
R255 10K F16 +3.3V_SCALER BLM15PX121SN1
HOLD KEY2 GPIO_X20/SAR8 P200
J15
OPT R256 10K 15VBUS_ON GPIO_X21/CABLE5V2 12507WR-08L
WP_SPI OPT
R300
OPT R274 10K For Debug 10 D8
PD_EN +3.3V_SCALER HDMI3_RXCN AR208
C8 +3.3V_SCALER 3.3K
OPT R286 10K HDMI3_RXCP 1
WLED_PWM De-bug A10
P202 HDMI3_RX0N De-bug
R281 10K B10 AR207
12507WS-04L
DDR_PD_CTRL HDMI3_RX0P P201
33 JP207
C218 AR222 A9 12507WS-04L
R282 10K 0.1uF HDMI3_RX1N C217 KEY1 2
10K B9 AR219
0.95V_ON 1 16V 0.1uF
HDMI3_RX1P 10K 16V KEY2
Angle (8P)
OPT R292 10K A8 1 JP208
DG_PM_S0_EN 2 AR221 HDMI3_RX2N 3
33 B8
OPT R293 10K R283 100K HDMI3_RX2P AR220 2
DG_PM_S3_EN +3.3V_SCALER RX 3 DEBUG_SCL E15 33 +3.3V_SCALER IR ZD200
HRESET GPIO_X33/DDC3_SCL/UART_RX +3.3V_SCALER KDZ5.6V JP209
R243 4.7K DEBUG_SDA H23 3 R253
R226 10K DEBUG_RX RX 0 4
PWR_ON_PSU PD_EN TX 4
E23
GPIO_X34/DDC3_SDA/UART_TX
OPT R260 10K OPT R227 10K GPIO_X32/HPD3 4 OPT
TBT_ON 0.95V_ON AR201 5
KEY1
E26 DEBUG_TX TX R242 JP210
4.7K GPIO_X30/SAR9 5 4.7K 5
OPT R261 10K R228 10K D16 Q200
USBPD_EN GPIO_X31/CABLE5V3 OPT VR213
TBT_ON MMBT3904(NXP)
C VR211 VR212 10pF C202 C211 C213
OPT R270 10K OPT R246 1uF 1uF 1uF
OPT R229 10K R306 4.7K 10pF 10pF 18V JP211
USBPD_POL B OPT 18V 18V 10V 10V 10V
DDR_PD_CTRL 0 C209 6
OPT R273 10K MICOM_SCALER_SCL USBPD_AMSEL_2 CONTROL_LED 68pF
OPT R212 10K
ALT_MOD_DET MICOM_SCALER_SDA OPT 50V
USBDN_VBUS_ON R307
R202 10K R248 E JP206
USBPD_EN_2 0 4.7K 7
5V_LED_DRIVER_ON
OPT R211 10K
USBDN_VBUS_ON 170717 LGR
When AC on, Light turn on without control 8
IR
(Set --> OPT)
170822 LGR
JP212 9
Add Cap 1uF on Key1/2
JP213

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Interface/SoC GPIO 2 13
DDR3(2Gb/1Gb x 4)
VTT_0.75V
+1.5V_DDR_S DDR_AB_VREF +1.5V_DDR_S DDR_CD_VREF
R1016 R1057
1K 1K
1% IC100 1%
MST9U03V4
R1017 C1037 C1040 R1058 C1102 C1104
IC1000 1K 0.1uF 1000pF IC1004 1K 0.1uF 1000pF
NT5CB64M16GP-FL 1% 16V 50V NT5CB64M16GP-FL IC1005 IC1007 1% 16V 50V
R1000 C1000 DDR_AB_VREF AB_TMA0 AN20 AM6 CD_TMA0 NT5CB64M16GP-FL NT5CB64M16GP-FL
0.1uF A_A[0] B_A[0] DDR_CD_VREF DDR_CD_VREF
AB_TMA10 100 16V DDR_AB_VREF AB_TMA1 AR17 AM3 CD_TMA1
A_A[1] B_A[1]
R1001 C1001 DDR3 SDRAM DDR3 SDRAM AB_TMA2 AM20 AN4 CD_TMA2 VTT_0.75V
AB_TMA9 100 0.1uF AB_TMA0 N3 M8 AB_TMA0 N3 M8
AP19
A_A[2] B_A[2]
AL6 N3
DDR3 SDRAM M8 N3
DDR3 SDRAM M8
16V A0 VREFCA A0 VREFCA AB_TMA3 CD_TMA3 CD_TMA0 CD_TMA0
R1002 AB_TMA1 P7 AB_TMA1 P7 A_A[3] B_A[3] A0 VREFCA A0 VREFCA
AB_TMA13 100 C1002 A1 A1 AB_TMA4 AT16 AM2 CD_TMA4 CD_TMA1 P7 CD_TMA1 P7
0.1uF AB_TMA2 P3 AB_TMA2 P3 A_A[4] B_A[4] A1 A1
16V A2 A2 AB_TMA5 AN21 AN5 CD_TMA5 CD_TMA2 P3 CD_TMA2 P3
AR1000 N2 H1 N2 H1 A_A[5] B_A[5] A2 A2
100 AB_TMA3 A3 VREFDQ AB_TMA3
A3 VREFDQ AU17 AN1 N2 H1 N2 H1
C1003 AB_TMA6 CD_TMA6 CD_TMA3 CD_TMA3
AB_TMA14 0.1uF AB_TMA4 P8 AB_TMA4 P8 A_A[6] B_A[6] A3 VREFDQ A3 VREFDQ
16V A4 R1015 A4 R1036 AB_TMA7 AR19 AP3 CD_TMA7 CD_TMA4 P8 CD_TMA4 P8
AB_TMA8 AB_TMA5 P2 240 AB_TMA5 P2 240 A_A[7] B_A[7] A4 R1045 A4 R1055
A5 1% A5 1% AB_TMA8 AR18 AN3 CD_TMA8 CD_TMA5 P2 240 CD_TMA5 P2 240
AB_TMA11 AB_TMA6 R8 L8 AB_TMA6 R8 L8 A_A[8] B_A[8] A5 1% A5 1%
A6 ZQ A6 ZQ AB_TMA9 AT19 AR2 CD_TMA9 CD_TMA6 R8 L8 CD_TMA6 R8 L8
AB_TMA6 AB_TMA7 R2 AB_TMA7 R2 A_A[9] B_A[9] A6 ZQ A6 ZQ
A7 A7 AT15 AL2 R2 R2 R1068 C1124
T8 T8 AB_TMA10 A_A[10] B_A[10] CD_TMA10 CD_TMA7 A7 CD_TMA7 A7 0.1uF
AB_TMA8 AB_TMA8 AT17 AN2 T8 T8 100 16V
AR1001 A8 A8 AB_TMA11 CD_TMA11 CD_TMA8 CD_TMA8 CD_TMA10
AB_TMA9 R3 B2 AB_TMA9 R3 B2 A_A[11] B_A[11] A8 A8
100 A9 VDD_1 A9 VDD_1 AM18 AL5 R3 B2 R3 B2 R1069 C1125
L7 D9 L7 D9 AB_TMA12 A_A[12] B_A[12] CD_TMA12 CD_TMA9 A9 VDD_1 CD_TMA9 A9 VDD_1 0.1uF
AB_TMA1 AB_TMA10 AB_TMA10 CD_TMA9 100
A10/AP VDD_2 A10/AP VDD_2 AB_TMA13 AR20 AR3 CD_TMA13 CD_TMA10 L7 D9 CD_TMA10 L7 D9 16V
AB_TMA4 AB_TMA11 R7 G7 AB_TMA11 R7 G7 A_A[13] B_A[13] A10/AP VDD_2 A10/AP VDD_2 R1070
A11 VDD_3 A11 VDD_3 AB_TMA14 AT18 AP2 CD_TMA14 CD_TMA11 R7 G7 CD_TMA11 R7 G7 CD_TMA13 100 C1126
AB_TMA12 AB_TMA12 N7 K2 AB_TMA12 N7 K2 A_A[14] B_A[14] A11 VDD_3 A11 VDD_3 0.1uF
A12/BC VDD_4 A12/BC VDD_4 AB_TMA15 AM17 AK5 CD_TMA15 CD_TMA12 N7 K2 CD_TMA12 N7 K2 16V
AB_TMBA1 AB_TMA13 T3 K8 AB_TMA13 T3 K8 A_A[15] B_A[15] A12/BC VDD_4 A12/BC VDD_4 AR1010
C1004 NC_6 VDD_5 NC_6 VDD_5 AM19 AM4 T3 K8 T3 K8 100 C1127
0.1uF N1 N1 AB_TMBA0 A_BA[0] B_BA[0] CD_TMBA0 CD_TMA13 VDD_5 CD_TMA13 VDD_5 0.1uF
NC_6 NC_6 CD_TMA14
AR1002 16V VDD_6 +1.5V_DDR_S VDD_6 AB_TMBA1 AR16 AL3 CD_TMBA1 N1 N1 16V
100 C1005 AB_TMA15 M7 N9 AB_TMA15 M7 N9 A_BA[1] B_BA[1] VDD_6 +1.5V_DDR_S VDD_6 +1.5V_DDR_S CD_TMA8
NC_5 VDD_7 NC_5 VDD_7 AB_TMBA2 AN19 AM5 CD_TMBA2 CD_TMA15 M7 N9 CD_TMA15 M7 N9
0.1uF R1 R1 +1.5V_DDR_S A_BA[2] B_BA[2] NC_5 VDD_7 NC_5 VDD_7
AB_TMA7 16V VDD_8 VDD_8 R1 R1 CD_TMA11
AB_TMA2 AB_TMBA0 M2 R9 AB_TMBA0 M2 R9 VDD_8 VDD_8 CD_TMA6
C1006 BA0 VDD_9 BA0 VDD_9 AB_TMODT AN16 AH6 CD_TMRASB CD_TMBA0 M2 R9 CD_TMBA0 M2 R9
AB_TMA5 0.1uF AB_TMBA1 N8 AB_TMBA1 N8 A_ODT B_RASZ BA0 VDD_9 BA0 VDD_9
16V BA1 BA1 AB_TMRASB AP16 AJ6 CD_TMCASB CD_TMBA1 N8 CD_TMBA1 N8
AB_TMA0 AB_TMBA2 M3 AB_TMBA2 M3 A_RASZ B_CASZ BA1 BA1 AR1011
C1007 BA2 BA2 AB_TMWEB AN18 AK6 CD_TMWEB CD_TMBA2 M3 CD_TMBA2 M3 100
0.1uF A1 A1 A_WEZ B_WEZ BA2 BA2 CD_TMA1
AR1003 16V VDDQ_1 VDDQ_1 AB_TMCASB AN17 AJ5 CD_TMODT A1 A1
AB_TMCK J7 A8 B_MCK J7 A8 A_CASZ B_ODT VDDQ_1 VDDQ_1 CD_TMA4
100 C1008 CK VDDQ_2 CK VDDQ_2 AB_TMCKE AR15 AK3 CD_TMCKE CD_TMCK J7 A8 D_MCK J7 A8
AB_TMA3 0.1uF AB_TMCKB K7 C1 B_MCKB K7 C1 A_CKE B_CKE CK VDDQ_2 CK VDDQ_2 CD_TMA12
16V CK VDDQ_3 CK VDDQ_3 AB_TMRESETB AU20 AT3 CD_TMRESETB CD_TMCKB K7 C1 D_MCKB K7 C1
AB_TMBA2 A_TMCKE K9 C9 B_MCKE K9 C9 A_RST B_RST CK VDDQ_3 CK VDDQ_3 CD_TMBA1
C1009 CKE VDDQ_4 CKE VDDQ_4 AB_TMCK AU14 AK1 CD_TMCK C_TMCKE K9 C9 D_MCKE K9 C9 C1128
AB_TMBA0 0.1uF D2 D2 A_MCLK B_MCLK CKE VDDQ_4 CKE VDDQ_4 0.1uF
16V VDDQ_5 VDDQ_5 AB_TMCKB AT14 AK2 CD_TMCKB D2 D2 16V
L2 E9 L2 E9 A_MCLKZ B_MCLKZ VDDQ_5 VDDQ_5 AR1012
AB_TMA15 A_TMCSB0 CS VDDQ_6 B_TMCSB1
CS VDDQ_6 AT20 AT2 L2 E9 L2 E9 100
C1010 AB_TMCSB0 CD_TMCSB0 C_TMCSB0 D_TMCSB1 C1129
0.1uF AB_TMODT K1 F1 AB_TMODT K1 F1 A_CSB[0] B_CSB[0] CS VDDQ_6 CS VDDQ_6 CD_TMA7 0.1uF
16V ODT VDDQ_7 ODT VDDQ_7 AB_TMCSB1 AU21 AU3 CD_TMCSB1 CD_TMODT K1 F1 CD_TMODT K1 F1 16V
AR1004 J3 H2 J3 H2 A_CSB[1] B_CSB[1] ODT VDDQ_7 ODT VDDQ_7
100 C1011 AB_TMRASB VDDQ_8 AB_TMRASB VDDQ_8 J3 H2 J3 H2 CD_TMA2
0.1uF RAS RAS CD_TMRASB CD_TMRASB C1130
AB_TMWEB AB_TMCASB K3 H9 AB_TMCASB K3 H9 RAS VDDQ_8 RAS VDDQ_8 CD_TMA5 0.1uF
16V CAS VDDQ_9 CAS VDDQ_9 AR11 AF3 K3 H9 K3 H9 16V
L3 L3 A_TMDQL0 A_DQ[0] B_DQ[0] C_TMDQL0 CD_TMCASB VDDQ_9 CD_TMCASB VDDQ_9
AB_TMCASB AB_TMWEB AB_TMWEB CAS CAS CD_TMA0
C1012 WE WE AT12 AH2 L3 L3 C1131
0.1uF J1 J1 A_TMDQL1 A_DQ[1] B_DQ[1] C_TMDQL1 CD_TMWEB WE
CD_TMWEB
WE
AB_TMRASB 0.1uF
16V NC_1 NC_1 A_TMDQL2 AT10 AF2 C_TMDQL2 J1 J1 AR1013 16V
AB_TMODT AB_TMRESETB T2 J9 AB_TMRESETB T2 J9 A_DQ[2] B_DQ[2] NC_1 NC_1
C1013 RESET NC_2 RESET NC_2 AR13 AH3 T2 J9 T2 J9 100 C1132
0.1uF L1 L1 A_TMDQL3 A_DQ[3] B_DQ[3] C_TMDQL3 CD_TMRESETB
RESET NC_2 CD_TMRESETB
RESET NC_2
AE2 CD_TMA3 0.1uF
16V NC_3 NC_3 A_TMDQL4 AT9 C_TMDQL4 L1 L1 16V
OPT L9 L9 A_DQ[4] B_DQ[4] NC_3 NC_3 CD_TMBA2
R1003 C1014 NC_4 NC_4 A_TMDQL5 AR14 AJ3 C_TMDQL5 L9 L9 C1133
B_MCKE 100 0.1uF A_TMDQSL F3 T7 AB_TMA14 B_TMDQSL F3 T7 AB_TMA14 A_DQ[5] B_DQ[5] NC_4 NC_4 CD_TMBA0 0.1uF
16V DQSL NC_7 DQSL NC_7 A_TMDQL6 AR10 AE3 C_TMDQL6 C_TMDQSL F3 T7 CD_TMA14 D_TMDQSL F3 T7 CD_TMA14 16V
R1004 A_TMDQSLB G3 B_TMDQSLB G3 A_DQ[6] B_DQ[6] DQSL NC_7 DQSL NC_7 CD_TMA15
56 C1015 DQSL DQSL AT13 AJ2 G3 G3 C1134
B_MCK A_TMDQL7 C_TMDQL7 C_TMDQSLB D_TMDQSLB 0.1uF
B_MCKB
R1005
56
0.1uF
16V
C1016
A_TMDQSU C7
DQSU VSS_1
A9 B_TMDQSU C7
DQSU VSS_1
A9 DDR3_A A_TMDML AR12
AU11
A_DQ[7]
A_DQM[0]
B_DQ[7]
B_DQM[0]
AG3
AG1
C_TMDML DDR3_B C7
DQSL
A9 C7
DQSL
A9
AR1014
100
16V
C1135
OPT B7 B3 B7 B3 A_TMDQSL A_DQS[0] B_DQS[0] C_TMDQSL C_TMDQSU
DQSU VSS_1 D_TMDQSU DQSU VSS_1 0.1uF
R1006 0.1uF A_TMDQSUB B_TMDQSUB AT11 AG2 B7 B3 B7 B3 CD_TMWEB
AB_TMRESETB 100 16V DQSU VSS_2 DQSU VSS_2 A_TMDQSLB C_TMDQSLB C_TMDQSUB D_TMDQSUB 16V
E1 E1 A_DQSB[0] B_DQSB[0] DQSU VSS_2 DQSU VSS_2 CD_TMCASB
C1017 VSS_3 VSS_3 E1 E1 C1136
0.1uF A_TMDML E7 G8 B_TMDML E7 G8 VSS_3 VSS_3 CD_TMRASB 0.1uF
16V DML VSS_4 DML VSS_4 C_TMDML E7 G8 D_TMDML E7 G8 16V
A_TMDMU D3 J2 B_TMDMU D3 J2 DML VSS_4 DML VSS_4 CD_TMODT
DMU VSS_5 DMU VSS_5 A_TMDQU0 AN15 AG6 C_TMDQU0 C_TMDMU D3 J2 D_TMDMU D3 J2 C1137
J8 J8 A_DQ[8] B_DQ[8] DMU VSS_5 DMU VSS_5 0.1uF
VSS_6 VSS_6 A_TMDQU1 AM12 AE5 C_TMDQU1 J8 J8 16V
E3 M1 E3 M1 A_DQ[9] B_DQ[9] VSS_6 VSS_6 OPT
A_TMDQL0 VSS_7 B_TMDQL0 VSS_7 AM16 AJ4 E3 M1 E3 M1 R1071 C1138
DQL0 DQL0 A_TMDQU2 C_TMDQU2 C_TMDQL0 D_TMDQL0
A_TMDQL1 F7 M9 B_TMDQL1 F7 M9 A_DQ[10] B_DQ[10] DQL0 VSS_7 DQL0 VSS_7 D_MCKE 100 0.1uF
DQL1 VSS_8 DQL1 VSS_8 A_TMDQU3 AN12 AD6 C_TMDQU3 C_TMDQL1 F7 M9 D_TMDQL1 F7 M9 16V
A_TMDQL2 F2 P1 B_TMDQL2 F2 P1 A_DQ[11] B_DQ[11] DQL1 VSS_8 DQL1 VSS_8 R1072
DQL2 VSS_9 DQL2 VSS_9 A_TMDQU4 AM14 AG5 C_TMDQU4 C_TMDQL2 F2 P1 D_TMDQL2 F2 P1 D_MCK 56 C1139
A_TMDQL3 F8 P9 B_TMDQL3 F8 P9 A_DQ[12] B_DQ[12] DQL2 VSS_9 DQL2 VSS_9 0.1uF
DQL3 VSS_10 DQL3 VSS_10 A_TMDQU5 AM11 AD5 C_TMDQU5 C_TMDQL3 F8 P9 D_TMDQL3 F8 P9 R1073 16V
A_TMDQL4 H3 T1 B_TMDQL4 H3 T1 A_DQ[13] B_DQ[13] DQL3 VSS_10 DQL3 VSS_10 D_MCKB 56
DQL4 VSS_11 DQL4 VSS_11 A_TMDQU6 AM15 AH5 C_TMDQU6 C_TMDQL4 H3 T1 D_TMDQL4 H3 T1 OPT C1140
A_TMDQL5 H8 T9 B_TMDQL5 H8 T9 A_DQ[14] B_DQ[14] DQL4 VSS_11 DQL4 VSS_11 R1074 0.1uF
DQL5 VSS_12 DQL5 VSS_12 A_TMDQU7 AM13 AF4 C_TMDQU7 C_TMDQL5 H8 T9 D_TMDQL5 H8 T9 CD_TMRESETB 16V
G2 G2 A_DQ[15] B_DQ[15] DQL5 VSS_12 DQL5 VSS_12 100
A_TMDQL6 DQL6 B_TMDQL6 DQL6 AN13 AF5 G2 G2 C1141
H7 H7 A_TMDMU A_DQM[1] B_DQM[1] C_TMDMU C_TMDQL6 DQL6 D_TMDQL6 DQL6 0.1uF
A_TMDQL7 DQL7 B_TMDQL7 DQL7 AP13 AE6 H7 H7
A_TMDQSU C_TMDQSU C_TMDQL7 D_TMDQL7 16V
B1 B1 A_DQS[1] B_DQS[1] DQL7 DQL7
VSSQ_1 VSSQ_1 A_TMDQSUB AN14 AF6 C_TMDQSUB B1 B1
A_TMDQU0 D7 B9 B_TMDQU0 D7 B9 A_DQSB[1] B_DQSB[1] VSSQ_1 VSSQ_1
DQU0 VSSQ_2 DQU0 VSSQ_2 C_TMDQU0 D7 B9 D_TMDQU0 D7 B9
A_TMDQU1 C3 D1 B_TMDQU1 C3 D1 DQU0 VSSQ_2 DQU0 VSSQ_2
DQU1 VSSQ_3 DQU1 VSSQ_3 C_TMDQU1 C3 D1 D_TMDQU1 C3 D1
A_TMDQU2 C8 D8 B_TMDQU2 C8 D8 DQU1 VSSQ_3 DQU1 VSSQ_3
DQU2 VSSQ_4 DQU2 VSSQ_4 B_TMDQL0 AR6 AA3 D_TMDQL0 C_TMDQU2 C8 D8 D_TMDQU2 C8 D8
A_TMDQU3 C2 E2 B_TMDQU3 C2 E2 A_DQ[16] B_DQ[16] DQU2 VSSQ_4 DQU2 VSSQ_4
DQU3 VSSQ_5 DQU3 VSSQ_5 B_TMDQL1 AR8 AC3 D_TMDQL1 C_TMDQU3 C2 E2 D_TMDQU3 C2 E2
A_TMDQU4 A7 E8 B_TMDQU4 A7 E8 A_DQ[17] B_DQ[17] DQU3 VSSQ_5 DQU3 VSSQ_5
DQU4 VSSQ_6 DQU4 VSSQ_6 B_TMDQL2 AT5 AA2 D_TMDQL2 C_TMDQU4 A7 E8 D_TMDQU4 A7 E8
A_TMDQU5 A2 F9 B_TMDQU5 A2 F9 A_DQ[18] B_DQ[18] DQU4 VSSQ_6 DQU4 VSSQ_6
DQU5 VSSQ_7 DQU5 VSSQ_7 B_TMDQL3 AU8 AD1 D_TMDQL3 C_TMDQU5 A2 F9 D_TMDQU5 A2 F9
A_TMDQU6 B8 G1 B_TMDQU6 B8 G1 A_DQ[19] B_DQ[19] DQU5 VSSQ_7 DQU5 VSSQ_7
DQU6 VSSQ_8 DQU6 VSSQ_8 B_TMDQL4 AR5 Y3 D_TMDQL4 C_TMDQU6 B8 G1 D_TMDQU6 B8 G1
A_TMDQU7 A3 G9 B_TMDQU7 A3 G9 A_DQ[20] B_DQ[20] DQU6 VSSQ_8 DQU6 VSSQ_8
DQU7 VSSQ_9 DQU7 VSSQ_9 B_TMDQL5 AR9 AD3 D_TMDQL5 C_TMDQU7 A3 G9 D_TMDQU7 A3 G9
A_DQ[21] B_DQ[21] DQU7 VSSQ_9 DQU7 VSSQ_9
B_TMDQL6 AU5 AA1 D_TMDQL6
A_DQ[22] B_DQ[22]
B_TMDQL7 AT8 AD2 D_TMDQL7
A_DQ[23] B_DQ[23]
B_TMDML AT7 AC2 D_TMDML
A_DQM[2] B_DQM[2]
B_TMDQSL AT6 AB2 D_TMDQSL
A_DQS[2] B_DQS[2]
B_TMDQSLB AR7 AB3 D_TMDQSLB +1.5V_DDR_S +1.5V_DDR_S
A_DQSB[2] B_DQSB[2]
+1.5V_DDR_S +1.5V_DDR_S
R1007 22 AM10 AC4 R1053

AB_TMCK B_MCK B_TMDQU0 A_DQ[24] B_DQ[24] D_TMDQU0 C1062 1K
C1020 R1026 AP7 W6 C1066 C1068 C1072 C1078 C1080 C1084 C1090 C1092 C1096 R1043 22
C1025 C1028 C1031 C1034 C1038 C1041 C1046 C1050 C1054 R1008 22 1K B_TMDQU1 B_DQ[25] D_TMDQU1 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF CD_TMCK D_MCK 1%
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF AB_TMCKB A_DQ[25] 16V 16V 16V 16V 16V 16V 16V 16V 16V
16V 16V 16V 16V 16V 16V 16V 16V 16V B_MCKB 1% B_TMDQU2 AN11 AC6 D_TMDQU2 10V R1044 22
10V R1009 22 A_DQ[26] B_DQ[26] CD_TMCKB CD_TMRESETB
AB_TMCSB1 B_TMDQU3 AP6 Y4 D_TMDQU3 D_MCKB
B_TMCSB1 AB_TMRESETB A_DQ[27] B_DQ[27] R1047 22
R1010 22 B_TMDQU4 AN10 AC5 D_TMDQU4 CD_TMCSB1
AB_TMCSB0 A_DQ[28] B_DQ[28] D_TMCSB1
A_TMCSB0 B_TMDQU5 AN7 Y5 D_TMDQU5 +1.5V_DDR_S R1048 22 C_TMCKE
R1024 0 A_DQ[29] B_DQ[29] CD_TMCSB0
AB_TMCKE A_TMCKE B_TMDQU6 AP10 AB6 D_TMDQU6 C_TMCSB0 OPT
A_TMCKE A_DQ[30] B_DQ[30] R1049 0 R1054 C1146 C1148 C1150
R1025 22 OPT B_TMDQU7 AN8 Y6 D_TMDQU7 CD_TMCKE 1K 0.01uF 0.01uF 0.01uF
A_TMCKE R1027 C1142 C1143 C1144 A_DQ[31] B_DQ[31] C_TMCKE 50V 50V 50V
B_MCKE 1K 0.01uF 0.01uF 0.01uF B_TMDMU AN9 AA6 D_TMDMU R1050 22 1%
50V 50V A_DQM[3] B_DQM[3] C1063 C1067 C1069 C1073 C1079 C1081 C1085 C1091 C1093 C1097 C_TMCKE
1% 50V AM8 AA5
B_TMDQSU B_DQS[3] D_TMDQSU 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF D_MCKE
A_DQS[3] 16V 16V 16V 16V 16V 16V 16V 16V 16V
B_TMDQSUB AM9 AB5 D_TMDQSUB 10V
+1.5V_DDR_S A_DQSB[3] B_DQSB[3]
K33
C1021 C1026 C1029 C1032 C1035 C1039 C1042 C1047 C1051 C1055 NC_1
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF K35
16V 16V 16V 16V 16V 16V 16V 16V 16V NC_2
10V K32
NC_3
L34
NC_4
L36
NC_5
J33
NC_6
K37
NC_7
J32
NC_8
J35
NC_9
H32
+1.5V_DDR +1.5V_DDR_S NC_10
M36
NC_11
K36
L1003 NC_12
M32
BLM15PX121SN1 NC_13
H33
NC_14
J36
OPT NC_15
L1004 N32
BLM15PX121SN1 NC_16
L32
C1151 C1152 C1153 NC_17
22uF 10uF 10uF L35
NC_18
16V 10V 10V L33
NC_19
P33
NC_20
P34
NC_21
M33
NC_22
N33
NC_23
M35
NC_24
H34
NC_25
N37
NC_26
N36
NC_27
H35
NC_28
H37
NC_29
IC1003 T35
+1.5V_DDR
UR5512G-SH2-R [EP]GND NC_30
R36
NC_31
U36
NC_32
VIN NC_3 P35
1 8 NC_33
C1027 V36
THERMAL
NC_34
10uF N35
10V GND NC_2 NC_35
9
R1011 2 7 U35
100K +3.3V_NORMAL NC_36
1% P36
NC_37
VREF VCNTL R35
3 6 NC_38
T37
NC_39
R1012
100K
C1022
0.1uF
VOUT
4
2A 5
NC_1 C1045
1uF
NC_40
T36
1% 16V 10V
R33
NC_41
V32
NC_42
P32
VTT_0.75V NC_43
V33
NC_44
T32
NC_45
W32
NC_46
C1030 C1033 C1036 R32
NC_47
10uF 10uF 10uF U32
10V 10V 10V NC_48
U33
NC_49
U34
NC_50
T33
NC_51
AA35
NC_52
W35
NC_53
AB36
NC_54
W37
NC_55
AB35
NC_56
V35
NC_57
AB37
NC_58
W36
NC_59
Y36
NC_60
AA36
MIU0 : CPU, GraphicEngine, FrameBuffer0 NC_61
NC_62
Y35
MIU1 : OD,FrameBuffer1 NC_63

Y32
AC34
NC_64
W33
NC_65
AC32
NC_66
Y33
NC_67
AC33
NC_68
Y34
NC_69
AB33
NC_70
AA33
NC_71
AB32
NC_72
AA32
NC_73

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR 3 13
+0.95V_VDDC
IC100 +3.3V_SCALER AVDD_DPRX
MST9U03V4 AVDD_DPRX L2009
BLM15PX121SN1
K16 N7 C2047 C2062 C2075 C2090 C2100
SCALER_GND
VDD_1 AVDD_DPRX_1 22uF 10uF 0.1uF 0.1uF 0.1uF
K17 P7
VDD_2 AVDD_DPRX_2 16V 10V 16V 16V 16V
L15 AVDD33
VDD_3
L16 U8
VDD_4 AVDD33_4 AVDD_HDMIRX
L17 L2010
VDD_5 BLM15PX121SN1
M15 Y27
VDD_6 AVDD_EDPTX_2
M16 AA27
VDD_7 AVDD_EDPTX_1 C2056 C2072 C2084
M17 AVDD_HDMIRX 22uF 0.1uF 0.1uF
VDD_8
N15 J12 16V 16V 16V
VDD_9 AVDD_HDMIRX_1
N16 J13
VDD_10 AVDD_HDMIRX_2
N17 AVDD33 AVDD33
VDD_11 L2011
P15 J11
VDD_12 AVDD33_3 BLM15PX121SN1
P16
VDD_13
P17 H28 C2048 C2063 C2076 C2091 C2101 C2110 C2119 C2126 C2133 C2139
VDD_14 AVDD33_1 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
R15 H29
VDD_15 AVDD33_2 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
R16
VDD_16
R17 AG27
VDD_17 AVDD_MOD_1
R18 AG28
VDD_18 AVDD_MOD_2
T15 171120 LGR
VDD_19 To prevent Voltage drop, should be connected "Short"
T16 AG29
VDD_20 AVDD_LPLL
T17 VDDP C2057 C2073 C2085
VDD_21 22uF 0.1uF 0.1uF
T18 J8
VDD_22 VDDP_1 16V 16V 16V
K8
VDDP_2
+3.3V_SCALER
AVDD_PLL_C
AA10 L2013
AVDD_PLL_A AVDD_PLL_C BLM15PX121SN1
Y10
AVDD_PLL_B
T30
AVDD_PLL_C C2058 C2086
AVDD_USB 22uF 0.1uF
AE31 16V 16V
AVDD_USB
AVDD_XTAL
AD30 AVDD_USB
AVDD_XTAL L2014
N1
GND_663 BLM15PX121SN1
AA15
AA16
AA17
AA20
AA21
AA22
AA23
AA24
AA26
AA28
AA29
AA30
AA31
AA34
AB10
AB12
AB18
AB19
AB20
AB23
AB24
AB26
AB27
AB28
AB29
AB30
AB31
AC10
AC11
AC12
AC13
AC20
AC23
AC24
AC25
AC26
AC27
AC28
AC29
AC30
AC31
AC35
AC36
AC37
AD10
AD11
AD12
AD13
AD14
AD15
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD31
AD32
AD33
AD35
AE10
AE11
AE12
AE13
AE14
AE15
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AE26
AE27
AE28
AE29
AE30
AE32
AF10
AF11
AF12
AF13
AF14
AF15
AF18
AF19
AF20
AF21
AF22
AF23
AF25
AF26
AF27
AF28
AF29
AF30
AF31
AF32
AF35
AF36
AF37
AG10
AG11
AG12
AG13
AG14
AG15
AG16
AG17
AG18
AG19
AG21
AG22
AG23
AG24
AG25
AG26
AG30
AG31
AG32
AG33
AG35
AH10
Y26
Y28
Y29
Y30
Y31
Y37
AA4
AA7
AA8
AA9
AB7
AB8
AB9
AC1
AC7
AC8
AC9
AD4
AD7
AD8
AD9
AE7
AE8
AE9
AF1
AF7
AF8
AF9
AG4
AG7
AG8
AG9
AH7
AH8
AH9
+1.5V_DDR
C2059 C2087
GND_332
GND_333
GND_334
GND_335
GND_336
GND_337
GND_338
GND_339
GND_340
GND_341
GND_342
GND_343
GND_344
GND_345
GND_346
GND_347
GND_348
GND_349
GND_350
GND_351
GND_352
GND_353
GND_354
GND_355
GND_356
GND_357
GND_358
GND_359
GND_360
GND_361
GND_362
GND_363
GND_364
GND_365
GND_366
GND_367
GND_368
GND_369
GND_370
GND_371
GND_372
GND_373
GND_374
GND_375
GND_376
GND_377
GND_378
GND_379
GND_380
GND_381
GND_382
GND_383
GND_384
GND_385
GND_386
GND_387
GND_388
GND_389
GND_390
GND_391
GND_392
GND_393
GND_394
GND_395
GND_396
GND_397
GND_398
GND_399
GND_400
GND_401
GND_402
GND_403
GND_404
GND_405
GND_406
GND_407
GND_408
GND_409
GND_410
GND_411
GND_412
GND_413
GND_414
GND_415
GND_416
GND_417
GND_418
GND_419
GND_420
GND_421
GND_422
GND_423
GND_424
GND_425
GND_426
GND_427
GND_428
GND_429
GND_430
GND_431
GND_432
GND_433
GND_434
GND_435
GND_436
GND_437
GND_438
GND_439
GND_440
GND_441
GND_442
GND_443
GND_444
GND_445
GND_446
GND_447
GND_448
GND_449
GND_450
GND_451
GND_452
GND_453
GND_454
GND_455
GND_456
GND_457
GND_458
GND_459
GND_460
GND_461
GND_462
GND_463
GND_464
GND_465
GND_466
GND_467
GND_468
GND_469
GND_470
GND_471
GND_472
GND_473
GND_474
GND_475
GND_476
GND_477
GND_478
GND_479
GND_480
GND_481
GND_482
GND_483
GND_484
GND_485
GND_486
GND_487
GND_488
GND_489
GND_490
GND_491
GND_492
GND_493
GND_494
GND_495
GND_496
AC15 22uF 0.1uF
AVDD_DDR_A_1 16V 16V
AC16 A1 AH11
AVDD_DDR_A_2 A2
GND_1 GND_497
AH12
AC17 AVDD_XTAL A7
GND_2 GND_498
AH13
AVDD_DDR_A_3 L2015 A17
GND_3 GND_499
AH14
AC18 GND_4 GND_500
AVDD_DDR_A_4 BLM15PX121SN1 A22

A36
GND_5 GND_501
AH15
AH16
AC19 A37
GND_6 GND_502
AH17
AVDDL_HDMIRX AVDD_DDR_A_5 B1
GND_7 GND_503
AH18
AD17 C2060 C2088 B2
GND_8 GND_504
AH19
AVDD_DDR_A_6 22uF 0.1uF B7
GND_9 GND_505
AH20
GND_10 GND_506
B17 AH21
16V 16V B22
GND_11 GND_507
AH22
L23 B37
GND_12 GND_508
AH23
AVDDL_HDMIRX_1 C3
GND_13 GND_509
AH24
M23 W14 C4
GND_14 GND_510
AH25
AVDDL_HDMIRX_2 AVDD_DDR_B_5 VDDP C5
GND_15 GND_511
AH26
+0.95V_VDDC Y14 L2016 C7
GND_16 GND_512
AH27
AVDD_DDR_B_6 BLM15PX121SN1 C10
GND_17 GND_513
AH28
R13 AA13 C11
GND_18 GND_514
AH29
AVDDL_DPRX_1 AVDD_DDR_B_1 OPT C12
GND_19 GND_515
AH30
T13 AA14 C14
GND_20 GND_516
AH31
AVDDL_DPRX_2 AVDD_DDR_B_2 C2061 C2074 C2089 C15
GND_21 GND_517
AH32
U13 AB14 22uF 0.1uF 0.1uF C18
GND_22 GND_518
AH35
AVDDL_DPRX_3 AVDD_DDR_B_3 C19
GND_23 GND_519
AJ1
AVDDL AC14 16V 16V 16V C20
GND_24 GND_520
AJ7
AVDD_DDR_B_4 C21
GND_25 GND_521
AJ8
U11 +1.5V_DDR +0.95V_VDDC Ready on Bottom Side of Scaler C22
GND_26 GND_522
AJ9
AVDDL_3 C23
GND_27 GND_523
AJ10
DVDD_NODIE C24
GND_28 GND_524
AJ11
GND_29 GND_525
C25 AJ12
L13 N24 171106 LGR C26
GND_30 GND_526
AJ13
VDD_NODIE_1 AVDD_DDR_C_1 To prevent Voltage drop, should be connected "Short" C27
GND_31 GND_527
AJ14
M13 N25 C28
GND_32 GND_528
AJ15
VDD_NODIE_2 AVDD_DDR_C_2 C29
GND_33 GND_529
AJ16
AVDDL P24 C30
GND_34 GND_530
AJ17
AVDD_DDR_C_3 C31
GND_35 GND_531
AJ18
L25 R24 C35
GND_36 GND_532
AJ19
AVDDL_1 AVDD_DDR_C_4 C2054 C2069 C2082 C2095 C2105 C2114 C2121 C2128 C2134 D17
GND_37 GND_533
AJ20
L26 T24 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF D18
GND_38 GND_534
AJ21
AVDDL_2 AVDD_DDR_C_5 D19
GND_39 GND_535
AJ22
U24 16V 16V 16V 16V 16V 16V 16V 16V 16V D20
GND_40 GND_536
AJ23
AVDD_DDR_C_6 D21
GND_41 GND_537
AJ24
AB21 D31
GND_42 GND_538
AJ25
AVDDL_MOD_PREDRV_1 AVDD_DDR_LDO_AB E12
GND_43 GND_539
AJ26
AB22 E18
GND_44 GND_540
AJ27
AVDDL_MOD_PREDRV_2 E19
GND_45 GND_541
AJ28
AC21 AA18 C2070 C2083 C2096 C2106 C2115 C2122 C2129 C2135 E20
GND_46 GND_542
AJ29
AVDDL_MOD_PREDRV_3 AVDD_DDR_LDO_A AVDD_DDR_LDO_C 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF E21
GND_47 GND_543
AJ30
AC22 AA19 E31
GND_48 GND_544
AJ31
AVDDL_MOD_PREDRV_4 AVDD_DDR_LDO_B 16V 16V 16V 16V 16V 16V 16V 16V E37
GND_49 GND_545
AJ32
U23 F3
GND_50 GND_546
AJ35
AVDD_DDR_LDO_C GND_51 GND_547
C2041 +1.5V_DDR
F7 AK4
Y25 F12
GND_52 GND_548
AK7
AVDDL_EDPTX_3 0.47uF F18
GND_53 GND_549
AK8
AA25 AF16 6.3V OPT F19
GND_54 GND_550
AK9
AVDDL_EDPTX_1 AVDD_DDR_VBP_A_1 OPT OPT OPT C2136 F20
GND_55 GND_551
AK10
AB25 AF17 C2042 C2116 C2123 C2130 GND_56 GND_552
AVDDL_EDPTX_2 AVDD_DDR_VBP_A_2 0.1uF 0.1uF 0.1uF 0.1uF F21

GND_57 GND_553
AK11
0.47uF F30 AK12
AE16 6.3V 16V 16V 16V 16V F31
GND_58 GND_554
AK13
AVDD_DDR_VBN_A_1 F32
GND_59 GND_555
AK14
AE17 F34
GND_60 GND_556
AK15
AVDD_DDR_VBN_A_2 +1.5V_DDR F36
GND_61 GND_557
AK16
DVDD_DDR C2043 Ready on Bottom Side of Scaler G1
GND_62 GND_558
AK17
IC100
GND_63 GND_559
Y11 0.47uF 171106 LGR G2
GND_64 GND_560
AK18
6.3V G3 AK19
AVDD_DDR_VBP_B_2 To prevent Voltage drop, should be connected "Short" G6
GND_65 GND_561
AK20
AB16 AA11 C2044 G7
GND_66 GND_562
AK21
DVDD_DDR_A_1 AVDD_DDR_VBP_B_1 0.47uF G10
GND_67 GND_563
AK22
AB17 Y12 6.3V G12
GND_68 GND_564
AK23
DVDD_DDR_A_2 AVDD_DDR_VBN_B_2 OPT G13
GND_69 GND_565
AK24
W15 AA12 C2049 C2064 C2077 C2092 OPT C2111 G15
GND_70 GND_566
AK25
DVDD_DDR_B_1 AVDD_DDR_VBN_B_1 C2102 GND_71 GND_567
DVDD_DDR_C Y15 +1.5V_DDR 22uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF G16
GND_72 GND_568
AK26
DVDD_DDR_B_2 C2045 16V 10V 16V 16V 16V 16V

G17
GND_73 GND_569
AK27
P23 T27 0.47uF G18

GND_74 GND_570
AK28
6.3V G19 AK29
MST9U03V4
DVDD_DDR_C_1 AVDD_DDR_VBP_C_1 G20
GND_75 GND_571
AK30
R23 U27 C2046 Ready on Bottom Side of Scaler G21
GND_76 GND_572
AK31
C2001 DVDD_DDR_C_2 AVDD_DDR_VBP_C_2 0.47uF OPT DVDD_NODIE G25
GND_77 GND_573
AK32
0.47uF T26 6.3V L2019 G26
GND_78 GND_574
AK35
6.3V AVDD_DDR_VBN_C_1 BLM15PX121SN1 G27
GND_79 GND_575
AL7
AU22 U26 Ready on Bottom Side of Scaler G28
GND_80 GND_576
AL8
AVDD_DDR_VBP_A_CAP AVDD_DDR_VBN_C_2 G29
GND_81 GND_577
AL9
AU23 OPT G30
GND_82 GND_578
AL10
AVDD_DDR_A_CAP OPT C2066 C2079 G31
GND_83 GND_579
AL11
AT22 AVDD15 C2051 1uF 0.1uF G32
GND_84 GND_580
AL12
AVDD_DDR_VBN_A_CAP 22uF G33
GND_85 GND_581
AL13
C2000 C2002 C2009 AF24 16V 10V 16V G34
GND_86 GND_582
AL14
0.47uF 0.47uF 0.47uF AVDD15_MOD AVDDL G35
GND_87 GND_583
AL15
6.3V 6.3V W1 AVDD_DDR_MOD L2020 H6
GND_88 GND_584
AL16
6.3V AVDD_DDR_VBP_B_CAP Mstar Request Ready on Bottom Side of Scaler GND_89 GND_585
Y1 AG20 BLM15PX121SN1 170727, 0.1uF->1uF
H7
H17
GND_90 GND_586
AL17
AL18
AVDD_DDR_B_CAP AVDD_DDR_MOD H18
GND_91 GND_587
AL19
W2 OPT H19
GND_92 GND_588
AL20
AVDD_DDR_VBN_B_CAP C2055 C2071 C2098 C2108 C2117 C2124 OPT C2137 H20
GND_93 GND_589
AL21
C2007 C2014 C2131 GND_94 GND_590
C2003 0.47uF 0.47uF 22uF 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF H21
GND_95 GND_591
AL22
GND
0.47uF 6.3V 6.3V G37 63V 16V 16V 16V 16V 16V 16V 16V
H25
GND_96 GND_592
AL23
6.3V AVDD_DDR_VBP_C_CAP
H26
H27
GND_97 GND_593
AL24
AL25
F37 H30
GND_98 GND_594
AL26
AVDD_DDR_C_CAP 170717 LGR H31
GND_99 GND_595
AL27
G36 OPT H36
GND_100 GND_596
AL28
AVDD_DDR_VBN_C_CAP Ripple Current Check OK!! C2099 C2109 C2118 C2125 C2132 C2138 OPT C2141 J3
GND_101 GND_597
AL29
C2008 C2013 C2140 GND_102 GND_598
0.47uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF J6

GND_103 GND_599
AL30
0.47uF 16V 16V 16V 16V 16V 16V 16V 16V
J7 AL31
6.3V 6.3V J9
GND_104
GND_105
GND_600
GND_601
AL32
J10 AL33
GND_106 GND_602
J17 AL34
GND_107 GND_603
Ready on Bottom Side of Scaler J18
GND_108 GND_604
AL35
J19 AL36
DVDD_DDR J20
GND_109 GND_605
AL37
+1.5V_DDR L2021 J21
GND_110 GND_606
AM1
GND_111 GND_607
BLM15PX121SN1 J24
J25
GND_112 GND_608
AM7
AM21
GND_113 GND_609
171120 LGR J26
GND_114 GND_610
AM22
J27 AM23
To prevent Voltage drop, should be connected "Short" C2052 C2067 C2080 C2093 C2103 C2112 OPT OPT J28
GND_115 GND_611
AM24
22uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF C2120 C2127 J29
GND_116 GND_612
AM27
OPT OPT OPT 0.1uF 0.1uF J30

GND_117 GND_613
AM28
C2004 C2010 C2015 C2018 C2020 C2022 C2024 C2027 C2029 C2031 C2036 16V 10V 16V 16V 16V 16V 16V 16V J31
GND_118 GND_614
AM30
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF J34
GND_119 GND_615
AM31
16V 16V 16V K3

GND_120 GND_616
AN6
10V 16V 16V 16V 16V 16V 16V 16V DVDD_DDR_C Ready on Bottom Side of Scaler K6
GND_121 GND_617
AN22
L2022 K7
GND_122 GND_618
AN27
GND_123 GND_619
Ready on Bottom Side of Scaler BLM15PX121SN1 K9
K10
GND_124 GND_620
AN28
AN30
GND_125 GND_621
K11 AN34
GND_126 GND_622
K18 AP4
C2053 C2068 C2081 C2094 OPT OPT K19
GND_127 GND_623
AP5
22uF 0.1uF C2104 C2113 GND_128 GND_624
OPT 10uF 0.1uF 0.1uF 0.1uF
K20
GND_129 GND_625
AP9
C2005 C2011 C2016 C2019 C2021 C2023 C2025 C2028 C2030 OPT C2037 16V 10V 16V 16V 16V 16V
K21
GND_130 GND_626
AP12
C2032 K22
GND_131 GND_627
AP15
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF K24
GND_132 GND_628
AP18
10V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V Ready on Bottom Side of Scaler K25
K26
GND_133 GND_629
AP21
AP22
GND_134 GND_630
K27 AP28
AVDDL_HDMIRX K28
GND_135 GND_631
AP31
L2100 K29
GND_136 GND_632
AR1
GND_137 GND_633
BLM15PX121SN1 K30
K31
GND_138 GND_634
AR4
AR21
L2002 AVDD_DDR_MOD L7
GND_139 GND_635
AR22
GND_140 GND_636
BLM15PX121SN1 C2143 C2144 C2145
L8
L9
GND_141 GND_637
AR27
AR34
GND_142 GND_638
OPT 22uF 0.1uF 0.1uF L10
GND_143 GND_639
AR35
L11 AT1
C2006 C2012 C2017 16V 16V 16V L12
GND_144 GND_640
AT4
GND_145 GND_641
0.1uF 0.1uF 0.1uF L20
GND_146 GND_642
AT21
L21 AT23
16V 16V 16V L22
GND_147 GND_643
AT26
GND_148 GND_644
L27 AT28
GND_149 GND_645
L28 AT30
Ready on Bottom Side of Scaler L29
GND_150 GND_646
AT32
GND_151 GND_647
L30 AT36
GND_152 GND_648
L31 AT37
GND_153 GND_649
L37 AU1
GND_154 GND_650
M1 AU2
L2004 AVDD_DDR_LDO_AB M2
GND_155 GND_651
AU4
GND_156 GND_652
AVDD_DDR_LDO BLM15PX121SN1 M3
M6
GND_157 GND_653
AU7
AU10
GND_158 GND_654
M7 AU13
OPT M8
GND_159 GND_655
AU16
C2026 C2033 C2038 M9
GND_160 GND_656
AU19
GND_161 GND_657
0.1uF 0.1uF 0.1uF M10
GND_162 GND_658
AU26
M11 AU29
16V 16V 16V M18
GND_163 GND_659
AU31
GND_164 GND_660
M19 AU36
GND_165 GND_661
M20 AU37
GND_166 GND_662
L2005 AVDD_DDR_LDO_C
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_201
GND_202
GND_203
GND_204
GND_205
GND_206
GND_207
GND_208
GND_209
GND_210
GND_211
GND_212
GND_213
GND_214
GND_215
GND_216
GND_217
GND_218
GND_219
GND_220
GND_221
GND_222
GND_223
GND_224
GND_225
GND_226
GND_227
GND_228
GND_229
GND_230
GND_231
GND_232
GND_233
GND_234
GND_235
GND_236
GND_237
GND_238
GND_239
GND_240
GND_241
GND_242
GND_243
GND_244
GND_245
GND_246
GND_247
GND_248
GND_249
GND_250
GND_251
GND_252
GND_253
GND_254
GND_255
GND_256
GND_257
GND_258
GND_259
GND_260
GND_261
GND_262
GND_263
GND_264
GND_265
GND_266
GND_267
GND_268
GND_269
GND_270
GND_271
GND_272
GND_273
GND_274
GND_275
GND_276
GND_277
GND_278
GND_279
GND_280
GND_281
GND_282
GND_283
GND_284
GND_285
GND_286
GND_287
GND_288
GND_289
GND_290
GND_291
GND_292
GND_293
GND_294
GND_295
GND_296
GND_297
GND_298
GND_299
GND_300
GND_301
GND_302
GND_303
GND_304
GND_305
GND_306
GND_307
GND_308
GND_309
GND_310
GND_311
GND_312
GND_313
GND_314
GND_315
GND_316
GND_317
GND_318
GND_319
GND_320
GND_321
GND_322
GND_323
GND_324
GND_325
GND_326
GND_327
GND_328
GND_329
GND_330
GND_331
BLM15PX121SN1
OPT
M21
M22
M24
M25
M26
M27
M28
M29
M30
M31
M34
N2
N6
N8
N9
N10
N11
N18
N19
N20
N21
N22
N26
N27
N28
N29
N30
N31
P6
P8
P9
P10
P11
P14
P18
P19
P20
P21
P22
P26
P27
P28
P29
P30
P31
P37
R6
R7
R8
R9
R10
R11
R12
R14
R19
R20
R21
R22
R25
R26
R27
R28
R29
R30
R31
R34
T3
T6
T7
T8
T9
T10
T11
T12
T14
T19
T20
T21
T22
T28
T29
T31
U7
U9
U10
U14
U15
U16
U17
U18
U19
U20
U21
U22
U25
U28
U29
U30
U31
U37
V1
V2
V6
V7
V8
V9
V10
V12
V13
V14
V15
V16
V17
V18
V19
V20
V21
V22
V23
V24
V25
V26
V27
V28
V29
V30
V31
V34
W3
W4
W5
W7
W8
W9
W10
W12
W13
W17
W18
W19
W20
W21
W22
W23
W24
W25
W26
W27
W28
W29
W30
W31
Y2
Y7
Y8
Y9
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
C2034 C2142 C2039
0.1uF 0.1uF 0.1uF
16V 16V 16V
L2006 AVDD15
BLM15PX121SN1
C2035
0.1uF
16V
OPT
C2040
0.1uF
16V
Ready on Bottom Side of Scaler

SCALER_PWR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SOC Power/GND 4 13
AUDIO AMP: Full Range
MODULE-eDP(4K)
P502
IC100 05030HR-H30C1(G)
+3.3V_AMP +20V_AMP
MST9U03V4
L501 1
BLM15PX121SN1 F33
OPT HP_NMUTE GPIO_A0/MUTE
R523 R527 D30 2
4.7K 0 L503 FP_I2S_BCLK GPIO_A1/AUBCK
BLM15PX121SN1 P500 D28
FP_I2S_DATA GPIO_A2/AUSD0 3
R503 C512 120-ohm 250A1-WR-H04M F29
0 10uF AMP_3.3V_ON GPIO_A3/AUSD1
10V C517 Idc: 2.4A E29
AMP_RESET_N 22000pF L504 AMP_RESET_N 4
JP505 GPIO_A4/AUSD2
50V 10.0uH F26 AE36
AMP_RESET_N AMP_NMUTE GPIO_A5/AUSD3 DP
F28 AE35 4K_EDP_TX3N 5
C503 FP_I2S_BCLK 4 SPK_L+
R507 R537 FP_I2S_WS GPIO_A6/AUWS DM
4.7K 1000pF 10 E28 AE33
VDD_IO
GND_IO
PGND1A
PVDD1A
PVDD1B
50V C543 JP506 FP_I2S_MCLK VBUS 4K_EDP_TX3P 6
R547 GPIO_A7/AUMCK
0.1uF D9 AE34
RESET
BST1A
OUT1A
C525 C526 C530 50V 4.7K 3 SPK_L- OPT GPIO_A8/SPDIFO CID 7
[EP]
4.7uF 4.7uF 390pF R500
50V 50V 50V C540
BCK
JP507 0
0.47uF 4K_EDP_TX2N 8
AD
50V
C531 2 SPK_R+
390pF C544 R548 E30 4K_EDP_TX2P 9
50V 0.1uF 4.7K JP508 AMP_20V_ON GPIO_A9
Close to IC 10 Idc: 2.4A 50V E25
R538 SYS_WP GPIO_A10 10
L505 1 SPK_R-
10.0uH D27
40
39
38
37
36
35
34
33
32
31
HP_3.3V_ON GPIO_A11 11
F27 4K_EDP_TX1N
5V_ST_ON GPIO_A12
E27
NC_1 1 30 OUT1B WAFER-ANGLE PANEL_ON
F25
GPIO_A13 4K_EDP_TX1P 12
3.3V_NORMAL_ON GPIO_A14 13
D10
VDD_PLL 2 29 PGND1B C532
22000pF
USB_HUB_ON
E24
GPIO_A15 +3.3V_NORMAL
THERMAL 50V MULTI_PWR_ON GPIO_A16/ARCTX 4K_EDP_TX0N 14
C507
1uF
NC_2 3 41 28 BST1B OPT OPT 4K_EDP_TX0P 15
10V C528 R504 R519
1uF AF33 C583
GND 4 27 VDR1 10V NC_130
AF34
0.1uF
16V
100K 100K 16
NC_131 17
AH34 4K_EDPTX_AUXP
NC_3 5 IC500 26 NC_5 NC_132
AG34 18
NC_133 4K_EDPTX_AUXN
AH33 OPT OPT
C506
1uF
10V
DVDD 6 DTA2010AM 25 AGND NC_134
AJ33 C584
0.1uF
R505
100K
R520
100K 19
C529 NC_135 R552
1uF AJ34 16V 0
FP_I2S_DATA SDATA 7 24 VDR2 10V
E34
NC_136
AK33
EDP_HPD_4K 20
NC_90 NC_137 R599 21

F35 100K
FP_I2S_WS WCK 8 23 BST2A E36
NC_91
AP29 22
NC_92 AUXTX0P
D37 AP30
NC_4 9 22 PGND2A C533
22000pF D36
NC_93 AUXTX0N 23
50V NC_94
C37 AP34
AUD_AMP_SDA
AUD_AMP_SDA SDA 10 21 OUT2A C36
NC_95 NC_138
AP33 +10V_PANEL
24
NC_96 NC_139 25
C502 B36 AN33
22pF NC_97 NC_140
11
12
13
14
15
16
17
18
19
20
50V A35 AM33 26
Idc: 2.4A NC_98 NC_141
L506 B35 AN32
10.0uH NC_99 NC_142 27
C34 AM32
NC_100 NC_143
R539 D35 AN31 28
SCL
FAULT
MONITOR_0
MONITOR_1
MONITOR_2
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A
10 NC_101 NC_144
C545 R549 AP32
0.1uF 4.7K NC_145 29
C534 50V
C550 C527 390pF AM29
4.7uF 4.7uF 50V C541 AUXTX1P 30
50V 50V 0.47uF D34 AN29
AUD_AMP_SCL 50V NC_102 AUXTX1N
AUD_AMP_SCL C535 E35 OPT OPT
AMP_MUTE 390pF C546 R550 JP504 R518 R521 31
50V NC_103
0.1uF 4.7K A34 AG36 10K 10K
C501 C518 Close to IC R540 Idc: 2.4A 50V NC_104 EDP2_TX0P
22pF +3.3V_HP 22000pF 10 L507 B34 AG37
50V 50V 10.0uH NC_105 EDP2_TX0M JP509
A33 AH36
TP501
TP502
TP500
NC_106 EDP2_TX1P
B33 AH37
NC_107 EDP2_TX1M
L500 A32 AJ36
+3.3V_NORMAL BLM15PX121SN1 NC_108 EDP2_TX2P
B32 AJ37
HP_LOUT_HP NC_109 EDP2_TX2M
A31 AK36
HP_ROUT_HP NC_110 EDP2_TX3P
AUD_AMP_SCL H/P OUT B31 AK37
LINE_OUT_R
NC_111 EDP2_TX3M
C509 C513 E33
[EP]DGND
OPT 1000pF 1uF NC_112

R501 50V 10V JK500 D33 AM34
AVDD_2
10K C538 PJ-3517HAGR NC_113 AUXTX2P

C521 AM35
AGND
VREF
NC_6
NC_5
R502 4.7uF 22uF JP501 AUXTX2N

100 25V 16V R542
171106 LGR 5.1 E_SPRING 3
Change GND by vendor guide HP_ROUT_HP AM37 C575 0.1uF 16V
AMP_NMUTE C500 Before: AGND C522 R545 EDP3_TX0P 4K_EDP_TX0P
24
23
22
21
20
19
0.1uF C548 A30 AM36 C576 0.1uF 16V

1000pF After : DGND 16V 47K VR500 T_TERMINAL1 6A NC_114 EDP3_TX0M 4K_EDP_TX0N
50V LINE_OUT_L NC_4 220pF 10pF B30 AN37
1 18 50V 18V C577 0.1uF 16V
By request of SW Team NC_115 EDP3_TX1P 4K_EDP_TX1P
C510 C514 THERMAL A29 AN36 C578 0.1uF 16V
2017. 4. 20 1000pF 1uF AVDD_1 25 NC_3 C523 B_TERMINAL1 7A NC_116 EDP3_TX1M 4K_EDP_TX1N
50V 10V 2 17 1uF B29 AP37 C579 0.1uF 16V
OPT NC_1 CDEPOP 10V NC_117 EDP3_TX2P 4K_EDP_TX2P
R512 R513 R_SPRING A28 AP36 C580 0.1uF 16V
0 0 3 IC501 16 4 NC_118 EDP3_TX2M 4K_EDP_TX2N
C539 B28 AR37
NC_2 OSC_EN 22uF JP502 C581 0.1uF 16V
4 ALC5629 15 16V R543 NC_119 EDP3_TX3P 4K_EDP_TX3P
R514 5.1 T_SPRING A27 AR36 C582 0.1uF 16V
0 LRCK SDA 5 NC_120 EDP3_TX3M 4K_EDP_TX3N
FP_I2S_WS HP_LOUT_HP B27
5 14 NC_121
R515 R530 R546 AP35
0 BCLK SCLK 0 47K C549 VR501 B_TERMINAL2 7B AUXTX3P 4K_EDPTX_AUXP
FP_I2S_BCLK 6 13 220pF 10pF AN35
C511 C515 50V 18V AUXTX3N 4K_EDPTX_AUXN
10
11
12
22pF 22pF
7
50V 50V 171101 LGR T_TERMINAL2 6B

To improve H/P Noise, A26
SDAC
XTI
XTO
DGND
DCVDD
DBVDD
OSC_EN is set "GND" NC_122

+3.3V_NORMAL R516 JP503 SHIELD_PLATE B26
0 8 NC_123
FP_I2S_DATA A25
R517 NC_124
0 +3.3V_HP +3.3V_NORMAL B25 AT35
FP_I2S_MCLK NC_125 MOD_TX_N00
OPT OPT OPT
R578 C524 R528 A24 AU35
171106 LGR NC_126 MOD_TX_P00
10K 22pF 0 OPT AU34
Becuase of distance with SoC, 50V R544 R551 B24
OPT 470K 470K JP500 NC_127 MOD_TX_N01
R579 I made space shunt cap space A23 AT34
100 NC_128 MOD_TX_P01
HP_DET OPT B23 AT33
C547 VR502 NC_129 MOD_TX_N02
HP_NMUTE OPT 1uF 10pF AR33
C574 HP_AMP_SCL 10V 18V MOD_TX_P02
1000pF R553 AU32
50V HP_AMP_SDA MOD_TX_N03
1K C33 AR32
By request of SW Team HP_DET GPIO13 MOD_TX_P03
2017. 4. 20 D32 AT31 +3.3V_SCALER
HEADPHONE AMP (Digital) 5V_LED_LDO_EN GPIO12 MOD_TX_N04
AR31
MOD_TX_P04 OPT R555 10K
E32 AR30
GPIO14 MOD_TX_N05 AMP_RESET_N
C32 AT29 OPT R568 10K
CONTROL_LED GPIO15 MOD_TX_P05
R533 AR29 5V_LED_LDO_EN
0 MOD_TX_N06 OPT R571 10K
AU28
OPT
L502
20V_AMP 3.3V_AMP 3.3V_HP_AMP MOD_TX_P06
MOD_TX_N07
AR28 OPT R572 10K
USB_HUB_ON
BLM15PX121SN1 AT27 PANEL_ON

+20V_AMP MOD_TX_P07 OPT R573 10K
+20V 5V_ST_ON
+3.3V_NORMAL +3.3V_AMP +3.3V_NORMAL +3.3V_HP R584 10K
OPT AT25
R511 OPT 3.3V_NORMAL_ON
OPT LOCKN0
0 R529 R541 AU25
0 0 HTPDN0
Q502 AR25
SSM3J332R Q506 LOCKN1
Q504 SSM3J332R AT24 OPT R558 10K
SSM3J332R
D
HTPDN1
S
USB_HUB_ON
D
S
S
OPT R559 10K

R509 C504 C505 C508 OPT
10K 1uF 1uF 1uF OPT R535 C536 C537 C542 PANEL_ON
R525 C516 C519 C520 AP26
G
50V 25V 50V 10K 1uF 1uF 10uF OPT R560 10K
+3.3V_NORMAL 10K 1uF 1uF 10uF NC_146
G
10V 10V 10V

G
10V 10V 10V AR26 5V_ST_ON

+3.3V_NORMAL +3.3V_NORMAL NC_147 OPT R562 10K
AN26
OPT R510 NC_148 3.3V_NORMAL_ON
R536 AM26 OPT R56310K
R574 15K R526 OPT NC_149
4.7K OPT 1K R576 1K AM25 MULTI_PWR_ON
R575 4.7K NC_150
C 4.7K AN25
R506 C C NC_151
4.7K B Q501 R522 R531 AP24
AMP_20V_ON 4.7K 4.7K B Q505 NC_152
MMBT3904(NXP) B Q503 HP_3.3V_ON AN24
AMP_3.3V_ON MMBT3904(NXP) OPT MMBT3904(NXP) NC_153
OPT R561 AR24
E HP AMP Power Load switch
R554
4.7K OPT 4.7K OPT
R532 E NC_154
R557 E (Improve Pd at DC-Off) AR23
4.7K 0 NC_155
OPT AMP_3.3V_ON AP23
R508 OPT OPT NC_156
4.7K R524 R534 AN23
4.7K 4.7K NC_157

AUDIO /
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. eDP Connector 5 13
PD,USB HUB POWER
MULTI POWER Switch
+20V USBPD_20V
(5A)
L600
UBW2012-121F
(5A)
L601
UBW2012-121F
OPT
Q602
MDD3752
D
OPT OPT OPT
R647 C643 C661 C662
10K 1uF 1uF 1uF
G
+3.3V_NORMAL 50V 25V 50V
OPT OPT
R642 R648
4.7K 15K 170825 LGR
FET Change for improvemnet thermal
OPT C
R645 OPT
4.7K
MULTI_PWR_ON
B Q601
MMBT3904(NXP)
USB DownPort VBUS Power
E 5V/1A(Max)X2ea = 2A(Max)
OPT
R646
4.7K R623
USBPD_20V 100
USBDN_VBUS_ON
OPT
Vout(9V) = 0.8 X (1+14k/1.36k) R605 C639
100K 0.1uF +5V_VBUS
Vout(15V) = 0.8 X (1+14k/0.79k)
USB PD POWER: 20V to 9V,15V (3A) 16V
IC604
USBPD_VBUS MP2315S Vout(5V) = 0.8 * (1+(R738/R739))
USBPD_20V Idc: 5.5A
Vout = 5.08V
H : 6.95*6.6*2.8mm
R604 R613
IC600 7.5K AAM FB 100K
1 8
C616 TPS54531DDA [EP]GND L602 Idc=4.2A
0.1uF 4.7uH
16V 4.7uH
IN VCC
2 7
BOOT PH L605
1 8 D600
NTSS5100 R653
0
C632
4.7uF
C658
4.7uF
C660
4.7uF
C663
0.1uF SW 3A EN
THERMAL
100V 25V 25V 25V 25V C619 C622 3 6 C645

VIN GND 4.7uF 0.1uF 0.1uF
9
2 7 50V 50V 16V R627

GND BST 51K
R606 4 5 OPT C650 C652 OPT 1%
C600 C604 C608 R616 C647
10 EN COMP 0.1uF 22uF 22uF ZD603
4.7uF 4.7uF 0.1uF 3 6 R612 100K 5.6V
16V 16V 16V
50V 50V 50V 100
R615
R1 14K
SS VSENSE R620
4 5 1% 0 C631
OPT
C612
0.1uF
C623 5A 5% C640 171116 LGR
12pF To meet Phase margin spec ( > 40 degree)
50V
0.1uF
50V R629
9.1K
16V 8200pF Change Resistor valude 171113 LGR
25V R621 1%
30K 62k : 30 degree When connect USB Device,
1% 30k : 49 degree Vdrop is represented.
C628 Apply Cap
R2 R607 R614 680pF
R617
5.6K 1.8K 1.87K 50V
1% 1% 1%
PD_EN R640
100
D R622 TBT_ON
Q600
G 10K
T2N7002AK 15VBUS_ON
R632 C636
C627 R652 100K 0.1uF
S 0.1uF 47K 16V +3.3V_TBT
16V
USB PD POWER: 20V to 5V(3A) IC603
MP2315S
C613
0.01uF Vout(5V) = 0.8 * (1+(R634/R637)) L614
50V Vout = 3.37V BLM15PX121SN1
USBPD_5V_A R626 R638
7.5K AAM FB 100K
1 8
Idc=4.2A
IC601 Idc: 5.5A
RT8289GSP [EP]GND H : 6.95*6.6*2.8mm IN VCC
2 7
L603 L613
BOOT SW 4.7uH Setting: 5.05V(=1.222*(1+47K/15K)) SW 3A EN C637
4.7uH
1 8 C611 C626 3 6
4.7uF 0.1uF 0.1uF
THERMAL
50V 50V 16V R650

C601 C605 C609 NC_1 VIN D601 C624 C629 C633 C641 GND BST 18K
9
4.7uF 4.7uF 0.1uF 2 7 10uF 10uF 10uF 0.1uF 4 5 OPT OPT

NTSS5100 C638 C644 C648 ZD601 1%
50V 50V 50V 100V 10V 10V 10V 16V R639
0.1uF 10uF 10uF 5V
R637 100K 10V
16V 10V
NC_2 GND 100
3 6
OPT
R600
FB
4
4A 5
EN
180K 171127 LGR
To solve wake-up issue,
171106 LGR
To meet Phase margin spec ( > 40 degree)
C635
0.1uF
change DC/DC enable 50V R651
OPT Apply 10uF Cap 5.6K
R601 10uF x 2EA : 20 degree 1%
47K 10uF x 3EA : 35.6 degree
OPT
C617 C620
0.1uF R618
R608 56pF 100 170826 LGR
47K 50V 16V
1% PD_EN USE PD_EN (DC/DC Enable)
171106 LGR
+3.3V_TBT Apply 10uF Cap
R609
15K 10uF x 2EA : 20 degree
OPT
R654
10K
1% 10uF x 3EA & Cff(56pF, C617) : 50.6 degree
HUB power 5V to 1.1V // 3.3V
171012 LGR
Resistor change (14k --> 15k)
+1.1V_HUB +3.3V_HUB +5V_STANDBY

USB PD POWER: 20V to 5V(3A) IC605
C614
0.01uF
50V R624 MP2122AGJ R644
USBPD_5V_B 24.9K 27K
R2 1%
R2 1%
IC602 Idc: 5.5A R628 R641

H : 6.95*6.6*2.8mm 200K FB2 FB1 200K
RT8289GSP [EP]GND 1 8
R625 R649
L604 20K R1 120K
4.7uH
Setting: 5.05V(=1.222*(1+47K/15K)) R1 1% EN2 IN 1%
BOOT SW 2 7
1 8
THERMAL
L606 L609
C602 C606 C610 NC_1 VIN D602 C625 C630 C634 C642 2.2uH SW2
2A SW1 2.2uH
9
4.7uF 4.7uF 0.1uF 2 7 NTSS5100 10uF 10uF 10uF 0.1uF 3 6

50V 50V 50V 100V 10V 10V 10V 16V
NC_2 GND
3 6 EN1 GND C655 C657
OPT OPT C603 C607 C615 C646 C649 OPT
R602 0.1uF
4 5 0.1uF 10uF C651 ZD602 10uF 0.1uF
ZD600 10uF
FB
4
4A 5
EN
180K 171127 LGR
To solve wake-up issue,
171106 LGR
2.5V 10V
10uF
10V 16V 16V 10V 10uF
10V
5V
10V 16V
OPT change DC/DC enable Apply 10uF Cap

R603 10uF x 2EA : 20 degree
47K 10uF x 3EA : 35.6 degree
OPT R633
C618 C621
R619 100
R610 56pF 0.1uF 100 USB_HUB_ON
47K 50V 16V
1% PD_EN 170826 LGR C653
USE PD_EN (DC/DC Enable) 0.1uF
16V
171106 LGR
+3.3V_TBT R611 To meet Phase margin spec ( > 40 degree)
15K Apply 10uF Cap Vout = 0.608 * (1+(R1/R2))
1%
10uF x 2EA : 20 degree
10uF x 3EA & Cff(56pF, C617) : 50.6 degree
Vout = 3.3V / 1.1V
OPT
R655
10K 171012 LGR
Resistor change (14k --> 15k)

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MULTI POWER 6 13
DC Jack 3.3V_Normal 20V to 3.3V_SCALER
+3.3V_NORMAL R705
+20V 100K
+3.3V_SCALER
JK700
DS439-F01T1BA-A OPT
L708 +20V
R700
BLM15PX121SN1 100K
4 JP701 120-ohm
4
+3.3V_SCALER
OPT Q700
2 2 JP702 C700 C701 C739 C749 SSM3J332R IC701 Vout(3.37V) = 0.8 X (1+R1/R2)
0.1uF 4.7uF 68uF 68uF
D
35V MP2315S
S
50V 50V 35V
105C 105C Idc: 4.2A
OPT
1 1 R728 C738 C740 C742 L705
10K 2.2uF 1uF 2.2uF R701 4.7uH
G
10V 25V 10V 7.5K AAM FB
1 8
R722
IN VCC R1 18K
R734 2 7 1%
1K
R717
C705
4.7uF
C710
SW
3
3A 6
EN 100K C724
0.1uF
16V
C728
10uF
10V
C730
10uF
10V
ZD700
5V
0.1uF
50V 50V
C
R730 GND BST R723
4 5 R711 C720 5.6K
4.7K
JP703
JP704
JP705
JP711
B Q701 20K 0.1uF R2

3.3V_NORMAL_ON MMBT3904(NXP) 16V 1%
OPT R708
R731 100
4.7K E
C716
0.1uF
50V
For Jig Test Core_0.95V_5A

R737
100
5V_ST_ON
OPT
C732
IC702
R732
100K 0.1uF
+5V_STANDBY MP8765GQ
16V
VIN SW_4
IC703 1 16
+20V MP2315S C702 C706 C709
4.7uF 4.7uF
Vout(5V) = 0.8 * (1+(R738/R739)) 50V 0.1uF PGND SW_3 171109 LGR
50V 50V 2 15
R727 R735 To meet SoC power sequence
7.5K AAM FB 100K Vout = 5.08V Apply C714
1 8
NC_1 AGND Vout=0.6*(1+R1/R2)
L706 4.2A 3 14
IN VCC 4.7uH 171106 LGR
2 7 R716 C714 R720
100K 0.47uF Change resistor value to meet spec
PG EN 6.3V 10
+3.3V_SCALER 4 13 Before R1 : 8.7k (0.948V)
C727 C729
SW 3A EN
C733 OPT
0.95V_ON
After R1 : 8.9k (0.956V)
3 6
4.7uF 0.1uF 0.1uF R703 NC_2 FB
50V 50V 16V R738 100K 5 12
GND BST 75K C713 R724
3.3K R2 +0.95V_VDDC
4 5 OPT OPT R714 1uF 1%
OPT 1%
R736
100K
C734
0.1uF
C735
10uF
C736
10uF
ZD702 0 MODE VCC 10V
R721 R1 R725
5.6V 6 11
R733 16V 10V 10V 510 C721 R726 15K
100 C719 5.6K
0.22uF R719 330pF 1% 1%
R718 16V 50V
VOUT BST 2.2 510K
C731 7 10
0.1uF 0.95V_Coil
R739 C712 L701
50V 0.1uF 2.2uH
14K SW_1 SW_2
16V 8 9
1%
C722 C723 C725 C726 ZD701

14A 22uF 22uF 22uF 0.1uF 2.5V
171107 LGR 16V 16V 16V 16V
To do publication of parts ,
Change component value
R718 : 4.7ohm --> 2.2ohm
OPT R710 R719 : 810K(1608 type) --> 510K(1005 type)
R704 100
100K +10V_PANEL 171106 LGR
PANEL_ON R745 Apply Zener Diode on SoC power
100
R706 OPT DDR_PD_CTRL
100K C708
0.1uF
16V OPT
C744
Vout(5V) = 0.8 *(1+(R713/R715)) R741
100K 0.1uF
Vout = 10.33V +20V 16V
+20V
IC700 Vout(1.5V) = 0.8 * (1+(R738/R739))
MP2315S Idc: 3.3A Vout = 1.55V
IC704 +1.5V_DDR
R702
9.1K L702 MP2315S
1% AAM FB 15uH
1 8 171120 LGR
R740 R743
7.5K AAM FB 100K To prevent Voltage drop, should be connected "Short"
R713 1 8
IN VCC R1 56K
2 7 1% OPT L712
C715 C717 C718 4.2A
0.1uF IN VCC 4.7uH
4.7uF 22uF
C703 C704
SW
3
3A 6
EN
R712
51K
16V
25V 63V
105C
2 7
4.7uF
50V
0.1uF
50V C737 C741
SW 3A EN C745
3 6
GND BST OPT R715 4.7uF 0.1uF 0.1uF
4 5 R709 C711 4.7K 50V 50V
0.1uF R2 16V R746
20K 16V 1% GND BST OPT OPT 14K
R707 4 5
100 R744 C746 C747 C748 1%
100K 0.1uF 10uF 10uF ZD703
HW SON : To improve MLCC Audiable noise R742 16V 10V 10V 2.5V
C707 100
0.1uF
50V
171102 LGR C743
To improve Phase Margin, change R712 resistor value 0.1uF
Before : 100k / Phase margin : 43 degree 50V R747
After : 51k / Phase margin : 54.4 degree 15K
1%
171012 LGR
Because of Voltage Drop,
Resistor change
R738 : 18K --> 14K
R739 : 20K --> 15K

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. 2018.01.16
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 32UK950
SCALER POWER 7 13
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PD Controller for TBT A port (TBT INPUT)
PD SPI De-bug POINT
1.CLK De-bug
TYPE-C_TBTA_VBUS 2.MOSI P801
USBPD_20V
3.MISO
4.CS 12507WS-06L
5.GND
6.GND
C802 C808 1
TBT_EE_CLK
4.7uF 4.7uF C821 C822 C823 C800 C801 D821
50V 50V 1uF 0.01uF 0.01uF 0.01uF 0.01uF 30V
50V 50V 50V 50V 50V SMFB23H
TBT_EE_DI 2
USBPD_VBUS TBT_EE_DO 3
R812 TBT_EE_CS_N 4
0.01
1W
1% Q800 Q801
C803 C809 C812 CSD16323Q3CSD16323Q3
5
4.7uF 4.7uF 0.1uF
USBPD_20V S_1 1 1 S_1
25V 25V 50V
S_2 2 2 S_2
R826
S_3 3 3 S_3
6
0.01 OPT OPT G 4 5 D D 5 4 G OPT OPT
IC800 IC800 1W R828 C832 C835 R838
1% 100K 4.7uF 4.7uF 100K 7
TPS65983B TPS65983B 50V 50V
USBPD_5V_A
A11 A1 L9 B10
PP_5V0_1 GND_1 AN_CC1_A C_CC1 SENSEP
OPT B11 B8 L10 A10
C804 C810 C813 PP_5V0_2 GND_2 AN_CC2_A C_CC2 SENSEN 170901 LGR
C11 D8 K9 B9 Change Cap value by request of Intel 170826 LGR
10uF 4.7uF 0.1uF C819 C820 PD_OUT_LDO_3.3V_A
PP_5V0_3 GND_3 220pF 220pF RPD_G1 HV_GATE1 (0.22uF --> 0.47uF) Change internal PD 3.3V power
10V 25V 16V D11 E5 50V K10 A9
PP_5V0_4 GND_4 50V RPD_G2 HV_GATE2 (PW_VCC3V3 --> PD_OUT_LDO_3.3V_A)
A6 E6 K6 H7 C829
PP_HV_1 GND_5 USB2_PA_P_TOP C_USB_TP SS 0.47uF
A7 E7 L6 6.3V
PP_HV_2 GND_6 USB2_PA_N_TOP C_USB_TN
+3.3V_TBT A8 E8 K7 E11 R827 1M 170911 LGR (10k --> 1M)
PP_HV_3 GND_7 USB2_PA_P_BOTTOM C_USB_BP MRESET OPT OPT OPT OPT
B7 F5 L7 F11 R835 R837 R839 R844 R845 R822 R861
PP_HV_4 GND_8 USB2_PA_N_BOTTOM C_USB_BN RESETZ TBT_RESET_N
H10 F6 K8 D6 10K 10K 10K 3.3K 3.3K 10K 10K
PP_CABLE GND_9 C_SBU1 HRESET R814 HRESET
H11 F7 L8 G2 15K
C805 VBUS_1 GND_10 C_SBU2 R_OSC 0.1%
10uF J10 F8 B2 R815 0 SIGNAL DEFINITION
C815 VBUS_2 GND_11 GPIO0 USBPD_AMSEL
10V J11 G5 F4 C2 USBPD_AMSEL : Alternate Mode Mux Config
1uF SWD_DAT R816 0 USBPD_EN R836
50V VBUS_3 GND_12 SWD_DAT GPIO1 1M USBPD_EN : Mux Enable
K11 G6 G4 D10 R817 0 R821
VBUS_4 GND_13 SWD_CLK SWD_CLK GPIO2 USBPD_POL USBPD_POL : Mux Control Based upon Cable Orientation
1M
G7 F2 G11 R818 0 ALT_MOD_DET : Display signal(DP) DET
GND_14 UART_S2P UART_RX GPIO3 ALT_MOD_DET
H1 G8 E2 C10
VIN_3V3 GND_15 UART_P2S UART_TX GPIO4 TBTA_HPD
B1 H4 R869 0 L5 E10
VDDIO GND_16 USB2_PA_P USB_RP_P GPIO5 PD_OUT_LDO_3.3V_A
H2 H5 R870 0 K5 G10
C806 VOUT_3V3 GND_17 USB2_PA_N USB_RP_N GPIO6 15VBUS_ON
1uF G1 H8 R803 R804 100K L4 D7
10V LDO_3V3 GND_18 1M LSX_R2P GPIO7 20VBUS_ON R846 170901
K1 L1 R805 100K K4 H6
LDO_1V8A GND_19 LSX_P2R GPIO8 USBPD_I2C_TBTB_IRQ2 10K Change resistor value by request of Intel
A2 R806 1M L2 F10
LDO_1V8D DEBUG1 BUSPOWERZ (100k --> 10k)
PD_OUT_LDO_3.3V_A E1 K2 D1
R807 1M R802 0 TBT_I2C_SDA
LDO_BMC DEBUG2 I2C_SDA1 OPT
R808 100K L3 D2 R801 0 R2854
DEBUG3 I2C_SCL1 TBT_I2C_SCL 0
R809 100K K3 C1
DEBUG4 I2C_IRQ1Z USBPD_I2C_TBTA_IRQ1
R810 100K J1 A5 R858 0
AUX_P I2C_SDA2 PD_I2C_SDA
R811 100K J2 B5 R851 0
AUX_N I2C_SCL2 PD_I2C_SCL
B6
I2C_IRQ2Z
L11 F1 R830 0
C807 C811 C814 C816 NC I2C_ADDR
10uF 2.2uF 2.2uF 2.2uF A3 R820 0
SPI_CLK TBT_EE_CLK
10V 10V 10V 10V B4 R800 0
SPI_MOSI TBT_EE_DI
A4 R823 0 PD_OUT_LDO_3.3V_A
SPI_MISO TBT_EE_DO
B3 R813 0 TBT_EE_CS_N
SPI_SSZ
DEBUG_CTL1
E4 R824 10K ALT_MOD : Low ALT_MOD : High
D5 R825 10K
DEBUG_CTL2
No Cable / C-DP Alt mode

POL : Low
C to A Cable
POL : High TBT Alt mode
PD Controller for TBT B port (TBT OUTPUT)

TYPE-C_TBTB_VBUS
C2812
25V C2813 C2814 C2815 C2816 D2800
1uF 0.01uF 0.01uF 0.01uF 0.01uF 30V
50V 50V 50V 50V SMFB23H
R2837
R2817 0
IC2800 IC2800 0
TPS65983B TPS65983B
USBPD_5V_B
OPT
R2836
A11 A1 L9 B10 0
PP_5V0_1 GND_1 BN_CC1_B C_CC1 SENSEP
OPT B11 B8 L10 A10
C2800 C2804 C2806 PP_5V0_2 GND_2 BN_CC2_B C_CC2 SENSEN 170901 LGR
C11 D8 C2810 C2811 K9 B9 Change Cap value by request of Intel
10uF 4.7uF 0.1uF 220pF 220pF
PP_5V0_3 GND_3 50V RPD_G1 HV_GATE1 (0.22uF --> 0.47uF)
10V 25V 16V D11 E5 50V K10 A9
PP_5V0_4 GND_4 RPD_G2 HV_GATE2 C2818
A6 E6 K6 H7
PP_HV_1 GND_5 USB2_PB_P_TOP C_USB_TP SS 0.47uF 170911 LGR (10k --> 1M)
+3.3V_TBT A7 E7 L6 6.3V
OPT PP_HV_2 GND_6 USB2_PB_N_TOP C_USB_TN
R2800 A8 E8 K7 E11 R2834 1M
0 PP_HV_3 GND_7 USB2_PB_P_BOTTOM C_USB_BP MRESET
B7 F5 L7 F11 OPT R2835 0
PP_HV_4 GND_8 USB2_PB_N_BOTTOM C_USB_BN RESETZ TBT_RESET_N
H10 F6 K8 D6 R2853 0
PP_CABLE GND_9 C_SBU1 HRESET HRESET
H11 F7 L8 G2 R2818 15K 0.1%
C2801 VBUS_1 GND_10 C_SBU2 R_OSC
10uF J10 F8 B2
C2808 VBUS_2 GND_11 GPIO0 USBPD_AMSEL_2
10V 1uF J11 G5 F4 C2
25V VBUS_3 GND_12 SWD_DAT SWD_DAT GPIO1 USBPD_EN_2
K11 G6 G4 D10
VBUS_4 GND_13 SWD_CLK SWD_CLK GPIO2 USBPD_POL_2
G7 F2 G11 PD_OUT_LDO_3.3V_B
GND_14 UART_P2S UART_RX GPIO3 ALT_MOD_DET_2
H1 G8 E2 C10 OPT OPT
VIN_3V3 GND_15 UART_S2P UART_TX GPIO4 TBTB_HPD R2820 R2819 R2822 R2821
B1 H4 R2802 0 L5 E10 R2801 1M 1M 1M 1M 1M
VDDIO GND_16 USB2_PB_P USB_RP_P GPIO5
H2 H5 R2803 0 K5 G10 R2825 1M
C2802 VOUT_3V3 GND_17 USB2_PB_N USB_RP_N GPIO6 170901
1uF G1 H8 R2808 R2809 100K L4 D7 R2824 1M R2844 R2843
10V LDO_3V3 GND_18 1M LSX_R2P GPIO7 10K 10K Change resistor value by request of Intel
K1 L1 R2810 100K K4 H6 R2826 1M
LDO_1V8A GND_19 LSX_P2R GPIO8 (100k --> 10k)
A2 R2811 1M L2 F10
PD_OUT_LDO_3.3V_B LDO_1V8D DEBUG1 BUSPOWERZ
E1 R2812 1M K2 D1
LDO_BMC DEBUG2 I2C_SDA1 TBT_I2C_SDA
R2813 100K L3 D2
DEBUG3 I2C_SCL1 TBT_I2C_SCL
R2814 100K K3 C1
DEBUG4 I2C_IRQ1Z USBPD_I2C_TBTB_IRQ1
R2815 100K J1 A5
AUX_P I2C_SDA2 PD_I2C_SDA
R2816 100K J2 B5
AUX_N I2C_SCL2 PD_I2C_SCL
B6
I2C_IRQ2Z OPT USBPD_I2C_TBTB_IRQ2
L11 F1 R2827 0
C2803 C2805 C2807 C2809 NC I2C_ADDR OPT
10uF 2.2uF 2.2uF 2.2uF A3 R2828 100K R2855
SPI_CLK 0
10V 10V 10V 10V B4 R2829 100K PD_OUT_LDO_3.3V_B
SPI_MOSI
A4 R2830 100K
SPI_MISO
B3 R2831 3.3K
SPI_SSZ
E4 R2832 10K
DEBUG_CTL1
D5 R2833 10K
DEBUG_CTL2

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB-PD 8 13
USB-PD
IC900 IC900
TITANRIDGE DD TITANRIDGE DD
TBT_SRC_HPD R912 100K
R931 DG_PM_S0_EN R913 100K
0 B21 Y18 W1 R914 100K
TBTA_RX1_P ASSRXP1 TBT_EE_DI GPIO_0 DG_PM_S3_EN
R937 A21 AC7 EE_DI GPIO_0
0 W16 W2 TBT_TMU_CLK_OUT R915 100K
TBTA_RX1_N ASSRXN1 DPSNK1_ML0_P TBT_EE_DO EE_DO GPIO_1 GPIO_1 OPT R916 2.2K
C900 AB7 W18 Y1
0.22uF DPSNK1_ML0_N TBT_EE_CS_N TBT_TMU_CLK_OUT TBT_TMU_CLK_IN
A19 EE_CS_N TMU_CLKOUT
16V Y16 Y2 DG_FORCE_PWR R917 100K
TBTA_TX1_P ASSTXP1 TBT_EE_CLK EE_CLK PM_S0_EN DG_PM_S0_EN
C901 B19 AB9 W4 Y4 R918 100K
TBTA_TX1_N 0.22uF ASSTXN1 DPSNK1_ML1_P TBT_EE_WP_N GPIO_7 TMU_CLKIN : Security Strap GPIO_0
AC9 EE_WP_N GPIO_7
16V W6 0 : Unsecured GPIO_1 R919 100K
DPSNK1_ML1_N TMU_CLKIN TBT_TMU_CLK_IN
W20 Y6 1 : Secured R920 100K
R938 TBT_TDI GPIO_9 GPIO_7
0 A15 AC11 TDI GPIO_9
Y20 GPIO_9 R921 100K
TBTA_RX2_P R975 ASSRXP2 DPSNK1_ML2_P TBT_TMS TMS
0 B15 AB11 W19 R922 100K
TBTA_RX2_N ASSRXN2 DPSNK1_ML2_N TBT_TCK PM_S0_EN : TBT ON POC_GPIO_6
TCK
C902 Y19 V2 PM_S3_EN : TBT DPM POC_GPIO_7 R923 100K
0.22uF TBT_TDO TDO I2C_SCL TBT_I2C_SCL
16V A17 AB13 V1 R924 100K
TBTA_TX2_P ASSTXP2 DPSNK1_ML3_P TBT_I2C_SDA DG_PE_VBUS_EN
B17 AC13 I2C_SDA
V5 USB2_TBTA_MXCTL R925 100K
TBTA_TX2_N C903 ASSTXN2 DPSNK1_ML3_N POC_GPIO_2 DG_PE_VBUS_EN
0.22uF V8 V4 USB2_TBTB_MXCTL R974 100K
16V THERMDA FORCE_PWR DG_FORCE_PWR
H4 N1 U1
DG_PA_SBU1 ASBU1 DPSNK1_AUX_P PM_S3_EN DG_PM_S3_EN
J4 N2 D4 T5
DG_PA_SBU2 ASBU2 DPSNK1_AUX_N TEST_EDM POC_GPIO_6 POC_GPIO_6
R987 L8 T4
100K FUSE_VQPS_64 POC_GPIO_7 POC_GPIO_7
E20 AA2
USB2_TR_PA_P PA_USB2_D_P SNK1_HPD
D20 A23
USB2_TR_PA_N PA_USB2_D_N +3.3V_TBT
OPT PA_MONDC
A1 E5
R900 PB_MONDC RESET_N TBT_RESET_N
0 T2 AC23 R932
TBTA_HPD PA_HPD PC_MONDC 4.7K
M4 AC1 D22 TBT_TMU_CLK_IN
USBPD_I2C_TBTA_IRQ1 PA_I2C_INT USB_MONDC XTAL_25_IN TBT_XTAL_25_IN OPT R933 10K
R2 D5 D23 USB2_TBTA_MXCTL
USB2_TBTA_MXCTL PA_USB2_MXCTL MONDC_SVR XTAL_25_OUT TBT_XTAL_25_OUT OPT R976 10K
USB2_TBTB_MXCTL
R911 R908 OPT R981
100K DG_FORCE_PWR 10K
A3 100 W5 J5
R905 NC_A3 TEST_PWR_GOOD RSENSE TBT_RESET_N R989 10K
200 H19 A5 R4 J6
PA_USB2_RBIAS NC_A5 TEST_EN RBIAS TBT_I2C_SDA R907 2.2K
B3 B23 R909
NC_B3 USB2_ATEST 4.75K TBT_I2C_SCL R939 2.2K
B5 AB23
R977 NC_B5 1% OPT R940 10K
0 A13 C1 PCIE_ATEST USBPD_I2C_TBTA_IRQ1
J9
TBTB_RX1_P R978 BSSRXP1 NC_C1 ATEST_P OPT R941 10K
B13 C2 J11 USBPD_I2C_TBTB_IRQ1
0
TBTB_RX1_N BSSRXN1 NC_C2 ATEST_N
C904 E1 H5
0.22uF NC_E1 VGA_RES
16V A11 E2
TBTB_TX1_P C905 BSSTXP1 NC_E2
B11 P1
TBTB_TX1_N 0.22uF BSSTXN1 NC_P1
16V P2
NC_P2
R979
0 B7
TBTB_RX2_P
TBTB_RX2_N
R980
0 A7
BSSRXP2
BSSRXN2
Flash memory (8Mbit)
25MHZ
C906
0.22uF X900
16V A9
TBTB_TX2_P BSSTXP2 Close to Scaler XTAL_1 NC_2 +3.3V_TBT
C907 B9 TBT_XTAL_25_IN
0.22uF 1 4
TBTB_TX2_N BSSTXN2 C912
16V NC_1 XTAL_2
0.22uF TBT_XTAL_25_OUT
L4 AB21 16V 171111 LGR 2 3
DG_PB_SBU1 BSBU1 DPSRC_ML0_P C913 TBT_SRC_ML0_P Crystal Matching C910
L5 AC21 C911
DG_PB_SBU2 BSBU2 DPSRC_ML0_N 0.22uF TBT_SRC_ML0_N (20pF --> 27pF) 27pF 171111 LGR
16V C918 27pF
0.22uF 50V Crystal Matching R934 R935 R936
16V 50V 3.3K 2.2K 2.2K C922
E19 AC19 (20pF --> 27pF)
USB2_TR_PB_P PB_USB2_D_P DPSRC_ML1_P TBT_SRC_ML1_P 0.1uF
D19 AB19 C919 16V
USB2_TR_PB_N OPT PB_USB2_D_N DPSRC_ML1_N 0.22uF TBT_SRC_ML1_N IC903
C914 16V
R970 0.22uF MX25V8035FM2I
0 T1 AB17 16V
TBTB_HPD PB_HPD DPSRC_ML2_P C915 TBT_SRC_ML2_P
M5 AC17
USBPD_I2C_TBTB_IRQ1 PB_I2C_INT DPSRC_ML2_N 0.22uF TBT_SRC_ML2_N +3.3V_TBT
R1 16V C920 CS# VCC R943
USB2_TBTB_MXCTL R973
100K
PB_USB2_MXCTL
AC15
0.22uF
16V
Close to Scaler
Sheilding Type X-tal TBT_EE_CS_N 1 8 3.3K
DPSRC_ML3_P C921 TBT_SRC_ML3_P
R906 F19 AB15 0.22uF OPT OPT C916
PB_USB2_RBIAS DPSRC_ML3_N TBT_SRC_ML3_N 0.22uF SO/SIO1 HOLD#/SIO3
200 16V R926 R928 TBT_SRC_AUX_P 2 7
100K 100K 16V TBT_EE_DO
Close to USB HUB IC N4 OPT R929 10
C930 DPSRC_AUX_P
AC3 N5 R930 10 WP#/SIO2 SCLK
0.22uF TBT_SDM 3 6
USB_SSRX1_P 16V C931 U0_SSRXP1 DPSRC_AUX_N TBT_EE_WP_N TBT_EE_CLK
USB_SSRX1_N 0.22uF AB3 U0_SSRXN1
OPT OPT C917
16V R5 R910 R927 0.22uF TBT_SRC_AUX_N
DPSRC_HPD TBT_SRC_HPD 100K 100K 16V GND SI/SIO0
C908 AC5 4 5
0.22uF TBT_EE_DI
USB_SSTX1_P 16V C909 U0_SSTXP1 Close to Scaler
AB5
USB_SSTX1_N 0.22uF U0_SSTXN1
16V
Close to Titan Ridge
CLK Generator
S1 S0 CLK(1:0), CLK(1:0) 3V3_CLKGEN
0 0 25M
IC900
TR Debug 0 1 100M IC906 3V3_CLKGEN
5V41065PGG8 OPT
R958
TITANRIDGE DD 1 0 125M C924 R959
0
0.01uF 0 OPT
50V R961 OPT R965
VDDXD S0 0 R964 1K
+3.3V_TBT 1 1 200M 16 1 1K
V23 Y23 +3.3V_TBT
PCIE_TX0_P PCIE_RX0_P 3V3_CLKGEN R951 R962
V22 Y22 0 CLK0 S1 0
PCIE_TX0_N PCIE_RX0_N OPT TBT_REFCLK_P 15 2 171111 LGR
R986 C927 Crystal Matching
P23 T23 0 R952 10pF (18pF --> 10pF)
PCIE_TX1_P PCIE_RX1_P De-bug 0 CLK0 SS0 50V
P22 T22 De-bug De-bug R903 De-bug Q901 TBT_REFCLK_N 14 3
PCIE_TX1_N PCIE_RX1_N R901 R902 10K R904 SSM3J332R
10K 10K 10K 25MHZ
D
S
K23 M23 R945 R947 GNDODA X1/ICLK IN/OUT_1 X901 FLOAT_2
PCIE_TX2_P PCIE_RX2_P OPT 49.9 49.9 13 4
K22 M22 R983 C923 C926 C929 1% 1% 1 4
PCIE_TX2_N PCIE_RX2_N 170822 LGR TBT_TDI 10K 1uF 1uF 10uF FLOAT_1 IN/OUT_2 C928
TP900 R942 50V
G
10V 10V 10V 2 3 171111 LGR
+3.3V_TBT VDDODA X2 1K 12pF
F23 H23 12 5 Crystal Matching
PCIE_TX3_P PCIE_RX3_P +3.3V_TBT
(18pF --> 12pF)
F22 H22 TP901 TBT_TMS C925 3V3_CLKGEN
PCIE_TX3_N PCIE_RX3_N OPT R984 0.01uF
R944 R955 1K 50V CLK1 OE
3.3K R954 11 6 171111 LGR
AA1 U2 100K 4.7K
DEV_PERST_N WAKE_N C R957 By recommand of Vendor
TP902 TBT_TCK 0
R982 Apply 1k damping resistor
4.7K CLK1 GNDXD
B Q900 10 7
R956 DG_PM_S0_EN
3.01K MMBT3904(NXP)
V19 N16 TP903 TBT_TDO
TBT_REFCLK_P PCIE_REFCLK_100_IN_P PCIE_RBIAS
T19 E R946 R948 IREF SS1
TBT_REFCLK_N PCIE_REFCLK_100_IN_N 49.9 49.9 9 8
TP904 1% 1% 3V3_CLKGEN
[2017.0916] R953
Add GND_TP for Debugging OPT 475
R985 1%
4.7K
OPT R963
R960 1K
1K

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Titan Ridge 9 13
Titan Ridge
IC900
IC900
TITANRIDGE DD TITANRIDGE DD
+3.3V_TBT
+3.3V_TBT
PW_VCC0V9_SVR
Nearby F18, R6 pin
H9 G1
VCC0P9_SVR_PAB_ANA_1 VCC3P3_SVR_1
H11 G2
VCC0P9_SVR_PAB_ANA_2 VCC3P3_SVR_2 C3129 C3141
H12 H2 1uF 1uF
A2 E15 VCC0P9_SVR_PAB_ANA_3 VCC3P3_SVR_3
VSS_ANA_1 VSS_ANA_67 H13 E6 6.3V 6.3V
A4 E18 VCC0P9_SVR_PAB_ANA_4 VCC3P3A 0603 0603
VSS_ANA_2 VSS_ANA_68 H15
A6 E22 VCC0P9_SVR_PAB_ANA_5
VSS_ANA_3 VSS_ANA_69 H16 L6
A8 E23 VCC0P9_SVR_PAB_ANA_6 VCC3P3_S0
VSS_ANA_4 VSS_ANA_70
A10 F1
VSS_ANA_5 VSS_ANA_71 T12 F18 +3.3V_TBT
A12 F2 VCC0P9_SVR_PC_ANA_1 VCC3P3_SX_1 [2017.0918]
VSS_ANA_6 VSS_ANA_72 T13 R6 PW_VCC0V9_SVR
A14 F5 PW_VCC3V3 is connected +3.3V_TBT
VCC0P9_SVR_PC_ANA_2 VCC3P3_SX_2 --> Bead deleted
VSS_ANA_7 VSS_ANA_73 T15
A16 F6 VCC0P9_SVR_PC_ANA_3
VSS_ANA_8 VSS_ANA_74 J13
A18 F8 VCC0P9_SVR_1
VSS_ANA_9 VSS_ANA_75 T9 L11
A20 F9 VCC0P9_SVR_USB_ANA_1 VCC0P9_SVR_2
VSS_ANA_10 VSS_ANA_76 T11 L13 C3130 C3133 C3135 C3138 C3142 C3145 C3120 C3122 C3128
A22 F11 VCC0P9_SVR_USB_ANA_2 VCC0P9_SVR_3 18pF
VSS_ANA_11 VSS_ANA_77 M8 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF
AA22 F12 VCC0P9_SVR_4 10V 10V 10V 10V 6.3V 6.3V 6.3V 6.3V 50V
VSS_ANA_12 VSS_ANA_78 PW_VCC0V9_PCIE N6 M11 0603 0603 0603 0603
AA23 F13 VCC0P9_SVR_DPAUX_ANA VCC0P9_SVR_5
VSS_ANA_13 VSS_ANA_79 M13
AB1 F15 VCC0P9_SVR_6
VSS_ANA_14 VSS_ANA_80 J18 N8
AB2 F16 VCC0P9_PCIE VCC0P9_SVR_7
VSS_ANA_15 VSS_ANA_81 L19 N11
AB4 F20 VCC0P9_ANA_PCIE_1_1 VCC0P9_SVR_8
VSS_ANA_16 VSS_ANA_82 M19 N13
AB6 G22 VCC0P9_ANA_PCIE_1_2 VCC0P9_SVR_9
VSS_ANA_17 VSS_ANA_83 L18 R8
AB8 G23 VCC0P9_ANA_PCIE_2_1 VCC0P9_SVR_10
VSS_ANA_18 VSS_ANA_84 M16 R11
AB10 H20 VCC0P9_ANA_PCIE_2_2 VCC0P9_SVR_11
VSS_ANA_19 VSS_ANA_85 M18 R13
AB12 J12 VCC0P9_ANA_PCIE_2_3 VCC0P9_SVR_12
VSS_ANA_20 VSS_ANA_86 R16
AB14 J15 VCC0P9_SVR_13
VSS_ANA_21 VSS_ANA_87 PW_VCC0V9_LC J8 T8
AB16 J16 VCC0P9_LC VCC0P9_SVR_14
VSS_ANA_22 VSS_ANA_88 PW_VCC0V9_LVR T16
AB18 J19 VCC0P9_SVR_15
VSS_ANA_23 VSS_ANA_89 H8 E8 PW_VCC0V9_SVR_IND
AB20 J20 VCC0P9_LVR VCC0P9_SVR_BRD_SENSE
VSS_ANA_24 VSS_ANA_90 H6
AB22 J22 VCC0P9_LVR_SENSE
VSS_ANA_25 VSS_ANA_91 K1
AC2 J23 SVR_IND_1 PW_VCC0V9_SVR
VSS_ANA_26 VSS_ANA_92 PW_VCC3V3_ANA_USB2 H18 K2 PW_VCC0V9_SVR_IND
AC4 L20 VCC3P3_ANA_USB2 SVR_IND_2
VSS_ANA_27 VSS_ANA_93 PW_VCC3VC_ANA_PCIE L16 L1
AC6 L22 VCC3P3_ANA_PCIE SVR_IND_3
VSS_ANA_28 VSS_ANA_94 PW_VCC3V3_ANA E16 L2 L3101
AC8 L23 VCC3P3_ANA SVR_IND_4 0.68uH
AC10 M6
VSS_ANA_30 VSS_ANA_96 PW_VCC3VC_LC V6 H1
AC12 M20 VCC3P3_LC SVR_VSS_1
VSS_ANA_31 VSS_ANA_97 J1 C3134 C3136 C3137 C3127
AC14 N18 C3124 C3131 C3132 C3139 C3140 SVR_VSS_2 47uF 47uF 47uF 18pF
VSS_ANA_32 VSS_ANA_98 1uF 1uF 1uF 1uF 1uF J2 6.3V 6.3V 6.3V 50V
AC16 N19 SVR_VSS_3
VSS_ANA_33 VSS_ANA_99 6.3V 6.3V 6.3V 6.3V 6.3V
AC18 N20 0603 0603 0603 0603 0603
AC20 N22
AC22 N23
B1 R18
B2 R19
B4 R20
B6 R22
B8 R23
B10 T20
B12 U22
VSS_ANA_43 VSS_ANA_109 PW_VCC0V9_SVR
B14 U23
B16 V9
B18 V11
B20 V12
B22 V13
C22 V15 C3100 C3102 C3104 C3106 C3108 C3109 C3111 C3113 C3115 C3117 C3121 C3123 C3125 C3126 C3119
VSS_ANA_49 VSS_ANA_115 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF
C23 V20
VSS_ANA_50 VSS_ANA_116 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 10V
D1 W8 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603
D2 W9
D6 W11
D8 W12
D9 W13
D11 W15
D12 W22
VSS_ANA_57 VSS_ANA_123 PW_VCC0V9_LVR PW_VCC0V9_PCIE
D13 W23
D15 Y5
D16 Y8
D18 Y9
E4 Y11
E9 Y12 C3101 C3103 C3105 C3107 C3143 C3144 C3110 C3112 C3114 C3116 C3118 C3146
VSS_ANA_63 VSS_ANA_129 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF
E11 Y13
VSS_ANA_64 VSS_ANA_130 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 10V
E12 Y15 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 2012
E13
VSS_ANA_66
170904 LGR
Add 10uF Cap by request of Intel
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
LVR Cap value total : 24uF

F4
L9
L12
L15
M1
M2
M9
M12
M15
N9
N12
N15
R9
R12
R15
T6
T18
V16
V18

ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR Titan Ridge
(Power) 10 13
Titan Ridge(Power)
TYPE-C CONNECTOR (TBT IN/OUT) TYPE-C CONNECTOR (TBT IN/OUT)
TYPE-C_TBTA_VBUS TYPE-C_TBTB_VBUS
JK4000
USB3.1C(STRAIGHT) JK4001
USB3.1C(STRAIGHT)
JP4000
JP4001
A1 B12
A1 B12
A2 B11
TBTA_TX1_P TBTA_RX1_P A2 B11
A3 B10 TBTB_TX1_P TBTB_RX1_P
TBTA_TX1_N TBTA_RX1_N A3 B10
A4 B9 TBTB_TX1_N TBTB_RX1_N
A4 B9
AN_CC1_A A5 B8 DG_PA_SBU2
BN_CC1_B A5 B8 DG_PB_SBU2
A6 B7
A6 B7
A7 B6
A7 B6
DG_PA_SBU1 A8 B5 AN_CC2_A
DG_PB_SBU1 A8 B5 BN_CC2_B
A9 B4
A9 B4
A10 B3
TBTA_RX2_N TBTA_TX2_N A10 B3
A11 B2 TBTB_RX2_N TBTB_TX2_N
TBTA_RX2_P TBTA_TX2_P A11 B2
A12 B1 TBTB_RX2_P TBTB_TX2_P
A12 B1
170717 LGR C4000 C4001 C4002 C4003
RX2 Line SWap!! 170717 LGR C4004 C4005 C4006 C4007
0.01uF 0.01uF 25 0.01uF 0.01uF RX2 Line SWap!!
50V 50V 50V 50V 0.01uF 0.01uF 25 0.01uF 0.01uF
50V 50V 50V 50V
L4000
ACM2012-900H-2P L4002 L4001
ACM2012-900H-2P ACM2012-900H-2P L4003
1 4 ACM2012-900H-2P
USB2_PA_P_TOP 1 4 1 4
USB2_PA_P_BOTTOM USB2_PB_P_TOP 1 4
USB2_PB_P_BOTTOM
2 3
USB2_PA_N_TOP 2 3 2 3
USB2_PA_N_BOTTOM USB2_PB_N_TOP 2 3
USB2_PB_N_BOTTOM
C_on = 0.17pF
D4000 D4010
TPD1E01B04DPLR D4012 TPD1E01B04DPLR D4024
TPD1E01B04DPLR TPD1E01B04DPLR
TBTA_TX1_P TBTB_TX1_P
BN_CC1_B
AN_CC1_A
D4001 D4011 D4025
D4021 TPD1E01B04DPLR TPD1E01B04DPLR
TPD1E01B04DPLR
TPD1E01B04DPLR
TBTA_TX1_N TBTB_TX1_N BN_CC2_B
AN_CC2_A
D4026
D4002 D4022 D4013 TPD1E01B04DPLR
TPD1E01B04DPLR TPD1E01B04DPLR TPD1E01B04DPLR DG_PB_SBU1
TBTA_RX1_P DG_PA_SBU1 TBTB_RX1_P
D4003 D4014 D4027
TPD1E01B04DPLR D4023 TPD1E01B04DPLR TPD1E01B04DPLR
TPD1E01B04DPLR
TBTA_RX1_N TBTB_RX1_N DG_PB_SBU2
DG_PA_SBU2
D4004 D4015
TPD1E01B04DPLR D4028 TPD1E01B04DPLR
TBTA_TX2_P TPD1E01B04DPLR TBTB_TX2_P D4030
D4005 TPD1E01B04DPLR
USB2_PA_P_BOTTOM D4016
TPD1E01B04DPLR TPD1E01B04DPLR USB2_PB_P_BOTTOM
TBTA_TX2_N D4029 TBTB_TX2_N
TPD1E01B04DPLR D4031
D4006 D4017 TPD1E01B04DPLR
TPD1E01B04DPLR USB2_PA_N_BOTTOM TPD1E01B04DPLR
USB2_PB_N_BOTTOM
TBTA_RX2_P TBTB_RX2_P
D4007 D4032 D4018
TPD1E01B04DPLR TPD1E01B04DPLR TPD1E01B04DPLR D4034
TPD1E01B04DPLR
TBTA_RX2_N USB2_PA_N_TOP TBTB_RX2_N
USB2_PB_N_TOP
D4033
TPD1E01B04DPLR D4035
TPD1E01B04DPLR
USB2_PA_P_TOP
USB2_PB_P_TOP

TBT JACK 11 13
TBT JACK
17.11.06 LGR
USB2_HUB_UFP_N
USB2_HUB_UFP_P
C4100
After Crystal Matching, 10pF
+3.3V_HUB +3.3V_HUB +1.1V_HUB
USB_SSTX1_N
USB_SSTX1_P
USB_SSRX1_N
USB_SSRX1_P
Change cap value 50V
(8pF --> 10pF)
X-TAL_2
GND_2
4
3
X4100 R4101 C4117
24MHz 1M C4104 C4105 C4106 C4107 C4108 C4109 C4110 C4111 C4112 C4113 C4114 C4115 C4116
1% OPT 10uF 0.1uF 0.1uF 0.01uF 0.01uF 10uF 0.1uF 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF
50V
2
R4103 10V 16V 16V 50V 50V 10V 16V 16V 16V 50V 50V 50V 50V IC4102 171113 LGR
X-TAL_1
GND_1
10K R4104 +5V_VBUS When connect USB Device,
C4101 10 TAEJIN TECHNOLOGY CO., LTD.
USB_HUB_RESET VDP1 Vdrop is represented.
10pF
50V Apply Cap
OPT OPT
C4102 C4103 C4170 IN OUT
1uF 2.2uF 0.1uF 1 6
10V 10V 16V C4142 C4143 +3.3V_HUB
0.1uF 10uF R4119 C4125 C4126 OPT OPT
R4100 16V 10V GND ILIMIT 10K 10uF C4162 C4163
0 R4102 100uF 22uF 22uF
6.8K 2 5 10V 16V 16V 16V
1% R4120
10K
USB_SSRXM_UP
USB_SSRXP_UP
USB_SSTXM_UP
USB_SSTXP_UP
EN FLAG
PWREN1 3 4 OVCUR1#
USB_DM_UP
USB_DP_UP
R4118
VDD33_4
VDD33_3
171116 LGR
100K
USB_R1
+1.1V_HUB TP4100 - Limits changed: 2.1A -> Typ.1.44A(Rlim: 6.8K --> 10k)
VDD_8
VDD_7
GRSTZ
[EP]
TEST
Becasue 34WK95U USB3.0 Downstream spec is 5V/1A
+3.3V_HUB
XI
XO
NC
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
USB DN Port #1 R4107
0
USB_DP_DN1 1 48 USB_VBUS
USBDN_DP1 VBUS_DET
USB_DM_DN1 2 THERMAL 47 OVERCUR2Z OPT
USBDN_DM1 OVCUR2# R4113
USB_SSTXP_DN1 65 46 OVERCUR1Z release option R733,R734
3 OVCUR1# 10K
USB_SSTXP_DN1 10K->1K
USB_SSTXM_DN1 4 45 AUTOENZ/HS_SUSPEND OPT OPT
USB_SSTXM_DN1 OPT R4116 R4117 OPT
VDD_1 5 44 OVERCUR3Z R4115 10K R4121 R4122 R4123
10K 10K 10K 1K 1K
USB_SSRXP_DN1 6 IC4100 43 OVERCUR4Z
USB_SSRXP_DN1
USB_SSRXM_DN1 7 42 GANGED/SMBA2/HS_UP
USB_SSRXM_DN1 TUSB8041IRGCR
VDD_2 8 41 PWRCTL_POL
USB_DP_DN2 FULLPWRMGMTZ/SMBA1/SS_UP
USBDN_DP2
USBDN_DM2
USB_DM_DN2
9
10
40
39 SMBUSZ/SS_SUSPEND USB Downstream
USB_SSTXP_DN2 11 38 SCL/SMBCLK
USB_SSTXP_DN2 HUB_SCALER_SCL JK4100
USB_SSTXM_DN2 12 37 SDA/SMBDAT PORT #1 (USB1=VBUS 1.5A)
USB_SSTXM_DN2
VDD_3
USB_SSRXP_DN2
13 USB HUB 36 PWRCTL1/BATEN1
PWRCTL2/BATEN2
PWREN1
HUB_SCALER_SDA
+3.3V_HUB
SP12-12078-A01
JP4101
Added serial Resistor for protected by damage from short
USB_SSRXP_DN2 14 35 Hyunseung Ku 150304
PWREN2
USB_SSRXM_DN2 15 34 VDD33_2 1 VBUS
USB_SSRXM_DN2 1
VDD33_1 33 PWRCTL3/BATEN3 R182 VDP1
16
10K
USB3.0 DOWNSTREAM #1
+3.3V_HUB R4124
OPT +3.3V_HUB 1% 2 D- 2.2
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
17.08.26 LGR OPT OPT VBUS_DET 2 USB 3.0 HUB
R4174 USBDN_DM1
4.7K For I2C Communication R4109 R4111 0.5V
10K 10K R183
R4148
USB_DP_DN3
USB_DM_DN3
USB_SSTXP_DN3
USB_SSTXM_DN3
VDD_4
USB_SSRXP_DN3
USB_SSRXM_DN3
USB_DP_DN4
USB_DM_DN4
USB_SSTXP_DN4
USB_SSTXM_DN4
VDD_5
USB_SSRXP_DN4
USB_SSRXM_DN4
VDD_6
PWRCTL4/BATEN4
R4108 OPT 2K
OPT 1K R4114 TYPE-C_TBTB_VBUS R125 1% 3 D+ 2.2
R4175 TYPE-C_TBTA_VBUS C 3
4.7K 1K 1K R126 USBDN_DP1
OPT 100 B Q117
R4110 4
1K MMBT3904(NXP) GND [Test pad guidance]
R114 R184 BAT54C_Suzhou 4 Test pads(jig-point, test-point) and their connecting wire
18K 10K D117
OPT E is unacceptable for Gigabit rate links.
R4146 A2 C OPT
R186 R4181 5 SSRX-
(Straight)
OPT 4.7K 10K 5 USB_SSRXM_DN1
C 100 B
R4145 OPT
4.7K R4160 A1
4.7K
OPT 6 SSRX+
R4127 E 6 USB_SSRXP_DN1
USB2_CAL_DM R185 Q116
4.7K R118 4.7K OPT
4.7K MMBT3904(NXP)
USB2_CAL_DP R4180
100 7 GND
USB2_MUX_DM 7 C4118
USB_DET
USB2_MUX_DP 0.1uF
16V
8 SSTX-
8 USB_SSTXM_DN1
[2017.0919 HW Son]
Modify USB VBUS_DET to support TBT A/B 9
9 SSTX+
USB_SSTXP_DN1
C4119
D4100
D4101
D4102
DF3D6.8MS
DF3D6.8MS
DF3D6.8MS
10 0.1uF
OPT
OPT
OPT
16V
10
+3.3V_MICOM
JP4100
AR4103
10K De-bug
P4102
12507WS-04L
UART_RX_DEBUG
UART_TX_DEBUG +3.3V_MICOM MICOM DEBUG
R4158
33
1 MICOM_DEBUG_SDA
+3.3V_MICOM IC4101
+3.3V_MICOM R4138 SCALER_FLASH_CS# R4159 +5V_VBUS TAEJIN TECHNOLOGY CO., LTD. 171113 LGR
10K VDP2
MICOM_SWDIO C4151 C4152 C4154 C4155 C4157 C4158 2 33 When connect USB Device,
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF MICOM_DEBUG_SCL Vdrop is represented.
C4161
10uF 10V 16V 16V 16V 16V 16V IN OUT Apply Cap
PIO0_16/WAKEUP
10V 1 6
SWDIO/PIO0_15
3 OPT OPT
C4120 C4122 +3.3V_HUB C4127 C4164 C4165
0.1uF 10uF R4106 C4128
16V 10V GND ILIMIT 10K 10uF 100uF 22uF 22uF
2 5 10V 16V 16V 16V
PIO0_18
PIO0_17
PIO0_23
4
RTCXIN
PIO_19
+3.3V_MICOM R4150
VDD_2
VSS_3
R4133 10K
VBAT
VSSA
VDDA
10K EN FLAG
5 PWREN2 3 4 OVCUR2#
R4130 R4105 171116 LGR

100K
48
47
46
45
44
43
42
41
40
39
38
37
15K OPT - Limits changed: 2.1A -> Typ.1.44A(Rlim: 6.8K --> 10k)
R4134 RTCXOUT PIO1_13
10K 1 36 AR4101 Becasue 34WK95U USB3.0 Downstream spec is 5V/1A
VSS_1 2 35 VREFN 10K
RESET/PIO0_0 3 34 VREFP AR4105
MICOM_RESET 33
C4159 PIO0_1 TRST/PIO0_14
0.1uF 4 33 UART_TX
16V VSS_2 5
IC4103 32 TDO/PIO0_13 OPT
X4101 R4141 UART_RX De-bug
12MHZ PIO2_0/XTALIN 6 LPC11U68JBD48 31 TMS/PIO0_12 0 P4100
12507WS-06L
GND_1
2 3
X-TAL_2
PIO2_1/XTALOUT
VDD_1
7
8
30
29
TDI/PIO0_11
PIO0_22
OPT
R4142
0 SCALER_FLASH_SO
+3.3V_MICOM
USB Downstream
1 4 C4160 PIO2_5 9 28 SWCLK/PIO0_10 1
JK4101
C4156 X-TAL_1 GND_2 18pF MICOM_SWCLK
18pF PIO0_20 10 27 PIO0_9 SP12-12078-A01 PORT #2 (USB2=VBUS 1.5A)
50V
50V R4139 2 MICOM_SWDIO
PIO0_2 11 26 PIO0_8 10K Added serial Resistor for protected by damage from short
PIO2_2 PIO1_21 JP4103
12 25 3 Hyunseung Ku 150304
1 VBUS
13
14
15
16
17
18
19
20
21
22
23
24
1 VDP2
4 MICOM_SWCLK
+3.3V_MICOM
USB3.0 DOWNSTREAM #2
R4140
PIO1_20
PIO0_3
PIO0_4
PIO0_5
PIO0_21
PIO1_23
USB_DM
USB_DP
PIO2_7
PIO1_24
PIO0_6
PIO0_7
2 D- 2.2
5
UART_RX_DEBUG 2 USB 3.0 HUB
USBDN_DM2
R4136 R4149
OPT 220 6
OPT UART_TX_DEBUG 3
R4132 R4143 R4147 D+ 2.2
SCALER_FLASH_SCLK 3
220 10 7 0 USBDN_DP2
USBPD_EN MICOM_RESET
USB2_CAL_DP
VBUS DET R4144 4 [Test pad guidance]
10 4 GND
R4137 +3.3V_MICOM USB2_CAL_DM Test pads(jig-point, test-point) and their connecting wire
2.2K
is unacceptable for Gigabit rate links.
5 SSRX-
(Straight)
OPT +3.3V_MICOM 5 USB_SSRXM_DN2
OPT OPT C4153
R4131 R4135 0.1uF
2.2K 2.2K 16V
6 SSRX+
6 USB_SSRXP_DN2
OPT
IC4104
MICOM_DEBUG_SCL FT24C32A-USR-T 7 GND
7 C4123
MICOM_DEBUG_SDA OPT
R4126 OPT 0.1uF
MASTER(To SCALER I2C) AR4104 SCALER_FLASH_SI 10K AR4100 16V
A0 VCC 4.7K 8
33 1 8 8 SSTX-
USB_SSTXM_DN2
MICOM_SCALER_SCL
MICOM_SCALER_SDA A1 WP 9 SSTX+
2 7 EDID_WP_USB 9
Flash Memory NXP_LPC11U68
USB USB_SSTXP_DN2
17.08.18 LGR OPT
Power change : +3.3V_TBT -> +3.3V_NORMAL EEPROM R4112 C4124
D4103
D4104
D4105
A2 SCL
DF3D6.8MS
DF3D6.8MS
DF3D6.8MS
Pin1(CS#) Pin39(PIO0_23) 0 10 0.1uF
3 6
OPT
OPT
OPT
MICOM_SCALER_SCL 16V
Pin29(PIO0_22) +3.3V_NORMAL +3.3V_MICOM OPT
Pin2(SO) 10
GND SDA R4125
L4103 4 5 0
Pin3(SI) Pin17(PIO0_21) BLM15PX121SN1 MICOM_SCALER_SDA
OPT JP4102
Pin4(SCLK) Pin13(PIO0_20) R4128
0
HUB_SCALER_SCL
OPT
R4129
0
HUB_SCALER_SDA

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB HUB / MICOM 12 13
USB HUB/ MICOM
Connected to TBT PORT A
+3.3V_MUX
C4206
2.2uF
USB2_DFP_PA_P 10V
USB2_DFP_PA_N C4207
0.1uF
16V
/OE SEL1 SEL0 Y+ Y-
+3.3V_MUX
HSD0-
HSD0+
H X X Hi-Z Hi-Z
ENA_HS
NC
OE
VREG
VCC
GND
C4201
2.2uF
16
15
14
13
10V
GND HSD1-
L L L USB2_DFP_PA_P USB2_DFP_PA_N
12
11
10
9
1 12 USB2_UFP_PA_N
D+ 2 11 HSD1+ D1M 1 8 D2M
USB2_PA_P IC4201 USB2_UFP_PA_P USB2_PA_N USB2_PA_N
D- 3 FSUSB74UMX 10 HSD2+ IC4206
USB2_PA_N USB2_TR_PA2A_P TUSB211 12PIN MSL 2
VCC 4 9 HSD2-
USB2_TR_PA2A_N
L L H USB2_UFP_PA_P USB2_UFP_PA_N USB2_PA_P
D1P 2 7 D2P
USB2_PA_P
6
SEL1
SEL0
HSD3-
HSD3+
TEST
CD
RSTN
EQ
L H L USB2_TR_PA2A_P USB2_TR_PA2A_N
R4206
+3.3V_TBT 3.9K
1%
USB2_TBTA_MXCTL OPT
R4200
0
USB2_TBTB_MXCTL
L H H
R4201
0
DG_PE_VBUS_EN
Connected to TBT PORT B

+3.3V_MUX
C4210
USB2_UFP_PB_P 2.2uF
USB2_UFP_PB_N 10V
C4211
0.1uF
/OE SEL1 SEL0 Y+ Y- 16V
+3.3V_MUX
HSD0-
HSD0+
H X X Hi-Z Hi-Z
NC
OE
ENA_HS
C4202
VREG
2.2uF
VCC
GND
16
15
14
13
10V
GND 1 12 HSD1-
USB2_DFP_PB_N
L L L USB2_UFP_PB_P USB2_UFP_PB_N
12
11
10
9
D+ 2 11 HSD1+
USB2_PB_P USB2_DFP_PB_P
IC4202 D1M D2M
D- HSD2+ USB2_PB_N 1 8 USB2_PB_N
USB2_PB_N 3 FSUSB74UMX 10
IC4208
VCC 4 9 HSD2-
L L H USB2_DFP_PB_P USB2_DFP_PB_N
USB2_PB_P
D1P 2
TUSB211 12PIN MSL 2
7 D2P
USB2_PB_P
5
6
SEL1
SEL0
HSD3-
HSD3+
L H L
TEST
CD
RSTN
EQ
R4227
3.9K
USB2_TBTA_MXCTL +3.3V_TBT 1%
USB2_TBTB_MXCTL OPT
R4204
USB2_TR_PB2B_N L H H USB2_TR_PB2B_P USB2_TR_PB2B_N 0
USB2_TR_PB2B_P R4205
0
DG_PE_VBUS_EN
Connected to USB HUB

+3.3V_MUX
C4208
USB2_UFP_PB_P 2.2uF
10V
USB2_UFP_PB_N
C4209
0.1uF
/OE SEL1 SEL0 Y+ Y- 16V
+3.3V_MUX
HSD0-
HSD0+
H X X Hi-Z Hi-Z
NC
OE
ENA_HS
C4203
VREG
2.2uF
VCC
GND
16
15
14
13
10V
GND 1 12 HSD1-
USB2_UFP_PA_N
L L L USB2_UFP_PB_P USB2_UFP_PB_N
12
11
10
9
D+ 2 11 HSD1+
USB2_HUB_UFP_P IC4203 USB2_UFP_PA_P
D1M 1 8 D2M
D- 3 FSUSB74UMX 10 HSD2+ USB2_HUB_UFP_N USB2_HUB_UFP_N
USB2_HUB_UFP_N USB2_TR_PB2E_P
IC4207
VCC 4 9 HSD2-
USB2_TR_PB2E_N L L L USB2_UFP_PA_P USB2_UFP_PA_N
USB2_HUB_UFP_P
D1P 2
TUSB211 12PIN MSL 2
7 D2P
USB2_HUB_UFP_P
5
6
SEL1
SEL0
HSD3-
HSD3+
L H H USB2_TR_PB2E_P USB2_TR_PB2E_N
TEST
CD
RSTN
EQ
R4218
3.9K
USB2_TBTA_MXCTL +3.3V_TBT 1%
OPT
USB2_TBTB_MXCTL R4202
USB2_TR_PA2E_N L H H USB2_TR_PA2E_P USB2_TR_PA2E_N 0
USB2_TR_PA2E_P R4203
0
DG_PE_VBUS_EN
+3.3V_MUX
+3.3V_MUX +3.3V_MUX
C4205
C4200 C4204 2.2uF
2.2uF 2.2uF 10V
10V 10V
USB2_TBTB_MXCTL
USB2_TBTB_MXCTL USB2_TBTB_MXCTL
VCC
OE
VCC
VCC
S
OE
OE
SEL /OE Y+ Y-
S
10 9 8
10 9 8 10 9 8
D+ HSD1+
D+ HSD1+ D+ HSD1+ 1 7 USB2_DFP_PA_P
USB2_TR_PA_P
1 7 USB2_TR_PA2A_P USB2_TR_PB_P
1 7 USB2_TR_PB2E_P
USB2_MUX_DP
IC4205 X H Hi-Z Hi-Z
IC4200 IC4204 NL3HS2222MUTBG
NL3HS2222MUTBG NL3HS2222MUTBG D- HSD1-
D- HSD1- D- HSD1- USB2_MUX_DM 2 6 USB2_DFP_PA_N
2 6 2 6
USB2_TR_PA_N USB2_TR_PA2A_N USB2_TR_PB_N USB2_TR_PB2E_N
L L HSD1+ HSD1-
3 4 5
3 4 5 3 4 5 +3.3V_TBT +3.3V_MUX
GND
HSD2-
HSD2+
L4200
H L HSD2+ HSD2-
GND
HSD2-
HSD2+
GND
HSD2-
HSD2+
BLM15PX121SN1
USB2_DFP_PB_P
USB2_TR_PA2E_P USB2_TR_PB2B_P
USB2_DFP_PB_N
USB2_TR_PA2E_N USB2_TR_PB2B_N

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB2 MUXING 13 13
USB2 Muxing

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CONFIDENTIAL

P/NO : MFL70211509 (1810-REV00)

SAFETY PRECAUTIONS ........................................................................ 3

ADJUSTMENT INSTRUCTION ................................................................ 7

BLOCK DIAGRAM ................................................................................... 21

EXPLODED VIEW .................................................................................... 22

TROUBLE SHOOTING GUIDE .............................................................. 23

-2- Copyright © LG Electronics Inc. All rights reserved.

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

always perform an AC leakage current check on the exposed

-3- Copyright © LG Electronics Inc. All rights reserved.

No Item Content Remark

1) Signal (Video & Sync)

i. Display Port & Thunderbolt / USB-C

Frequency Total Front

-5- Copyright © LG Electronics Inc. All rights reserved.

* (1) : HDMI2.0 Preferred timing. , HDMI ULTRA Deep Color : ON

2 ) H D M I Video input (R efer to M anual)

-6- Copyright © LG Electronics Inc. All rights reserved.

3. Main PCB check process

3.2 EDID Process

-7- Copyright © LG Electronics Inc. All rights reserved.

4 Version 1 EDID Version

Inserted at Production Line

7 Model Name LG HDR 4K

** Protocol : DDC 2AB

4. Total Assembly line process

-8- Copyright © LG Electronics Inc. All rights reserved.

VESA HDR Tier HDR400 HDR600 HDR1000

4.3 White balance adjustment

 Warm(6500K) color adjustment

2~4 min 4~8min 8~10min 10~25min 25~40min 40min~

-9- Copyright © LG Electronics Inc. All rights reserved.

*Note : Manual W/B process

※ When doing Adjustment, Please make circumstance as below.

4.4 DPM Operation check

- 10 - Copyright © LG Electronics Inc. All rights reserved.

Item Content& Outgoing Condition Remark

- 11 - Copyright © LG Electronics Inc. All rights reserved.

Æ Make sure to do FACTORY RESET at the final process.

6. Signal composition for adjustment

6.1 I2C (100K BPS)

START 6E A STOP 50Ms

#Until ACK BIT goes LOW, Repeat it.

START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS A STOP

a. LEN : DATA BYTE number to send.

- 12 - Copyright © LG Electronics Inc. All rights reserved.

No. Adjustment contents CMD(hex ADR VAL(hex) Explanation

Aging off &Clear

- 13 - Copyright © LG Electronics Inc. All rights reserved.

Data_1 A ... Data_n A CS A STOP Delay 20m

6.5.2. Command Set

START 6F A D1 A ---------------------------------------------------------------------- Dn A STOP

- 15 - Copyright © LG Electronics Inc. All rights reserved.

- 16 - Copyright © LG Electronics Inc. All rights reserved.

Fig.1 Place the monitor’s screen face down

- 17 - Copyright © LG Electronics Inc. All rights reserved.

Fig 4 Disassemble the back cover (Latch Type) .

Warm(6500K) color adjustment