18N80T Datasheet

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FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET

April 2013

FDP18N50 / FDPF18N50 / FDPF18N50T


N-Channel UniFETTM MOSFET
500 V, 18 A, 265 mΩ
Features Description
• RDS(on) = 265 mΩ (Max.) @ VGS = 10 V, ID = 9A UniFETTM MOSFET is Fairchild Semiconductor®’s high voltage
• Low Gate Charge (Typ. 45 nC) MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
• Low Crss (Typ. 25 pF)
provide better switching performance and higher avalanche
• 100% Avalanche Tested energy strength. This device family is suitable for switching
power converter applications such as power factor correction
Applications (PFC), flat panel display (FPD) TV power, ATX and electronic
• LCD/LED/PDP TV lamp ballasts.
• Lighting
• Uninterruptible Power Supply

G G G
D D
S S
TO-220 TO-220F
S
Absolute Maximum Ratings
FDPF18N50 /
Symbol Parameter FDP18N50 Unit
FDPF18N50T
VDSS Drain-Source Voltage 500 V
ID Drain Current - Continuous (TC = 25°C) 18 18 * A
- Continuous (TC = 100°C) 10.8 10.8 * A
IDM Drain Current - Pulsed (Note 1) 72 72 * A
VGSS Gate-Source voltage ±30 V
EAS Single Pulsed Avalanche Energy (Note 2) 945 mJ
IAR Avalanche Current (Note 1) 18 A
EAR Repetitive Avalanche Energy (Note 1) 23.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD Power Dissipation (TC = 25°C) 235 38.5 W
- Derate above 25°C 1.88 0.3 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL Maximum Lead Temperature for Soldering Purpose,
300 °C
1/8” from Case for 5 Seconds
* Drain current limited by maximum junction temperature

Thermal Characteristics
FDPF18N50 /
Symbol Parameter FDP18N50 Unit
FDPF18N50T
RθJC Thermal Resistance, Junction-to-Case, Max. 0.53 3.3 °C/W
RθCS Thermal Resistance, Case-to-Sink, Typ. 0.5 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 62.5 °C/W

©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDP18N50 FDP18N50 TO-220 - - 50
FDPF18N50 FDPF18N50 TO-220F - - 50
FDPF18N50T FDPF18N50T TO-220F - - 50

Electrical Characteristics TC = 25°C unless otherwise noted

Symbol Parameter Conditions Min. Typ. Max Unit


Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 500 -- -- V
ΔBVDSS Breakdown Voltage Temperature
ID = 250μA, Referenced to 25°C -- 0.5 -- V/°C
/ ΔTJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 500V, VGS = 0V -- -- 1 μA
VDS = 400V, TC = 125°C -- -- 10 μA
IGSSF Gate-Body Leakage Current, Forward VGS = 30V, VDS = 0V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30V, VDS = 0V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250μA 3.0 -- 5.0 V
RDS(on) Static Drain-Source
VGS = 10V, ID = 9A -- 0.220 0.265 Ω
On-Resistance
gFS Forward Transconductance VDS = 40V, ID = 9A (Note 4) -- 25 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25V, VGS = 0V, -- 2200 2860 pF
f = 1.0MHz
Coss Output Capacitance -- 330 430 pF
Crss Reverse Transfer Capacitance -- 25 40 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 250V, ID = 18A -- 55 120 ns
RG = 25Ω
tr Turn-On Rise Time -- 165 340 ns
td(off) Turn-Off Delay Time -- 95 200 ns
(Note 4, 5)
tf Turn-Off Fall Time -- 90 190 ns
Qg Total Gate Charge VDS = 400V, ID = 18A -- 45 60 nC
Qgs Gate-Source Charge VGS = 10V -- 12.5 -- nC
Qgd Gate-Drain Charge (Note 4, 5) -- 19 -- nC

Drain-Source Diode Characteristics and Maximum Ratings


IS Maximum Continuous Drain-Source Diode Forward Current -- -- 18 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 72 A
VSD Drain-Source Diode Forward Voltage VGS = 0V, IS = 18A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0V, IS = 18A -- 500 -- ns
dIF/dt =100A/μs (Note 4)
Qrr Reverse Recovery Charge -- 5.4 -- μC

NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 5.2mH, IAS = 18A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
3. ISD ≤ 18A, di/dt ≤ 200A/μs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics

©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

2
10
VGS
2
10 Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
ID, Drain Current [A]

ID, Drain Current [A]


1 6.0 V
10 Bottom : 5.5 V

o
10
1
150 C

0 o
10 25 C
o
-55 C
* Notes :
* Notes :
1. 250μs Pulse Test
-1 1. VDS = 40V
10 o
2. TC = 25 C 2. 250μs Pulse Test
0
-1 0 1
10
10 10 10 2 4 6 8 10 12

VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage


Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue

2
RDS(ON) [Ω], Drain-Source On-Resistance

0.6 10
IDR, Reverse Drain Current [A]

0.5
VGS = 10V

0.4
1
10

0.3
VGS = 20V
150oC
0.2 o * Notes :
25 C
1. VGS = 0V
o
* Note : TJ = 25 C 2. 250μs Pulse Test
0
0.1 10
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

ID, Drain Current [A] VSD, Source-Drain voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics


5000
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
4000 10 VDS = 100V
Coss
VGS, Gate-Source Voltage [V]

VDS = 250V
Capacitances [pF]

8 VDS = 400V
3000 Ciss

6
2000

4
* Note :
1. VGS = 0 V
1000 Crss 2. f = 1 MHz
2

* Note : ID = 18A
0 0
-1 0 1
10 10 10 0 10 20 30 40 50

VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]

©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation


vs. Temperature vs. Temperature

1.2 3.0
Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
1.1
BVDSS, (Normalized)

RDS(ON), (Normalized)
2.0

1.0 1.5

1.0
0.9 * Notes :
1. VGS = 0 V
2. ID = 250μA * Notes :
0.5
1. VGS = 10 V
2. ID = 9 A
0.8
-100 -50 0 50 100 150 200 0.0
-100 -50 0 50 100 150 200
o
TJ, Junction Temperature [ C] o
TJ, Junction Temperature [ C]

Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area
- FDP18N50 -FDPF18N50 / FDPF18N50T

2 2
10 10
10 μs
10 μs
100 μs
100 μs
ID, Drain Current [A]

ID, Drain Current [A]

1 1 ms 1
10 10 1 ms
10 ms
100 ms 10 ms
Operation in This Area DC Operation in This Area 100 ms
0 is Limited by R DS(on) 0 is Limited by R DS(on)
10 10 DC

-1 -1
10 * Notes : 10 * Notes :
o o
1. TC = 25 C 1. TC = 25 C
o o
2. TJ = 150 C 2. TJ = 150 C
3. Single Pulse 3. Single Pulse
-2 -2
10 10
0 1 2 0 1 2
10 10 10 10 10 10

VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V]

Figure 10. Maximum Drain Currentvs. Case Temperature

20

15
ID, Drain Current [A]

10

0
25 50 75 100 125 150
o
TC, Case Temperature [ C]

©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
Typical Performance Characteristics (Continued)

Figure 11-1. Transient Thermal Response Curve - FDP18N50

0
10

D = 0 .5
(t), Thermal Response

-1 0 .2
10

0 .1 PDM
0 .0 5 t1
t2
0 .0 2 * N o te s :
o
0 .0 1 1 . Z θ J C ( t) = 0 .5 3 C /W M a x .
θJC

-2
10 2 . D u ty F a c to r , D = t 1 /t 2
Z

s in g le p u ls e 3 . T J M - T C = P D M * Z θ J C ( t)

-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]

Figure 11-2. Transient Thermal Response Curve - FDPF18N50 / FDPF18N50T

D = 0 .5
(t), Thermal Response

0
10
0 .2
0 .1

0 .0 5 PDM
-1
10 0 .0 2 t1
0 .0 1 t2
* N o te s :
o
1 . Z θ J C ( t) = 3 .3 C /W M a x .
θJC

2 . D u ty F a c to r , D = t 1 /t 2
Z

-2 s in g le p u ls e 3 . T J M - T C = P D M * Z θ J C ( t)
10

-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]

©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms

©2012 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms

©2012 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
Mechanical Dimensions

TO-220B03

Dimensions in Millimeters

©2012 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
Mechanical Dimensions

TO-220M03

Dimensions in Millimeters

©2012 Fairchild Semiconductor Corporation 9 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1
FDP18N50 / FDPF18N50 / FDPF18N50T N-Channel UniFETTM MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
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TINYOPTO™
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® MicroFET™ Solutions for Your Success™
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As used here in:
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PRODUCT STATUS DEFINITIONS


Definition of Terms
Datasheet Identification Product Status Definition
Datasheet contains the design specifications for product development. Specifications
Advance Information Formative / In Design
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later


Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to


No Identification Needed Full Production
make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fairchild


Obsolete Not In Production
Semiconductor. The datasheet is for reference information only.
Rev. I64

©2012 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com


FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C1

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