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Electrical Power and Energy Systems 53 (2013) 967–973

Contents lists available at SciVerse ScienceDirect

Electrical Power and Energy Systems


journal homepage: www.elsevier.com/locate/ijepes

Optimal allocation of combined DG and capacitor for real power loss


minimization in distribution networks
S. Gopiya Naik ⇑, D.K. Khatod, M.P. Sharma
Alternate Hydro Energy Centre, IIT Roorkee, Roorkee 247 667, India

a r t i c l e i n f o a b s t r a c t

Article history: Optimal siting and sizing of Distributed Generation (DG) and shunt capacitor at the distribution networks
Received 26 November 2012 for the purpose of real power loss minimization is drawing much attention of electric power utilities in
Received in revised form 1 June 2013 the present days. Some inherent benefits of power loss minimization includes: reduction of power flow in
Accepted 6 June 2013
feeder lines, releases stress on feeder loading, and hence increases their life time, adds opportunity to
using the existing facility to serve any increased load demand, avoidance of power purchased from the
grid and also the cost of loss compensating devices, reduction in customer bill, etc. In this paper, a
Keywords:
method based on analytical approach for optimal allocation (sizing and siting) of DG and capacitor with
Power distribution networks
Distributed generation
the objective to minimize the total real power loss subjected to equality and inequality constraints in the
Shunt capacitors distribution network is presented. A sensitivity analysis technique has utilized to identify the optimal
Optimal siting candidate locations for DG and capacitor placement and the heuristic curve fitting technique is used to
Optimal sizing determine their optimal capacity in the networks. To validate the suitability of the proposed method,
Loss minimization it has been applied to 12-bus and IEEE 33-bus test distribution systems. The obtained simulation results
and comparison of different cases considered reveals that allocation of DG and capacitor combination
results in significant loss reduction with good voltage profile and also release in the line loading in the
power distribution networks.
Ó 2013 Elsevier Ltd. All rights reserved.

1. Introduction power distribution. It is reported that as much as 13% of total


power generated is wasted in the form of power losses at the dis-
The electric power distribution networks usually operated at tribution level [1]. The capacity of radial line is often limited, it is
low voltage are connected to the high voltage transmission sys- therefore, necessary to consider some alternatives methods so that
tems and finally supply power to customers at low voltage. The to- the future load demands can be supplied ensuring supply quality
tal power losses in the distribution network lines is high because of and reliability.
low voltage and high current in comparison to high voltage net- Most distribution network components like motors and trans-
work, which in turn, causes increase in the cost of power and poor formers are inductive in nature, so the network power factor will
voltage profile along the distribution feeder. The total power loss in be lagging, and results in the reduction of the system’s capacity, in-
the distribution network is composed of two parts: real power and crease the system losses, and reduces the voltage. Shunt capacitors
reactive power loss. The former loss is due to the flow of active are used to alleviate some of these problems [2–4]. Apart from
component of current required by the load and the later is due to reduction in power losses, the shunt capacitors enhances the volt-
the flow of reactive component of current required to compensate age profile, improves power factor and voltage stability of the sys-
the reactive power requirement of network components and hence tem. Distributed Generation (DG) units can play a major role in
to control of the system voltage. Among these losses, the effect of distribution system planning in recent years as DG integration into
active power loss is very important because it reduces the effi- the distribution system defers major system upgrade, reduces
ciency of power transfer and deteriorates the voltage profile. The overall energy loss and improves the supply quality and reliability
minimization of real power loss in the distribution networks is [5]. Even though, DG technologies have positive impacts on distri-
therefore of much significance compared to the transmission sys- bution system, there might be certain technical challenges with the
tem. The task of power loss reduction and enhancement of energy inclusion of active DG units in conventional passive system. It is
efficiency of electric power delivery system mostly goes to electric important to mention that DG units should be applied in an effec-
tive manner without causing degradation of reliability, system
⇑ Corresponding author. Tel.: +91 9411149509.
operation and supply quality. On the other hand, shunt capacitors,
E-mail address: gopiya_s@yahoo.co.in (S. Gopiya Naik).
commonly deployed for reactive power compensation, can also be

0142-0615/$ - see front matter Ó 2013 Elsevier Ltd. All rights reserved.
http://dx.doi.org/10.1016/j.ijepes.2013.06.008
968 S. Gopiya Naik et al. / Electrical Power and Energy Systems 53 (2013) 967–973

considered in parallel with DG units for distribution system expan-


sion planning. It is evident that any loss reduction is beneficial to
distribution utilities, which is generally the entity responsible to
keep the losses at low levels. Loss reduction is therefore most
important factor to be considered in planning and operation of
DG [6].
The literature reports that the reactive power injected by shunt
capacitors can effectively reduce system energy loss, relieve feeder
loading and improve supply reliability [2,7]. Siting and sizing of
shunt capacitors needs to be investigated carefully to avoid voltage
rise problems, and hence to reduce the operating cost of DG units. Fig. 1. Model of a branch connected between buses p and q.
Various methods may be used to reduce the power losses in distri-
bution networks: capacitor placement, network reconfiguration, as well as multiple DG capacitor allocation. Finally, based on the
DG placement, and network reconfiguration in the presence of obtained results conclusions are given in Section 5.
capacitor, network reconfiguration in the presence of DG and DG
capacitor placement [8]. The optimal allocation of capacitors in 2. Problem formulation
power distribution networks with the objectives like minimizing
power loss, system capacity release, minimization of capacitor cost The problem of combined DG and capacitor allocation in distri-
and voltage profile improvement was presented in [9–13] using bution network with their suitable size is very important, because
the optimization techniques, viz. GA [10,12,13], heuristic strategies their improper allocation causes an increase in the system power
[11], and analytical approach [9]. Optimal siting and sizing of DG in loss and operating costs, reduces the energy efficiency. The main
the distribution networks to minimize power loss were suggested objective of the proposed study is to minimize the total real power
in [14–17,20,18,19,21,22]. The optimization techniques like ana- loss (PL) at peak load condition in the distribution network as given
lytical approaches [14,15,18,21], genetic algorithm (GA) [17], arti- in Eq. (5), subjected to equality and inequality constraints in Eqs.
ficial bee colony (ABC) algorithm [20], evolutionary programming (1), (2), (3), (7)–(10). During DG allocation, the voltage at various
(EP) [19] and GA–TS [22] were employed to arrive at the optimal buses should be maintained at proper limits for safe and reliable
solution. operation of the power distribution system and the current flow
Distribution network reconfiguration in the presence of DG to in the line conductor must be within the permissible limit.
reduce power loss was presented in [23–26]. The optimization Consider a branch connected between nodes p and q of a radial
techniques utilized are GA, ant colony optimization (ACO), Tabu distribution network as shown in Fig. 1. The real and reactive
search (TS) and modified honey bee optimization (MHBMO), power flow through the branch and the terminating node (q) volt-
respectively. age (neglecting shunt conductance and susceptance) are given by
Further, optimal allocation of DG and capacitor in the distribu- Eqs. (1)–(3), respectively as [19,31]:
tion network considering power loss reduction, minimizing the
Rpq
cost of DG and capacitor along with voltage profile improvement Ppq ¼ PFq þ P Lq  PDG
q þ ðP2pq þ Q 2pq Þ ð1Þ
were proposed in [27–29]. The optimization methods used are par- V 2p
ticle swarm optimization (PSO), PSO, and differential evolutionary
algorithm (DEA), respectively. X pq
Q pq ¼ Q Fq þ Q Lq  Q DG C
q  Qq þ ðP2pq þ Q 2pq Þ ð2Þ
In [27–29], the optimal siting and sizing of the DG injecting V 2p
only the real power and the capacitor combination is presented.
It is reported in [30], that DG units with reactive power control R2pq þ X 2pq
can provide better voltage profile and lower losses. An analytical V 2q ¼ V 2p  2ðPpq Rpq þ Q pq X pq Þ þ ðP 2pq þ Q 2pq Þ ð3Þ
approach based on exact loss formula was presented to find the V 2p
optimal size and location of DG to minimize the real power loss X X
[22], however voltage constraint has not been considered. Re- where PFq ¼ P ij and Q Fq ¼ Q ij
cently, another fast analytical approach to find the optimal size 8jji¼q 8jji¼q

of DG at optimal power factor has been proposed to minimize Here Ppq(Qpq) are the sending end active (reactive) power flows and
the power loss [18]. DG
Rpq(Xpq) are the series resistance (reactance). P DG
q ðQ q Þ are the active
Most of the approaches presented so far model the optimal allo-
cation of DG only. However, very few approaches [27–29] consid- (reactive) power injections by DG; Q Cq is the reactive power injec-
ered the optimal allocation of combined DG and capacitor, but tion by capacitor and P Lq ðQ Lq Þ are the total active (reactive) demand
release of line loading is not being considered and therefore needs load at bus q. PFq ðQ Fq Þ are the sum of active (reactive) power flows
further attention. The present paper considers the optimal alloca-
through all the downstream branches connected to bus q. Vq is
tion of DG and capacitor considering that DG is also capable to sup-
the magnitude of voltage at bus q. SB is a set of buses containing
ply reactive power in addition to real power. The optimal
all the buses in the system. The value of current flowing through
allocation of DG and capacitor with the key objective to minimize
a branch connected between nodes p and q is given as:
the real power loss besides satisfying the network constraints of vffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
u 2
the distribution network is presented. Heuristic sensitivity analy- uPpq þ Q 2pq
sis, i.e. both real and reactive power loss is being utilized to iden- Ipq ¼t ð4Þ
V 2p
tify the optimal candidate locations for DG and capacitor
placement, and the quadratic curve fitting technique is employed Mathematically, the objective function is given as:
to determine their optimal capacity in the distribution networks. X
Min PL ¼ I2pq Rpq ð5Þ
This paper is organized as follows: followed by the brief intro-
8p;qjp;q2SB
duction in Section 1, Section 2 gives the problem formulation,
and the methodology proposed is discussed in Section 3. In Sec- The above objective function is subjected to the set of equality and
tion 4, results and discussions are given for single DG capacitor inequality constraints as given below:
S. Gopiya Naik et al. / Electrical Power and Energy Systems 53 (2013) 967–973 969

1. Equality constraints 1. Once the optimal locations for DG and capacitor are identified,
– Power balance: The flow of active and reactive power in all the the maximum DG capacity is fixed as 50% of the total feeder
branches of the system must satisfy Eqs. (1) and (2), respectively. loading capacity and the capacitor capacity is fixed as 100% of
– Voltage equation: For all branches of the system, the voltage total MVAr loading of the network under consideration. For
magnitudes at sending and receiving end nodes must satisfy the combined DG–capacitor case both the DG and capacitor
Eq. (3). are varied in small incremental steps simultaneously. At each
– DG power factor: The power factor of DG connected at bus q step perform the load flow using Eqs. (1)–(3) and get the total
must satisfy the following eqn. real power loss using Eqs. (4) and (5) and check the constraints
described in Eqs. (7) and (8). If, at least one of the constraints is
PDG not satisfied, decrease/increase the capacity by 5% (one at a
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiq ¼ cos uq ð6Þ time) and again perform the load flow and after ensuring both
2 DG 2
ðPDG q Þ þ ðQ q Þ constraints are satisfied the corresponding capacity gives the
optimal size(s).
2. Inequality constraints
2. Step 1 is repeated for all sizes and finally, the minimum loss
– Bus voltage: The voltage at each bus must lie within the pre-
point is obtained.
scribed limits
3. The DG and/or capacitor size corresponding to the minimum
V min
q 6 V q 6 V max
q q 2 SB ð7Þ loss point are the optimal capacities.
4. Place the optimal sizes obtained in step 3 at optimal locations
– Line current: The flow of current through each branch should and once again perform load flow and obtain the total real
not exceed its thermal limit power loss, bus voltage values and line current value in the
Ipq 6 Irated 8pandq 2 SB ð8Þ network.
pq

– DG capacity: The DG capacity should not exceed certain per-


3.2. Multiple DG capacitor allocation
centage of total feeder load of network
rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
X 2 DG 2 X 2 2 The algorithm of single DG capacitor allocation given in the
ðP DG
q Þ þ ðQ q Þ 6 0:5  ðPLq Þ þ ðQ Lq Þ ð9Þ above section can be extended for multiple DG capacitor allocation
q2SB q2SB
too with the objective to minimize the total real power loss in 33-
– Capacitor capacity: The capacity of capacitor should not exceed bus IEEE test distribution network subject to the constrains (1), (2),
the total reactive power load of network (3), (7)–(10). For multiple DG capacitor allocation it is assumed
X X L here that the maximum number of DG or capacitor located at each
Q Cq 6 1:0  Qq ð10Þ candidate bus is limited to one. Further, only the high sensitive
q2SB q2SB
buses whose values are approximately equal are considered as
where V min
q and V max
q are the minimum and maximum values of the candidate buses for multiple DG capacitor allocation.
voltages at bus q (i.e. 0.95–1.05), respectively. Irated
pq is the thermal
limit of a branch between nodes p and q. cos /q is the power factor
of DG at qth bus. 4. Simulation results and discussion

The proposed algorithm is tested on two types of radial distri-


bution networks, namely, 12-bus and IEEE 33-bus networks. The
3. Proposed methodology
Backward–Forward sweep load flow method [31] is used to find
voltage magnitude and phase angle at various buses, line flow
3.1. Single DG capacitor allocation
and line losses. The type of DG model considered in this study is
a controllable synchronous generator based which delivers both
Sensitivity analysis based heuristic method [32] has been used
real and reactive power at fixed power factor mode [37] as given
to reduce the search space by selecting most sensitive buses only
by Eq. (8). The algorithm given above is implemented in the matlab
for identifying location for DG and capacitor and for finding the
environment. To demonstrate the effectiveness of the proposed
size quadratic curve fitting technique [11,33] has been used. The
algorithm, the following cases are considered for each test system:
complete algorithm is as given in the following section:
Following are the broad steps involved in the proposed method:
Case 1: Only the capacitor is placed at the optimal location.
Case 2: Only the DG operating at unity power factor (upf) is
3.1.1. Optimal location of DG and capacitor
placed at the optimal location.
To identify the optimal location for the combined DG and capac-
Case 3: Combined DG operating at upf and the capacitor were
itor, the following steps are used:
placed at their optimal location.
Case 4: Combined DG operating at 0.9 power factor (considered
1. Determination of real power loss sensitivity with respect to
as optimal pf) lag and the capacitor were placed at their optimal
(w.r.t.) active and reactive power injection at each bus [32].
location.
2. Arrange the buses in descending order of their sensitivities.
Case 5: Combined DG operating at the pf equal to total feeder
3. The bus having highest real power loss sensitivity w.r.t. real
load pf and the capacitor were placed at the optimal location.
power injection is the candidate bus for DG siting and the bus
with highest real power loss sensitivity w.r.t. reactive power
injection is considered as the candidate bus for capacitor 4.1. 12-Bus network
placement.
This is an 11 kV radial distribution systems consisting of 12
3.1.2. Optimal size of DG and capacitor buses and 11 branches with total feeder load of 435 kW and
To obtain the optimal size of combined DG and capacitor, the 395 KVAr. The line and load data are given in [34]. The combined
following steps have been taken [11,33]: load power factor of this system is 0.75.
970 S. Gopiya Naik et al. / Electrical Power and Energy Systems 53 (2013) 967–973

Bus Number
0

Real power loss sensitivity


-0.01 1 2 3 4 5 6 7 8 9 10 11 12
-0.02
-0.03
-0.04
-0.05
-0.06
-0.07
-0.08
-0.09
-0.1
Real Power Loss Sensitivity Real Power Loss Sensitivity
w.r.t Real Power Injection w.r.t Reactive Power Injection

Fig. 2. Real power loss sensitivity at various buses of 12-bus network.

Table 1
Optimal results of 12-bus network.

Particulars Total real power % Loss reduction Capacity/optimal location Minimum voltage
loss (kW) in the system (p.u.)
Base case 198.9 – – 0.94414 at bus 12
Case 1: Only capacitor 134.3 32.47 0.16 MVAr capacitor at bus 12 0.95596 at bus 11
Case 2: Only DG at upf 109.2 45.09 0.2 MW DG bus 12 0.98032 at bus 8
Case 3: DG with upf and capacitor 71.93 63.8 0.12 MW DG at bus 12 and 0.24 MVAr capacitor at bus 12 0.9815 at bus 8
Case 4: DG at 0.9 Pf with Qc = 0 57.41 71.14 0.2 MW and 0.1 MVAr DG at bus 12 0.9847 at bus 7
Case 5: DG at 0.75 pf with Qc = 0 47.56 76.09 0.2 MW and 0.16 MVAr DG at bus 12 0.9867 at bus 7

By sensitivity analysis as shown in Fig. 2, the optimal bus to The optimal DG and capacitor sizes obtained for the different
place the DG and capacitor was found to be 12 where the real cases considered are 0.16 MVAr, 0.2 MW, (0.12 MW, 0.24 MVAr),
power loss sensitivity w. r. t real and reactive power injection is (0.2 MW, 0.1 MVAr with Qc = 0) and (0.2 MW, 0.16 MVAr with
high. Qc = 0), respectively. The results of comparison of various cases
considered are given in Table 1. From the table, it may be noted
Case 1: Only the capacitor is placed at the optimal location. that more loss reduction is possible if DG capable to supply reac-
In this case the maximum capacity of capacitor is taken equal to tive in addition to real power (i.e. when the DG power factor is
total MVAr loading of the network, i.e. 0.395  0.4 MVAr and 0.75) and is placed at the optimal location with optimal sizes in
varied in small incremental steps from 0 to 0.4 MVAr. the network compared to other considered cases.
Case 2: Only DG operating at unity power factor (upf) is placed The comparisons of voltage profile at various buses for the dif-
at the optimal location ferent cases considered in a 12-bus radial distribution network are
In this case the maximum capacity of the DG is taken equal to depicted in Fig. 3. It can be seen from the figure that improvement
50% of the total MW loading of the network, i.e. in the voltage profile by optimal placement of combined DG oper-
0.5  0.435  0.25 MW and is varied in small incremental steps ating at upf and capacitor (Case 3) is somewhat superior compared
from 0 to 0.25 MW. to DG alone. Alternatively, if DG capable of supplying reactive
Case 3: Combined DG operating at upf and capacitor were power in addition to real power is placed at optimal location where
placed at their optimal location improvement in the voltage profile is found to be better than pre-
In this case the maximum capacity of DG and capacitor are vious cases.
selected same as in Case 1&2 and are simultaneously varied
in small incremental steps from 0 to 0.25 MW and 0 to
1.01
0.4 MVAr, respectively.
1
Case 4: Combined DG operating at 0.9 pf and the capacitor were
Voltage Profile (p.u)

0.99
placed at their optimal location.
0.98
In this case the maximum DG capacity is selected equal to 50%
0.97
of the total MVA loading of the network at 0.9 pf. So, the max-
0.96
imum DG capacity is 0.3 MW and 0.15 MVAr (with capacitor
0.95
value set to zero, i.e. Qc = 0), respectively, and are varied in small
0.94
incremental steps from 0 to 0.3 MW and 0 to 0.15 MVAr. 0.93
Case 5: Combined DG operating at power factor selected equal 0.92
to the total feeder load power factor and the capacitor were 0.91
placed at their optimal location. 1 2 3 4 5 6 7 8 9 10 11 12
In this case the maximum DG capacity is selected equal to 50% Bus Number
of the total MVA loading of the network at 0.75 pf lag (i.e. Base Case Case3
PFDG = PFD). So, the maximum DG capacity is 0.25 MW and Case 1 Case 4(0.9 pf)
0.2 MVAr (with capacitor value set to zero), respectively, and Case 2 Case5(0.75 pf)
are varied in small incremental steps from 0 to 0.25 MW and
0 to 0.2 MVAr. Fig. 3. Comparison of voltage profile for different Cases in 12-bus network.
S. Gopiya Naik et al. / Electrical Power and Energy Systems 53 (2013) 967–973 971

Fig. 3 also shows the comparison of voltage at various bus of 12- Case 4: Combined DG operating at 0.9 pf (considered as optimal
bus network for DG operating at 0.9 pf (Case 4) and 0.75 pf (Case pf) lag and the capacitor were placed at their optimal location
5), respectively. It can be seen that the voltage profile improve- In this case the maximum DG capacity is selected equal to 50%
ment with DG operating at 0.75 pf lag is better compared to the of the total MVA loading of the network at 0.9 pf. So, the max-
one at 0.9 pf lag, but the DG capacity required is more which re- imum MW and MVAr capacity of DG is 2.0 and 1.0, respectively,
sults in increased cost of the DG with additional loss reduction and the maximum capacitor capacity is selected as 2.3 MVAr
benefit of about 5%. and is simultaneously varied in small incremental steps from
0 to 2 MW, 0 to 1 MVAr and 0 to 2.3 MVAr.
4.2. 33-Bus network Case 5: Combined DG operating at the pf equal to total feeder
load pf and the capacitor were placed at their optimal location.
This is a 12.66 kV radial distribution system having 33 buses In this case the maximum DG capacity is selected equal to 50%
and 32 branches. The total load of the feeder is 3.72 MW and of the total MVA loading of the network at 0.85 pf lag (i.e.
2.3 MVAr. The line and load data are given in [35]. The combined PFDG = PFD). So, maximum MW and MVAr capacity of DG is
load power factor of this system is 0.85. 2.0 and 1.2, respectively, and the maximum capacity of capaci-
By sensitivity analysis given in Fig. 4, the optimal locations ob- tor is selected as 2.3 MVAr and is simultaneously varied in small
tained for DG and capacitor are 18 and 33 where the real power incremental steps from 0 to 2 MW, 0 to 1.2 MVAr and 0 to
loss sensitivity w. r. t real and reactive power injection are high, 2.3 MVAr.
respectively.
The optimal sizes obtained for different cases considered are
Case 1: Only capacitor is placed at the optimal location. 1 MVAr, 1 MW, (1 MW, 1 MVAr), (1.0 MW, 0.5 MVAr, 1 MVAr),
In this case the maximum capacity of capacitor is taken equal to and (0.8 MW, 0.4 MVAr, 0.8 MVAr), respectively. Table 2 compares
total MVAr loading of the network, i.e. 2.3 MVAr and varied in the results of different cases considered. It is seen from the table
small incremental steps from 0 to 2.3 MVAr. that if optimal size of DG that supplying both real and reactive
Case 2: Only DG operating at upf is placed at the optimal power at bus 18 and the capacitor at bus 33 were placed simulta-
location. neously, more loss reduction can be achieved compared to the
In this case the maximum capacity of the DG is taken equal other cases considered.
to 50% of the total MW loading of the network, i.e. The comparisons of voltage profile at different buses for the var-
0.5  3.72  2.0 MW and is varied in small incremental steps ious cases considered in a 33-bus network are depicted in Fig. 5. It
from 0 to 2.0 MW. can be seen from the figure that if combined DG and capacitor,
Case 3: Combined DG operating at upf and capacitor were where DG is capable to supply reactive power in addition to real
placed at their optimal location. power are optimally allocated can result in the substantial
In this case the maximum capacity of DG and capacitor are improvement in the voltage profile along the feeder compared to
selected same as cases 1 and 2 and are simultaneously varied
in small incremental steps from 0 to 2 MW and 0 to 2.3 MVAr,
respectively.
1.04
1.02
Voltage Profile (p.u)

Bus Number 1
0 0.98
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
Real power loss sensitivity

-0.02 0.96
-0.04 0.94
-0.06 0.92
0.9
-0.08
0.88
-0.1
0.86
-0.12 0.84
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33
-0.14
-0.16 Bus Number
-0.18 Base Case Case 3

Real Power Loss Sensitivity Real Power Loss Sensitivity Case 1 Case 4 (0.9 pf)
w.r.t Real Power Injection w.r.t Reactive Power
Injection Case 2 Case 5 (0.85 pf)

Fig. 4. Real power loss sensitivity at various buses of a 33-bus network. Fig. 5. Comparison of voltage profile for different cases in 33-bus network.

Table 2
Optimal results of 33-bus network.

Particulars Total real power % Loss Capacity/optimal location Minimum voltage


loss (kW) reduction in the system (p.u.)
Base Case 213.3 – – 0.9065 at bus 18
Case 1: Only capacitor 164.6 22.83 1.0 MVAr Capacitor at bus 33 0.91654 at bus 18
Case 2: Only DG with upf 142.34 33.29 1.0 MW DG at bus 18 0.9311 at bus 33
Case 3: DG with upf and capacitor 96.70 54.66 1.0 MW DG at bus 18 and 1.0 MVAr capacitor at bus 33 0.96003 at bus 30
Case 4: DG at 0.9 pf and capacitor 90.9 57.38 1.0 MW, 0.5 MVAr DG at bus 18 and 1.0 MVAr capacitor at bus 33 0.9646 at bus 30
Case 5: DG at 0.85 pf and capacitor 89.72 57.94 0.8 MW, 0.4 MVAr DG at bus 18 and 0.8 MVAr capacitor at bus 33 0.9566 at bus 30
972 S. Gopiya Naik et al. / Electrical Power and Energy Systems 53 (2013) 967–973

Before DG-Capacitor
Current magnitude (p.u)
After DG-Capacitor

Branch Number

Fig. 6. Feeder loading before and after DG–capacitor allocation for Case 5 of 33-bus network.

Table 3 Table 4
Comparison of optimal results of different approaches for 33-bus network. Comparison between single and multiple DG capacitor allocation.

Method [21] [20] [36] Proposed Particulars Single DG capacitor Multiple DG capacitor
allocation allocation
Optimal location(s) 6 6 6 18 and 33
DG capacity (MW) 2.49 3.38 2.4 0.76 DG capacity (MW) 0.76 0.855
Capacitor capacity (MVar) – – – 0.8 Capacitor capacity (MVar) 0.80 0.90
Percentage loss reduction 47.33 44.83 48.19 57.94 Power loss 89.72 84.28
% Loss reduction 57.94 60.49

1.01
1 [21,36], the DG units are limited to supply real power only where
as in the method [20] the DG unit is capable to supply both real and
Voltage profile (p.u)

0.99
reactive power. But, in the presented work the combined DG and
0.98 capacitor (Case 5) where DG unit is capable to deliver both real
0.97 and reactive power to the network is resulted in more loss reduc-
0.96 tion and better voltage profile in comparison to other methods.

0.95
0.94 4.3. Multiple DG capacitor allocation
0.93
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33
Optimal locations: From Fig. 4 it s clear that bus numbers 18
Bus Number and 17 have got highest values of real power loss sensitivity in
Single DG Capacitor Multiple DG Capacitor decreasing order with respect to real power injection and these
Allocation allocation
values are very close to each other. Therefore, bus number 18
Fig. 7. Voltage profile of single/multiple DG capacitor allocation. and 17 are considered as the candidate buses for DG siting. Further,
bus number 33 and 32 have got highest values of real power loss
sensitivity in decreasing order with respect to reactive power
the case when DG supplying only real power and capacitor combi- injection and are approximately same therefore, these buses are
nation was placed at their optimal locations. considered as the candidates for capacitor siting.
Fig. 5 also shows the comparison of voltage at various bus of 33- Optimal size(s): For determining the optimal size of multiple
bus network for 0.9 pf (Case 4) and 0.85 pf (Case 5). It can be seen DG and capacitor, simulation is conducted only for the case 5 of
that there is voltage limit violation with DG operating at 0.9 pf lag IEEE 33-bus network. Applying the algorithm detailed in Sec-
compared to that one at 0.85 pf lag, also the DG capacity required tion 3.1.2, optimal sizes of multiple DG and capacitor required
is more which results in increased cost of the DG with less loss for total possible minimum real power loss in the system satisfying
reduction of about 0.56% from Case 5. the system constraints are found to be 0.447 MVA, 0.559 MVA and
Feeder loading before and after DG–capacitor allocation for the 0.4 MVAR, 0.5 MVAR at locations 18, 17 and 33, 32, respectively.
Case 5 of 33-bus network is given in Fig. 6. It can be seen from the With this capacity the resulted total real power loss is 84.28 kW
figure that there results in significant release of (32.64%) line load- which is lesser than single DG capacitor allocation by 5.44 kW,
ing in comparison to base case (without DG). So, the life time of the but at the cost of more DG and capacitor size requirements. Com-
feeder is increased and the existing system can be used to supply parison of single and multiple-DG capacitor allocation is given in
any possible future load growth. Table 4.
To validate the results obtained by the proposed method, the Fig. 7 shows the voltage profile for single and multiple DG
proposed analytical method is compared with the solutions ob- capacitor allocation cases. It is observed that voltage profile is
tained by analytical method [21,36], and ABC algorithm [20] and somewhat improved in the case of multiple DG capacitor
the same is given in Table 3. In those methods proposed in allocation.
S. Gopiya Naik et al. / Electrical Power and Energy Systems 53 (2013) 967–973 973

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