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SEMICONDUCTOR TECHNICAL DATA by 2N5555/D

 


N–Channel — Depletion
1 DRAIN

3
GATE

2 SOURCE
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain – Source Voltage VDS 25 Vdc
Drain – Gate Voltage VDG 25 Vdc 1
2
3
Gate – Source Voltage VGS 25 Vdc
Forward Gate Current IGF 10 mAdc CASE 29–04, STYLE 5
Total Device Dissipation @ TC = 25°C PD 350 mW TO–92 (TO–226AA)
Derate above 25°C 2.8 mW/°C
Junction Temperature Range TJ – 65 to +150 °C
Storage Temperature Range Tstg – 65 to +150 °C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS
Gate – Source Breakdown Voltage (IG = 10 µAdc, VDS = 0) V(BR)GSS 25 — Vdc
Gate Reverse Current (VGS = 15 Vdc, VDS = 0) IGSS — 1.0 nAdc
Drain Cutoff Current (VDS = 12 Vdc, VGS = – 10 V) ID(off) — 10 nAdc
Drain Cutoff Current (VDS = 12 Vdc, VGS = – 10 V, TA = 100°C) — 2.0 µAdc
ON CHARACTERISTICS
Zero – Gate –Voltage Drain Current(1) IDSS 15 — mAdc
(VDS = 15 Vdc, VGS = 0)
Gate–Source Forward Voltage VGS(f) — 1.0 Vdc
(IG(f) = 1.0 mAdc, VDS = 0)
Drain–Source On–Voltage VDS(on) — 1.5 Vdc
(ID = 7.0 mAdc, VGS = 0)
Static Drain–Source On Resistance rDS(on) — 150 Ohms
(ID = 0.1 mAdc, VGS = 0)
SMALL– SIGNAL CHARACTERISTICS
Small–Signal Drain–Source “ON” Resistance rds(on) — 150 Ohms
(VGS = 0, ID = 0, f = 1.0 kHz)
Input Capacitance Ciss — 5.0 pF
(VDS = 15 Vdc, VGS = 0, f = 1.0 MHz)
Reverse Transfer Capacitance Crss — 1.2 pF
(VDS = 0, VGS = 10 Vdc, f = 1.0 MHz)
SWITCHING CHARACTERISTICS
Turn–On Delay Time (VDD = 10 Vdc, ID(on)
( ) = 7.0 mAdc, td(on) — 5.0 ns
VGS(on) = 0,
0 VGS(off) = –10
10 Vdc)
Vd ) (See
(S Figure
Fi 1)
Rise Time tr — 5.0 ns
Turn–Off Delay Time (VDD = 10 Vdc, ID(on)
( ) = 7.0 mAdc, td(off) — 15 ns
VGS(on) = 0,
0 VGS(off) = –10
10 Vdc)
Vd ) (See
(S Figure
Fi 1)
Fall Time tf — 10 ns
1. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 3.0%.

Motorola Small–Signal Transistors, FETs and Diodes Device Data 1

 Motorola, Inc. 1997
2N5555
PULSE WIDTH
VGS(on)
VDD 90% 90%
50 OHM TEKTRONIX 50% 50%
COAXIAL 567 10% 10%
1.0 k INPUT VGS(off)
CABLE SAMPLING
10 k SCOPE
INPUT PULSE INPUT PULSE
PULSE 50 OHM COAXIAL CABLE
RISE TIME FALL TIME
GENERATOR
(50 OHMS) 1.0 k 50 Rin =
50 OHMS
td(on) td(off)
OUTPUT 10% 10%
INPUT PULSE
RISE TIME < 1.0 ns 90% 90%
FALL TIME < 1.0 ns
NOMINAL VALUE OF “ON” PULSE WIDTH = 400 ns tr tf
DUTY CYCLE ≤ 1.0%
GENERATOR SOURCE IMPEDANCE = 50 OHMS
Figure 1. Switching Times Test Circuit

POWER GAIN
24

f = 100 MHz
20
PG , POWER GAIN (dB)

16

12 400 MHz

8.0 Tchannel = 25°C

VDS = 15 Vdc
VGS = 0 V
4.0
0 2.0 4.0 6.0 8.0 10 12 14
ID, DRAIN CURRENT (mA)

Figure 2. Effects of Drain Current

Reference VALUE
Designation 100 MHz 400 MHz
NEUTRALIZING
COIL L1 C2 C3 C1 7.0 pF 1.8 pF

C1 C2 1000 pF 17 pF
INPUT C4 TO 500 Ω
L2 LOAD C3 3.0 pF 1.0 pF
TO 50 Ω C5
Rg′ L3 CASE C4 1–12 pF 0.8–8.0 pF
SOURCE
C6 C7 C5 1–12 pF 0.8–8.0 pF
COMMON C6 0.0015 µF 0.001 µF
VGS VDS ID = 5.0 mA
+15 V C7 0.0015 µF 0.001 µF
L1 3.0 µH* 0.2 µH**
Adjust VGS for NOTE: The noise source is a hot–cold body
ID = 50 mA (AIL type 70 or equivalent) with a L2 0.15 µH* 0.03 µH**
VGS < 0 Volts test receiver (AIL type 136 or equivalent). L3 0.14 µH* 0.022 µH**

*L1 17 turns, (approx. — depends upon circuit layout) AWG #28 **L1 6 turns, (approx. — depends upon circuit layout) AWG #24
enameled copper wire, close wound on 9/32″ ceramic coil enameled copper wire, close wound on 7/32″ ceramic coil
form. Tuning provided by a powdered iron slug. form. Tuning provided by an aluminum slug.
*L2 4–1/2 turns, AWG #18 enameled copper wire, 5/16″ long, **L2 1 turn, AWG #16 enameled copper wire, 3/8″ I.D.
3/8″ I.D. (AIR CORE). (AIR CORE).
*L3 3–1/2 turns, AWG #18 enameled copper wire, 1/4″ long, **L3 1/2 turn, AWG #16 enameled copper wire, 1/4″ I.D.
3/8″ I.D. (AIR CORE). (AIR CORE).

Figure 3. 100 MHz and 400 MHz Neutralized Test Circuit

2 Motorola Small–Signal Transistors, FETs and Diodes Device Data

 2N5555
NOISE FIGURE
(Tchannel = 25°C)
10 6.5
ID = 5.0 mA
VDS = 15 V
8.0 5.5
VGS = 0 V
NF, NOISE FIGURE (dB)

NF, NOISE FIGURE (dB)

6.0 4.5
f = 400 MHz f = 400 MHz

4.0 3.5

2.0 2.5
100 MHz 100 MHz

0 1.5
0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 0 2.0 4.0 6.0 8.0 10 12 14
VDS, DRAIN–SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (mA)

Figure 4. Effects of Drain–Source Voltage Figure 5. Effects of Drain Current

INTERMODULATION CHARACTERISTICS
+ 40
3RD ORDER INTERCEPT
Pout , OUTPUT POWER PER TONE (dB)

+ 20
0 VDS = 15 Vdc
f1 = 399 MHz
– 20 f2 = 400 MHz
– 40
– 60
– 80
– 100 3RD ORDER IMD
OUTPUT @ IDSS,
– 120 FUNDAMENTAL
0.25 IDSS
OUTPUT @ IDSS,
– 140
0.25 IDSS
– 160
– 120 – 100 – 80 – 60 – 40 – 20 0 + 20
Pin, INPUT POWER PER TONE (dB)

Figure 6. Third Order Intermodulation Distortion

Motorola Small–Signal Transistors, FETs and Diodes Device Data 3

2N5555
COMMON SOURCE CHARACTERISTICS
ADMITTANCE PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C)

30 5.0

grs , REVERSE TRANSADMITTANCE (mmhos)

brs , REVERSE SUSCEPTANCE (mmhos)
20 3.0
bis, INPUT SUSCEPTANCE (mmhos)
gis, INPUT CONDUCTANCE (mmhos)

2.0
10 bis @ IDSS
brs @ IDSS
7.0 1.0
5.0
0.7
0.25 IDSS
3.0 gis @ IDSS 0.5
2.0 0.3
gis @ 0.25 IDSS
0.2
1.0
0.7
0.1
0.5 grs @ IDSS, 0.25 IDSS
bis @ 0.25 IDSS 0.07
0.3 0.05
10 20 30 50 70 100 200 300 500 700 1000 10 20 30 50 70 100 200 300 500 700 1000
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

Figure 7. Input Admittance (yis) Figure 8. Reverse Transfer Admittance (yrs)

gfs, FORWARD TRANSCONDUCTANCE (mmhos)

20 10
|b fs|, FORWARD SUSCEPTANCE (mmhos)

bos, OUTPUT SUSCEPTANCE (mhos) 5.0

gos, OUTPUT ADMITTANCE (mhos)

10
7.0 gfs @ IDSS 2.0 bos @ IDSS and 0.25 IDSS
5.0
1.0
3.0 gfs @ 0.25 IDSS
0.5
2.0
0.2 gos @ IDSS
1.0 |bfs| @ IDSS 0.1
0.7
0.5 0.05
|bfs| @ 0.25 IDSS
gos @ 0.25 IDSS
0.3 0.02
0.2 0.01
10 20 30 50 70 100 200 300 500 700 1000 10 20 30 50 70 100 200 300 500 700 1000
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

Figure 9. Forward Transadmittance (yfs) Figure 10. Output Admittance (yos)

4 Motorola Small–Signal Transistors, FETs and Diodes Device Data

 2N5555

COMMON SOURCE CHARACTERISTICS

S–PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz)

30° 20° 10° 0° 350° 340° 330° 30° 20° 10° 0° 350° 340° 330°
100 ID = 0.25 IDSS
40° 1.0 320° 40° 0.4 320°
100 200
200 300
0.9 0.3
50° 400 310° 50° ID = IDSS, 0.25 IDSS 310°
300 900
0.8 500 800 0.2
ID = IDSS
60° 400 300° 60° 300°
700
600 600

70° 0.7 500 290° 70° 500 0.1 290°

700 400
600
80° 280° 80° 300 280°
0.6 700 800 0.0
800 200
90° 900 270° 90° 270°
900 100

100° 260° 100° 260°

110° 250° 110° 250°

120° 240° 120° 240°

130° 230° 130° 230°

140° 220° 140° 220°

150° 160° 170° 180° 190° 200° 210° 150° 160° 170° 180° 190° 200° 210°

Figure 11. S11s Figure 12. S12s

30° 20° 10° 0° 350° 340° 330° 30° 20° 10° 0° 350° 340° 330°
100 200
300 ID = 0.25 IDSS
40° 320° 40° 1.0 320°
100 200 400
500
300 600
400
0.6 0.9 500 700
50° 310° 50° 600 800 310°
ID = IDSS 700
800 900
0.5 0.8 900
60° 300° 60° 300°

900 0.4 0.7

70° 290° 70° 290°
800
900
80° 700 800 280° 80° 280°
0.3 0.6
700 ID = 0.25 IDSS
90° 600 270° 90° 270°
600
500 500 0.3
100° 260° 100° 260°
400 100
400
110° 300 200 250° 110° 250°
0.4
300
120° 240° 120° 240°
ID = IDSS 200 0.5
100

130° 230° 130° 230°

0.6

140° 220° 140° 220°

150° 160° 170° 180° 190° 200° 210° 150° 160° 170° 180° 190° 200° 210°

Figure 13. S21s Figure 14. S22s

Motorola Small–Signal Transistors, FETs and Diodes Device Data 5

2N5555
COMMON GATE CHARACTERISTICS
ADMITTANCE PARAMETERS
(VDG = 15 Vdc, Tchannel = 25°C)

20 0.5

grg , REVERSE TRANSADMITTANCE (mmhos)

brg , REVERSE SUSCEPTANCE (mmhos)
0.3
big, INPUT SUSCEPTANCE (mmhos)
gig, INPUT CONDUCTANCE (mmhos)

10
0.2 brg @ IDSS
7.0 gig @ IDSS
5.0
0.1
3.0 grg @ 0.25 IDSS 0.07
2.0 0.05
0.03 0.25 IDSS
1.0
0.02
0.7
0.5 big @ IDSS
big @ 0.25 IDSS 0.01 gig @ IDSS, 0.25 IDSS
0.3 0.007
0.2 0.005
10 20 30 50 70 100 200 300 500 700 1000 10 20 30 50 70 100 200 300 500 700 1000
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

Figure 15. Input Admittance (yig) Figure 16. Reverse Transfer Admittance (yrg)
gfg , FORWARD TRANSCONDUCTANCE (mmhos)

10 1.0
gfg @ IDSS
bfg , FORWARD SUSCEPTANCE (mmhos)

7.0 bog, OUTPUT SUSCEPTANCE (mmhos) 0.7 bog @ IDSS, 0.25 IDSS
gog, OUTPUT ADMITTANCE (mmhos)

5.0 0.5
3.0 gfg @ 0.25 IDSS 0.3
2.0 0.2

1.0 0.1
0.7 0.07
0.5 0.05 gog @ IDSS
bfg @ IDSS
0.3 0.03
0.2 brg @ 0.25 IDSS 0.02
gog @ 0.25 IDSS
0.1 0.01
10 20 30 50 70 100 200 300 500 700 1000 10 20 30 50 70 100 200 300 500 700 1000
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

Figure 17. Forward Transfer Admittance (yfg) Figure 18. Output Admittance (yog)

6 Motorola Small–Signal Transistors, FETs and Diodes Device Data

 2N5555
COMMON GATE CHARACTERISTICS
S–PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz)

30° 20° 10° 0° 350° 340° 330° 30° 20° 10° 0° 350° 340° 330°

40° 0.7 320° 40° 0.04 320°

ID = 0.25 IDSS
100 200
300
0.6 400 0.03
50° 100 500 310° 50° 310°
200
300 600
0.5 0.02
400 700
60° 300° 60° 300°
500
ID = IDSS 800
0.4 600 0.01
70° 290° 70° 290°
900
700
80° 280° 80° 280°
0.3 800 0.0
100
90° 900 270° 90° 270°
500
600
100° 260° 100° 600 ID = 0.25 IDSS 260°
ID = IDSS
110° 250° 110° 700 250°
700 0.01
800
120° 240° 120° 800 240°
0.02
900
130° 230° 130° 230°
900 0.03

140° 220° 140° 0.04 220°

150° 160° 170° 180° 190° 200° 210° 150° 160° 170° 180° 190° 200° 210°

Figure 19. S11g Figure 20. S12g

30° 20° 10° 0° 350° 340° 330° 30° 20° 10° 0° 350° 340° 330°
1.5 300
40° 0.5 320° 40° 1.0 500 320°
200
400 700
100 600
100
0.4 0.9 800 900
50° ID = IDSS 310° 50° 310°
100 ID = IDSS, 0.25 IDSS

0.3 0.8
60° 300° 60° 300°

0.2 0.7
70° ID = 0.25 IDSS 290° 70° 290°

80° 280° 80° 280°

0.1 0.6
900
90° 270° 90° 270°
900
100° 260° 100° 260°

110° 250° 110° 250°

120° 240° 120° 240°

130° 230° 130° 230°

140° 220° 140° 220°

150° 160° 170° 180° 190° 200° 210° 150° 160° 170° 180° 190° 200° 210°

Figure 21. S21g Figure 22. S22g

Motorola Small–Signal Transistors, FETs and Diodes Device Data 7

2N5555
PACKAGE DIMENSIONS

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
A B
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
R 4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSION D AND J APPLY BETWEEN L AND K
P MINIMUM. LEAD DIMENSION IS UNCONTROLLED
IN P AND BEYOND DIMENSION K MINIMUM.
L
SEATING F
PLANE K INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.175 0.205 4.45 5.20
B 0.170 0.210 4.32 5.33
C 0.125 0.165 3.18 4.19
X X D D 0.016 0.022 0.41 0.55
G F 0.016 0.019 0.41 0.48
G 0.045 0.055 1.15 1.39
H J H 0.095 0.105 2.42 2.66
J 0.015 0.020 0.39 0.50
V C K 0.500 ––– 12.70 –––
L 0.250 ––– 6.35 –––
SECTION X–X N 0.080 0.105 2.04 2.66
1 N P ––– 0.100 ––– 2.54
R 0.115 ––– 2.93 –––
N V 0.135 ––– 3.43 –––

STYLE 5:
CASE 029–04 PIN 1. DRAIN
(TO–226AA) 2. SOURCE
3. GATE
ISSUE AD

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8 ◊ Motorola Small–Signal Transistors, FETs and Diodes Device Data

2N5555/D