This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2020.3028822, IEEE
Transactions on Industrial Electronics

Model-free Predictive Current Control for Multilevel

Voltage Source Inverters
Paul Gistain Ipoum-Ngome, Student Member, IEEE, Daniel Legrand Mon-Nzongo, Member, Rodolfo, C. C.
Flesch, Member, Joseph Song-Manguelle, Senior Member, Mengqi Wang, Member, Tao Jin, Senior Member.

Abstract- This paper proposes a generalization of the model-free the steady-state and transient responses, which has a direct
predictive current controller (MFPCC) for multilevel voltage impact on the system efficiency. For those reasons, some
source inverters (VSIs). MFPCC is an alternative to mitigate the
techniques are used to estimate the required parameters, such as
parameter sensitivity faced by model-based PCC (MPCC), but it
requires a constant update of the stored current variations (CVs) observers or model-parameter identification [15]-[18].
associated with each VSI state to provide a prediction which However, such approaches become quite challenging when the
results in a satisfactory closed-loop response. When a multilevel back EMF or grid voltage is not measured but estimated. In
VSI is considered the number of states increases, which results in addition, both approaches increase the design complexity and
a decrease of the CV update rate, since only one state can be require more computational power for practical implementation.
updated at each sample. To solve this issue, the extended adjacent Model-free predictive control is a promising alternative to
state scheme is used to reduce the possible number of solution
candidates and then a controlled CV is used to compensate the
MPCC and uses a data-driven modeling approach to avoid the
updated CV. Simulation and experimental results obtained with a need for an explicit model of the process [19]-[20]. This
sampling rate of 5 kHz show that the proposed MFPCC exhibits approach adaptively obtains a local linear model for prediction
performance similar to the one of MPCC for nominal parameters. using both actual and past measurement data. The earliest
However, a better current response is obtained in the case of the formulation of a model-free predictive current control (MFPCC)
load parameter mismatch, especially at steady state. was proposed to replace the inner current loop in a 2-level VSI
Index Terms— Predictive current control (PCC), lookup used to drive a synchronous reluctance motor fed by a 2-level
table (LUT), voltage source inverter (VSI). VSI [21]. In this strategy, current predictions are a linear
I. INTRODUCTION function of the actual measured current and the current
differences (CVs) corresponding to different switching states of
Finite control set (FCS) model predictive control (MPC) has
the inverter, which are stored in a lookup table (LUT) from the
gained significant importance in recent years for voltage source
past operation of the system [22]. Thus, MFPCC stability and
inverter (VSI) applications [1], since it exploits the discrete
accuracy depend on the precision of the measured current and
nature of VSIs and allows an implementation which is suitable
how frequently the LUT is updated. Since only one switching
for classical digital processors [1]-[2]. Traditional FCS-MPC
state can be applied at a given time instant, just one value of the
uses the discrete-time model of the system to predict the system
LUT is updated at each sample (the one which was chosen by
output behavior for one or more-time steps ahead for all the
the controller at that sample). The remaining CVs are kept in
inverter states and then selects the one which minimizes a given
the LUT until their corresponding switching states are chosen
cost function to apply at the next sample [3]-[4].
by the controller, which may result in an aging of some CVs
Even though FCS-MPC can provide an optimal control action
and consequently an inaccurate current prediction. Therefore, it
for the nominal case, its high sensitivity to parameter variations
is important to keep a limited number of old CVs in the LUT,
is a limitation [4]-[7]. Therefore, some studies proposed
since prediction errors can decrease the controller performance,
methods to improve the robustness of MPC to plant-model
lead to a stagnant current conduction mode operation or even
mismatches [8]-[11]. Those efforts are quite important for real
cause closed-loop instability. Several Direct and indirect update
applications, since the internal model of MPC is a linear
methods (DU and IU) are used to update the LUT after a period
approximation of nonlinear physical phenomena.
of time and at each sample, respectively [22]-[24].
In grid-connected applications, the equivalent impedance of
In multilevel VSIs (ML-VSIs) the problem of aging CVs
the system depends on the frequencies of the current
becomes much more challenging, since the number of states
components and its value is also affected by temperature, core
increases exponentially with the number of levels. Given that
saturation of the low-frequency transformer, cable overload,
only the CV associated with one state is refreshed at each
among other factors [10]-[12]. In electric machines, the
sample, the update rate can become very small if the number of
resistance of the stator and rotor windings change with the
levels increases too much. In addition, larger sampling periods
temperature and operating point [13]. In addition, the magnetic
are usually considered in medium to high-power applications,
and leakage inductances are affected by those two factors and,
since the switching losses play an important role in the overall
more important, the magnetic saturation. The variation of
efficiency [25]-[26]. As a consequence, the update rate of the
parameters due to the temperature is a slow process, as the
CVs becomes even smaller and the problem becomes more
thermal time constants are larger, while the parameter changes
complex. Those are the main reasons for MFPCC applications
caused by magnetic saturation have faster dynamics [13]-[15].
being limited to 2-level VSIs to date.
Since MPCC relies on the model to make the predictions, any
This paper proposes a data-driven MFPCC for ML-VSIs as
mismatch between the actual parameters and the ones used in
an alternative solution for MPC to mitigate the influence of load
the internal model of the controller leads to the deterioration of

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parameter changes on the closed-loop response. To achieve this
goal, a suitable method that avoids using a model to reduce the
number of candidate states for MPCC is considered [27]-[28].
However, the approximation of future CVs by the values in the
LUT has an inherent error, which depends on the update rate of
the LUT, the dynamics of the system and the sampling
frequency. Thus, at low sampling frequencies this error has
higher amplitude, which affects the dynamics of the CVs and
limits MFPCC accuracy, especially for systems with small time
constants. To mitigate this effect, a compensated direct update
method is applied at each sample to achieve a fair refresh of CV,
whose phase and amplitude are controlled by a PI-function. The
proposed method is evaluated for different levels of inverter
operating at 5 kHz used to control the current of an RL-load.
II. MODEL-BASED PREDICTIVE CURRENT CONTROL
Fig. 1 presents a ML-VSI connected to an RL-load. The
topology used here is a series connection of 𝐶 cells to generate
up to number of voltage level (Table I) per phase. Each cell 𝑗
is constituted of a CHB fed by DC voltage with amplitude 𝐸 .
Fig. 1. Multilevel voltage source inverter based cascaded H-bridge
In an -level CHB inverter, each output-voltage per phase,
𝑢 ( 𝑥 = {𝑎, 𝑏, 𝑐} ), is defined by the combination of the
switching state and given by
C
uxn  (T2 j 1  T2 j ) E j ,
j 1
where 𝑇 and 𝑇 are the top switches of a CHB or cell 𝑗.
The number of three-phase output voltage combination in abc
or 𝛼𝛽 (𝑋 = {𝛼, 𝛽}) reference frame is 𝑚 as given in Table I and
each voltage vector (VV) candidate is given by
T T
z
u  M * uabc
z z
, u  uz uz  and uabc
z
 uaz ubz ucz  ,
where 𝑀 is the transformation matrix and 𝑢 is the voltage
vector, with the index 𝑧 going from 1 to 𝑚. For the sake of
simplicity, the 𝛼𝛽 subscripts are omitted in the equations below.
In MPCC, the discrete-time model of an RL-load in 𝛼𝛽 is
used to obtain at the 𝑘-th sample the current prediction for the
(𝑘 + 1)-th sample if the voltage vector (VV) 𝑢 is considered
at 𝑘. This prediction is denoted as 𝑖 (𝑘 + 1) and given by
Ts z
 u ( k )  Ri ( k )  ,
i z ( k  1)  i ( k ) 
L i ( k  2)  i ( k  1)   i
where 𝑅 is the load resistance, 𝑇 is the control period, 𝐿 is the
load inductance, and 𝑖(k) is the measured current at 𝑘-th sample.
TABLE I
Parameters for Multi-Level cascaded H-bridge inverters
Number of levels (𝑙) 3 5
Number of cells (𝐶 ) 𝐶 = ( − 1)/2 1 2
State VVs (𝑚)
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In practice, a time delay compensation scheme [29]-[31] is
used and requires calculation of the prediction at 𝑘 + 2, which
is denoted as 𝑖 (𝑘 + 2), and obtained from a recursive use of
(3) with a time shift. These 𝑚 current predictions are evaluated
using the quadratic cost function of the reference tracking error
shown in (4) to obtain the best state to apply at the next sample.
2
J z  i* (k  2)  i z (k  2) (4)
The main concern in MPCC is the use of prediction of the
current in the future, which is made based on a model of the
system. However, the load parameters are often time-varying in
several industrial applications, so the use of a constant model
can be sometimes associated with large prediction errors [32].
III. MODEL-FREE PREDICTIVE CURRENT CONTROL
MFPCC is based on the idea that the prediction is a linear
function of the actual measurement and future CVs. In addition,
the fact that the prediction can be done within a short time is
used to make some approximations of the unknown future CVs.
A. Principle of MFPCC for 2-level inverter
Instead of using a prediction model to obtain the future
current behavior associated with each VV, MFPCC uses the
idea that for very short sampling periods it is possible to
approximate the future CV that will be caused by a given
voltage state by the CV observed in the system when this state
was applied for the last time. This process is illustrated with an
example in Fig. 2. In this case, at k, the LUT contains the values
of the CV observed in the past for all the seven VVs. For
instance, 𝑢 applied at sample (k-j-1) results in a CV ∆𝑖 ,
computed at (k-j), which is stored in the LUT. If 𝑢 is used
latter, the CV associated with it is replaced by the new one in
the LUT. At a given sample k, a current denoted 𝑖 due to a
(1) VV 𝑢 that was applied at (k-1) is measured. With the
previous current 𝑖 saved, the CV ∆𝑖 due to VV 𝑢
(𝑧 ∈ {1, 2, . . ,7}) is evaluated by (5) in step 3 as in Fig. 2.
 i z ( k )  i z ( k )  i z ( k  1)
k 1 k 1 k2
(5)
The same procedure is used to obtain the predicted currents
𝑖 and 𝑖 , as given in (6)-(7). To calculate (6)-(7) at the k-
(2) th sample (step 4), future CVs ∆𝑖 and ∆𝑖 are required.
i z ( k  1)  i z ( k )   i z ( k  1)
k k 1 k
(6)
i ( k  2)  i ( k  1)   i ( k  2)
z k 1 z k z k 1
(7)
However, at the 𝑘-th sample all CVs for all the VVs in a 2-
level VSI are saved in LUT, so it is possible to obtain the
predictions as in (8)-(9) if future CVs ∆𝑖 and ∆𝑖 are
approximated by the ones in LUT for the positions to be
considered at k (𝑧 ) and k+1 (𝑧 ).
i z ( k  1)  i z ( k )   i z  z (8)
k k 1 k
(3)
z k 1 z k z
(9)
k 1
In MFPCC, (8)-(9) used for predictions do not depend
explicitly on the system parameters, which is not true for (3)
used by MPCC. Therefore, a better robustness under parameter
7 change is expected with MFPCC. In addition, the execution
3 time for prediction will be shorter than the one needed by MPC
27 125 343 since only less time-consuming operators are used [21]-[22].
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𝑖
𝑋 ∈ {𝛼, 𝛽}

Fig. 2. Representation of current prediction (line) and CVs (small circle) for a prediction horizon of 2 for a 2-level VSI
However, the prediction accuracy of (8)-(9) strongly depends
on the accuracy of the measurements and on the ability of the
CVs in the LUT to represent the real system behavior [22]. Thus,
the prediction quality is affected by the information stored in
the LUT and it must contain reliable data about the actual
operating point. Since only one current is measured at a sample,
just one CV is updated at each sample in the LUT. For example,
at k only the CV ∆𝑖 with a circle in red in Fig. 2 is updated.
The literature brings some CV update methods which try to
guarantee that all the CVs are good representations of the
current operating point and they are detailed in next section.
B. Existing update methods used for 2-level VSI
The update methods can be divided into DU and IU methods.
DU forces the update by applying the state for which the CV
has not been refreshed for a given period of time [22]. Such
forced update is made at the expense of the current accuracy,
since at some samples the applied VV is not optimum.
The IU scheme considers the last three updated CVs in the
LUT to reconstruct the older ones [23]. In this case, the update
by reconstruction of the four older CVs is made at each sample.
Thus, the update rate of IU is more effective than that of DU,
but it is much more complex and requires a proper tuning of the
update rule, which is usually done based on analytical relations.
When an ML-VSI is considered, the current predictions are
still provided by (8)-(9). However, the number of CVs to be
stored in the LUT will increase from eight to 𝑚. For example,
for a 7-level VSI, there are 𝑚=343 states to be update in the
LUT. To keep the LUT update, the DU method would require
a constant use of non-optimum states which would have serious
impacts on the system response. For the IU scheme, the rules to
define the indirect update of more than 300 CVs would be very
complex. Even with rules defined, the implementation of the
algorithm would not be suitable for regular digital processors.
IV. PROPOSED MFPCC FOR MULTILEVEL INVERTERS
The proposed MFPCC is presented in Fig. 3. Compared to
[22], the extended adjacent state (EAS) and the proposed
compensated current variation (CCV) are the newly added
schemes. EAS scheme predicts a subset of the LUT with up to
7 candidate CVs. The CCV scheme mitigates the load current
component in CV that affects the MFPCC current.
Fig. 3. General view of the Proposed MFPCC for ML-VSIs.
A. Extended adjacent state (EAS) approach
In a ML-VSI, the number 𝑚 of VVs increases, so the number
of CVs ∆𝑖 stored in the LUT also increases. If the reference is
sinusoidal, the VVs applied to the load follow a rotating pattern
in steady-state. Thus, for two consecutive samples the VVs
applied are very similar. In other words, the search for the
optimal VV can be limited to a subset of VVs that are close to
the last applied VV [27]-[28].
TABLE II
Type of sub-space VV generated by EAS approach
No-redundant states (𝑚 ) 12𝐶 + 6𝐶 + 𝐶 19 61 127
7-adj VVs (𝐺 ) 12𝐶 − 6𝐶 + 1 7 37 91
5-adj VVs (𝐺 ) 12𝐶 − 1 6 18 30
4-adj VVs (𝐺 ) 6 6 6 6
𝐴𝑆𝑃
𝐴𝑆𝑃
𝐴𝑆𝑃
𝐴𝑆𝑃𝑝𝑖
Fig. 4. Inverter space and subset VVs in αβ-plane with coded positions
To illustrate the EAS method, consider the 127 state VVs of
a 7-level inverter after a CMV minimization represented in αβ-
frame (Fig. 4). After exclusion of the redundant VVs with
higher common mode voltage (CMV) the number of remaining
states is 𝑚 (Table II), so a coded position value 𝑧 = 𝑝 ∈
{1 ,2, . . , 𝑚 } is used to describe the space VV as shown in Fig.
4. By looking for the VVs which are equidistant to a given state
position 𝑝 , the adjacent state positions (𝐴𝑆𝑃 ) shown in red,
blue or green colours in Fig. 4 can be used to index the next
sub-space VV to evaluate, if 𝑝 is equal to the previous optimal
position [28]. The first type is defined for 𝑝 from 0 to 90 (G7
in red colour), the second type from 91 to 120 (G5 in green
colour), and the third type from 121 to 126 (G4 in purple colour).
If 𝑧 = 37, the next ASP is 𝐴𝑆𝑃 as illustrated in Fig. 4. This
subspace contains 7 VVs, but for VVs at the border of the outer
hexagon, as 103, the subspace is 𝐴𝑆𝑃 , and for VVs at the
corner, as 122, the subspace is 𝐴𝑆𝑃 . Thus, by using the EAS

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scheme the length of the LUT to be used at each sample is

similar as in a 2-level VSI. However, in this case DU method is
less effective than in the case of a 2-level, since several LUT
subsets are used, while in a 2-level VSI there is only one LUT.
B. Compensated current variation (CCV)
Seen from the system side, the difference of two CVs
evaluated at (𝑘 + 1)-th and (𝑘 − 𝑗)-th samples is given by (10).
An approximation of a future CV ∆𝑖 by ∆𝑖 in the LUT has
Fig. 7. Principle of proposed compensated current variation (∆𝑖′ )
an error 𝜀 as given in (11) if 𝑧 = 𝑧 . 𝜀 depends on
control period, the load time constant (𝜏) and 𝜀 = 𝑖 −𝑖 . The CV is translated into the proposed CCV by using a new
prediction analytical model. To have a larger boundary 𝑒 , to
z
 ikz k1   ik k jj 1 
L

Ts z k z
u  u k  j 1  
RTs z k 1
 ik  ikzk jj 21 
L  
(10) adjust the CV and still track the reference with a smaller error
𝑒, the amplitude of 𝑖 is attenuated by the gain 𝐺 (Fig. 7.b).
 T   1Ts  (11)
Thus, the scaled measured data point used inside MFPCC is
In (11) it is possible to observe that the error grows with the
now denoted by 𝑖′ (𝑖′ = 𝐺𝑖 ). Using 𝑖′ , the new
sampling time, so the modeling error is larger for larger
current prediction is defined as in (12) instead of (8)-(9).
sampling times. The parameters which can attenuate 𝜀 are the
i ' z ( k  2)  i ' z ( k )   i ' z   i ' z
k 1 k 1 k
(12)
k 1

load time constant 𝜏 and update rate, which attenuates 𝜀 . The

evaluation of the impact of CV on MFPCC for systems with To define the CCV as provided in (13), the classic CV given
different values of 𝜏 is presented in Figs. 5-6 for a 2-level VSI. in (5) is used as error for the PI controller:
The average current error per sample is used for accuracy  i ' z ( k )   i ' kz 1  G ( k i Ts  k p )  ikz  Gk p  ikz 1 ,
k 1 k 2 k 1
(13)
k 2

comparison and for 𝜏 = 0.03 s (Fig. 5), the CV shape is similar
to the inverter voltage and MFPCC has a similar current
response as MPC; but when 𝜏 = 0.003 s (Fig. 6), the amplitude
of the fundamental on the CV is 10 times larger than in the
previous case and has a significant impact on MFPCC accuracy.
The impact of the error 𝜀 is mitigated by recasting the CV
into the compensated current variation (CCV), so that the
resulting CCVs are within a band of values −ℎ ; ℎ when the
positions 𝑧 applied during a current period correspond to an
inverter output level, as illustrated in Fig. 7.a, with 1 ≤ 𝑝 ≤ 𝑛,
where ℎ is the maximum CCV value under nominal load
current. In this case, the CCV signal is multi-band, which is
similar to the control signal of ML-VSIs. Thus, to generate a
CCV, a method based on a PI controller is proposed in this work.
where 𝑘 and 𝑘 are proportional and integral gains of the PI
controller and 𝐺 is the gain between 𝑖 and 𝑖′ .
C. Proposed MFPCC algorithm
The block diagram of the proposed control algorithm is
presented in Fig. 8. The EAS block provides the next LUT
subset and its algorithm are given in [27]-[28]. The MFPCC
part is similar as in [22], but it uses a CCV instead of CV. The
proposed control scheme is shown in Algorithm I. Except for
the direct update (DI) scheme, the main difference between the
proposed control algorithm and MPCC strategy is in the current
prediction. The number of arithmetic operations needed to get
the prediction with the MPCC is 40 that is almost twice the

Times [s]
Fig. 5. Signals for an RL load (1 Ω and 30 mH) under a 2-level VSI at
𝑇 =100 µ𝑠: (a) average current errors; (b) CVs of MFPCC. Fig. 8. Block diagram of Proposed MFPCC for multilevel VSI
Algorithm I: Proposed MFPCC-CVV for MIs
Step 1) Measure 𝑖(𝑘) and read 𝑝 or 𝑧 ;
Step 2) Apply the state located at 𝑧 position;
Step 3) Calculate the compensated current variation (13);
Step 4) Update the current variation located at 𝑧 position;
Step 5) Send 𝑧 to the EAS scheme and then read 𝐴𝑆𝑃 ;
Step 6) Generate the reference 𝑖 ∗ (𝑘 + 2) [31];
Step 7) Predict the currents located at 𝐴𝑆𝑃 positions;
Times [s]
Step 8) Calculate (4) for all positions in 𝐴𝑆𝑃 ;
Fig. 6. Signals for an RL load (10 Ω and 30 mH) under a 2-level VSI at Step 9) Find and store the optimal position 𝑝 ;
𝑇 =100 µ𝑠: (a) average current errors; (b) CVs of MFPCC. Step 10) If startup, active DU scheme [22] and return to step 1).

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Transactions on Industrial Electronics

number required by the MFPCC. But in MFPCC, step 10 is

time-consuming since it is necessary to search the actual LUT
and older LUTs with up to 7 elements each for a state position
associated with the same CV value. If such a state exists it will
be selected as the optimum one for the next sample to update its
CV. Thus, step 10 is the most processor intensive step.
Since the optimization process is equivalent to the one used
in MPCC (steps 7-9 in Algorithm I), it is possible to consider
constraints during the optimization. It is important to notice that
certain types of constraints require a model of the system to be
considered in MPCC and it is not possible to add such
constraints in MFPCC without using a model of the system.
However, constraints which are written as a function of the Fig. 9. Simulations results for system in case 2: current performances at steady-
state (𝑀, 𝑇𝐻𝐷) versus compensator parameters (𝑘 /𝑓,G) considering 𝑘 = 1 .
current can directly be considered in the proposed approach.
D. Parameter tuning for CCV
The CCV in (13) uses a PI controller which considers as inputs
the actual and the previous measured currents. The tuning of
this controller can be challenging to achieve good performance,
but other update structures can be considered as alternatives,
such as the one based on reconstruction [23] and recursive least
squares method [24]. To reduce the design complexity, a tuning
based on a numerical approach is proposed. The tuning is done
such that the average current error (𝑀 ) is minimized as
M  M 1 N
M 
2
, M X (G , k p , k I ) 
N
j 1
i *X  i X
(14)
Fig. 10: Simulation results of required startup time to preload the LUT database

m in M ( G   G , k p   k p , k I   k I )  , for 11-level, 9-level, 7-level, 5-level, and 3-level inverters under nominal
parameters (case 2): (a) 𝑇 = 200 µ𝑠; (b) 𝑇 = 50 µ𝑠.
where 𝑁 is the number of sampling points for a period of 𝑇
seconds of the load current, 𝑋 ∈ {𝛼, 𝛽} or {𝑑, 𝑞}, 0 < 𝐺 ≤ 1, for analyzing the impact of the tuning parameters on the system
performance. The results of part of this analysis for case 2 is
𝑘 = 𝑘 /𝑇 (𝑘 ≥ 0), and 𝑖 is the measured current.
shown in Fig. 9. As shown in the results, a proper tuning is a
The RMS current error 𝐽 ̅ over a period given in (15) can also key factor for ensuring good steady-state response of MFPCC.
be used instead of 𝑀 since both lead to the same solution. In The optimal zone to select 𝑘 and 𝐺 is inside the black contour
addition, other performance criteria such as THD can be and the solution that minimizes 𝑀 is 𝑘 = 20𝑓, and 𝐺 = 0.7.
included during the tuning stage.
J  J  1 N B. Startup and Initialization of LUT
J  , J X (G , k p , k I )   (i *
 iX ) 2 . (15)
2 N j 1
X
To avoid using DU frequently during operation, the empty
After the evaluation of several system configurations and LUT is filled during the startup. As an alternative, analytical
parameters, it was found that 𝑘 can be fixed to unity and and numerical methods that require the model could be used to
preload the database of the LUT. To illustrate the impact of the
achieve good performance. This conclusion reduces the design
number of states on the startup time (ST) ML-VSIs with
to two parameters (𝑘 and 𝐺), which can be selected based on
different number of levels were evaluated and the result
the nominal operating point of the system.
achieved for 5 kHz and 20 kHz are presented in Fig.10. The ST
V. NUMERICAL VALIDATION needed by MFPCC depends on both the number of levels of VSI
For numerical evaluation, ML-VSIs with a number of levels and the sampling time. Under 11-level and at 5 kHz, ST is 65
ms, which is more than 3 times the period of the load current.
from 3 to 11 are considered. In all cases, the VSI is connected
However, ST can be shortened by increasing the sampling
to a load with the parameters reported in Table III. The frequency. For example, with a sampling time equal to 50 µs,
proposed MFPCC and MPCC are compared for 𝑇 = 200 μs. the new ST for the same 11-level VSI takes less than 18 ms. In
A. Example of tuning and analysis of impact of 𝑘 and G addition, for the same configuration the ST is less than 1 ms for
A grid search with ∆𝑘 = 0.5 and ∆𝐺 = 0.05 was considered a 3-level VSI making the proposed strategy a better control
TABLE III candidate for topologies such as 3-level NPC, ANPC and T
NOMINAL OPERATING PARAMETERS OF THE SETUP NPC. However, the neutral point balance issue must be
Parameters Case 1 Case 2 Case 3 Case 4 analyzed and included in the control scheme [31]-[32].
DC link per phase (Vdc) 70 V 70 V 45 V 50 V
After startup, the database which characterizes the system
Nominal resistor (R) 15 Ω 15 Ω 15 Ω 15 Ω
Nominal inductance (L) 30 mH 10 mH 30 mH 15 mH response becomes available and the controller automatically
Max. resistance sensitivity − ±5 Ω − ±5 Ω switches from the objective to update the LUT to the one of
Max. inductance sensitivity − ±5 mH − ±10 mH tracking the reference. To avoid possible current spikes after
Nominal current (I) 10 A 15 A 6A 7A the startup, a small step increase of reference can be made first

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Transactions on Industrial Electronics
to check how well the LUT characterizes the system under
nominal parameters. To do that, the reference in abc frame can
be ramped up for instance from 0 A to 10 A with a step change
of 1 A after each 50 ms to make the system use almost all the
CVs in the LUT. The results in Fig. 11 show that after the LUT
is initialized, the proposed MFPCC provides current errors
similar to the ones obtained with MPCC, which proves that the
LUT is a reliable representation of the actual system dynamics.
Some conclusions can be drawn from a look at CCV and CV
waveforms presented in Figs. 12-13. First, the CCV is
synchronized and has a quite similar shape as the inverter VV
at low load current (Fig. 12) while CV is more affected by the
load current. However, when the operating current is larger, the
CCV shape is less similar to the one of the inverter output
voltage due to the increase of the influence of the load current
(Fig. 13). Second, the difference between the CCV and the CV
of the proposed controller is equivalent to the load current
response with an attenuated amplitude (curve in red color).
Fig. 11. Simulation results under case 1 with increase of 1 A after each 0.1 s for
the proposed controller and MPCC: (a) Current response; (b) relative current
error in 𝛼; (c) relative current error in 𝛽.
Fig. 12. Simulation results for case 1 of CV and CCV and (CCV-CV) under low
load current: (a) 𝛼 component; (b) 𝛽 component.
Fig. 13. Simulation results for case 1 of CV and CCV and (CCV-CV) under
nominal load current: (a) 𝛼 component; (b) 𝛽 component.
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C. Steady state and transient responses at nominal operation
The evaluation of the proposed strategy under 7, 9, and 11
levels shows that the proposed strategy transient and steady-
state responses are very similar to the responses achieved by
MPCC, as shown in Figs. 14-16 for different number of levels.
Thus, after the startup, the dynamic response of MFPCC is
independent on the number of levels of the inverter. In addition,
it has a similar dynamic response as MPCC when the nominal
parameters are considered. The output voltage and current
harmonic spectra for a 7-level VSI presented in Fig. 17 show
that the current and voltage THDs of the MFPCC slightly
increase when compared with the values provided by MPCC.
Such results should be expected since the tuning process of
CVV was done based only on the current accuracy. To improve
the THD, 𝑘 can be adjusted around the optimum solution with
the help of Fig. 9. It is important to notice that the variation of
𝑘 affects more the current ripple, while G has more impact on
the steady-state error. Both parameters should be changed in
opposite directions. For example, the increase of 𝑘 to obtain a
better accuracy increases the steady state error, so to reduce the
error back to values near zero, G should be decreased.
Fig. 14: Simulation result for case 2 with the proposed controller and MPCC
for an 11-level VSI: (a) load current in dq-axis; (b) a-phase current; (c) a-phase
inverter output voltage.
Fig. 15: Simulation result for case 2 with the proposed controller and MPCC
for a 9-level VSI: (a) load current in dq-axis; (b) a-phase current; (c) a-phase
inverter output voltage.
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Transactions on Industrial Electronics

Fig. 18: Simulation result under case 2: (a) current in dq-axis, (b) THD, and
load resistance with slow variations (c) with proposed and MPC under 7-level.

Fig. 16: Simulation result for case 2 with the proposed controller and MPC for
a 7-level VSI: (a) load current in dq-axis; (b) a-phase current; (c) a-phase
inverter output voltage.

Fig. 19: Simulation result under case 2: (a) current in dq-axis, (b) THD, and (c)
load inductance with slow variation with proposed and MPCC under 7-level.
Fig. 17: Simulation result for case 2 with the proposed controller and MPCC in
a 7-level VSI: (a) current harmonic spectrum (b) phase to neutral voltage
harmonic spectrum. The fundamental component with 100% amplitude is set to
zero for ℎ = 1.
D. Comparative analysis of parameter sensitivity
Case 2 of Table III was used to evaluate the robustness of
MFPCC for slow and fast parameter changes. For small step
increases of R or L (Figs. 18-19), the proposed algorithm still
provides a good performance, with small current error, but the
THD slightly increases. On the other hand, MPCC current
response presents a deviation on both the d and q components
from the reference for both resistance and inductance changes.
For MPCC, the amplitude of the steady-state error increases
with the deviation of the load resistance and inductance, but the Fig. 20: Simulation result under case 2: (a) current in dq-axis, (b) THD, and (c)
proposed controller is almost not affected by such changes. load resistance with fast variations with proposed and MPCC under 7-level.
For fast changes of resistance (Fig. 20) or inductance (Fig.
21), MFPCC shows an accurate steady-state response, but
longer transient time to reach steady state. During this transient,
MFPCC tracks the reference with less accuracy, since the load
step change has a much faster dynamics than the refreshing
speed of the LUT. Therefore, after the change, the proposed
MFPCC requires a frame of time to update the LUT according
to the new operating parameters. However, after the transient,
the proposed controller is able to track the reference, even with
the parameter changes. MPCC, on the other hand, presents
steady-state errors. If the control period is quite short, this effect
is attenuated, but the proposed strategy should be limited for
industrial systems with slow dynamics parameter changes if the Fig. 21: Simulation result under case 2: (a) current in dq-axis, (b) THD, and (c)
working sampling frequency is small. load inductance with fast variations with proposed and MPCC under 7-level.

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Transactions on Industrial Electronics

VI. EXPERIMENTAL VALIDATION ka41 k a42

R L k a43
(a)
L1 R1 ia
The configuration and parameters of the setup are given in 3

Fig. 22, and in cases 3 and 4 of Table II. MFPCC and MPCC 6-pulse E 3L-CHB
Z z dc
were implemented in a PC hosting MATLAB 2015. The 3 k a3
1:3
rectifier inverter

algorithms were then uploaded in a real-time target PC with a 6-pulse 3L-CHB

S i
3 Z z E
sampling time of 200 μs for data control and monitoring. The 3 k a2
1:3
rectifier dc inverter PCI-6929

Y
computation times of the proposed and MPCC algorithms are 3L-CHB k ka , kb, kc
6-pulse
35.2 μs and 36.1 μs, respectively. For a quick validation, fast k
380V 3 k a1
Z

1:3
z E
rectifier dc inverter
50 Hz n
dynamics parameter changes were emulated using tap G
(b)
resistances and inductances connected in series with the
nominal RL-load.
The first comparison to validate the proposed controller was
done at nominal operation with the parameters given in case 3
and without preloading the LUT. An online switch from MPCC
to MFPCC was made at 0.2 s under half load current. As can be
seen in Fig. 23 MPCC requires a large transient time before it
provides a good response because the LUT was not initialized.
On the other hand, MPCC has almost instantaneous response
when switching from MFPCC, as shown in Fig. 24 for full-load
Fig. 22. Experimental setup: (a) schematic diagram and (b) hardware, interface,
current, which is a reflect of using the model of the system for and measurement
control. The CMV responses of both controllers are reduced frequencies are also equivalent and kept below 500 Hz. These
and equal to one-third of the DC-link, and the average switching results are a direct benefit of using the EAS scheme.

Fig. 23: experimental current responses and performance indexes at full-load current (6 A) under case 3: MPCC (0.15 s to 0.2 s) and MFPCC (0.2 s to 0.4 s).

Fig. 24: Experimental current responses and performance indexes at nominal current (6 A) under case 3: MPCC (0.15 s to 0.2 s) and MFPCC (0.2 s to 0.4 s).

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The same transient time shown in Fig. 23 is observed during the

startup (Fig.25) if MFPCC is considered without preloading the
LUT. This ST is a limitation in applications such as power
control and motor drives, where a fast-current response is
required from the inner controller. To reduce this ST, other
update schemes for ML-VSI can be investigated [22]-[23].
Another solution that is far simpler is to use data extracted from
simulation to preload the memory of the LUT. With an
initialized control database, the start-up current response is
quite similar to the one provided by MPCC with nominal
parameters, as shown in Fig. 25. At steady state (Fig. 26),
MFPCC has a good response while MPCC shows an alternative
component at full load, as highlighted, due to DC voltage Fig. 27: Experimental results for case 4 at 6 A load current for nominal
parameters (0.15 s to 0.25 s) and 5 Ω step-up (0.25 s to 0.35 s) with MPCC and
unbalance, which has not been considered in this work. Even
proposed MFPCC: (a) current response in dq-axis; (b) average current error.
by only considering the current control objective, this result
shows the proposed strategy has better robustness under small
DC-link voltage unbalance compared to MPCC. MFPCC
robustness can be extended to the behavior at the DC-side of
the inverter, since it does not use the model of the inverter.
However, the response in the case of unbalance is expected to
be worse than in operation under nominal DC-link voltage. In
such case, to improve the performance a capacitor voltage
balance scheme must be included in the proposed MFPCC.
The second set of experiments considered three types of
parameter step changes: (i) resistance step up of 5 Ω (Fig. 27);
(ii) inductance step up of 10 mH (Fig. 28), and combination of
both (i) and (ii) (Fig. 29). The proposed MFPCC has better
accuracy than the MPC at steady-state for all the three cases Fig. 28: Experimental results for case 4 at 6 A load current for nominal
parameters (0 s to 0.1 s) and 10 𝑚𝐻 step-up (0.1 s to 0.2 s) with MPCC and
since the achieved current error is almost the same obtained in
proposed MFPCC: (a) current response in dq-axis; (b) average current error.
the nominal case, while it increases when MPCC considers a
model which is different from the actual behavior of the system.
But, the proposed MFPCC shows a longer transient. However,
if just changes caused by the load heating are considered, the
results are quite similar to the ones presented in section V, with
the great advantage to always presenting a quasi-null steady-
state current error. Thus, under large sampling times, the
proposed MFPCC is suitable for systems with slow parameter
changes, such as the ones caused by temperature rise.

Fig. 29: Experimental results for case 4 at 6 A load current for nominal
parameters (0 s to 0.1 s) and 5 Ω & 10 mH step-up (0.1 s to 0.2 s) with MPCC
and proposed MFPCC: (a) current response in dq-axis; (b) average current error.
A comparative study of both controllers in terms of average
current error per period and THD is summarized in Table IV,
which shows that the proposed controller is a better option to
Fig. 25: Experimental results of startup response for case 4 at 7A load current mitigate the steady-state current error either during nominal
with MPCC, MFPCC without update (discontinue red line) and with update operation or when parameter changes are considered. On the
(continue red line): (a) current response in d-axis; (b) current response in d-axis. other hand, the current THD of the proposed controller is
slightly higher than the one of MPCC.
TABLE IV
COMPARATIVE STUDY OF ACCURACY AND THD BETWEEN MFPCC AND MPC
Performances Parameter changes w.r.t. the nominal value
0 +5 Ω -5 Ω +10 mH -7.5 mH
MPCC THD [%] 1.92 1.88 2 2.34 2.3
M[A] 0.175 0.35 0.9 0.325 0.45
Fig. 26: Experimental results of current in d-axis for system in case 4 with Proposed THD [%] 2.22 2.58 2.8 2.45 2.98
MPCC, MFPCC under reference step-up from 3.5 A to 7 A. MFPCC M[A] 0.14 0.14 0.12 0.125 0.11

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VII. CONCLUSION
An MFPCC for ML-VSIs has been proposed to avoid the
need for knowledge about the system characteristics for closed-
loop control. It is able to govern a ML-CHB by only using the
measured current from the plant. The proposed MFPCC is
based on EAS and CCV schemes. EAS scheme predicts a LUT
subset to be used at each sample and CCV is used to mitigate
the error due to the approximation of future CVs. Experimental
results for nominal operation show that the proposed MFPCC
has similar current performances as the classic MPCC.
However, when parameter changes are considered, the
proposed method outperforms MPCC in steady-state operation
even though it requires a larger transient time to reach the
steady state. To improve MFPCC response an effective update
method of the LUT can be studied in the case when the
sampling frequency cannot be increased. In addition, for
applications which cannot guarantee balanced of capacitor
voltages, it is important to study methods to consider the
capacitor voltage balance in the proposed control strategy.
Additional works can be focused on the variation of the DC
voltage of ML-VSI to investigate the robustness that MFPCC
provides compared to existing compensation schemes.
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2020.3028822, IEEE
Transactions on Industrial Electronics

Paul Gistain Ipoum-Ngome (S’17) was born in Mengqi Wang (S’11–M’15) received the B.S. degree
Douala, Cameroon, in 1989. He received the B.S., in electrical engineering from Xi’an Jiaotong
M.S. and DEA degrees in electrical engineering from University, Xi’an, China, in 2009, and the Ph.D. degree
the University of Douala, Douala, in 2013, 2015, and in electrical engineering from North Carolina State
2016, respectively. Since September 2017, he has been University, Raleigh, NC, USA, in 2014. Since 2015, she
working toward the Ph.D. degree in the Department of has been an Assistant Professor with the Department of
Electrical Engineering and Automation of Fuzhou Electrical and Computer Engineering, University of
University, Fuzhou, China. Michigan-Dearborn, Dearborn, MI, USA.

His current research interests include model predictive control, data-driven Her research interests include power and energy systems, high efficiency and
controller for grid-connected and motor drive applications, as well as renewable high-power density power supplies, renewable energy systems, and wide-
energy systems. bandgap power device applications.

Daniel Legrand Mon-Nzongo (M’18) was born in
Douala, Cameroon, in 1986. He received the B.S. and
M.S. degrees from Douala University, in 2010 and
2012, respectively, and the Ph.D. degree from Fuzhou
University, Fuzhou, China, in 2018, all in electrical
engineering. Since June 2018, he is a Postdoctoral
Research Associate with Fuzhou University and
Pearl-Electric Co., China.
His current research interests include bidirectional multilevel AC/AC and
isolated DC/DC converters for medium voltage applications.
Rodolfo César Costa Flesch received the B.E.,
M.Eng., and Dr.Eng. degrees in control and
automation engineering from the Federal University
of Santa Catarina (UFSC), Florianopolis, Brazil, in
2006, 2009 and 2012, respectively. He is currently a
Professor with the Department of Automation and
Systems Engineering, UFSC, and a Researcher with
the Brazilian National Council for Scientific and
Technological Development, Brasília, Brazil. In
addition, he is the coordinator of several R&D
cooperation projects between academy and industry.
His current research interests include process control (time-delay processes
and model predictive control), instrumentation, and automation of tests.
Tao Jin (SM’2019) received B.S. and M.S. degrees in
Electrical Engineering from Yanshan University
respectively in 1998 and 2001, and the Ph.D. degree in
Electrical Engineering from Shanghai Jiaotong
University in 2005. From 2005 to 2007, he worked as
a postdoctor in Shanghai Jiaotong University. During
this time, he was in charge of a research group in the
biggest dry-type transformer company in Asia, Sunten
Electrical Co.Ltd, to develop new transformer
technology with distribution grid.
From 2008 to 2009, he held research scientist position with Virginia Tech,
Blacksburg, USA, where he was involved in the design and test of PMU
technology and GPS/internet-based power system frequency monitoring
network. In 2010, he joined Imperial College London, UK, as European Union
Marie Curie Research Fellow, where he was focused on electrical technologies
related to smart grid. Now he is a professor in College of Electrical Engineering
& Automation, Fuzhou University, China. Prof.
Tao Jin has published about 150 papers, and he is members of IEEE Power
and Energy Society and IEEE Industrial Electronics Society, and special
committee members of Chinese Society of Electrical Engineering, China
Electrotechnical Society, and etc.
He currently serves as associate editors for MPCE, PCMP, China
Measurement & Testing Technology, and other journals.

Joseph Song-Manguelle (M’07–SM’10) received the

B.S. and M.S. degrees in pedagogical sciences and
electrical engineering from the University of Douala,
Douala, Cameroon, in 1995 and 1997, respectively, and
the Ph.D. degree in electrical engineering from the
Swiss Federal Institute of Technology, Lausanne,
Switzerland, in 2004.

From 2004 to 2012, he held engineering positions with General Electric in

Germany, France, and NY, USA, where he was involved in the development of
Torsional Vibration Control Systems with VFDs and HVDC transmission and
distribution systems for future long tieback subsea applications, he holds four
patents. Since 2012, he has been with an oil and gas corporation, where he has
held several engineering positions in Texas, Russia and Papua New Guinea. His
activities are ranging from technical qualification of subsea electrical
components to electrical design, modification and troubleshooting of oil and
gas production facilities. In parallel to his professional industry activities, since
2010, he has been co-supervising master’s and Ph.D. students at the University
of Douala, Fuzhou University, China, and the Université du Québec à Trois-
Rivières, QC, Canada, where is an Adjunct Professor. His University research
activities are focused on a theoretical understanding of VFDs’ harmonics
effects to large rotating shafts, as well as control of renewable energy systems.
The work presented in this paper in part of his academic research and is not
linked to his industrial activities.

Dr. Song-Manguelle is a member of the IEEE Petroleum and Chemical

Industry, the Industrial Drives and the Power Electronics Committees. He is an
Associate Editor for the IEEE TRANSACTIONS ON INDUSTRY
APPLICATIONS.

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