Heritage Institute of Technology

(An Autonomous Institute)

Department of
Electronics and Communication Engineering

---------------Industrial Training REPORT ---------------

VLSI DESIGN

Affiliated 
to
Maulana Abul Kalam Azad University of Technology 
(Formerly WBUT), 2022

Name : Srayee Banik

Roll No : 1952071
Roll No : 12619003160
Registration No : 029788
 Acknowledgement- Thanks to Internshala for providing the necessary
instructions during the online internship. Thanks to Dr. Sandeep Saini for giving the
support and guidance during the online training.

Signature of the Student:

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Contents

Sl.no Topic Page no.

1. HDL Coding Concepts 5-11

2. Combinational Circuits 12-15

3. Sequential Circuit Design 17-18
4. Finite State MachineS 19-20

5. System Design using FPGA 22

6. PROJECT 22-25
7. CONCLUSION 26

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INTRODUCTION: VLSI stands for Very large Space Integration. VLSI is a
process that creates an integrated circuit (IC) by collecting millions of transistors into one chip.
VLSI dates back to 1970 when even advanced microchips were not introduced. VLSI is a
successor to large-scale integration (LSI) and medium-scale integration (MSI). There are 2 most
popular VLSI devices, microprocessor and microcontroller.
There are many usages of VLSI as they are used almost everywhere. They are used in
microprocessors in computers, chips in a graphic cards, digital cameras, cell phones,
entertainment systems, workstations etc. VLSI came into use in 1970 after the MOS chips were
widely adopted. VLSI makes it affordable for IC designers to design in less space.

PROBLEM     DEFINATION

Verilog is a HARDWARE DESCRIPTION LANGUAGE (HDL). It is a language used for

describing a digital system like a network switch or a microprocessor or a memory or a
flip−flop. It means, by using a HDL we can describe any digital hardware at any level.

DETAILS OF THE TRAINING PROGRAME/ PROJECT /

INTERNSHIP

1. HDL Coding Concepts

 Verilog-Verilog standardized by  IEEE 1364, is a hardware description
language (HDL) used to model electronic systems. It is most commonly used in the
design and verification of digital circuits at the register-transfer level of abstraction. It is
also used in the verification of analog circuits and mixed-signal circuits, as well as in
the design of genetic circuits.

 Structural Coding and Simulations- Verilog code structure is as follows:

Basic Modules are laid out as follows:

module MyModule ([parameters]);

inputs ...

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 outputs ...
internal variables ...
...
Module Code ...
endmodule

In Verilog, all inputs and outputs are passed through the parameter list. A module requires this
list of input and output ports to interact with the environment.
Modules do not return a value in the same way that a C function or a Java function can return a
value. Therefore, we use the input and output keywords to specify which parameters are going
which direction:
module MyModule(a, b, c, clock);
input a, b, clock;
output c;
...
endmodule

When calling a Verilog module from a higher-level module, we need to include an

instance identifier. This is done because when we synthesize our code onto a physical
chip, functions that need to be called multiple times in parallel are actually created
multiple times! This means that if we want the same module to execute with itself in
parallel, we need to instruct the synthesizer program to create multiple physical copies
of the module. Furthermore, using instance identifiers allows oneself to "wire" multiple
modules together (i.e. if we wanted the output of one module to be the input of another
module). For the first definition exemplified, let's say we have a module AND that's
defined as such:

module AND(a, b, c);

input a, b;
output c;
assign c = a & b;
endmodule
If we want to use AND in another module, we need to call it as follows:

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 wire w, x, y, z;
...
AND A1(w, x, y);
AND A2(w, y, z);
AND A3(z, x, w);

Level of abstraction/Coding styles in Verilog are:

 Behavioral/Algorithmic

 Data flow

 Gate level

 Half adder using data flow:

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  Half adder using gate level modeling:

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  Conditional Assignments and Loops-
Verilog assignments are as follows:

 Procedural -

Procedural assignments occur within procedures such as initial, always, task,

and functions are used to place values onto variables. The variable will hold
the value until the next assignment to the same variable.

 Continuous -

This is used to assign values onto scalar and vector nets. And it happens
whenever there is a change in the RHS.

 Procedural Continuous –

These are procedural statements that allow expressions to be continuously

assigned to variables or nets. And these are the two types.

1. Assign deassign: It will override all procedural assignments to a variable

and deactivate it using the same signal with deassign.
2. Force release: These are similar to the assign deassignstatements but can
also be applied to nets and variables.

 Loops-Verilog loops Examples:

 Forever loop-

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 initial begin
clk = 1'b0;
forever begin
#500 clk = ~clk;
end
end

 Repeat Loop-

repeat (6) begin

@(posedge sig_a)
sig_b = ~sig_b;
end

 While Loop-

while (iter < 4) begin

$display("iter = %0d", iter);
iter = iter + 1;
end

 Assignment 1-Verilog design for the set of inputs and outputs:

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2. Combinational Circuits

 Combinational Circuit Design Flow-

 Multiplexer Design- Multiplexing is the generic term used to describe the operation
of sending one or more analogue or digital signals over a common transmission line at
different times or speeds and as such, the device we use to do just that is called the
multiplexer.

4X1 MUX using 2X1 MUX

 Encoders and Decoders- An encoder is a combinational circuit that converts

binary information in the form of a 2 N input lines into N output lines, which represent N
bit code for the input. For simple encoders, it is assumed that only one input line is
active at a time.

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 A decoder does the opposite job of an encoder. It is a combinational circuit that converts
n lines of input into 2n lines of output.

3 to 8 Decoder
 Comparators- A comparator is an electronic circuit, which compares the two inputs
that are applied to it and produces an output. The output value of the comparator
indicates which of the inputs is greater or lesser.

of ICs.

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  Assignment 2-

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 3. Sequential Circuit Design
 Latches and Flipflops- A flip flop is an electronic circuit with two stable states that
can be used to store binary data. The stored data can be changed by applying varying
inputs. Flip-flops and latches are fundamental building blocks of digital electronics
systems used in computers, communications, and many other types of systems. Both are
used as data storage elements. It is the basic storage element in sequential logic.

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 S-R Latch

 Registers- Registers are a type of computer memory used to quickly accept, store,
and transfer data and instructions that are being used immediately by the CPU. The
registers used by the CPU are often termed as Processor registers.A processor register
may hold an instruction, a storage address, or any data (such as bit sequence or
individual characters).

PIPO Registers

 Counters- A Counter is a device which stores (and sometimes displays) the number
of times a particular event or process has occurred, often in relationship to a clock
signal. Counters are used in digital electronics for counting purpose, they can count
specific event happening in the circuit. For example, in UP counter a counter increases
count for every rising edge of clock. Not only counting, a counter can follow the certain
sequence based on our design like any random sequence 0,1,3,2…. They can also  be
designed with the help of flip flops. They are used as frequency dividers where the
frequency of given pulse waveform is divided. Counters are sequential circuit that count
the number of pulses can be either in binary code or BCD form. The main properties of
a counter are timing, sequencing, and counting. Counter works in two modes =

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  Up counter 

 Down counter

 Assignment 3-

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4. Finite State Machines-

 Basics of FSM- A finite-state machine (FSM) or finite-state automaton (FSA,

plural: automata), finite automaton, or simply a state machine, is a mathematical model
of computation. It is an abstract machine that can be in exactly one of a finite number
of states at any given time. The FSM can change from one state to another in response
to some inputs; the change from one state to another is called a transition. An FSM is
defined by a list of its states, its initial state, and the inputs that trigger each transition.
Finite-state machines are of two types—deterministic finite-state machines and non-
deterministic finite-state machines.A deterministic finite-state machine can be constructed
equivalent to any non-deterministic one.

 Moore's machine- Moore machine is defined as a machine in the theory of

computation whose output values are determined only by its current state. 

 Mealy's Machine- Mealy Machine is defined as a machine in the theory of

computation whose output values are determined by both its current state and current
inputs. In this machine atmost one transition is possible. 

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  Assignment 4-

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5.System Design using FPGA- Using field programmable gate arrays
(FPGAs) can significantly increase the complexity of the design process. As seen in the
previous FAQ on the application considerations when selecting FPGAs, these devices can
bring improved performance to complex functions and improve overall system performance.
There are several steps in the design process when using any programmable logic, including
FPGAs. These steps include design entry, design synthesis, and design verification
(including functional verification and timing verification and takes places at different points
during the design flow), design implementation, and device programming. The design
process for FPGAs presents a variation on that basic process.

6. PROJECT-

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7.CONCLUSION-VLSI affords IC designers the ability to design utilizing less
space. Typically, electronic circuits incorporate a CPU, RAM, ROM, and other peripherals on
a single PCBA. However, very large-scale integration (VLSI) technology affords an IC
designer the ability to add all of these into one chip.

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