MICROPROCESSORS - MCQs

TOPIC ONE - MICROPROCESSORS
EASY QUESTIONS
An interrupt breaks the execution of instructions and diverts its execution to
A. Interrupt service routine
B. Counter word register
C. Execution unit
D. control unit
ANSWER A
While executing main program, if two or more interrupts occur, then the sequence of appearance of
interrupts is called
A. multi-interrupt
B. nested interrupt
C. interrupt within interrupt
D. nested interrupt and interrupt within interrupt
ANSWER B
Whenever a number of devices interrupt a CPU at a time, and if the processor is able to handle them
properly, it is said to have
A. interrupt handling ability
B. interrupt processing ability
C. multiple interrupt processing ability
D. multiple interrupt executing ability
ANSWER C
NMI stands for

A. nonmaskable interrupt
B. non multiple interrupt
C. non movable interrupts
D. none
ANSWER A
If any interrupt request given to an input pin cannot be disabled by any means then the input pin is
called
A. maskable interrupt
B. nonmaskable interrupt
C. maskable interrupt and nonmaskable interrupt
D. none
ANSWER B
The address bus of any microprocessor is always

A. Unidirectional
B. Bi-directional
C. Either unidirectional or bi-directional
D. None
ANSWER: A
The data bus of any microprocessor is always
A. Unidirectional
B. Bi-directional
C. Either unidirectional or bi-directional
D. None
ANSWER: B
243. An 8-bit microprocessor can have _______address lines.

A. 8
B. 16
C. 32
D. cannot be predicted
ANSWER D
The word size of 8085 microprocessor is

A.4-bit
B.8-bit
C.16-bit
D.20-bit
ANSWER B
The number of status flags present in 8085 microprocessor is

A. 8
B. 16
C. 5
D. 10
ANSWER C
Which one of the following statement is false?

A. A microprocessor has bi-directional address bus
B. A microprocessor has unidirectional address bus
C. A microprocessor has bi-directional data bus
D. A microprocessor has an ALU
ANSWER B
Identify the non-maskable interrupt from the following

A. RST 7.5
B. RST 6.5
C. RST 5.5
D. RST 4.5(TRAP)
ANSWER D
A microprocessor differentiates between op code, data/address at any time by

A. the sequence in which memory contents are fetched by it
B. its internal registers
C. the stack pointer
D. the program counter
ANSWER A
In microprocessor based system I/O ports are used to interface
A. the I/O devices and memory chips
B. the I/P device only
C. the O/P devices only
D .all the I/O devices
ANSWER D
The stack pointer

A. resides in RAM
B. resides in ROM
C. resides in microprocessor
D .may be in RAM or ROM
ANSWER C
Total no. of instruction for 8085 microprocessor assembly language is

A.244
B.245
C.246
D.247
ANSWER C
An 8-bit microprocessor signifies that

A. 8-bit address bus
B. 8-bit controller
C. 8-interrupt lines
D. 8-bit data bus
ANSWER D
Which one of the following microprocessor is not an 8-bit microprocessor

A.8085
B.Z-80
C. 68000
D.6502
ANSWER A
Which one of the following microprocessor is not an 8-bit microprocessor?

A. 8085
B. Z-80
C. 68000
D. 6502
ANSWER A
The INTR interrupt may be

A. maskable
B. nonmaskable
C. maskable and non maskable
D. none
ANSWER A
The Programmable interrupt controller is required to
A. handle one interrupt request
B. handle one or more interrupt requests at a time
C. handle one or more interrupt requests with a delay
D. handle no interrupt request
ANSWER B
The INTR interrupt may be masked using the flag

A. direction flag
B. overflow flag
C. interrupt flag
D. sign flag
ANSWER C
The interrupt for which the processor has highest priority among all the external interrupts is
A. keyboard interrupt
B. TRAP
C. NMI
D. INT
ANSWER C
The interrupt for which the processor has highest priority among all the internal interrupts is
A. keyboard interrupt
B. TRAP
C. NMI
D. INT
ANSWER B
In case of string instructions, the NMI interrupt will be served only after
A. initialisation of string
B. execution of some part of the string
C. complete string is manipulated
D. the occurrence of the interrupt
ANSWER A
The INTR signal can be masked by resetting the

A. TRAP flag
B. INTERRUPT flag
C. MASK flag
D. DIRECTION flag
ANSWER B
For the INTR signal, to be responded to in the next instruction cycle, it must go ____in the last clock
cycle of the current instruction
A. high
B. low
C. high or low
D. unchanged
ANSWER A
The status of the pending interrupts is checked at
A. the end of main program
B. the end of all the interrupts executed
C. the beginning of every interrupt
D. the end of each instruction cycle
ANSWER D
Once the processor responds to an INTR signal, the IF is automatically

A. set
B. reset
C. high
D. low
ANSWER B
Which interrupt has the highest priority?

A. INTR
B. TRAP
C. RST6.5
D. RST6.7
ANSWER C
In 8085 name the 16 bit registers?

A. Stack pointer
B. Program counter
C. a & b
D. flag
ANSWER C
Which of the following is hardware interrupts?

A. RST5.5, RST6.5, RST7.5
B. INTR, TRAP
C. a & b
ANSWER C
What is the RST for the TRAP?

A. RST5.5
B. RST4.5
C. RST4
ANSWER B
What are level Triggering interrupts?

A. INTR&TRAP
B. RST6.5&RST5.5
C. RST7.5&RST6.5
ANSWER B
Which interrupt is not level sensitive in 8085?
A. RST6.5 is a raising edge-trigging interrupt.
B. RST7.5 is a raising edge-trigging interrupt.
C. a & b.
ANSWER B
What are software interrupts?

A. RST 0 - 7
B. RST 5.5 - 7.5
C. INTR, TRAP
ANSWER A
Which stack is used in 8085?

A. FIFO
B. LIFO
C. FILO
ANSWER B
Why 8085 processor is called an 8 bit processor?

A. Because 8085 processor has 8 bit ALU.
B. Because 8085 processor has 8 bit data bus.
C. a & b.
ANSWER A
INTERMEDIATE QUESTIONS
The instruction, MOV AX, 0005H belongs to the address mode

A. register
B. direct
C. immediate
D. register relative
ANSWER C
The instruction, MOV AX, 1234H is an example of

A. register addressing mode
B. direct addressing mode
C. immediate addressing mode
D. based indexed addressing mode
ANSWER C
The instruction, MOV AX, [2500H] is an example of

A. immediate addressing mode
C. indirect addressing mode
D. register addressing mode
ANSWER B
If the data is present in a register and it is referred using the particular register, then it is
A. direct addressing mode
B. register addressing mode
C. indexed addressing mode
D. immediate addressing mode
ANSWER B
The instruction, MOV AX,[BX] is an example of

C. register relative addressing mode
D. register indirect addressing mode
ANSWER D
If the offset of the operand is stored in one of the index registers, then it is
A. based indexed addressing mode
B. relative based indexed addressing mode
D. none of the mentioned
ANSWER C
The addressing mode that is used in unconditional branch instructions is

A. intrasegment direct addressing mode
B. intrasegment indirect addressing mode
C. intrasegment direct and indirect addressing mode
D. intersegment direct addressing mode
ANSWER B
If the location to which the control is to be transferred lies in a different segment other than the current
one, then the mode is called
A. intrasegment mode
B. intersegment direct mode
C. intersegment indirect mode
D. intersegment direct and indirect mode
ANSWER D
The instruction, JMP 5000H:2000H; is an example of

A. intrasegment direct mode
B. intrasegment indirect mode
C. intersegment direct mode
D. intersegment indirect mode
ANSWER C
The contents of a base register are added to the contents of index register in
A. indexed addressing mode
B. based indexed addressing mode
C. relative based indexed addressing mode
D. based indexed and relative based indexed addressing mode
ANSWER D
ANSWER C

ANSWER B
ANSWER B

ANSWER D
Operation code field is present in:

A. programming language instruction
B. assembly language instruction
C. machine language instruction
ANSWER IS C
A machine language instruction format consists of

A. Operand field
B. Operation code field
C. Operation code field & operand field
ANSWER IS C
The length of the one-byte instruction is

A. 2 bytes
B. 1 byte
C. 3 bytes
D. 4 bytes
ANSWER IS B
The instruction format ‘register to register’ has a length of
A. 2 bytes
B. 1 byte
C. 3 bytes
D. 4 bytes
ANSWER IS A
The R/M field in a machine instruction format specifies

A. another register
B. another memory location
C. other operand
D. all of the mentioned
ANSWER IS D.
In a machine instruction format, S-bit is the

A. status bit
B. sign bit
C. sign extension bit
D. one of the mentioned
ANSWER IS C
The instructions that transfer the control to some predefined address or the address specified in the
instruction are called as
A. sequential control flow instructions
B. control transfer instructions
C. sequential control flow & control transfer instructions
ANSWER IS B
The instruction “JUMP” belongs to

A. equential control flow instructions
B. control transfer instructions
C. branch instructions
D. control transfer & branch instructions
ANSWER IS D
ADVANCED QUESTIONS
The instruction, “INC” increases the contents of the specified register or memory location by
A. 2
B. 0
C. 1
D. 3
ANSWER C
The instruction that subtracts 1 from the contents of the specified register/memory location is
A. INC
C. SUBB
C. SUB
D. DEC
ANSWER D
The instruction that enables subtraction with borrow is

A. DEC
B. SUB
C. SBB
ANSWER C
The flag that acts as Borrow flag in the instruction, SBB is

A. direction flag
B. carry flag
C. parity flag
D. trap flag
ANSWER B
In general, the source operand of an instruction can be

A. memory location
B. register
C. immediate data
D. all the above
ANSWER D
In general, the destination operand of an instruction can be

A. memory location
B. register
C. immediate data
D. memory location and register
ANSWER D
While CPU is executing a program, an interrupt exists then it

A. follows the next instruction in the program
B. jumps to instruction in other registers
C. breaks the normal sequence of execution of instructions
D. stops executing the program
ANSWER C
ANSWER C
ANSWER B
ANSWER D

ANSWER C
ANSWER D
TOPIC TWO – 8086 MICROPROCESSOR ASPECTS
EASY QUESTIONS
Which is the microprocessor comprises:
A. Register section
B. One or more ALU
C. Control unit
D. All of these
ANSWER D
What is the store by register?

A. data
B. operands
C. memory
D. None of these
ANSWER A
Accumulator based microprocessor example are:
A. Intel 8085
B. Motorola 6809
C. A and B
D. None of these
ANSWER C
There are primarily two types of register:

S. general purpose register
B. dedicated register
C. A and B
D. none of these
ANSWER C
Name of typical dedicated register is:

A. PC
B. IR
C. SP
D. All of these
ANSWER D
BCD stands for:

A. Binary coded decimal
B. Binary coded decoded
C. Both a & b
D. none of these
ANSWER A
Which is used to store critical pieces of data during subroutines and interrupts:
A. Stack
B. Queue
C. Accumulator
D. Data register
ANSWER C
The data in the stack is called:

A. Pushing data
B. Pushed
C. Pulling
D. None of these
ANSWER A
The lower red curvy arrow show that CPU places the address extracted from the memory location on
the_____:
A. Address bus
B. System bus
C. Control bus
D. Data bus
ANSWER A
The CPU sends out a ____ signal to indicate that valid data is available on the data bus:
A. Read
B. Write
C. Both A and B
D. None of these
ANSWER B
The CPU removes the ___ signal to complete the memory write operation:
A. Read
B. Write
C. Both A and B
D. None of these
ANSWER A
BIU STAND FOR:

A. Bus interface unit
B. Bess interface unit
C. A and B
D. None of these
ANSWER A
EU STANDS FOR:
A. Execution unit
B. Execute unit
C. Exchange unit
D. None of these
ANSWER A
Which are the four categories of registers?

A. General‐ purpose register
B. Pointer or index registers
C. Segment registers
D. All of these
ANSWER D
INTR: it implies the__________ signal:

A. INTRRUPT REQUEST
B. INTRRUPT RIGHT
C. INTRRUPT RONGH
D. INTRRUPT RESET
ANSWER IS A
Which of the following are the two main components of the CPU?
A. Control Unit and Registers
B. Registers and Main Memory
C. Control unit and ALU
D. ALU and bus
ANSWER IS C
Registers, which are partially visible to users and used to hold conditional, are known as
A. PC
B. Memory address registers
C. General purpose register
D. Flags
ANSWER IS C
One of the main feature that distinguish microprocessors from micro‐computers is

A. Words are usually larger in microprocessors
B. Words are shorter in microprocessors
C. Microprocessor does not contain I/O devices
D. Exactly the same as the machine cycle time
ANSWER IS C
An integrated circuit is
A. A complicated circuit
B. An integrating device
C. Much costlier than a single transistor
D. Fabricated on a tiny silicon chip
ANSWER IS D
Most important advantage of an IC is its

A. Easy replacement in case of circuit failure
B. Extremely high reliability
C. Reduced cost
D. Low powers consumption
ANSWER IS B
The Width of a processor’s data path is measured in bits. Which of the following are common data
paths?
A. 8 bits
B. 12 bits
C. 16 bits
D. 32 bits
ANSWER A
Which of the following is used for manufacturing chips?

A. Control bus
B. Control unit
C. Parity unit
D. Semiconductor
ANSWER D
To locate a data item for storage is

A. Field
B. Feed
C. Database
D. Fetch
ANSWER D
A directly accessible appointment calendar is feature of a … resident package

A. CPU
B. Memory
C. Buffer
D. ALU
ANSWER B
Which is the brain of computer:

A. ALU
b. CPU
C. MU
D. one of these
ANSWER IS B
In which form CPU provide output:

A. Computer signals
B. Digital signals
C. Metal signals
D. None of these
ANSWER B
The register section is related to______ of the computer:

A. Processing
B. ALU
C. Main memory
D. None of these
ANSWER IS C
In Microprocessor one of the operands holds a special register called:

A. calculator
B. Dedicated
C. Accumulator
D. None of these
ANSWER IS C
IR stands for:
A. Intel register
B. In counter register
C. Index register
D. Instruction register
ANSWER IS D
SP stands for:
A. Status pointer
B. Stack pointer
C. C and b
D. None of these
ANSWER IS B
The act of acquiring an instruction is referred as the____ instruction:

A. Fetching
B. Fetch cycle
C. Both a and b
D. None of these
ANSWER A
LA stands for:
A. Load accumulator
B. Last accumulator
C. Last accumulator
D. None of these
ANSWER A
_________ Stores the instruction currently being executed:

A. Instruction register
B. Current register
C. Both a and b
D. one of these
ANSWER IS A
In which register instruction is decoded prepared and ultimately executed:

A. Instruction register
B. current register
C. Both a and b
D. None of these
ANSWER A
Which is the basic stack operation:

A. PUSH
B. POP
C. BOTH A and B
D. None of these
ANSWER C
Which bus carry addresses:

A. System bus
B. Address bus
C. control bus
D. Data bus
ANSWER IS B
Which bus transfer singles from the CPU to external device and others that carry singles from external
device to the CPU:
A. Control bus
B. Data bus
C. address bus
D. None of these
ANSWER IS A
When memory read or I/O read are active data is to the processor:
A. Input
B. Output
C. Processor
D. None of these
ANSWER IS A
When memory write or I/O read are active data is from the processor:
A. Input
B. Output
C. Processor
D. None of these
ANSWER IS B
The ____ place the data from a register onto the data bus:
A. CPU
B. ALU
C. Both A and B
D. None of these
ANSWER IS A
The external device is connected to a pin called the ______ pin on the processor chip.
A. Interrupt
B. Transfer
C. Both
D. None of these
ANSWER IS A
Which interrupt has the highest priority?

A. INTR
B. TRAP
C. RST6.5
D. none of these
ANSWER IS B
In 8085 name the 16 bit registers?

A. Stack pointer
B. program counter
C. a & b
D. none of these
ANSWER IS C
What are level Triggering interrupts?

A. INTR&TRAP
B. RST6.5&RST5.5
C. RST7.5&RST6.5
D. None of these
ANSWER IS B
In 8086, Example for Non mask able interrupts are

A. Trap
B. RST6.5
C. INTR
D. None of these
ANSWER IS A
The size of each segment in 8086 is:

A. 64 kb
B. 24 kb
C. 50 kb
D. 16kb
ANSWER IS A
The pin configuration of 8086 is available in the________:

A. 40 pin
B. 50 pin
C. 30 pin
D. pin
ANSWER IS A
The offset of a particular segment varies from _________:

A. 000H to FFFH
B. 0000H to FFFFH
C. 00H to FFH
D. 00000H to FFFFFH
ANSWER IS B
________ is usually the first level of memory access by the microprocessor:

A. Cache memory
B. Data memory
C. Main memory
D. All of these
ANSWER IS A
A microprocessor is a _______ chip integrating all the functions of a CPU of a computer.

A. multiple
B. single
C. double
D. triple
ANSWER IS B
Microprocessor is a/an _______ circuit that functions as the CPU of the computer
A. electronic
B. mechanic
C. integrating
D. processing
ANSWER IS A
The intel 8086 microprocessor is a _______ processor

A. 8 bit
B. 16 bit
C. 32 bit
D. 4 bit
ANSWER IS B
The 16 bit flag of 8086 microprocessor is responsible to indicate ___________

A. the condition of result of ALU operation
B. the condition of memory
C. the result of addition
D. the result of subtraction
ANSWER IS A
An _________ is used to fetch one address

A. internal decoder
B. external decoder
C. encoder
D. register
ANSWER: A
In a minimum mode there is a ___________ on the system bus

A. single
B. double
C. multiple
D. triple
ANSWER A
If MN/MX is low the 8086 operates in __________ mode

A. Minimum
B. Maximum
C. both (A) and (B)
D. medium
ANSWER B
The ___ bus controller device decodes the signals to produce the control bus signal
A. internal
B. data
C. external
D. address
ANSWER C
A _____ Instruction at the end of interrupt service program takes the execution back to the interrupted
program
A. forward
B. return
C. data
D. line
ANSWER B
Primary function of memory interfacing is that they _________ should be able to read from and write
into register
A. multiprocessor
B. microprocessor
C. dual Processor
D. coprocessor
ANSWER B
To perform any operations, the MP should identify the __________

A. register
B. memory
C. interface
D. system
ANSWER A
The Microprocessor places __________ address on the address bus

A. 4 bit
B. 8 bit
C. 16 bit
D. 32 bit
ANSWER C
The instruction that is used to transfer the data from source operand to destination operand is
A. data copy/transfer instruction
B. branch instruction
C. arithmetic/logical instruction
D. string instruction
ANSWER A
Which of the following is not a data copy/transfer instruction?

A. MOV
B. PUSH
C. DAS
D. POP
ANSWER C
INTERMEDIATE QUESTIONS
The external system bus architecture is created using from ______ architecture:
A. Pascal
B. Dennis Ritchie
C. Charles Babbage
D. Von Neumann
ANSWER IS D
The processor 8086/80486 and the Pentium processor uses _____ bits address bus:
A. 16
B. 32
C. 36
D. 64
ANSWER IS B
Which is not the control bus signal:

A. READ
B. WRITE
C. RESET
D. None of these
ANSWER IS C
PROM stands for:

A. Programmable read‐only memory
B. Programmable read write memory
C. Programmer read and write memory
D. None of these
ANSWER A
EPROM stands for:

A. Erasable Programmable read‐only memory
B. Electrically Programmable read write memory
C. Electrically Programmable read‐only memory
D. None of these
ANSWER A
Each memory location has:

A. Address
B. Contents
C. Both A and B
D. None of these
ANSWER: C
Which is the type of microcomputer memory:

A. Processor memory
B. Primary memory
C. Secondary memory
D. All of these
ANSWER: D
Secondary memory can store____:

A. Program store code
B. Compiler
C. Operating system
D. All of these
ANSWER IS D
The pin configuration of 8086 is available in the________:

A. 40 pin
B. 50 pin
C. 30 pin
D. 20 pin
ANSWER: A
DIP stand for:
A. Deal inline package
B. Dual inline package
C. Direct inline package
D. Digital inline package
ANSWER: B
EA stands for:
A. Effective address
B. Electrical address
C. Effect address
D. None of these
ANSWER IS A
BP stands for:
A. Bit pointer
B. Base pointer
C. Bus pointer
D. Byte pointer
ANSWER B
DI stand for:
A. Destination index
B. Defect index
C. Definition index
D. Delete index
ANSWER IS A
SI stand for:
A. Stand index
B. Source index
C. Segment index
D. Simple index
ANSWER IS B
ALE stands for:

A. Address latch enable
B. Address light enables
C. Address lower enable
D. Address last enable
ANSWER IS A
The _______ pin is used to select direct command word

A. A0
B. D7-D6
C. A12
D. AD7-AD6
ANSWER IS A
In 8086, Example for Non maskable interrupts are ________.
A. TRAP
B. RST6.5
C. INTR
D. RST6.6
ANSWER IS A
In 8086 the overflow flag is set when _____________.

A. the sum is more than 16 bits.
B. signed numbers go out of their range after an arithmetic operation.
C. carry and sign flags are set
D. subtraction
ANSWER IS B
In 8086 microprocessor the following has the highest priority among all type interrupts?
A. NMI
B. DIV 0
C. TYPE 255
D. OVER FLOW
ANSWER IS A
In 8086 microprocessor one of the following statements is not true?

A. coprocessor is interfaced in max mode
B. coprocessor is interfaced in min mode.
C. I /O can be interfaced in max / min mode.
D. supports pipelining
ANSWER IS B
Status register is also called as ___________.

A. accumulator
B. stack
C. counter
D. flags
ANSWER IS D
Which of the following is not a basic element within the microprocessor?

A. Microcontroller
B. Arithmetic logic unit (ALU)
C. Register array
D. Control unit
ANSWER IS A
Which bus is bidirectional?

A. Address bus
B. Control bus
C. Data bus
D. None of the above
ANSWER IS C
Which is not an operand?
A. Variable
B. Register
C. Memory location
D. Assembler
ANSWER IS D
Which is not part of the execution unit (EU)?

A. Arithmetic logic unit (ALU)
B. Clock
C. General registers
D. Flags
ANSWER IS B
Which of the following is not an arithmetic instruction?

A. INC (increment)
B. CMP (compare)
C. DEC (decrement)
D. ROL (rotate left)
ANSWER IS D
During a read operation the CPU fetches ________.

A. a program instruction
B. another address
C. data itself
D. all of the above
ANSWER IS D
Which group of instructions does not affect the flags?

A. Arithmetic operations
B. Logic operations
C. Data transfer operations
D. Branch operations
ANSWER IS C
The result of MOV AL, 65 is to store

A. store 0100 0010 in AL
B. store 42H in AL
C. store 40H in AL
D. store 0100 0001 in AL
ANSWER D
8086 HAVE——————– of segment registers

A. 2
B. 4
C. 6
D. 8
ANSWER IS B
8086 can be operated in Two modes they are ———————–and————–
A. Minimum, Maximum
B. External, internal
C. Mode1, Mode2
D. Data, address
ANSWER IS A
Which of the following is the function of microprocessor?

A. Receiving input
B. Performing computations.
C. Storing data & instructions
D. All of the these
ANSWER IS D
8086 processor has ————- address pins out of which —————- number of pins are used as data
pins
A. 16,8
B. 16,14
C. 20,16
D. 20,8
ANSWER C
Data storage in stack is designed in _______________method.

A. First in first out
B. last in last out
C. first in last out
D. last in first out
ANSWER D
—————–flag is used in 8086 for string manipulation instructions

A. DF
B. AF
C. OF
D. PF
ANSWER A
BHE of 8086 microprocessor signal is used to interface the

A. Even bank memory
B. Odd bank memory
C. I/O
D. DMA
ANSWER B
In 8086 microprocessor one of the following statements is not true.

A. Coprocessor is interfaced in MAX mode
B. Coprocessor is interfaced in MIN mode
C. I/O can be interfaced in MAX / MIN mode
D. Supports pipelining
ANSWER D
Why 8085 processor is called an 8 bit processor?
A. Because 8085 processor has 8 bit ALU.
B. Because 8085 processor has 8 bit data bus.
C. ALL OF THESE
ANSWER C
In 8086 the overflow flag is set when

A. The sum is more than 16 bits
B. Signed numbers go out of their range after an arithmetic operation
C. Carry and sign flags are set
D. During subtraction
ANSWER B
Which of the following interrupt has highest Priority?

A. INTR
B. TRAP
C. RST 7.5
D. RST 6.5
ANSWER B
Number of machine cycles required for RET instruction in 8085 microprocessor is

A. 1
B. 2
C. 3
D. 5
ANSWER C
The RD, WR, M/IO is the heart of control for a __________ mode
A. minimum
B. maximum
C. compatibility mode
D. control mode
ANSWER A
NMI stands for:

A. Non mask able interrupt
B. Non mistake interrupt
C. Both
D. None of these
ANSWER: A
________ is the most important segment and it contains the actual assembly language instruction to be
executed by the microprocessor:
A. Data segment
B. Code segment
C. Stack segment
D. Extra segment
ANSWER: B
The offset of a particular segment varies from _________:
A. 000H to FFFH
B. 0000H to FFFFH
C. 00H to FFH
D. 00000H to FFFFFH
ANSWER: B
Which are the factor of cache memory:

A. Architecture of the microprocessor
B. Properties of the programs being executed
C. Size organization of the cache
D. All of these
ANSWER: D
_______ is usually the first level of memory access by the microprocessor:

A. Cache memory
B. Data memory
C. Main memory
D. All of these
ANSWER: A
Which is the small amount of high‐ speed memory used to work directly with the microprocessor:
A. Cache
B. Case
C. Cost
D. Coos
ANSWER: A
The cache usually gets its data from the_________ whenever the instruction or data is required by the
CPU:
A. Main memory
B. Case memory
C. Cache memory
D. All of these
ANSWER: A
Which causes the microprocessor to immediately terminate its present activity:

A. RESET signal
B. INTERUPT signal
C. Both
D. None of these
ANSWER: A
SP stand for:
A. Stack pointer
B. Stack pop
C. stack push
D. None of these
ANSWER: A
How many bit stored by status register:
A. 1 bit
B. 4 bit
C. bit
D. 8 bit
ANSWER: A
_____ a subsystem that transfer data between computer components inside a computer or between
computer:
A. Chip
B. Register
C. Pocessor
D. Bus
ANSWER: D
141.) Which are the part of architecture of 8086:

a. The bus interface unit
b. The execution unit
c. Both A and B
d. None of these
ANSWER: C
Which are the four categories of registers:

D. all of the above
ANSWER: D
The acculatator is 16 bit wide and is called:

A. AX
B. AH
C. AL
D. DL
ANSWER: A
How many bits the instruction pointer is wide:

A. 16 bit
B. 32 bit
C. 64 bit
D. 8 bit
ANSWER: A
How many type of addressing in memory:

A. Logical address
B. Physical address
C. Both A and B
D. None of these
ANSWER: C
The instruction, MOV AX, 0005H belongs to the address mode
A. register
B. direct
C. immediate
D. register relative
ANSWER: C

ANSWER C

ANSWER B
ANSWER B

ANSWER D
ANSWER C

ANSWER B
ANSWER: D

ANSWER: C
ANSWER: D
ADVANCED QUESTIONS
What is SIM?
A. Select Interrupt Mask
B. Sorting Interrupt Mask
C. Set Interrupt Mask
ANSWER C
RIM is used to check whether, ______

A. The write operation is done or not
B. The interrupt is Masked or not
C. a & b
ANSWER A
What is meant by Maskable interrupts?

A. An interrupt which can never be turned off.
B. An interrupt that can be turned off by the programmer.
C. none
ANSWER A
In 8086, Example for Non maskable interrupts is:

A. Trap
B. RST6.5
C. INTR
ANSWER A
What does microprocessor speed depends on?

A. Clock
B. Data bus width
C. Address bus width
ANSWER A
Can ROM be used as stack?

A. Yes
B. No
C. Sometimes yes, sometimes no
ANSWER B
Which processor structure is pipelined?

A. all x80 processors
B. all x85 processors
C. all x86 processors
ANSWER C
Address line for RST3 is?

A. 0020H
B. 0028H
C. 0018H
ANSWER B
In 8086 the overflow flag is set when

A. The sum is more than 16 bits
B. Signed numbers go out of their range after an arithmetic operation
C. Carry and sign flags are set
ANSWER B
BHE of 8086 microprocessor signal is used to interface the

A. Even bank memory
B. Odd bank memory
C. I/O
D. DMA
ANSWER C
In 8086 microprocessor the following has the highest priority among all type interrupts.
A. NMI
B. DIV 0
C. TYPE 255
D. OVER FLOW
ANSWER A
In 8086 microprocessor one of the following statements is not true.

A. Coprocessor is interfaced in MAX mode
B. Coprocessor is interfaced in MIN mode
C. I/O can be interfaced in MAX / MIN mode
D. Supports pipelining
ANSWER B
Secondary memory is also called____:
A. Auxiliary
B. Backup store
C. Both A and B
D. None of these
ANSWER C
Customized ROMS are called:

A. Mask ROM
B. Flash ROM
C. EPROM
D. None of these
ANSWER A
The RAM which is created using bipolar transistors is called:

A. Dynamic RAM
B. Static RAM
C. Permanent RAM
D. DDR RAM
ANSWER B
Which type of RAM needs regular referred?

A. Dynamic RAM
B. Static RAM
C. Permanent RAM
D. SD RAM
ANSWER A
RAM is created using MOS transistors:

A. Dynamic RAM
B. Static RAM
C. Permanent RAM
D. SD RAM
ANSWER: A
A microprocessor retries instructions from:

a. Control memory
B. Cache memory
C. Main memory
D. Virtual memory
ANSWER: C
e103.eight of the register is known as:

D. Other register
ANSWER: A
The four index register can be used for:
A. Arithmetic operation
B. Multipulation operation
C. Subtraction operation
D. All of these
ANSWER: A
IP Stand for:
A. Instruction pointer
B. Instruction purpose
C. Instruction paints
D. None of these
ANSWER: A
CS Stand for:
A. Code segment
B. Coot segment
C. Cost segment
D. Counter segment
ANSWER: A
DS Stand for:
A. Data segment
B. Direct segment
C. Declare segment
D. Divide segment
ANSWER: A
Which are the segment:

A. CS: Code segment
B. SS: Stack segment
C. ES:extra segment
D. All of these
ANSWER: D
The accelerator is 16 bit wide and is called:

A. AX
B. AH
C. AL
D. DL
ANSWER: A
How many bits the instruction pointer is wide:

A. 16 bit
B. 32 bit
C. 64 bit
D. 128 bit
ANSWER: A
How many type of addressing in memory:
A. Logical address
B. Physical address
C. Both A and B
D. None of these
ANSWER: C
The size of each segment in 8086 is:

A. 64 kb
B. 24 kb
C. 50 kb
D. 16kb
ANSWER: A
The _______ address of a memory is a 20 bit address for the 8086 microprocessor:
A. Physical
B. Logical
C. Both
D. None of these
ANSWER: A

MICROPROCESSORS - MCQs

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MICROPROCESSORS - MCQs

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TOPIC ONE - MICROPROCESSORS

NMI stands for

The address bus of any microprocessor is always

243. An 8-bit microprocessor can have _______address lines.

The word size of 8085 microprocessor is

The number of status flags present in 8085 microprocessor is

Which one of the following statement is false?

Identify the non-maskable interrupt from the following

A microprocessor differentiates between op code, data/address at any time by

The stack pointer

Total no. of instruction for 8085 microprocessor assembly language is

An 8-bit microprocessor signifies that

Which one of the following microprocessor is not an 8-bit microprocessor

Which one of the following microprocessor is not an 8-bit microprocessor?

The INTR interrupt may be

The INTR interrupt may be masked using the flag

The INTR signal can be masked by resetting the

Once the processor responds to an INTR signal, the IF is automatically

Which interrupt has the highest priority?

In 8085 name the 16 bit registers?

Which of the following is hardware interrupts?

What is the RST for the TRAP?

What are level Triggering interrupts?

What are software interrupts?

Which stack is used in 8085?

Why 8085 processor is called an 8 bit processor?

The instruction, MOV AX, 0005H belongs to the address mode

The instruction, MOV AX, 1234H is an example of

The instruction, MOV AX, [2500H] is an example of

The instruction, MOV AX,[BX] is an example of

The addressing mode that is used in unconditional branch instructions is

The instruction, JMP 5000H:2000H; is an example of

The instruction, MOV AX, [2500H] is an example of

The instruction, MOV AX,[BX] is an example of

Operation code field is present in:

A machine language instruction format consists of

The length of the one-byte instruction is

The R/M field in a machine instruction format specifies

In a machine instruction format, S-bit is the

The instruction “JUMP” belongs to

The instruction that enables subtraction with borrow is

The flag that acts as Borrow flag in the instruction, SBB is

In general, the source operand of an instruction can be

In general, the destination operand of an instruction can be

While CPU is executing a program, an interrupt exists then it

The instruction, JMP 5000H:2000H; is an example of

TOPIC TWO – 8086 MICROPROCESSOR ASPECTS

What is the store by register?

There are primarily two types of register:

Name of typical dedicated register is:

BCD stands for:

The data in the stack is called:

BIU STAND FOR:

Which are the four categories of registers?

INTR: it implies the__________ signal:

One of the main feature that distinguish microprocessors from micro‐computers is

Most important advantage of an IC is its

Which of the following is used for manufacturing chips?

To locate a data item for storage is

A directly accessible appointment calendar is feature of a … resident package

Which is the brain of computer:

In which form CPU provide output: