5 4 3 2 1

TITLE SHEET
COVER SHEET 1
BLOCK DIAGRAM 2
RESET&CLK MAP 3
D D

N68SA-M2S
SPEC&CHANGE LIST 4
PROCESSOR M2 940 5,6,7,8,9
DDR ADD/CTL/VTT TERMINATI 10
DDR2 1 11
DDR2 2 12

NV CHIPSET(MCP68S)

PCI 1&2
13,14,15
16,17,18,19
20
N68S+
C
FRONT PANEL HEADER
PCI EXPRESS X16
21
22
VER:6.2 C

IDE CONN 23
POWER CONN & FAN CONTROL 24
FLOOPY / KB / MOUSE / CMOS 25
VGA CONN 26
USB DEVICE 27
SERIAL & PARALLEL 28
AUDIO CODEC ( ALC662) 29
AUDIO CONN 30
VCORE POWER SUPPLY 31
MEM_VREG/MEM_VTT 32
B B

LPC SUPER IO ITE8716F 33

FLASH ROM & H/W MON 34
POWER SEQUENCING 35
LAN 10/100(RLT8201CL) 36
OVER VOLTAGE 37
MCP61 CORE 38
PAGE1
39
CHANGELIST 40

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N68SA-M2S
Date: Friday, June 04, 2010 Sheet 1 of 39
5 4 3 2 1
 5 4 3 2 1

POWER
VREG AMD M2 SOCKET 940 MEMORY DDR2
D SUPPLY M2 DDR DIMM(2)
D

CONN
128-BIT 400/533/667/800 MHZ
HT 16X16 1GHZ

VGA
PEX X16 (1) CONN

NFORCE
DVI REL8201CL LAN

MCP61P PCI 33MHZ

ATA 133
PCI SLOT (2)
PRIMARY IDE
C
692BGA C

4MB FLASH SPI Port AC97/HDA

ALC662 AUDIO CODEC

SATA CONN(X4)
INTEGRATED SATA 1/2
USB2.0 (X8/X10)
LPC BUS 33MHZ
FLOPPY CONN SIO USB2 PORTS 1-0 BACK PANEL CONN
IT8712/8716 DOUBLE STACK
PS2/KBRD CONN USB2 PORTS 3-2
LAN RJ45
PARALLEL CONN
USB2 PORTS 5-4 FRONT PANEL HDR
B SERIAL CONN B
USB2 PORTS 7-6

H/W MON USB2 PORTS 9-8

RGMII
MII/RGMII

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N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 2 of 39
5 4 3 2 1
 5 4 3 2 1

M2 940 CPU M2 SKT 939

HT_MCP_PWRGD
HT_CPU_TXCLK0 MEMORY_A1_CLK[2:0] CHANNEL A1 0-63 CPU RST*

HT_CPU_TXCLK0* MEMORY_A1_CLK[2:0]*
DIMM 0
RESET MAP CPU PWRGD
HT_MCP_RST*

HT_CPU_RXCLK0
HT_CPU_RXCLK0* MEMORY_B1_CLK[2:0]
D D
DIMM 1
HT_CPU_TXCLK1 MEMORY_B1_CLK[2:0]* PE_RESET*
CHANNEL B1 64-127

HT_CPU_TXCLK1* MEMORY_A2_CLK[2:0] PEX X16

HT_CPU_RXCLK1
HT_CPU_RXCLK1* MEMORY_A2_CLK[2:0]*

CPUCLK_IN* MEMORY_B2_CLK[2:0]
MCP68S
CPUCLK_IN MEMORY_B2_CLK[2:0]*

8712/8716
PWR SWTCH HT_MCP_RST*
CLKOUT_200MHZ PE0_REFCLK PWRBT PWRBTN* HT MCP RST*
CLKOUT_200MHZ* PEX X16 ON* PWR BUTTON
PE0_REFCLK* PWR HT MCP PWRGD HT_MCP_PWRGD
BUTTON* SLP_S3*
HT_CPU_RXCLK1* SLP_S3* SLP S3*
PS ON PCI RST0* PCIRST_SLOT1*
HT_CPU_RXCLK1 PE1_REFCLK
PWR CONN PCI RST1* PCIRST_SLOT2*
HT_CPU_TXCLK1* PE1_REFCLK* POWER_GOOD PWRGD
HT_CPU_TXCLK1 PCI RST2* PCIRST_SLOT3-4*
C PS ON C
HT_CPU_RXCLK0* PCI RST3* PCIRST_IDE*
PE2_REFCLK PWR GOOD PWRGD_SB PWRGD_SB
PWRGD SB LPC_RST* LPCRST_FLASH*
HT_CPU_RXCLK0 PE2_REFCLK*
CIRCUIT GPIO_AUX* AC_RESET* LPCRST_SIO* PRI IDE PCI SLOT2 PCI SLOT1
HT_CPU_TXCLK0*
HT_CPU_TXCLK0
XTAL_IN CLOCK
SIO FLASH

MCP68S XTAL_OUT
27 MHZ (TV OUT ONLY)
DISTRIBUTION LAN_PHY
RESET*
AUDIO_PHY
RESET*

PCI SLOT2
14MHZ OR 24MHZ
BUF_SIO

SUSCLK 32KHZ SIO PCI SLOT1

LPC_CLK0 33MHZ

PCI_CLK0 33MHZ
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
RTC_XTAL PCI_CLK_FB

32.0 KHZ
B B
33MHZ FLASH
LPC_CLK1
XTAL_IN AC97/AZALIA LINK
AC_97CLK AC97 CODEC
S-IO
25 MHZ AC_BITCLK

XTAL_OUT BUF_25MHZ LAN PHY

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N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 3 of 39
5 4 3 2 1
 5 4 3 2 1

CPU VID TABLE PCI INTERRUPT/IDSEL MAP

VID [4..0] VDD VID [4..0] VDD BACK PANEL PCI BUS# DEVICE# IDSEL PIN PCI SLOT PCI SLOT PCI SLOT PCI SLOT REQ/GNT

0X00000 1.550V 0X10000 1.150V SLOT INTA* INTB* INTC* INTD*

0X00001 1.525V 0X10001 1.125V 1 01 0X05 22 P_INTY* P_INTZ* P_INTW* P_INTX* 1/1
D D
0X00010 1.500V 0X10010 1.100V 2 01 0X06 24 P_INTW* P_INTX* P_INTY* P_INTZ* 2/2

0X00011 1.475V 0X10011 1.075V 3 01 0X07

0X00100 1.450V 0X10100 1.050V 4 01 0X08

0X00101 1.425V 0X10101 1.025V 5 01 0X09

0X00110 1.400V 0X10110 1.000V 6 01 0X0A

0X00111 1.375V 0X10111 0.975V

0X01000 1.350V 0X11000 0.950V PCI DEVICE MAP

0X01001 1.325V 0X11001 0.925V DEVICE PCI BUS# FUNCTION IDSEL PIN DEVICE ID

0X01010 1.300V 0X11010 0.900V MCP51

MCP68S LOGICAL 0X01-0X0F -- --
0X01011 1.275V 0X11011 0.875V PCI BUS 0

0X01100 1.250V 0X11100 0.850V MAC /MAC 0 XA 0 0X56/57

0X01101 1.225V 0X11101 0.825V PCI-PCI BRIDGE 0 X9 0 0X005C

0X01110 1.200V 0X11110 0.800V SATA1 0 X8 0 0X0055

0X01111 1.175V 0X11111 OFF SATA0 0 X8 0 0X0054

IDE 0 X6 0 0X0053
C
SMBUS ADDRESS MAP C

MODEM CODEC 0 X4 1 0X0058

DEVICE SMBUS # ADDRESS
AUDIO CODEC 0 X4 0 0X0059
SLOT
USB 2.0 0 X2 1 0X005B
DIMM 0 0 1010 000 = 0X50
USB 1.1 0 X2 0 0X005A
DIMM 1 0 1010 001 = 0X51
SHAPE TRIM 0 X1 2 0X005F
DIMM 2 0 1010 010 = 0X52
LDT 0 X0 0 0X005E
DIMM 3 0 1010 011 = 0X53
SMBUS2 0 X1 1 0X0052
SIO 1 0101 101 = 0X2D
LEGACY SLAVE 0 ? ? 0X00D3
PCI SLOT 1 1 ARP
LPC 0 X1 0 0X0050/51
PCI SLOT 2 1 ARP
LOGICAL PCI BUS 1 ? ? ?
PCI SLOT 3 1 ARP
PCI SLOT 1
PCI SLOT 4 1 ARP
PCI SLOT 2
DDC BUS A ?
PCI SLOT 3
DDC BUS B ?
PCI SLOT 4
B B
PCI SLOT 5
22U/25DE 5*7 mm

100U/16DE 6.3*11 mm

220U/10DE 6.3*11 mm D
O
470U/16DE 8*11 mm D A D C KA
1000U/10DE 8*14 mm

1500U/16DE 10*25 mm
I GO E BC ECB
3300U/25DE 10*25 mm G S A O I C R G S B E A K
G S
TO-263 TO-252 SOT-223 SOT-23 SOT-23 SOT-23 SOT-23 TO-92 TO-92 TO-92
PHB55N03 20N03 AMS1117 LM431 2N7002 2N3904 BAT54C LM431 2N2222A HSD882-D
90N02 TM3055TL-S SI2303S 2N3906 BAT54S 78L05-D 2N2097A
PHD55N03 SI2301S MMBT2907A LM432
2N2222A

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N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 4 of 39
5 4 3 2 1
 5 4 3 2 1

R47 49.9 1% 0402 +1.2V_HT

CPU1A CPU1B

HYPERTRANSPORT
MEM_MA_DATA[0..63]
MEMORY INTERFACE A MEM_MA_DATA[0..63] 11
HTCPU_UPCLK1 N6 AD5 HTCPU_DWNCLK1 AG21 AE14 MEM_MA_DATA63
13 HTCPU_UPCLK1 L0_CLKIN_H(1) L0_CLKOUT_H(1) HTCPU_DWNCLK1 13 10,11 MEM_MA0_CLK_H2 MA0_CLK_H(2) MA_DATA(63)
HTCPU_UPCLK1_ P6 AD4 HTCPU_DWNCLK1_ AG20 AG14 MEM_MA_DATA62
13 HTCPU_UPCLK1_ L0_CLKIN_L(1) L0_CLKOUT_L(1) HTCPU_DWNCLK1_ 13 10,11 MEM_MA0_CLK_L2 MA0_CLK_L(2) MA_DATA(62)
HTCPU_UPCLK0 N3 AD1 HTCPU_DWNCLK0 G19 AG16 MEM_MA_DATA61
13 HTCPU_UPCLK0 L0_CLKIN_H(0) L0_CLKOUT_H(0) HTCPU_DWNCLK0 13 10,11 MEM_MA0_CLK_H1 MA0_CLK_H(1) MA_DATA(61)
HTCPU_UPCLK0_ N2 AC1 HTCPU_DWNCLK0_ H19 AD17 MEM_MA_DATA60
D 13 HTCPU_UPCLK0_ L0_CLKIN_L(0) L0_CLKOUT_L(0) HTCPU_DWNCLK0_ 13 10,11 MEM_MA0_CLK_L1 MA0_CLK_L(1) MA_DATA(60) MEM_MA_DATA59 D
10,11 MEM_MA0_CLK_H0 U27 MA0_CLK_H(0) MA_DATA(59) AD13
V4 Y6 HTCPU_DWNCNTL1 U26 AE13 MEM_MA_DATA58
13 HTCPU_UPCNTL1 L0_CTLIN_H(1) L0_CTLOUT_H(1) HTCPU_DWNCNTL1 13 10,11 MEM_MA0_CLK_L0 MA0_CLK_L(0) MA_DATA(58)
V5 W6 HTCPU_DWNCNTL1_ AG15 MEM_MA_DATA57
13 HTCPU_UPCNTL1_ L0_CTLIN_L(1) L0_CTLOUT_L(1) HTCPU_DWNCNTL1_ 13 MA_DATA(57)
HTCPU_UPCNTL U1 W2 HTCPU_DWNCNTL AC25 AE16 MEM_MA_DATA56
13 HTCPU_UPCNTL L0_CTLIN_H(0) L0_CTLOUT_H(0) HTCPU_DWNCNTL 13 10,11 MEM_MA0_CS_L1 MA0_CS_L(1) MA_DATA(56)
HTCPU_UPCNTL_ V1 W3 HTCPU_DWNCNTL_ AA24 AG17 MEM_MA_DATA55
13 HTCPU_UPCNTL_ L0_CTLIN_L(0) L0_CTLOUT_L(0) HTCPU_DWNCNTL_ 13 10,11 MEM_MA0_CS_L0 MA0_CS_L(0) MA_DATA(55)
AE18 MEM_MA_DATA54
HTCPU_UP15 HTCPU_DWN15 MA_DATA(54) MEM_MA_DATA53
U6 L0_CADIN_H(15) L0_CADOUT_H(15) Y5 10,11 MEM_MA0_ODT0 AC28 MA0_ODT(0) MA_DATA(53) AD21
R46 HTCPU_UP_15 V6 Y4 HTCPU_DWN_15 AG22 MEM_MA_DATA52
HTCPU_UP14 L0_CADIN_L(15) L0_CADOUT_L(15) HTCPU_DWN14 MA_DATA(52) MEM_MA_DATA51
T4 L0_CADIN_H(14) L0_CADOUT_H(14) AB6 AE20 MA1_CLK_H(2) MA_DATA(51) AE17
49.9 1% 0402 HTCPU_UP_14 T5 AA6 HTCPU_DWN_14 AE19 AF17 MEM_MA_DATA50
HTCPU_UP13 L0_CADIN_L(14) L0_CADOUT_L(14) HTCPU_DWN13 MA1_CLK_L(2) MA_DATA(50) MEM_MA_DATA49
R6 L0_CADIN_H(13) L0_CADOUT_H(13) AB5 G20 MA1_CLK_H(1) MA_DATA(49) AF21
HTCPU_UP_13 T6 AB4 HTCPU_DWN_13 G21 AE21 MEM_MA_DATA48
HTCPU_UP12 L0_CADIN_L(13) L0_CADOUT_L(13) HTCPU_DWN12 MA1_CLK_L(1) MA_DATA(48) MEM_MA_DATA47
P4 L0_CADIN_H(12) L0_CADOUT_H(12) AD6 V27 MA1_CLK_H(0) MA_DATA(47) AF23
HTCPU_UP_12 P5 AC6 HTCPU_DWN_12 W27 AE23 MEM_MA_DATA46
HTCPU_UP11 L0_CADIN_L(12) L0_CADOUT_L(12) HTCPU_DWN11 MA1_CLK_L(0) MA_DATA(46) MEM_MA_DATA45
M4 L0_CADIN_H(11) L0_CADOUT_H(11) AF6 MA_DATA(45) AJ26
HTCPU_UP_11 M5 AE6 HTCPU_DWN_11 AD27 AG26 MEM_MA_DATA44
HTCPU_UP10 L0_CADIN_L(11) L0_CADOUT_L(11) HTCPU_DWN10 MA1_CS_L(1) MA_DATA(44) MEM_MA_DATA43
L6 L0_CADIN_H(10) L0_CADOUT_H(10) AF5 AA25 MA1_CS_L(0) MA_DATA(43) AE22
HTCPU_UP_10 M6 AF4 HTCPU_DWN_10 AG23 MEM_MA_DATA42
HTCPU_UP9 L0_CADIN_L(10) L0_CADOUT_L(10) HTCPU_DWN9 MA_DATA(42) MEM_MA_DATA41
K4 L0_CADIN_H(9) L0_CADOUT_H(9) AH6 AC27 MA1_ODT(0) MA_DATA(41) AH25
HTCPU_UP_9 K5 AG6 HTCPU_DWN_9 AF25 MEM_MA_DATA40
HTCPU_UP8 L0_CADIN_L(9) L0_CADOUT_L(9) HTCPU_DWN8 MA_DATA(40) MEM_MA_DATA39
J6 L0_CADIN_H(8) L0_CADOUT_H(8) AH5 MA_DATA(39) AJ28
HTCPU_UP_8 K6 AH4 HTCPU_DWN_8 AB25 AJ29 MEM_MA_DATA38
L0_CADIN_L(8) L0_CADOUT_L(8) 10,11 MEM_MA_CAS_L MA_CAS_L MA_DATA(38) MEM_MA_DATA37
10,11 MEM_MA_WE_L AB27 MA_WE_L MA_DATA(37) AF29
HTCPU_UP7 U3 Y1 HTCPU_DWN7 AA26 AE26 MEM_MA_DATA36
L0_CADIN_H(7) L0_CADOUT_H(7) 10,11 MEM_MA_RAS_L MA_RAS_L MA_DATA(36)
HTCPU_UP_7 U2 W1 HTCPU_DWN_7 AJ27 MEM_MA_DATA35
HTCPU_UP6 L0_CADIN_L(7) L0_CADOUT_L(7) HTCPU_DWN6 MA_DATA(35) MEM_MA_DATA34
R1 L0_CADIN_H(6) L0_CADOUT_H(6) AA2 10,11 MEM_MA_BANK2 N25 MA_BANK(2) MA_DATA(34) AH27
HTCPU_UP_6 T1 AA3 HTCPU_DWN_6 Y27 AG29 MEM_MA_DATA33
L0_CADIN_L(6) L0_CADOUT_L(6) 10,11 MEM_MA_BANK1 MA_BANK(1) MA_DATA(33)
HTCPU_UP5 R3 AB1 HTCPU_DWN5 AA27 AF27 MEM_MA_DATA32
L0_CADIN_H(5) L0_CADOUT_H(5) 10,11 MEM_MA_BANK0 MA_BANK(0) MA_DATA(32)
HTCPU_UP_5 R2 AA1 HTCPU_DWN_5 E29 MEM_MA_DATA31
HTCPU_UP4 L0_CADIN_L(5) L0_CADOUT_L(5) HTCPU_DWN4 MA_DATA(31) MEM_MA_DATA30
C N1 L0_CADIN_H(4) L0_CADOUT_H(4) AC2 L27 MA_CKE(1) MA_DATA(30) E28 C
HTCPU_UP_4 P1 AC3 HTCPU_DWN_4 M25 D27 MEM_MA_DATA29
L0_CADIN_L(4) L0_CADOUT_L(4) 10,11 MEM_MA_CKE0 MA_CKE(0) MA_DATA(29)
HTCPU_UP3 L1 AE2 HTCPU_DWN3 C27 MEM_MA_DATA28
HTCPU_UP_3 L0_CADIN_H(3) L0_CADOUT_H(3) HTCPU_DWN_3 MEM_MA_ADD15 MA_DATA(28) MEM_MA_DATA27
M1 L0_CADIN_L(3) L0_CADOUT_L(3) AE3 M27 MA_ADD(15) MA_DATA(27) G26
HTCPU_UP2 L3 AF1 HTCPU_DWN2 MEM_MA_ADD14 N24 F27 MEM_MA_DATA26
HTCPU_UP_2 L0_CADIN_H(2) L0_CADOUT_H(2) HTCPU_DWN_2 MEM_MA_ADD13 MA_ADD(14) MA_DATA(26) MEM_MA_DATA25
L2 L0_CADIN_L(2) L0_CADOUT_L(2) AE1 AC26 MA_ADD(13) MA_DATA(25) C28
HTCPU_UP1 J1 AG2 HTCPU_DWN1 MEM_MA_ADD[15..0] MEM_MA_ADD12 N26 E27 MEM_MA_DATA24
L0_CADIN_H(1) L0_CADOUT_H(1) 10,11 MEM_MA_ADD[15..0] MA_ADD(12) MA_DATA(24)
HTCPU_UP_1 K1 AG3 HTCPU_DWN_1 MEM_MA_ADD11 P25 F25 MEM_MA_DATA23
HTCPU_UP0 L0_CADIN_L(1) L0_CADOUT_L(1) HTCPU_DWN0 MEM_MA_ADD10 MA_ADD(11) MA_DATA(23) MEM_MA_DATA22
J3 L0_CADIN_H(0) L0_CADOUT_H(0) AH1 Y25 MA_ADD(10) MA_DATA(22) E25
HTCPU_UP_0 J2 AG1 HTCPU_DWN_0 MEM_MA_ADD9 N27 E23 MEM_MA_DATA21
L0_CADIN_L(0) L0_CADOUT_L(0) MEM_MA_ADD8 MA_ADD(9) MA_DATA(21) MEM_MA_DATA20
R24 MA_ADD(8) MA_DATA(20) D23
HTCPU_UP[15..0] HTCPU_DWN[15..0] MEM_MA_ADD7 P27 E26 MEM_MA_DATA19
13 HTCPU_UP[15..0] HTCPU_DWN[15..0] 13 MA_ADD(7) MA_DATA(19)
MEM_MA_ADD6 R25 C26 MEM_MA_DATA18
HTCPU_UP_[15..0] HTCPU_DWN_[15..0] MEM_MA_ADD5 MA_ADD(6) MA_DATA(18) MEM_MA_DATA17
13 HTCPU_UP_[15..0] HTCPU_DWN_[15..0] 13 R26 MA_ADD(5) MA_DATA(17) G23
MEM_MA_ADD4 R27 F23 MEM_MA_DATA16
MEM_MA_ADD3 MA_ADD(4) MA_DATA(16) MEM_MA_DATA15
T25 MA_ADD(3) MA_DATA(15) E22
MEM_MA_ADD2 U25 E21 MEM_MA_DATA14
MEM_MA_DQS_H0 MEM_MA_ADD1 MA_ADD(2) MA_DATA(14) MEM_MA_DATA13
11 MEM_MA_DQS_H0 T27 MA_ADD(1) MA_DATA(13) F17
11 MEM_MA_DQS_H1 MEM_MA_DQS_H1 MEM_MA_ADD0 W24 G17 MEM_MA_DATA12
MEM_MA_DQS_H2 MA_ADD(0) MA_DATA(12) MEM_MA_DATA11
11 MEM_MA_DQS_H2 MA_DATA(11) G22
11 MEM_MA_DQS_H3 MEM_MA_DQS_H3 MEM_MA_DQS_H7 AD15 F21 MEM_MA_DATA10
MEM_MA_DQS_H4 MEM_MA_DQS_L7 MA_DQS_H(7) MA_DATA(10) MEM_MA_DATA9
11 MEM_MA_DQS_H4 AE15 MA_DQS_L(7) MA_DATA(9) G18
11 MEM_MA_DQS_H5 MEM_MA_DQS_H5 MEM_MA_DQS_H6 AG18 E17 MEM_MA_DATA8
MEM_MA_DQS_H6 MEM_MA_DQS_L6 MA_DQS_H(6) MA_DATA(8) MEM_MA_DATA7
11 MEM_MA_DQS_H6 AG19 MA_DQS_L(6) MA_DATA(7) G16
11 MEM_MA_DQS_H7 MEM_MA_DQS_H7 MEM_MA_DQS_H5 AG24 E15 MEM_MA_DATA6
MEM_MA_DQS_H8 MEM_MA_DQS_L5 MA_DQS_H(5) MA_DATA(6) MEM_MA_DATA5
11 MEM_MA_DQS_H8 AG25 MA_DQS_L(5) MA_DATA(5) G13
MEM_MA_DQS_H4 AG27 H13 MEM_MA_DATA4
MEM_MA_DQS_L4 MA_DQS_H(4) MA_DATA(4) MEM_MA_DATA3
AG28 MA_DQS_L(4) MA_DATA(3) H17
MEM_MA_DQS_H3 D29 E16 MEM_MA_DATA2
MEM_MA_DQS_L3 MA_DQS_H(3) MA_DATA(2) MEM_MA_DATA1
B
C29 MA_DQS_L(3) MA_DATA(1) E14 B
MEM_MA_DQS_H2 C25 G14 MEM_MA_DATA0
MEM_MA_DQS_L0 MEM_MA_DQS_L2 MA_DQS_H(2) MA_DATA(0)
11 MEM_MA_DQS_L0 D25 MA_DQS_L(2)
11 MEM_MA_DQS_L1 MEM_MA_DQS_L1 MEM_MA_DQS_H1 E19 J28 MEM_MA_DQS_H8
MEM_MA_DQS_L2 MEM_MA_DQS_L1 MA_DQS_H(1) MA_DQS_H(8) MEM_MA_DQS_L8
11 MEM_MA_DQS_L2 F19 MA_DQS_L(1) MA_DQS_L(8) J27
11 MEM_MA_DQS_L3 MEM_MA_DQS_L3 MEM_MA_DQS_H0 F15
MEM_MA_DQS_L4 MEM_MA_DQS_L0 MA_DQS_H(0) MEM_MA_DM8
11 MEM_MA_DQS_L4 G15 MA_DQS_L(0) MA_DM(8) J25
11 MEM_MA_DQS_L5 MEM_MA_DQS_L5 MEM_MA_CHECK[7..0]
MEM_MA_CHECK[7..0] 11
11 MEM_MA_DQS_L6 MEM_MA_DQS_L6 MEM_MA_DM7 AF15 K25 MEM_MA_CHECK7
MEM_MA_DQS_L7 MEM_MA_DM6 MA_DM(7) MA_CHECK(7) MEM_MA_CHECK6
11 MEM_MA_DQS_L7 AF19 MA_DM(6) MA_CHECK(6) J26
11 MEM_MA_DQS_L8 MEM_MA_DQS_L8 MEM_MA_DM5 AJ25 G28 MEM_MA_CHECK5
MEM_MA_DM4 MA_DM(5) MA_CHECK(5) MEM_MA_CHECK4
AH29 MA_DM(4) MA_CHECK(4) G27
MEM_MA_DM3 B29 L24 MEM_MA_CHECK3
MEM_MA_DM2 MA_DM(3) MA_CHECK(3) MEM_MA_CHECK2
E24 MA_DM(2) MA_CHECK(2) K27
11 MEM_MA_DM0 MEM_MA_DM0 MEM_MA_DM1 E18 H29 MEM_MA_CHECK1
MEM_MA_DM1 MEM_MA_DM0 MA_DM(1) MA_CHECK(1) MEM_MA_CHECK0
11 MEM_MA_DM1 H15 MA_DM(0) MA_CHECK(0) H27
11 MEM_MA_DM2 MEM_MA_DM2
11 MEM_MA_DM3 MEM_MA_DM3
11 MEM_MA_DM4 MEM_MA_DM4
11 MEM_MA_DM5 MEM_MA_DM5
11 MEM_MA_DM6 MEM_MA_DM6
11 MEM_MA_DM7 MEM_MA_DM7
11 MEM_MA_DM8 MEM_MA_DM8

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Date: Thursday, June 03, 2010 Sheet 5 of 39
5 4 3 2 1
 5 4 3 2 1

CPU1C

MEM_MB_DATA[0..63]
MEMORY INTERFACE B MEM_MB_DATA[0..63] 12
AJ19 AH13 MEM_MB_DATA63
10,12 MEM_MB0_CLK_H2 MB0_CLK_H(2) MB_DATA(63) MEM_MB_DATA62
10,12 MEM_MB0_CLK_L2 AK19 MB0_CLK_L(2) MB_DATA(62) AL13
A18 AL15 MEM_MB_DATA61
10,12 MEM_MB0_CLK_H1 MB0_CLK_H(1) MB_DATA(61)
A19 AJ15 MEM_MB_DATA60
10,12 MEM_MB0_CLK_L1 MB0_CLK_L(1) MB_DATA(60)
U31 AF13 MEM_MB_DATA59
10,12 MEM_MB0_CLK_H0 MB0_CLK_H(0) MB_DATA(59)
U30 AG13 MEM_MB_DATA58
D 10,12 MEM_MB0_CLK_L0 MB0_CLK_L(0) MB_DATA(58) MEM_MB_DATA57 D
MB_DATA(57) AL14
AE30 AK15 MEM_MB_DATA56
10,12 MEM_MB0_CS_L1 MB0_CS_L(1) MB_DATA(56)
AC31 AL16 MEM_MB_DATA55
10,12 MEM_MB0_CS_L0 MB0_CS_L(0) MB_DATA(55)
AL17 MEM_MB_DATA54
MB_DATA(54) MEM_MB_DATA53
10,12 MEM_MB0_ODT0 AD29 MB0_ODT(0) MB_DATA(53) AK21
AL21 MEM_MB_DATA52
MB_DATA(52) MEM_MB_DATA51
AL19 MB1_CLK_H(2) MB_DATA(51) AH15
AL18 AJ16 MEM_MB_DATA50
MB1_CLK_L(2) MB_DATA(50) MEM_MB_DATA49
C19 MB1_CLK_H(1) MB_DATA(49) AH19
D19 AL20 MEM_MB_DATA48
MB1_CLK_L(1) MB_DATA(48) MEM_MB_DATA47
W29 MB1_CLK_H(0) MB_DATA(47) AJ22
W28 AL22 MEM_MB_DATA46
MB1_CLK_L(0) MB_DATA(46) MEM_MB_DATA45
MB_DATA(45) AL24
AE29 AK25 MEM_MB_DATA44
MB1_CS_L(1) MB_DATA(44) MEM_MB_DATA43
AB31 MB1_CS_L(0) MB_DATA(43) AJ21
AH21 MEM_MB_DATA42
MB_DATA(42) MEM_MB_DATA41
AD31 MB1_ODT(0) MB_DATA(41) AH23
AJ24 MEM_MB_DATA40
MB_DATA(40) MEM_MB_DATA39
MB_DATA(39) AL27
AC29 AK27 MEM_MB_DATA38
10,12 MEM_MB_CAS_L MB_CAS_L MB_DATA(38) MEM_MB_DATA37
10,12 MEM_MB_WE_L AC30 MB_WE_L MB_DATA(37) AH31
AB29 AG30 MEM_MB_DATA36
10,12 MEM_MB_RAS_L MB_RAS_L MB_DATA(36) MEM_MB_DATA35
MB_DATA(35) AL25
N31 AL26 MEM_MB_DATA34
10,12 MEM_MB_BANK2 MB_BANK(2) MB_DATA(34)
AA31 AJ30 MEM_MB_DATA33
10,12 MEM_MB_BANK1 MB_BANK(1) MB_DATA(33) MEM_MB_DATA32
10,12 MEM_MB_BANK0 AA28 MB_BANK(0) MB_DATA(32) AJ31
E31 MEM_MB_DATA31
MB_DATA(31) MEM_MB_DATA30
M31 MB_CKE(1) MB_DATA(30) E30
M29 B27 MEM_MB_DATA29
10,12 MEM_MB_CKE0 MEM_MB_ADD[15..0] MB_CKE(0) MB_DATA(29)
C A27 MEM_MB_DATA28 C
10,12 MEM_MB_ADD[15..0] MB_DATA(28)
MEM_MB_ADD15 N28 F29 MEM_MB_DATA27
MEM_MB_ADD14 MB_ADD(15) MB_DATA(27) MEM_MB_DATA26
N29 MB_ADD(14) MB_DATA(26) F31
MEM_MB_ADD13 AE31 A29 MEM_MB_DATA25
MEM_MB_ADD12 MB_ADD(13) MB_DATA(25) MEM_MB_DATA24
N30 MB_ADD(12) MB_DATA(24) A28
MEM_MB_ADD11 P29 A25 MEM_MB_DATA23
MEM_MB_ADD10 MB_ADD(11) MB_DATA(23) MEM_MB_DATA22
AA29 MB_ADD(10) MB_DATA(22) A24
MEM_MB_ADD9 P31 C22 MEM_MB_DATA21
MEM_MB_ADD8 MB_ADD(9) MB_DATA(21) MEM_MB_DATA20
R29 MB_ADD(8) MB_DATA(20) D21
MEM_MB_ADD7 R28 A26 MEM_MB_DATA19
MEM_MB_ADD6 MB_ADD(7) MB_DATA(19) MEM_MB_DATA18
R31 MB_ADD(6) MB_DATA(18) B25
MEM_MB_ADD5 R30 B23 MEM_MB_DATA17
MEM_MB_ADD4 MB_ADD(5) MB_DATA(17) MEM_MB_DATA16
T31 MB_ADD(4) MB_DATA(16) A22
MEM_MB_ADD3 T29 B21 MEM_MB_DATA15
MEM_MB_ADD2 MB_ADD(3) MB_DATA(15) MEM_MB_DATA14
U29 MB_ADD(2) MB_DATA(14) A20
MEM_MB_ADD1 U28 C16 MEM_MB_DATA13
MEM_MB_ADD0 MB_ADD(1) MB_DATA(13) MEM_MB_DATA12
AA30 MB_ADD(0) MB_DATA(12) D15
MEM_MB_DQS_H[8..0] C21 MEM_MB_DATA11
12 MEM_MB_DQS_H[8..0] MEM_MB_DQS_H7 MB_DATA(11) MEM_MB_DATA10
AK13 MB_DQS_H(7) MB_DATA(10) A21
MEM_MB_DQS_L7 AJ13 A17 MEM_MB_DATA9
MEM_MB_DQS_H6 MB_DQS_L(7) MB_DATA(9) MEM_MB_DATA8
AK17 MB_DQS_H(6) MB_DATA(8) A16
MEM_MB_DQS_L6 AJ17 B15 MEM_MB_DATA7
MEM_MB_DQS_H5 MB_DQS_L(6) MB_DATA(7) MEM_MB_DATA6
AK23 MB_DQS_H(5) MB_DATA(6) A14
MEM_MB_DQS_L5 AL23 E13 MEM_MB_DATA5
MEM_MB_DQS_H4 MB_DQS_L(5) MB_DATA(5) MEM_MB_DATA4
AL28 MB_DQS_H(4) MB_DATA(4) F13
MEM_MB_DQS_L4 AL29 C15 MEM_MB_DATA3
MEM_MB_DQS_H3 MB_DQS_L(4) MB_DATA(3) MEM_MB_DATA2
D31 MB_DQS_H(3) MB_DATA(2) A15
MEM_MB_DQS_L3 C31 A13 MEM_MB_DATA1
MEM_MB_DQS_H2 MB_DQS_L(3) MB_DATA(1) MEM_MB_DATA0
C24 MB_DQS_H(2) MB_DATA(0) D13
MEM_MB_DQS_L2 C23
B
MEM_MB_DQS_H1 MB_DQS_L(2) MEM_MB_DQS_H8 B
D17 MB_DQS_H(1) MB_DQS_H(8) J31
MEM_MB_DQS_L1 C17 J30 MEM_MB_DQS_L8
MEM_MB_DQS_H0 MB_DQS_L(1) MB_DQS_L(8)
C14 MB_DQS_H(0)
MEM_MB_DQS_L0 C13 J29 MEM_MB_DM8
MEM_MB_DQS_L[8..0] MB_DQS_L(0) MB_DM(8)
12 MEM_MB_DQS_L[8..0]
MEM_MB_DM7 AJ14 K29 MEM_MB_CHECK7
MEM_MB_DM6 MB_DM(7) MB_CHECK(7) MEM_MB_CHECK6
AH17 MB_DM(6) MB_CHECK(6) K31
MEM_MB_DM5 AJ23 G30 MEM_MB_CHECK5
MEM_MB_DM4 MB_DM(5) MB_CHECK(5) MEM_MB_CHECK4
AK29 MB_DM(4) MB_CHECK(4) G29
MEM_MB_DM3 C30 L29 MEM_MB_CHECK3
MEM_MB_DM2 MB_DM(3) MB_CHECK(3) MEM_MB_CHECK2
A23 MB_DM(2) MB_CHECK(2) L28
MEM_MB_DM1 B17 H31 MEM_MB_CHECK1
MEM_MB_DM0 MB_DM(1) MB_CHECK(1) MEM_MB_CHECK0
B13 MB_DM(0) MB_CHECK(0) G31
MEM_MB_DM[8..0] MEM_MB_CHECK[7..0]
12 MEM_MB_DM[8..0] MEM_MB_CHECK[7..0] 12

A A

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◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal M2 DDR2 B
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 6 of 39
5 4 3 2 1
 5 4 3 2 1

+5V

+2.5V

1
+2.5V
CT1
10UF 10V 0805 Y5V /NI

1
Q6 R1 R7 C16 C17 C26
I 49.9 1% 0402 10UF 10V 0805 Y5V 3900P 50V X7R 0402

1
O 10UF 10V 0805 Y5V

2
A C24
10UF 10V 0805 Y5V
D D

2
AZ1117H-ADJ SOT-223 R8
+1.8V_SUS 54.9 1% 0402
R2
+1.8V_SUS
2

BR1 CPU1D
16.9 1% 0402
MISC

2
4
6
8
CPU_M_VREFF CPU_CLK C31
2 1 C10
1 1

13 CPU_CLK VDDA1

2
D10 RN54
3900P 50V X7R 0402 R37 VDDA2 1K 8P4R 0402
1

169 1% 0402 A8

1
3
5
7
BR2 BC2 BC5 CLKIN_H
B8 CLKIN_L
16.9 1% 0402 C32
1UF 10V Y5V 0402 CPU_CLK* 2 1 HTCPU_PWRGD C9 D2 VID5
2

1
13 CPU_CLK_ HTCPU_STOP_ PWROK VID(5) VID4 K8_VID5 31
0.1UF 16V Y5V 0402 D8 D1
2

LDTSTOP_L VID(4) K8_VID4 31

3900P 50V X7R 0402 HTCPU_RST_ C7 C1 VID3
RESET_L VID(3) K8_VID3 31
E3 VID2
VID(2) VID1 K8_VID2 31
AL3 CPU_PRESENT_L VID(1) E2 K8_VID1 31
18 THERM_SIC VID0
18 THERM_SID VID(0) E1 K8_VID0 31
RN56 1K 8P4R 0402
+1.8V_SUS 2 1 AL6 AK7 CPU_THERMTRIP
+1.8V_SUS SIC THERMTRIP_L CPU_THERMTRIP_ 13
4 3 AK6 AL7 PROCHOT
SID PROCHOT_L PROCHOT 13
6 5 ALERT_
8 7 AL10 TDI AK10 TP_CPU_TDO1 BTP_CPU_TDO1
TDO TP /NI
AJ10 TRST_L
2
4
6
8 AH10 TCK
C RN2 AL9 C
330 8P4R 0402 R69 300 0402TMS
1 2A5 DBREQ_L B6 CPU_DBREQ1 BCPU_DBREQ1
1
3
5
7

+1.8V_SUS DBRDY TP /NI

CPU_CORE_FB TP_VDDIOFB1 TP /NI
31 CPU_CORE_FB
G2 VDD_FB_H VDDIO_FB_H AK11 BTP_VDDIOFB1
CPU_CORE_FB- G1 AL11 TP_VDDIOFB_1
13 HTCPU_STOP_ 31 CPU_CORE_FB_ VDD_FB_L VDDIO_FB_L BTP_VDDIOFB_1
13 HTCPU_RST_ TP /NI
TP /NI TP_VDDIOSENSE1 E12 F1
13 HTCPU_PWRGD VTT_SENSE PSI_L +1.2V_HT
BTP_VDDIOSENSE1
CPU_M_VREFF F12 V8 R45 2 1 44.2 1% 0402
R70 1 M_VREF HTREF1
+1.8V_SUS 2 39.2 1% 0402AH11 M_ZN HTREF0 V7 R43 2 1 44.2 1% 0402
R68 1 2 39.2 1% 0402AJ11 M_ZP
R30 1 2 510 0402 A10 C11 FBCLKOUT
TEST25_H TEST29_H

2
R31 1 2 510 0402 B10 D11 FBCLKOUT* LAYOUT: ROUTE 80 OHM DIFF IMPEDENCE
TEST25_L TEST29_L
CPU1E R28 1 2 300 0402 F10 TEST19 R29 LAYOUT: PLACE WITHIN 1 INCH OF CPU
R27 1 2 300 0402 E9 80.6 1% 0402
TEST18
INTERNAL MISC AJ7 TEST13
8/5/8/20
L25 E20 F6 +1.8V_SUS
RSVD1 RSVD17 TEST9
L26 B19

1
RSVD2 RSVD18 CPU_TEST24
L31 RSVD3 D6 TEST17 TEST24 AK8
L30 AL4 ALERT_ E7 AH8 CPU_TEST23 R126 1 300
2 0402
RSVD4 RSVD19 TEST16 TEST23 CPU_TEST22 RN14 330 8P4R 0402
RSVD20 AK4 F8 TEST15 TEST22 AJ9
AK3 C5 AL8 CPU_TEST21 PROCHOT 1 2
RSVD21 R131 300 TEST14 TEST21 CPU_TEST20 CPU_THERMTRIP
1 2 0402 AH9 TEST12 TEST20 AJ8 3 4
F2 CPU_TEST27 5 6
RSVD22 CPU_TEST26
RSVD23 F3 E5 TEST7 TEST28_H J10 7 8
W26 RSVD5 AJ5 TEST6 TEST28_L H9
W25 G4 AG9 AK9 CPU_TEST27
B RSVD6 RSVD24 33,34 CPU_THERMDC THERMDC TEST27 B
AE27 G3 AG8 AK5 CPU_TEST26 RN55 330 8P4R 0402
RSVD7 RSVD25 33 CPU_THERMDA THERMDA TEST26
U24 G5 R97 300 0402 /NI AH7 G7 CPU_TEST22 1 2
RSVD8 RSVD26 +1.8V_SUS TEST3 TEST10
V24 AJ6 D4 CPU_TEST21 3 4
RSVD9 TEST2 TEST8 CPU_TEST24
AE28 RSVD10 RSVD27 AD25 5 6
AE24 CPU_TEST20 7 8
RSVD28
RSVD29 AE25
RSVD30 AJ18
RSVD31 AJ20
RSVD32 C18
Y31 RSVD11 RSVD33 C20
Y30 RSVD12 RSVD34 G24
AG31 RSVD13 RSVD35 G25
V31 RSVD14 RSVD36 H25
W31 RSVD15 RSVD37 V29
AF31 RSVD16 RSVD38 W30

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duplication, or disclosure of this
Title
document will be subject to the
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N68SA-M2S
Date: Friday, June 04, 2010 Sheet 7 of 39
5 4 3 2 1
 5 4 3 2 1

+1.2V_HT_CPU
+V_CPU

2
BC1
1UF 10V Y5V 0402 C101 C104
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V

1
D D

+1.2V_HT

C302 0.1UF 16V Y5V 0402

+V_CPU CPU1F +V_CPU CPU1G +V_CPU CPU1H +1.2V_HT_CPU CPU1I

VDD1 VDD2 VDD3 +0.9V_SUS VDDIO C49 10UF 10V 0805 Y5V
A4 VDD1 VSS1 A3 L14 VDD1 VSS1 AK20 AA20 VDD1 VSS1 N17 AJ4 VLDT_A1 VLDT_B1 H6 1 2
A6 VDD2 VSS2 A7 L16 VDD2 VSS2 AK22 AA22 VDD2 VSS2 N19 AJ3 VLDT_A2 VLDT_B2 H5
AA8 A9 L18 AK24 AB13 N21 AJ2 H2 C53 10UF 10V 0805 Y5V
VDD3 VSS3 VDD3 VSS3 VDD3 VSS3 VLDT_A3 VLDT_B3
AA10 VDD4 VSS4 A11 M2 VDD4 VSS4 AK26 AB15 VDD4 VSS4 N23 AJ1 VLDT_A4 VLDT_B4 H1 1 2
AA12 VDD5 VSS5 AA4 M3 VDD5 VSS5 AK28 AB17 VDD5 VSS5 P2
AA14 VDD6 VSS6 AA5 M7 VDD6 VSS6 AK30 AB19 VDD6 VSS6 P3 D12 VTT1 VTT5 AK12 +0.9V_SUS
AA16 VDD7 VSS7 AA7 M9 VDD7 VSS7 AL5 AB21 VDD7 VSS7 P8 C12 VTT2 VTT6 AJ12
AA18 VDD8 VSS8 AA9 M11 VDD8 VSS8 B4 AB23 VDD8 VSS8 P10 B12 VTT3 VTT7 AH12
AB7 VDD9 VSS9 AA11 M13 VDD9 VSS9 B9 AC12 VDD9 VSS9 P12 A12 VTT4 VTT8 AG12
AB9 VDD10 VSS10 AA13 M15 VDD10 VSS10 B11 AC14 VDD10 VSS10 P14 VTT9 AL12
AB11 VDD11 VSS11 AA15 M17 VDD11 VSS11 B14 AC16 VDD11 VSS11 P16 +1.8V_SUS AB24 VDDIO1
AC4 VDD12 VSS12 AA17 M19 VDD12 VSS12 B16 AC18 VDD12 VSS12 P18 AB26 VDDIO2 VSS1 K24
AC5 VDD13 VSS13 AA19 N8 VDD13 VSS13 B18 AC20 VDD13 VSS13 P20 AB28 VDDIO3 VSS2 K26
AC8 VDD14 VSS14 AA21 N10 VDD14 VSS14 B20 AC22 VDD14 VSS14 P22 AB30 VDDIO4 VSS3 K28
AC10 VDD15 VSS15 AA23 N12 VDD15 VSS15 B22 AD11 VDD15 VSS15 R7 AC24 VDDIO5 VSS4 K30
AD2 VDD16 VSS16 AB2 N14 VDD16 VSS16 B24 AD23 VDD16 VSS16 R9 AD26 VDDIO6 VSS5 L7
AD3 VDD17 VSS17 AB3 N16 VDD17 VSS17 B26 AE12 VDD17 VSS17 R11 AD28 VDDIO7 VSS6 L9
AD7 VDD18 VSS18 AB8 N18 VDD18 VSS18 B28 AF11 VDD18 VSS18 R13 AD30 VDDIO8 VSS7 L11
AD9 VDD19 VSS19 AB10 P7 VDD19 VSS19 B30 L20 VDD19 VSS19 R15 AF30 VDDIO29 VSS8 L13
AE10 VDD20 VSS20 AB12 P9 VDD20 VSS20 C3 L22 VDD20 VSS20 R17 M24 VDDIO9 VSS9 L15
C AF7 VDD21 VSS21 AB14 P11 VDD21 VSS21 D14 M21 VDD21 VSS21 R19 M26 VDDIO10 VSS10 L17 C
AF9 VDD22 VSS22 AB16 P13 VDD22 VSS22 D16 M23 VDD22 VSS22 R21 M28 VDDIO11 VSS11 L19
AG4 VDD23 VSS23 AB18 P15 VDD23 VSS23 D18 N20 VDD23 VSS23 R23 M30 VDDIO12 VSS12 L21
AG5 VDD24 VSS24 AB20 P17 VDD24 VSS24 D20 N22 VDD24 VSS24 T8 P24 VDDIO13 VSS13 L23
AG7 VDD25 VSS25 AB22 P19 VDD25 VSS25 D22 P21 VDD25 VSS25 T10 P26 VDDIO14 VSS14 M8
AH2 VDD26 VSS26 AC7 R4 VDD26 VSS26 D24 P23 VDD26 VSS26 T12 P28 VDDIO15 VSS15 M10
AH3 VDD27 VSS27 AC9 R5 VDD27 VSS27 D26 R22 VDD27 VSS27 T14 P30 VDDIO16 VSS16 M12
B3 VDD28 VSS28 AC11 R8 VDD28 VSS28 D28 T23 VDD28 VSS28 T16 T24 VDDIO17 VSS17 M14
B5 VDD29 VSS29 AC13 R10 VDD29 VSS29 D30 U22 VDD29 VSS29 T18 T26 VDDIO18 VSS18 M16
B7 VDD30 VSS30 AC15 R12 VDD30 VSS30 E11 V23 VDD30 VSS30 T20 T28 VDDIO19 VSS19 M18
C2 VDD31 VSS31 AC17 R14 VDD31 VSS31 F4 W22 VDD31 VSS31 T22 T30 VDDIO20 VSS20 M20
C4 VDD32 VSS32 AC19 R16 VDD32 VSS32 F14 Y23 VDD32 VSS32 U4 V25 VDDIO21 VSS21 M22
C6 VDD33 VSS33 AC21 R18 VDD33 VSS33 F16 VSS33 U5 V26 VDDIO22 VSS22 N4
C8 VDD34 VSS34 AC23 R20 VDD34 VSS34 F18 VSS34 U7 V28 VDDIO23 VSS23 N5
D3 VDD35 VSS35 AD8 T2 VDD35 VSS35 F20 VSS35 U9 V30 VDDIO24 VSS24 N7
D5 VDD36 VSS36 AD10 T3 VDD36 VSS36 F22 VSS36 U11 Y24 VDDIO25 VSS25 N9
D7 VDD37 VSS37 AD12 T7 VDD37 VSS37 F24 VSS37 U13 Y26 VDDIO26 VSS26 N11
D9 VDD38 VSS38 AD14 T9 VDD38 VSS38 F26 VSS38 U15 Y28 VDDIO27 VSS27 N13
E4 VDD39 VSS39 AD16 T11 VDD39 VSS39 F28 VSS39 U17 Y29 VDDIO28 VSS28 N15
E6 VDD40 VSS40 AD20 T13 VDD40 VSS40 F30 VSS40 U19
E8 VDD41 VSS41 AD22 T15 VDD41 VSS41 G9 VSS41 U21
E10 VDD42 VSS42 AD24 T17 VDD42 VSS42 G11 VSS42 U23
F5 VDD43 VSS43 AE4 T19 VDD43 VSS43 H8 VSS43 V2
F7 VDD44 VSS44 AE5 T21 VDD44 VSS44 H10 VSS44 V3
F9 VDD45 VSS45 AE9 U8 VDD45 VSS45 H12 VSS45 V10
F11 VDD46 VSS46 AE11 U10 VDD46 VSS46 H14 VSS46 V12
G6 VDD47 VSS47 AF2 U12 VDD47 VSS47 H16 VSS47 V14
G8 VDD48 VSS48 AF3 U14 VDD48 VSS48 H18 VSS48 V16
G10 VDD49 VSS49 AF8 U16 VDD49 VSS49 H22 VSS49 V18
B
G12 VDD50 VSS50 AF10 U18 VDD50 VSS50 H24 VSS50 V20 B
H7 VDD51 VSS51 AF12 U20 VDD51 VSS51 H26 VSS51 V22
H11 VDD52 VSS52 AF14 V9 VDD52 VSS52 H28 VSS52 W9
H23 VDD53 VSS53 AF16 V11 VDD53 VSS53 H30 VSS53 W11
J8 VDD54 VSS54 AF18 V13 VDD54 VSS54 J4 VSS54 W13
J12 VDD55 VSS55 AF20 V15 VDD55 VSS55 J5 VSS55 W15
J14 VDD56 VSS56 AF22 V17 VDD56 VSS56 J7 VSS56 W17
J16 VDD57 VSS57 AF24 V19 VDD57 VSS57 J9 VSS57 W19
J18 VDD58 VSS58 AF26 V21 VDD58 VSS58 J11 VSS58 W21
J20 VDD59 VSS59 AF28 W4 VDD59 VSS59 J13 VSS59 W23
J22 VDD60 VSS61 AG10 W5 VDD60 VSS60 J15 VSS60 Y8
J24 VDD61 VSS62 AG11 W8 VDD61 VSS61 J17 VSS61 Y10
K7 VDD62 VSS63 AH14 W10 VDD62 VSS62 J19 VSS62 Y12
K9 VDD63 VSS64 AH16 W12 VDD63 VSS63 J21 VSS63 W7
K11 VDD64 VSS65 AH18 W14 VDD64 VSS64 J23 VSS64 Y20
K13 VDD65 VSS66 AH20 W16 VDD65 VSS65 K2 VSS65 Y22
K15 VDD66 VSS67 AH22 W18 VDD66 VSS66 K3
K17 VDD67 VSS68 AH24 W20 VDD67 VSS67 K8
K19 VDD68 VSS69 AH26 Y2 VDD68 VSS68 K10
K21 VDD69 VSS70 AH28 Y3 VDD69 VSS69 K12
K23 VDD70 VSS71 AH30 Y7 VDD70 VSS70 K14
L4 VDD71 VSS72 AK2 Y9 VDD71 VSS71 K16
L5 VDD72 VSS73 AK14 Y11 VDD72 VSS72 K18
L8 VDD73 VSS74 AK16 Y13 VDD73 VSS73 K20
L10 VDD74 VSS75 AK18 Y15 VDD74 VSS74 K22
L12 VDD75 VSS240 Y14 Y21 VDD75 VSS75 Y18
Y17 VDD150 VSS241 Y16
Y19 VDD151

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document will be subject to the
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N68SA-M2S
Date: Friday, June 04, 2010 Sheet 8 of 39
5 4 3 2 1
 5 4 3 2 1

+1.8V_SUS
1

1
BC38 BC34 BC29 BC24 BC16 BC3 BC11
D D
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
2

2
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V

+1.8V_SUS
1

1
C131 C80 C92 C52 C54 C85 C84

10UF 10V 0805 Y5V 1UF 10V Y5V 0402 0.1UF 16V Y5V 0402 10UF 10V 0805 Y5V
2

2
1UF 10V Y5V 0402 10UF 10V 0805 Y5V 1UF 10V Y5V 0402
+V_CPU

+0.9V_SUS C297 C298 C299

0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402

C38
2

2
C C105 C25 C117 C27 C99 C35 C
0.1UF 16V Y5V 0402
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 0.1UF 16V Y5V 0402
蚚衾HT輻脯
1

1
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 0.1UF 16V Y5V 0402

PLACE BOTTOM SIDE DECOUPLING

+V_CPU
1

1
BC36 BC8 BC18 BC25 BC50 BC60 BC61 BC66 BC79 BC82 C23 C29 C30 C109 C112 C145
1UF 16V 0805 Y5V
1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V10UF 10V 0805 Y5V10UF 10V 0805 Y5V
10UF 10V 0805 Y5V10UF 10V 0805 Y5V10UF 10V 0805 Y5V10UF 10V 0805 Y5V
2

2
10UF 10V 0805 Y5V 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V

B B

+V_CPU
1

1
BC30 BC21 BC28 BC17 BC35 BC12 BC31 BC42 BC15 BC4
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V 1UF 10V Y5V 0402 1UF 16V 0805 Y5V 1UF 10V Y5V 0402
2

2
A A

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duplication, or disclosure of this
Title
document will be subject to the
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Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 9 of 39
5 4 3 2 1
 5 4 3 2 1

+0.9V_SUS
5,11 MEM_MA0_CLK_H2

1
+0.9V_SUS
C102 MEM_MA_ADD[15..0] MEM_MB_ADD[15..0]
5,11 MEM_MA_ADD[15..0] 6,12 MEM_MB_ADD[15..0]
RN7 47 8P4R 0402 RN5 47 8P4R 0402
1.5P 50V NPO 0402 MEM_MB_ADD9 MEM_MA_BANK2
8 7 8 7

2
MEM_MA_ADD8 6 5 MEM_MA_ADD12 6 5
5,11 MEM_MA0_CLK_L2
MEM_MA_ADD5 4 3 MEM_MA_ADD11 4 3
MEM_MB_ADD7 2 1 MEM_MA_ADD9 2 1
5,11 MEM_MA0_CLK_H1
D D
RN10 47 8P4R 0402 RN6 47 8P4R 0402

C33

1.5P 50V NPO 04021.5P 50V NPO 04021.5P 50V NPO 04021.5P 50V NPO 04021.5P 50V NPO 0402
MEM_MB_ADD1 8 7 MEM_MA_ADD7 8 7
MEM_MA_ADD1 6 5 MEM_MB_BANK2 6 5
MEM_MA_ADD2 4 3 MEM_MB_ADD12 4 3
5,11 MEM_MA0_CLK_L1
MEM_MB_ADD2 2 1 MEM_MB_ADD11 2 1

5,11 MEM_MA0_CLK_H0
RN13 47 8P4R 0402 RN8 47 8P4R 0402
8 7 MEM_MB_ADD8 8 7

C76
MEM_MB_WE_L 6 5 MEM_MA_ADD6 6 5
MEM_MA_BANK0 4 3 MEM_MB_ADD6 4 3
MEM_MA_RAS_L 2 1 MEM_MA_ADD4 2 1
5,11 MEM_MA0_CLK_L0

RN9 47 8P4R 0402 RN11 47 8P4R 0402

6,12 MEM_MB0_CLK_H2
MEM_MB_ADD5 8 7 MEM_MB_ADD0 8 7
MEM_MB_ADD3 6 5 MEM_MB_BANK1 6 5
C106

MEM_MB_ADD4 4 3 MEM_MB_ADD10 4 3
MEM_MA_ADD3 2 1 MEM_MB_BANK0 2 1
6,12 MEM_MB0_CLK_L2
RN18 47 8P4R 0402
MEM_MA_CAS_L 8 7 RN12 47 8P4R 0402
MEM_MA_ADD13 6 5 MEM_MA_ADD10 8 7
6,12 MEM_MB0_CLK_H1
MEM_MA0_CS_L1 4 3 MEM_MA_BANK1 6 5
2 1 MEM_MA_ADD0 4 3
C36

MEM_MB_RAS_L 2 1
RN4 47 8P4R 0402
MEM_MB_ADD14 8 7
6,12 MEM_MB0_CLK_L1
MEM_MA_CKE0 6 5 RN3 47 8P4R 0402
C MEM_MA_ADD15 4 3 8 7 C
MEM_MA_ADD14 2 1 6 5
6,12 MEM_MB0_CLK_H0
MEM_MB_CKE0 4 3
RN17 47 8P4R 0402 MEM_MB_ADD15 2 1
C75

MEM_MB0_ODT0 8 7
MEM_MB_ADD13 6 5
MEM_MB0_CS_L1 4 3
6,12 MEM_MB0_CLK_L0
MEM_MA0_ODT0 2 1

RN15 47 8P4R 0402

LAYOUT: FRONT SIDE PLACE ALTERNATING GND AND 1.8V MEM_MA0_CS_L0 8 7
MEM_MA_WE_L 6 5
ALONG 0.9V VTT FILL MEM_MB0_CS_L0 4 3
MEM_MB_CAS_L 2 1
+1.8V_SUS
+1.8V_SUS
+0.9V_SUS
C86 22P 50V NPO 0402
6,12 MEM_MB_BANK0
BC44 22P 50V NPO 0402 C82 22P 50V NPO 0402
5,11 MEM_MA_BANK0 6,12 MEM_MB_BANK1
BC41 22P 50V NPO 0402 C61 22P 50V NPO 0402
5,11 MEM_MA_BANK1 6,12 MEM_MB_BANK2
BC9 22P 50V NPO 0402 C90 22P 50V NPO 0402
+0.9V_SUS +1.8V_SUS 5,11 MEM_MA_BANK2 6,12 MEM_MB_CAS_L
C110 1 2 0.1UF 16V Y5V 0402 BC47 22P 50V NPO 0402 C89 22P 50V NPO 0402
5,11 MEM_MA_CAS_L 6,12 MEM_MB_WE_L
BC46 22P 50V NPO 0402 C87 22P 50V NPO 0402
5,11 MEM_MA_WE_L 6,12 MEM_MB_RAS_L
BC45 22P 50V NPO 0402 MEM_MB_ADD0 C81 22P 50V NPO 0402
5,11 MEM_MA_RAS_L
MEM_MA_ADD0 BC37 22P 50V NPO 0402 MEM_MB_ADD1 C78 22P 50V NPO 0402
C55 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD1 BC32 22P 50V NPO 0402 MEM_MB_ADD2 C77 22P 50V NPO 0402
C122 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD2 BC33 22P 50V NPO 0402 MEM_MB_ADD3 C73 22P 50V NPO 0402
C42 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD3 BC27 22P 50V NPO 0402 MEM_MB_ADD4 C72 22P 50V NPO 0402
C115 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD4 BC26 22P 50V NPO 0402 MEM_MB_ADD5 C70 22P 50V NPO 0402
C62 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD5 BC22 22P 50V NPO 0402 MEM_MB_ADD6 C71 22P 50V NPO 0402
B B
C58 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD6 BC23 22P 50V NPO 0402 MEM_MB_ADD7 C68 22P 50V NPO 0402
C126 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD7 BC19 22P 50V NPO 0402 MEM_MB_ADD8 C67 22P 50V NPO 0402
MEM_MA_ADD8 BC20 22P 50V NPO 0402 MEM_MB_ADD9 C64 22P 50V NPO 0402
MEM_MA_ADD9 BC14 22P 50V NPO 0402 MEM_MB_ADD10 C83 22P 50V NPO 0402
MEM_MA_ADD10 BC43 22P 50V NPO 0402 MEM_MB_ADD11 C65 22P 50V NPO 0402
C120 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD11 BC13 22P 50V NPO 0402 MEM_MB_ADD12 C60 22P 50V NPO 0402
C48 0.1UF 16V Y5V 0402 MEM_MA_ADD12 BC10 22P 50V NPO 0402 MEM_MB_ADD13 C91 22P 50V NPO 0402
C50 1 2 0.1UF 16V Y5V 0402 MEM_MA_ADD13 BC48 22P 50V NPO 0402 MEM_MB_ADD14 C56 22P 50V NPO 0402
C41 0.1UF 16V Y5V 0402 MEM_MA_ADD14 BC7 22P 50V NPO 0402 MEM_MB_ADD15 C57 22P 50V NPO 0402
C74 2 1 0.1UF 16V Y5V 0402 MEM_MA_ADD15 BC6 22P 50V NPO 0402
C69 0.1UF 16V Y5V 0402
C46 0.1UF 16V Y5V 0402
C107 0.1UF 16V Y5V 0402

5,11 MEM_MA_CKE0 6,12 MEM_MB_CKE0

5,11 MEM_MA0_CS_L0 6,12 MEM_MB0_CS_L0

5,11 MEM_MA0_CS_L1 6,12 MEM_MB0_CS_L1

5,11 MEM_MA0_ODT0 6,12 MEM_MB0_ODT0

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal DDR ADD/CTL/VTT TERMINATI
Size Document Number Rev
penalties.◆ Custom N68SA-M2S 6.2

Date: Friday, June 04, 2010 Sheet 10 of 39

5 4 3 2 1
 5 4 3 2 1

+1.8V_SUS +3.3V

D
DIMMA1 DIMMA1 D

172
178
184
187
189
197

170
175
181
191
194

238
53
59
64
67
69

51
56
62
72
75
78
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11

VDDSPD
MEM_MA_DATA[0..63]
MEM_MA_DATA[0..63] 5
MEM_MA_DM8 164 236 MEM_MA_DATA63
DQS17_H DQ63 MEM_MA_DATA62
165 DQS17_L DQ62 235
MEM_MA_DM7 232 230 MEM_MA_DATA57
DQS16_H DQ61 MEM_MA_DATA60
233 DQS16_L DQ60 229
MEM_MA_DM6 223 117 MEM_MA_DATA59
DQS15_H DQ59 MEM_MA_DATA58
224 DQS15_L DQ58 116
MEM_MA_DM5 211 111 MEM_MA_DATA56
DQS14_H DQ57 MEM_MA_DATA61
212 DQS14_L DQ56 110
MEM_MA_DM4 202 227 MEM_MA_DATA55
DQS13_H DQ55 MEM_MA_DATA54 MEM_MA_DQS_H0
203 DQS13_L DQ54 226 5 MEM_MA_DQS_H0
MEM_MA_DM3 155 218 MEM_MA_DATA48 5 MEM_MA_DQS_H1 MEM_MA_DQS_H1
DQS12_H DQ53 MEM_MA_DATA52 MEM_MA_DQS_H2
156 DQS12_L DQ52 217 5 MEM_MA_DQS_H2
MEM_MA_DM2 146 108 MEM_MA_DATA50 5 MEM_MA_DQS_H3 MEM_MA_DQS_H3
DQS11_H DQ51 MEM_MA_DATA51 MEM_MA_DQS_H4
147 DQS11_L DQ50 107 5 MEM_MA_DQS_H4
MEM_MA_DM1 134 99 MEM_MA_DATA49 5 MEM_MA_DQS_H5 MEM_MA_DQS_H5
DQS10_H DQ49 MEM_MA_DATA53 MEM_MA_DQS_H6
135 DQS10_L DQ48 98 5 MEM_MA_DQS_H6
MEM_MA_DM0 125 215 MEM_MA_DATA47 5 MEM_MA_DQS_H7 MEM_MA_DQS_H7
DQS9_H DQ47 MEM_MA_DATA46 MEM_MA_DQS_H8
126 DQS9_L DQ46 214 5 MEM_MA_DQS_H8
MEM_MA_DQS_H8 46 209 MEM_MA_DATA45
MEM_MA_DQS_L8 DQS8_H DQ45 MEM_MA_DATA44
45 DQS8_L DQ44 208
MEM_MA_DQS_H7 114 96 MEM_MA_DATA43
MEM_MA_DQS_L7 DQS7_H DQ43 MEM_MA_DATA42 +1.8V_SUS
C 113 DQS7_L DQ42 95 C
MEM_MA_DQS_H6 105 90 MEM_MA_DATA41
MEM_MA_DQS_L6 DQS6_H DQ41 MEM_MA_DATA40 MEM_MA_DQS_L0
104 DQS6_L DQ40 89 5 MEM_MA_DQS_L0
MEM_MA_DQS_H5 93 206 MEM_MA_DATA34 5 MEM_MA_DQS_L1 MEM_MA_DQS_L1
DQS5_H DQ39

2
MEM_MA_DQS_L5 92 205 MEM_MA_DATA38 5 MEM_MA_DQS_L2 MEM_MA_DQS_L2
MEM_MA_DQS_H4 DQS5_L DQ38 MEM_MA_DATA37 MEM_MA_DQS_L3
84 DQS4_H DQ37 200 5 MEM_MA_DQS_L3 R4

1
MEM_MA_DQS_L4 83 199 MEM_MA_DATA36 5 MEM_MA_DQS_L4 MEM_MA_DQS_L4 150 1% 0402 C4
MEM_MA_DQS_H3 DQS4_L DQ36 MEM_MA_DATA35 MEM_MA_DQS_L5 1UF 10V Y5V 0402 /NI
37 DQS3_H DQ35 87 5 MEM_MA_DQS_L5
MEM_MA_DQS_L3 36 86 MEM_MA_DATA39 5 MEM_MA_DQS_L6 MEM_MA_DQS_L6 MEM_M_VREF
MEM_MA_DQS_H2 DQS3_L DQ34 MEM_MA_DATA33 MEM_MA_DQS_L7
28 81 5 MEM_MA_DQS_L7

2 1

2
MEM_MA_DQS_L2 DQS2_H DQ33 MEM_MA_DATA32 MEM_MA_DQS_L8
27 DQS2_L DQ32 80 5 MEM_MA_DQS_L8
MEM_MA_DQS_H1 16 159 MEM_MA_DATA27
MEM_MA_DQS_L1 DQS1_H DQ31 MEM_MA_DATA30
15 DQS1_L DQ30 158 R5

1
MEM_MA_DQS_H0 7 153 MEM_MA_DATA24 150 1% 0402 C5
MEM_MA_DQS_L0 DQS0_H DQ29 MEM_MA_DATA28 MEM_MA_DM0 1UF 10V Y5V 0402
6 DQS0_L DQ28 152 5 MEM_MA_DM0
40 MEM_MA_DATA26 5 MEM_MA_DM1 MEM_MA_DM1 PLACE NEAR DIMM SOCKETS
DQ27 MEM_MA_DATA31 MEM_MA_DM2
101 39 5 MEM_MA_DM2

2
SA2 DQ26 MEM_MA_DATA25 MEM_MA_DM3
240 SA1 DQ25 34 5 MEM_MA_DM3
239 33 MEM_MA_DATA29 5 MEM_MA_DM4 MEM_MA_DM4
SA0 DQ24 MEM_MA_DATA23 MEM_MA_DM5
12,18 SMB_MEM_SCL
120 SCL DQ23 150 5 MEM_MA_DM5
119 149 MEM_MA_DATA22 5 MEM_MA_DM6 MEM_MA_DM6
12,18 SMB_MEM_SDA SDA DQ22 MEM_MA_DATA20 MEM_MA_DM7
54 BA2 DQ21 144 5 MEM_MA_DM7
5,10 MEM_MA_BANK2 MEM_MA_DATA16 MEM_MA_DM8
5,10 MEM_MA_BANK1
190 BA1 DQ20 143 5 MEM_MA_DM8
71 31 MEM_MA_DATA19
5,10 MEM_MA_BANK0 BA0 DQ19 MEM_MA_DATA18
5,10 MEM_MA_ADD[15..0] DQ18 30
MEM_MA_ADD15 173 25 MEM_MA_DATA17
MEM_MA_ADD14 A15 DQ17 MEM_MA_DATA21
174 A14 DQ16 24
MEM_MA_ADD13 196 141 MEM_MA_DATA15
MEM_MA_ADD12 A13 DQ15 MEM_MA_DATA14
176 A12 DQ14 140
MEM_MA_ADD11 57 132 MEM_MA_DATA13
B
MEM_MA_ADD10 A11 DQ13 MEM_MA_DATA8 B
70 A10 DQ12 131
MEM_MA_ADD9 177 22 MEM_MA_DATA11
MEM_MA_ADD8 A9 DQ11 MEM_MA_DATA10
179 A8 DQ10 21
MEM_MA_ADD7 58 13 MEM_MA_DATA9
MEM_MA_ADD6 A7 DQ9 MEM_MA_DATA12
180 A6 DQ8 12
MEM_MA_ADD5 60 129 MEM_MA_DATA7
MEM_MA_ADD4 A5 DQ7 MEM_MA_DATA2
61 A4 DQ6 128
MEM_MA_ADD3 182 123 MEM_MA_DATA5
MEM_MA_ADD2 A3 DQ5 MEM_MA_DATA4
63 A2 DQ4 122
MEM_MA_ADD1 183 10 MEM_MA_DATA3
MEM_MA_ADD0 A1 DQ3 MEM_MA_DATA6
188 A0 DQ2 9
MEM_MA_CHECK[7..0] 4 MEM_MA_DATA0
5 MEM_MA_CHECK[7..0] DQ1
MEM_MA_CHECK7 168 3 MEM_MA_DATA1
MEM_MA_CHECK6 CB7 DQ0
167 CB6
MEM_MA_CHECK5 162 73
CB5 WE_L MEM_MA_WE_L 5,10
MEM_MA_CHECK4 161
MEM_MA_CHECK3 CB4
49 CB3 VREF 1 MEM_M_VREF
MEM_MA_CHECK2 48
MEM_MA_CHECK1 CB2
43 CB1 TEST 102
MEM_MA_CHECK0 42 CB0
ODT0 195 MEM_MA0_ODT0 5,10
5,10 MEM_MA0_CLK_H0 185 CK0_H ODT1 77
5,10 MEM_MA0_CLK_L0 186 CK0_L
5,10 MEM_MA0_CLK_H1 137 CK1_H ERR_OUT_L 55
5,10 MEM_MA0_CLK_L1 138 CK1_L PAR_IN 68
5,10 MEM_MA0_CLK_H2 220 CK2_H
5,10 MEM_MA0_CLK_L2 221 CK2_L NC1 19

18 RESET_L
A A
MEM_MA_CKE0 52
5,10 MEM_MA_CKE0 CKE0
171
192
CKE1 ◇BIOSTAR'S PROPRIETARY INFORMATION◆
5,10 MEM_MA_RAS_L RAS_L
5,10 MEM_MA_CAS_L 74 CAS_L
193 ◇Any unauthorized use, reproduction,
5,10 MEM_MA0_CS_L0 S0_L
5,10 MEM_MA0_CS_L1 76 S1_L duplication, or disclosure of this
Title
DDR2-240 PIN-R document will be subject to the
applicable civil and/or criminal DDR DIMMA1
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 11 of 39
5 4 3 2 1
 5 4 3 2 1

+1.8V_SUS
+3.3V

DIMMB1
DIMMB1

172
178
184
187
189
197

170
175
181
191
194

238
D D

53
59
64
67
69

51
56
62
72
75
78
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11

VDDSPD
MEM_MB_DM[8..0] MEM_MB_DATA[0..63]
6 MEM_MB_DM[8..0] MEM_MB_DATA[0..63] 6
MEM_MB_DM8 164 236 MEM_MB_DATA58
DQS17_H DQ63 MEM_MB_DATA62
165 DQS17_L DQ62 235
MEM_MB_DM7 232 230 MEM_MB_DATA60
DQS16_H DQ61 MEM_MB_DATA56
233 DQS16_L DQ60 229
MEM_MB_DM6 223 117 MEM_MB_DATA59
DQS15_H DQ59 MEM_MB_DATA63
224 DQS15_L DQ58 116
MEM_MB_DM5 211 111 MEM_MB_DATA57
DQS14_H DQ57 MEM_MB_DATA61
212 DQS14_L DQ56 110
MEM_MB_DM4 202 227 MEM_MB_DATA51
DQS13_H DQ55 MEM_MB_DATA54
203 DQS13_L DQ54 226
MEM_MB_DM3 155 218 MEM_MB_DATA49
DQS12_H DQ53 MEM_MB_DATA52
156 DQS12_L DQ52 217
MEM_MB_DM2 146 108 MEM_MB_DATA55
DQS11_H DQ51 MEM_MB_DATA50
147 DQS11_L DQ50 107
MEM_MB_DM1 134 99 MEM_MB_DATA48
DQS10_H DQ49 MEM_MB_DATA53
135 DQS10_L DQ48 98
MEM_MB_DM0 125 215 MEM_MB_DATA46
MEM_MB_DQS_H[8..0] DQS9_H DQ47 MEM_MB_DATA47
6 MEM_MB_DQS_H[8..0] 126 DQS9_L DQ46 214
MEM_MB_DQS_H8 46 209 MEM_MB_DATA45
MEM_MB_DQS_L8 DQS8_H DQ45 MEM_MB_DATA44
45 DQS8_L DQ44 208
MEM_MB_DQS_H7 114 96 MEM_MB_DATA42
MEM_MB_DQS_L7 DQS7_H DQ43 MEM_MB_DATA43
113 DQS7_L DQ42 95
MEM_MB_DQS_H6 105 90 MEM_MB_DATA41
MEM_MB_DQS_L6 DQS6_H DQ41 MEM_MB_DATA40
C 104 DQS6_L DQ40 89 C
MEM_MB_DQS_H5 93 206 MEM_MB_DATA39
MEM_MB_DQS_L5 DQS5_H DQ39 MEM_MB_DATA38
92 DQS5_L DQ38 205
MEM_MB_DQS_H4 84 200 MEM_MB_DATA37
MEM_MB_DQS_L4 DQS4_H DQ37 MEM_MB_DATA36
83 DQS4_L DQ36 199
MEM_MB_DQS_H3 37 87 MEM_MB_DATA35
MEM_MB_DQS_L3 DQS3_H DQ35 MEM_MB_DATA34
36 DQS3_L DQ34 86
MEM_MB_DQS_H2 28 81 MEM_MB_DATA32
MEM_MB_DQS_L2 DQS2_H DQ33 MEM_MB_DATA33
27 DQS2_L DQ32 80
MEM_MB_DQS_H1 16 159 MEM_MB_DATA31
MEM_MB_DQS_L1 DQS1_H DQ31 MEM_MB_DATA30
15 DQS1_L DQ30 158
MEM_MB_DQS_H0 7 153 MEM_MB_DATA25
MEM_MB_DQS_L0 DQS0_H DQ29 MEM_MB_DATA28
6 DQS0_L DQ28 152
MEM_MB_DQS_L[8..0] 40 MEM_MB_DATA27
6 MEM_MB_DQS_L[8..0] DQ27
101 39 MEM_MB_DATA26
SA2 DQ26 MEM_MB_DATA24
240 SA1 DQ25 34
239 33 MEM_MB_DATA29
+3.3V SA0 DQ24
120 150 MEM_MB_DATA23
11,18 SMB_MEM_SCL SCL DQ23 MEM_MB_DATA22
119 SDA DQ22 149
11,18 SMB_MEM_SDA MEM_MB_DATA16
6,10 MEM_MB_BANK2 54 BA2 DQ21 144
190 143 MEM_MB_DATA20
6,10 MEM_MB_BANK1 BA1 DQ20 MEM_MB_DATA19
6,10 MEM_MB_BANK0 71 BA0 DQ19 31
MEM_MB_ADD[15..0] 30 MEM_MB_DATA18
6,10 MEM_MB_ADD[15..0] DQ18
MEM_MB_ADD15 173 25 MEM_MB_DATA17
MEM_MB_ADD14 A15 DQ17 MEM_MB_DATA21
174 A14 DQ16 24
MEM_MB_ADD13 196 141 MEM_MB_DATA15
MEM_MB_ADD12 A13 DQ15 MEM_MB_DATA14
176 A12 DQ14 140
MEM_MB_ADD11 57 132 MEM_MB_DATA13
MEM_MB_ADD10 A11 DQ13 MEM_MB_DATA12
70 A10 DQ12 131
MEM_MB_ADD9 177 22 MEM_MB_DATA11
B
MEM_MB_ADD8 A9 DQ11 MEM_MB_DATA10 B
179 A8 DQ10 21
MEM_MB_ADD7 58 13 MEM_MB_DATA9
MEM_MB_ADD6 A7 DQ9 MEM_MB_DATA8
180 A6 DQ8 12
MEM_MB_ADD5 60 129 MEM_MB_DATA7
MEM_MB_ADD4 A5 DQ7 MEM_MB_DATA6
61 A4 DQ6 128
MEM_MB_ADD3 182 123 MEM_MB_DATA5
MEM_MB_ADD2 A3 DQ5 MEM_MB_DATA4
63 A2 DQ4 122
MEM_MB_ADD1 183 10 MEM_MB_DATA2
MEM_MB_ADD0 A1 DQ3 MEM_MB_DATA3
188 A0 DQ2 9
MEM_MB_CHECK[7..0] 4 MEM_MB_DATA1
6 MEM_MB_CHECK[7..0] DQ1
MEM_MB_CHECK7 168 3 MEM_MB_DATA0
MEM_MB_CHECK6 CB7 DQ0
167 CB6
MEM_MB_CHECK5 162 73
MEM_MB_CHECK4 CB5 WE_L MEM_MB_WE_L 6,10
161 MEM_M_VREF
MEM_MB_CHECK3 CB4
49 CB3 VREF 1
MEM_MB_CHECK2 48
MEM_MB_CHECK1 CB2
43 CB1 TEST 102

1
MEM_MB_CHECK0 42 C6
CB0 0.1UF 16V Y5V 0402
ODT0 195 MEM_MB0_ODT0 6,10
6,10 MEM_MB0_CLK_H0 185 CK0_H ODT1 77 PLACE NEAR DIMM SOCKETS
6,10 MEM_MB0_CLK_L0 186

2
CK0_L
6,10 MEM_MB0_CLK_H1 137 CK1_H ERR_OUT_L 55
6,10 MEM_MB0_CLK_L1 138 CK1_L PAR_IN 68
6,10 MEM_MB0_CLK_H2 220 CK2_H
6,10 MEM_MB0_CLK_L2 221 CK2_L NC1 19

18 RESET_L

6,10 MEM_MB_CKE0 52 CKE0

A 171 CKE1
A
6,10 MEM_MB_RAS_L 192 RAS_L
74
6,10 MEM_MB_CAS_L CAS_L ◇BIOSTAR'S PROPRIETARY INFORMATION◆
6,10 MEM_MB0_CS_L0 193 S0_L
76
6,10 MEM_MB0_CS_L1 S1_L ◇Any unauthorized use, reproduction,
DDR2-240 PIN-R duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal DDR DIMMB1
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 12 of 39
5 4 3 2 1
 5 4 3 2 1

U6H MCP68S A3
BGA-692_R
MCP68S
XXXX-XXXX-XXXX
HTCPU_DWN[15..0] SEC 1 OF 8 HTCPU_UP[15..0]
5 HTCPU_DWN[15..0] HTCPU_DWN0 HTCPU_UP0 HTCPU_UP[15..0] 5
AG8 HT_MCP_RXD0_P HT_MCP_TXD0_P AH23
HTCPU_DWN1 AG9 HT_MCP_RXD1_P HT_MCP_TXD1_P AH22 HTCPU_UP1
HTCPU_DWN2 AK9 HT_MCP_RXD2_P HT_MCP_TXD2_P AJ21 HTCPU_UP2
HTCPU_DWN3 AJ10 HT_MCP_RXD3_P HT_MCP_TXD3_P AH21 HTCPU_UP3
HTCPU_DWN4 AG12 HT_MCP_RXD4_P HT_MCP_TXD4_P AH19 HTCPU_UP4
HTCPU_DWN5 AG13 HT_MCP_RXD5_P HT_MCP_TXD5_P AH18 HTCPU_UP5
HTCPU_DWN6 AK13 HT_MCP_RXD6_P HT_MCP_TXD6_P AJ17 HTCPU_UP6
HTCPU_DWN7 AJ14 HT_MCP_RXD7_P HT_MCP_TXD7_P AH17 HTCPU_UP7
D D
HTCPU_DWN8 AB10 HT_MCP_RXD8_P HT_MCP_TXD8_P AF22 HTCPU_UP8
HTCPU_DWN9 AD10 HT_MCP_RXD9_P HT_MCP_TXD9_P AB20 HTCPU_UP9
HTCPU_DWN10 AF10 HT_MCP_RXD10_P HT_MCP_TXD10_P AC20 HTCPU_UP10
HTCPU_DWN11 AC12 HT_MCP_RXD11_P HT_MCP_TXD11_P AE20 HTCPU_UP11
HTCPU_DWN12 AB11 HT_MCP_RXD12_P HT_MCP_TXD12_P AD18 HTCPU_UP12
HTCPU_DWN13 AB13 HT_MCP_RXD13_P HT_MCP_TXD13_P AF18 HTCPU_UP13
HTCPU_DWN14 AF14 HT_MCP_RXD14_P HT_MCP_TXD14_P AB17 HTCPU_UP14
HTCPU_DWN15 AE14 HT_MCP_RXD15_P HT_MCP_TXD15_P AC16 HTCPU_UP15

HTCPU_DWN_[15..0] HTCPU_UP_[15..0]
5 HTCPU_DWN_[15..0] HTCPU_UP_[15..0] 5
HTCPU_DWN_0 AH8 HT_MCP_RXD0_N HT_MCP_TXD0_N AJ23 HTCPU_UP_0
HTCPU_DWN_1 AH9 HT_MCP_RXD1_N HT_MCP_TXD1_N AJ22 HTCPU_UP_1
HTCPU_DWN_2 AJ9 HT_MCP_RXD2_N HT_MCP_TXD2_N AK21 HTCPU_UP_2
HTCPU_DWN_3 AH10 HT_MCP_RXD3_N HT_MCP_TXD3_N AG21 HTCPU_UP_3
HTCPU_DWN_4 AH12 HT_MCP_RXD4_N HT_MCP_TXD4_N AJ19 HTCPU_UP_4
HTCPU_DWN_5 AH13 HT_MCP_RXD5_N HT_MCP_TXD5_N AJ18 HTCPU_UP_5
HTCPU_DWN_6 AJ13 HT_MCP_RXD6_N HT_MCP_TXD6_N AK17 HTCPU_UP_6
HTCPU_DWN_7 AH14 HT_MCP_RXD7_N HT_MCP_TXD7_N AG17 HTCPU_UP_7
HTCPU_DWN_8 AC10 HT_MCP_RXD8_N HT_MCP_TXD8_N AG22 HTCPU_UP_8
HTCPU_DWN_9 AE10 HT_MCP_RXD9_N HT_MCP_TXD9_N AB19 HTCPU_UP_9
HTCPU_DWN_10 AG10 HT_MCP_RXD10_N HT_MCP_TXD10_N AD20 HTCPU_UP_10
HTCPU_DWN_11 AD12 HT_MCP_RXD11_N HT_MCP_TXD11_N AF20 HTCPU_UP_11
HTCPU_DWN_12 AC11 HT_MCP_RXD12_N HT_MCP_TXD12_N AE18 HTCPU_UP_12
HTCPU_DWN_13 AB12 HT_MCP_RXD13_N HT_MCP_TXD13_N AG18 HTCPU_UP_13
HTCPU_DWN_14 AG14 HT_MCP_RXD14_N HT_MCP_TXD14_N AB16 HTCPU_UP_14
HTCPU_DWN_15 AD14 HT_MCP_RXD15_N HT_MCP_TXD15_N AD16 HTCPU_UP_15

HTCPU_DWNCLK0 AJ11 HT_MCP_RX_CLK0_P HT_MCP_TX_CLK0_P AH20 HTCPU_UPCLK0

5 HTCPU_DWNCLK0 HTCPU_UPCLK0 5
C HTCPU_DWNCLK0_ AH11 HT_MCP_RX_CLK0_N HT_MCP_TX_CLK0_N AG20 HTCPU_UPCLK0_ C
5 HTCPU_DWNCLK0_ HTCPU_UPCLK0_ 5
HTCPU_DWNCLK1 AE12 HT_MCP_RX_CLK1_P HT_MCP_TX_CLK1_P AC18 HTCPU_UPCLK1
5 HTCPU_DWNCLK1 HTCPU_UPCLK1 5
HTCPU_DWNCLK1_ AF12 HT_MCP_RX_CLK1_N HT_MCP_TX_CLK1_N AB18 HTCPU_UPCLK1_
5 HTCPU_DWNCLK1_ HTCPU_UPCLK1_ 5

HTCPU_DWNCNTL AJ15 HT_MCP_RXCTL0_P HT_MCP_TXCTL0_P AH16 HTCPU_UPCNTL

5 HTCPU_DWNCNTL HTCPU_UPCNTL 5
HTCPU_DWNCNTL_ AH15 HT_MCP_RXCTL0_N HT_MCP_TXCTL0_N AG16 HTCPU_UPCNTL_
5 HTCPU_DWNCNTL_ HTCPU_UPCNTL_ 5
AB14 RESERVED RESERVED AE16 HTCPU_UPCNTL1
5 HTCPU_DWNCNTL1 HTCPU_UPCNTL1 5
AC14 RESERVED RESERVED AF16 HTCPU_UPCNTL1_
5 HTCPU_DWNCNTL1_ HTCPU_UPCNTL1_ 5
HT_MCP_REQ* AH25 HTCPU_REQ_ R85 10K 0402
+3.3V
150 1% 0402 HT_MCP_STOP* AH24 HTCPU_STOP_
HTCPU_STOP_ 7
BR6 HTMCP_COMP_VDD AB9 HT_MCP_COMP_VDD HT_MCP_RST* AG23 HTCPU_RST_
+1.2V HTCPU_RST_ 7
HT_MCP_PWRGD AG24 HTCPU_PWRGD
HTCPU_PWRGD 7
R91 HTMCP_COMP_GND AB8 HT_MCP_COMP_GND
150 1% 0402
CLKOUT_200MHZ_P AK25 CPU_CLK_L+ CLK200MHZ_TERMP_GND
CPU_CLK 7
CLKOUT_200MHZ_N AJ25 CPU_CLK_L-
CPU_CLK_ 7
AD8 PROCHOT*/GPIO20
MCP61/65 STUFF 2.37K
7 PROCHOT
AE8 THERMTRIP*/GPIO58
7 CPU_THERMTRIP_
FB15 MCP68 EMPTY
BEAD 60 0805 1A CPU_SBVREF AF24 +1.2V
+1.2V_PLLCPUHT AC15 +1.2V_PLL_CPU_HT
+1.2V
FB16 +3.3V_PLLCPU AB15 +3.3V_PLL_CPU CLKOUT_25MHZ AK26 BC59 0.1UF 16V Y5V 0402
+3.3V
BEAD 60 0805 1A 2.37K 1% 0402
BC53 CLK200_TERM_GND AJ26 CLK200_TERM_GND R87
1UF 10V Y5V 0402 BC51
BC139 I134 APP
B B
10UF 10V 0805 Y5V C146
0.1UF 16V Y5V 0402 1UF 10V Y5V 0402
NOTE
APP
C164
10UF 10V 0805 Y5V
NOTE

MCP68 EMPTY

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal C68S (1&2) OF 6
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 13 of 39
5 4 3 2 1
 5 4 3 2 1

U6A MCP68S A3
BGA-692_R
MCP68S
XXXX-XXXX-XXXX
SEC 2 OF 8 PE0_OUT[15..0]
PE0_OUT[15..0] 22
PE0_IN0 H23 PE0_RX0_P PE0_TX0_P G29 PE0_OUT0
22 PE0_IN0 PE0_IN1 PE0_OUT1
H25 PE0_RX1_P PE0_TX1_P H27
22 PE0_IN1 PE0_IN2 PE0_OUT2
22 PE0_IN2
K22 PE0_RX2_P PE0_TX2_P J27
PE0_IN3 K24 PE0_RX3_P PE0_TX3_P J30 PE0_OUT3
D 22 PE0_IN3 PE0_IN4 PE0_OUT4 D
K26 PE0_RX4_P PE0_TX4_P K29
22 PE0_IN4 PE0_IN5 PE0_OUT5
22 PE0_IN5
M22 PE0_RX5_P PE0_TX5_P L29
PE0_IN6 M23 PE0_RX6_P PE0_TX6_P M27 PE0_OUT6
22 PE0_IN6 PE0_IN7 PE0_OUT7
22 PE0_IN7 M26 PE0_RX7_P PE0_TX7_P N27
P22 PE0_RX8_P PE0_TX8_P N30 PE0_OUT8
22 PE0_IN8 PE0_OUT9
P26 PE0_RX9_P PE0_TX9_P P29
22 PE0_IN9 PE0_OUT10
22 PE0_IN10 P25 PE0_RX10_P PE0_TX10_P R29
T23 PE0_RX11_P PE0_TX11_P T27 PE0_OUT11
22 PE0_IN11 PE0_OUT12
22 PE0_IN12
T26 PE0_RX12_P PE0_TX12_P U27
U23 PE0_RX13_P PE0_TX13_P U30 PE0_OUT13
22 PE0_IN13 PE0_OUT14
V24 PE0_RX14_P PE0_TX14_P V29
22 PE0_IN14 PE0_OUT15
22 PE0_IN15
V27 PE0_RX15_P PE0_TX15_P W29
PE0_OUT_[15..0]
PE0_OUT_[15..0] 22
PE0_IN_0 H24 PE0_RX0_N PE0_TX0_N G28 PE0_OUT_0
22 PE0_IN_0 PE0_IN_1 PE0_OUT_1
H26 PE0_RX1_N PE0_TX1_N H28
22 PE0_IN_1 PE0_IN_2 PE0_OUT_2
22 PE0_IN_2 K23 PE0_RX2_N PE0_TX2_N J28
PE0_IN_3 K25 PE0_RX3_N PE0_TX3_N J29 PE0_OUT_3
22 PE0_IN_3 PE0_IN_4 PE0_OUT_4
22 PE0_IN_4
K27 PE0_RX4_N PE0_TX4_N K28
PE0_IN_5 L22 PE0_RX5_N PE0_TX5_N L28 PE0_OUT_5
22 PE0_IN_5 PE0_IN_6 PE0_OUT_6
M24 PE0_RX6_N PE0_TX6_N M28
22 PE0_IN_6 PE0_IN_7 PE0_OUT_7
22 PE0_IN_7
M25 PE0_RX7_N PE0_TX7_N N28
P23 PE0_RX8_N PE0_TX8_N N29 PE0_OUT_8
22 PE0_IN_8 PE0_OUT_9
22 PE0_IN_9
P27 PE0_RX9_N PE0_TX9_N P28
P24 PE0_RX10_N PE0_TX10_N R28 PE0_OUT_10
22 PE0_IN_10 PE0_OUT_11
T24 PE0_RX11_N PE0_TX11_N T28
22 PE0_IN_11 PE0_OUT_12
22 PE0_IN_12
T25 PE0_RX12_N PE0_TX12_N U28
V23 PE0_RX13_N PE0_TX13_N U29 PE0_OUT_13
22 PE0_IN_13 PE0_OUT_14
22 PE0_IN_14 V25 PE0_RX14_N PE0_TX14_N V28
C V26 PE0_RX15_N PE0_TX15_N W28 PE0_OUT_15 C
22 PE0_IN_15

B22 PE_WAKE*/GPIO21 PE0_REFCLK_P Y24 PE0_REFCLK

22 PE_WAKE_ PE0_REFCLK 22
PE0_REFCLK_N Y23 PE0_REFCLK_
PE0_REFCLK_ 22
AF29 PE0_PRSNTX16*
22 PE0_PRSNTX16

W22 +1.2V_PLL_PE_SS PE_RESET* AH29 PE_RESET_

PE_RESET_ 22
+1.2V 1.2V_PLL_PE_SS Y22 +1.2V_PLL_PE_SS

C163 BC52 PE_CLK_COMP AJ30 PE_COMP R96 2.37K 1% 0402

10UF 10V 0805 Y5V
0.1UF 16V Y5V 0402
U22 +1.2V_PLL_PE +3.3V_PLL_PE_SS R22
+1.2V FB12 +1.2V_PLL_PE V22 +1.2V_PLL_PE +3.3V_PLL_PE_SS T22 +3.3V_PLL_PE_SS BF1 +3.3V
BEAD 60 0805 1A BEAD 60 0603
I107
C167 C154 BC80 BC57
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402

B B

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal C68S (3&4) OF 6
Size Document Number Rev
penalties.◆ Custom N68SA-M2S 6.2

Date: Thursday, June 03, 2010 Sheet 14 of 39

5 4 3 2 1
 5 4 3 2 1

PLACE WITHIN
0.7" OF NB BALLS

U6B MCP68S A3
BGA-692_R
MCP68S
XXXX-XXXX-XXXX
SEC 3 OF 8
Y28 PE1_RX_P PE1_TX_P AA28
D
Y27 PE1_RX_N PE1_TX_N AA27 D
AB29 PE2_RX_P PE2_TX_P AA30
AB28 PE2_RX_N PE2_TX_N AA29
AD27 PE3_RX_P PE3_TX_P AC29
AD28 PE3_RX_N PE3_TX_N AC28

AK29 PEA_CLKREQ*/GPIO51 PE1_REFCLK_P Y26

PE1_REFCLK_N Y25
AG28 PE1_PRSNT* PE2_REFCLK_P AB23
AG30 PE2_PRSNT* PE2_REFCLK_N AA23
AG29 PE3_PRSNT* PE3_REFCLK_P AB24
PE3_REFCLK_N AB25
RN27
0 8P4R 0402 DVI section Layout guideline:
RGMII_RXD0 D26 RGMII_RXD0/MII_RXD0 RGMII_TXD0/MII_TXD0 A28 8 7 1. Place C200 within 0.1" of balls.
36 RGMII_RXD0 RGMII_TXD0 36
RGMII_RXD1 E26 RGMII_RXD1/MII_RXD1 RGMII_TXD1/MII_TXD1 B28 6 5 2. If C200 placed at bottom side, use two vias for power side.
36 RGMII_RXD1 RGMII_TXD1 36
RGMII_RXD2 B26 RGMII_RXD2/MII_RXD2 RGMII_TXD2/MII_TXD2 D28 4 3 3. Each LVSSR ball should connect to GND
36 RGMII_RXD2 RGMII_RXD3 RGMII_TXD2 36
36 RGMII_RXD3 B27 RGMII_RXD3/MII_RXD3 RGMII_TXD3/MII_TXD3 E27 2 1 RGMII_TXD3 36 through seperated via.
BR19 10K 1% 0402 /NIMII_INTR RGMII_RXCLK A26 RGMII_RXC/MII_RXCLK RGMII_TXC/MII_TXCLK D27 4. LPVSS connect to GND through dedicated via.
36 RGMII_RXCLK RGMII_TXCLK 36
RGMII_RXCTL C26 RGMII_RXCTL/MII_RXDV RGMII_TXCTL/MII_TXEN E28 BR32 0 0402
36 RGMII_RXCTL RGMII_TXCTL 36

D24 MII_RXER/GPIO36 RGMII/MII_MDC B25 RGMII_MDC 36

36 MII_RXER
36 MII_COL E24 MII_COL/GPIO13/MI2C_DATA RGMII/MII_MDIO A25 RGMII_MDIO 36
36 MII_CRS F23 MII_CRS/GPIO14/MI2C_CLK
RGMII/MII_PWRDWN*/GPIO37 F24 APP
+3.3V_DUAL BR30 10K 1% 0402 MII_INTR G24 RGMII/MII_INTR*/GPIO35
BUF_25MHZ_R R112 22 0402
NOTE
BUF_25MHZ C24 BUF_25M 36
M9 +3.3V_PLL_MAC_DUAL R111 4.7K 0402
+3.3V_DUAL R120
C MII_RESET*/GPIO12 C25 C
49.9 1% 0402 BR31 1.5K 1% 0402 R1 +3.3V_DUAL RGMII_RESET_ 36
BC62 MII_COMP_3P3V B23 MII_COMP_3P3V MII_VREF C27 RGMII_VREF BR20 1.5K 1% 0402 R2
+3.3V_DUAL
1UF 10V Y5V 0402 MII_COMP_GND C23 MII_COMP_GND BC77 1UF 10V Y5V 0402
BR18 GMII/MII-->R1-->1.47K R2-->1.47K
49.9 1% 0402 PCI LAN-->R1--> /NI R2-->10K
HDMI_TXD0_P AC25
HDMI_TXD0_N AC24
HDMI_TXD1_P AC26
AE29 HDMI_DDC_CLK HDMI_TXD1_N AC27
R127 0 0402 AE30 HDMI_DDC_DATA HDMI_TXD2_P AB26
22 PE0_PRSNTX4
HDMI_TXD2_N AB27
HDCP_ROM_SCLK AF28 HDCP_ROM_SCLK
HDCP_ROM_SDATA AF30 HDCP_ROM_SDATA
R134 0 0402 HDMI_TXC0_P AE27
22 PE0_PRSNTX8
AE26 +3.3V_HDMI HDMI_TXC0_N AE28
AF27 +3.3V_HDMI_PLL_HVDD

HPLUG_DET3 AH30
R137 0 0402
22 PE0_PRSNTX1
HDMI_RSET AJ29

DDC_CLK/GPIO17 B6 DDC_CLK 26
BFB5 DDC_DATA/GPIO19 A6 DDC_DATA 26
BFB4
BEAD 60 0603 BFB3 DAC RED D30 DAC_RED JTAG_TCK M7 BR10 10K 1% 0402
26 DAC_RED BEAD 60 0603 DAC GREEN
26 DAC_GREEN
D29 DAC_GREEN JTAG_TDI M5
BEAD 60 0603 DAC BLUE C30 DAC_BLUE JTAG_TDO M6
26 DAC_BLUE
B
PLACE ON CLOSE CHIP < 600 mil JTAG_TMS M8 B
DAC_RED JTAG_TRST* L9
DAC_HSYNC B30 DAC_HSYNC
DAC_GREEN 26 DAC_HSYNC DAC_VSYNC
26 DAC_VSYNC C29 DAC_VSYNC
TV_XTALIN D5
DAC_BLUE TV_XTALOUT E5
R118 124 1% 0402 DACRSET B29 DAC_RSET X1
C179 DACVREF A29 DAC_VREF XTALIN K7 XTALIN
0.01UF 25V X7R 0402 XTALOUT K8 XTALOUT
BR23 BR22 BR21 25MHZ 20PF 30PPM
150 1% 0402 150 1% 0402 150 1% 0402 XTALIN_RTC K6 XTALIN_RTC
XTALOUT_RTC K5 XTALOUT_RTC BC73 BC74
+3.3V BFB2 3P3V_DAC F28 +3.3V_DAC 15P 50V NPO 0402
INDUCTOR 1UH 0805 X2 15P 50V NPO 0402
10UF 10V 0805 Y5V BC71
DAC RED BC70 0.1UF 16V Y5V 0402 I508
DAC GREEN 32.768KHZ 12.5PF 20PPM
DAC BLUE C185 C189
15P 50V NPO 0402

C177 C175 C174 15P 50V NPO 0402

10P 50V NPO 0402
10P 50V NPO 0402
10P 50V NPO 0402

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal C68S 3/8
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 15 of 39
5 4 3 2 1
 5 4 3 2 1

U6C MCP68S A3
BGA-692_R
MCP68S
D PCI_AD[31..0] XXXX-XXXX-XXXX D
20 PCI_AD[31..0]
PCI_AD0 D14 PCI_AD0 SEC 4 OF 8 PCI_REQ0* G12 PCI_REQ_0
PCI_REQ_0 20
PCI_AD1 E14 PCI_AD1 PCI_REQ1* A10 PCI_REQ_1
PCI_REQ_1 20
PCI_AD2 A13 PCI_AD2 PCI_REQ2*/GPIO40/RS232_DSR* C11 PCI_REQ_2
PCI_REQ_2 20
PCI_AD3 C14 PCI_AD3 PCI_REQ3*/GPIO38/RS232_CTS* H14 PCI_REQ_3
PCI_REQ_3 20
PCI_AD4 A14 PCI_AD4 PCI_REQ4*/GPIO52/RS232_SIN* D13 PCI_REQ_4
PCI_REQ_4 20
PCI_AD5 B14 PCI_AD5
PCI_AD6 C15 PCI_AD6
PCI_AD7 J16 PCI_AD7
PCI_AD8 G16 PCI_AD8 PCI_GNT0* A9 PCI_GNT_0
PCI_GNT_0 20
PCI_AD9 F16 PCI_AD9 PCI_GNT1* C10 PCI_GNT_1
PCI_GNT_1 20
PCI_AD10 E16 PCI_AD10 PCI_GNT2*/GPIO41/RS232_DTR* B10 PCI_GNT_2
PCI_GNT_2 20
PCI_AD11 B15 PCI_AD11 PCI_GNT3*/GPIO39/RS232_RTS* J14 PCI_GNT_3
PCI_GNT_3 20
PCI_AD12 D16 PCI_AD12 PCI_GNT4*/GPIO53/RS232_SOUT* C12 PCI_GNT_4
PCI_GNT_4 20
PCI_AD13 C16 PCI_AD13
PCI_AD14 D17 PCI_AD14
PCI_AD15 C17 PCI_AD15
PCI_AD16 J19 PCI_AD16 PCI_INTW* C22 PCI_INTW_
PCI_INTW_ 20
PCI_AD17 J20 PCI_AD17 PCI_INTX* D22 PCI_INTX_
PCI_INTX_ 20
PCI_AD18 H20 PCI_AD18 PCI_INTY* A22 PCI_INTY_
PCI_AD19 PCI_INTZ_ PCI_INTY_ 20
G20 PCI_AD19 PCI_INTZ* A21 PCI_INTZ_ 20
PCI_AD20 F20 PCI_AD20
PCI_AD21 E20 PCI_AD21
PCI_AD22 B18 PCI_AD22
PCI_AD23 C19 PCI_AD23 PCI_CLK0 B13 PCI_CLK0 R113 22 0402
PCI_AD24 PCI_CLK1 BR17 PCI_CLKSLOT1 20
D20 PCI_AD24 PCI_CLK1 F14 22 0402
PCI_CLKSLOT2 20
PCI_AD25 C20 PCI_AD25 PCI_CLK2 D12 PCI_CLK2 BTP_PCI_CLK2
PCI_AD26 D21 PCI_AD26 PCI_CLK3 E12 PCI_CLK3 BTP_PCI_CLK1
PCI_AD27 C21 PCI_AD27 PCI_CLK4 H12 PCI_CLK4 BR29 22 0402 FOR EMI
C PCI_AD28 B21 PCI_AD28 C
PCI_AD29 H22 PCI_AD29
PCI_AD30 G22 PCI_AD30 PCI_CLKIN J12 PCI_CLKIN
PCI_AD31 F22 PCI_AD31 PCI_CLKSLOT1 C183 10P 50V NPO 0402 /NI
PCI_CLKSLOT2 BC78 10P 50V NPO 0402 /NI
PCI_C/BE_[3..0] PCI_CLK4 BC76 10P 50V NPO 0402 /NI
20 PCI_C/BE_[3..0]
PCI_C/BE_0 H16 PCI_CBE0*
PCI_C/BE_1 B17 PCI_CBE1*
PCI_C/BE_2 A18 PCI_CBE2*
PCI_C/BE_3 B19 PCI_CBE3*

PCI_FRAME_ C18 PCI_FRAME*

20 PCI_FRAME_
PCI_IRDY_ A17 PCI_IRDY*
20 PCI_IRDY_
PCI_TRDY_ D18 PCI_TRDY* LPC_AD0 G10 LPCAD0 BR26 22 0402 LPC_AD0
20 PCI_TRDY_ LPC_AD0 33
PCI_STOP_ F18 PCI_STOP* LPC_AD1 F10 LPCAD1 BR27 22 0402 LPC_AD1
20 PCI_STOP_ LPC_AD1 33
PCI_DEVSEL_ E18 PCI_DEVSEL* LPC_AD2 D10 LPCAD2 BR16 22 0402 LPC_AD2 LPC_AD2 33
20 PCI_DEVSEL_
PCI_PAR J18 PCI_PAR LPC_AD3 E10 LPCAD3 BR28 22 0402 LPC_AD3
20 PCI_PAR LPC_AD3 33
PCI_PERR_ G18 PCI_PERR*/GPIO43/RS232_DCD*
20 PCI_PERR_
PCI_SERR_ H18 PCI_SERR*
20 PCI_SERR_
PCI_PME_ E22 PCI_PME*/GPIO30
20 PCI_PME_
LPC_PWRDWN*/GPIO54/EXT_NMI* C8 TP_LPCPWRDWN_
BTP_LPCPWRDWN_1
LPC_FRAME* H10 LPC_FRAME_L BR14 22 0402
LPC_FRAME_ 33
LPC_DRQ0*/GPIO50 C9 LPC_DRQ0_
LPC_DRQ0_ 33
LPC_DRQ1*/GPIO15/FANRPM1 B9 LPC_DRQ1_ R115 8.2K 0402 /NI
PCI_RESET0_ LPC_SERIRQ +3.3V
C13 PCI_RESET0* LPC_SERIRQ J10 LPC_SERIRQ 33
PCI_RESET1_ G14 PCI_RESET1* BR25 10K 1% 0402 /NI +3.3V_DUAL
B B
B11 PCI_RESET2* BR15 10K 1% 0402
HDA_SDOUT 18
PCI_RESET3_ F12 PCI_RESET3* LPC_CLK0 E8 LPC_CLK0 BR24 22 0402 LPC_FRAME
LPCCLK_SIO 33
APP NOTE
LPC_RESET_ D9 LPC_RESET* 0 0 = LPC BIOS 1-2 DEFAULT
RN38 LPC_CLK1 D8 BC75 10P 50V NPO 0402 /NI 0 1 = PCI BIOS 2-3
1 2 PCI_RESET1_ 1 0 = SPI BIOS 1-2
20 PCIRST_SLOT2_ I150 EMI
3 4 1 1 = RESERVED
5 6 PCI_RESET3_
23 PCIRST_IDE_
7 8 PCI_RESET0_ C21
20 PCIRST_SLOT1_
33 8P4R 0402 10P 50V NPO 0402 /NI
R116 33 0402LPC_RESET_
33 LPCRST_SIO_

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal MCP68S (1&2) OF 7
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 16 of 39
5 4 3 2 1
 5 4 3 2 1

U6D MCP68S A3
BGA-692_R
D MCP68S D

H1 SATA1 SATA CONNECTOR-R XXXX-XXXX-XXXX

1 SEC 5 OF 8 IDE_PDD[15..0]
IDE_PDD[15..0] 23
2 SATA_A0_TX_P_C C258 0.01UF 25V X7R 0402 SATA_A0_TX_P V2 SATA_A0_TX_P IDE_DATA_P0 AJ3 IDE_PDD0
3 SATA_A0_TX_N_C C259 0.01UF 25V X7R 0402 SATA_A0_TX_N V1 SATA_A0_TX_N IDE_DATA_P1 AJ2 IDE_PDD1
4 IDE_DATA_P2 AH3 IDE_PDD2
5 SATA_A0_RX_N_C C260 0.01UF 25V X7R 0402 SATA_A0_RX_N W3 SATA_A0_RX_N IDE_DATA_P3 AH1 IDE_PDD3
6 SATA_A0_RX_P_C C261 0.01UF 25V X7R 0402 SATA_A0_RX_P W2 SATA_A0_RX_P IDE_DATA_P4 AG2 IDE_PDD4
7 IDE_DATA_P5 AF2 IDE_PDD5
H2 IDE_DATA_P6 AF4 IDE_PDD6
H1 SATA2 SATA CONNECTOR-R IDE_DATA_P7 AE6 IDE_PDD7
1 IDE_DATA_P8 AE5 IDE_PDD8
2 SATA_A1_TX_P_C C254 0.01UF 25V X7R 0402 SATA_A1_TX_P Y8 SATA_A1_TX_P IDE_DATA_P9 AF5 IDE_PDD9
3 SATA_A1_TX_N_C C255 0.01UF 25V X7R 0402 SATA_A1_TX_N Y7 SATA_A1_TX_N IDE_DATA_P10 AF3 IDE_PDD10
4 IDE_DATA_P11 AG1 IDE_PDD11
5 SATA_A1_RX_N_C C256 0.01UF 25V X7R 0402 SATA_A1_RX_N Y5 SATA_A1_RX_N IDE_DATA_P12 AG3 IDE_PDD12
6 SATA_A1_RX_P_C C257 0.01UF 25V X7R 0402 SATA_A1_RX_P Y6 SATA_A1_RX_P IDE_DATA_P13 AH2 IDE_PDD13
7 IDE_DATA_P14 AJ1 IDE_PDD14
H2 SATA3 SATA CONNECTOR-R IDE_DATA_P15 AK2 IDE_PDD15
H1
1 IDE_ADDR_P0 AG6 IDE_ADDR_P0
IDE_ADDR_P0 23
2 SATA_B0_TX_P_C C262 0.01UF 25V X7R 0402 SATA_B0_TX_P Y4 SATA_B0_TX_P IDE_ADDR_P1 AJ5 IDE_ADDR_P1
SATA_B0_TX_N_C IDE_ADDR_P1 23
3 C263 0.01UF 25V X7R 0402 SATA_B0_TX_N Y3 SATA_B0_TX_N IDE_ADDR_P2 AH6 IDE_ADDR_P2
IDE_ADDR_P2 23
4
5 SATA_B0_RX_N_C C264 0.01UF 25V X7R 0402 SATA_B0_RX_N AA4 SATA_B0_RX_N IDE_CS1_P* AK6 IDE_CS1_P_
SATA_B0_RX_P_C C265 0.01UF 25V X7R 0402 SATA_B0_RX_P AA3 IDE_CS3_P_ IDE_CS1_P_ 23
6 SATA_B0_RX_P IDE_CS3_P* AJ6 IDE_CS3_P_ 23
7 IDE_DACK_P* AG5 IDE_DACK_P_
IDE_DACK_P_ 23
H2 IDE_IOW_P* AH4 IDE_IOW_P_
IDE_IOW_P_ 23
H1 SATA4 SATA CONNECTOR-R IDE_INTR_P AH5 IDE_INTR_P
IDE_INTR_P 23
C 1 IDE_DREQ_P AK3 IDE_DREQ_P C
IDE_DREQ_P 23
2 SATA_B1_TX_P_C C266 0.01UF 25V X7R 0402 SATA_B1_TX_P AA2 SATA_B1_TX_P IDE_IOR_P* AJ4 R230 0 0402
IDE_IOR_P_ 23
3 SATA_B1_TX_N_C C267 0.01UF 25V X7R 0402 SATA_B1_TX_N AA1 SATA_B1_TX_N IDE_RDY_P AK4 IDE_IORDY_P
IDE_IORDY_P 23
4 CABLE_DET_P/GPIO63 AF6 CBLE_DET_P
CBLE_DET_P 23
5 SATA_B1_RX_N_C C268 0.01UF 25V X7R 0402 SATA_B1_RX_N AB1 SATA_B1_RX_N
6 SATA_B1_RX_P_C C269 0.01UF 25V X7R 0402 SATA_B1_RX_P AB2 SATA_B1_RX_P
7
H2

AC3 RESERVED
AC2 RESERVED
IDE_COMP_3P3 AD5 IDE_COMP_3P3 R92 124 1% 0402 +3.3V
AD4 RESERVED IDE_COMP_GND AD6 IDE_COMP_GND R90 124 1% 0402
AD3 RESERVED

AE4 RESERVED
AE3 RESERVED
SATA_LED*/GPIO57 A5 SATA_HDLED_ 21
AE1 RESERVED
AE2 RESERVED

C161 C157 SATA_TSTCLK_P AA6 SATA_TSTCLK_P R102 100 1% 0402 /NI

10UF 10V 0805 Y5V 10UF 10V 0805 Y5V SATA_TSTCLK_N AB6 SATA_TSTCLK_N
BC54
10UF 10V 0805 Y5V
B B
1.2V_PLL_SP_VDD
Y9 +1.2V_PLL_SP_VDD
+1.2V
SATA_TERMP AB5 SATA_TERMP R103 2.49K 1% 0402

BR7 BEAD 60 0603 1.2V_PLL_SP_SS

U13 +1.2V_PLL_SP_SS
+1.2V
R81 BEAD 60 0805 1A 3.3V_PLL U12 +3.3V_PLL_SP_SS
+3.3V
V12 +3.3V_PLL_LEG
C147 C140 M12 +3.3V_PLL_DISP
C148 BC156
10UF 10V 0805 Y5V I95
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402

1UF 10V Y5V 0402

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal MCP68S (3) OF 7
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 17 of 39
5 4 3 2 1
 5 4 3 2 1

+3.3V_DUAL +3.3V_DUAL

AC_BITCLK

R163 R167
10K 1% 0402 10K 1% 0402 /NI
AC_RST* C241
AC_SDOUT AC_RST_ 1 = *RGMII OR PCI LAN 22P 50V NPO 0402
0 = MII
C242 R166 C243 U6E MCP68S A3
10K 1% 0402 BGA-692_R
D MCP68S D
10P 50V NPO 0402 10P 50V NPO 0402
XXXX-XXXX-XXXX
B7 GP_REFCLK SEC 6 OF 8 USB0_P M3 USB_0 USB_1 1 2
USB_0 27
AC_BITCLK B4 HDA_BCLK USB0_N M4 USB_0_ USB_1_ 3 4 RN28
29 AC_BITCLK USB_0_ 27
USB_0 5 6 15K 8P4R 0402
HDA_SDOUT +3.3V USB1_P N3 USB_1 USB_0_ 7 8
USB_1 27
LPC_FRAME 16 A3 HDA_SDATA_OUT0/GPIO45 USB1_N N4 USB_1_ USB_3 1 2
29 AC_SDOUT USB_1_ 27
AC_SDIN_0 A2 HDA_SDATA_IN0/GPIO22 USB_3_ 3 4 RN25
29 AC_SDIN_0
0 0 = LPC BIOS 1-2 DEFAULT R201 B1 HDA_SDATA_IN1/GPIO23/MGPIO0 USB2_P N1 USB_2 USB_2 5 6 15K 8P4R 0402
USB_2 27
0 1 = PCI BIOS 2-3 R164 B2 HDA_SDATA_IN2/GPIO24 USB2_N N2 USB_2_ USB_2_ 7 8
USB_2_ 27
1 0 = SPI BIOS 1-2 10K 1% 0402 10K 1% 0402 /NI USB_4 1 2
1 1 = RESERVED USB3_P P1 USB_3 USB_4_ 3 4 RN26
USB_3 27
AC_SYNC USB3_N P2 USB_3_ USB_5 5 6 15K 8P4R 0402
USB_3_ 27
USB_5_ 7 8
USB4_P R2 USB_4 USB_7 1 2
USB_4 27
R165 R159 22 0402C3 HDA_RESET* USB4_N R3 USB_4_ USB_7_ 3 4 RN24
29 AC_RST_ USB_4_ 27
SPDIF0 10K 1% 0402 /NI R158 22 0402B3 HDA_SYNC/GPIO44 USB_6 5 6 15K 8P4R 0402
29 AC_SYNC USB_5 USB_6_ 7
(CLK) USB5_P P3 USB_5 27 8
1 = 24MHZ USB5_N P4 USB_5_ USB_8 8 7
USB_5_ 27
0 = *14.318MHZ GPIO_WPJ F2 GPIO_1 USB_8_ 6 5 RN29
F1 GPIO_2/NMI* USB6_P T3 USB_6 USB_9 4 3 15K 8P4R 0402
USB_6 27
F6 GPIO_3/SMI* USB6_N T4 USB_6_ USB_9_ 2 1
USB_6_ 27
+3.3V_DUAL30 GPI
J8 GPIO_4/SCI_INTR*
G3 GPIO_5/INIT* USB7_P U3 USB_7 USB_10_ 8 7
USB_7 27
+3.3V_DUAL R143 10K 1% 0402 BOARD_ID0 G5 GPIO_6/FERR*/SYS_FERR* USB7_N U4 USB_7_ USB_10 6 5 RN23
BOARD_ID1 G6 USB_7_ 27 USB_11_
R144 10K 1% 0402 /NI GPIO_7/NFERR*/SYS_PERR* 4 3 15K 8P4R 0402 /NI
USB8_P T6 USB_8 USB_11 2 1
USB_8 27
SPI_MISO D3 GPIO_8/SPI_DI USB8_N T5 USB_8_
USB_8_ 27
SPI_MOSI D4 GPIO_9/SPI_DO
C SPI_CS0B E4 GPIO_10/SPI_CS USB9_P T8 USB_9 C
USB_9 27
1

SPI_CLK E3 GPIO_11/SPI_CLK USB9_N T7 USB_9_

USB_9_ 27
C236 +3.3V_DUAL
0.1UF 16V Y5V 0402 R141 10K 1% 0402 USB10_P V5 USB_10
2

R154 R172 USB10_N V4 USB_10_

1K 0402 1K 0402 R142 10K 1% 0402 /NI H9 RESERVED
USB11_P V7 USB_11
USB11_N V6 USB_11_
CHIPSET T9( USB_RBIAS_GND)

U17 MCP61/65 1.1K

8 VDD CE# 1 USB_OC0*/GPIO25 P7 USB_0_1_OC_ 27
SPI_CS0B 7 2 USB_OC1*/GPIO26 P8 MCP68 732
HOLD# SO USB_2_3_OC_ 27
SPI_CLK 6 3 GPIO_WPJ USB_OC2*/GPIO27 P9
SCK WP# USB_4_5_OC_ 27
SPI_MOSI 5 4 USB_OC3*/GPIO28/MGPIO1 P5
SI Vss USB_6_7_OC_ 27
CLEAR CMOS CONTROL USB_OC4*/GPIO29 P6 USB_8_9_OC_ 27
SPI SOCKET 8PIN
SPI_MISO SPI_MISO_1 1-2 NORMAL USB_RBIAS_GND T9 USB_GND BR8 1.1K 1% 0402 APP +3.3V

R122 Close to U16, 100-500 mils NOTE

R223 4.7K 0402 /NI +3.3V_DUAL JCI1
2-3 CLEAR CMOS 1 2 HEADER 1X2 /NI
A20GATE/GPIO55 F5 A20GATE
INTRUDER_ A20GATE 33
INTRUDER* K2 R173 1M 0402
+3.3V_VBAT 25,33
EXT_SMI*/GPIO32 F3 SLEEPBTNJ RN37 R157
CMOS CLEAR RI*/GPIO33
SPKR
H4
C7
SER_RI_
SPEAKER
SLEEPBTNJ
SER_RI_
SPEAKER
21
28
21 1
2.7K 8P4R 0402
2 +3.3V
1K 1% 0402 /NI

PWRBTN* G4 PWBTOUT_ 3 4 SPEAKER

JUMPER SIO_PME*/GPIO31
KBRDRSTIN*/GPIO56
F4
A4
IO_PME_
SIO_KBRST_
PWBTOUT_
IO_PME_
SIO_KBRST_
33
33
33
5
7
6
8
+3.3V
+3.3V_DUAL
+3.3V_DUAL SPEAKER
0 = USER MODE R161
49.9K 1% 0402 SMB_CLK0 C2 1 = SAFE MODE 1K 1% 0402
B SMB_MEM_SCL 11,12 B
R174 1 SMB_DATA0 C1 *0= DEFAULT
25,33 +3.3V_VBAT SMB_MEM_SDA 11,12
2 RTC_RST_ K4 RTC_RST* SMB_CLK1/MSMB_CLK D2 SMB_SCLL
SMB_SCL 20,22,31
3 JCMOS1 SMB_DATA1/MSMB_DATA E2 SMB_SDAL
SMB_SDA 20,22,31
35 MEM_VLD J3 MEM_VLD +3.3V_VBAT K3 +3.3V_VBAT 25,33
HEADER 1X3 HT_VLD H3 MCPVDD/HT_VLD BUF_SIO_CLK B5 BUF_SIO_CLK_R R117 22 0402
35 HT_VLD BUF_SIO_CLK 33
J4 MCPVDD/HT_EN SUS_CLK/GPIO34 E1 SUS_CLK_R R110 22 0402
38 MCPVDD_EN SUSCLK 33
J1 CPU_VLD THERM*/GPIO59 C6 CHIP_THERM_
31 CPU_VLD CHIP_THERM_ 33 +3.3V
CPUVDD_EN J2 CPUVDD_EN RSTBTN* H5 FP_RESET_
31 CPUVDD_EN FP_RESET_ 21
MCP68 SPI CLK STRAP SLP_S5* H8 SLP_S5_
SLP_S5_ 32
SLP_S3* G8 SLP_S3_
SLP_S3_ 33
PWRGD_SB H6 PWRGD_SB
MCP61_PWRGD PWRGD_SB 35
SPI_DO SPI_CLK PS_PWRGD G2 MCP61_PWRGD 35
FANRPM0/GPIO60 E6 R162
0 0 31Mhz FANCTL0/GPIO61 D6 4.7K 0402 /NI
FANCTL1/GPIO62 C5
THERM_SIC/GPIO48 AH7 THERM_SIC 7
0 1 42Mhz Default L8 PKG_TEST THERM_SID/GPIO49 AF8 CHIP_THERM_
THERM_SID 7
BR13 1K 1% 0402
F8 TEST_MODE_EN THERM_SID1/GPIO47/PWR_LED* AE7

1 0 25Mhz I189
C178 C180 BC68
10P 50V NPO 0402 /NI 1UF 10V Y5V 0402
1 1 1Mhz 22P 50V NPO 0402
MCP61 SPI CLK STRAP SMB_MEM_SCL
SMB_MEM_SDA

KA

KA
SPI_DO SPI_CLK
+3.3V +3.3V

A
NEAR TO DDR A
0 0 500 KHz

K
R234 R205
10K 1% 0402 10K 1% 0402
0 1 1.8 MHz D6 D5
BOARD_ID0 BOARD_ID1 BAV99 SOT23
+3.3V_DUAL
1 0 2.5 MHz BAV99 SOT23
R235 R209 Title
1K 1% 0402 /NI 1K 1% 0402 /NI
1 1 25 MHz MCP68S (4) OF 7
Size Document Number Rev
Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 18 of 39
5 4 3 2 1
 5 4 3 2 1

+1.2V_HT

R104
0 0805 C166 C193
BC165 10UF 10V 0805 Y5V10UF 10V 0805 Y5V

0.1UF 16V Y5V 0402

D D

+1.2V_HTB
U6F MCP68S A3 +1.2V U6G MCP68S A3
BGA-692_R BGA-692_R
+1.2V MCP68S P19 GND
MCP68S GND M15
XXXX-XXXX-XXXX H19 GND
XXXX-XXXX-XXXX GND AK14 1P2V_PEA C143 10UF 10V 0805 Y5V
AK27 +1.2V SEC 7 OF 8 +1.2V_HT W15 AE11 GND SEC 8 OF 8 GND P15 C138 10UF 10V 0805 Y5V
AH27 +1.2V +1.2V_HT W16 R89 D7 GND GND W6 C144 10UF 10V 0805 Y5V
AJ27 +1.2V +1.2V_HT W17 0 0805 G27 GND GND N19 C149 0.1UF 16V Y5V 0402
AG26 +1.2V AB7 GND GND AC8
AG25 +1.2V +1.2V_PEA AK28 T15 GND GND N12
U18 +1.2V +1.2V_PEA AJ28 1P2V_PEA U2 GND GND N14
AE22 +1.2V +1.2V_PEA AH28 P13 GND GND P14
AE23 +1.2V +1.2V_PEA AG27 AC9 GND GND M14
V19 +1.2V +1.2V_PEA AF26 N25 GND GND M13
V18 +1.2V +1.2V_PEA AE25 G26 GND GND U1
U19 +1.2V +1.2V_PEA AD24 F17 GND GND R9
W19 +1.2V +1.2V_PEA AC23 F15 GND GND N9
W18 +1.2V F13 GND GND P12
V15 +1.2V +1.2V F11 GND GND D23 1P2V_SP_A BC58 10UF 10V 0805 Y5V
U16 +1.2V F9 GND GND AK30 BC56 0.1UF 16V Y5V 0402
T14 +1.2V D25 GND GND H7
W14 +1.2V H17 GND GND A30
AB21 +1.2V +1.2V_SP_D V13 D19 GND GND AB3
AC21 +1.2V +1.2V_SP_D W13 BR9 J17 GND GND K9
U14 +1.2V +1.2V_SP_D V14 0 0805 H13 GND GND F30
C T18 +1.2V +1.2V_SP_D W12 AH26 GND GND N8 C
U15 +1.2V AA9 GND GND F7
R15 +1.2V AE21 GND GND J21
V17 +1.2V AE19 GND GND K1
V16 +1.2V +1.2V_SP_A W9 1P2V_SP_A AE17 GND GND AB30 PLACE ON BACK SIDE CENTER OF MCP61
R17 +1.2V +1.2V_SP_A W8 AE15 GND GND V30
T16 +1.2V +1.2V_SP_A V8 AE13 GND GND P30
U17 +1.2V +1.2V_SP_A V9 AA8 GND GND K30 +3.3V_DUAL BC64 0.1UF 16V Y5V 0402
R19 +1.2V +1.2V_SP_A U9 AK22 GND GND H21 BC65 0.1UF 16V Y5V 0402
AG19 GND GND AD26 BC67 0.1UF 16V Y5V 0402
AK18 GND GND AA25
AG15 GND GND W25
C4 GND GND U25
AB22 +1.2V_PED E30 GND GND R25 +1.2V_DUAL BC69 0.1UF 16V Y5V 0402
AE24 +1.2V_PED +1.2V_DUAL F26 D15 GND GND L25 C240 10UF 10V 0805 Y5V
AD22 +1.2V_PED +1.2V_DUAL F27 +1.2V_DUAL D11 GND GND J25
AA22 +1.2V_PED J6 GND GND W27
AC22 +1.2V_PED L6 GND GND N13 +3.3V BC72 0.1UF 16V Y5V 0402
N6 GND GND R27 C245 0.1UF 16V Y5V 0402
R6 GND GND L27 BC63 0.1UF 16V Y5V 0402
U6 GND GND W23
+3.3V_DUAL L4 +3.3V_DUAL N22 GND GND U8
+3.3V_DUAL J22 R13 GND GND J9
M19 GND GND AE9
+3.3V +3.3V_USB_DUAL L3 AK1 GND GND AG7
+3.3V_USB_DUAL L2 J23 GND GND F25 +1.2V
H15 +3.3V R23 GND GND P18 C159 10UF 10V 0805 Y5V
J15 +3.3V M18 GND GND F21
AC6 +3.3V N18 GND GND F19 C137 10UF 10V 0805 Y5V
B
AC5 +3.3V P16 GND GND F29 B
N15 GND GND AK5 C156 10UF 10V 0805 Y5V
I20 R18 GND GND R4 C158 10UF 10V 0805 Y5V
T13 GND GND V3 C165 10UF 10V 0805 Y5V
+3.3V_DUAL T17 GND GND W4
M17 GND GND AC4
L23 GND GND C28
P17 GND GND T19
+ J11 GND GND AC13
CT22 R16 GND GND AK10
100UF 16V 5X11 2mm LR +1.2V_DUAL A1 GND GND AF1 BC49 0.1UF 16V Y5V 0402
J13 GND GND AG4
M16 GND GND R8
Q32 R1 R160 N16 GND GND A27
I 100 1% 0402 Vout=Vref (1.25V) X ( 1+R2/R1 ) N17 GND GND H11
O AG11 GND GND D1
A + =1.25V N23 GND GND AC19
CT23 R14 GND GND AC17
100UF 16V 5X11 2mm LR T12 GND GND E29
AZ1117H-ADJ SOT-223 R156 R12 GND GND AJ7
0 0402 AC7 GND GND AB4
R2
I21

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal MCP68S (5&6) OF 7
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 19 of 39
5 4 3 2 1
 5 4 3 2 1

+3.3V +5V -12V PCI1 +12V +5V +3.3V +3.3V_DUAL +3.3V +5V -12V PCI2 +12V +5V +3.3V +3.3V_DUAL
PCI-120 PIN-R PCI-120 PIN-R
B1 -12V TRST_L A1 B1 -12V TRST_L A1
B2 TCK +12V A2 B2 TCK +12V A2
B3 GND TMS A3 B3 GND TMS A3
B4 TDO TDI A4 B4 TDO TDI A4
B5 5V 5V A5 B5 5V 5V A5
D
B6 5V INTA_L A6 PCI_INTY_ 16 B6 5V INTA_L A6 PCI_INTW_ 16 D
16 PCI_INTZ_ B7 INTB_L INTC_L A7 PCI_INTW_ 16 16 PCI_INTX_ B7 INTB_L INTC_L A7 PCI_INTY_ 16
16 PCI_INTX_ B8 INTD_L 5V A8 16 PCI_INTZ_ B8 INTD_L 5V A8
B9 PRSNT1_L RSRVD A9 B9 PRSNT1_L RSRVD A9
B10 RSRVD +Vio A10 B10 RSRVD +Vio A10
B11 PRSNT2_L RSRVD A11 B11 PRSNT2_L RSRVD A11
B12 GND GND A12 B12 GND GND A12
B13 GND GND A13 B13 GND GND A13
B14 RSRVD RSRVD A14 B14 RSRVD RSRVD A14
B15 GND RST_L A15 PCIRST_SLOT1_ 16 B15 GND RST_L A15 PCIRST_SLOT2_ 16
B16 CLK +Vio A16 B16 CLK +Vio A16
16 PCI_CLKSLOT1 PCI_GNT_1 16 PCI_CLKSLOT2 PCI_GNT_2
B17 GND GNT_L A17 B17 GND GNT_L A17
PCI_REQ_1 B18 A18 PCI_REQ_2 B18 A18
REQ_L GND PCI_PME_ REQ_L GND PCI_PME_
B19 +Vio RSRVD A19 PCI_PME_ 16 B19 +Vio RSRVD A19 PCI_PME_ 16
PCI_AD31 B20 A20 PCI_AD30 PCI_AD31 B20 A20 PCI_AD30
PCI_AD29 AD31 AD30 PCI_AD29 AD31 AD30
B21 AD29 3.3V A21 B21 AD29 3.3V A21
B22 A22 PCI_AD28 C273 B22 A22 PCI_AD28
PCI_AD27 GND AD28 PCI_AD26 0.1UF 16V Y5V 0402 /NI PCI_AD27 GND AD28 PCI_AD26
B23 AD27 AD26 A23 B23 AD27 AD26 A23
PCI_AD25 B24 A24 PCI_AD25 B24 A24
AD25 GND PCI_AD24 AD25 GND PCI_AD24
B25 3.3V AD24 A25 B25 3.3V AD24 A25
PCI_C/BE_3 B26 A26 PCI_AD22 PCI_C/BE_3 B26 A26 PCI_AD24
PCI_AD23 C/BE3_L IDSEL PCI_AD23 C/BE3_L IDSEL
B27 AD23 3.3V A27 B27 AD23 3.3V A27
B28 A28 PCI_AD22 B28 A28 PCI_AD22
PCI_AD21 GND AD22 PCI_AD20 PCI_AD21 GND AD22 PCI_AD20
B29 AD21 AD20 A29 B29 AD21 AD20 A29
PCI_AD19 B30 A30 PCI_AD19 B30 A30
AD19 GND PCI_AD18 AD19 GND PCI_AD18
B31 3.3V AD18 A31 B31 3.3V AD18 A31
PCI_AD17 B32 A32 PCI_AD16 PCI_AD17 B32 A32 PCI_AD16
PCI_C/BE_2 AD17 AD16 PCI_C/BE_2 AD17 AD16
B33 C/BE2_L 3.3V A33 B33 C/BE2_L 3.3V A33
B34 GND FRAME_L A34 PCI_FRAME_ 16 B34 GND FRAME_L A34 PCI_FRAME_ 16
16 PCI_IRDY_
B35 IRDY_L GND A35 16 PCI_IRDY_
B35 IRDY_L GND A35
C B36 3.3V TRDY_L A36 PCI_TRDY_ 16 B36 3.3V TRDY_L A36 PCI_TRDY_ 16
C

16 PCI_DEVSEL_ B37 DEVSEL_L GND A37 16 PCI_DEVSEL_ B37 DEVSEL_L GND A37
B38 GND STOP_L A38 PCI_STOP_ 16 B38 GND STOP_L A38 PCI_STOP_ 16
PCI_LOCK_ B39 A39 PCI_LOCK_ B39 A39
LOCK_L 3.3V LOCK_L 3.3V
16 PCI_PERR_ B40 PERR_L SDONE A40 SMB_SCL 18,22,31 16 PCI_PERR_ B40 PERR_L SDONE A40 SMB_SCL 18,22,31
B41 3.3V SBO_L A41 SMB_SDA 18,22,31 B41 3.3V SBO_L A41 SMB_SDA 18,22,31
B42 SERR_L GND A42 B42 SERR_L GND A42
16 PCI_SERR_ 16 PCI_SERR_
B43 3.3V PAR A43 PCI_PAR 16 B43 3.3V PAR A43 PCI_PAR 16
PCI_C/BE_1 B44 A44 PCI_AD15 PCI_C/BE_1 B44 A44 PCI_AD15
PCI_AD14 C/BE1_L AD15 PCI_AD14 C/BE1_L AD15
B45 AD14 3.3V A45 B45 AD14 3.3V A45
B46 A46 PCI_AD13 B46 A46 PCI_AD13
PCI_AD12 GND AD13 PCI_AD11 PCI_AD12 GND AD13 PCI_AD11 C309 0.1UF 16V Y5V 0402
B47 AD12 AD11 A47 B47 AD12 AD11 A47 +3.3V
PCI_AD10 B48 A48 PCI_AD10 B48 A48 C308 0.1UF 16V Y5V 0402
AD10 GND PCI_AD9 AD10 GND PCI_AD9 C307 0.1UF 16V Y5V 0402
B49 M66EN AD9 A49 B49 M66EN AD9 A49
B50 A50 B50 A50 C306 0.1UF 16V Y5V 0402
5V KEY 5V KEY 5V KEY 5V KEY C305 0.1UF 16V Y5V 0402
B51 5V KEY 5V KEY A51 B51 5V KEY 5V KEY A51
PCI_AD8 B52 A52 PCI_C/BE_0 PCI_AD8 B52 A52 PCI_C/BE_0 C304 0.1UF 16V Y5V 0402
PCI_AD7 AD8 C/BE0_L PCI_AD7 AD8 C/BE0_L C310 0.1UF 16V Y5V 0402
B53 AD7 3.3V A53 B53 AD7 3.3V A53
B54 A54 PCI_AD6 B54 A54 PCI_AD6
PCI_AD5 3.3V AD6 PCI_AD4 PCI_AD5 3.3V AD6 PCI_AD4 CT26 1000UF 6.3V 8X12 /NI
B55 AD5 AD4 A55 B55 AD5 AD4 A55
PCI_AD3 B56 A56 PCI_AD3 B56 A56 C277 1UF 16V 0805 Y5V
AD3 GND PCI_AD2 AD3 GND PCI_AD2 C282 1UF 16V 0805 Y5V /NI
B57 GND AD2 A57 B57 GND AD2 A57
PCI_AD1 B58 A58 PCI_AD0 PCI_AD1 B58 A58 PCI_AD0 C279 1UF 16V 0805 Y5V /NI
AD1 AD0 AD1 AD0 C281 0.01UF 50V X7R 0402 /NI
B59 +Vio +Vio A59 B59 +Vio +Vio A59
PCI_ACK64_ B60 A60 PCI_REQ64A_ PCI_ACK64_ B60 A60 PCI_REQ64B_ C275 0.1UF 16V Y5V 0402
ACK64_L REQ64_L ACK64_L REQ64_L C280 1000P 50V X7R 0402 /NI
B61 5V 5V A61 B61 5V 5V A61
B62 5V 5V A62 PCI_AD[31..0] 16 B62 5V 5V A62 FOR EMI
PCI_C/BE_[3..0] 16

B B

CT32 1000UF 6.3V 8X12

+3.3V

+
PCI_SERR_ 1 2 CT20 100UF 16V 5X11 2mm LR
16 PCI_SERR_ +5V
PCI_PERR_ 3 4 RN42
16 PCI_PERR_ PCI_LOCK_ 8.2K 8P4R 0402 C278 1UF 16V 0805 Y5V
5 6
PCI_STOP_ 7 8 C249 1UF 16V 0805 Y5V /NI
16 PCI_STOP_ PCI_DEVSEL_ C248 0.1UF 16V Y5V 0402
16 PCI_DEVSEL_ 1 2
PCI_TRDY_ 3 4 RN41 C283 0.1UF 16V Y5V 0402
16 PCI_TRDY_ PCI_IRDY_ 8.2K 8P4R 0402
5 6
16 PCI_IRDY_ PCI_FRAME_ C274 0.1UF 16V Y5V 0402
7 8
16 PCI_FRAME_ PCI_ACK64_
PCI_REQ64A_
1
3
2
4 RN43
PCI SLOT 1 PCI SLOT 2 C301 0.1UF 16V Y5V 0402
PCI_REQ64B_ 5 6 8.2K 8P4R 0402
7 8 C292 1UF 16V 0805 Y5V
1 2
PCICLK PCI_CLKSLOT1 PCI_CLKSLOT2
16 PCI_REQ_1 RN40
3 4
16 PCI_REQ_2 8.2K 8P4R 0402
5 6
16 PCI_REQ_0
7 8
INTR PCI_INTY* PCI_INTW* +3.3V
1 2
16 PCI_INTZ_ RN39
3 4
16 PCI_INTX_
5 6 8.2K 8P4R 0402 IDSEL PCI_AD22 PCI_AD24 +
16 PCI_INTW_ CT25
16 PCI_INTY_ 7 8
1 2 1000UF 6.3V 8X12
3 4 RN35
16 PCI_REQ_3 8.2K 8P4R 0402
16 PCI_REQ_4
5 6
7 8 +3.3V_DUAL
16 PCI_PME_
A
16 PCI_GNT_1
1 2 A
3 4 RN34
16 PCI_GNT_3 8.2K 8P4R 0402 /NI
5 6
16 PCI_GNT_0
7 8
◇BIOSTAR'S PROPRIETARY INFORMATION◆
16 PCI_GNT_2 +3.3V
R114
16 PCI_GNT_4 8.2K 0402 /NI
◇Any unauthorized use, reproduction,
duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal PCI SLOT 1&2
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 20 of 39
5 4 3 2 1
 5 4 3 2 1

SPK_DAT

C
SLEEPBTNJ 18
FPQ2
2N3904 SOT23
EMI EMI

E
SPK1
D D

FPRN2
1 2 +5V

Stuffed, if w/o STR

+5V 3 4
5 6
7 8

1
3
5
7
JPANEL1
10K 8P4R 0402 FPRN4 HEADER 2X8 N_P11
SPEAKER FPR9 2.2K 0402 1 9
18 SPEAKER
2 10

2
4
6
8
3 +5V_DUAL
100 8P4R 0402 SPK_VCC 4 12
PD1
CRNT_LMT_HDDLED1 5 13 FP_8_10
FPQ4
6 14 FP_12
23 IDEACTPJ FPR8 680 0402
7 15 E
8 16 FP_8_10 FPR7 680 0402 C
B
FP_12
17 SATA_HDLED_
FPR6 2N3906 SOT23

C
51 0402 FPRN5
BAT54A SOT23
1 2 ACPI_LED 33
FPQ3 3 4
2N3904 SOT23 5 6
7 8

B
+1.8V_SUS
+3.3V_DUAL 4.7K 8P4R 0402

C C
FPR5
22K 0402

PWRBTN_ 33

+3.3V_DUAL FPR3 10K 1% 0402 /NI FPC1

1UF 10V Y5V 0402
FPR4 33 0402
18 FP_RESET_

C300
0.1UF 16V Y5V 0402

B B

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal FRONT PANEL HEADER
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 21 of 39
5 4 3 2 1
 5 4 3 2 1

+3.3V

+3.3V_DUAL D10

K A
SS12/5817 SMA

D D

PCI-EX16
+3.3V +12V +12V +3.3V
PCI_Express_x16
B1 +12V PRSNT1# A1
B2 +12V +12V A2
B3 RSVD1 +12V A3
B4 A4 RN36
GND GND PE_TDI
18,20,31 SMB_SCL
B5 SMCLK JTAG2 A5 1 2
B6 A6 PE_TCK 3 4
18,20,31 SMB_SDA SMDAT JTAG3
B7 GND JTAG4 A7 5 6 +3.3V
B8 A8 PE_TMS 7 8
PE_TRST_ +3.3 JTAG5
B9 JTAG1 +3.3V A9
B10 A10 10K 8P4R 0402
3.3VAUX +3.3V
B11 WAKE# PERST# A11 PE_RESET_ 14
14 PE_WAKE_ R155 10K 1% 0402
Mechanical Key
B12 RSVD2 GND A12
0.1UF 16V Y5V 0402 B13 A13
C194 PE0TX_15+ GND REFCLK+
B14 PETP0 REFCLK- A14
C213 PE0TX_15- B15 A15
0.1UF 16V Y5V 0402 PETN0 GND
B16 GND PERP0 A16
B17 PRSNT2#1 PERN0 A17
B18 GND GND A18
0.1UF 16V Y5V 0402
End of the x1 Connector PE0_REFCLK 14
PE0_OUT15 PE0_OUT14 C195 PE0TX_14+ B19 A19
PETP1 RSVD5 PE0_REFCLK_ 14
C PE0_OUT_15 PE0_OUT_14 C214 PE0TX_14- B20 A20 C
0.1UF 16V Y5V 0402 PETN1 GND
B21 GND PERP1 A21 PE0_IN14 14 PE0_IN15 14
0.1UF 16V Y5V 0402 B22 A22
GND PERN1 PE0_IN_14 14 PE0_IN_15 14
PE0_OUT13 C196 PE0TX_13+ B23 A23
15 PE0_PRSNTX1 PE0_OUT_13 C215 PE0TX_13- PETP2 GND
B24 PETN2 GND A24
R133 0.1UF 16V Y5V 0402 B25 A25
GND PERP2 PE0_IN13 14
0 0402 /NI 0.1UF 16V Y5V 0402 B26 A26
GND PERN2 PE0_IN_13 14
PE0_OUT12 C197 PE0TX_12+ B27 A27 +12V Change to +12V_P
PE0_OUT_12 C216 PE0TX_12- PETP3 GND
B28 PETN3 GND A28
0.1UF 16V Y5V 0402 B29 A29 +12V CT19 470UF 16V 8X11.5
GND PERP3 PE0_IN12 14
B30 RSVD3 PERN3 A30 PE0_IN_12 14
B31 PRSNT2#2 GND A31
15 PE0_PRSNTX4 C212 1UF 16V 0805 Y5V
B32 GND RSVD6 A32
NV RECOMMEND 0.1UF 16V Y5V 0402
PE0_OUT11 C198 PE0TX_11+ End of the x4 Connector
B33 PETP4 RSVD7 A33
PE0_OUT_11 C217 PE0TX_11- B34 A34
0.1UF 16V Y5V 0402 PETN4 GND
B35 GND PERP4 A35 PE0_IN11 14
0.1UF 16V Y5V 0402 B36 A36
PE0_OUT10 C199 PE0TX_10+ GND PERN4 PE0_IN_11 14
B37 PETP5 GND A37
R138 PE0_OUT_10 C218 PE0TX_10- B38 A38
0.1UF 16V Y5V 0402 PETN5 GND
B39 GND PERP5 A39 PE0_IN10 14
0 0402 /NI 0.1UF 16V Y5V 0402 B40 A40
GND PERN5 PE0_IN_10 14
PE0_OUT9 C200 PE0TX_9+ B41 A41
PE0_OUT_9 C219 PE0TX_9- PETP6 GND
B42 PETN6 GND A42
0.1UF 16V Y5V 0402 B43 A43
GND PERP6 PE0_IN9 14
0.1UF 16V Y5V 0402 B44 A44
PE0_OUT8 C201 PE0TX_8+ GND PERN6 PE0_IN_9 14
B45 PETP7 GND A45
PE0_OUT_8 C220 PE0TX_8- B46 A46
0.1UF 16V Y5V 0402 PETN7 GND
B47 GND PERP7 A47 PE0_IN8 14
B 15 PE0_PRSNTX8
B48 PRSNT2#3 PERN7 A48 PE0_IN_8 14 B
B49 GND GND A49
NV RECOMMEND 0.1UF 16V Y5V 0402
PE0_OUT7 C221 PE0TX_7+ End of the x8 Connector
B50 PETP8 RSVD8 A50
PE0_OUT_7 C202 PE0TX_7- B51 A51
0.1UF 16V Y5V 0402 PETN8 GND
B52 GND PERP8 A52 PE0_IN7 14
0.1UF 16V Y5V 0402 B53 A53
GND PERN8 PE0_IN_7 14
PE0_OUT6 C203 PE0TX_6+ B54 A54
PE0_OUT_6 C222 PE0TX_6- PETP9 GND
B55 PETN9 GND A55
0.1UF 16V Y5V 0402 B56 A56
GND PERP9 PE0_IN6 14
0.1UF 16V Y5V 0402 B57 A57
GND PERN9 PE0_IN_6 14
PE0_OUT5 C204 PE0TX_5+ B58 A58
PE0_OUT_5 C223 PE0TX_5- PETP10 GND
B59 PETN10 GND A59
R139 0.1UF 16V Y5V 0402 B60 A60
GND PERP10 PE0_IN5 14
0.1UF 16V Y5V 0402 B61 A61
GND PERN10 PE0_IN_5 14
0 0402 /NI PE0_OUT4 C205 PE0TX_4+ B62 A62
PE0_OUT_4 C224 PE0TX_4- PETP11 GND
B63 PETN11 GND A63
0.1UF 16V Y5V 0402 B64 A64
GND PERP11 PE0_IN4 14
0.1UF 16V Y5V 0402 B65 A65
GND PERN11 PE0_IN_4 14
PE0_OUT3 C206 PE0TX_3+ B66 A66
PE0_OUT_3 C225 PE0TX_3- PETP12 GND
B67 PETN12 GND A67
0.1UF 16V Y5V 0402 B68 A68
GND PERP12 PE0_IN3 14
0.1UF 16V Y5V 0402 B69 A69
GND PERN12 PE0_IN_3 14
PE0_OUT2 C207 PE0TX_2+ B70 A70
PE0_OUT_2 C226 PE0TX_2- PETP13 GND
B71 PETN13 GND A71
0.1UF 16V Y5V 0402 B72 A72
GND PERP13 PE0_IN2 14
0.1UF 16V Y5V 0402 B73 A73
PE0_OUT1 C208 PE0TX_1+ GND PERN13 PE0_IN_2 14
B74 PETP14 GND A74
PE0_OUT_1 C227 PE0TX_1- B75 A75
0.1UF 16V Y5V 0402 PETN14 GND
B76 GND PERP14 A76 PE0_IN1 14
A 0.1UF 16V Y5V 0402 B77 A77 A
GND PERP14 PE0_IN_1 14
PE0_OUT0 C228 PE0TX_0+ B78 A78
PE0_OUT_0 C209 PE0TX_0- PETP15 GND
B79 A79
0.1UF 16V Y5V 0402 B80
PETN15 GND
A80
◇BIOSTAR'S PROPRIETARY INFORMATION◆
GND PERP15 PE0_IN0 14
R135 0 0402 B81 A81
14 PE0_PRSNTX16 PRSNT2#4 PERN15 PE0_IN_0 14
B82 A82
RSVD4 GND ◇Any unauthorized use, reproduction,
End of the x16 Connector
14 PE0_OUT[15..0] duplication, or disclosure of this
Title
14 PE0_OUT_[15..0] R129 10K 1% 0402 /NI PCIEX16-164 PIN LR-B document will be subject to the
applicable civil and/or criminal PCIEXPRESS
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 22 of 39
5 4 3 2 1
 5 4 3 2 1

17 IDE_PDD[15..0] IDE1
R105 10K 1% 0402 BOX 2X20 N20-R

16 PCIRST_IDE_
1 RESET GND 2
IDE_PDD7 3 4 IDE_PDD8
D
IDE_PDD6 DD7 DD8 IDE_PDD9 D
5 DD6 DD9 6
IDE_PDD5 7 8 IDE_PDD10
IDE_PDD4 DD5 DD10 IDE_PDD11
9 DD4 DD11 10
IDE_PDD3 11 12 IDE_PDD12
IDE_PDD2 DD3 DD12 IDE_PDD13
13 DD2 DD13 14
IDE_PDD1 15 16 IDE_PDD14
IDE_PDD0 DD1 DD14 IDE_PDD15
17 DD0 DD15 18
R74 4.7K 0402 19 20
+3.3V GND NC
17 IDE_DREQ_P
21 DMARQ GND 22
23 DIOW GND 24
17 IDE_IOW_P_
25 DIOR GND 26
17 IDE_IOR_P_
17 IDE_IORDY_P
27 IORDY CSEL 28
29 DMACK GND 30
17 IDE_DACK_P_
17 IDE_INTR_P
31 INTRQ NC 32
33 DA1 PDIAG 34 CBLE_DET_P 17
17 IDE_ADDR_P1
17 IDE_ADDR_P0 35 DA0 DA2 36
17 IDE_CS1_P_ 37 CS0 CS1 38
39 40 R72
21 IDEACTPJ DASP GND 15K 0402

R76 R73
PRIMARY IDE
5.6K 040210K 1% 0402

17 IDE_CS3_P_
17 IDE_ADDR_P2
C C

B B

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal IDE CONNECTORS
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 23 of 39
5 4 3 2 1
 5 4 3 2 1

MH1 MH4 MH6

PAD200-8 /NI PAD200-8 /NI PAD200-8 /NI
1 5 1 5 1 5 POWER CONN DECOUPING
2 6 2 6 2 6
3 (NPTH) 7 3 (NPTH) 7 3 (NPTH) 7
4 8 4 8 4 8
MH3 +5V +3.3V
PAD200-8 /NI
1 5 C135 0.1UF 16V Y5V 0402
9

9
MH2 2 6 C173 0.1UF 16V Y5V 0402
PAD200-8 /NI 3 (NPTH) 7
1 5 4 8
2 6
D
3
4
(NPTH) 7
8
POWER D

9
9 CONNECTOR
+5V_STBY
-12V +5V +3.3V +5V +5V_STBY +12V +5V_DUAL

Impedance Testing Coupon

JATXPWR1
MH5 +5V 13 1
PAD200-8 /NI R98 3.3V 3.3V
JP1
1 5 10K 1% 0402 14 2
1 -12V 3.3V R108
2 6 2
3 (NPTH) 7 15 GND GND 3
4 8 HEADER 1X2 D 150 /NI V1.1 10K 1% 0402
JP2 33 PS_ON_ 16 4
PSON 5V
1
17 5
9

2 C152 GND GND

HEADER 1X2 D 150 /NI 470P 50V X7R 0402 18 6
GND 5V
19 GND GND 7

20 NC POK 8 PWRGD_PS 33
21 5V 5VSB 9
C C
22 10 +3.3V
5V 12V
23 5V 12V 11
+5V C250 24 12
GND DET
0.1UF 16V Y5V 0402
POWER CONN ATX 24P
C170 C176 C171
0.1UF 16V Y5V 0402 C244
RF4 470P 50V X7R 0402

FAN Control Circuit for AMD AM2 MB

LED_DIMM 0.1UF 16V Y5V 0402
4.7K 0402 0.1UF 16V Y5V 0402
33 FAN_CTL3
EMI
EMI

+5V
RF3 100 0402 CPU FAN
RF2 100 0402 /NI 4-pin FAN Header Definition
pin1. GND
RF1 +12V pin2. Power (+12V)
pin3. Sense
4.7K 0402
pin4. Control
RF8
11

B LM324 SO14 B
1K 0402 Q4 RF10
CPU
E

RF12 15K 0402 6 - RF9 0 0805 /NI +12V

33 FAN_CTL1
7 B
5 +
CTF2 470 0402 BCP69 SOT-223
C

10UF 10V 0805 Y5V JCFAN1 R6

4

U1B WAFER 1X4 2.54MM

+12V 4.7K 0402
4
3 RF5 27K 0402
RF6 36K 1% 0402 FAN1 33
2
1 CF1

RF7 CTF1 470P 50V X7R 0402 RF11 R3

22K 0402 22K 0402
100UF 16V 5X11 2mm LR K
D1
KA
BAV99 SOT23
A

+12V +5V K +5V

KA

A
R222
A 10K 1% 0402 A
JSFAN1 D12
R221 1K 1% 0402 BAV99 SOT23
3 FAN2 33
2
1
WAFER 1X3 +
CT31
100UF 16V 5X11 2mm LR Title
ATX POWER & FAN CONTROL
Size Document Number Rev
Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 24 of 39
5 4 3 2 1
 5 4 3 2 1

+5V

1
3
5
7
R220
150 1% 0402 150 8P4R 0402
RN53
D D11 D

2
4
6
8
+3.3V_DUAL

FDD1
+3.3V_VBAT 18,33
1 2 FRWC- 33

1
R175 1K 1%VBATREF
0402 3 4
C253 C271 6
1UF 10V Y5V 0402 7 8 FINDEX- 33
BAT1 BAT54C SOT23 9 10

2
FMOA- 33
BATTERY HOLDER-1 1UF 10V Y5V 0402 11 12 FDSB- 33
13 14 FDSA- 33
15 16 FMOB- 33
+5V_DUAL +5V 17 18 FDIR- 33
19 20 FSTEP- 33
21 22 FWD- 33
23 24 FWEN- 33
25 26 FTRAK0- 33

1
27 28 FWP- 33
JKB_PWR 29 30 FRDATA- 33
HEADER 1X3 31 32

2
FHEAD- 33
33 34 FDSKCHG- 33
BOX 2X17 N5-R

KB_FB_VCC5L
C C

1 2 C2
3 4 RN1 0.1UF 16V Y5V 0402 JKBMS1
5 6 2.2K 8P4R 0402 FOR EMI
7 8 MINI DIN CONN PC99

KDAT FB2 FB_KDAT 1

33 KDAT
BEAD 60 0805 1A 2
3
4
KCLK FB3 FB_KCLK 5
33 KCLK
BEAD 60 0805 1A 6
MDAT FB5 FB_MDAT 7
33 MDAT
BEAD 60 0805 1A 8
9
10
MCLK FB4 FB_MCLK FB_MCLK 11
33 MCLK
BEAD 60 0805 1A 12
MTH'S

C7 C8 C3 C1
KEYBOARD & MOUSE

G1
G2
G3
G4
G5
47P 50V NPO 0402
47P 50V NPO 0402
47P 50V NPO 0402
47P 50V NPO 0402

B B
Q3
FB_MDAT 1 6 FB_KDAT
B1

A2 + A1
CM1293

2 5 KB_FB_VCC5L
B2 -

FB_MCLK 3 4 FB_KCLK

CM1293 SOT23-6 /NI

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal FLOOY ,KEYBOARD & MOUSE ,CMOS CLEAR
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 25 of 39
5 4 3 2 1
 A B C D E

+5V

+5V
U2A

14
SN74ACT08 PS1
4 4
1
3 R24 33 0402
U2B POLY FUSE 1.1A

14
15 DAC_HSYNC 2
SN74ACT08 +5V +5V R12 0 0805 /NI C14
4 0.1UF 16V Y5V 0402
15 DAC_VSYNC

7
6 R22 33 0402
5

R23 R44 JVGA1

7
2.2K 0402 2.2K 0402 VGA CONN PC99 SHORT
6
15 DAC_RED FB11 68nH 300mA 0.85 0603 MONRED_A 1
11
7
15 DAC_GREEN FB10 68nH 300mA 0.85 0603 MONGREEN_A 2
R42 22 0402 MONSDA_A 12
15 DDC_DATA
8
15 DAC_BLUE FB9 68nH 300mA 0.85 0603 MONBLUE_A 3
MONHSYNC_A 13
DDCPOWER_A 9
4
MONVSYNC_A 14
10
5
R15 22 0402 MONSCL_A 15
15 DDC_CLK

G1
G2
R40 R39 R36 C44 C40 C37 C15 C18 C19 C45 C43 C39 C34 C47
LQ4
150 1% 0402 5P 50V NPO 0402 470P 50V X7R 0402 5P 50V NPO 0402
3 150 1% 0402 1 6 +5V 5P 50V NPO 0402 10P 50V NPO 0402 5P 50V NPO 0402 3

B1

A2 + A1
150 1% 0402 10P 50V NPO 0402 5P 50V NPO 0402

CM1293
2 5 470P 50V X7R 0402 470P 50V X7R 0402 /NI VGA CONNECTOR
3 B2 - 4 5P 50V NPO 0402

K
Q38
BAV99 SOT23 /NI Q37 +5V
CM1293 SOT23-6 /NI
KA KA BAV99 SOT23 /NI

A
+3.3V C51
0.1UF 16V Y5V 0402 /NI

R52

2 0 0805 2

1 1

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal VGA CONNECTOR
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 26 of 39
A B C D E
 5 4 3 2 1

+5V
+5V_DUAL +5V
R57

USB_0_1_OC_ 18

1
R226 PS2
JUSBPWR1 0 0805 /NI POLY FUSE 2.0A
10K 1% 0402 USB_2_3_OC_ 18
HEADER 1X3 C20 C251

2
FOR EMI NEAR C172 USB SIGNAL VIA 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402
USB_POWER1

C118
Q16
USB LAN
UST3- 1 6 UST2-

B1

A2 + A1
D D
0.1UF 16V Y5V 0402 JUSBLAN1A

CM1293
2 5 USB_POWER1 B1
R55 VCC0

B2 -
UST3+ 3 4 UST2+ UST3- B2
C95 DATA0-
UST3+ B3
0 0805 JUSB1 CM1293 SOT23-6 DATA0+
0.1UF 16V Y5V 0402 B4 GND0
G3 G1
1 5 GND2 G3
UST0- 2 6
USB UST0+ 3 7 GND3 G4
UST1- 4 8 A1
UST1+ VCC1
G4 G2 GND4 G5
UST2- A2
USB CONN DATA1-
GND5 G6
C114 C116 C108 C111 + UST2+ A3
10P 50V NPO 0402 CT9 DATA1+
1000UF 6.3V 8X12 A4
10P 50V NPO 0402 C123 C125 C119 C121 GND1
10P 50V NPO 0402 10P 50V NPO 0402 10P 50V NPO 0402 RJ45USBA CONN
10P 50V NPO 0402
10P 50V NPO 0402 10P 50V NPO 0402

FB7 0 0805

+5V
C C
RN16 RN19
1 2 UST0+ 1 2 UST3+ C127 0.1UF 16V Y5V 0402
18 USB_0 18 USB_3
3 4 UST0- 3 4 UST3-
18 USB_0_ 18 USB_3_
5 6 UST1+ 5 6 UST2+ C103 0.1UF 16V Y5V 0402
18 USB_1 18 USB_2
+5V_DUAL +5V 7 8 UST1- 7 8 UST2-
18 USB_1_ 18 USB_2_
C211 0.1UF 16V Y5V 0402
10 8P4R 0402 10 8P4R 0402
3

JUSBPWR2
HEADER 1X3
2

R140
USB_4_5_OC_ 18

10K 1% 0402 USB_6_7_OC_ 18

R227 PS3
0 0805 /NI POLY FUSE 2.0A
USB_8_9_OC_ 18
C172
USB_POWER2
C181 C184
JUSB4 0.1UF 16V Y5V 0402
1 2
JUSB2 0.1UF 16V Y5V 0402 JUSB3 0.1UF 16V Y5V 0402 3 4
18 USB_9_ USB_8_ 18
1 2 1 2 18 USB_9 5 6 USB_8 18
18 USB_5_ 3 4 USB_4_ 18 18 USB_6_ 3 4 USB_7_ 18 7 8
18 USB_5 5 6 USB_4 18 18 USB_6 5 6 USB_7 18 10
7 8 7 8
10 10 HEADER 2X5 N9 R-USB
+
HEADER 2X5 N9 R-USB HEADER 2X5 N9 R-USB CT16
B B
1000UF 6.3V 8X12
Q24 Q21
USB_4_ 1 6 USB_5_ USB_6_ 1 6 USB_7_
B1

B1
A2 + A1

A2 + A1
CM1293

CM1293

2 5 USB_POWER2 2 5 USB_POWER2
B2 -

B2 -

USB_4 3 4 USB_5 USB_6 3 4 USB_7

CM1293 SOT23-6 CM1293 SOT23-6

Q14
Q26
UST0- 1 6 UST1-
B1

A2 + A1

USB_8_ 1 6 USB_9_
B1

A2 + A1

CM1293

2 5 USB_POWER1
CM1293

B2 -

2 5 USB_POWER2
B2 -

UST0+ 3 4 UST1+
USB_8 3 4 USB_9
CM1293 SOT23-6
CM1293 SOT23-6

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal USB INTERFACE
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 27 of 39
5 4 3 2 1
 5 4 3 2 1

R224 RN50 RN46 RN48 RN44

+3.3V_DUAL 2.2K 0402 2.2K 8P4R 0402 2.2K 8P4R 0402
D D
D13 2.2K 8P4R 0402 2.2K 8P4R 0402

RIJ0_C +5V
SS12/5817 SMA
LPT

2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
RN32 PARALLEL - CONNECTOR

1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
10K 8P4R 0402
1
3
5
7
RN47 33 8P4R 0402
P_PRD0 1 2 PRD0 -STB
18 SER_RI_ 33 PD0
P_PRD2 3 4 PRD2 AFD
C

33 PD2
P_PRD1 5 6 PRD1 -SLIN
33 PD1
B P_PRD3 7 8 PRD3 P_-ACK
33 PD3 33 ACK#
PRD2
Q27 RN49 33 8P4R 0402 PRD0
E

2N3904 SOT23 P_PRD4 1 2 PRD4 -INIT

33 PD4
P_PRD5 3 4 PRD5 P_-ERR
33 PD5 P_PRD6 33 EEROR#
33 PD6 5 6 PRD6 PRD1
P_PRD7 7 8 PRD7
WAKE ON LAN 33
33
33
PD7
STB#
ALF#
P_-STB
P_-AFD
1
3
2
4
-STB
AFD
PRD6

P_-INIT 5 6 -INIT PRD5

33 INIT# P_-SLIN -SLIN
33 SLCTIN# 7 8
PRD4
RN45 33 8P4R 0402
PRD3
C C
PRD7

COM1 33 BUSY
P_BUSY

P_PE
33 PE
+5V +12V
P_SLCT
33 SLCT
U9
20 VCC V+ 1
19 2 DCDJ0_C
33 DCD1# ROUT1 RIN1 DSRJ0_C JCOM1
18 ROUT2 RIN2 3
33 DSR1# RXDJ0_C
33 SINA 17 ROUT3 RIN3 4 G1
16 5 RTSJ0_C
33 RTS1# DIN1 DOUT1 TXDJ0_C DCDJ0_C
15 DIN2 DOUT2 6 1
33 SOUTA 14 7 CTSJ0_C DSRJ0_C JPRNT1
ROUT4 RIN4 6
33 CTS1# DTRJ0_C RXDJ0_C HEADER 2X13 N26
13 DIN3 DOUT3 8 2
33 DTR1# RIJ0_C RTSJ0_C -STB
12 ROUT5 RIN5 9 7 1 2 AFD
33 RI1# TXDJ0_C PRD0
11 GND V- 10 3 3 4 P_-ERR
CTSJ0_C 8 PRD1 5 6 -INIT
ST75185CTR TSSOP C289 220P 50V X7R 0402 /NI DTRJ0_C 4 PRD2 7 8 -SLIN
C288 220P 50V X7R 0402 /NI RIJ0_C 9 PRD3 9 10
-12V C290 220P 50V X7R 0402 /NI 5 PRD4 11 12
C291 220P 50V X7R 0402 /NI PRD5 13 14
C293 220P 50V X7R 0402 /NI G2 PRD6 15 16
C294 220P 50V X7R 0402 /NI PRD7 17 18
C295 220P 50V X7R 0402 /NI D CONN 9PIN PC99 P_-ACK 19 20
C296 220P 50V X7R 0402 /NI P_BUSY 21 22
P_PE 23 24
IO_GND P_SLCT 25
B B

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal SERIAL & PARALLEL
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 28 of 39
5 4 3 2 1
 5 4 3 2 1

18 AC_RST_
18 AC_SYNC

+
ACT4 100UF 16V 5X11 2mm LR AR39 75 0402
CD_IN 18
18
AC_SDOUT
AC_SDIN_0
LINEOUT_L 30
AR25 22 0402 ACBITCLK ACT3

+
100UF 16V 5X11 2mm LR AR40 75 0402
18 AC_BITCLK LINEOUT_R 30

R0603 AC14 10UF 10V 0805 Y5V AR41 75 0402

LINE1_L 30

+
LINE2_L AR15 75 0402 ACT2 100UF 16V 5X11 2mm LR
30 LINE2_L
JCDIN1 AC15 10UF 10V 0805 Y5V AR42 75 0402
LINE1_R 30

+
ARN1 AC19 LINE2_R AR16 75 0402 ACT1 100UF 16V 5X11 2mm LR AU1
1 30 LINE2_R
8 7 CD_R 10P 50V NPO 0402 11 35 PORT-D-L AC7 10UF 10V 0805 Y5V AR43 75 0402
2 RESET# (I) FRONT_OUT_L (B) MIC1_L 30
6 5 CD_L CD_L AC10 1UF 10V Y5V 0402 10 36 PORT-D-R
3 CD_GND SYNC (I) FRONT_OUT_R (B) PORT-C-L AC13 10UF 10V 0805 Y5V AR44 75 0402
D 4 4 3 5 SDOUT (I) LINE_IN1_L (B) 23 MIC1_R 30 D
2 1 CD_GND AC9 1UF 10V Y5V 0402 8 24 PORT-C-R
WAFER 1X4 BLACK SDIN (O) LINE_IN1_R (B) PORT-B-L
6 BITCLK (I) MIC1_L (B) 21
47K 8P4R 0402 CD_R AC8 1UF 10V Y5V 0402 PORT-E-L 14 22 PORT-B-R
LINE_IN2_L (B) MIC1_R (B)

7
5
3
1
PORT-E-R 15 43
LINE_IN2_R (B) CENTER_OUT (O)

+
ARN2 AR37 75 0402 ACT5 100UF 16V 5X11 2mm LR 18 44
30 MIC2_L CD_L (I) LFE_OUT (O)
47K 8P4R 0402 19 CD_GND (I) SURR_L (B) 39

+
AR38 75 0402 ACT6 100UF 16V 5X11 2mm LR 20 41

8
6
4
2
30 MIC2_R CD_R (I) SURR_R (B)
PORT-F-L 16 34 AR31 47 0402
MIC2_L (B) SENSE_B (I) FRONT_IO_SENSE 30
R1 PORT-F-R 17 33 EXT_VOL_CTRL
FRONT_JD AR6 5.1K 1% 0402 SENSE_A MIC2_R (B) DCVOL (I) JDREF
30 FRONT_JD 13 SENSE_A (I) JDREF 40
GND_AUD MIC1_JD AR5 20K 1% 0402 37 48 SPDIFO R2 30
30 MIC1_JD LINE1_VREFO_R (O) SPDIFO (O) SPDIFO
45 47 C192 0.1UF 16V Y5V 0402
LINE1_JD AR3 10K 1% 0402 SIDESURR_L (O) SPDIFI/EAPD (B)
30 LINE1_JD 46 SIDESURR_R (O) VREF (O) 27 C2
12 28 MIC1_VREFO AC18
PC_BEEP (I) MIC1_VREFO_L (O) MIC1_VREFO 30
2 29 10UF 10V 0805 Y5V
GPIO0 (B) LINE1_VREFO-L (O) MIC2_VREFO
3 GPIO1 (B) MIC2_VREFO (O) 30
4 31 LINE2_VREFO
LINE2_VREFO GND1 (P) LINE2_VREFO (O)
7 GND2 (P) MIC1_VREFO_R (O) 32
VCC3_1 (P) 1

KA
VCC3_2 (P) 9
26 25 AL7
AGND1 (P) AVCC_1 (P)
42 AGND2 (P) AVCC_2 (P) 38 +3.3V
AQ4 ALC662 LQFP48 2.7 0805 GND_AUD

KA
BAT54A SOT23 LQFP48-0_5 AC17 AC20
1UF 10V Y5V1UF
0402
10V Y5V 0402
AC16
GND_AUD AC22

A
1UF 10V Y5V 0402 1UF 10V Y5V 0402 AQ1
C BAT54A SOT23 C
30 GND_AUD
AR17 AR14
2.2K 04022.2K 0402
GND_AUD

A
LINE2-L AR18
LINE2_L 30
LINE2-R AR19
LINE2_R 30
2.2K 0402 2.2K 0402

+5VA
+12V MIC2_R
R35 30 MIC2_R
MIC2_L
30 MIC2_L

+
CT28 0 0805
1UF 16V 0805 Y5V +5VA

GND_AUD
Q36 R1 R210
I 110 1% 0402 AR26
O 10K 1% 0402 /NI
A +
CT29 C303 EXT_VOL_CTRL
100UF 16V 5X11 2mm LR
AZ1117H-ADJ SOT-223 R212 0.1UF 16V Y5V 0402
330 1% 0402
R2 JDREF

B B
AR27
GND_AUD 20K 1% 0402

Vout=Vref (1.25V) X ( 1+R2/R1 ) GND_AUD

=5V PLACE CLOSE TO CODEC

AR1 0 0805
C318 100P 50V NPO 0402

C319 100P 50V NPO 0402

IO_GND GND_AUD

IO_GND

A A

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◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal AUDIO CODEC
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 29 of 39
5 4 3 2 1
 5 4 3 2 1

+3.3V

0: INTEL HD AUDIO DONGLE CONNECTED

AR13
10K 1% 0402 1: INTEL HD AUDIO DONGLE UNCONNECTED
JAUDIOF1
MIC2_L 1 2
29 MIC2_L GND_AUD
MIC2_R 3 4
29 MIC2_R GPI 18
LINE2_R 5 6
29 LINE2_R FRONT_IO_SENSE
29 FRONT_IO_SENSE 7
LINE2_L 9 10
29 LINE2_L
Rear Panel Onboard Analog I/O HEADER 2X5 N8 R
AR33
D D
AC21 AR32 22K 0402 AR36 AR11 AR12
LINE1_L AL2 BEAD 60 0603 LINE1_L_ 32 JAUDIO1D 22K 0402 0 0402 /NI 39.2K 1% 0402 20K 1% 0402
29 LINE1_L
33 1000P 50V X7R 0402 AR34
34 BLUE JACK 22K 0402 AR35
LINE1_R AL1 BEAD 60 0603 29 LINE1_JD LINE1_R_ 35 22K 0402
29 LINE1_R
1
AUDIO JACK 3HD
BLUE
AR4 AR2 GND_AUD GND_AUD
22K 0402 22K 0402
AC2 AC1
100P 50V NPO 0402 100P 50V NPO 0402

LINEOUT_L AL6 BEAD 60 0603 LINEOUT_L_ 22 JAUDIO1C

29 LINEOUT_L
C 23 C

29 FRONT_JD 24
G1

G2

LINEOUT_R AL4 BEAD 60 0603 LINEOUT_R_ 25

29 LINEOUT_R
JAUDIO1A 1
G2 AUDIO JACK 3HD
G1
AR10 AR8
G3 H1 22K 0402 22K 0402
AC6 AC4
100P 50V NPO 0402
100P 50V NPO 0402 GREEN JACK
G5 G4
G3

G4

AUDIO JACK 3HD

IO_GND AQ2
BAT54A SOT23

K AR21 2.2K 0402 +5V

AR28
JSPDIF_OUT1
MIC1_VREFO KA 1
29 MIC1_VREFO
2 SPDIFO 29
A AR22 2.2K 0402 3
0 0805
AC23 WAFER 1X3 BLACK
B B
1UF 16V 0805 Y5V
MIC1_L AL3 BEAD 60 0603 MIC1_L_ 2 JAUDIO1B
29 MIC1_L
3
29 MIC1_JD 4 PINK JACK
MIC1_R AL5 BEAD 60 0603 MIC1_R_ 5
29 MIC1_R
1
AUDIO JACK 3HD

AR7 AR9
GND_AUD 29
22K 0402 22K 0402
AC3 AC5
100P 50V NPO 0402
100P 50V NPO 0402 GND_AUD
29 GND_AUD

GND_AUD

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this Title
document will be subject to the AUDIO PORT
applicable civil and/or criminal Size Document Number Rev
penalties.◆ Custom
N68SA-M2S 6.2

Date: Friday, June 04, 2010 Sheet 30 of 39

5 4 3 2 1
 5 4 3 2 1

+5V +12V VIN

+V_CPU
+3.3V

D
PQ1
D D
PC25
PR38 +5V PR13 PC10 PR1 G 4.7UF 16V Y5V 0805
1K 1% 0402 V_6312 2.7 0805 1UF 10V Y5V 0402
2.7 0805 UG1 PR28 1 0805 PL2
PR26 100K 0402 P0903BDG TO252

S
3
PC11 PH1

+
2 1 PCT1
2 1000UF 6.3V 8X12 6.3X8
PC19 PR16 PR22 1UF 16V 0805 Y5V PC9 INDUCTOR 1UH 27A 11X11 1

D
0.1UF 16V Y5V 0402 1K 1% 0402 PU1 4.7UF 16V Y5V 0805 C79

10
3
1K 1% 0402 ISL6312CRZ 220P 50V X7R 0402 PR27

+
PCT3
2 1000UF 6.3V 8X12 6.3X8
37 PGOOD 29 2.7 0805 1

VCC
18 CPU_VLD PVCC1_2 PR17 PC12 LG1 PR29 0 0805
36 G 3
18 CPUVDD_EN PC18 0.1UF 16V Y5V 0402 /NI 46 EN BPR2

+
31 PCT5
2 1000UF 6.3V 8X12 6.3X8
VID7 BOOT1 PQ2 P75N02LDG TO252 ISEN_SHORT /NI
47 VID6 1

S
48 VID5 32 2.2 0402 0.1UF 16V X7R 0402 PC22 3
7 K8_VID5 UGATE1

+
1 VID4 33 1000P 50V X7R 0402 PCT6
2 1000UF 6.3V 8X12 6.3X8
7 K8_VID4 PHASE1
2 VID3 LGATE1 30 1
7 K8_VID3 3 VID2 PR18 3
7 K8_VID2 360 1% 0402 PHASE1

+
4 VID1 PCT8
2 1000UF 6.3V 8X12 6.3X8
7 K8_VID1 5 VID0 35 IE1+ ISEN1 VIN 1
7 K8_VID0 ISEN1+ BPR1
6 VRSEL 34 IE1- PC14
PR7 PC8 ISEN1- PHASE1 PC13 0.1UF 16V X7R 0402 ISEN1

D
5.62K 1% 0402
3900P 50V X7R 0402 PR19 7.5K 1% 0402 PQ3
PR12 PR9 PC3
562 1% 0402 0.1UF 16V X7R 0402 PC21 ISEN_SHORT /NI
13 COMP BOOT2 27
PC7 G 4.7UF 16V Y5V 0805
10P 50V NPO 0402 14 26 2.2 0402 0.1UF 16V X7R 0402 UG2 PR32 1 0805 PL3
FB UGATE2 PR31 100K 0402 P0903BDG TO252
15 25

S
IDROOP PHASE2
LGATE2 28
PR10 PH2 2 1
C PC6 PR6 16 360 1% 0402 INDUCTOR 1UH 27A 11X11 1000UF 6.3V 8X12 6.3X8 C

D
470P 50V X7R 0402 /NI 750 1% 0402 /NI VDIFF IE2+ ISEN2 C88
ISEN2+ 19
20 IE2- PC1 220P 50V X7R 0402 PR30 820UF-S 2.5V 8X8 ELITE
+V_CPU ISEN2- PHASE2 0.1UF 16V X7R 0402 2.7 0805
PR2 7.5K 1% 0402 PC4 LG2 PR33 0 0805 G
0.1UF 16V X7R 0402 BPR4
42 PR25 2.7 0805 +12V PQ4 ISEN_SHORT /NI

S
PR3 PVCC3 P75N02LDG TO252 PC24
100 1% 0402 PC16 1000P 50V X7R 0402
100 1% 0402 4.7UF 16V Y5V 0805
37 OVL PC15
PR4 18 40 0.1UF 16V X7R 0402 PHASE2
7 CPU_CORE_FB VSEN BOOT3 VIN
BPR3
PR5 PC5 39 PR20 2.2 0402
UGATE3 ISEN2
17 38

D
7 CPU_CORE_FB_ RGND PHASE3
V_6312 0.01UF 50V X7R 0402 /NI 41 PQ5
0 0402 LGATE3 PR21
PR11 360 1% 0402 PC23 ISEN_SHORT /NI
44 IE3+ ISEN3 G 4.7UF 16V Y5V 0805
100 1% 0402 PR39 ISEN3+ PC20 UG3 PR35 1 0805 PL4
ISEN3- 43
PR41 PR42 82K 0402 IE3- PC17 0.1UF 16V X7R 0402 PR34 100K 0402 P0903BDG TO252

S
1K 0402 /NI
5.1K 0402 /NI PHASE3 PH3 2 1
12 PR23 0.1UF 16V X7R 0402 INDUCTOR 1UH 27A 11X11

D
OFS 7.5K 1% 0402 C134
PR43 0 0402 /NI 7 21 220P 50V X7R 0402 PR36
18,20,22 SMB_SCL DRSEL/SCL ISEN4+ 2.7 0805
ISEN4- 22
PR44 0 0402 /NI 8 LG3 PR37 0 0805 G
18,20,22 SMB_SDA OVPSEL/SDA BPR5
11 24 V_6312 PQ6 ISEN_SHORT /NI

S
B REF PWM4 PC26
B
45
GND

FS 1000P 50V X7R 0402

9 SS/RST/A0 EN_PH4 23
PC27
0.1UF 16V X7R 0402 /NI
49

PR8 PR15 PR24 PR14 P75N02LDG TO252

PC2 PHASE3
0 0402 249K 1% 0402
BPR6
0 0402 /NI 150K 1% 0402
0.01UF 25V X7R 0402 ISEN3

ISEN_SHORT /NI

ISL6312CR FOR K8 940 POWER CKT

VIN
+12V_P
PL1 1.2UH 30A 11X10.5 CARVE

A A
1

1500UF 16V 10X20X5 LR O 8X11

+ + +
PCT2 PCT4 PCT7 PC36
1500UF 16V 10X20X5 LR O 8X11 1000P 50V X7R 0402
3

+12V_P JATXPWR4
1500UF 16V 10X20X5 LR O 8X11
1 4 Title
1 4
2 2 3 3
VCORE POWER SUPPLY
Size Document Number Rev
POWER CONN ATX12V 2X2 Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 31 of 39
5 4 3 2 1
 5 4 3 2 1

MEM_VDD +5V

MEM_STR
35 DUALS_FET_GATE

S
+12V
+5V_STBY R34 1K 0402 G
Q8
+1.8V_SUS P0903BDG TO252

R54 +5V_DUAL

D
10K 1% 0402 C
D D
R56 4.7K 0402
B Q12
+5V_DUAL C 2N3904 SOT23
E +
33 PWRGD_SIO R60 4.7K 0402 B Q11 C142 CT4
2N3904 SOT23 +5V_STBY 1000UF 6.3V 8X12
C151 VTT_MEM C94 E D3
C133 1UF 16V 0805 Y5V R59 0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402 4.7K 0402
9 0.1UF 16V Y5V 0402 /NI SS12/5817 SMA

U4
+
GND2

1 4 CT13
VIN VOUT +0.9V_SUS
8 5 1000UF 6.3V 8X12
NC1 NC
3 REFEN NC2 7
100UF 16V 5X11 2mm LR
2 GND1 VCTNL 6 + + +

7
5
3
1
CT12 CT3 CT7
RN22 100UF 16V 5X11 2mm LR
FP6173C SOP8 100UF 16V 5X11 2mm LR
2.2K 8P4R 0402
8
6
4
2 +5V_STBY +12V

A
Q105
+5V_DUAL
C66
BAT54C SOT23
C C
0.1UF 16V Y5V 0402

KA
R25
10 0805

R13
L1 10 0805
RH TYPE BEAD D2

K A
RT9202NC/RT9214 SS12/5817 SMA

R33 30K 1% 0402

C22 VIN_5V_DDR2
+5V_STBY
Q9 +
1UF 16V 0805 Y5V P0903BDG TO252 C59 CT5
RT9202/RT9214NC U3 10UF 10V 0805 Y5V

5
R11 1000UF 10V 8X14X3.5 LR O
10K 1% 0402 7 1 C28

VCC
D

COMP BOOT R49 1 0805 0.1UF 16V X7R 0402

UGATE 2
R10 10K 1% 0402 Q7 8 1.2UH 30A 11X10.5 CARVE +1.8V_SUS
2N7002 SOT23 PHASE R51 10K 0402
G L2

GND
D

C11 C12 6 4 R48 0 0805 R50 + + R16

B
1UF 16V 0805 Y5V /NI FB LGATE Q10 2.7 0805 CT6 CT8 442 1% 0402
B
R9 4.7K 0402 G Q5 10UF 10V 0805 Y5V /NI FP6321A SOP8 P0903BDG TO252 1000UF 6.3V 8X12
18 SLP_S5_

3
R314 1000UF 6.3V 8X12
S

2N7002 SOT23 42.2K 1% 0402 /NI C139

C9 C63
220P 50V X7R 0402 /NI 1000P 50V X7R 0402 R1
10UF 10V 0805 Y5V /NI
+1.8VDIMM_FB 37

R26
309 1% 0402

R2

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal PLL DELAY / PWRGD / MEM VREG
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Friday, June 04, 2010 Sheet 32 of 39
5 4 3 2 1
 5 4 3 2 1

+5V R182 4.7K 0402

R231 4.7K 0402
R232 4.7K 0402
+5V
R233 4.7K 0402
KBC'S ROM:1/BUILT IN,0/EXT.
R8 PDR7 C276
PDR6 PD7 28 0.1UF 16V Y5V 0402
28 DCD1# PD6 28
PDR5
28 RI1# PDR4 PD5 28
28 CTS1# PD4 28
PDR3
28 DTR1# PD3 28
PDR2
28 RTS1# PD2 28
PDR1
28 DSR1# PD1 28
PDR0 NO USE FUNCTION ADD R4 R5-->10K
D 28 SOUTA PD0 28 D
28 SINA STB# 28
ALF# 28 +5V
R6 VIN7 R195 10K 1% 0402 /NI
R181 680 0402 /NI EEROR# 28
INIT# 28 R4
SLCTIN# 28 R5
+5V
+5V ACK# 28
8716-->R6-->ADD
R179 680 R8-->4.7K /NI BUSY 28
8712-->R6-->680 /NI R8-->ADD 4.7K PE 28
SLCT 28 8716-->R7-->30K /NI
8712-->R7-->ADD 30K
GP35: To generate an R7

116
115
114
113
112
111
110
109
108
107
106
105
4.7K 0402

128
127
126
125
124
123
122
121
120
119
118
117

104
103
U8 8716 : R1-->BEAD 60 0805 1A C272 R196 R187
event for the function 8716 : C1-->1UF 30K 1% 0402 /NI
1UF 10V Y5V 0402 4.7K 0402
THERMAL SHUTDOWN R176 R178 R177 From CPU

CTS2#

RTS1#

CTS1#
RI2#
DCD2#

SOUT1
DSR1#

DTR1#

RI1#
DCD1#

INIT#
SIN1

GNDD
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STB#
AFD#

SLIN#
ACK#
ERR#
4.7K 0402 4.7K 04024.7K 0402 8712 : R1-->0 0805 CPU_THERMDA 7
1 102 8712 : C1-->1UF /NI C1 PWRGD-PS
18 CHIP_THERM_ DTR2# BUSY CPU_THERMDC 7,34
2 101 C252 1UF 10V Y5V 0402
RTS2# PE
To CK8-04 3 DSR2# SLCT 100
R183 BEAD 60 0805 1A
R1 Routed by differential
4 VCC VCC 99
5 98 VIN0 +5V C284 FB20
SOUT2 VIN0 VIN1 VIN0 34
6 97 3900P 50V X7R 0402
SIN2 VIN1 VIN1 34
7 96 VIN2 C231 Should be 2200P BEAD 60 0805 1A
24 FAN1 FAN_TAC1 VIN2 VIN2
PWRGD-PS R189 34
8 95 0 0402 /NI C2 +5V_DUAL
24 FAN_CTL1 FAN_CTL1 VIN3 PWRGD_PS 24
9 94 VIN4
24 FAN2 FAN_TAC2/GP52 VIN4 VIN4 34
10 93 VIN5
FAN_CTL2/GP51 VIN5 VIN6 VIN5 34
11 FAN_TAC3/GP37 VIN6 92 VIN6 34 8716-->C2-->ADD 2200P
12 91 VIN7 8712-->C2-->ADD 3900P R199
24 FAN_CTL3 FAN_CTL3/GP36 VIN7
13 90 VREF 4.7K 0402
WTI#/GP35 VREF 0 0402 /NI
14 VID4/GP34 TMPIN1 89
C 15 88 PWRGD_PS R125 PWRGD_SIO C
GNDD TMPIN2
16 VID3/GP33 TMPIN3 87
17 VID2/GP32 GNDA 86
18 VID1/GP31 [5VSB PWR WELL] CIRRX/GP55 85 FOR BIOS SOLUTION
19 84 SMB_ALLERT_
VID0/GP30 [5VSB PWR WELL] SCRPRES#/GP10 +3.3V_DUAL PWRGD-SIO
20 JSBB2/GP27 [5VSB PWR WELL] MCLK 83
MCLK 25 +5V_DUAL
21 JSBB1/GP26 [5VSB PWR WELL] MDAT 82
MDAT 25
38 OV_HT0
22 JSBCY/GP25 [5VSB PWR WELL] KCLK 81 KCLK 25
23 JSBCX/GP24 [5VSB PWR WELL] KDAT 80 KDAT 25
37 OV_CHIP1 R204 R203
37 OV_CHIP0
24 JSAB2/GP23 [5VSB PWR WELL] SCLK/GP40 79
37 VDIMM1 25 78 PWRGD-SIO R198 0 0402 4.7K 0402 4.7K 0402
JSAB1/GP22 [5VSB PWR WELL] SDAT/GP41 PWRGD_SIO 32
37 VDIMM0 26 JSACY/GP21 [5VSB PWR WELL] RING#/GP53 77 To POWER LED
27 76
37 VCORE1
28
JSACX/GP20
MIDI_OUT/GP17
[5VSB PWR WELL] PSON#/GP42
[5VSB PWR WELL] PANSWH#/GP43 75 IO_PWIN circuit
51K P/U is 37 VCORE0 29 MIDI_IN/GP16 GNDD 74
IO_PME_ ACPI_LED 21
+3.3V R214 10K 1% 0402 30 73
necessaried 31
CIRTX/GP15 [PU51K]
SCRRST/GP14
[5VSB PWR WELL] PME#/GP54
[5VSB PWR WELL] PWRON#GP44 72 IO_POUT
on IX version +5V
32
33
SCRFET#/GP13 [5VSB PWR WELL] PSIN/GP45 71
70 +5V_DUAL
LPC I/O 34
SCRIO/GP12
SCRCLK/GP11
[5VSB PWR WELL] IRRX/GP46
VBAT 69 R211 4.7K 0402 R202 10K 1% 0402
+3.3V_DUAL
35 68 R206 1M 0402
LPC_PD# VCC [VBAT/5VSB PWR WELL] ] COPEN#
36 LPCPD# VCCH 67
CLKRUN#/GP50

LPCRST_SIO_ 37 66
16 LPCRST_SIO_ LRESET# IRTX/GP47 +3.3V_VBAT 18,25
LPC_DRQ0_ 38 65
16 LPC_DRQ0_ LDRQ# DSKCHG#
DENSEL#

WGATE#
WDATA#
LFRAME

RDATA#
HDSEL#
+3.3V
SERIRQ

C286

INDEX#
PCICLK

MTRA#
MTRB#
DRVA#
DRVB#
KRST#

STEP#

TRK0#
CLKIN
GNDD

+3.3V
GP54: To generate an

WPT#
1UF 16V 0805 Y5V
GA20
LAD0
LAD1
LAD2
LAD3

DIR#
event for the function
R218 R217 IT8716FFX
SLEEP BUTTON, POWER
46

48

60
61
62

64
39
40
41
42
43
44
45

47

49
50
51
52
53
54
55
56
57
58
59

63
B B
10K 1% 0402 /NI 10K 1% 0402 /NI
R215 10K 1% 0402 /NI R213 10 0805 +5V_DUAL ON BY
LPC_SERIRQ +
KB/MOUSE,RING-IN
16 LPC_SERIRQ CT30 C287
LPC_FRAME_ 0.1UF 16V Y5V 0402
16 LPC_FRAME_ 100UF 16V 5X11 2mm LR IO_PME_ 18
LPC_AD0
16 LPC_AD0
16 LPC_AD1
LPC_AD1
LPC_AD2
To Power Supplier
16 LPC_AD2 LPC_AD3 PS_ON_ 24
16 LPC_AD3 SIO_KBRST_
18 SIO_KBRST_
18 A20GATE
A20GATE
LPCCLK_SIO R200 33 0402
From Power Button
16 LPCCLK_SIO PWRBTN_ 21
FDSKCHG- 25
BUF_SIO_CLK
R10
18 BUF_SIO_CLK FWP- 25
24 FINDEX- 25
R207 33 0402
To SB
R11 FTRAK0- 25 PWBTOUT_ 18
MHz R219 R216
FRDATA- 25
56K 0402 /NI FWEN- 25
56K 0402 /NI
FHEAD- 25 From SB
F0R 3.3V OUTPUT FSTEP- 25 SLP_S3_ 18
FDIR- 25
R9 FWD- 25
C285 R208
FDSB- 25
R181 Should be 0ohm 470P 50V X7R 0402 /NI SMB_ALLERT_ R197 4.7K 0402+5V_DUAL
FDSA- 25
22K 0402 /NI
FMOB- 25
8716 : R9-->10K R10-->0 R11-->56K /NI FMOA- 25
RN51 8712 : R9-->10K /NI R10-->10K R11-->56K FRWC- 25
A 1 2 LPC_DRQ0_ A
3 4 LPC_PD#
5 6 SUSCLK
+3.3V
7 8
◇BIOSTAR'S PROPRIETARY INFORMATION◆
4.7K 8P4R 0402
RN52 SUSCLK ◇Any unauthorized use, reproduction,
2 LPC_AD0 18 SUSCLK
+3.3V 1 duplication, or disclosure of this
3 4 LPC_AD1 Title
6 LPC_AD2 document will be subject to the
5
7 8 LPC_AD3 applicable civil and/or criminal LPC SUPER I/O IT8716DX
Size Document Number Rev
8.2K 8P4R 0402 /NI penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 33 of 39
5 4 3 2 1
 5 4 3 2 1

D Voltage Sensing D

+V_CPU +1.2V +3.3V +12V +1.8V_SUS +1.2V_HT

R184 R185 R188 R192 R193 R194

10K 1% 040210K 1% 040210K 1% 0402 30K 1% 0402 10K 1% 0402 10K 1% 0402

33 VIN0
33 VIN1
33 VIN2

33 VIN4
33 VIN5
33 VIN6

R186
10K 1% 0402

C C

7,33 CPU_THERMDC

hardware monitor

B B

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal H/W MON
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 34 of 39
5 4 3 2 1
 5 4 3 2 1

+3.3V_DUAL
+5V_DUAL +1.2V_HT +5V_DUAL +3.3V_DUAL

R152
R61 10K 1% 0402
10K 1% 0402
R151

E
R66 10K 1% 0402

E
D D
10K 1% 0402 Q30

C
Q15 2N3906 SOT23
2N3906 SOT23
Q13 Q31

C
2N3904 SOT23 C113 2N3904 SOT23 HT_VLD
MCP61_PWRGD 18 HT_VLD 18

C
32 DUALS_FET_GATE R58 10UF 10V 0805 Y5V /NI

E
10K 1% 0402 R153 HT_BASE
R71 C124 6.34K 1% 0402 R150
C97 1K 1% 0402 0.1UF 16V Y5V 0402 /NI 1K 1% 0402 C238
10UF 10V 0805 Y5V /NI C239 0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402

POWER SEQUENCING
C C

+5V_DUAL +5V_DUAL +3.3V_DUAL

+1.8V_SUS +5V_DUAL +3.3V_DUAL

R170
8.2K 0402

R148
10K 1% 0402 R169

E
C230 10K 0402

D
R147 Q33
B

10K 1% 0402 0.1UF 16V Y5V 0402 /NI Q34 2N3906 SOT23
C

2N3906 SOT23 R171 PWRGD_Q1 G 2N7002 SOT23

15K 0402

C
Q29 Q28 PWRGD_SB
PWRGD_SB 18
C

R149 MEM_VLD_RC 2N3904 SOT23 MEM_VLD

B

MEM_VLD 18
6.34K 1% 0402 C247 R168 C246
10UF 10V 0805 Y5V 1K 1% 0402 1UF 16V 0805 Y5V
C235 R146 C234
10UF 10V 0805 Y5V 1K 1% 0402
B B
0.1UF 16V Y5V 0402 /NI

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal POWER SEQUENCING
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 35 of 39
5 4 3 2 1
 5 4 3 2 1

RXD3
15 RGMII_RXD3
RXD2
15 RGMII_RXD2
RXD1
15 RGMII_RXD1 RXD0
15 RGMII_RXD0

U7
RTL8201BL : R6(NC); C10(NC)
RGMII_MDC 25 32 PWFBOUT RTL8201CL/CP : R6(0 ohm); C10(0.1uF)
15 RGMII_MDC MDC PWFBOUT
RGMII_MDIO 26 36 AVDD1
15 RGMII_MDIO MDIO AVDD33
RGMII_TXD0 6 48 AVDD2 PWFBOUT
15 RGMII_TXD0 TXD0 DVDD33
RGMII_TXD1 5
15 RGMII_TXD1 TXD1
RGMII_TXD2 4 29 JUSBLAN1B
D 15 RGMII_TXD2 RGMII_TXD3 TXD2 AGND D
3 35 C186 0.1UF 16V Y5V 0402
1 LR6 680 0402
15 RGMII_TXD3 TXD3 AGND TCT
RGMII_TXCTL 2 45 11 LR7 680 0402 LINK_LED
15 RGMII_TXCTL TXEN DGND GLED-
7 TXD+ 2
15 RGMII_TXCLK TXC TX0+
22 12 RN21 680 8P4R 0402
15 RGMII_RXCTL RXDV GLED+
RXD0 21 27 TXD- 3 1 2
RXD0 NC TX0- AVDD2
RXD1 20 13 3 4
RXD2 RXD1 RXIN+ YLED-
19 RXD2 4 TX1+ 5 6
RXD3 18 14 7 8 SPEED_LED
15 RGMII_RXCLK R136
MII_COL
0 0402 16 RXD3
RXC
RTL8201 TPRX+ 31 RXIN+
RXIN-
RXIN- 5 TX1-
YLED+
LR4 680 0402
15 MII_COL 1 COL TPRX- 30
MII_CRS 23 6 LR5 680 0402
15 MII_CRS CRS TX2+
15 MII_RXER MII_RXER 24 G1
RXER/FXEN TXD- GND
15 BUF_25M 46 X1 TPTX- 33 7 TX2- GND G2
47 34 TXD+ G7
X2 TPTX+ GND
8 TX3+ GND G8
LINK_LED 9 R78 R122 +3.3V_DUAL
LED1 LED0/PHYAD0 R123 2K 1% 0402 R77 51 1% 0402
10 LED1/PHYAD1 RTSET 28 9 TX3-
LED2 12 43 ISOLATE 51 1% 0402 R121
LED2/PHYAD2 ISOLATE LQ30
SPEED_LED 13 40 RPTR 51 1% 0402 51 1% 0402 10
LED3 LED3/PHYAD3 RPTR SPEED C130 C182 RCT RXIN+ TXD+
15 39 1 6

B1

A2 + A1
LED4/PHYAD4 SPEED DUPLEX RJ45USBA CONN
38

CM1293
PWFBIN DUPLEX ANE 0.1UF 16V Y5V 04020.1UF 16V Y5V 0402
8 PWFBIN ANE 37 2 5

B2 -
AVDD2 14 41 LDPS F0R REST
DVDD33 LDPS MII_L NEAR CONNECTOR NEAR PHY PWFBOUT RXIN- TXD-
MII/SNIB/RTT3 44 3 4
11 DGND RESETB 42
RGMII_RESET_ 15
17 DGND C128 CM1293 SOT23-6
0.1UF 16V Y5V 0402
RTL8201CL TQFP48 RN30
SPEED 1 2 4.7K 8P4R 0402AVDD2
C
PHY address set to 00001h DUPLEX 3 4
C

ANE FB18
5 6
LINK_LED 7 8 AVDD2 AVDD1 RTL8201BL : R19(NC)
AVDD2
RTL8201CL/CP : R19(0 ohm)
BEAD 60 0805 1A
MII_L 1 2 AVDD2 C191
ISOLATE 3 4 RN31 0.1UF 16V Y5V 0402 /NI
LDPS 5 6 4.7K 8P4R 0402
AVDD2
LINK_LED RPTR 7 8

R279 is reserved for FB17

8201CL/CP LED Mode D9 PWFBIN PWFBOUT
1N4148 SMD AVDD2
Change to compatible BEAD 60 0805 1A
with BL MII_COL R145 5.1K 1% 0402 C233 C188 CT18
MII_RXER 100UF 16V 5X11 2mm LR
MII_CRS 0.1UF 16V Y5V 04020.1UF 16V Y5V 0402
EMI
LED3 1 2
R280 is reserved for SPEED_LED 3 4 RN33 AVDD2
ensuring 8201BL/CL/CP LED2 5 6 4.7K 8P4R 0402
LED1 7 8
latch to UTP Mode.
C231 C210
1UF 16V 0805 Y5V
AVDD1 AVDD2 AVDD2 0.1UF 16V Y5V 0402 FB19
BEAD 60 0805 1A
B +5V_DUAL B
R281 is reserved for +3.3V_DUAL AVDD2
ensuring 8201CL/CP C190 C229 C187
0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 +3.3V_DUAL
latch to normal 0.1UF 16V Y5V 0402 C237 C232
operation mode. + 1UF 16V 0805 Y5V
FOR EMI F0R REST CT24 0.1UF 16V Y5V 0402
AVDD2 100UF 16V 5X11 2mm LR

RGMII_MDIO R124 1.5K 1% 0402 Q35 R1 R190

200 1% 0402 +5V
I
O EMI
A + C270
CT27 0.1UF 16V Y5V 0402
100UF 16V 5X11 2mm LR
AZ1117H-ADJ SOT-223 R191
R2 330 1% 0402

Vout=Vref (1.25V) X ( 1+R2/R1 )

=3.3V

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this Title
document will be subject to the LAN (RTL8201CL)
applicable civil and/or criminal Size Document Number Rev
penalties.◆ Custom
N68SA-M2S 6.2

Date: Thursday, June 03, 2010 Sheet 36 of 39

5 4 3 2 1
 5 4 3 2 1

33 OV_CHIP1 R83 1K 1% 0402

OVCHIP 38

CORE VOLTAGE OV_CHIP0 OV_CHIP1

+1.24V H-R H-R

D D
R82
33 OV_CHIP0
2.26K 1% 0402 +1.28V 0 H-R
+1.33V H-R 0
+1.37V 0 0

33 VDIMM0 R17 6.34K 1% 0402

+1.8VDIMM_FB 32
+1.8VDIMM_FB VDIMM0 VDIMM1
C C
Default
1.944V H-R H-R

33 VDIMM1 R18
3.48K 1% 0402 2.00V 0 H-R

2.046V H-R 0

2.102V 0 0

VCORE_OVL VCORE0 VCORE1

Default H-R H-R

B
Default +3.3% 0 H-R B

33 VCORE0 R3 3K 1% 0402 Default +6.6% H-R 0

OVL 31

Default +10% 0 0

33 VCORE1 R1
1.5K 1% 0402

NEAR PWM

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal OVER VOLTAGE
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 37 of 39
5 4 3 2 1
 5 4 3 2 1

MCP68 CORE
+5V +12V

R88 R180
D D
10 0805 10 0805

L3
RH TYPE BEAD D7

K A
RT9202NC/RT9214 SS12/5817 SMA

R95 30K 1% 0402

C136 VIN_5V
+1.2V_HT
Q22 +
1UF 16V 0805 Y5V P0903BDG TO252 C168 CT17 +1.2V
RT9202/RT9214NC U5 10UF 10V 0805 Y5V 8 7

5
1000UF 10V 8X14X3.5 LR O 6 5
7 1 C162 4 3

VCC
COMP BOOT R119 1 0805 0.1UF 16V X7R 0402
UGATE 2 2 1
8 1.2UH 30A 11X10.5 CARVE +1.2V
PHASE R109 10K 0402 RN20
L4 0 8P4R 0402 /NI
GND
D

6 4 R106 0 0805 R107

Q19 FB LGATE Q20 2.7 0805 + CT14 + CT15 + CT21
G 2N7002 SOT23 /NI FP6321A SOP8 P0903BDG TO252 R84
3

R313 1000UF 6.3V 6.3X8 8X12

1000UF 6.3V 6.3X8
1000UF
8X12 6.3V 6.3X8 8X12
110 1% 0402
S

42.2K 1% 0402 /NI C141

220P 50V X7R 0402 /NI C169
1000P 50V X7R 0402
C C

OVCHIP 37

R80 R86
4.7K 0402 200 1% 0402

+2.5V
+5V

R79
5.1K 0402 +5V R130
0 0805 /NI+12V
REF_2V5#
C
R2

D
Q18 B R75 10K 1% 0402 R492 Q2 5.1K 0402
MCPVDD_EN 18
2N3904 SOT23 110 1% 0402
E 2N7002 SOT23 G
C129 C

S
1UF 10V Y5V 0402 REF_2.5V
Q1 B
R

B B
2N3904 SOT23
Q48 E
LM431 SOT23
A

+12V Change to +12V_P

+12V +3.3V

C10 +
R1 R19 0.1UF 16V Y5V 0402 CT10

D
1.47K 1% 0402 1000UF 6.3V 8X12
4

+1.2V_HT OV_HT0
V1 3 +
1 Q17
+1.25V 2
1 G
P0903BDG TO252
-
0 C13 R2 R20 U1A
+1.35V
S
1.47K 1% 0402 LM324 SO14 R132
11

1UF 10V Y5V 0402 1K 0402

Vout=1.22X(1+R1/R2) R14
90.9 1% 0402
+1.2V_HT
HT
Vout=V1=Vref(2.5V)*(R2/<R1+R2>)=1.25V
+1.2V_HT @ 850MA AMPS
A +
MAX A
CT11
33 OV_HT0 R21 1.2K 1% 0402 1000UF 6.3V 8X12
◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this Title
document will be subject to the MCP68 CORE
applicable civil and/or criminal Size Document Number Rev
Custom 6.2
penalties.◆ N68SA-M2S
Date: Friday, June 04, 2010 Sheet 38 of 39
5 4 3 2 1
 5 4 3 2 1

(BAT1) New JPANEL1

電池
JPANEL1 2*11
JPANEL1(9_10) JPANEL1(15_16)
HEADER 1X2 /NI HEADER 1X2 /NI
JPANEL1(11_14)
3V BATTERY SONY PLED /NI

D D
(U17)
JPANEL1(1_4) JPANEL1(5_6) JPANEL1(7_8)
SPK /NI HLED /NI RST /NI
FLASH ROM

SPI MX25L8005 DIP

PCB
(CPU1)
(X2)
X'TAL WIRE
PCB

N68SA-M2S VER:6.1
AM2RM-B
(PCB)
JCMOS1(1_2)
JUMPER 2P B (U6)

泡棉

JKB_PWR(1_2)
JUMPER 2P R 北橋散熱片

POLON 245x200
C JUSBPWR1(1_2) C
JUMPER 2P R
NBHS-A74GC

JUSBPWR2(1_2)
JUMPER 2P R

B B

A A

◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,

duplication, or disclosure of this
Title
document will be subject to the
applicable civil and/or criminal BOM
Size Document Number Rev
penalties.◆ Custom 6.2
N68SA-M2S
Date: Thursday, June 03, 2010 Sheet 39 of 39
5 4 3 2 1
 5 4 3 2 1

N61PA-M2S-V6.0蜊唳善N61PB-M2S-V6.0垀党蜊囀

1﹜ Page 7 盓厥AM2+ CPU

崝樓ㄩR53ㄛR97ㄛR131ㄛR225ㄛR99ㄛR101ㄛR126ㄛR128ㄛR228ㄛR229
2﹜ Page 15 載蜊R/G/B盄腔狟嶺萇郯迵狟嶺萇 腔佼唗
D 3﹜ Page 21 載蜊Power LED 盄繚 D

4﹜ Page 26 崝樓VGA ESD 悵誘萇繚

崝樓LQ4ㄛQ38ㄛQ37
5﹜ Page 27 崝樓USB FUSE COLAY萇繚
崝樓R226ㄛR227
6﹜ Page 28 刉壺COM PORT腔嗣豻媼憤奪
刉壺D8
7﹜ Page 29 載蜊AUDIO 萇埭萇
蔚CT28蚕 10UF 10V載蜊峈4.7UF 16V
8﹜ Page 30 載蜊SPDIF 萇埭萇
蔚AC23 NI
9﹜ Page 31 COLAY CPU IN/OUTPUT 萇 8X10
覃遙PR11迵PR5腔佼唗
蔚PWM腔SM BUS腔揹薊萇郯NIㄛ撈NI PR43ㄛPR44
10﹜ Page 32 載蜊DDR 1.8V萇繚ㄛ蔚窒煦眳 5V-DUAL 垀蚚眳揭蜊峈5V-STBYㄛ賤泔萇埭眳恀枙
C 載蜊ISEN萇郯ㄛ撈載蜊R33ㄛ蚕20K載蜊峈30K C

載蜊萇郯R34ㄛ蚕4.7K載蜊峈1K
11﹜ Page 38 載蜊CORE 萇揤萇繚腔ISEN萇郯ㄛ撈載蜊R95ㄛ蚕20K載蜊峈30K
12﹜ Page 39 載蜊USB 沷簽腔蘇 萇揤
蔚埻懂腔蘇 2ㄛ3PIN 蜊峈珋婓蘇 腔1ㄛ2PIN
載蜊BIOS ROMㄛ蚕4M 蜊峈8M

N61PB-M2S-V6.0蜊唳善N61PB-M2S-V6.1垀党蜊囀

1﹜ Page 30 AUDIO崝樓ESD悵誘
崝樓ㄩLQ27ㄛLQ31ㄛD14ㄛD15
2﹜ Page 36 崝樓ESD悵誘萇繚
崝樓LQ30
2009/01/05 党蜊囀
B
蔚PR24 蚕埻懂腔100K曹峈121Kㄛ蔥腴CPU PWM 薹 B

Change list N61PB-M2S-V6.4 to N68SA-M2S-V6.0

1.(PAGE 13-19) Chage NB CHIP from 61 to 68
2.(PAGE 38) Change 1.2V_HT Voltage and OV step
3.(PAGE 39) Change NB heatsink
4.(PAGE 31) Change CPU POWER OCP point and Loadline by following TW power test report
5.(PAGE ALL) Change 1UF 0603 to 0402

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Date: Thursday, June 03, 2010 Sheet 40 of 40
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