stop pin/ignore pin/exclude pin/float pin

blog.csdn.net/m0_61544122/article/details/128407239

The difference between stop pin, ignore pin, exclude pin and float pin is as follows:

1、Stop pins 

The stop pin is the leaf pin of the clock tree. As the end point of the clock tree, a balance
insertion delay ( latency ) is required, and the clock sink is a stop pin.

2、Ignore pins

The ignore pin is also the sink pin of the clock tree, the difference is that the ignore pin
does not do balnce.

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3、exclude pins
The exclude pin is very similar to the ignore pin, and it will not be banned, but the exclude
pin is not part of the clock tree , so even if the DRV (max transition, max cap) is modified,
it will only be processed according to the constraints of the data path.

4、float pins

For some stop pins, we need their insertion delay to be longer or shorter than the average
value of the clock tree. Such a pin is a float pin. For example, if a sram contains an
insertion delay inside, then it is necessary to let the sram do the tree during CTS is shorter
than the average insertion delay.

 For example, in the normal long tree in ICC2, the report_clock_qor -type latency report
is as follows:

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As shown above, the sram of mem_sp32x16k_wrap_u_mem_sp32x16k/CLK has internal
insertion delay (defined as max_clock_tree_path and min_clock_tree_path in .lib), so
the latency of sram after CTS is very large, even with other stop pins (cnt_reg_*_/CK)
become very long.

Make the following settings:

#1. Set mem_sp32x16k_wrap_u_mem_sp32x16k/CLK as a float pin, and set the internal

delay to 0

set_clock_balance_points -blance_points mem_sp32x16k_wrap_u_mem_sp32x16k/CLK -
delay 0

#2. Set cnt_reg_1_/CK as ignore pin

set_clock_balance_points -blance_points cnt_reg_1_/CK -consider_for_balancing false

#3. Set cnt_reg_3_/CK as exclude pin, use set_sense command, set in sdc

set_sense -stop_propagation -type clock -clock [all_clocks] [get_pins cnt_reg_3_/CK]

After CTS, report_clock_qor -type latency reports as follows:

It can be seen that the latency of mem_sp32x16k_wrap_u_mem_sp32x16k/CLK is

normal, and cnt_reg_1_/CK and cnt_reg_3_/CK do not appear in the report.

Use report_clock_timing -type latency -to cnt_reg_1_/CK to report as follows:

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cnt_reg_1_/CK is used as an ignore pin, although it is also used as a clock sink pin, but its
latency is significantly different from other stop pins, which shows that it has no balance.

Use report_clock_timing -type latency -to cnt_reg_3_/CK to report as follows:

cnt_reg_3_/CK does not appear on the clock tree as an exclude pin. It is worth noting
that, as a division of data and clock, the tool in front of the exclude pin will automatically
insert an isolation buffer, and its name can identify its function.

The naming of APS_CLK_ISO means data and clock isolation. 

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