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Ch03 2019 04 10
Ch03 2019 04 10
Ch03 2019 04 10
national Logic
Chen, Yuanyuan
chenyuanyuan@scu.edu.cn
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Combinational Circuits
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chenyuanyuan@scu.edu.cn
Combinational Circuits (cont.)
• Hence, a combinational circuit can be described by:
y1
x1
x2 .. Combinational
circuit
.. y2
xn ym
Y1=f1(x1,x2,…,xn)
Y2=f2(x1,x2,…,xn)
..
.
Ym=fm(x1,x2,…,xn)
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Combinational vs. Sequential Circuits
n-inputs m-outputs
Combinational
Circuit Storage
Elements Present
Next state
state
Sequential Circuit
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Chapter 4 Combinational Logic Analysis
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Analysis of Combinational Logic
Analysis
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E.g. Analysis the functionality of the
following circuit P1=(ABC)’
P2=A·P1=A·(ABC)’
A
F
P3=B·P1=B·(ABC)’
B
C
P4=C·P1=C·(ABC)’
F=(P2+P3+P4)’
=(A·(ABC)’+B·(ABC)’+C·(ABC)’)’
F=(A·(ABC)’+B·(ABC)’+C·(ABC)’)’
=((ABC)’(A+B+C))’
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=ABC+A’B’C’
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Giving truth table
F=ABC+A’B’C’
A B C F
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
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Combinational Circuit Design
Determine the required number of inputs and
outputs and assign variables to them.
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Combinational Circuit Design
• Design a combinational circuit that will add two tw
o-bit binary values
Solution:
1. input variables(A1,A0,B1,B0)
output variables(P2,P1,P0)
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2. Construct a truth table
Input Output
A1 A0 B1 B0 P2 P1 P0
0 0 0 0 0 0 0
0 0 0 1 0 0 1 The output SOP equations are:
0 0 1 0 0 1 0
0 0 1 1 0 1 1
0 1 0 0 0 0 1
P2=f(A1,A0,B1,B0)=∑m(7,10,11,13,14,15)
0 1 0 1 0 1 0
P1=f(A1,A0,B1,B0)=∑m(2,3,5,6,8,9,12,15)
0 1 1 0 0 1 1
0 1 1 1 1 0 0 P0=f(A1,A0,B1,B0)=∑m(1,3,4,6,9,11,12,14)
1 0 0 0 0 1 0
1 0 0 1 0 1 1
1 0 1 0 1 0 0
1 0 1 1 1 0 1
1 1 0 0 0 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 1
1 1 1 1 1 1 0
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P2 P1
B1B0 B1B0
A1A0 00 01 11 10 A1A0 00 01 11 10
00 0 0 0 0 00 0 0 1 1
01 0 0 1 0 01 0 1 0 1
11 0 1 1 1 11 1 0 1 0
10 0 0 1 1 10 1 1 0 0
A1A0 00 01 11 10
00 0 1 1 0
01 1 0 0 1
11 1 0 0 1
10 0 1 1 0
P0=∑m(1,3,4,6,9,11,12,14)
= A0B0’+A0’B0
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Combinational Circuit Design
• e.g. Design a combinational circuit that will accept a 2421
BCD code and drive a TIL-312 seven-segment display
DIGITAL w x y z
0 0 0 0 0
1 0 0 0 1
2 1 0 0 0
3 1 0 0 1
4 1 0 1 0
5 1 0 1 1
6 1 1 0 0
7 1 1 0 1
8 1 1 1 0
9 1 1 1 1
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Combinational Circuit Design
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DIGITL w x y z A B C D E F G
0 Combinational
0 0 0 Circuit Design
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
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DIGITL w x y z A B C D E F G
0 0 Combinational
0 0 0 Circuit Design
1 0 0 0 1
X 0 0 1 0
X 0 0 1 1
X 0 1 0 0
X 0 1 0 1
X 0 1 1 0
X 0 1 1 1
2 1 0 0 0
3 1 0 0 1
4 1 0 1 0
5 1 0 1 1
6 1 1 0 0
7 1 1 0 1
8 1 1 1 0
9 1 1 1 1
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DIGITL w x y z A B C D E F G
0 0 Combinational
0 0 0 0 Circuit
0 0 Design
0 0 0 1
1 0 0 0 1 1 0 0 1 1 1 1
X 0 0 1 0 X X X X X X X
X 0 0 1 1 X X X X X X X
X 0 1 0 0 X X X X X X X
X 0 1 0 1 X X X X X X X
X 0 1 1 0 X X X X X X X
X 0 1 1 1 X X X X X X X
2 1 0 0 0 0 0 1 0 0 1 0
3 1 0 0 1 0 0 0 0 1 1 0
4 1 0 1 0 1 0 0 1 1 0 0
5 1 0 1 1 0 1 0 0 1 0 0
6 1 1 0 0 0 1 0 0 0 0 0
7 1 1 0 1 0 0 0 1 1 1 1
8 1 1 1 0 0 0 0 0 0 0 0
9 1 1 1 1 0 0 0 0 1 0 0
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Combinational Circuit Design
A=∑m(1,10)+∑d(2,3,4,5,6,7) A=w’z+x’yz’
B=∑m(11,12)+∑d(2,3,4,5,6,7) B=xy’z’+x’yz
C=∑m(8) +∑d(2,3,4,5,6,7) C=wx’y’z’
D=∑m(1,10,13)+∑d(2,3,4,5,6,7) K-Maps D=xy’z+x’yz’+w’z
E=∑m(1,9,10,11,13,15)+∑d(2,3,4,5,6,7) E=x’y+z
F=∑m(1,8,9,13)+∑d(2,3,4,5,6,7) F=wx’y’+y’z
G=∑m(0,1,13)+∑d(2,3,4,5,6,7) G=w’+xy’z
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exercise
• Design a combinational circuit that will multiply tw
o two-bit binary values
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