Study Guide

EC04 804(C) Analog MOS Circuits
Guide line Prepared by Vishnu N V

Sincere Thanks to
Sindhu.L (Lecturer in ECE)

GEC Sreekrishnapuram
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Introduction*
*indicates out of syllabus
CMOS circuit design consists of defining i/ps,o/ps hand calculations, ckt simulations, layout of the ckt etc. CMOS ICs are fabricated on thin circular slices of Si called wafers. Each wafer contains individual chips or die.
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Introduction*
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MOSFET symbols*
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MODULE 1
CMOS Circuit Design Layout, and Simulation Baker,Li,Boyce
Reference
Page no 165-184
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Analog MOS models
Low frequency model.
Study Expressions for Threshold voltage VTHN,ID,beta When MOSFET is in saturation VDS>VGS-VTHN
MOS in saturation (Refer fig9.1 &9.2)
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High Frequency Model
(Page 171)
To obtain high frequency model add capacitance to the low frequency model
Capacitance b/w gate and Source Cgs
Capacitance b/w gate and drain Cgd Capacitance b/w drain and source diffusion
region Cdb,Csb Capacitance of gate over field region
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Temperature effects in MOSFET
Threshold voltage and Trance conductance parameter changes with temperature.
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Noise in MOSFETS
The noise generators in MOSFETS are due to Thermal noise and Flicker(1/f one over f noise The rms thermal noise current is generated by
the effective channel resistance(3/2.1/gm) Parasitic drain, source, gate and substrate
resistances (RD,RS,RG,RB)
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Noise in MOST..
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Noise cont
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Module 2
CMOS Circuit Design Layout, and Simulation Baker,Li,Boyce
Reference
Page no 427-488
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Current sources and Sinks
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Current sources and Sinks
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..
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Simple source..
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Simple source..
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Simple source
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Simple source
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Simple source
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Simple source
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Cascode source
To increase the output resistance of a current source or sink.
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Cascode source
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Triple Cascode
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Other Current sources or Sinks
The basic current mirror can be improved significantly with negative feedback such as
Wilson current mirror Regulated cascode
Both offer stable current values for wide voltage swings and enhanced output impedance. Regulated cascode offer higher degree of o/p impedance & current stability.
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Wilson current source
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Regulated cascode
Regulated cascode Offers significant advantages over others
1. O/p impedance is significantly higher 2. Minimum value of Vo is lower than most of

3. Higher degree of current stability.
the other configurations.
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References
In CMOS circuits we derive reference voltages from power supplies by
Resistor and MOSFET MOSFET only voltage references Band gap voltage references
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Voltage References
Voltage divider has the advantage of Simplicity Temperature insensitivity Process insensitivity But
In order to reduce the power dissipation
the resistors must be made large. Large resistance require large area in the die Not practical .
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Voltage References
The voltage divider formed between resistor and MOSFET is the same ckt used for a bias in the current mirror Ref
Page 463
A MOSFET only Reference is a voltage divider formed between an n and p MOSFETs. It has the advantage that the layout can be small.
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Biasing schemes for voltage references
The resistor-resistor, resistor-MOS,MOS only voltage references are very sensitive to the power supply voltages and temperature. So to reduce these the circuits must be properly biased.
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Current source self biasing
THREE TYPES
Threshold voltage referenced Self biasing Diode referenced Self Biasing Thermal voltage referenced Self Biasing
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Band gap References
Band gap references combine the +ve Temp Coefficient of the thermal voltage with the ve Temp Coefficient of the of the diode forward voltage in a circuit to achieve a voltage reference with a zero Temp Coefficient. Once we have a temperature independent voltage reference, with the use of an op-amp we can generate multiples of this reference.
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to be continued..
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EC04 804(C) Analog MOS Circuits

Guide line Prepared by Vishnu N V

Sindhu.L (Lecturer in ECE)

*indicates out of syllabus

CMOS Circuit Design Layout, and Simulation Baker,Li,Boyce

Analog MOS models

Low frequency model.

MOS in saturation (Refer fig9.1 &9.2)

High Frequency Model

Capacitance b/w gate and Source Cgs

Temperature effects in MOSFET

Threshold voltage and Trance conductance parameter changes with temperature.

CMOS Circuit Design Layout, and Simulation Baker,Li,Boyce

Current sources and Sinks

Current sources and Sinks

To increase the output resistance of a current source or sink.

Other Current sources or Sinks

Wilson current mirror Regulated cascode

Wilson current source

Regulated cascode Offers significant advantages over others

1. O/p impedance is significantly higher 2. Minimum value of Vo is lower than most of

In CMOS circuits we derive reference voltages from power supplies by

In order to reduce the power dissipation

Biasing schemes for voltage references

Current source self biasing

Band gap References

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