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Notes BEEE UNIT-5
Notes BEEE UNIT-5
Notes BEEE UNIT-5
SYLLABUS
BASIC ELECTRONICS:
NUMBER SYSTEMS & THEIR CONVERSION USED IN DIGITAL
ELECTRONICS,
DE MORGAN’S THEOREM
LOGIC GATES
HALF AND FULL ADDER CIRCUITS
R-S FLIP FLOP
J-K FLIP FLOP
INTRODUCTION TO SEMICONDUCTORS
DIODES
V-I CHARACTERISTICS
BIPOLAR JUNCTION TRANSISTORS (BJT) AND THEIR WORKING,
INTRODUCTION TO CC, CB & CE TRANSISTOR CONFIGURATIONS
DIFFERENT CONFIGURATIONS AND MODES OF OPERATION OF BJT
If base or radix of a number system is ‘r’, then the numbers present in that number system are
ranging from zero to r-1. The total numbers present in that number system is ‘r’.
The following number systems are the most commonly used.
1. Binary number system
2. Decimal number system
3. Octal number system
4. Hexadecimal number system
Number system Base Symbols used Weighting Factor
Binary number 2 0,1 2
Octal system 8 0,1,2,3,4,5,6,7 8
Decimal system 10 0,1,2,3,4,5,6,7,8,9 10
Hexadecimal number system 16 0,1,2,3,4,5,6,7,8,9 16
1. (1110011)2 = ( )10
𝟏 × 𝟐𝟔 + 𝟏 × 𝟐𝟓 + 𝟏 × 𝟐𝟒 + 𝟎 × 𝟐𝟑 + 𝟎 × 𝟐𝟐 + 𝟏 × 𝟐𝟏 + 𝟏 × 𝟐𝟎 = 𝟏𝟏𝟓
ANS=115
2. (11101.110)2 = ( )10
(1 × 23 + 1 × 22 + 1 × 21 + 0 × 20 ). (1 × 2−1 + 1 × 2−2 + 0 × 2−3 ) = 29.75
1. (111100111)2 = ( )8
Binary Bit 1 1 1 1 0 0 1 1 1
Equivalent Octal Bit 7 4 7
Answer = (747)8
2. (11111110101.11101)2 = ( )8
Binary Bit 1 1 1 1 1 1 1 0 1 0 1 . 1 1 1 0 1 0
Equivalent Octal
3 7 6 5 . 7 2
Bit
Ans :-( 3765.72)8
2. (164.17)8=( )16.
Octal to binary Conversion
1 6 4 . 1 7
0 0 1 1 1 0 1 0 0 . 0 0 1 1 1 1
Binary to Hexadecimal Conversion
0 0 1 1 1 0 1 0 0 . 0 0 1 1 1 1 0 0
0 7 4 . 3 12
1. (4307)8
(4×83+3×82+0×81+7×80) = (2247)10
7. DECIMAL TO BINARY NUMBER CONVERSION
Step 1 29 / 2 14 1 LSB
Step 2 14 / 2 7 0
Step 3 7/2 3 1
Step 4 3/2 1 1
Step 1 79 / 8 9 7 LSB
Step 2 9/ 8 1 1
3 B=11 .2 1
0 0 1 1 1 0 1 1 .0 0 1 0 0 0 0 1
Answer =(00111011.00100001)2
Hexadecimal to binary
A=10 2 C=12
1 0 1 0 0 0 1 0 1 1 0 0
Binary to Octal
1 0 1 0 0 0 1 0 1 1 0 0
0 5 4
5
Answer = (5054)8
2. (3𝐵. 24)16 = ( )8
Hexadecimal to binary
3 B=11 .2 1
0 0 1 1 1 0 1 1 .0 0 1 0 0 0 0 1
Binary to Octal
0 0 1 1 1 0 1 1 .0 0 1 0 0 0 0 1
3 B 2 1
LOGIC GATE
AND GATE
OR GATE
NOT GATE
XOR GATE
XNOR GATE
NAND GATE
NOR GATE
AND GATE –
It is switching circuit which provide product of input if input is A and B then Output is =A.B
A B Y=A.B
0 0 0
AND gate 0 1 0
1 0 0
1 1 1
OPERATIONS
CASE-1 - When both input low (A = 0, B = 0 ) then output low (Y = 0)
CASE-2 - When one input low (A = 0) and other high (B = 1) then output low (Y = 0)
CASE-3 - When one input high (A = 1) and other low (B = 1) then output low (Y = 0)
CASE-4 - When one input high (A = 1) and other high (B = 1) then output high (Y = 1)
It is switching circuit which provide the addition of input signal if two input A and B then
Output = A+B
A B A+B
0 0 0
0 1 1
OR gate 1 0 1
1 1 1
OPERATIONS
CASE-1 - When both input low (A = 0 , B = 0 ) then output low (Y = 0)
CASE-2 - When one input low (A = 0) and other high (B = 1) then output low (Y = 1)
CASE-3 - When one input high (A = 1) and other low (B = 1) then output low (Y = 1)
CASE-4 - When one input high (A = 1) and other high (B = 1) then output high (Y = 1)
Input Output
1 0
Inverter or NOT gate 0 1
OPERATIONS
CASE-1 - When input low (A = 0) then output low (Y = 1)
CASE-2 - When input high (A = 0) and then output low (Y = 0)
NAND GATE –
A LOGIC GATE WHICH COMBINATION OF AND GATE & NOT GATE IF A & B TWO INPUT
̅̅̅̅
THEN OUTPUT Y=𝑨𝑩
Input 1 Input 2 Output
0 0 1
0 1 1
NAND gate
1 0 1
1 1 0
OPERATIONS
CASE-1 - When both input low (A = 0, B = 0) then output low (Y = 1)
CASE-2 - When one input low (A = 0) and other high (B = 1) then output low (Y = 1)
CASE-3 - When one input high (A = 1) and other low (B = 1) then output low (Y = 1)
CASE-4 - When one input high (A = 1) and other high (B = 1) then output high (Y = 0)
The NOR gate is a combination OR gate AND NOT GATE If A & B TWO INPUT THEN
OUTPUT Y= ̅̅̅̅̅̅̅̅
𝑨+𝑩
Input 1 Input 2 Output
0 0 1
0 1 0
NOR gate
1 0 0
1 1 0
OPERATIONS
CASE-1 - When both input low (A = 0, B = 0) then output low (Y = 1)
CASE-2 - When one input low (A = 0) and other high (B = 1) then output low (Y = 0)
CASE-3 - When one input high (A = 1) and other low (B = 1) then output low (Y = 0)
CASE-4 - When one input high (A = 1) and other high (B = 1) then output high (Y = 0)
Derive basic gate using NAND gate
XOR GATE
̅ +𝑨
IF TWO INPUT A AND B THEN OUTPUT Y= 𝑨𝑩 ̅𝑩
A B ̅ +𝑨
Y= 𝑨𝑩 ̅𝑩
0 0 0
XOR gate 0 1 1
1 0 1
1 1 0
OPERATIONS
CASE-1 - When both input low (A = 0 , B = 0 ) then output low (Y = 0)
CASE-2 - When one input low (A = 0) and other high (B = 1) then output low (Y = 1)
CASE-3 - When one input high (A = 1) and other low (B = 1) then output low (Y = 1)
CASE-4 - When one input high (A = 1) and other high (B = 1) then output high (Y = 0)
1. Half adder
2. Full adder
Half adder
Step-1 Half adder it is combinational circuit which add two bit and provide two bit out put
sum and carry
Step-2 Number of Input = 2
Number of output =2
Step-3 Symbol for Input = A & B
Symbol For Output = S & C
Step -4 Block Diagram
A S
B C
Above show that figure of half adder and Input port A & B Output port S-sum & C- carry
TABLE 2.3 HALF ADDER
INPUT OUTPUT
A B SUM CARRY
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Sum Carry
B B B B
A 0 1 A 0 0
A 1 0 A 0 1
LOGIC DIAGRAM
Full adder – full adder is a combinational circuit which has three input and two output
Full adder is a combinational circuit which add three bit and two bit output one sum and other
carry
A full adder is a combinational circuit that performs the arithmetic sum of three input bits
and a carry
Design procedure of full adder
Step -1 addition of three bit
Step -2 number of input =3 number of output = 2
Step -3 symbol for input A, B, CIN symbol for output S ,C OUT
Step-4 obtain truth table
INPUT OUTPUT
A B CIN S COUT
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Step-5 obtains Boolean expression for each output from the truth table
Flip Flop It is sequential circuit which store one bit and it is combination of latch and control input
called flip flop
1. SR Flip Flop
2. D flip Flop
3. JK Flip Flop
4. T Flip Flop
SR Flip Flop
SR Flip Flop It is Sequential Cicruit Which Store One bit and it is combination of latch and control
input called SR flips flop
Truth TABLE
Output Output
Clock S R ̅+𝑪̅ )𝑸(𝒕) ̅+𝑪 ̅ )𝑸′ (𝒕)
(𝑹 (𝑺 Operation
0 0 0 𝑸(𝒕) 𝑸’(𝒕) No Change
0 0 1 𝑸(𝒕) 𝑸’(𝒕) No Change
0 1 0 𝑸(𝒕) 𝑸’(𝒕) No Change
0 1 1 𝑸(𝒕) 𝑸’(𝒕) No Change
1 0 0 𝑸(𝒕) 𝑸’(𝒕) No Change
1 0 1 0 𝑸’(𝒕) Set
1 1 0 𝑸(𝒕) 0 Reset
1 1 1 0 0 Forbidden condition
Case -1 When Clock pulse zero then latch not depend on the input and flip flop condition not
change
Case-2 When clock Pulse one menace that latch depend on the input and following condition
possible
Condition -1 when S and R zero then next state remain same not change
Condition -2 when S =1 and R=0 Then next state reset
Condition-3 When S=0 and R=1 Then Next State Set
Condition -4 When S=1 and R=1 Then Forbidden condition because both output same
Drawback
In the SR flip Flop when both input is one the flip output is forbidden condition this is called
drawback of SR Flip Flop
D flip Flop
1. 𝑄(𝑡) = (𝐷 + 𝐶̅)𝑄(𝑡)
̅ + 𝐶̅)𝑄′ (𝑡)
2. 𝑄’(𝑡) = (𝐷
Output Output
Clock D (𝐷 + 𝐶̅)𝑄(𝑡) ̅ + 𝐶̅)𝑄′ (𝑡)
(𝐷 Operation
0 0 𝑸(𝒕) 𝑸’(𝒕) No Change
0 1 𝑸(𝒕) 𝑸’(𝒕) No Change
1 0 0 𝑸’(𝒕) Set
1 1 𝑸(𝒕) 0 Reset
Case -1 When Clock pulse zero then latch not depend on the input and flip flop condition not
change
Case-2 When clock Pulse one menace that latch depend on the input and following condition
possible
Condition -1 when D=0 Then next state set
Condition-3 When D=1 Then Next State Reset
Drawback
JK Flip Flop
JK Flip Flop it is sequential circuit which store one bit and it is a combination of latch and control
input and it is eliminate delay Problem
Circuit Diagram
3. 𝑄(𝑡) = (𝐾 + 𝑄̅ + 𝐶̅)𝑄(𝑡)
4. 𝑄’(𝑡) = (𝐽 ̅ + 𝑄 + 𝐶̅)𝑄′ (𝑡)
Truth TABLE
Input to J Input to K
Q T
𝑻 𝑻 Operation
0 0 0 0 No Change
0 1 1 1 No change
1 0 0 0 No Change
1 1 1 1 Toggle [ Set /Reset ]
2. Conductors:
The valence band and the conduction band overlap each other. There is no forbidden energy
gap here so Eg=0. At absolute zero temperature large number of electrons remains in the
conduction band. The resistance of conductor is very low; large number charge carriers are
available here. So, the electricity can pass easily through the conductors. Aluminum, Silver,
etc are good conductors
Introduction to semiconductor
A Semiconductor is a substance whose resistivity lies between the conductors and insulators.
The property of resistivity is not the only one that decides a material as a semiconductor, but
it has few properties as follows.
Semiconductors have the resistivity which is less than insulators and more than
conductors.
Semiconductors have negative temperature co-efficient. The resistance in
semiconductors increases with the decrease in temperature and vice versa.
The Conducting properties of Semiconductor changes, when a suitable metallic
impurity is added to it, which is a very important property.
Semiconductor devices are extensively used in the field of electronics. The transistor has
replaced the bulky vacuum tubes, from which the size and cost of the devices got decreased
and this revolution has kept on increasing its pace leading to the new inventions like
integrated electronics.
The following illustration shows the classification of Semiconductors.
An electron, when gets shifted from a place A, a hole is formed. Due to the tendency for the
formation of covalent bond, an electron from B gets shifted to A. Now, again to balance the
covalent bond at B, an electron gets shifted from C to B. This continues to build a path. This
movement of hole in the absence of an applied field is random. But when electric field is
applied, the hole drifts along the applied field, which constitutes the hole current. This is
called as hole current but not electron current because, the movement of holes contribute the
current flow.
1. Intrinsic Semiconductors
A Semiconductor in its extremely pure form is said to be an intrinsic semiconductor. The
properties of this pure semiconductor are as follows −
The electrons and holes are solely created by thermal excitation.
The number of free electrons is equal to the number of holes.
The conduction capability is small at room temperature.
In order to increase the conduction capability of intrinsic semiconductor, it is better to add
some impurities. This process of adding impurities is called as Doping. Now, this doped
intrinsic semiconductor is called as an Extrinsic Semiconductor.
All of these free electrons constitute electron current. Hence, the impurity when added to pure
semiconductor provides electrons for conduction.
In N-type extrinsic semiconductor, as the conduction takes place through electrons,
the electrons are majority carriers and the holes are minority carriers.
As there is no addition of positive or negative charges, the electrons are electrically
neutral.
When an electric field is applied to an N-type semiconductor, to which a pentavalent
impurity is added, the free electrons travel towards positive electrode. This is called as
negative or N-type conductivity.
The boron impurity when added in a small amount, provides a number of holes which helps
in the conduction. All of these holes constitute hole current.
In P-type extrinsic semiconductor, as the conduction takes place through holes, the
holes are majority carriers while the electrons are minority carriers.
The impurity added here provides holes which are called as acceptors, because they
accept electrons from the germanium atoms.
As the number of mobile holes remains equal to the number of acceptors, the Ptype
semiconductor remains electrically neutral.
When an electric field is applied to a P-type semiconductor, to which a trivalent
impurity is added, the holes travel towards negative electrode, but with a slow pace
than electrons. This is called as P-type conductivity.
In this P-type conductivity, the valence electrons move from one covalent bond to
another, unlike N-type.
Why Silicon is Preferred in Semiconductors?
Among the semiconductor materials like germanium and silicon, the extensively used
material for manufacturing various electronic components is Silicon Si
. Silicon is preferred over germanium for many reasons such as −
The energy band gap is 0.7ev, whereas it is 0.2ev for germanium.
The thermal pair generation is smaller.
The formation of SiO2 layer is easy for silicon, which helps in the manufacture of
many components along with integration technology.
Si is easily found in nature than Ge.
Noise is less in components made up of Si than in Ge.
Types of Currents
There are two type of current in semiconductor
1. Diffusion Current
2. Drift Current
Hence, the current formed due to the diffusion of these electrons and holes, without the
application of any kind of external energy, can be termed as Diffusion Current.
2. Drift Current
The current formed due to the drift movement of charged particles electrons or holes due to
the applied electric field, is called as Drift Current. The following figure explains the drift
current, whether how the applied electric field, makes the difference.
The amount of current flow depends upon the charge applied. The width of depletion region
also gets affected, by this drift current. To make a component function in an active circuit,
this drift current plays an important role.
The P-type and N-type semiconductors, and the behavior of their carriers, let us now try to
join these materials together to see what happens.
A P-type material has holes as the majority carriers and an N-type material has electrons as
the majority carriers. As opposite charges attract, few holes in P-type tend to go to n-side,
whereas few electrons in N-type tend to go to P-side.
As both of them travel towards the junction, holes and electrons recombine with each other to
neutralize and forms ions. Now, in this junction, there exists a region where the positive and
negative ions are formed, called as PN junction or junction barrier as shown in the figure.
The formation of negative ions on P-side and positive ions on N-side results in the formation
of a narrow charged region on either side of the PN junction. This region is now free from
The following figure explains this. The graph of conduction when no field is applied and
when some external field is applied are also drawn.
With the increasing reverse bias, the junction has few minority carriers to cross the junction.
This current is normally negligible. This reverse current is almost constant when the
temperature is constant. But when this reverse voltage increases further, then a point called
reverse breakdown occurs, where an avalanche of current flows through the junction. This
high reverse current damages the device.
Reverse current is the current produced by the diode when operating in reverse biased
condition and it is indicated by Ir. Hence a diode provides high resistance path in reverse
biased condition and doesn’t conduct, where it provides a low resistance path in forward
biased condition and conducts. Thus we can conclude that a diode is a one-way device which
conducts in forward bias and acts as an insulator in reverse bias. This behavior makes it work
as a rectifier, which converts AC to DC.
During the operation, when the diode is in forward biased condition, at some particular
voltage, the potential barrier gets eliminated. Such a voltage is called as Cut-off Voltage or
Knee Voltage. If the forward voltage exceeds beyond the limit, the forward current rises up
exponentially and if this is done further, the device is damaged due to overheating.
The following graph shows the state of diode conduction in forward and reverse biased
conditions.
During the reverse bias, current produced through minority carriers exist known as “Reverse
current”. As the reverse voltage increases, this reverse current increases and it suddenly
breaks down at a point, resulting in the permanent destruction of the junction.
Bipolar junction transistors are formed by sandwiching either n-type or p-type. The
electrodes for each junction transistor are: emitter, base, and collector.
There are three modes: Cut-off mode, saturated mode, and active mode in bipolar transistor
Saturated mode
In this mode, both junctions are forward biased so current flows through the device. Hence,
transistor is in on mode and acts like closed switch. This mode is used for switch ON
application.
Active mode
In this mode, one junction (emitter to base) is forward biased and another junction (collector
to base) is reverse biased. This mode is used for amplification of current.
Cutoff mode
In this mode, both junctions are reversed biased so no current flows through the device.
Hence, transistor is in off mode and acts like open switch. This mode is used for switch OFF
application.
The direction of current indicated in the circuits above, also called as the Conventional
Current, is the movement of hole current which is opposite to the electron current.
The voltage VEE provides a positive potential at the emitter which repels the holes in the P-
type material and these holes cross the emitter-base junction, to reach the base region. There
a very low percent of holes recombine with free electrons of N-region. This provides very
low current which constitutes the base current IB. The remaining holes cross the collector-
base junction, to constitute collector current IC, which is the hole current.
As a hole reaches the collector terminal, an electron from the battery negative terminal fills
the space in the collector. This flow slowly increases and the electron minority current flows
through the emitter, where each electron entering the positive terminal of VEE, is replaced by
a hole by moving towards the emitter junction. This constitutes emitter current IE.
Hence we can understand that −
The conduction in a PNP transistor takes place through holes.
The collector current is slightly less than the emitter current.
The increase or decrease in the emitter current affects the collector current.
Operation NPN Transistor
The operation of an NPN transistor can be explained by the following figure, in which
emitter-base junction is forward biased and collector-base junction is reverse biased.
The voltage VEE provides a negative potential at the emitter which repels the electrons in the
N-type material and these electrons cross the emitter-base junction, to reach the base region.
The name itself implies that the Base terminal is taken as common terminal for both input and
output of the transistor. The common base connection for both NPN and PNP transistors is as
shown in the following figure.
The name itself implies that the Emitter terminal is taken as common terminal for both input
and output of the transistor. The common emitter connection for both NPN and PNP
transistors is as shown in the following figure.
Just as in CB configuration, the emitter junction is forward biased and the collector junction
is reverse biased. The flow of electrons is controlled in the same manner. The input current is
the base current IB and the output current is the collector current IC here.
Characteristics of CE Configuration
Just as in CB and CE configurations, the emitter junction is forward biased and the collector
junction is reverse biased. The flow of electrons is controlled in the same manner. The input
current is the base current IB and the output current is the emitter current IE here.
Characteristics of CC Configuration
VCE=VCC−ICRC
As VCC and RC are fixed values, the above one is a first degree equation and hence will be
a straight line on the output characteristics. This line is called as D.C. Load line. The
figure below shows the DC load line.
To obtain the load line, the two end points of the straight line are to be determined. Let
those two points be A and B.
To obtain A
When collector emitter voltage VCE = 0, the collector current is maximum and is equal to
VCC/RC. This gives the maximum value of VCE. This is shown as
VCE=VCC−ICRC
0=VCC−ICRC
IC=VCC/RC
This gives the point A (OA = VCC/RC) on collector current axis, shown in the above
figure.
To obtain B
When the collector current IC = 0, then collector emitter voltage is maximum and will be
equal to the VCC. This gives the maximum value of IC. This is shown as
VCE=VCC−ICRC
=VCC
This gives the point B, which means (OB = VCC) on the collector emitter voltage axis
shown in the above figure.
Hence we got both the saturation and cutoff point determined and learnt that the load line
is a straight line. So, a DC load line can be drawn.
Prof. Shravan Kumar Namdeo, ECE, IIST Indore [9098071834] Page 37
QUESTION BANK
Question-17 Differentiate between level and edge triggering. Draw the logic circuit and truth
table for JK flip flop .[ May-2019]
Question -18 Give the pin diagram and its description for IC78XX. [May-2019]