Lectures 9 To 13 - BJT

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Lecture 9, 10

BIPOLAR JUNCTION TRANSISTOR (BJT)


The BJT transistor consists of three semiconductor regions formed by two back-to-back PN
junctions. This leads to two possible configurations as shown below:

So they are respectively called pnp and npn transistors.


The three regions are termed emitter, base and collector labelled as E, B and C respectively. The
emitter is the source of majority charge carriers and hence is heavily-doped. The collector region
accepts the majority charge carriers coming from the emitter and passing through the base. Two
junctions result from such configurations namely the E/B and C/B junctions.

Transistor biasing
The following diagram shows the charge distribution of these two configurations. Based on these
charge distributions, the biasing used to operate the pnp and npn transistors can be appreciated as
well as the symbols used for them.
PNP transistor biasing

The positive terminal of the battery pushes the holes into the emitter. The collector region is
connected to the negative terminal to attract holes from the collector. In this way, the majority
charge carriers from the emitter flows to the collector region. Hence the symbol for the pnp is as
shown below. The arrow shows the direction of conventional current from the emitter to the
collector. The emitter is always the supplier of majority charge carriers as the name suggests.
The PNP transistor symbol

So the terminals other than the emitter, that is, the base and the collector, should be negatively
biased with respect to the emitter. Mnemonic: PNP, N showing that the collector and base should
be negatively biased; the collector should be more negative than the base.

NPN transistor biasing

The negative terminal of the battery pushes the conduction electrons across the transistor to the
collector region. These conduction electrons are pulled on the other side (collector side) by the
positive terminal of the battery Vcc.
Hence electrons flow from the emitter to the base or holes flow from the base to the emitter. So
arrow points from base to emitter as shown. The base and collector should be positively-biased
with respect to the emitter. Mnemonic: NPN, P showing that the collector and base should be
positively biased; the collector should be more positive than the base.

The NPN transistor symbol

NOTE: The E/B junction should be always forward-biased for majority charge carriers to flow
while the C/B junction should be always reverse-biased. The base, found in the middle region
determines whether current can flow from the emitter to the collector, though the base current is
itself so small.
The biasing rules we saw earlier, when depicted in terms of the transistor symbols are as follows:

The currents flowing in a properly-biased transistor are IE, IB and IC. In both npn and pnp
transistors, IE = IB + IC since the source of majority charge carriers is the emitter be they holes or
conduction electrons.
The base current represents a very small part of the total current (1-2%) and the rest forms the
collector current.
In the biasing circuits above, it is to be noted that the E/B junction is forward-biased and the C/B
junction is reverse-biased. The reverse-biased junction hence leads to charge flow due to
minority charge carriers as we shall see later.

Transistor circuit configurations


The biasing rules described above can be respected and different modes of operation set up
namely the common-emitter, common-base and common-collector modes. The common terminal
sits between the input and the output and is usually grounded.

Common-Base Configuration

The ratio of output to input currents is called the dc alpha (αdc) of a transistor.
αdc = -IC/IE; the negative sign is due to the collector current flowing out of transistor.
Considering only magnitudes, αdc = IC/IE
αdc is also called hFB (forward current transfer ratio in common base configuration)
The α of a transistor is hence the quality of a transistor. The closer α is to 1, the closer IE is to IC.
IC = αIE
IB = IE – IC = IE - αIE = (1-α)IE

When changes in the currents are used to compute the ratio, the ratio is called αac.
αac = -∆IC/∆IE

hFB = αdc
hfb = αac

For all practical purposes, αdc = αac = α


Common-Emitter Configuration

In this case, the input current is IB and output current IC.

Common-emitter dc forward transfer ratio, hFE (βdc) = IC/IB


and hfe = βac = ∆IC/∆IB.

The α and β parameters are for the same transistor and hence the relationship between them can
be evaluated.

α = IC/IE; β = IC/IB

β = IC/IB = IC/(IE – IC) = (IC/IE)/(IE/IE – IC/IE) = α/(1-α)

or β - αβ = α
β = α + αβ = α(1+β)
Hence α = β/(1+β)

Common-Collector Configuration

Input current is IB and output current is IE.

IE/IB = IE/IC * IC/IB = β/α = β(1+β)/β = 1+β

The transfer ratios computed are approximations as they neglect the leakage current flowing in
the reverse-biased part of the crystal. However, the errors involved in neglecting the leakage
currents are small as we shall see later through examples. First we derive the exact expressions
considering the leakage currents.

Leakage current in CB circuit

IB = (1 - α)*IE - ICBO

IB = (1 - α)*IE - ICBO

ICBO: Collector to Base with emitter open.


IC = αIE + ICBO ⇒ Exact value of α = (IC – ICBO)/IE
Leakage in CE circuit
IC = βIB + ICEO
= βIB + (1+β)*ICBO
= βIB + ICBO/(1-α)
:. IC = αIB/(1-α) + ICBO/(1-α)

IB = IE - αIE – ICEO
= (1-α)IE - ICEO

Assignment/Discussion: Thermal runaway is a phenomenon resulting due to the leakage


currents. Using the equations we derived and the effect due to temperature increase, explain this
phenomenon.

Examples
(a) An NPN transistor is connected in common-emitter mode. The leakage current is 10 µA
and the β-value is 150. The base current is 1mA. Calculate the collector and emitter
currents.
(b) A PNP transistor is connected in the common-base mode. The leakage current recorded is
8µA and. The emitter and collector currents are 1.8mA and 1.75mA respectively.
Calculate the base current and the current transfer ratio. If the transistor is now connected
in the common-emitter mode, what is the value of the leakage current?
Lecture 11, 12

Test Circuits
Test circuits enable to analyse the characteristics of the transistor in the different modes. From
the characteristics thus derived, the transistor parameters can be calculated for the input, output
and the current transfer characteristics.

Common-Base Test Circuit


The test circuit allows setting up the input characteristics IE/VBE variation with VCB constant,
output characteristics IC/VCB with IE constant and finally the current transfer characteristics IC/IE
variation with VCB held constant.

(a) Input Characteristics


This is the variation of IE with VBE. The characteristics curve obtained is that of a PN junction in
the forward mode.
Gradient of the graph gives the input resistance of the transistor.

(b) Output Characteristics


Variation of IC with VCB when IE is held constant. The current IE flows under the application of
voltage VBE and almost the total flow of current passes to the collector. Hence VCB only
influences the current IC by the effect of surface impurities which behave according to Ohm’s
Law. Hence basically the current IE is measured and the graph clearly shows the junction in
reverse-bias with the initial saturation region, cut-off region and finally breakdown.
Parameters obtained from graph
The output resistance of the transistor is given by the reciprocal of the gradient of the horizontal
part.
Rout = ∆VCB/∆IC
Q. In the saturation region, it is seen that a negative VCB should be applied to cause a zero IC
current. Why?
Hint: Effect of barrier voltage in C/B junction.

The leakage current ICBO can also be found when IE is set to zero.
Finally the αac = ∆IC/∆IE can be found from the characteristics.
In summary, it can be said that IC is practically independent of VCB in the working range (cut-off
region) though increasing VCB beyond the breakdown voltage causes a sudden increase in IC as
expected in the breakdown region.

(c) Current transfer characteristics


This shows how the output IC varies with the input current IE with VCB held constant.
The slope of the graph IC v/s IE gives the αac and hence a straight line is expected as shown.

αac = ∆IC/∆IE
Common-Emitter Test Circuit

For the common-emitter circuit, the following are the characteristics curves:
1. Input characteristics: Variation of IB with VBE with held VCB constant.
2. Output characteristics: Variation of IC with VCE with IB held constant.
3. Current transfer characteristics: Variation of IC with IB.

Assignment/Discussion: Based on the description for the common-base mode, repeat the same
kind of treatment for the following stating which parameters, if any, can be obtained from each
characteristics curve: (a) Input characteristics (b) Output characteristics (c) Current transfer
characteristics.

Common-Collector Characteristics

(a) Input characteristics


Variation of IB with VCB for different values of VCE.
VCE = VCB + VBE ⇒ VCB = VCE – VBE.
So the value of VCB is dependent on VCE.
The following plot is obtained.
The emitter is the source of charge carriers and hence affects the input characteristics through
VCE largely. This is why this characteristics curve for CC is different to that of a CE or CB.
VCB = VCE – VBE
For a given value of VCE,

VCB = const. – VBE


VBE determines the base current. Hence increasing VCB leads to VBE reducing as so does IB. IB
reaches zero when VBE is not enough to sustain a flow of charge across the depletion layer.

(b) Output characteristics


The output characteristics curve shows the variation of IE with VCE for several values of IB.
IC/IE = α
IC/IB = β
⇒ IC/IB x IE/IC = β/α
⇒ IE/IB = β/α

Also IE/IB = (IC + IB)/IB = IC/IB + 1 = β + 1

Hence IE = (β + 1).IB
(c) Current Transfer Characteristics
The current transfer characteristics curve is the variation of IE versus IB when VCE is constant and
hence is similar to that of the CE configuration.

Some transistor circuits…


(a)

Connection mode: common-base


Base is at zero volts.

Applying Kirchhoff’s voltage law:


On the input side,

10 = IE*20x103 + 0.7
⇒ IE = (10 – 0.7)/20x103 = 0.465 mA

On the output side,

-VCB – IC*10K + 25 = 0
⇒ VCB = 25 – IC*10K
≈ 25 – IE*10K
= 25 – 0.465x10-3*10x103
= 25 – 4.65
= 20.35V

(b)
What value of RL causes VCB = 5V. Take α Find the value of RE which causes VBC = 10V
to be 0.97
-VBE – IE*10 + 10 = 0 -VBC = IC*20 + 20 = 0
VBE = 0.7V ⇒ -10 – IC*20 + 20 = 0
⇒ IE = (10 – 0.7)/10 = 0.93 mA IC = (20-10)/20 = 0.5 mA

IC/IE = α = 0,97 Assuming α ≈ 1


⇒ IC = 0.97*0.93 = 0.902 mA ⇒ IE ≈ IC

Hence VCB + IC*RL – 20 = 0 ∴VBE + IE*RE -20 = 0


⇒ RL = (20 – VCB)/IC = (20 – 5)/0.902 ⇒ RE = (20 – 0.7)/0.5 KΩ = 38.6 KΩ
= 16.6 KΩ
(c)

Find (i) IB (ii) IC (iii) IE (iv) VCE

(i) VBE + IB*RB – 10 = 0


⇒ IB = (10 – VBE)/1 µA
= 9.3 µA
(ii) IC = βIB (neglecting leakage current)
= 100*9.3 µA
= 930 µA
= 0.93 mA
(iii) IE = IB + IC
= 9.3 + 930 µA
= 939.3 µA
= 0.94 mA
(iv) VCE + IC*10K – 15 = 0
⇒ VCE = 15 – IC*10x103
= 15 – 930x10-6*10x103
= 5.7V
Q. Find IB, IE, VCE, VE and VB for the following circuit in common-collector mode. Take β as 49
and VBE = 0.7V
Lecture 13
Operating mode of a BJT transistor
Consider the following circuit showing an NPN transistor in common-emitter mode.

Writing the equation for the collector current gives:

VCE + ICRE – VCC = 0


⇒ VCE = VCC – ICRL

The transistor is said to be in cut-off region if the base current is zero and making IC zero. No
current flows across the resistor and hence VCE takes the whole supply voltage.
Hence VCE = VCC at cut-off.
Now the value of IC can be such that VCE is made zero. The value of IC causing this condition is
equal to VCC/RL.
When VCE = 0, the transistor is said to be saturated since IC reaches a maximum limiting value.
Increasing IC further leads to negative values of VCE and the transistor is then said to be well in
saturation.

In summary, the value of VCE can help in saying in which operating region the transistor is.

These conditions can be depicted on a graph of IC against VCE. The following table shows the
different critical values of IC and the corresponding operating modes.

IC Remarks
IC = 0 Transistor not working, cut-off region, VCE = VCC
IC = VCC/RL Transistor working fully; saturated and VCE = 0V
0 < IC < VCC/RL Active region of transistor where VCE lies in between
0V and VCC.
IC > VCC/RL Transistor well into saturation.

The graph of IC against VCE is a straight line.


VCE + ICRC = VCC
⇒ IC = -VCE/RC + VCC/RC
As IC changes in the circuit, the operating point shifts up or down along the dc load line. The
transistor should be operated in the active region and any variation in the value of IC should be
within the active region. So the best position for this point is midway between the cut-off and
saturation points where VCE = ½VCC.

Quiescent point
The Quiescent point is a point on the dc load line, representing values of IC and VCE that exist in
a transistor when no input signal is applied.

Example:

Draw the dc load line and locate its quiescent point.

0 + VCB + IC*5 – 20 = 0
⇒ VCB + IC*5 = 20
Cut-off point: IC = 0, VCB = VCC = 20V

Saturation point: VCB = 0, IC = VCC/RL = 20/5 mA = 4 mA

To locate the working point, calculate the value of IC and VCB for the given values,
-VBE – IE*15 + 30 = 0
⇒ IC = (30 – 0.7)/15 ≈ 30/15 = 2 mA (neglecting VBE)

VCB + IC*5 – 20 = 0
⇒ VCB = 20 – IC*5
= 20 – 2*5
= 10 V

Locating the Q-point in the middle of the dc load line ensures that for a changing input signal,
the same positive and negative swings can be permitted. Otherwise, the allowed swing is not
symmetrical for increases and decreases of IC from the working point. The three cases are shown
below:

Example:

In the CB circuit, find


(a) dc operating point and dc load line.
(b) maximum peak-to-peak unclipped signal.
For the transistor to operate as desired, it should be properly-biased. A point to consider when an
ac signal is applied to a dc-biased transistor is that an ac source often acts as a short to dc.
Therefore the coupling capacitor is needed to prevent upsetting the dc bias. The capacitor C acts
as an open for dc and a short for ac source.

Connecting an ac signal to a dc-biased transistor circuit.


The previous example shows the connection of an ac signal to such a dc-biased and the
importance of the coupling capacitor so as not to disturb the dc bias. The output then takes place
about that dc bias condition. Let’s consider an example where we compute the dc bias and then
compute the ac signal output for an ac input.

Sketch the waveform for VCE if a sinusoidal input signal of 0.1V peak value is applied to the
circuit. Take β = 100 and voltage gain AV = 100.

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