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A High-Speed Gate Driver With PCB-EmbeddedRogowski Switch-Current Sensor For A 10 KV, 240A, SiC MOSFET Module
A High-Speed Gate Driver With PCB-EmbeddedRogowski Switch-Current Sensor For A 10 KV, 240A, SiC MOSFET Module
I. I NTRODUCTION
Owing to the booming technology of wide-bandgap (WBG)
semiconductor devices and packaging, silicon-carbide (SiC)
MOSFETs have demonstrated their superior performance to Si
IGBTs in terms of higher breakdown voltage, faster switching Fig. 1. PEBB6000 system architecture diagram.
speed, lower switching loss and higher operating temperature
[1] [2]. The high blocking voltage of SiC MOSFETs simplifies
converter power stage by using uncomplicated topologies,
As seen in Fig. 1, four gate drivers are needed to drive
and meanwhile their high switching frequency preserves the
the four SiC MOSFET switches in two XHV-6 modules. Gate
overall harmonic performance despite of reduced number of
driver is the critical interface between power semiconductor
voltage levels. Recently, Wolfspeed has developed a 10 kV,
devices and control signals. It serves to provide galvanic
240 A SiC MOSFET module XHV-6, which uses their 3rd-
isolation and to supply driving current while maintaining
generation 10 kV, 350 mΩ SiC MOSFETs [1] with an im-
signal integrity under high-noise environment. For the XHV-
proved package layout [3]. This device is suitable to construct
6 module, three submodules that contain 18 10 kV, 350
converters such as a 6∼7 kV dc, 3.3 kV ac motor drive
mΩ SiC MOSFET dies need to be driven simultaneously.
by using a simple three-phase two-level topology. In this
The driving current magnitude, driving signal synchronization,
research work, the device serves as a critical component in a
driving loop parasitics, and common-mode noises become big
power electronics building block rated at 6 kV dc bus voltage
challenges. On top of those basic tasks, a gate driver can
(PEBB6000) as shown in Fig. 1 [4]. The power-stage topology
also provide quick, reliable, and configurable protections, as
is an H-bridge that consists of two XHV-6 modules. The three
well as advanced switch-current signal sensing, digital data
submodules of each module are paralleled by internal jumpers
processing, and active gate controllability, which define a
within the device package.
“smart” gate driver. Taking those factors into consideration,
This material is based upon research supported by the U.S. Office of Naval Table. I summarizes the specifications and design objectives
Research under award number N00014-16-1-2939. of the gate driver for the XHV-6 module.
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TABLE I
S MART G ATE D RIVER S PECIFICATIONS
Fig. 2. Smart gate driver power architecture for XHV-6 SiC MOSFET module.
There have been a few research efforts published regarding
gate drivers for SiC MOSFETs of no less than 10 kV.
Wolfspeed has fabricated a gate driver evaluation board and
corresponding gate driver power supply to demonstrate how
the XHV-6 module can be driven [5]. The gate driver board has !
two pairs of fiber-optic transceivers to realize signal isolation.
It connects to XHV-6 module’s MCX gate connectors via "
coaxial cables. This design allows for flexible connections "
even if the driver board is mounted in distance from the XHV-
6 module, nonetheless, the gate-loop inductance is still tens of
nanohenry because of the long coaxial cables. The correspond-
ing gate driver power supply is a voltage-transformer-based
converter, and as such the distance between the transformer’s
input and output interfaces has to meet clearance and creepage
standards. That results in an a large size of the gate driving
system. [6]- [8] have presented similar designs with even lower
driving current magnitude. Another type of gate driving system
supplied by a current source has been demonstrated in [9] and
[10], where a high-voltage current-source cable is leveraged
to achieve high insulation and isolation strength. Wireless Fig. 3. Gate driver signal architecture for XHV-6 SiC MOSFET module.
[11] and fiber-optic [12] power transfer techniques are also
proposed to serve the same purposes, but the system density
and power ratings are still limited. as a large amount of analog and digital signals are processed
In the literature review, the HV gate driving system designs on the board. Tens of millivolt noise voltage is high enough
are typically partitioned into the HV gate driver design and to cause inaccurate sensing. The design refers to the analysis
HV power supply design. Both designs are pursuing greater and follows the solution that have been published in [13]. As
performance and lower profile. For the driving system, the gate shown in Fig. 2, for each gate driver channel, two isolated
driver board is grounded on the MOSFET source, and the HV ground planes have been designed. On the green plane, most
isolation is realized by the power supply that feeds the gate of signal processing components and logic units with voltages
drivers. This paper only concentrates on the gate driver design at ±5 V, 3.3 V, and 1.2 V are located. On the red plane, the
that includes its system architecture, noise-immunity design, components designed for providing driving current and voltage
current boosters, as well as the RSCS and the digital processor at +20 V and −5 V are placed. The components on the red
that bring the intelligence. plane are much less sensitive than those on the green, so it is
preferred that the CM noise current primarily flows through
II. G ATE D RIVER P OWER AND S IGNAL A RCHITECTURE
red plane to the input power connector at the high side. The
A. Power architecture CM impedance of the red ground path is dominated by a few
A well planned gate driver architecture design is able to nanohenry trace inductance, whereas the CM impedance of the
bypass common-mode (CM) noise current away from sensitive green ground path is determined by several picofarad input-
components. This is even more critical for a smart gate driver output capacitance of isolated power supplies, the gate driver
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Fig. 6. Current sharing test of three current booster banks.
Fig. 4. Paralleled current booster circuit diagram for three submodules.
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Fig. 7. Rogowski switch-current sensor (RSCS) fundamentals
BJTs. Rg1,ext and Rg2,ext are split gate resistors to damp coil that is a high-load-impedance current transform, and
the resonance between the three paralleled gate loops. Rg1,ext equivalently performs as an inductor with the value of mutual
determines the turn-on speed, while Rg1,ext and Rg2,ext jointly inductance. Fig. 13 shows that a one-turn conductor current
determine the turn-off speed. Fig. 5 shows the PCB layout of that flows out of the orange window as annotated by the red
the current boosters. Three current-booster banks are placed arrow generates a flux, and the coil couples the flux along
in a wide area adjacent to a MCX gate/source connector. with the orange trace. A did /dt voltage scaled by the mutual
BJT ICs, decoupling capacitors, gate resistors, and internal inductance M is induced at the terminal of the coil where id
power/ground planes are laminated at the same area to ensure is the MOSFET drain current. For the HV design, the coils
extremely low turn-on and turn-off gate loop inductance. are embedded in the inner four layers of the PCB, constructed
The current sharing test results of three current booster by buried traces and vias, and not exposed to the surface. This
banks are shown in Fig. 6. The gate driving currents of design eliminates creepage paths between the high-voltage
submodule A, B and C have been obtained by measuring the primary-side conductor and the secondary-side coil, especially
across voltages of three gate resistors Rg,ext , using passive for the high-side switch current measurement. The second part
probes referred to the joint point “COM” as the ground. The of the RSCS is a group of signal processing circuits that
three gate currents are almost overlapped with one another, include an active integrator circuit, a reset switch, and a proper
presenting the total turn-on current peak of 36 A, and the signal filter, shown in Fig. 7. The active integrator converts the
total turn-off peak current of 48 A. M did /dt value back to id .
Fig.. 8 shows the frequency-domain characteristics of the
IV. ROGOWSKI S WITCH -C URRENT S ENSOR
RSCS. The Rogowski coil is fundamentally an inductor whose
A Rogowski switch-current sensor (RSCS) has been pro- impedance increases with frequency at a +20 dB/dec slope,
posed to work effectively together with SiC MOSFET modules before reaching the double-pole caused by the leakage induc-
[14] [15]. The high bandwidth, wide measurement range, good tance and equivalent paralleled capacitance (EPC). The active
accuracy, and solid signal isolation make it an excellent short- integrator is basically a capacitor whose impedance droops at
circuit current detector for SiC devices. As depicted in Fig. 7, a −20 dB/dec. The non-ideal characteristics of the OpAmp yield
RSCS mainly comprises two parts. The first part is a Rogowski a limited dc gain. The overall RSCS transfer function vsen /id
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Fig. 10. Gate driver layout plan
Fig. 11. Assembled gate driver prototype including device module, two gate Fig. 12. Side-view of the gate driver prototype.
driver boards and one Rogowski coil board.
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Fig. 14. Comparison between RSCS and commercial Rogowski probe on
submodule A in double-pulse test: Rg,eqv = 1 Ω, Vdc = 6 kV, id of f,A =
40 A (120 A total), id on,A = 80 A (240 A total), turn-off dv/dt = 50
V/ns, turn-on di/dt = 2.4 A/ns.
Fig. 13. Experiment setup for double-pulse test [2] H. Mirzaee, A. De, A. Tripathi, and S. Bhattacharya, “Design com-
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SiC-MOSFET/SiC-JBS diode,” IEEE Trans. Ind. Appl., vol. 50, no. 4,
three MCX connectors, and plugged into the Rogowski coil pp. 2728-2740, 2014.
board with three three-pin headers. The side-view in Fig. 12 [3] B. Passmore, et al., “The next generation of high voltage (10 kV) silicon
carbide power modules,” in IEEE Workshop on WBG Power Devices
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VI. E XPERIMENTAL VALIDATION [6] J. Afsharian, N. Zaragari, and W. Bin, “A special high frequency soft-
switched high-voltage isolated DC/DC power supply for multiple GCT
Double-pulse test (DPT) has been conducted to validate gate drivers,” in Proc. of IEEE ECCE, 2010, pp. 2441-2445.
[7] K. Mainali, et al., “A Transformerless Intelligent Power Substation:
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performance. The test diagram is shown in Fig. 14. A half- Electronics Magazine, vol. 2, no. 3, pp. 31-43, Sept. 2015.
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C ONCLUSIONS [12] X. Zhang et al., “A 15 kV SiC MOSFET gate drive with power over fiber
based isolated power supply and comprehensive protection functions,”
The paper has demonstrated the critical design consider- IEEE Trans. Appl. Power Electron. Conf. Expo. (APEC), Long Beach,
ations and solutions of the gate driver for a 10 kV, 240 CA, 2016, pp. 1967-1973.
A, SiC MOSFET module. The design results successfully [13] J. Wang, Z. Shen, R. Burgos, and D. Boroyevich, “Gate driver design
for 1.7kV SiC MOSFET module with Rogowski current sensor for
validate the high-amplitude but balanced current boosters, as shortcircuit protection,” in Proc. Applied Power Electron. Conf. and
well as the high-bandwidth-and-accuracy Rogowski switch- Expo., 2016, pp. 516-523.
current sensor. Sensing the switch current signal provides a [14] J. Wang, Z. Shen, R. Burgos and D. Boroyevich, “Design of a high-
bandwidth Rogowski current sensor for gate-drive shortcircuit protection
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conversion systems. Wide Bandgap Power Devices and Appl., 2015, pp. 104-107.
[15] J. Wang, Z. Shen, R. Burgos and D. Boroyevich, “Integrated switch
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