CpE107-2 – Logic Circuits & Switching Theory

Professor: Engr. Rafael G. Maramba

Completion Module 2 Set 2A
Problem 1 Use D-type flip-flops to design a 4-bit counter (A, B, C, D) with the
repeated binary sequence: 0, 1, 2, 4, 8. Determine the next state
for flip-flops A, B, and C in POS. Only the required next state of
flip-flops should be shown on your answer sheet. Show the
necessary truth table (with complete entries) to support your answer.
Clearly label all groups on your map. Draw the complete entries and
grid lines for table and maps. 60 pts.

Present State Next State

m
A B C D A B C D

Required format of the truth table in Prob. 1. List the present-state entries in ascending order.
No other information should be shown on the table except those indicated above.

Problem 2. Derive the state table of a sequential circuit with the behavior show below.
40 pts.

Present State Input Next State Output

X Y A X Y B

Required format of the state table in Problem 2. The combination of present-state and input sections
should be in listed ascending order. Show complete grid lines
No other information should be shown on the table except those indicated above.
.
Observe the usual examination reminders.
Strictly observe the time limit.
Use the regular size bond paper for your answer sheets.
One problem per page.
Avoid overlapping entries.
Always encircle/box your final answer whenever possible.
Review your work before uploading in .pdf format
“Success is not about the end result, it is about what you learn along the way.”
- A.P. J. Abdul Kalam