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UNIT III

26. According to boolean law: A + 1 = ?


(a) 1 (b) A (c) 0 (d) A’
Answer: (a) 1

27. DeMorgan’s theorem states that _________


(a) (AB)’ = A’ + B’ (b) (A + B)’ = A’ * B (c) A’ + B’ = A’B’ (d) (AB)’ = A’ + B
Answer: (a) (AB)’ = A’ + B’

28. The boolean function A + BC is a reduced form of ____________


(a) AB + BC (b) (A + B)(A + C) (c) A’B + AB’C (d) (A + C)B
Answer: (b) (A + B)(A + C)

29. There are ______ cells in a 4-variable K-map.


(a) 12 (b) 16 (c) 18 (d) 8
Answer: (b) 16

30. Don’t care conditions can be used for simplifying Boolean expressions in ___________
(a) Registers (b) Terms (c) K-maps (d) Latches
Answer: (c) K-maps

UNIT IV

31. Total number of inputs in a half adder is __________


(a) 2 (b) 3 (c) 4 (d) 1
Answer: (a) 2

32. If A and B are the inputs of a half adder, the sum is given by __________
(a) A AND B (b) A OR B (c) A XOR B (d) A EX-NOR B
Answer: (c) A XOR B

33. Half subtractor is used to perform subtraction of ___________


(a) 2 bits (b) 3 bits (c) 4 bits (d) 5 bits
Answer: (a) 2 bits

34.The output of a full subtractor is same as ____________


(a) Half adder (b) Full adder (c) Half subtractor (d) Decoder
Answer: (b) Full adder

35. BCD adder can be constructed with 3 IC packages each of ____________


(a) 2 bits (b) 3 bits (c) 4 bits (d) 5 bits
Answer: (c) 4 bits

36. The output sum of two decimal digits can be represented in ____________


(a) Gray Code (b) Excess-3 (c) BCD (d) Hexadecimal
Answer: (c) BCD
37.The addition of two decimal digits in BCD can be done through ____________
(a) BCD adder (b) Full adder (c) Ripple carry adder (d) Carry look ahead
Answer: (a) BCD adder

38. If the number of n selected input lines is equal to 2^m then it requires _____ select lines.
(a) 2 (b) m (c) n (d) 2n
Answer: (b) m

39. 4 to 1 MUX would have ____________


(a) 1 output (b) 2 outputs (c) 3 outputs (d) 4 outputs
Answer:( a) 1 output

40. The word demultiplex means ___________


(a) One into many (b) Many into one (c) Distributor (d) One into many as well as Distributor
Answer: (d) One into many as well as Distributor

UNIT V

41. When both inputs of a J-K flip-flop cycle, the output will ___________
(a) Be invalid (b) Change (c) Not change (d) Toggle
Answer: (c) Not change

42. A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?
(a) AND or OR (b) XOR or XNOR (c) NOR or NAND (d) AND or NOR
Answer: (c) NOR or NAND

43. Whose operations are more faster among the following?


(a) Combinational circuits (b) Sequential circuits (c) Latches (d) Flip-flops
Answer: (a) Combinational circuits

44. The sequential circuit is also called ___________


(a) Flip-flop (b) Latch (c) Strobe (d) Adder
Answer: ( b) Latch

45. If Q = 0, the output is said to be ___________


(a) Set (b) Reset (c) Previous state (d) Current state
Answer: (a) Set

46.  The characteristic equation of S-R latch is ____________


(a) Q(n+1) = (S + Q(n))R’
(b) Q(n+1) = SR + Q(n)R
(c) Q(n+1) = S’R + Q(n)R
(d) Q(n+1) = S’R + Q'(n)R
Answer: (a) Q(n+1) = (S + Q(n))R’

47. The characteristic of J-K flip-flop is similar to _____________


(a) S-R flip-flop (b) D flip-flop (c) T flip-flop (d) Gated T flip-flop
Answer:(a) S-R flip-flop

48.  A counter circuit is usually constructed of ____________


(a) A number of latches connected in cascade form
(b) A number of NAND gates connected in cascade form
(c) A number of flip-flops connected in cascade
(d) A number of NOR gates connected in cascade form
Answer: (c) A number of flip-flops connected in cascade

49. Ripple counters are also called ____________


(a) SSI counters (b) Asynchronous counters (c) Synchronous counters (d) VLSI counters
Answer: (b) Asynchronous counters

50. The register is a type of ___________


(a) Sequential circuit (b) Combinational circuit (c) CPU (d) Latches
Answer: (a) Sequential circuit

51. A shift register is defined as ___________


a) The register capable of shifting information to another register
b) The register capable of shifting information either to the right or to the left
c) The register capable of shifting information to the right only
d) The register capable of shifting information to the left only
Answer: (b) The register capable of shifting information either to the right or to the left

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