019722, 159 AM How to apply and remove clock uncertainty during dtferent ming checks. How to apply and remove clock uncertainty during different timing checks How To... How is the clock uncertainty (skew) applied and removed? What are the different variables related to the clock uncertainty used during the different checks? Answer Specifying the clock uncertainty ‘The clock uncertainty (skew) on the clock network is specified by the set_clock_uncertainty command. For ‘example, to set a simple clock uncertainty of 0.5 for all paths leading to endpoints clocked by the vol x clock, use the following command: ck_uncertainty ~setup 0.5 [get_clocks v You can see from the timing report that the uncertainty has been applied: > report timing -from u0/Q -to wl/D Endpoint: wi/D (*) checked w: Beginpoint: u0/Q (*) triggered by Groups: {velk} Analysis Vie\ £ view setup Other End Arrival Time = setup eading edge of fing edge of 'v ~ uncert: 00 Required Time 4 ~ Arrival Time 04 Slack Time 305 Removing the clock uncertainty Use the reset_clock uncertainty command to remove the assertions that were made by the previous set_clock uncertainty commands. For example, you can remove the clock uncertainty using the following ‘command: > reset k_uncertainty ~setup ks velk] You can see from the timing report that the uncertainty has been removed: > report_timing -from w0/Q -to ul/D ul/D (*) checked w: ling edge of 'velk' Beginy u0/Q (*) triggered by leading edge of 'vclk’ Path Groups: {vclk} Analysis View: dt view setup Other End Arrival Time 0.002 0.048 + Phase Shift 8.000 Required Time 953 ~ Arrival Time 3.048 Slack Time als Uncertainty on the self-loop path In hold analysis, the launch and capture edges of the clock are same. You may want to remove the pessimism due to the Uncertainty ifthe launch and capture edges of the clock are same. You can removelignore the clock uncertainty for hold analysis if there is a self loop (data path originating on a sequential element and ending on the data pins of the same element) by setting the timing sel loop_paths_no_skew global to true, hitpsssuppor.cadence.com/apex/ArticlaAtlachmentPortal7d=at Od0000000USVSEAA 19019722, 159 AM How to apply and romave clock uncertainty during dtferent ming checks. > set_global timing self op_paths_no_skew true ‘The default value of this global is false Example: Apply a clock uncertainty on the ve clock: ck_uncertainty 0.6 ‘The hold analysis report shows the above uncertainty is applied on the self-loop path: > report_timing -from u0/Q -to u0/D -early Path 1: VIOLATED Hold Check with Pin u0/CK Endpoint: w0/D (v) checked w: eading edge of 'vclk* red by leading edge of ‘v: Beginpoint: 0/9 (v) tr: et Path Groups: {vclk} Analysis Viet Other End Arrival Time 0.012 + Hold 0.042 + Phase Shift 0.000 + Uncertainty 0.600 = Required Time 0 Set the timing self loop _paths_no_skew global to true to remove the pessimism due to the uncertainty: > set_global timing_self_loop_paths_no_skew true ‘The Hold analysis report now removes the uncertainty: > repert_timing ~from u0/Q -to uo/D Hold Check with Pin u0/c uo/D (v) checked with leading edge of 'velk* u0/Q (v) triggered ag Groups: (velk} early yeis View: demf_view hold Other End Arrival Time 0.012 + Hold 0.042 | Phase Shift 0.000 + Uncert: (Self Loop) 0.000 Required Time 0.030 Uncertainty on the clock checks path By default, the tool does not consider the clock uncertainty when performing the clock (period, pulse width, skew and separation) checks as shown in the following timing report of the clack period check > report_timing ~check_type clock_period path 1: VIOLATED Clockeriod Check with Pin U1/CK Ending Clock Bdge: — U1/CK (v} ch Beginning Clock Page: U1/CK (v) triag path Groups: (CK WAVE Other End Arrival Time 2.500 = ClockPeriod 10.000 + Phase Shift 5.000, = Required Time 500 You can consider the clock uncertainty by setting the timing_enable_uncertainty_: true. ‘or_clock_checks global to ple_uncertainty > set_global timing_e true ‘The default value of this global is False ‘The clock period check report now considers the uncertainty value: hitpsssuppor.cadence.com/apex/ArtclaAtlachmentPortal7d=at Od0000000USVSEAA 20019722, 159 AM How to apply and romave clock uncertainty during efferent ming checks. > report_timing -check_type clock_period ath 1: VIOLATED ClockPeriod Check with Pin U1/ck Ending Clock Bdge: U1/CK (v) checked with trailing edge of ‘CK WAVE" inning Clock Bdge: U1/CK (v} d by trailing edge of ‘CK WAVE" path Groups: (CK WAVE Other End Arrival Time ~ ClockPeriod + ift - nty Uncertainty for the Minimum Pulse Width (MPW) checks By default, the tool by does not consider the clock uncertainty when performing the MPW checks. You can set the timing enable uncertai > set_g timing enable uncertainty for_pulsewid ‘The default value of this global is ¢alse Return to the top of the page hitpsssuppor.cadence.com/apex/ArtclaAtlachmentPortal7d=at Od0000000USVSEAA for pulsewidth checks global to true to consider the clock uncertainty: Er