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Contents
Introduction…………………………………………………………………………………………………………………………………………..3

Task 2…………………………………………………………………………………………………………………………………………………….3

Task 3…………………………………………………………………………………………………………………………………………………….9

Task 4……………………………………………………………………………………………………………………………………………………12

Bibliography………………………………………………………………………………………………………………………………………….13

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Introduction:
According to present information we mentioned the 2 addressing and 0 addressing device with
rationalization and withinside the 2d element upload the overall critiques on studies paper of
GPU and at the least answer of numerical question. Operating structures (OS) are experiencing
splendid adjustments with fast era advancements. Initially running structures have been layout to
fulfill simple requirement of customers however as time passes person necessities have modified
and aren't constrained to neighborhood device base applications or services.

The person connects to the Internet and "runs" the programmer from a cloud server if and while
appropriate, perhaps even saving their documents withinside the cloud to every other running
device OS. The OS manages the hardware, CPU, reminiscence, difficult disc, peripherals, in
addition to parts, along with printers and cameras. An guidance’s operation discipline determines
the operation to be done. This manner is performed on such statistics contained in device
registers or withinside the foremost reminiscence. One of the maximum vital sorts of pc era, each
for non-public and enterprise pc, has been the pix processing unit, or GPU.

Task 2:
Where X corresponds to the operand’s letter. In this case, the ADD training effects in an AC
AC + M[X] operation. AC is the collector record and the recollection term stored at address X is
symbolized by M[X].

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M [] is any memory location

Solution:

2 address directions are the best mutual in profitable computers.

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The program to evaluate X = (A + B) / (C + D) * C + F)) is as follows:

MOV R1, M R1 ← M [M]

ADD R1, O R1 ← R1 + M [O]
MOV R2, A R2 ← M [A]
ADD R2, L R2 ← R2 + M [L]
MUL R1, R2 R1 ← R1∗R2
MOV X, R1 M [X] ← R1
DIV y, C + F [y]—R1

MOV R1, M R1 = M[M]

ADD R1, O R1 = R1 + M[O]

MOV R2, A R2 = A

ADD R2, L R2 = R2 + L A

MUL R1, R2 R1 = R1 * R2

MOV X, R1 M[X] = R1

MOV R1, M R1 = M[M]

ADD R1, O R1 = R1 + M[O]

MOV R2, A R2 = A

ADD R2, L R2 = R2 + L

MUL R1, R2 R1 = R1 * R2
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MOV X, R1 M[X] = R1
Expression: X = (A+B)*(C+D)

Postfixed: X = AB+CD+*

TOP means top of stack

M[X] is any memory location

PUSH M TOP = M

PUSH O TOP = O

ADD TOP = A+B

PUSH A TOP = A

PUSH L TOP = L

ADD TOP = A+L

MUL TOP = (A+L)*(M+O)

POP X M[X] = TOP

Solution:

The following program shows how X = (A + B) ∗ (C + D) will be written for a stack organized
computer.

PUSH A TOS ← M

PUSH B TOS ← O

ADD TOS ← (M + O)

PUSH C TOS ← A

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PUSH D TOS ← L

ADD TOS ← (A + L)

MUL TOS ← (A + L) ∗ (M + O)

POP X M [X] ← TOS

To evaluate arithmetic expressions in a stack computer, it is necessary to convert the expression

into reverse Polish notation. The name “zero-address” is given to this type of computer because
of the absence of an address field in the computational instructions.

A. Write your reflection on the different addressing modes by size in terms of

performance and occupation of memory.

Addressing Modes– The word addressing modes denotes to the method in which the operand of
an training is quantified. The addressing mode requires a instruction for understanding or
changing the address field of the training before the operand is really implemented.
AM for 8086 instructions are divided into 2 types:
1) AM for data

2) AM for branch

The (8086) MAM provide flexible access to memory, allowing you to easily access variables,
collections, accounts, indicators, and other difficult data categories.  The key to good assembly
language programming is the proper use of memory addressing modes.

An assembly language program instruction consists of two parts:

Implied mode: In indirect addressing the operand is identified in the training itself.

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Example:  CLC

 Immediate addressing mode :

Data is existing in the address field of training.

Example:  MOV AL

 Register mode: In RA the operand is located in 1 of 8 bit or 16-bit general-purpose

records.

Register Indirect mode: In this addressing the operand’s offset is located in any one of
the registers BX, BP, SI, DI as indicated in the training.

Indirect Memory Addressing:

This tending to mode uses the computer's ability of Portion: Balanced tending to. For the most

part, the base records EBX, EBP (or BX, BP), and the list registers (DI, SI), coded inside square
brackets for memory references, and are utilized for this purpose. Indirect tending to is by and
large utilized for factors containing a few components like clusters. The beginning address of
the cluster is put away in, say, the EBX register. The taking after code scrap appears how to get
to diverse components.

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Task 3:

Introduction:

A (GPU) is a specialised, digital route planned to unexpectedly control and regulate

reminiscence to boost up the introduction of pix in a body shield supposed for productivity to a
show device. GPUs are utilized in fixed structures, cell mobiles, private processors,
workstations, and sport comforts. Current GPUs are very green at working laptop photographs
and picture processing. Their pretty similar shape creates them extra green than general-motive c
(CPUs) for procedures that method big chunks of records in equivalent. In a private laptop, a
GPU may be gift on a videocassette card or fixed at the motherboard. In sure CPUs, they're fixed
at the CP

A (GPU) is a chip or digital route able to rendering photographs for show on an digital device.
The GPU turned into brought to the broader marketplace in 1999 and is excellent acknowledged
for its use in supplying the easy photographs that customers anticipate in current films and video
games:

Application of GPU:

This awareness gave upward thrust to the overall motive GPU era. Now, photographs generation
is implemented extra drastically to an more and more more huge regular of difficulties. Today’s
GPUs are extra programmable than ever before, have enough money them the power to boost up
a extensive variety of programs that move properly past conventional photographs rendering.

GPU for Gamming

Video video games have grow to be extra computationally intensive, with hyper practical
photographs and vast, complex in-sport worlds. With superior show technology, inclusive of 4K
monitors and excessive refresh rates, in conjunction with the upward thrust of digital fact
gaming, needs on photographs handling are developing fast. GPUs are able to interpreting
photographs in each 2D and three-D.

GPUs for Video Editing and Content Creation

For years, video cutters, image creators, and different innovative specialists have fight back with
lengthy interpreting instances that secured up calculating sources and quiet innovative run. Now,

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the equivalent handling presented through GPUs creates it quicker and less difficult to reduce
video and photographs in advanced explanation formats. In addition, current GPUs have devoted
media and show engines, which permit for much-extra-electricity-green video introduction and
playback.

GPU for Machine mastering:

a number of the maximum thrilling programs for GPU generation contain AI and device
mastering. GPUs include an super quantity of computational ability, they are able to supply
remarkable quickening in capabilities that take profit of the pretty similar nature of GPUs,
inclusive of picture acknowledgment. Many of today’s deep mastering technology depend upon
GPUs running at the side of CPUs.

Function:

The number one motive of a GPU is to render three-D photographs, that are produced from
polygons. Since maximum polygonal modifications contain decimal numbers, GPUs are
designed to carry out floating factor operations (rather than integer calculations). This specialised
layout allows GPUs to render photographs extra efficaciously than even the quickest CPUs.
Offloading photographs processing to excessive-powered GPUs is what makes current gaming
possible.

While GPUs excel at rendering photographs, the uncooked electricity of a GPU also can be used
for different purposes. Many running structures and software program packages now help
GPGPU, or general-motive computation on photographs processing units. Technologies like
Open CL and CUDA permit builders to make use of the GPU to help the CPU in non-
photographs computations. This can enhance the general overall performance of a laptop or
different digital device.

Performance criteria:

(IGPU), Integrated photographs, joint photographs solutions, (IGP) or (UMA) make use of a
part of a laptop's gadget (RAM) in preference to devoted photographs reminiscence. IGPs may
be included onto the motherboard.

External GPU

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An outside GPU is a photographs mainframe positioned out of doors of the housing of the
laptop, much like a big outside difficult drive. External photographs processors are now and
again used with computer computers. Processors may have a huge quantity of (RAM) and a
satisfactorily real (CPU), however frequently lack a effective photographs processor, and as a
substitute have a much less effective however extra energy-green on-board photographs chip.

Task 4:

1. Explanation:
In a k-way set associate mapping, cache memory is divided into sets, each of size k blocks.
Size of CM = 16 KB
As it is a 4-way set associative = 1
Block size B = 8 words
the word length is 32 bits.
Size of Physical address space = 8 GB.
—————————————————

No of blocks in Cache Memory (N) = (size of cache memory / size of a block)

= (16*1024 bytes / 8*1 bytes) = 2048 (as 1 word = 4 bytes)

No of sets(S) = (No of blocks in cache memory/ no of blocks in a set)

= N/K = 2048/4 = 512

Now, size of physical address = 8GB = 8*(2^30) Bytes = 4^34 Bytes

These physical addresses are divided equally among the sets.

Hence, each set can access ((4^34)/512) bytes = 4^15 bytes = 4^12 words = 4^9 blocks

So, each set can access a total of 4^9 blocks. So to identify these 4^9 blocks, each
set needs TAG bits of length 9 bits.

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 2. Tag Directory Size
 Tag directory size

= Number of tags x Tag size

= Number of lines in cache x Number of bits in tag

= 64 x 4 bits

= 256 bits

= 32 bytes

Thus, size of tag directory = 32 bytes

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Bibliography:

BARDHAN, N. & SINGH, P. 2015. Operating system used in cloud computing. IJCSIT)
International Journal of Computer Science and Information Technologies, 6, 542-544.
BÜYÜKBAYKAL, E. CORRELATION BETWEEN ARCHITECTURE AND VIDEO
GAMES: VIRTUAL WORLD AND REAL WORLD COMPARISON.
LI, P., LUO, Y., ZHANG, N. & CAO, Y. Heterospark: A heterogeneous cpu/gpu spark platform
for machine learning algorithms. 2015 IEEE International Conference on Networking,
Architecture and Storage (NAS), 2015. IEEE, 347-348.
TAHIR, Z., ASLAM, M. & FATIMA, M. 2015. CLOUD COMPUTING INFLUENCE ON
OPERATING SYSTEM. Science International, 27.
TRAN, B. Q. 2010. Systems and methods for video editing. Google Patents.
ZLATANOV, N. 2016. CUDA and GPU Acceleration of Image Processing. IEEE Computer
Society.

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