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Diode Model Generation For Simulation of Harmonic Distortion
Diode Model Generation For Simulation of Harmonic Distortion
-20,0
-30,0
-40,0
-50,0
-60,0 power @ 1xf0
Harmonic Distortion
-70,0
-80,0
power @ 2xf0
The measurement setup for the harmonic distortion
-90,0
-100,0
power @ 3xf0
itself consists of a signal generator, attenuators and
-110,0 a DC block to protect the input of the spectrum
analyzer, a band pass filter for suppression of
-120,0
-20,0 -15,0 -10,0 -5,0 0,0 5,0 10,0 15,0 20,0 25,0
forward power @ f0 into DUT (dBm)
unwanted signals and a high pass filter to remove
the strong fundamental wave from the harmonic
Figure 3: Measured data of Fundamental Wave measurements in order to avoid saturation of the
and Harmonic Distortion versus Input Power. spectrum analyzer. In particular the 6 dB and 20 dB
Figure 4: Measurement setup for HD measurement of GSM-900 fundamental frequencies (8xx – 9xx MHz).
the parameters Is, N and Rs can be done by using attenuators ensure a proper 50 Ohm termination to
three points of an I/V curve. In reverse direction, the both sides of the DUT position since the band pass
breakdown voltage (Bv) and the related current (Ibv) and high pass filter have a reactive behavior outside
can be fitted along the measured I/V curve. To get their passband frequencies.
the values Cd and Cjo the model needs to be fitted
along an C(V) curve (Reisch 2004, p.75). The forward power applied to the DUT is measured
by a directional coupler and a power meter. The
spectrum analyzer is finally used to measure the
level of the harmonic signals for varying levels of
MEASUREMENTS the fundamental wave. The DUT itself was soldered
Voltage dependency of capacitance on a co-planar wave guide. The complete
The capacitance variation versus the applied diode measurement setup is depicted in Figure 4. The
voltage is measured using a precision LCR Meter analyzed fundamental frequency was 837 MHz,
4,4E-12 Capacitance over voltage
4,2E-12 The measured C(V) curve was loaded into the
simulation setup. For the first step both diodes were
Csimulated
4,0E-12
Cmeasured modelled with an identical diode model DiodeM1.
Capacitance (F)
3,8E-12
To get a good matching, a minimum of three diode
parameters and an additional capacitance
3,6E-12 (C_extern) – which models the metal-oxide-silicon
capacitance – is needed. The external capacitance
3,4E-12
-4,0 -3,0 -2,0 -1,0 0,0 1,0 2,0 3,0 4,0 was finally tuned to C_extern=0.8 pF. For the diode
Voltage (V)
a linear capacitance of Cd=1.85 pF, a zero-bias
Figure 5: Simulated and Measured Capacitance junction capacitance of Cjo=5.05 pF and a junction
versus Applied Diode Voltage at 1 MHz. potential of Vj=1.308 V was found in order to match
the simulation with the measured data. The result
resulting in the second harmonic wave with can be seen in Figure 5.
1.674 GHz and the third harmonic at 2.511 GHz.
The input power was varied from -26 dBm up to
+20 dBm. The measured data is plotted versus the Harmonic Distortion
available forward power of the fundamental wave
(f0) at the DUT (Figure 3). The complete test bench is shown in Figure 6. For
the particular analysis of the system the same
fundamental frequency of RFfreq= 837 MHz was
SIMULATION chosen as for the measurements. In order to
calibrate the harmonic distortion behavior the ratio
The simulation was performed in three steps. First a between Cd and C_extern was tuned. As this
draft fitting of the I/V curve was done. That means changes also the C over V curve, this step needs to
the breakdown voltage was adjusted according to be done iteratively until C(V) matches this specific
the measurement data. This ensures that no high
RF Output
RF Input R9 Vdut Vout
R12
P_1Tone DC_Block1 DC_Block2
PORT1 -6dB -20dB Term
Num=1 R11 Term1
Z=50 Ohm R10 R8 R13 Num=2
P=dbmtow(RFpower) DUT Z=Zload
Freq=RFfreq
current flows through the diodes. Than the model measurement data as well as the measurement and
was tuned in order to achieve the C(V) behavior. simulation of the power of the fundamental
The third step was the tuning of the harmonic frequency. Cj itself varies with voltage V (Reisch,
distortion behavior: The model was tuned to match 2005) as a function of the grading coefficient M.
the second and third harmonics for a single level of This parameter was used to tune the 3rd harmonic
the fundamental wave of 20 dBm. distortion in order to match the measurement data.
To tune the 2nd harmonic distortion a minimal
P3
asymmetry of the grading coefficient was useful. Diode_Model
Num=3
Model=DIODEM2
measurement data for a variation of the forward Cd=C_di pF
Cjo=Cjo pF
Vj=1.308 V
power level at the fundamental frequency. In part a) M=Grad-G_diff P4
Num=4
Bv=23 V
the matching of the fundamental wave is shown. In
Figure 8: Final Diode Model
a) Fundamental Frequency
30
Otuput Power with DUT (dBm)
20
CONCLUSION
10
-30
f_0_meas
be used for optimization of future devices by
f_0_sim
-40 changing the semiconductor processing and layout
structure towards an optimized design as an
-35,0 -25,0 -15,0 -5,0 5,0 15,0 25,0
Input Power at DUT (dBm)
-40
-60
modelling of higher harmonics, as well as in more
-80 complex semiconductors. As silicon controlled
-100
rectifiers (SCR) as well as open base transistors are
-120
-140 H3_meas commonly used instead of TVS diodes, it would be
-160 H3_sim of interest to adapt this SPICE model approach for
these devices as well.
-180
-35,0 -25,0 -15,0 -5,0 5,0 15,0 25,0
Input Power at DUT (dBm)