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Chapter 5: CPU Scheduling

Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018
Outline
▪ Scheduling Criteria
▪ Scheduling Algorithms
▪ Multi-Processor Scheduling
▪ Real-Time CPU Scheduling
▪ Algorithm Evaluation

Operating System Concepts – 10th Edition 5.2 Silberschatz, Galvin and Gagne ©2018
Introduction

▪ CPU scheduling refers to the task of managing CPU sharing among a


community of ready processes/threads.
▪ OS scheduler is created from a mechanism used for context switching
and a policy that determines the order in which ready processes will
receive service.
▪ Scheduling policies : part of OS process manager
 when it is time for a thread to be removed from CPU
 which ready thread should be allocated the CPU next
• In multiprogramming, all abstract machines appear to be executing at
the same time  concurrent : the appearance of simultaneous
operation accomplish through a high CPU multiplexing rate.
• Scheduler : chooses one of the ready threads to use the CPU

Operating System Concepts – 10th Edition 5.3 Silberschatz, Galvin and Gagne ©2018
CPU Scheduler
▪ The CPU scheduler selects from among the processes in ready
queue, and allocates a CPU core to one of them
• Queue may be ordered in various ways
▪ CPU scheduling decisions may take place when a process:
1. Switches from running to waiting state
2. Switches from running to ready state
3. Switches from waiting to ready
4. Terminates
▪ For situations 1 and 4, there is no choice in terms of scheduling. A
new process (if one exists in the ready queue) must be selected
for execution.
▪ For situations 2 and 3, however, there is a choice.

Operating System Concepts – 10th Edition 5.4 Silberschatz, Galvin and Gagne ©2018
Model of Process Execution

Operating System Concepts – 10th Edition 5.5 Silberschatz, Galvin and Gagne ©2018
Preemptive and Nonpreemptive Scheduling

▪ When scheduling takes place only under circumstances 1 and


4, the scheduling scheme is nonpreemptive (voluntary) →
release the CPU when finish using the CPU.
▪ Otherwise, it is preemptive (involuntary) → have interrupt
timer that will periodically invoke the scheduler
▪ Under Nonpreemptive scheduling, once the CPU has been
allocated to a process, the process keeps the CPU until it
releases it either by terminating or by switching to the waiting
state.
▪ Virtually all modern operating systems including Windows,
MacOS, Linux, and UNIX use preemptive scheduling
algorithms.

Operating System Concepts – 10th Edition 5.6 Silberschatz, Galvin and Gagne ©2018
Voluntary CPU sharing (nonpreemptive)

▪ The simplest approach is for the scheduler to assume that each


process/thread will explicitly invoke the scheduler periodically,
voluntarily sharing the CPU.
▪ Some hardware is designed to include a special yield machine
instruction to allow process to release the CPU.

Operating System Concepts – 10th Edition 5.7 Silberschatz, Galvin and Gagne ©2018
Involuntarily CPU sharing (preemptive)

▪ The interrupt system can force periodic interruption of any process’s


execution; that is it can force a thread to effectively execute a yield
instruction.
▪ The trick is incorporate an interval timer device, which produces an
interrupt whenever the timer expires.
▪ When the specified time interval has passed, the timer raises an
interrupt.

Operating System Concepts – 10th Edition 5.8 Silberschatz, Galvin and Gagne ©2018
Thread may cease using CPU because:

 Completes execution and leaves the system


 Request resource that is not available
 Decides to voluntarily release the CPU and return to the ready state
 Involuntarily releases CPU because the system decides to preempt its
state from running to ready, removing the thread from the CPU and
placing it back in the ready list

Operating System Concepts – 10th Edition 5.9 Silberschatz, Galvin and Gagne ©2018
Scheduling Mechanism
• In an OS, the CPU scheduling mechanism depends on the features
in the hardware → configured with a clock device
• The scheduling mechanism is composed of several different parts
(process scheduler organization):
 enqueuer
 dispatcher
 context switcher

▪ When a process/thread is changed to the ready state, its descriptor is


updated to reflect the change and the enqueuer component places a
pointer to the descriptor into a list of processes that are waiting for the
CPU
▪ When the scheduler switches the CPU from executing one process to
executing another, the context switcher component saves the
contents of all CPU registers for the thread being removed from the
CPU in its descriptor

Operating System Concepts – 10th Edition 5.10 Silberschatz, Galvin and Gagne ©2018
Scheduling Mechanism

▪ The dispatcher is invoked after the application process has been


removed from the CPU.
▪ The dispatcher selects one of the ready threads from the ready list and
then allocates the CPU to that thread by performing another context
switch from itself to the selected thread.

Operating System Concepts – 10th Edition 5.11 Silberschatz, Galvin and Gagne ©2018
Dispatcher
▪ Dispatcher module gives control of the
CPU to the process selected by the CPU
scheduler; this involves:
• Switching context
• Switching to user mode
• Jumping to the proper location in the
user program to restart that program
▪ Dispatch latency – time it takes for the
dispatcher to stop one process and start
another running

Operating System Concepts – 10th Edition 5.12 Silberschatz, Galvin and Gagne ©2018
The Scheduler
From
Other
States

Process
Ready Process
Place a pointer to the Descriptor
process/thread
descriptor
into a list of processes
that are waiting for the
CPU Save the content of all

Enqueuer Ready CPU register (PC, IR,


condition status,
List processor status and
ALU status) for the
Place a process/thread thread being removed
into the Ready List from the CPU

Context
Dispatcher CPU
Switcher
Running Process
Allocate the CPU to Remove one process
the process/thread from the CPU and place
another on it

Operating System Concepts – 10th Edition 5.13 Silberschatz, Galvin and Gagne ©2018
Saving the Context

▪ Whenever the CPU is multiplexed, the old process is removed from the
CPU and a new process is installed to begin using the CPU
▪ When a process’s execution is paused, the contents of all of the CPU
registers must be saved in that process’s descriptor so that just before
the process resumes execution, those register contents can be copied
back into the physical CPU registers

Operating System Concepts – 10th Edition 5.14 Silberschatz, Galvin and Gagne ©2018
Context Switching
• The context switch is the operation that saves one
process’s copy of information that stored in the CPU Old Thread
registers, and writes the corresponding information
for another process into the registers.
Descriptor
• Descriptors used to hold a copy of the CPU registers
while a process is not running

CPU

New Thread Descriptor

Operating System Concepts – 10th Edition 5.15 Silberschatz, Galvin and Gagne ©2018
Scheduling Criteria

▪ CPU utilization – keep the CPU as busy as possible (Max)


▪ Throughput – # of processes that complete their execution per
time unit (Max)
▪ Turnaround time – amount of time to execute a particular process
(Min)
▪ Waiting time – amount of time a process has been waiting in the
ready queue (Min)
▪ Response time – amount of time it takes from when a request was
submitted until the first response is produced. (Min)

Operating System Concepts – 10th Edition 5.16 Silberschatz, Galvin and Gagne ©2018
Preemptive Scheduling and Race Conditions

▪ Preemptive scheduling can result in race conditions when data are


shared among several processes.
▪ Consider the case of two processes that share data. While one
process is updating the data, it is preempted so that the second
process can run. The second process then tries to read the data,
which are in an inconsistent state.
▪ This issue will be explored in detail in Chapter 6.

Operating System Concepts – 10th Edition 5.17 Silberschatz, Galvin and Gagne ©2018
Nonpreemptive Strategies

• Allow any process/thread to run to completion once it has been


allocated the processor
 no preemption path from the CPU back to the ready list
▪ Algorithm :
▪ First-come-first-served : FCFS
▪ Shortest job next (a.k.a shortest job first) : SJN/SJF
▪ Priority
▪ Deadline

Operating System Concepts – 10th Edition 5.18 Silberschatz, Galvin and Gagne ©2018
First- Come, First-Served (FCFS) Scheduling

Process Burst Time


P1 24
P2 3
P3 3
▪ Suppose that the processes arrive in the order: P1 , P2 , P3
The Gantt Chart for the schedule is:

P1 P2 P3
0 24 27 30

▪ Waiting time for P1 = 0; P2 = 24; P3 = 27


▪ Average waiting time: (0 + 24 + 27)/3 = 17

Operating System Concepts – 10th Edition 5.19 Silberschatz, Galvin and Gagne ©2018
FCFS Scheduling (Cont.)

Suppose that the processes arrive in the order:


P2 , P3 , P1
▪ The Gantt chart for the schedule is:

P2 P3 P1
0 3 6 30

▪ Waiting time for P1 = 6; P2 = 0; P3 = 3


▪ Average waiting time: (6 + 0 + 3)/3 = 3
▪ Much better than previous case
▪ Convoy effect - short process behind long process
• Consider one CPU-bound and many I/O-bound processes

Operating System Concepts – 10th Edition 5.20 Silberschatz, Galvin and Gagne ©2018
First-Come-First-Served

i t(pi)
0 350
1 125
2 475
3 250
4 75 0 350
p0

TTRnd(p0) = t(p0) = 350 W(p0) = 0

Operating System Concepts – 10th Edition 5.21 Silberschatz, Galvin and Gagne ©2018
First-Come-First-Served

i t(pi)
0 350
1 125
2 475
3 250
4 75 350 475
p0 p1

TTRnd(p0) = t(p0) = 350 W(p0) = 0


TTRnd(p1) = (t(p1) +TTRnd(p0)) = 125+350 = 475 W(p1) = TTRnd(p0) = 350

Operating System Concepts – 10th Edition 5.22 Silberschatz, Galvin and Gagne ©2018
First-Come-First-Served

i t(pi)
0 350
1 125
2 475
3 250
4 75 350 475 950
p0 p1 p2

TTRnd(p0) = t(p0) = 350 W(p0) = 0


TTRnd(p1) = (t(p1) +TTRnd(p0)) = 125+350 = 475 W(p1) = TTRnd(p0) = 350
TTRnd(p2) = (t(p2) +TTRnd(p1)) = 475+475 = 950 W(p2) = TTRnd(p1) = 475

Operating System Concepts – 10th Edition 5.23 Silberschatz, Galvin and Gagne ©2018
First-Come-First-Served

i t(pi)
0 350
1 125
2 475
3 250
4 75 350 475 950 1200
p0 p1 p2 p3

TTRnd(p0) = t(p0) = 350 W(p0) = 0


TTRnd(p1) = (t(p1) +TTRnd(p0)) = 125+350 = 475 W(p1) = TTRnd(p0) = 350
TTRnd(p2) = (t(p2) +TTRnd(p1)) = 475+475 = 950 W(p2) = TTRnd(p1) = 475
TTRnd(p3) = (t(p3) +TTRnd(p2)) = 250+950 = 1200 W(p3) = TTRnd(p2) = 950

Operating System Concepts – 10th Edition 5.24 Silberschatz, Galvin and Gagne ©2018
First-Come-First-Served

i t(pi)
0 350
1 125
2 475
3 250
4 75 350 475 950 1200 1275
p0 p1 p2 p3 p4

TTRnd(p0) = t(p0) = 350 W(p0) = 0


TTRnd(p1) = (t(p1) +TTRnd(p0)) = 125+350 = 475 W(p1) = TTRnd(p0) = 350
TTRnd(p2) = (t(p2) +TTRnd(p1)) = 475+475 = 950 W(p2) = TTRnd(p1) = 475
TTRnd(p3) = (t(p3) +TTRnd(p2)) = 250+950 = 1200 W(p3) = TTRnd(p2) = 950
TTRnd(p4) = (t(p4) +TTRnd(p3)) = 75+1200 = 1275 W(p4) = TTRnd(p3) = 1200

Operating System Concepts – 10th Edition 5.25 Silberschatz, Galvin and Gagne ©2018
FCFS Average Wait Time

i t(pi) •Easy to implement


0 350 •Ignores service time, etc
1 125 •Not a great performer
2 475
3 250
4 75 0 350 475 950 1200 1275
p0 p1 p2 p3 p4

TTRnd(p0) = t(p0) = 350 W(p0) =0


TTRnd(p1) = (t(p1) +TTRnd(p0)) = 125+350 = 475 W(p1) = TTRnd(p0) = 350
TTRnd(p2) = (t(p2) +TTRnd(p1)) = 475+475 = 950 W(p2) = TTRnd(p1) = 475
TTRnd(p3) = (t(p3) +TTRnd(p2)) = 250+950 = 1200 W(p3) = TTRnd(p2) = 950
TTRnd(p4) = (t(p4) +TTRnd(p3)) = 75+1200 = 1275 W(p4) = TTRnd(p3) = 1200

Wavg = (0+350+475+950+1200)/5 = 2974/5 = 595

Operating System Concepts – 10th Edition 5.26 Silberschatz, Galvin and Gagne ©2018
Shortest-Job-First (SJF) Scheduling

▪ Associate with each process the length of its next CPU burst
• Use these lengths to schedule the process with the shortest time
▪ SJF is optimal – gives minimum average waiting time for a given set
of processes
• The difficulty is knowing the length of the next CPU request
• Could ask the user

Operating System Concepts – 10th Edition 5.27 Silberschatz, Galvin and Gagne ©2018
Shortest-Job-First (SJF) Scheduling

▪ Associate with each process the length of its next CPU burst
• Use these lengths to schedule the process with the
shortest time
▪ SJF is optimal – gives minimum average waiting time for a
given set of processes
▪ Preemptive version called shortest-remaining-time-first
▪ How do we determine the length of the next CPU burst?
• Could ask the user
• Estimate

Operating System Concepts – 10th Edition 5.28 Silberschatz, Galvin and Gagne ©2018
Example of SJF

ProcessArrival Time Burst Time


P1 0.0 6
P2 2.0 8
P3 4.0 7
P4 5.0 3

▪ SJF scheduling chart

P4 P1 P3 P2
0 3 9 16 24

▪ Average waiting time = (3 + 16 + 9 + 0) / 4 = 7

Operating System Concepts – 10th Edition 5.29 Silberschatz, Galvin and Gagne ©2018
Shortest Job First

i t(pi)
0 350
1 125
2 475
3 250
4 75 0 75
p4

TTRnd(p4) = t(p4) = 75 W(p4) = 0

Operating System Concepts – 10th Edition 5.30 Silberschatz, Galvin and Gagne ©2018
Shortest Job First

i t(pi)
0 350
1 125
2 475
3 250
4 75 0 75 200
p4 p1

TTRnd(p1) = t(p1)+t(p4) = 125+75 = 200 W(p1) = 75

TTRnd(p4) = t(p4) = 75 W(p4) = 0

Operating System Concepts – 10th Edition 5.31 Silberschatz, Galvin and Gagne ©2018
Shortest Job First

i t(pi)
0 350
1 125
2 475
3 250
4 75 0 75 200 450
p4 p1 p3

TTRnd(p1) = t(p1)+t(p4) = 125+75 = 200 W(p1) = 75

TTRnd(p3) = t(p3)+t(p1)+t(p4) = 250+125+75 = 450 W(p3) = 200


TTRnd(p4) = t(p4) = 75 W(p4) = 0

Operating System Concepts – 10th Edition 5.32 Silberschatz, Galvin and Gagne ©2018
Shortest Job First

i t(pi)
0 350
1 125
2 475
3 250
4 75 0 75 200 450 800
p4 p1 p3 p0

TTRnd(p0) = t(p0)+t(p3)+t(p1)+t(p4) = 350+250+125+75 = 800 W(p0) = 450


TTRnd(p1) = t(p1)+t(p4) = 125+75 = 200 W(p1) = 75

TTRnd(p3) = t(p3)+t(p1)+t(p4) = 250+125+75 = 450 W(p3) = 200


TTRnd(p4) = t(p4) = 75 W(p4) = 0

Operating System Concepts – 10th Edition 5.33 Silberschatz, Galvin and Gagne ©2018
Shortest Job First

i t(pi)
0 350
1 125
2 475
3 250
4 75 0 75 200 450 800 1275
p4 p1 p3 p0 p2

TTRnd(p0) = t(p0)+t(p3)+t(p1)+t(p4) = 350+250+125+75 = 800 W(p0) = 450


TTRnd(p1) = t(p1)+t(p4) = 125+75 = 200 W(p1) = 75
TTRnd(p2) = t(p2)+t(p0)+t(p3)+t(p1)+t(p4) = 475+350+250+125+75 W(p2) = 800
= 1275
TTRnd(p3) = t(p3)+t(p1)+t(p4) = 250+125+75 = 450 W(p3) = 200
TTRnd(p4) = t(p4) = 75 W(p4) = 0

Operating System Concepts – 10th Edition 5.34 Silberschatz, Galvin and Gagne ©2018
Shortest Job First

i t(pi) •Minimizes wait time


0 350 •May starve large jobs
1 125 •Must know service times
2 475
3 250
4 75 0 75 200 450 800 1275
p 4 p1 p3 p0 p2

TTRnd(p0) = t(p0)+t(p3)+t(p1)+t(p4) = 350+250+125+75 = 800 W(p0) = 450


TTRnd(p1) = t(p1)+t(p4) = 125+75 = 200 W(p1) = 75
TTRnd(p2) = t(p2)+t(p0)+t(p3)+t(p1)+t(p4) = 475+350+250+125+75 W(p2) = 800
= 1275
TTRnd(p3) = t(p3)+t(p1)+t(p4) = 250+125+75 = 450 W(p3) = 200
TTRnd(p4) = t(p4) = 75 W(p4) = 0

Wavg = (450+75+800+200+0)/5 = 1525/5 = 305


Operating System Concepts – 10th Edition 5.35 Silberschatz, Galvin and Gagne ©2018
Example of Shortest Job Next

▪ Now we add the concepts of varying arrival times and preemption to


the analysis
ProcessAarri Arrival TimeT Burst Time
P1 0 8
P2 1 4
P3 2 9
P4 3 5
▪ Preemptive SJF Gantt Chart

P1 P2 P4 P1 P3
0 1 5 10 17 26

▪ Average waiting time = [(10-1)+(1-1)+(17-2)+(5-3)]/4 = 26/4 = 6.5

Operating System Concepts – 10th Edition 5.36 Silberschatz, Galvin and Gagne ©2018
Shortest Job Next (Preemptive SJF)

Process Arrival Time Burst Time


P1 0.0 7
P2 2.0 4
P3 4.0 1
P4 5.0 4

P1 P2 P3 P2 P4 P1

0 2 4 5 7 11 16

• Waiting time =
P1 = 11 - 2 = 9
P2 = 5 - 4 = 1
P3 = 4 - 4 = 0
P4 = 7 - 5 = 2
• average Waiting time = (9 + 1 + 0 +2)/4 = 3

Operating System Concepts – 10th Edition 5.37 Silberschatz, Galvin and Gagne ©2018
Round Robin (RR)
▪ Each process gets a small unit of CPU time (time quantum q),
usually 10-100 milliseconds. After this time has elapsed, the
process is preempted and added to the end of the ready queue.
▪ If there are n processes in the ready queue and the time quantum
is q, then each process gets 1/n of the CPU time in chunks of at
most q time units at once. No process waits more than (n-1)q
time units.
▪ Timer interrupts every quantum to schedule next process
▪ Performance
• q large  FIFO
• q small  q must be large with respect to context switch,
otherwise overhead is too high

Operating System Concepts – 10th Edition 5.38 Silberschatz, Galvin and Gagne ©2018
Example of RR with Time Quantum = 4

Process Burst Time


P1 24
P2 3
P3 3
▪ The Gantt chart is:
P1 P2 P3 P1 P1 P1 P1 P1
0 4 7 10 14 18 22 26 30

▪ Typically, higher average turnaround than SJF, but better response


▪ q should be large compared to context switch time
• q usually 10 milliseconds to 100 milliseconds,
• Context switch < 10 microseconds

Operating System Concepts – 10th Edition 5.39 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=20)

The gantt chart is

Operating System Concepts – 10th Edition 5.40 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 50
p0
4 75

W(p0) = 0

Operating System Concepts – 10th Edition 5.41 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100
p0 p1
4 75

W(p0) = 0
W(p1) = 50

Operating System Concepts – 10th Edition 5.42 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100
p0 p1 p2
4 75

W(p0) = 0
W(p1) = 50
W(p2) = 100

Operating System Concepts – 10th Edition 5.43 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100 200
p0 p1 p2 p3
4 75

W(p0) = 0
W(p1) = 50
W(p2) = 100
W(p3) = 150

Operating System Concepts – 10th Edition 5.44 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100 200
p0 p1 p2 p3 p4
4 75

W(p0) = 0
W(p1) = 50
W(p2) = 100
W(p3) = 150
W(p4) = 200

Operating System Concepts – 10th Edition 5.45 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100 200 300
p0 p1 p2 p3 p4 p0
4 75

W(p0) = 0
W(p1) = 50
W(p2) = 100
W(p3) = 150
W(p4) = 200

Operating System Concepts – 10th Edition 5.46 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100 200 300 400 475
p0 p1 p2 p3 p4 p0 p1 p2 p3 p4
4 75

W(p0) = 0
W(p1) = 50
W(p2) = 100
W(p3) = 150
TTRnd(p4) = 475 W(p4) = 200

Operating System Concepts – 10th Edition 5.47 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100 200 300 400 475 550
p0 p1 p2 p3 p4 p0 p1 p2 p3 p4 p0 p1
4 75

W(p0) = 0
TTRnd(p1) = 550 W(p1) = 50
W(p2) = 100
W(p3) = 150
TTRnd(p4) = 475 W(p4) = 200

Operating System Concepts – 10th Edition 5.48 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100 200 300 400 475 550 650
p0 p1 p2 p3 p4 p0 p1 p2 p3 p4 p0 p1 p2 p3
4 75
650 750 850 950
p0 p2 p3 p0 p2 p3

W(p0) = 0
TTRnd(p1) = 550 W(p1) = 50
W(p2) = 100
TTRnd(p3) = 950 W(p3) = 150
TTRnd(p4) = 475 W(p4) = 200

Operating System Concepts – 10th Edition 5.49 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100 200 300 400 475 550 650
p0 p1 p2 p3 p4 p0 p1 p2 p3 p4 p0 p1 p2 p3
4 75
650 750 850 950 1050
p0 p2 p3 p0 p2 p3 p0 p2 p0

TTRnd(p0) = 1100 W(p0) = 0


TTRnd(p1) = 550 W(p1) = 50
W(p2) = 100
TTRnd(p3) = 950 W(p3) = 150
TTRnd(p4) = 475 W(p4) = 200

Operating System Concepts – 10th Edition 5.50 Silberschatz, Galvin and Gagne ©2018
Round Robin (TQ=50)

i t(pi)
0 350
1 125
2 475
3 250 0 100 200 300 400 475 550 650
p0 p1 p2 p3 p4 p0 p1 p2 p3 p4 p0 p1 p2 p3
4 75
650 750 850 950 1050 1150 1250 1275
p0 p2 p3 p0 p2 p3 p0 p2 p0 p2 p2 p2 p2

TTRnd(p0) = 1100 W(p0) = 0


TTRnd(p1) = 550 W(p1) = 50
TTRnd(p2) = 1275 W(p2) = 100
TTRnd(p3) = 950 W(p3) = 150
TTRnd(p4) = 475 W(p4) = 200

Operating System Concepts – 10th Edition 5.51 Silberschatz, Galvin and Gagne ©2018
Priority Scheduling

▪ A priority number (integer) is associated with each process

▪ The CPU is allocated to the process with the highest priority (smallest
integer  highest priority)
• Preemptive
• Nonpreemptive

▪ SJF is priority scheduling where priority is the inverse of predicted next


CPU burst time

▪ Problem  Starvation – low priority processes may never execute

▪ Solution  Aging – as time progresses increase the priority of the


process

Operating System Concepts – 10th Edition 5.52 Silberschatz, Galvin and Gagne ©2018
Example of Priority Scheduling

ProcessA arri Burst TimeT Priority


P1 10 3
P2 1 1
P3 2 4
P4 1 5
P5 5 2

▪ Priority scheduling Gantt Chart

▪ Average waiting time = 8.2

Operating System Concepts – 10th Edition 5.53 Silberschatz, Galvin and Gagne ©2018
Priority Scheduling

i t(pi) Pri •Reflects importance of external use


0 350 5 •May cause starvation
1 125 2 •Can address starvation with aging
2 475 3
3 250 1
4 75 4 0 250 375 850 925 1275
p3 p1 p2 p4 p0

TTRnd(p0) = t(p0)+t(p4)+t(p2)+t(p1) )+t(p3) = 350+75+475+125+250 W(p0) = 925


= 1275 W(p1) = 250
TTRnd(p1) = t(p1)+t(p3) = 125+250 = 375 W(p2) = 375
TTRnd(p2) = t(p2)+t(p1)+t(p3) = 475+125+250 = 850
TTRnd(p3) = t(p3) = 250 W(p3) = 0
TTRnd(p4) = t(p4)+ t(p2)+ t(p1)+t(p3) = 75+475+125+250 = 925 W(p4) = 850

Wavg = (925+250+375+0+850)/5 = 2400/5 = 480


Operating System Concepts – 10th Edition 5.54 Silberschatz, Galvin and Gagne ©2018
Priority Scheduling w/ Round-Robin
ProcessA arri Burst TimeT Priority
P1 4 3
P2 5 2
P3 8 2
P4 7 1
P5 3 3
▪ Run the process with the highest priority. Processes with the same
priority run round-robin

▪ Gantt Chart with time quantum = 2

Operating System Concepts – 10th Edition 5.55 Silberschatz, Galvin and Gagne ©2018
Multiple-Processor Scheduling
▪ CPU scheduling more complex when multiple CPUs are available
▪ Multiprocess may be any one of the following architectures:
• Multicore CPUs
• Multithreaded cores
• NUMA systems
• Heterogeneous multiprocessing

Operating System Concepts – 10th Edition 5.56 Silberschatz, Galvin and Gagne ©2018
Multiple-Processor Scheduling

▪ Symmetric multiprocessing (SMP) is where each processor is self


scheduling.
▪ All threads may be in a common ready queue (a)
▪ Each processor may have its own private queue of threads (b)

Operating System Concepts – 10th Edition 5.57 Silberschatz, Galvin and Gagne ©2018
Multicore Processors
▪ Recent trend to place multiple processor cores on same physical chip
▪ Faster and consumes less power
▪ Multiple threads per core also growing
• Takes advantage of memory stall to make progress on another
thread while memory retrieve happens
▪ Figure

Operating System Concepts – 10th Edition 5.58 Silberschatz, Galvin and Gagne ©2018
Multithreaded Multicore System
▪ Each core has > 1 hardware threads.
▪ If one thread has a memory stall, switch to another thread!
▪ Figure

Operating System Concepts – 10th Edition 5.59 Silberschatz, Galvin and Gagne ©2018
Multithreaded Multicore System
▪ Chip-multithreading (CMT)
assigns each core multiple
hardware threads. (Intel refers
to this as hyperthreading.)

▪ On a quad-core system with 2


hardware threads per core, the
operating system sees 8 logical
processors.

Operating System Concepts – 10th Edition 5.60 Silberschatz, Galvin and Gagne ©2018
Multithreaded Multicore System

▪ Two levels of scheduling:

1. The operating system


deciding which
software thread to run
on a logical CPU

2. How each core


decides which
hardware thread to
run on the physical
core.

Operating System Concepts – 10th Edition 5.61 Silberschatz, Galvin and Gagne ©2018
Multiple-Processor Scheduling – Load Balancing

▪ If SMP, need to keep all CPUs loaded for efficiency


▪ Load balancing attempts to keep workload evenly distributed
▪ Push migration – periodic task checks load on each processor,
and if found pushes task from overloaded CPU to other CPUs
▪ Pull migration – idle processors pulls waiting task from busy
processor

Operating System Concepts – 10th Edition 5.62 Silberschatz, Galvin and Gagne ©2018
Multiple-Processor Scheduling – Processor Affinity

▪ When a thread has been running on one processor, the cache contents
of that processor stores the memory accesses by that thread.
▪ We refer to this as a thread having affinity for a processor (i.e.,
“processor affinity”)
▪ Load balancing may affect processor affinity as a thread may be moved
from one processor to another to balance loads, yet that thread loses
the contents of what it had in the cache of the processor it was moved
off of.
▪ Soft affinity – the operating system attempts to keep a thread running
on the same processor, but no guarantees.
▪ Hard affinity – allows a process to specify a set of processors it may
run on.

Operating System Concepts – 10th Edition 5.63 Silberschatz, Galvin and Gagne ©2018
NUMA and CPU Scheduling
If the operating system is NUMA-aware, it will assign memory closes
to the CPU the thread is running on.

Operating System Concepts – 10th Edition 5.64 Silberschatz, Galvin and Gagne ©2018
Real-Time CPU Scheduling
▪ Can present obvious challenges
▪ Soft real-time systems – Critical real-time tasks have the highest
priority, but no guarantee as to when tasks will be scheduled
▪ Hard real-time systems – task must be serviced by its deadline

Operating System Concepts – 10th Edition 5.65 Silberschatz, Galvin and Gagne ©2018
Real-Time CPU Scheduling
▪ Event latency – the amount of
time that elapses from when
an event occurs to when it is
serviced.
▪ Two types of latencies affect
performance
1. Interrupt latency – time
from arrival of interrupt to
start of routine that
services interrupt
2. Dispatch latency – time
for schedule to take
current process off CPU
and switch to another

Operating System Concepts – 10th Edition 5.66 Silberschatz, Galvin and Gagne ©2018
Interrupt Latency

Operating System Concepts – 10th Edition 5.67 Silberschatz, Galvin and Gagne ©2018
Dispatch Latency

▪ Conflict phase of
dispatch latency:
1. Preemption of
any process
running in kernel
mode
2. Release by low-
priority process
of resources
needed by high-
priority
processes

Operating System Concepts – 10th Edition 5.68 Silberschatz, Galvin and Gagne ©2018
Priority-based Scheduling
▪ For real-time scheduling, scheduler must support preemptive, priority-
based scheduling
• But only guarantees soft real-time
▪ For hard real-time must also provide ability to meet deadlines
▪ Processes have new characteristics: periodic ones require CPU at
constant intervals
• Has processing time t, deadline d, period p
• 0≤t≤d≤p
• Rate of periodic task is 1/p

Operating System Concepts – 10th Edition 5.69 Silberschatz, Galvin and Gagne ©2018
Algorithm Evaluation
▪ How to select CPU-scheduling algorithm for an OS?
▪ Determine criteria, then evaluate algorithms
▪ Deterministic modeling
• Type of analytic evaluation
• Takes a particular predetermined workload and defines
the performance of each algorithm for that workload
▪ Consider 5 processes arriving at time 0:

Operating System Concepts – 10th Edition 5.70 Silberschatz, Galvin and Gagne ©2018
Deterministic Evaluation

▪ For each algorithm, calculate minimum average waiting time


▪ Simple and fast, but requires exact numbers for input, applies
only to those inputs
• FCS is 28ms:

• Non-preemptive SFJ is 13ms:

• RR is 23ms:

Operating System Concepts – 10th Edition 5.71 Silberschatz, Galvin and Gagne ©2018
End of Chapter 5

Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018

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