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Proceedings of the Second International Conference on Electronics and Sustainable Communication Systems (ICESC-2021)

IEEE Xplore Part Number: CFP21V66-ART; ISBN: 978-1-6654-2867-5

DESIGN AND STUDY OF CIRCUITS USING REVERSIBLE LOGIC


A P Sooriamala1 Aby K Thomas Reeba Korah
Department of ECE, Alliance College
Department of ECE, Alliance College
Department of ECE, Hindustan of Engineering and Design, Alliance
of Engineering and Design, Alliance
Institute of Technology and Science, University, Bangalore India
University, Bangalore India
Chennai India
sooriavasee@gmail.com
2021 Second International Conference on Electronics and Sustainable Communication Systems (ICESC) | 978-1-6654-2867-5/21/$31.00 ©2021 IEEE | DOI: 10.1109/ICESC51422.2021.9532793

Abstract—In VLSI systems design, reversible Logic has gate' 3x3 is built [19] as universal gate to perform all
gained importance for Reducing power. This paper focuses Boolean functions. Using this Adder circuits and other
on designing of sequential circuits and reducing the number combinational circuits are built with reduced number of
of constant inputs - CI and the garbage outputs - GO. Basic gates.
reversible gates are used to build sequential circuits. D Flip Reversible Logic has the following Rules,
flop, Latch and RAM cell are developed. All circuits are
 same number of inputs and outputs
VHDL coded on Xilinx tool, simulated and verified.
 CI and GO to be added to maintain rule #1
Reduction in CI of more than 33 percent and GO of more
 CI and GO should be less
than 80 percent is achieved. This is achieved by properly
reusing the outputs for configuring the constant input of  Unique input to output pattern
other gates.  Fan-out, loop back and branching are not allowed
Keywords — Reversible logic, Sequential circuits, Flip
Flop, Latch, RAM cell, CI, GO Implications of Reversibility
As Fredkin and Tofolli (1981) [15] point out, duplication
of signals need to use gates. Feynman gate (Fig.3) is used
.I INTRODUCTION
with B=0 for this purpose. In minimizing a given function
In latest VLSI circuits design Moore's law works exactly
reversibly, we cannot assume free fan-out. There is a 1 : 1
the way it was defined. Moore's law predicted that number
mapping between input bit and output bit. NOT is a
of transistors in a chip area will double every 24 months [2].
logically reversible gate. AND is logically irreversible gate.
That brings the requirement of handling the heat energy
By knowing 0 at the output of an AND, we can not deduce
dissipated by those transistors. According to Rolf Landauer,
what the input was. This gate is logically irreversible. The
in 1961[1] on computation of every bit the irreversible /
AND gate has 2 inputs and 1 output. Information worth of
conventional system design approach consumes
one bit has been lost. Landauer[1]discovered that the heat
Heat energy = KT ln2 ...(1) from computation was due to the loss of information (wiping
out bits of information) and not due to the processing of bits.
Where K is the Boltzmann’s constant equal to 1.3807 × This is Landauer’s Principle[1]. Power dissipation of
10-23m2kg2k-1(J/K) and T is the temperature in Kelvin [3][4]. reversible computer, under ideal physical circumstances, is
C.H.Bennet 1973, correlate this heat loss with the zero.
information lost and stated the heat can be saved by using the
reversible logic which does not dissipate heat [3][4]. GO and CI are the outputs and inputs added to a function
to make it reversible. The correlation between the number of
We learn basically the benefits of the reversible systems GO, CI, Input and output is given as output + GO equals
over the irreversible systems from the “Thermodynamics” Input + CI
and the concept of reversibility in the digital hardware design
for low power design. Reversible gates do not cause heat III LITERATURE SURVEY
dissipation as there will be no loss of data [3][2]. By not
[5]The authors have synthesized some Flipflops using
destroying the information bits the power consumption can
reversible logic. Both pulse and edge triggered Flipflops are
be reduced drastically.
synthesized. The authors used Feynman Gate(FG), Fredkin
In reversible logic circuits number of inputs and number gate and New Gate (NG) to build the circuits. The circuits
of outputs are equal. This is achieved by adding constant have more number of gates and GO. D Flipflop is designed
inputs (CI) and garbage outputs (GO). They are not with 4 NG gates and 3 FG. Number of CI is 7 and GO is 8.
needed for the computation. This paper is proposed to study [6]In this work, optimized designs of some reversible
and design sequential circuits using reversible Logic and to sequential circuits are presented. Different Latches and their
compare the CI and GO of existing reversible logic circuits corresponding reversible master-slave Flipflop are designed.
with the new design. The authors have used a Fredkin gate at the output of a latch
to design a asynchronous set/reset D latch and the master-
II REVERSIBLE LOGIC slave D Flipflop. D Flipflop is designed with 1 fredkin gate
In reversible circuit each input is mapped to an output. and 2 Feynman gates. Number of CIs is 2 and GO is 2.
[6] CNOT, Feynman, Fredkin, Double Feynman, Toffoli, [7]proposes the design of reversible D-latch, reversible T
Peres, Sayem and TSG are some basic reversible Gates. Flip flop and four bit counters using reversible T Flip flop.
[18]MLMRG 4x4 is a custom built gate. There are custom D Latch is built with 1 SG gate (Sayem gate) and 1
built gates of 5x5 and 6x6 configuration. The same gates can
Feynman gate. Number of CI is 2 and GO is 2.
be used for other applications also. A gate which can perform
all Boolean functions is a universal gate. A gate called 'new

978-1-6654-2867-5/21/$31.00 ©2021 IEEE 213

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