UNIT-II

Transistor Characteristics: Bipolar Junction Transistor (BJT)-Construction, Operation, Amplifying Action,

Common Base, Common Emitter and Common Collector Configurations, Operating Point, Voltage Divider
Bias Configuration; Field Effect Transistor (FET) –Construction, Characteristics of Junction FET,
Depletion and Enhancement type Metal Oxide Semiconductor (MOS)

What is transistor?
 A transistor is a three-terminal semiconductor device that amplifies the electronic signals such as
radio and television signals.
 Before the transistors came into existence, vacuum tubes are used to amplify the electronic signals.
 But nowadays vacuum tubes are replaced by transistors because of its various advantages over
vacuum tubes.
Disadvantages of vacuum tubes
 High power consumption
 High cost
 Vacuum tubes are very bulky. So they occupy more space.
 High voltage is needed to operate the vacuum tubes.
 Produce large heat
 Lower efficiency
Advantages of transistors
 Low power consumption
 Low cost
 Small size
 Higher efficiency
 Low voltage is needed to operate the transistors
 High physical ruggedness than vacuum tubes

Bipolar junction transistors are classified into two types based on their construction: They are
 NPN transistor
  PNP transistor
NPN transistor
When a single p-type semiconductor layer is sandwiched between two n-type semiconductor layers, the
transistor is said to be an npn transistor
PNP transistor
When a single n-type semiconductor layer is sandwiched between two p-type semiconductor layers, the
transistor is said to be a pnp transistor.

The three terminals drawn from the transistor indicate Emitter, Base and Collector terminals. They have
their functionality as discussed below.
Emitter
 The left hand side of the above shown structure can be understood as Emitter.
 This has a moderate size and is heavily doped as its main function is to supply a number of majority
carriers, i.e. either electrons or holes.
 As this emits electrons, it is called as an Emitter.
 This is simply indicated with the letter E.
Base
 The middle material in the above figure is the Base.
 This is thin and lightly doped.
 Its main function is to pass the majority carriers from the emitter to the collector.
 This is indicated by the letter B.
Collector
 The right side material in the above figure can be understood as a Collector.
 Its name implies its function of collecting the carriers.
 This is a bit larger in size than emitter and base. It is moderately doped.
 This is indicated by the letter C.

Transistor Biasing
  As we know that a transistor is a combination of two diodes, we have two junctions here. As one
junction is between the emitter and base, that is called as Emitter-Base junction and likewise, the
other is Collector-Base junction.
 Biasing is controlling the operation of the circuit by providing power supply.
 The function of both the PN junctions is controlled by providing bias to the circuit through some dc
supply. The figure below shows how a transistor is biased.

 By applying the power, the emitter base junction is always forward biased as the emitter resistance is
very small.
 The collector base junction is reverse biased and its resistance is a bit higher
 A small forward bias is sufficient at the emitter junction whereas a high reverse bias has to be
applied at the collector junction.
 The direction of current indicated in the circuits above, also called as the Conventional Current, is
the movement of hole current which is opposite to the electron current.
Operation NPN Transistor
 The operation of an NPN transistor can be explained by having a look at the following figure, in
which emitter-base junction is forward biased and collector-base junction is reverse biased.
  The voltage VEE provides a negative potential at the emitter which repels the electrons in the N-type
material and these electrons cross the emitter-base junction, to reach the base region.
 There a very low percent of electrons recombine with free holes of P-region. This provides very low
current which constitutes the base current IB. The remaining holes cross the collector-base junction,
to constitute the collector current IC.
 As an electron reaches out of the collector terminal, and enters the positive terminal of the battery,
an electron from the negative terminal of the battery VEE enters the emitter region. This flow slowly
increases and the electron current flows through the transistor.
Hence we can understand that −
 The conduction in a NPN transistor takes place through electrons.
 The collector current is higher than the emitter current.
 The increase or decrease in the emitter current affects the collector current.
Transistor Configurations
 A Transistor has 3 terminals, the emitter, the base and the collector. Using these 3 terminals the
transistor can be connected in a circuit with one terminal common to both input and output in a 3
different possible configurations.
 The three types of configurations are Common Base, Common Emitter and Common Collector
configurations. In every configuration, the emitter junction is forward biased and the collector
junction is reverse biased.
Common Base (CB) Configuration
 The name itself implies that the Base terminal is taken as common terminal for both input and
output of the transistor. The common base connection for both NPN and PNP transistors is as shown
in the following figure.
 To fully describe the behavior of a transistor with CB configuration, we need two set of
characteristics: they are
 Input characteristics
 Output characteristics.
Input characteristics
 The input current or emitter current (IE) is taken along the y-axis (vertical line) and the input
voltage (VBE) is taken along the x-axis (horizontal line).
 To determine the input characteristics, the output voltage VCB (collector-base voltage) is kept
constant at zero volts and the input voltage VBE is increased from zero volts to different voltage
levels.
 For each voltage level of the input voltage (VBE), the input current (IE) is recorded on a paper or in
any other form.
 A curve is then drawn between input current IE and input voltage VBE at constant output voltage VCB
(0 volts).

 Next, the output voltage (VCB) is increased from zero volts to a certain voltage level (8 volts) and kept
constant at 8 volts. While increasing the output voltage (VCB), the input voltage (VBE) is kept constant
at zero volts.
 After we kept the output voltage (VCB) constant at 8 volts, the input voltage VBE is increased from
zero volts to different voltage levels. For each voltage level of the input voltage (VBE), the input
current (IE) is recorded on a paper or in any other form.
 A curve is then drawn between input current IE and input voltage VBE at constant output voltage VCB
(8 volts).
 This is repeated for higher fixed values of the output voltage (VCB).
Output characteristics
 The output current or collector current (IC) is taken along the y-axis (vertical line) and the output
voltage (VCB) is taken along the x-axis (horizontal line).
 To determine the output characteristics, the input current or emitter current IE is kept constant at
zero mA and the output voltage VCB is increased from zero volts to different voltage levels.
 For each voltage level of the output voltage VCB, the output current (IC) is recorded.
  A curve is then drawn between output current IC and output voltage VCB at constant input current IE
(0 mA).
 When the emitter current or input current IE is equal to 0 mA, the transistor operates in the cut-off
region.

 Next, the input current (IE) is increased from 0 mA to 1mA by adjusting the input voltage VBE and
the input current IE is kept constant at 1mA. While increasing the input current IE, the output
voltage VCB is kept constant.
 After we kept the input current (IE) constant at 1mA, the output voltage (VCB) is increased from zero
volts to different voltage levels. For each voltage level of the output voltage (VCB), the output current
(IC) is recorded.
 A curve is then drawn between output current IC and output voltage VCB at constant input current IE
(1 mA). This region is known as the active region of a transistor.
 This is repeated for higher fixed values of input current IE (I.e. 2 mA, 3 mA, 4 mA and so on).
 From the above characteristics, we can see that for a constant input current I E, when the output
voltage VCB is increased, the output current IC remains constant.
 At saturation region, both emitter-base junction JE and collector-base junction JC are forward
biased. From the above graph, we can see that a sudden increase in the collector current when the
output voltage VCB makes the collector-base junction JC forward biased.
Early effect
 If the output voltage VCB applied to the collector-base junction JC is increased, the depletion region
width further increases. The base region is lightly doped as compared to the collector region. So the
depletion region penetrates more into the base region and less into the collector region. As a result,
the width of the base region decreases. This dependency of base width on the output voltage (V CB) is
known as an early effect.

Common Emitter Configuration

  In common emitter configuration, base is the input terminal, collector is the output terminal and
emitter is the common terminal for both input and output.

Input characteristics
 The vertical line represents y-axis and horizontal line represents x-axis. The input current or base
current (IB) is taken along y-axis (vertical line) and the input voltage (VBE) is taken along x-axis
(horizontal line).
 To determine the input characteristics, the output voltage VCE is kept constant at zero volts and the
input voltage VBE is increased from zero volts to different voltage levels
 For each voltage level of input voltage (VBE), the corresponding input current (IB) is recorded.
 A curve is then drawn between input current IB and input voltage VBE at constant output voltage VCE
(0 volts).
 Next, the output voltage (VCE) is increased from zero volts to certain voltage level (10 volts) and the
output voltage (VCE) is kept constant at 10 volts.
 After we kept the output voltage (VCE) constant at 10 volts, the input voltage VBE is increased from
zero volts to different voltage levels
 For each voltage level of input voltage (VBE), the corresponding input current (IB) is recorded.
 A curve is then drawn between input current IB and input voltage VBE at constant output voltage VCE
(10 volts).
 This process is repeated for higher fixed values of output voltage (VCE).
Output characteristics
 The vertical line represents y-axis and horizontal line represents x-axis. The output current or
collector current (IC) is taken along y-axis (vertical line) and the output voltage (VCE) is taken along
x-axis (horizontal line).
 To determine the output characteristics, the input current or base current I B is kept constant at 0 μA
and the output voltage VCE is increased from zero volts to different voltage levels.
 For each level of output voltage, the corresponding output current (IC) is recorded.
 A curve is then drawn between output current IC and output voltage VCE at constant input current IB
(0 μA).
 When the base current or input current IB = 0 μA, the transistor operates in the cut-off region. In
this region, both junctions are reverse biased.
 Next, the input current (IB) is increased from 0 μA to 20 μA by adjusting the input voltage (VBE). The
input current (IB) is kept constant at 20 μA.
 After we kept the input current (IB) constant at 20 μA, the output voltage (VCE) is increased from
zero volts to different voltage levels.
 For each voltage level of output voltage (VCE), the corresponding output current (IC) is recorded.
 A curve is then drawn between output current IC and output voltage VCE at constant input current IB
(20 μA).
 This region is known as the active region of a transistor. In this region, emitter-base junction is
forward biased and the collector-base junction is reverse biased.
 This steps are repeated for higher fixed values of input current I B (I.e. 40 μA, 60 μA, 80 μA and so
on).
 When output voltage VCE is reduced to a small value (0.2 V), the collector-base junction becomes
forward biased. This is because the output voltage VCE has less effect on collector-base junction than
input voltage VBE.
 As we know that the emitter-base junction is already forward biased. Therefore, when both the
junctions are forward biased, the transistor operates in the saturation region. In this region, a small
increase in output voltage VCE will rapidly increases the output current IC.
Common Collector Configuration
 In this configuration, the base terminal of the transistor serves as the input, the emitter terminal is
the output and the collector terminal is common for both input and output. Hence, it is named as
common collector configuration.

Input characteristics
  The input current or base current (IB) is taken along y-axis (vertical line) and the input voltage or
base-collector voltage (VBC) is taken along x-axis (horizontal line).
 To determine the input characteristics, the output voltage VEC is kept constant at 3V and the input
voltage VBC is increased from zero volts to different voltage levels.
 For each level of input voltage VBC, the corresponding input current IB is noted. A curve is then
drawn between input current IB and input voltage VBC at constant output voltage VEC (3V).

 Next, the output voltage VEC is increased from 3V to different voltage level says for example 5V and
then kept constant at 5V. While increasing the output voltage VEC, the input voltage VBC is kept
constant at zero volts.
 After we kept the output voltage VEC constant at 5V, the input voltage VBC is increased from zero
volts to different voltage levels. For each level of input voltage VBC, the corresponding input current
IB is noted.
 A curve is then drawn between input current IB and input voltage VBC at constant output voltage
VEC (5V).
 This process is repeated for higher fixed values of output voltage (VEC).
Output characteristics
 The output characteristics describe the relationship between output current or emitter current (I E)
and output voltage or emitter-collector voltage (VEC).
 First, draw a vertical line and a horizontal line. The vertical line represents y-axis and horizontal line
represents x-axis.
 The output current or emitter current (IE) is taken along y-axis (vertical line) and the output voltage
or emitter-collector voltage (VEC) is taken along x-axis (horizontal line).
  To determine the output characteristics, the input current IB is kept constant at zero micro amperes
and the output voltage VEC is increased from zero volts to different voltage levels.
 For each level of output voltage VEC, the corresponding output current IE is noted. A curve is then
drawn between output current IE and output voltage VEC at constant input current IB (0 μA).
 Next, the input current (IB) is increased from 0 μA to 20 μA and then kept constant at 20 μA.
 A curve is then drawn between output current IE and output voltage VEC at constant input current
IB (20μA). This region is known as the active region of a transistor.
 This process is repeated for higher fixed values of input current I B (I.e. 40 μA, 60 μA, 80 μA and so
on).
Transistor Amplifier
 A transistor acts as an amplifier by raising the strength of a weak signal.
 The DC bias voltage applied to the emitter base junction, makes it remain in forward biased
condition.
 This forward bias is maintained regardless of the polarity of the signal. The below figure shows how
a transistor looks like when connected as an amplifier.
  The low resistance in input circuit, lets any small change in input signal to result in an appreciable
change in the output.
 The emitter current caused by the input signal contributes the collector current, which when flows
through the load resistor RL, results in a large voltage drop across it.
 Thus a small input voltage results in a large output voltage, which shows that the transistor works as
an amplifier.
Example
 Let there be a change of 0.1v in the input voltage being applied, which further produces a change of
1mA in the emitter current.
 This emitter current will obviously produce a change in collector current, which would also be 1mA.
 A load resistance of 5kΩ placed in the collector would produce a voltage of
5 kΩ × 1 mA = 5V
 Hence it is observed that a change of 0.1v in the input gives a change of 5v in the output, which
means the voltage level of the signal is amplified.
Operating point
 When a line is drawn joining the saturation and cut off points, such a line can be called as Load line.
 This line, when drawn over the output characteristic curve, makes contact at a point called as
Operating point. This operating point is also called as quiescent point or simply Q-point.
 There can be many such intersecting points, but the Q-point is selected in such a way that
irrespective of AC signal swing, the transistor remains in the active region.
 The operating point should not get disturbed as it should remain stable to achieve faithful
amplification.
 Hence the quiescent point or Q-point is the value where the Faithful Amplification is achieved.

 If the operating point is considered near saturation point, then the amplification will be as under.
  If the operation point is considered near cut off point, then the amplification will be as under.

Voltage Divider Bias Method

 Among all the methods of providing biasing and stabilization, the voltage divider bias method is the
most prominent one.
 Here, two resistors R1 and R2 are employed, which are connected to VCC and provide biasing. The
resistor RE employed in the emitter provides stabilization.
 The name voltage divider comes from the voltage divider formed by R 1 and R2. The voltage drop
across R2 forward biases the base-emitter junction.
 This causes the base current and hence collector current flow in the zero signals conditions. The
figure below shows the circuit of voltage divider bias method.
  Suppose that the current flowing through resistance R1 is I1. As base current IB is very small,
therefore, it can be assumed with reasonable accuracy that current flowing through R2 is also I1.
 Now let us try to derive the expressions for collector current and collector voltage.
Collector Current, IC
From the circuit, it is evident that,
I1=VCC /(R1+R2)
Therefore, the voltage across resistance R2 is
V2=[VCC /(R1+R2)]R2
Applying Kirchhoff’s voltage law to the base circuit,
V2=VBE+VE
V2=VBE+IERE
IE= (V2−VBE )/RE
Since IE ≈ IC
IC= (V2−VBE )/RE
 From the above expression, it is evident that IC doesn’t depend upon β. VBE is very small that IC
doesn’t get affected by VBE at all. Thus IC in this circuit is almost independent of transistor
parameters and hence good stabilization is achieved.
Collector-Emitter Voltage, VCE
 Applying Kirchhoff’s voltage law to the collector side,
VCC=ICRC+VCE+IERE
Since IE ≅ IC
=ICRC+VCE+ICRE
=IC(RC+RE)+VCE
Therefore,
VCE=VCC−IC(RC+RE)
RE provides excellent stabilization in this circuit.
V2=VBE+ICRE
 Suppose there is a rise in temperature, then the collector current I C decreases, which causes the
voltage drop across RE to increase.
  As the voltage drop across R2 is V2, which is independent of IC, the value of VBE decreases. The
reduced value of IB tends to restore IC to the original value.
Stability Factor
 The equation for Stability factor of this circuit is obtained as
Stability Factor S=(1+ β )/[1+ β (ΔIB/ΔIC)] = (β+1)×1/(β+1)=1
 This is the smallest possible value of S and leads to the maximum possible thermal stability.

Field Effect Transistor

 The Field Effect Transistor is a three terminal unipolar semiconductor device.
 There are two basic configurations of junction field effect transistor, the N-channel JFET and the P-
channel JFET. The N-channel JFET’s channel is doped with donor impurities meaning that the flow
of current through the channel is negative (hence the term N-channel) in the form of electrons.
 Likewise, the P-channel JFET’s channel is doped with acceptor impurities meaning that the flow of
current through the channel is positive (hence the term P-channel) in the form of holes.
 N-channel JFET’s have a greater channel conductivity (lower resistance) than their equivalent P-
channel types, since electrons have a higher mobility through a conductor compared to holes.
 This makes the N-channel JFET’s a more efficient conductor compared to their P-channel
counterparts.
 The symbols and basic construction for both configurations of JFETs are shown below.
Output characteristic V-I curves of a typical junction FET
  The voltage VGS applied to the Gate controls the current flowing between the Drain and the Source
terminals.
 VGS refers to the voltage applied between the Gate and the Source while V DS refers to the voltage
applied between the Drain and the Source.
 When the voltage between gate and source VGS is zero, or they are shorted, the current ID from
source to drain is also nil as there is no VDS applied. As the voltage between drain and source VDS is
increased, the current flow ID from source to drain increases. This increase in current is linear up to
a certain point A, known as Knee Voltage.
 The gate terminals will be under reverse biased condition and as I D increases, the depletion regions
tend to constrict.
 This constriction is unequal in length making these regions come closer at drain and farther at drain,
which leads to pinch off voltage.
 The pinch off voltage is defined as the minimum drain to source voltage where the drain current
approaches a constant value (saturation value). The point at which this pinch off voltage occurs is
called as Pinch off point, denoted as B.
 As VDS is further increased, the channel resistance also increases in such a way that I D practically
remains constant. The region BC is known as saturation region or amplifier region. All these along
with the points A, B and C are plotted in the graph below.
 The characteristics curves example shown above, shows the four different regions of operation for a
JFET and these are given as:
 Ohmic Region – When VGS = 0 the depletion layer of the channel is very small and the JFET acts like
a voltage controlled resistor.
 Cut-off Region – This is also known as the pinch-off region were the Gate voltage, VGS is sufficient to
cause the JFET to act as an open circuit as the channel resistance is at maximum.
 Saturation or Active Region – The JFET becomes a good conductor and is controlled by the Gate-
Source voltage, ( VGS ) while the Drain-Source voltage, ( VDS ) has little or no effect.
 Breakdown Region – The voltage between the Drain and the Source, ( VDS ) is high enough to causes
the JFET’s resistive channel to break down and pass uncontrolled maximum current.
Metal Oxide Semiconductor Field Effect Transistor or MOSFET
 As well as the Junction Field Effect Transistor (JFET), there is another type of Field Effect
Transistor available whose Gate input is electrically insulated from the main current carrying
channel and is therefore called an Insulated Gate Field Effect Transistor.
 The most common type of insulated gate FET which is used in many different types of electronic
circuits is called the Metal Oxide Semiconductor Field Effect Transistor or MOSFET for short.
 Like the previous JFET tutorial, MOSFETs are three terminal devices with a Gate, Drain and
Source and both P-channel (PMOS) and N-channel (NMOS) MOSFETs are available.
 The main difference this time is that MOSFETs are available in two basic forms:
 Depletion Type: The transistor requires the Gate-Source voltage, VGS to switch the device “OFF”.
The depletion mode MOSFET is equivalent to a “Normally Closed” switch.

 Enhancement Type: The transistor requires a Gate-Source voltage, ( VGS ) to switch the device
“ON”. The enhancement mode MOSFET is equivalent to a “Normally Open” switch.
 Basic MOSFET Structure and Symbol

Depletion-mode MOSFET
 The Depletion-mode MOSFET, which is less common than the enhancement mode types is normally
switched “ON” (conducting) without the application of a gate bias voltage.
  That is the channel conducts when VGS = 0 making it a “normally-closed” device. The circuit symbol
shown above for a depletion MOS transistor uses a solid channel line to signify a normally closed
conductive channel.
 For the n-channel depletion MOS transistor, a negative gate-source voltage, -VGS will deplete (hence
its name) the conductive channel of its free electrons switching the transistor “OFF”.

Fig: Depletion-mode MOSFET characteristics

Enhancement-mode MOSFET
 The more common Enhancement-mode MOSFET or EMOSFET, is the reverse of the depletion-mode
type.
 Here the conducting channel is lightly doped or even undoped making it non-conductive. This results
in the device being normally “OFF” (non-conducting) when the gate bias voltage, VGS is equal to
zero.
 The circuit symbol shown above for an enhancement MOS transistor uses a broken channel line to
signify a normally open non-conducting channel.
 For the n-channel enhancement MOS transistor a drain current will only flow when a gate voltage (
VGS ) is applied to the gate terminal greater than the threshold voltage ( VTH ) level
 The application of a positive (+ve) gate voltage to a n-type EMOSFET attracts more electrons
towards the oxide layer around the gate thereby increasing or enhancing (hence its name) the
thickness of the channel allowing more current to flow.
 This is why this kind of transistor is called an enhancement mode device as the application of a gate
voltage enhances the channel.
 Increasing this positive gate voltage will cause the channel resistance to decrease further causing an
increase in the drain current, ID through the channel.
 In other words, for an n-channel enhancement mode MOSFET: +VGS turns the transistor “ON”,
while a zero or -VGS turns the transistor “OFF”.
 Thus the enhancement-mode MOSFET is equivalent to a “normally-open” switch.”.

Fig: Enhancement-mode MOSFET characteristics