Tigris (Diagramas - Com.br) PDF

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Model:TIGRIS_SFF PCB BOARD SIZE 1 BUILD

PCB Ver: A00 4 Layers
Shark Bay :
PCB Number: 12125 -2 200mmX 244mm
LGA1150 : Haswell
PCB P/N: BOM Configuration Chipset : Lynx Point H81
SCH Ver: A00 Unmount:(R)
PCBA: LAN : Gb LAN RTL8151GD
D D
PAGE TITLE Quantity PAGE TITLE Quantity

01 Cover Page 31 TPM&TCM
02 BLOCK DIAGRAM 32 USB+RJ45
03 Power Delivery 33 REAR USB30_1
04 POWER GOOD AND RESET DIAGRAM 34 REAR USB20_2
05 CLOCKS DIAGRAM 35 LAN RTL8151G
06 Power Sequence 36 AUDIO CODEC_ALC3220
07 POWER Map 37 AUDIO CODEC JACKS
08 GPIO TABLE 38 DSW
09 TBD 39 SIO_SCH55553
10 CPU uLGA 1150_1 40 FAN CIRCUITS/HOLE
11 CPU uLGA 1150_2 41 KB/MS/Serial Port
12 CPU uLGA 1150_3 42 PCIEX1_ CONN
13 CPU uLGA 1150_4 43 MINI PCIE SLOT
14 XDP/80 PORT HEADER 44 EMC
15 DDR3 CHA DIMM 0 45 PWR/FNT PNL
16 TBD 46 DUAL POWER
C
17 DDR3 CHB DIMM 0 47 DC to DC_5V/3D3V(RT8243B) C
18 TBD 48 Run power/USB power

19 Lynxpoint_AUDIO/GPIO/SPI 49 DDR POWER
20 Lynxpoint_CLK 50 SYSTEM POWER
21 Lynxpoint_SATA/FAN/DP/VGA 51 CPU_VRD 12-5_1
22 Lynxpoint_FDI/PCIE/DMI/USB 52 CPU_VRD 12-5_2
23 Lynxpoint_GND/STRAPS
24 Lynxpoint_POWER
25 SATA Port
26 PCIEX16 CONNECTOR
27 VGA Port
28 Display Port
29 HDMI PORT
30 FRONT USB20 HEADER
B B
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A A
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<Variant Nam e>
Wistron Incorporated
21F, 88, Hs in Tai Wu Rd
nd
Hs ichih, Taipei
T itle
Cover Page
Size Docum ent Num ber Rev
C ROSA T IGRIS SFF 1
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Date: T hursday, April 03, 2014 Sheet 1 of 52

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PCB BOARD SIZE

200mmX 244mm INTEL
4 Layer VRM 12.5
( 3 Phase 95W) Haswell Channel A
SOCKET H3 uLGA LGA1150
Internal Slot/Header (65W) DDR3 DIMM
0.9144mmX0.9144mm 1600MHZ/1333MHZ Unbuffered 8GB
Front/Rear IO
D D
Chipset PCIE_X16 Gen2 PCI EXPRESS Gen2
Channel B 14.318MHz
DDR3 DIMM 33MHz

1600MHZ/1333MHZ Unbuffered 8GB PCH
24MHz or 48MHz
100 MHz CLOCK

Display Port v1.2 Port B 25M
120 MHz Buffer
133 MHz
100MHz
8 PIN PWR CONN FOR
FDI X2
DMI X4
100MHz CPU-4PIN CONN
SINGLE POWER RAIL PSU
C PCIE Port3 C
PCIE Gen2 Interface 5.0Gbps PCIE X1

INTEL PCH
D-SUB PORT RGB
Lynx Point
H81
USB3.0x2 REAR
USB 3.0 *2 5.0Gb/S PCIE Port4
PCIE Gen1 Interface 2.5Gbps
Intel LAN RJ45
RTL8151GD
USB2.0X2 FRONT HEADER USB 2.0 *8 480Mb/S
FCBGA 708PIN
23 mm x 22 mm 25M
SPI Flash ROM
Quad reader SPI BUS
8MB
USB2.0x2 REAR (+RJ45) GPIO
B B
SMBus 2.0
USB2.0X2 REAR
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SATA0-HDD SATA3.0 BUS
(Blue color)
SATA1-ODD SATA2.0 BUS

133MHz
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(White color) 100MHz
96MHz
REAR
Line - IN / HDA CODEC High Definition Audio 14.318MHz
MIC -IN ALC3220
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32.768KHz
REAR
Line - Out 32.7K
LPC BUS
FRONT TPM 1.2 LPC BUS

HP - OUT ST33ZP24AR
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FRONT
SIO SCH5553 FAN CNTL/TACH CPU 1X5 FAN
A MIC -IN A
on
Internal
SPEAKER SYS 1X5 FAN <Variant Nam e>
KB/MS/COM Wistron Incorporated

nd
Hs ichih, Taipei
T itle
Block Diagram
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CPU 2X2 POWER CONN

VCC12CPU PWM FDMS7698*6 V_CPU_CORE
NCP81102 FDMS0312As*6 TDC=55A
Peak 18A NCP81161*3 Imax=90A
Continue 14A
D D
3 Phase Design
ATX 2X4 POWER CONN

1D5V_S0_MINIPCIE
N-MOSFET:DMN3404L
Imax=0.75A
FDMS7698*1 V_SM N-MOSFET V_1P05_PCH

RT8237A APL5611
FDMS0312AS*1 Imax=14.5A FDMS7698 Imax=7A
12VBDC P-MOSFET 1 Phase Design

? A AO4435 V_SM_VTT
Imax= 10A APL5337
Imax=1A
C
+12V C
Dual Switch
P-MOSFET SB5V
+12V Dual AO3401A Imax=0.7A
FDMS7698*1 V_5P0_A
Diode
12V_AUX FDMS0312AS*1 Imax=10A
SSM24PT
1.67 A
Imax= 2A
N-MOSFET VCC
+12V_AUX AO4468 Imax=5A
RT8243
N-MOSFET 5VDUAL_USB_R
AO4468
Imax=4A+1.8A
FDS8884*1 V_3P3_A
B FDS6690AS*1 Imax=6A B
SWITCH V_3P3_PCIVAUX
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P-MOSFET Imax= 1.1A
SWITCH V_3P3_PCIVAUX_1
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P-MOSFET Imax= 1.1A
SB3V
P-MOSFET
Imax=2.5A
AO3401A
SWITCH V_3P3_LAN
ia
P-MOSFET Imax= 0.218A
N-MOSFET VCC3 V_1P5_PCH V_1P5_DAC_FB

UP0101Q
AO4468 Imax=7A
es Imax=0.35A Imax=0.1A
V_3P3_EPW
A A
Imax= 0.016A
on
<Variant Nam e>
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Hs ichih, Taipei
T itle
Power Delivery
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RESET / Power Good MAP

CPU-Haswell
UNCOREPWRGOOD
SM_DRAMPWROK
SM_DRAMRST*
D D
RESET*
DBR
(9) (8a) (11) (8b) DDRIII Slots
(8)
D3_RESET#
(9)
CPU-XDP
(1)
(10a)
C C
RES
(9)
ME POWER-GOOD (7) PROCPWRGD

(8) (1) LAN RT8151GD
APWROK DRAMPWROK PWRBTN# (12)
PCH_MEPWRGD PCIRST1# PLTRST_LAN_N
(2a) (2a)
SLP_SUS#/SUS_WARN# SLP_SUS#/SUS_WARN#
Power Botton (1) SLP_S4#
(3)
SUSC# WLAN
PWRBTN# PCIE_RST#
O_PWRBTN#IN
SIO SCH5553 PCI-E X1 Slot
PCH
(4)
SYS_RESET# SLP_S3# SUSB#
PLTRST_SL_X1_N
(11a)
PLTRST_PROC#
(11b)
PLTRST# LRESET#
(12) PCI-E X16 Slot
PCIRST2#
PLTRST_SL_X1_N
B AND (2b) B
VR12.5 RSMRST# RSMRST#

(10b)
VR_RDY SYS_PWROK
ATX Power
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(7) (5)
HD AUDIO PWROK PWRGD3 PSON# PSON
ALC3220
(13) (3) IO_SMI_N (6)
RESET# HDA_RST# GPIO8 GP22 ATXPG PWROK
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PROCPWRGD
PWRGD3
ia
PWROK
>1ms ATXPG
100~120ms
es
A A
on
<Variant Nam e>
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Hs ichih, Taipei
T itle
RESET / Power Good MAP
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Intel PCH
CK505
BTM: Buffer Through Mode
CLKOUT_PCI0 Rs LPC PORT80 Need CK505 to provide 4 clock to PCH
CLKOUT_PCI1
FCIM: Full Clock Intergration Mode
CLKOUT_PCI2 Rs Remove CK505
Loopback PCICLK_IN
CLKOUT_PCI3 Rs SIO NCT5532D

D CLKOUT_PCI4 D
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
R0 CPU XDP HEADER Rs USB48
R0
R0
R0
CLKOUT_PCIE0_N
CLKOUT_PCIE0_P
CLKOUT_PCIE1_N
CLKOUT_PCIE1_P
Rs REF
CLKOUT_PCIE2_N
Rs
CLKOUT_PCIE2_P
Realtek LAN DOT96C_LR
Rs DOT96T_LR
CLKOUT_PCIE3_N
CLKOUT_PCIE3_P
CLKOUT_PCIE4_N
CLKOUT_PCIE4_P SATAC_LR
Rs SATAT_LR
CLKOUT_PCIE5_N
CLKOUT_PCIE5_P
C
CLKOUT_PCIE6_N C
CLKOUT_PCIE6_P PCIEXC_LR
Rs PCIEXT_LR
CLKOUT_PCIE7_N
CLKOUT_PCIE7_P
R0 PCIEX1(RISER)
CLKOUT_FLEX0
CLKOUT_FLEX1(48M) Rs
CLKOUT_FLEX2
CLKOUT_FLEX3
CLKOUT_PEG_A#
R0 PCIE_X16 (RISER)
CLKOUT_PEG_A_P
CLKOUT_PEG_B#
CLKOUT_PEG_B_P
CLKOUT_BCLK0#
CLKOUT_BCLK0_P
CLKOUT_BCLK1#
CLKOUT_BCLK1_P
B B
CLKOUT_DMI#
R0 CPU DMI
CLKOUT_DMI_P
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CLKIN_DOT_N
CPUC_LR
CLKIN_DOT_P Rs CPUT_LR
CLKIN_BCLK_N
CLKIN_BCLK_P
.c
CLKIN_SATA_N
R0 CPU BCLK
CLKIN_SATA_P
CLKIN_DMI_N
ia
CLKIN_DMI_P
REFCLKIN
Note: Red Color is Gen2 spec.

LAN
es
Note: R0 is 0 ohm optional resister
Note: Rs is serie resister
A
Note: Green Color is direct-parallel option PCIEX16 A
SMB_CLK_RESUME
on
SMB_DATA_RESUME
PCIEX1
DDR3 <Variant Nam e>
SMB_CLK_MAIN
SMB_DATA_MAIN
SWITCH Clock Generator 21F, 88, Hs in Tai Wu Rd
nd
Hs ichih, Taipei
SMLICLK_PCH T itle
Clock Diagram
SMLIDATA_PCH Size Docum ent Num ber Rev

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POWER ON SEQUENCE
DMI Message
PLTRST_N
D D
PCH_SYSPWROK
VR_READY
SVID->VCCore/VAXG
H_PWRGD
PCH to CPU
PCH Output clock 100MHZ
H_DRAMPWRGD
PWRGD_3V
Logic circuit
PSPWRGD
V_1P05_PCH
C C
H_VTTPWRGD
(VCCIO PWRGD=Vcore,V_SA Enable)
V_1P5_PCH
VCC3
V_SM
SLP_S4_N
+12/VCC/VCC3
PS_ON_N
SIO_PSON*
SLP_LAN_N
SLP_S3_N
SLP_S4_N
B B
SUSCLK —
None use
RSMRST_N
SB5V/SB3V
SUS5V_ON_N
PWRBTN_N
om
PCH_SIO_DPWROK
.c
A V_5P0_A/V_3P3_A A
RTCCLK
RTCRST
ia
<Variant Name>
W istron Incorporated
21F, 88, Hsin T ai Wu Rd
VccRTC Hsichih, T aipei
Title
Power Sequence
Size Document Number Rev
D ROSA TIGRIS SFF
5 4 3
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Date:
1
Thursday, April 03, 2014 Sheet 6 of 52
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ALC3220 PCIE X16 Slot

D D
Intel LGA1150 VCC 5V (NA mA)

+12V +12V 2.0A
CPU Core Regulator(VRD 12.5)
SB3V
105A 0.5V-2.3V 70A VR_TDC V_CPU_CORE 3.3V (NA mA)
VCC12CPU 95A VCC3 VCC3 3.3V 1.5A
3-phase Switching
NCP81102 HASWELL SB3V
3.3Vaux 0.38A
V_3P3_PCIVAUX Switch
CPU XDP
V_CPU_VCCIO_RIGHT VCCIO_OUT
2.5A RTL8111G
1V 300m A P-MOSFET
AO3401 V_3P3_LAN 3.3V 70mA
VCCIO2PCH
VCC5A VCC
V_CPU_VCCIO2PCH VCCIO2PCH V_1P05_LAN 1.05V 300mA
1V 30m A
V_1P05_PCH CPU / DDR3
V_SM 1.5V 25A
Switch
1-phase Switching
SCH5555 PCIE X1 Slot
RT8237
DDR3 DIMM X2 & Termination BAT
+3.0V 2.4µA
+1.5V
+12V +12V 0.5A
V_SM(S0,S1) 7A VCC3 +3.3V 25mA
DDR3 MEM_VTT
V_SM(S3) 1.0A
V_SM_VTT SB3V +3.3V S3 8mA VCC3 3.3V 2A
+0.75V
0.75V 1.1A Linear
V_SM_VTT(S0) 1.1A V_3P3_A +3.3V_A
APL5337 3.3Vaux 0.1A V_3P3_PCIVAUX
V_1P05_PCH 1.05V 1mA
Intel PCH Lynx Point
Internal Suspend VR
C
1.05V mode using INTVRMEN 1.312A C
SPI ROM(4MB+2MB)
(VCC)
1.05V 5A V_3P3_EPW +3.3V 175mA
V_1P05_PCH
1.05V V_1P05_PCH 1.29A
MINIPCIe WLAN
V_SM (VCC)
APL5611
1.05V V_1P05_PCH 3.629A USB(Front:2*USB2.0) SB3V Switch V_3P3_PCIVAUX_1 3.3V 0.75A
(VCCIO)
V_SM Switch 1D5V_S0_MINIPCIE 1.5V 0.375A
1.05V V_1P05_PCH 0.306A
S0: 5VDUAL_USB_F (1A)
+12V (VCCCLK)
1.05V 1A
SB5V Filter 1.05V V_1P05_ME 0.67A S3: 5VDUAL_USB_F (0.2A)
V_1P05_ME
(VCCASW)
APL5611
1.5V V_1P5_PCH 0.183A
5VDUAL_USB_R USB(6 Rear:2*USB3.0 MINIPCIe mSATA
(VCCVRM)
1.5V 0.35A ,4*USB2.0)
VCC3
V_1P5_PCH 1.5V V_1P5_PCH 0.07A VCC3 3.3V 0.75A
(VCCADAC)
S0: 5VDUAL_USB_R (3.8A)
UP0101QSW8
V_SM Switch 1D5V_S0_MINIPCIE 1.5V 0.375A
3.3V VCC3 0.0133A S3: 5VDUAL_USB_R (0.6A)
VCC3
(VCCADAC3_3 )
V_12P0_A V_3P3_EPW 3.3V V_3P3_EPW 0.022A

Switch
TDC= ?A (VCCPSPI)
Imax= 0.016A
3.3V SB3V 0.261A
POWER SUPPLY SB3V
(VCCSUS3)
CRT
B
3.3V V_3P3_A 0.015A B
V_3P3_A +5V_VGA (1A f use)
(VCCDSW3_3) VCC
BAT
V_3P0_BAT_VREG 1mA
DIODE BAT54C
(VCCRTC)
Display Port
VCC3A
VCC3 3.3V (>0.5 A f use x 1)
N-MOSFET
VCC
AO4468
V_5P0_A
CPU Fans
om
+12V
V_5P0_A
P-MOSFET
P-MOSFET +12V +12V 200mA
AO3401A SB5V
AO4435
USB
SYS Fans
Switch
V_12P0_A 12V_DUAL RT8243M 5VDUAL_USB_R
.c
+12V +12V 200mA
A P-MOSFET N-MOSFET A
AO4435 AO4468 SB3V
V_3P3_A
P-MOSFET VCC3
ia
AO3401A <Variant Name>
Hsichih, T aipei
Title
Pow er Map
D ROSA TIGRIS SFF
5 4 3
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Date:
1
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D D
C C
TBD
B B
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A A
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<Variant Nam e>
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Hs ichih, Taipei
T itle

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D D
C C
B B
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.c
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es <Variant Name>
21F, 88, Hsin Tai Wu Rd
A A
Hsichih, Taipei
on
Title
TBD
nd

A ROSA TIGRIS SFF 1
Date: Thursday, April 03, 2014 Sheet 9 of 52
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CLOCK MINIMIZE STUB BETWEEN THESE AND RESISTORS AT SINAL PAGE

PLACE IN CRB AREA
20 CK_PE_100M _M CP_DP
20 CK_PE_100M _M CP_DN
H_VIDSCK_VR R94 1 2 0R0402-PAD-2-GP H_VIDSCK
V_CPU_VCCIO_RIGHT
H_VIDSOUT _VR 1 2 0R0402-PAD-2-GP H_VIDSOUT
R79
CPU_VCORE H_VIDALERT _N_VR 1 H_VIDALERT _N
2 0R0402-PAD-2-GP
R88 1 2 75R2F-2-GP
R92
51 VCC_SENSE R78 1 2 110R2F-GP
51 VSS_SENSE Jack change to 0 short pad U21E 5 OF 10
2013/05/20 1 2 90D9R2F-1-GP CK_PE_100M _M CP_DN V4 G39 HSW_XDP_M BP_0
R89 (R)
51 H_VIDSCK_VR CK_PE_100M _M CP_DP V5 BCLK# HASWELL BPM#0 J39 HSW_XDP_M BP_1
51 H_VIDSOUT _VR BCLK BPM#1 G38 T P_CPU_G38 1
H_VIDSCK BPM#2 T P_CPU_H37 T P13 T PAD28
51 H_VIDALERT _N_VR C38 H37 1 T P19 T PAD28
D H_VIDSOUT VIDSCLK BPM#3 T P_CPU_H38 D
C37 H38 1 T P15 T PAD28
H_VIDALERT _N H_VIDALERT _N_1 VIDSOUT BPM#4 T P_CPU_J38
R87 1 2 44D2R2F-GP B37 J38 1 T P17 T PAD28
R93 1 (R) 2 100R2J-2-GP VIDALERT# BPM#5 K39 T P_CPU_K39 1 T P21 T PAD28
XDP 14 H_T DO
H_DRAM PWRGD
R237 1
2013/6/26 Eric
2 0R0402-PAD-2-GP H_DRAM PWRGD_CPU
H_PWRGD
AK21
AB35 SM_DRAMPWROK
BPM#6
BPM#7
K37
T35
T P_CPU_K37
T P_CPU_T 35
1
1
T P30 T PAD28
PLT RST _CPU_N H_CPURST _N T P_CPU_M 38 T P55 T PAD28
14 H_T DI R119 1 2 0R0402-PAD-2-GP change to 0 ohm short pad M39 PWRGOOD RSVD_T35 M38 1
RESET# RSVD_M38 T P37 T PAD28
14 H_T CK
14 H_T M S H_PM _SYNC_0 P36 P6 T EST LOW_1 1 2
R82 49D9R2F-GP
1
14 H_T RST _N (R) H_PECI N37 PM_SYNC TESTLO_P6 K9 VCCST
14 H_PRDY_N C161 PECI RSVD_K9 H15 T P_RSVD_H15 1
14 H_PREQ_N SCD1U16V2KX-3GP T P_H_CAT ERR_N RSVD_H15 T P_RSVD_J9 T P16 T PAD28
1 M36 J9 1
2
T PAD28 T P29 H_PROCHOT _R_N CATERR# RSVD_J9 T P_RSVD_H14 T P20 T PAD28
K38 H14 1 T P34 T PAD28
14 XDP_DBRESET _N CPU_T HERM T RIP_N F37 PROCHOT# RSVD_H14 M8
H_SKT OCC_N THERMTRIP# VCC_M8 T P_RSVD_AV2 V_CPU_CORE
14 HSW_XDP_M BP_0 D38 AV2 1 T P69 T PAD28
14 HSW_XDP_M BP_1 03/21:follow CRB1.0 rout the CFG[0] to XDP ! SKTOCC# RSVD_AV2 J16 T P_RSVD_J16 1
H_PWRGD DIM M _CA_CPU_VREF_A RSVD_TP_J16 T P_RSVD_H16 T P18 T PAD28
AB38 H16 1 T P33 T PAD28
SM_VREF RSVD_TP_H16 N40 PWR_DEBUG
14 HSW_PCUDEBUG_0
14 HSW_PCUDEBUG_1 HSW_PCUDEBUG_0 AA37 PWR_DEBUG N39
HSW_PCUDEBUG_1 Y38 CFG0 VSS V7 T P_RSVD_V7 1
14 HSW_PCUDEBUG_2 T P54 T PAD28
HSW_PCUDEBUG_2 CFG1 VSS T P_RSVD_AB6
2
14 HSW_PCUDEBUG_3 AA36 AB6 1

HSW_PCUDEBUG_3 CFG2 VSS T P_RSVD_K13 T P58 T PAD28
1
14 HSW_PCUDEBUG_4 R158 (R) W38 K13 1
HSW_PCUDEBUG_4 CFG3 RSVD_TP_K13 T P_RSVD_J8 T P40 T PAD28
14 HSW_PCUDEBUG_5 10KR2J-3-GP C220 V39 J8 1
HSW_PCUDEBUG_5 CFG4 RSVD_TP_J8 DDR_RCOM P_0 T P23 T PAD28
14 HSW_PCUDEBUG_6 SCD1U16V2KX-3GP U39 R1 R91 1 2 100R2F-L1-GP-U
14 HSW_PCUDEBUG_7 2 HSW_PCUDEBUG_6 U40 CFG5 SM_RCOMP0 P1 DDR_RCOM P_1 1 2 75R2F-2-GP
R81
HSW_PCUDEBUG_7 CFG6 SM_RCOMP1 DDR_RCOM P_2
1
14 HSW_PCUDEBUG_8 V38 R2 R80 1 2 100R2F-L1-GP-U

14 HSW_PCUDEBUG_9 HSW_PCUDEBUG_8 T40 CFG7 SM_RCOMP2 AB36 T P_RSVD_AB36 1
HSW_PCUDEBUG_9 Y35 CFG8 RSVD_AB36 AW2 T P_RSVD_AW2 1 T P59 T PAD28
14 HSW_PCUDEBUG_10
HSW_PCUDEBUG_10 CFG9 RSVD_TP_AW2 T P_RSVD_AV1 T P74 T PAD28
14 HSW_PCUDEBUG_11 AA34 AV1 1
HSW_PCUDEBUG_11 CFG10 RSVD_TP_AV1 T P_RSVD_AC8 T P71 T PAD28
14 HSW_PCUDEBUG_12 V37 AC8 1
HSW_PCUDEBUG_12 CFG11 RSVD_AC8 T P61 T PAD28
14 HSW_PCUDEBUG_13 Y34 P4
14 HSW_PCUDEBUG_14 V_SM HSW_PCUDEBUG_13 U38 CFG12 VCOMP_OUT U8 T P_RSVD_U8 1 V_VCCIOA_LOAD
HSW_PCUDEBUG_14 W34 CFG13 RSVD_U8 AB33 T P_RSVD_AB33 1 T P51 T PAD28
14 HSW_PCUDEBUG_15
HSW_PCUDEBUG_15 V35 CFG14 RSVD_AB33 T8 CPU_VSS_T 8 T P60 T PAD28 1
H_DRAM PWRGD CFG15 RSVD_T8 T P_RSVD_Y8 T P50 T PAD28
14 HSW_PCUST B_0_DP R244 1 2 1K8R2-GP Y8 1
14 HSW_PCUST B_0_DN HSW_PCUST B_0_DP Y36 RSVD_Y8 M10 T P_RSVD_M 10 1 T P57 T PAD28
HSW_PCUST B_0_DN CFG17 RSVD_M10 T P_RSVD_L10 T P45 T PAD28
1
14 HSW_PCUST B_1_DP Y37 L10 1
14 HSW_PCUST B_1_DN HSW_PCUST B_1_DP V36 CFG16 RSVD_L10 M11 T P_RSVD_M 11 1 T P35 T PAD28
R236
C 3K3R2J-3-GP HSW_PCUST B_1_DN W36 CFG19 RSVD_M11 L12 T P_RSVD_L12 1 T P43 T PAD28 C
14 XDP_PWR_DEBUG CFG18 RSVD_L12 W8 T P_RSVD_W8 1 T P36 T PAD28
H_T CK D39 RSVD_W8 R33 T P_RSVD_R33 1 T P56 T PAD28
H_T DI TCK RSVD_R33 T P_RSVD_P33 T P49 T PAD28
2
F38 P33 1
V_CPU_VCCIO_RIGHT H_T DO F39 TDI RSVD_P33 E40 VCC_SENSE T P46 T PAD28
H_T M S E39 TDO VCC_SENSE
1
TMS N33 (R)
OTHER R100 1 2 51R2J-2-GP H_PROCHOT _R_N
Jack change to 0 short pad
H_T RST _N
H_PRDY_N
E37
L39 TRST#
VSS
VSS
J11
M9 R77
2013/05/20 H_PREQ_N L37 PRDY# VSS J7 49D9R2F-GP
V_1P05_PCH FP_RST _PCH_N PREQ# VSS VSS_SENSE
13 VCCST R114 1 2 0R0402-PAD-2-GP G40 F40
2
XDP_DBRESET _N DBR# VSS_SENSE
2 1 49D9R2F-GP T EST LOW_2 N5 N35 V_1P05_PECI_VCOM 1
R83
14,19 H_PWRGD PWR_DEBUG T P_RSVD_K8 TESTLO_N5 RSVD_N35 CK_DPNS_R_DN T P47 T PAD28
R104 1 2 150R2F-1-GP 1 K8 W6
T PAD28 T P26 1 T P_RSVD_J10 J10 RSVD_TP_K8 DPLL_REF_CLK# W5 CK_DPNS_R_DP
T PAD28 T P39 RSVD_TP_J10 DPLL_REF_CLK H40 T PEV_CFG_RCOM P
CFG_RCOMP
19 H_SKT OCC_N
1
14,19 FP_RST _PCH_N
1
19 H_DRAM PWRGD (R) HASWE1NFU
R105 R97
20 CK_DPNS_R_DN 10KR2J-3-GP (62.10040.A11) 49D9R2F-GP
20 CK_DPNS_R_DP
2
14,19,39,51 VR_READY
2
21 H_PM _SYNC_0
21 H_T HERM T RIP_N Eric change X01
39 H_PECI 2013/5/6
14,21 PLT RST _CPU_N
39,51 H_PROCHOT _N
DIM M _CA_CPU_VREF_A R460 1 2 2R2F-GP DIM M _CA_CPU_VREF_A_1 R232 1 2 0R0402-PAD-2-GP DIM M _CA_VREF_A
SB3V DIM M _CA_VREF_A 15
H_SKT OCC_N
1
R302 1 2 10KR2J-3-GP C212
SCD022U16V2KX-3GP DIM M _CA_VREF_B
R231 1 2 0R0402-PAD-2-GP
DIM M _CA_VREF_B 17
2
V_1P05_PCH Jack change to 0 short pad
B 2013/05/20 B
DIM M _CA_CPU_VREF_RC
1
Jack change X01 Put near DIMM side
1
2013/3/13 R150
R101 24D9R2F-L-GP
1KR2J-1-GP
om
(R)
2
2
Put near CPU side

H_T HERM T RIP_N 1 2 0R0402-PAD-2-GP CPU_T HERM T RIP_N
R99
H_PROCHOT _N 1 2 0R0402-PAD-2-GP H_PROCHOT _R_N
.c
R98
XDP_PWR_DEBUG PWR_DEBUG
R107 1 2 0R0402-PAD-2-GP

2013/05/20
ia
es
A A
on
<Variant Nam e>
nd
Hs ichih, Taipei
T itle
CPU uLGA 1150_1
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
PCIEX16
26 EXP_A_TX_DP[0..15]
26 EXP_A_TX_DN[0..15]
26 EXP_A_RX_DP[0..15] U21C 3 OF 10 U21D 4 OF 10

26 EXP_A_RX_DN[0..15] V_VCCIOA_LOAD
HASWELL A12 EXP_A_TX_DP0 DDSP_B_TX_DP_0
HASWELL E17
D EXP_A_RX_DP0 E15 PEG_TX0 B12 EXP_A_TX_DN0 DDIB_TXB0 DDSP_B_TX_DN_0 D
F17
EXP_A_RX_DN0 F15 PEG_RX0 PEG_TX#0 FDI_CSYNC DDIB_TXB#0 DDSP_B_TX_DP_1
1
D16 F18
PEG_RX#0 B11 EXP_A_TX_DP1 FDI_CSYNC DDIB_TXB1 DDSP_B_TX_DN_1
PEG_TX1 R95 G18
EXP_A_RX_DP1 EXP_A_TX_DN1 DDIB_TXB#1
D14 C11 24D9R2F-L-GP FDI_INT
DMI EXP_A_RX_DN1 E14 PEG_RX1
PEG_RX#1
PEG_TX#1
EXP_A_TX_DP2
D18
FDI_INT G19 DDSP_B_TX_DP_2 DP
C10 DDIB_TXB2 H19 DDSP_B_TX_DN_2
EXP_A_RX_DP2 E13 PEG_TX2 D10 EXP_A_TX_DN2 FDI_COMP DDIB_TXB#2 DDSP_B_TX_DP_3
2
22 DMI_IT_MR_DP[0..3] R4 F20
EXP_A_RX_DN2 F13 PEG_RX2 PEG_TX#2 DP_COMP DDIB_TXB3 DDSP_B_TX_DN_3
22 DMI_IT_MR_DN[0..3] G20
PEG_RX#2 B9 EXP_A_TX_DP3 CK_DP_DN DDIB_TXB#3
U5
EXP_A_RX_DP3 D12 PEG_TX3 C9 EXP_A_TX_DN3 CK_DP_DP SSC_DPLL_REF_CLK#
22 DMI_MT_IR_DP[0..3] U6 D19
EXP_A_RX_DN3 E12 PEG_RX3 PEG_TX#3 SSC_DPLL_REF_CLK DDIC_TXC0 E19
22 DMI_MT_IR_DN[0..3] PEG_RX#3 EXP_A_TX_DP4 DDIC_TXC#0
C8 1 DISP_UTIL_CPU E16 C20
EXP_A_RX_DP4 E11 PEG_TX4 D8 EXP_A_TX_DN4 TPAD28 TP14 EDP_DISP_UTIL DDIC_TXC1
PEG_RX4 PEG_TX#4 D20
EXP_A_RX_DN4 DDIC_TXC#1
F11 1 TP_DISP_K11 K11
PEG_RX#4 B7 EXP_A_TX_DP5 TPAD28 TP24 1 TP_DISP_J12 J12 RSVD_TP_K11 D21
EXP_A_RX_DP5 F10 PEG_TX5 C7 EXP_A_TX_DN5 TPAD28 TP25 RSVD_TP_J12 DDIC_TXC2
FDI EXP_A_RX_DN5
EXP_A_RX_DP6
G10 PEG_RX5
PEG_RX#5
PEG_TX#5
EXP_A_TX_DP6
DDIC_TXC#2
E21
C22
E9 A6 FDI_TX_DN0 B14 DDIC_TXC3 D22
22 FDI_CSYNC EXP_A_RX_DN6 PEG_RX6 PEG_TX6 EXP_A_TX_DN6 FDI_TX_DP0 FDI0_TX0#0 DDIC_TXC#3
F9 B6 A14
22 FDI_INT EXP_A_RX_DP7 PEG_RX#6 PEG_TX#6 FDI0_TX00
F8 B15
22 FDI_TX_DN[0..1] EXP_A_RX_DN7 G8 PEG_RX7 B5 EXP_A_TX_DP7 FDI_TX_DN1 DDID_TXD0
C13 C15
22 FDI_TX_DP[0..1] EXP_A_RX_DP8 D3 PEG_RX#7 PEG_TX7 C5 EXP_A_TX_DN7 FDI_TX_DP1 FDI0_TX0#1 DDID_TXD#0
B13 A16
EXP_A_RX_DN8 D4 PEG_RX8 PEG_TX#7 FDI0_TX01 DDID_TXD1
20 CK_DP_DP B16
EXP_A_RX_DP9 E4 PEG_RX#8 E1 EXP_A_TX_DP8 DDID_TXD#1
C 20 CK_DP_DN EXP_A_RX_DN9 PEG_RX9 PEG_TX8 EXP_A_TX_DN8 C
E5 E2 B17
EXP_A_RX_DP10 F5 PEG_RX#9 PEG_TX#8 DDID_TXD2 C17
EXP_A_RX_DN10 F6 PEG_RX10 F2 EXP_A_TX_DP9 DDID_TXD#2 A18
EXP_A_RX_DP11 G4 PEG_RX#10 PEG_TX9 F3 EXP_A_TX_DN9 DDID_TXD3 B18
EXP_A_RX_DN11 G5 PEG_RX11 PEG_TX#9 DDID_TXD#3
EXP_A_RX_DP12 H5 PEG_RX#11 G1 EXP_A_TX_DP10
EXP_A_RX_DN12 H6 PEG_RX12 PEG_TX10 G2 EXP_A_TX_DN10
EXP_A_RX_DP13 PEG_RX#12 PEG_TX#10 HASWE1NFU
J4 (62.10040.A11)
EXP_A_RX_DN13 J5 PEG_RX13 H2 EXP_A_TX_DP11
EXP_A_RX_DP14 K5 PEG_RX#13 PEG_TX11 H3 EXP_A_TX_DN11
EXP_A_RX_DN14 K6 PEG_RX14 PEG_TX#11
EXP_A_RX_DP15 L4 PEG_RX#14 J1 EXP_A_TX_DP12
V_VCCIOA_LOAD EXP_A_RX_DN15 L5 PEG_RX15 PEG_TX12 J2 EXP_A_TX_DN12
PEG_RX#15 PEG_TX#12 K2 EXP_A_TX_DP13
DMI_IT_MR_DP0 U3 PEG_TX13 K3 EXP_A_TX_DN13
DMI_IT_MR_DN0 T3 DMI_RX0 PEG_TX#13 M2 EXP_A_TX_DP14
DMI_IT_MR_DP1 U1 DMI_RX#0 PEG_TX14 M3 EXP_A_TX_DN14
DMI_IT_MR_DN1 V1 DMI_RX1 PEG_TX#14 L1 EXP_A_TX_DP15
DP PORT B DMI_RX#1 PEG_TX15 EXP_A_TX_DN15
1
L2
R90 DMI_IT_MR_DP2 W2 PEG_TX#15
DMI_IT_MR_DN2 V2 DMI_RX2 AA4 DMI_MT_IR_DP0
28 DDSP_B_TX_DN_0 24D9R2F-L-GP DMI_IT_MR_DP3 DMI_RX#2 DMI_TX0 DMI_MT_IR_DN0
Y3 AA5
28 DDSP_B_TX_DP_0 DMI_IT_MR_DN3 W3 DMI_RX3 DMI_TX#0
28 DDSP_B_TX_DN_1 DMI_RX#3 DMI_MT_IR_DP1
2
B
AB3 B
28 DDSP_B_TX_DP_1 1 TP_PEG_D1 D1 DMI_TX1 AB4 DMI_MT_IR_DN1
28 DDSP_B_TX_DN_2 TPAD28 TP10 1 TP_PEG_C2 C2 RSVD_TP_D1 DMI_TX#1
28 DDSP_B_TX_DP_2 TPAD28 TP11 1 TP_PEG_B3 B3 RSVD_TP_C2 AC5 DMI_MT_IR_DP2
28 DDSP_B_TX_DN_3 TPAD28 TP9 1 TP_PEG_A4 A4 RSVD_TP_B3 DMI_TX2 AC4 DMI_MT_IR_DN2
28 DDSP_B_TX_DP_3 TPAD28 TP8 RSVD_TP_A4 DMI_TX#2
PEG_COMP P3 AC1 DMI_MT_IR_DP3
PEG_RCOMP DMI_TX3 AC2 DMI_MT_IR_DN3
DMI_TX#3
HASWE1NFU
(62.10040.A11)
Sandy Bridge Socket
om
SKT1 SKT2 SKT3 SKT4
.c
<Variant Name>
A A
ia
Hsichih, Taipei
Title
CPU uLGA 1150_2
Load Plate Back Plate BACK PLATE Cover Sheet B ROSA TIGRIS SFF
(22.78003.021) (22.78006.031) (R60.3EQ19.001)
es (22.78005.171)
1
5 4 3 2 1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
DDR DATA
15 M _DAT A_A[0..63]
17 M _DAT A_B[0..63]
15 M _DQS_A_DP[0..7]
15 M _DQS_A_DN[0..7]
17 M _DQS_B_DP[0..7]
17 M _DQS_B_DN[0..7]
D D
DDR CMD/ADD
15 M _M AA_A[0..15] U21A 1 OF 10 U21B 2 OF 10
17 M _M AA_B[0..15]
M _DAT A_A0 AD38 AU13 M _M AA_A0 M _DAT A_B0 AE34 AL19 M _M AA_B0
HASWELL HASWELL
15 M _WE_A_N M _DAT A_A1 AD39 SA_DQ0 SA_MA0 AV16 M _M AA_A1 M _DAT A_B1 AE35 SB_DQ0 SB_MA0 AK23 M _M AA_B1
15 M _CAS_A_N M _DAT A_A2 AF38 SA_DQ1 SA_MA1 AU16 M _M AA_A2 M _DAT A_B2 AG35 SB_DQ1 SB_MA1 AM22 M _M AA_B2
15 M _RAS_A_N M _DAT A_A3 AF39 SA_DQ2 SA_MA2 AW17 M _M AA_A3 M _DAT A_B3 AH35 SB_DQ2 SB_MA2 AM23 M _M AA_B3
15 M _SBS_A0 M _DAT A_A4 AD37 SA_DQ3 SA_MA3 AU17 M _M AA_A4 M _DAT A_B4 AD34 SB_DQ3 SB_MA3 AP23 M _M AA_B4
15 M _SBS_A1 M _DAT A_A5 AD40 SA_DQ4 SA_MA4 AW18 M _M AA_A5 M _DAT A_B5 AD35 SB_DQ4 SB_MA4 AL23 M _M AA_B5
15 M _SBS_A2 M _DAT A_A6 AF37 SA_DQ5 SA_MA5 AV17 M _M AA_A6 M _DAT A_B6 AG34 SB_DQ5 SB_MA5 AY24 M _M AA_B6
M _DAT A_A7 AF40 SA_DQ6 SA_MA6 AT18 M _M AA_A7 M _DAT A_B7 AH34 SB_DQ6 SB_MA6 AV25 M _M AA_B7
17 M _WE_B_N M _DAT A_A9 AH40 SA_DQ7 SA_MA7 AU18 M _M AA_A8 M _DAT A_B8 AL34 SB_DQ7 SB_MA7 AU26 M _M AA_B8
17 M _CAS_B_N M _DAT A_A13 AH39 SA_DQ8 SA_MA8 AT19 M _M AA_A9 M _DAT A_B9 AL35 SB_DQ8 SB_MA8 AW25 M _M AA_B9
M _DAT A_A10 AK38 SA_DQ9 SA_MA9 AW11 M _M AA_A10 M _DAT A_B10 AK31 SB_DQ9 SB_MA9 AP18 M _M AA_B10
17 M _RAS_B_N
17 M _SBS_B0 M _DAT A_A11 AK39 SA_DQ10 SA_MA10 AV19 M _M AA_A11 M _DAT A_B11 AL31 SB_DQ10 SB_MA10 AY25 M _M AA_B11
M _DAT A_A12 AH37 SA_DQ11 SA_MA11 AU19 M _M AA_A12 M _DAT A_B12 AK34 SB_DQ11 SB_MA11 AV26 M _M AA_B12
17 M _SBS_B1
17 M _SBS_B2 M _DAT A_A8 AH38 SA_DQ12 SA_MA12 AY10 M _M AA_A13 M _DAT A_B13 AK35 SB_DQ12 SB_MA12 AR15 M _M AA_B13
M _DAT A_A14 AK37 SA_DQ13 SA_MA13 AT20 M _M AA_A14 M _DAT A_B14 AK32 SB_DQ13 SB_MA13 AV27 M _M AA_B14
M _DAT A_A15 AK40 SA_DQ14 SA_MA14 AU21 M _M AA_A15 M _DAT A_B15 AL32 SB_DQ14 SB_MA14 AY28 M _M AA_B15
M _DAT A_A17 AM40 SA_DQ15 SA_MA15 M _DAT A_B17 AN34 SB_DQ15 SB_MA15
M _DAT A_A21 AM39 SA_DQ16 AW10 M _ODT _A0 M _DAT A_B21 AP34 SB_DQ16 AM17 M _ODT _B0
DDR CTRL M _DAT A_A18
M _DAT A_A19
AP38
AP39
SA_DQ17
SA_DQ18
SA_ODT0
SA_ODT1
AY8
AW9
M _ODT _A1 M _DAT A_B19
M _DAT A_B23
AN31
AP31
SB_DQ17
SB_DQ18
SB_ODT0
SB_ODT1
AL16
AM16
M _ODT _B1
M _DAT A_A20 AM37 SA_DQ19 SA_ODT2 AU8 M _DAT A_B20 AN35 SB_DQ19 SB_ODT2 AK15
15 M _SCS_A_N0
15 M _SCS_A_N1 M _DAT A_A16 AM38 SA_DQ20 SA_ODT3 M _DAT A_B16 AP35 SB_DQ20 SB_ODT3
M _DAT A_A22 AP37 SA_DQ21 M _DAT A_B18 AN32 SB_DQ21 AM26
M _DAT A_A23 AP40 SA_DQ22 AW33 M _DAT A_B22 AP32 SB_DQ22 SB_ECC_CB0 AM25
15 M _SCKE_A0 M _DAT A_A25 AV37 SA_DQ23 SA_ECC_CB0 AV33 M _DAT A_B25 AM29 SB_DQ23 SB_ECC_CB1 AP25
M _DAT A_A29 AW37 SA_DQ24 SA_ECC_CB1 AU31 M _DAT A_B28 AM28 SB_DQ24 SB_ECC_CB2 AP26
15 M _SCKE_A1
M _DAT A_A26 AU35 SA_DQ25 SA_ECC_CB2 AV31 M _DAT A_B27 AR29 SB_DQ25 SB_ECC_CB3 AL26
M _DAT A_A27 AV35 SA_DQ26 SA_ECC_CB3 AT33 M _DAT A_B30 AR28 SB_DQ26 SB_ECC_CB4 AL25
15 M _ODT _A0 M _DAT A_A28 AT37 SA_DQ27 SA_ECC_CB4 AU33 M _DAT A_B24 AL29 SB_DQ27 SB_ECC_CB5 AR26
15 M _ODT _A1 M _DAT A_A24 AU37 SA_DQ28 SA_ECC_CB5 AT31 M _DAT A_B29 AL28 SB_DQ28 SB_ECC_CB6 AR25
M _DAT A_A30 AT35 SA_DQ29 SA_ECC_CB6 AW31 M _DAT A_B26 AP29 SB_DQ29 SB_ECC_CB7
C M _DAT A_A31 AW35 SA_DQ30 SA_ECC_CB7 M _DAT A_B31 AP28 SB_DQ30 AK17 M _SBS_B0 C
M _DAT A_A33 AY6 SA_DQ31 AV12 M _SBS_A0 M _DAT A_B32 AR12 SB_DQ31 SB_BS0 AL18 M _SBS_B1
M _DAT A_A37 AU6 SA_DQ32 SA_BS0 AY11 M _SBS_A1 M _DAT A_B33 AP12 SB_DQ32 SB_BS1 AW28 M _SBS_B2
17 M _SCS_B_N0
M _DAT A_A34 AV4 SA_DQ33 SA_BS1 AT21 M _SBS_A2 M _DAT A_B34 AL13 SB_DQ33 SB_BS2
17 M _SCS_B_N1 M _DAT A_A35 M _DAT A_B35 M _SCKE_B0
AU4 SA_DQ34 SA_BS2 AL12 SB_DQ34 AW29
M _DAT A_A36 AW6 SA_DQ35 AV22 M _SCKE_A0 M _DAT A_B36 AR13 SB_DQ35 SB_CKE0 AY29 M _SCKE_B1
M _DAT A_A32 AV6 SA_DQ36 SA_CKE0 AT23 M _SCKE_A1 M _DAT A_B37 AP13 SB_DQ36 SB_CKE1 AU28
17 M _SCKE_B0
17 M _SCKE_B1 M _DAT A_A38 AW4 SA_DQ37 SA_CKE1 AU22 M _DAT A_B38 AM13 SB_DQ37 SB_CKE2 AU29
M _DAT A_A39 AY4 SA_DQ38 SA_CKE2 AU23 M _DAT A_B39 AM12 SB_DQ38 SB_CKE3
M _DAT A_A41 AR1 SA_DQ39 SA_CKE3 M _DAT A_B45 AR9 SB_DQ39
17 M _ODT _B0 M _DAT A_A45 AR4 SA_DQ40 AU14 M _SCS_A_N0 M _DAT A_B41 AP9 SB_DQ40
M _DAT A_A42 AN3 SA_DQ41 SA_CS#0 AV9 M _SCS_A_N1 M _DAT A_B47 AR6 SB_DQ41
17 M _ODT _B1 M _DAT A_A43 SA_DQ42 SA_CS#1 M _DAT A_B43 SB_DQ42
AN4 AU10 AP6
M _DAT A_A44 AR2 SA_DQ43 SA_CS#2 AW8 M _DAT A_B44 AR10 SB_DQ43 AP17 M _SCS_B_N0
M _DAT A_A40 AR3 SA_DQ44 SA_CS#3 M _DAT A_B40 AP10 SB_DQ44 SB_CS#0 AN15 M _SCS_B_N1
M _DAT A_A46 AN2 SA_DQ45 AY15 CK_M _DDR0_A_DP M _DAT A_B46 AR7 SB_DQ45 SB_CS#1 AN17
M _DAT A_A47 AN1 SA_DQ46 SA_CK0 AY16 CK_M _DDR0_A_DN M _DAT A_B42 AP7 SB_DQ46 SB_CS#2 AL15
M _DAT A_A49 AL1 SA_DQ47 SA_CK#0 AW15 CK_M _DDR1_A_DP M _DAT A_B52 AM9 SB_DQ47 SB_CS#3
DDR CLOCK M _DAT A_A53
M _DAT A_A50
AL4
AJ3
SA_DQ48
SA_DQ49
SA_CK1
SA_CK#1
AV15
AV14
CK_M _DDR1_A_DN M _DAT A_B53
M _DAT A_B50
AL9
AL6
SB_DQ48
SB_DQ49 SB_CK0
AM20
AM21
CK_M _DDR0_B_DP
CK_M _DDR0_B_DN
15 CK_M _DDR0_A_DP M _DAT A_A51 AJ4 SA_DQ50 SA_CK2 AW14 M _DAT A_B55 AL7 SB_DQ50 SB_CK#0 AP22 CK_M _DDR1_B_DP
M _DAT A_A52 AL2 SA_DQ51 SA_CK#2 AW13 M _DAT A_B48 AM10 SB_DQ51 SB_CK1 AP21 CK_M _DDR1_B_DN
15 CK_M _DDR0_A_DN
15 CK_M _DDR1_A_DP M _DAT A_A48 AL3 SA_DQ52 SA_CK3 AY13 M _DAT A_B49 AL10 SB_DQ52 SB_CK#1
M _DAT A_A54 AJ2 SA_DQ53 SA_CK#3 M _DAT A_B54 AM6 SB_DQ53 AN20
15 CK_M _DDR1_A_DN
M _DAT A_A55 AJ1 SA_DQ54 AW12 T P_RSVD_AW12 1 M _DAT A_B51 AM7 SB_DQ54 SB_CK2 AN21
M _DAT A_A57 AG1 SA_DQ55 RSVD_AW12 T P77 T PAD28 M _DAT A_B61 AH6 SB_DQ55 SB_CK#2 AP19
M _DAT A_A61 AG4 SA_DQ56 M _DAT A_B60 AH7 SB_DQ56 SB_CK3 AP20
M _DAT A_A58 AE3 SA_DQ57 M _DAT A_B59 AE6 SB_DQ57 SB_CK#3
M _DAT A_A59 AE4 SA_DQ58 M _DAT A_B63 AE7 SB_DQ58 AP16 M _CAS_B_N
M _DAT A_A60 AG2 SA_DQ59 M _DAT A_B56 AJ6 SB_DQ59 SB_CAS# AL20
17 CK_M _DDR0_B_DP
17 CK_M _DDR0_B_DN M _DAT A_A56 AG3 SA_DQ60 M _DAT A_B57 AJ7 SB_DQ60 RSVD_AL20 AM18 M _RAS_B_N
M _DAT A_A62 AE2 SA_DQ61 M _DAT A_B58 AF6 SB_DQ61 SB_RAS# AK16 M _WE_B_N
17 CK_M _DDR1_B_DP
17 CK_M _DDR1_B_DN M _DAT A_A63 AE1 SA_DQ62 M _DAT A_B62 AF7 SB_DQ62 SB_WE#
M _DQS_A_DP0 AE39 SA_DQ63 M _DQS_B_DP0 AF35 SB_DQ63 AB39 DIM M _DQ_CPU_VREF_A
M _DQS_A_DP1 AJ39 SA_DQS0 M _DQS_B_DP1 AL33 SB_DQS0 SA_DIMM_VREFDQ AB40 DIM M _DQ_CPU_VREF_B
M _DQS_A_DP2 AN39 SA_DQS1 M _DQS_B_DP2 AP33 SB_DQS1 SB_DIMM_VREFDQ
M _DQS_A_DP3 AV36 SA_DQS2 M _DQS_B_DP3 AN28 SB_DQS2
M _DQS_A_DP4 AV5 SA_DQS3 M _DQS_B_DP4 AN12 SB_DQS3
B M _DQS_A_DP5 SA_DQS4 M _DQS_B_DP5 SB_DQS4 B
1
AP3 AP8
M _DQS_A_DP6 AK3 SA_DQS5 AU12 M _RAS_A_N M _DQS_B_DP6 AL8 SB_DQS5
C224 C234
M _DQS_A_DP7 AF3 SA_DQS6 SA_RAS# M _DQS_B_DP7 AG7 SB_DQS6 SCD1U16V2KX-3GP SCD1U16V2KX-3GP
SA_DQS7 M _WE_A_N SB_DQS7
2
AV32 AU11 AN25
M _DQS_A_DN0 AE38 SA_DQS8 SA_WE# M _DQS_B_DN0 AF34 SB_DQS8
M _DQS_A_DN1 AJ38 SA_DQS#0 AV20 T P_RSVD_AV20 1 M _DQS_B_DN1 AK33 SB_DQS#0
DDR OTHERS M _DQS_A_DN2 AN38 SA_DQS#1 RSVD_AV20 T P75 T PAD28 M _DQS_B_DN2 AN33 SB_DQS#1
om
M _DQS_A_DN3 AU36 SA_DQS#2 AW27 T P_RSVD_AW27 1 M _DQS_B_DN3 AN29 SB_DQS#2
M _DQS_A_DN4 AW5 SA_DQS#3 RSVD_AW27 T P78 T PAD28 M _DQS_B_DN4 AN13 SB_DQS#3
15,17 DDR3_DRAM RST _N
M _DQS_A_DN5 AP2 SA_DQS#4 AU9 M _CAS_A_N M _DQS_B_DN5 AR8 SB_DQS#4
17 DIM M _DQ_CPU_VREF_B M _DQS_A_DN6 AK2 SA_DQS#5 SA_CAS# M _DQS_B_DN6 AM8 SB_DQS#5
15 DIM M _DQ_CPU_VREF_A M _DQS_A_DN7 AF2 SA_DQS#6 AK22 DDR3_DRAM RST _N M _DQS_B_DN7 AG6 SB_DQS#6
AU32 SA_DQS#7 SM_DRAMRST# AN26 SB_DQS#7
SA_DQS#8 SB_DQS#8
1
.c
C267
SCD1U16V2KX-3GP
2
HASWE1NFU HASWE1NFU
(62.10040.A11) (62.10040.A11)
ia
es
A A
on
<Variant Nam e>
nd
Hs ichih, Taipei
T itle
CPU uLGA 1150_3
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
Put R333 near PCH side for V_CPU_VCCIO2PCH

is for PCH power
R132 1 2 0R2J-2-GP R103 1 (R) 2 0R2J-2-GP
V_1P05_PCH V_1P05_PCH
10 VCCST
V_CPU_VCCIO2PCH V_CPU_VCCIO_RIGHT
19,21,39 PWRGD_3V
1
R96 V_CPU_CORE U21F 6 OF 10 V_CPU_CORE U21I 9 OF 10 U21G 7 OF 10 U21J 10 OF 10
R102
0R3J-0-U-GP 0R2J-2-GP HASWELL A5 HASWELL AJ5 HASWELL HASWELL U21H 8 OF 10
P8 C31 A7 VSS VSS AJ8 AP11 AW32 G3
PCH_VCCI_OUT TP_RSVD_K12
2
1 2 L40 VCC VCC C33 A11 VSS VSS AJ34 AP14 VSS VSS AW34 G6 VSS K15 HASWELL K12 1
VCCIO_OUT VCC VSS VSS VSS VSS VSS VSS TP_RSVD_J13 TP41 TPAD28
VCCST R86 1 (R) 2 0R2J-2-GP VCCIO2PCH AB8 L16 A13 AJ35 AP15 AW36 G7 K16 RSVD_TP_K12 J13 1
VCCIO2PCH VCC VSS VSS VSS VSS VSS VSS TP31 TPAD28
L15 A15 AJ36 AP24 AW7 G12 K32 RSVD_TP_J13
VCC J35 A17 VSS VSS AJ37 AP27 VSS VSS AY17 G13 VSS VSS L36 PWRGD_3V TP_RSVD_P37
VCC VSS VSS VSS VSS VSS VSS TP_RSVD_AY18 P37 TP_RSVD_N38 1 TP44 TPAD28
RSVD_TP_P37
1
C149 C147 V_CPU_CORE L31 H33 A23 AJ40 AP30 AY23 G14 M4 TPAD28 TP76 1 AY18 N38 1 TP38 TPAD28
VCC VCC VSS VSS VSS VSS VSS VSS TP_RSVD_AW24 RSVD_AY18 RSVD_TP_N38
SCD1U16V2KX-3GP SC4D7U6D3V3KX-GP L18 H35 AA3 AK1 AP36 AY26 G15 M5 TPAD28 TP79 1 AW24
L17 VCC VCC J21 AA6 VSS VSS AK4 AP4 VSS VSS AY27 G16 VSS VSS M6 TP_RSVD_AW23 RSVD_AW24 TP_RSVD_R36
TPAD28 TP73 1 AW23 R36 1 TP48 TPAD28
VCC VCC VSS VSS VSS VSS VSS VSS TP_RSVD_AV29 RSVD_AW23 RSVD_TP_R36 TP_RSVD_C39
2
J33 J22 AA7 AK5 AP5 AY30 G17 M7 TPAD28 TP72 1 AV29 C39 1 TP12 TPAD28
A24 VCC VCC J23 AA8 VSS VSS AK6 AR11 VSS VSS AY5 G21 VSS VSS TP_RSVD_AV24 RSVD_AV29 RSVD_TP_C39
1
(R) TPAD28 TP67 1 AV24
VCC VCC VSS VSS VSS VSS VSS TP_RSVD_AU39 RSVD_AV24
A25 J24 AA33 AK7 AR14 AY7 G36 M35 R116 TPAD28 TP70 1 AU39 U35
VCC VCC VSS VSS VSS VSS VSS VSS TP_RSVD_AU27 RSVD_AU39 VSS
D A26 J25 AA35 AK8 AR16 B24 G37 M40 6K04R2F-GP TPAD28 TP65 1 AU27 P40 D
VCC VCC VSS VSS VSS VSS VSS VSS TP_RSVD_AU1 RSVD_AU27 VSS
A27 J26 AA38 AK9 AR17 B26 H1 N1 1 AU1
VCC VCC VSS VSS VSS VSS VSS VSS TPAD28 TP66 TP_RSVD_AT40
A28 J27 AB5 AK10 AR18 B28 H4 N2 RSVD_AU1
VCC VCC VSS VSS VSS VSS VSS VSS TPAD28 TP68 1 TP_RSVD_AK20 AT40 R38
2
A29 J28 AB7 AK11 AR19 B30 H7 N3 1 AK20 RSVD_AT40 VSS T37
VCC VCC VSS VSS VSS VSS VSS VSS TPAD28 TP64 VCCST_PWRGD
A30 J29 AB34 AK12 AR20 B34 H8 N4 Y7 RSVD_AK20 VSS V34
VCC VCC VSS VSS VSS VSS VSS VSS TP_RSVD_T34 RSVD_Y7 VSS
Jack change to 0 short pad G33 J30 AB37 AK13 AR21 B36 H9 N6 TPAD28 TP53 1 T34
VCC VCC VSS VSS VSS VSS VSS VSS TP_RSVD_R34 RSVD_T34
2013/05/20 B25 J32 AC3 AK14 AR22 B4 H10 N7 TPAD28 TP52 1 R34 R39
B27 VCC VCC J34 AC6 VSS VSS AK18 AR23 VSS VSS B8 H11 VSS VSS N8 TP_RSVD_J40 RSVD_R34 VSS
1
(R) TPAD28 TP22 1 J40
B29 VCC VCC K19 AC7 VSS VSS AK19 AR24 VSS VSS C4 H13 VSS VSS TP_RSVD_J17 RSVD_J40
VCC VCC VSS VSS VSS VSS VSS R115 TPAD28 TP27 1 TP_RSVD_J15 J17 T38
B31 K21 AC33 AK24 AR27 C6 H17 N34 2K67R2F-2-GP TPAD28 TP28 1 J15 RSVD_J17 VSS U36
VCC VCC VSS VSS VSS VSS VSS VSS TP_RSVD_H12 RSVD_J15 VSS
J31 K23 AC34 AK25 AR30 C12 H18 TPAD28 TP32 1 H12 P39
B33 VCC VCC K25 AC35 VSS VSS AK26 AR31 VSS VSS C14 H20 VSS RSVD_H12 VSS
VCC VCC VSS VSS VSS VSS VSS
2
G31 K27 AC36 AK27 AR32 C16 H21 P2 T36
B35 VCC VCC K29 AC37 VSS VSS AK28 AR33 VSS VSS C18 H22 VSS VSS P5 VSS
VCC VCC VSS VSS VSS VSS VSS VSS R37
C24 K31 AC38 AK29 AR34 C19 H24 P7 VSS
C25 VCC VCC M13 AC39 VSS VSS AK30 AR35 VSS VSS C21 H26 VSS VSS P34 J14 TP_CPU_N36
C26 VCC VCC K33 AC40 VSS VSS AK36 AR36 VSS VSS C23 H28 VSS VSS P35 VSS N36 1 TP42 TPAD28
C27 VCC VCC K35 AD1 VSS VSS AL5 AR37 VSS VSS C36 H30 VSS VSS P38 RSVD_TP_N36
C28 VCC VCC L19 AD2 VSS VSS AL11 AR38 VSS VSS B10 H32 VSS VSS R3
C29 VCC VCC L20 AD3 VSS VSS AL14 AR39 VSS VSS B23 H34 VSS VSS R5
C30 VCC VCC L21 AD4 VSS VSS AL17 AR40 VSS VSS C3 H36 VSS VSS R6 HASWE1NFU
C32 VCC VCC L22 AD5 VSS VSS AL21 AR5 VSS VSS D9 H39 VSS VSS R7
C34 VCC VCC L23 AD6 VSS VSS AL22 AT1 VSS VSS D11 J3 VSS VSS R8
VCC VCC VSS VSS VSS VSS VSS VSS (62.10040.A11)
C35 L24 AD7 AL24 AT10 D13 J6 R35
D25 VCC VCC L25 AD8 VSS VSS AL27 AT11 VSS VSS D15 J18 VSS VSS R40
D27 VCC VCC L26 AD33 VSS VSS AL30 AT12 VSS VSS D17 J19 VSS VSS T1
D29 VCC VCC L27 AD36 VSS VSS AL36 AT13 VSS VSS D2 J20 VSS VSS T2
D31 VCC VCC L28 AE5 VSS VSS AL37 AT14 VSS VSS D23 J36 VSS VSS T4
E33 VCC VCC L29 AE8 VSS VSS AL38 AT15 VSS VSS D24 J37 VSS VSS T5
VCC VCC VSS VSS VSS VSS VSS VSS
D33 L30 AE33 AL39 AT16 D26 K1 T6
E31 VCC VCC L32 AE36 VSS VSS AL40 AT2 VSS VSS D28 K4 VSS VSS T7
D35 VCC VCC L33 AE37 VSS VSS AM1 AT24 VSS VSS D30 K7 VSS VSS T33
E24 VCC VCC M17 AE40 VSS VSS AM2 AT25 VSS VSS D34 K10 VSS VSS T39
E25 VCC VCC M15 AF1 VSS VSS AM3 AT26 VSS VSS D36 K14 VSS VSS U2
VCC VCC VSS VSS VSS VSS VSS VSS
E26 M19 AF4 AM4 AT27 D37 K17 U4
E30 VCC VCC M27 AF36 VSS VSS AM15 AT30 VSS VSS E7 K24 VSS VSS U37
E32 VCC VCC M29 AG5 VSS VSS AM19 AT32 VSS VSS E8 K26 VSS VSS V3
E34 VCC VCC M33 AG8 VSS VSS AM24 AT34 VSS VSS E10 K28 VSS VSS V6
F23 VCC VCC AG33 VSS VSS AM27 AT36 VSS VSS E18 K30 VSS VSS V8
F25 VCC AJ12 AG36 VSS VSS AM30 AT38 VSS VSS E3 K34 VSS VSS V33
VCC VDDQ V_SM VSS VSS VSS VSS VSS VSS
F27 AJ13 AG37 AM31 AT39 E20 K36 V40
F29 VCC VDDQ AJ15 AG38 VSS VSS AM32 AT4 VSS VSS E22 K40 VSS VSS W1
F31 VCC VDDQ AJ17 AG39 VSS VSS AM33 AT5 VSS VSS E23 L3 VSS VSS W4
E35 VCC VDDQ AJ20 AG40 VSS VSS AM34 AT6 VSS VSS E36 L6 VSS VSS W7
F33 VCC VDDQ AJ21 AH1 VSS VSS AM35 AT7 VSS VSS E38 L7 VSS VSS W33
F35 VCC VDDQ AJ24 AH2 VSS VSS AM36 AT8 VSS VSS B32 L8 VSS VSS W35
VCC VDDQ VSS VSS VSS VSS VSS VSS
G22 AJ25 AH3 AN5 AT9 E6 L9 W37
G23 VCC VDDQ AJ28 AH4 VSS VSS AN6 AU2 VSS VSS F1 L11 VSS VSS Y4
C C
G26 VCC VDDQ AT17 AH33 VSS VSS AN9 AU30 VSS VSS F14 L35 VSS VSS Y33
VCC VDDQ VSS VSS VSS VSS VSS VSS
G27 AT22 AH36 AN10 AU34 F16 L38
VCC VDDQ VSS VSS VSS VSS VSS
AV39,AW38,AY3,B38,B39,C40,D40
G28 AU15 AJ11 AN11 AU38 F19 M1
G29 VCC VDDQ AU20 AJ14 VSS VSS AN14 AU5 VSS VSS F21 M12 VSS
G30 VCC VDDQ AU24 AJ16 VSS VSS AN16 AU7 VSS VSS F22 M14 VSS
G32 VCC VDDQ AV10 AJ18 VSS VSS AN18 AV21 VSS VSS F24 M16 VSS AU40
VCC VDDQ VSS VSS VSS VSS VSS VSS_NCTF_AU40
G34 AV11 AJ19 AN19 AV28 F26 M18 AV39
G35 VCC VDDQ AV13 AJ22 VSS VSS AN22 AV3 VSS VSS F28 M20 VSS VSS_NCTF_AV39 AW38
NCTF TEST PIN: AU40,

H23 VCC VDDQ AV18 AJ23 VSS VSS AN23 AV30 VSS VSS F30 M22 VSS VSS_NCTF_AW38 AY3
H25 VCC VDDQ AV23 AJ26 VSS VSS AN24 AV34 VSS VSS F34 M24 VSS VSS_NCTF_AY3 B38
H27 VCC VDDQ AV8 AJ27 VSS VSS AN27 AV38 VSS VSS F36 M26 VSS VSS_NCTF_B38 B39
VCC VDDQ VSS VSS VSS VSS VSS VSS_NCTF_B39
H29 AW16 AJ30 AN30 AV7 F4 M28 C40
H31 VCC VDDQ AY12 AJ31 VSS VSS AN36 AW26 VSS VSS D32 M30 VSS VSS_NCTF_C40 D40
L34 VCC VDDQ AY14 AJ32 VSS VSS AN37 AW3 VSS VSS F7 M32 VSS VSS_NCTF_D40
VCC VDDQ AY9 AJ33 VSS VSS AN40 AW30 VSS VSS G9 M34 VSS
VDDQ VSS VSS AP1 VSS VSS G11 M37 VSS
VSS VSS VSS
HASWE1NFU HASWE1NFU
HASWE1NFU
(62.10040.A11) (62.10040.A11)
(62.10040.A11)
HASWE1NFU
(62.10040.A11)
CPU Power Capacitor Quantity

PLACE ALL 0805 CAPS INSIDE CPU SOCKET CAVITY Net CAP AMOUNT
V_CPU_CORE
V_CPU_CORE Vcore 22uf 0805 22
V_SM 22uf 0805 4+5(R)

1
1
C156 C166 C169 C167 C168 C153 C160
1
B C152 C172 C159 C170 SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP B
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2
2
2
1
C171 C155 C154 C165 C164 C157 C158
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2
2
V_SM
(R) (R) (R) (R) (R)

1
C181 C173 C179 C178 C177 C176 C175 C174 C180

SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
2
om
PLACE CAPS AT TOP SOCKET EDGE
V_CPU_VCCIO_RIGHT
V_CPU_CORE
1
C142
.c
SC4D7U6D3V3KX-GP
2
1
C136 C133 C132 C134

A SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP A
2
ia
<Variant Name>
Hsichih, T aipei
Title
CPU uLGA 1150_4
D ROSA TIGRIS SFF
5 4 3
es 2
Date:
1
1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
2013/7/18
XDP for CPU

Eric change to DUMMY PAD
XDP for CPU V_CPU_VCCIO_RIGHT VCC3

10 H_T DO
10 H_T DI PLace Near XDP CONN
V_CPU_VCCIO_RIGHT
XDPC1
MH1 V_CPU_VCCIO_RIGHT
LPC DEBUG PORT
1
1 2
10 H_T M S H_T DI
10 H_T CK V_CPU_VCCIO_RIGHT R111 1 (R) 2 51R2J-2-GP R113 R292
51R2J-2-GP H_PREQ_N 3 4 HSW_PCUST B_0_DP 4K7R2J-2-GP
10 H_T RST _N H_T M S H_PRDY_N HSW_PCUST B_0_DN
10 H_PREQ_N R109 1 (R) 2 51R2J-2-GP 5 6
PLace Near CPU 7 8 LPC1
10 H_PRDY_N H_T CK H_T DO HSW_PCUDEBUG_0 HSW_PCUDEBUG_8 CK_P_33M _LPCP80 INIT _3V
2
R106 1 2 51R2J-2-GP 9 10 1 2
10 XDP_DBRESET _N HSW_PCUDEBUG_1 11 12 HSW_PCUDEBUG_9
10,19 H_PWRGD PLT RST _LPC_N
H_TCK TERMINATION PLACE 13 14 3 4
HSW_PCUDEBUG_2 15 16 HSW_PCUDEBUG_10 L_AD0 5 6 FWH_ID0 VCC3
NEAR CPU WITHIN 1.1 INCH HSW_PCUDEBUG_3 HSW_PCUDEBUG_11 L_AD1
17 18 7 8
10 HSW_PCUDEBUG_0 H_T RST _N L_AD2 VCC
R112 1 2 51R2J-2-GP 19 20 9 10
Notice:20.F0441.060
10 HSW_PCUDEBUG_1 HSW_XDP_M BP_0 HSW_PCUST B_1_DP L_AD3
Jack delete 0 Ohm resistors 21 22 11 12
10 HSW_PCUDEBUG_2 HSW_XDP_M BP_1 HSW_PCUST B_1_DN L_FRAM E_N
2
PLace Any where 20121228 23 24 13 14 (R)
D 10 HSW_PCUDEBUG_3 D
25 26 R318
10 HSW_PCUDEBUG_4 HSW_PCUDEBUG_4 27 28 HSW_PCUDEBUG_12
JWT -CONN14A-S3-GP 10KR2J-3-GP
10 HSW_PCUDEBUG_5 HSW_PCUDEBUG_5 HSW_PCUDEBUG_13
29 30 (X)
10 HSW_PCUDEBUG_6 PLT RST _CPU_N H_RST OUT _XDP_N
10 HSW_PCUDEBUG_7 R118 1 2 1KR2J-1-GP PLace Near XDP CONN 31 32
HSW_PCUDEBUG_6 HSW_PCUDEBUG_14
1
33 34
10 HSW_PCUDEBUG_8 VR_READY XDP_VR_READY HSW_PCUDEBUG_7 HSW_PCUDEBUG_15
10 HSW_PCUDEBUG_9 R108 1 2 0R0402-PAD-2-GP 35 36
Eric change short PAD 37 38
10 HSW_PCUDEBUG_10 XDP_PWRGD 39 40 CK_XDP_S_DP
10 HSW_PCUDEBUG_11 2013/5/7 XDP_PLT RST _N CK_XDP_S_DN Pin height 2.3mm
1
41 42
10 HSW_PCUDEBUG_12
C182 43 44
10 HSW_PCUDEBUG_13 XDP_PWR_DEBUG H_RST OUT _XDP_N
SCD1U16V2KX-3GP 45 46
10 HSW_PCUDEBUG_14 XDP_VR_READY XDP_DBRESET _N
2
47 48
10 HSW_PCUDEBUG_15
49 50
1 DAT A_M AIN 51 52 H_T DO
10
10
HSW_XDP_M BP_0
HSW_XDP_M BP_1
SMB_DATA_MAIN
SMB_CLK_MAIN
T PAD28 T P63
T PAD28 T P62 1 CLK_M AIN
H_T CK
53
55
54
56
H_T RST _N
H_T DI
H_T M S
Jack change for ARD
2013/03/21 APS CONNECTOR
57 58 V_3P3_A
10 HSW_PCUST B_0_DP PRIVACY_M SR_EN_N 1
59 60 2 HSW_PCUDEBUG_3 SB3V SB3V
10 HSW_PCUST B_0_DN
10 HSW_PCUST B_1_DP R110 1KR2J-1-GP
H_PWRGD XDP_PWRGD
R135 1 2 1KR2J-1-GP MH2 APS1
10 HSW_PCUST B_1_DN 1 2 SLP_S3_N_CN
1
DM -SM C-CONN60A-GP-01
10 XDP_PWR_DEBUG V_3P3_A_CN
(R) (X) R449 1 2 3 4
SLP_S4_N_CN 5 6 PCH_SLP_M _N_CN
R131 0R0402-PAD-2-GP
15,17,39 SM B_DAT A_M AIN 1KR2F-3-GP XDP_DBRESET _N 7 8
15,17,39 SM B_CLK_M AIN 9
X
10
CK_100M _CPU_XDP_DN CK_XDP_S_DN PWRBT N_N_APS
2
11 12
23 HSW_ST RAP_13 FP_RST _PCH_N_APS 13
1
14
CK_100M _CPU_XDP_DP CK_XDP_S_DP
20 CK_100M _CPU_XDP_DN C185
SCD1U16V2KX-3GP (X)
20 CK_100M _CPU_XDP_DP
2
Jack delete 0 Ohm resistors JWT -CONN14D-SFP8-GP
10,21 PLT RST _CPU_N 20121228 Eric change short PAD
2013/5/7
14,19,39,45 PWRBT N_N
SLP_S4_N 2 0R0402-PAD-2-GP SLP_S4_N_CN
R426 1
SLP_A# 2 0R0402-PAD-2-GP PCH_SLP_M _N_CN
R435 1
PWRBT N_N XDP_PLT RST _N SLP_S3_N 2 0R0402-PAD-2-GP SLP_S3_N_CN
C R121 1 2 0R0402-PAD-2-GP R440 1 C
Eric change short PAD PWRBT N_N
2013/5/7 R559 1 2 0R0402-PAD-2-GP PWRBT N_N_APS
FP_RST _PCH_N 2 0R0402-PAD-2-GP FP_RST _PCH_N_APS
R560 1
XDP for PCH

XDP for PCH MCP TERMINATION
19 PCH_JT AG_RST _R
19 PCH_JT AG_T DO Stuff 200 ohm for ES2 HSW_PCUDEBUG_3 1
RN4 (R)
NSP 8
19 PCH_JT AG_T DI HSW_PCUDEBUG_1
19 PCH_JT AG_T M S Empty for production HSW_PCUDEBUG_2
2
3
7
6
19 PCH_JT AG_T CK HSW_PCUDEBUG_0 4 5
14,19,39,45 PWRBT N_N
RN8P2-PAD-NSP-GP
19,23 IGC_EN_N
R312 1 2 0R0402-PAD-2-GP PCH_JT AG_PWR R297 1 2 200R2F-L-GP PCH_JT AG_T DO
19,38,39 RSM RST _SIO_N SB3V
19,39,51 VR_READY Eric change short PAD RN2 (R)
R317 1 2 200R2F-L-GP PCH_JT AG_T DI HSW_PCUDEBUG_5 1 NSP 8
13,19,21,39 PWRGD_3V 2013/5/7 HSW_PCUDEBUG_4 2 7
PCH_JT AG_T M S HSW_PCUDEBUG_7
R306 1 2 200R2F-L-GP 3 6
4 5
(R) RN8P2-PAD-NSP-GP
1
1
C252 2 1 SCD1U16V2KX-3GP
R298 R305 R309 RN11 (R)
100R2F-L1-GP-U 100R2F-L1-GP-U 100R2F-L1-GP-U HSW_PCUDEBUG_9 1 NSP 8
PCH_JT AG_T CK HSW_PCUDEBUG_8
R197 2 1 51R2J-2-GP 2 7
HSW_PCUST B_0_DN 3 6
HSW_PCUST B_0_DP
2
2
4 5
RN8P2-PAD-NSP-GP
RN1 (R)
B HSW_PCUDEBUG_15 B
1 NSP 8
HSW_PCUDEBUG_14 2 7
Jack change on PCH_JT AG_T DO 1 T P2 T PAD28
HSW_PCUDEBUG_12
HSW_PCUDEBUG_6
3 6
4 5
2012/11/28 PCH_JT AG_T DI
PCH_JT AG_T M S
1 T P3 T PAD28
1 T P85 T PAD28 RN8P2-PAD-NSP-GP
LPC DEBUG PORT
om
RN3 (R)
HSW_PCUST B_1_DP 1 NSP 8
HSW_PCUST B_1_DN 2 7
19,31,39 L_AD0 HSW_PCUDEBUG_11 3 6
19,31,39 L_AD1 SB3V HSW_PCUDEBUG_10 4 5
19,31,39 L_AD2
19,31,39 L_AD3
RN8P2-PAD-NSP-GP
19,31,39 L_FRAM E_N
.c
20 CK_P_33M _LPCP80
1
31,39 PLT RST _LPC_N

R261
20KR2J-L2-GP
PCH_JT AG_RST _R
2
APS CONNECTOR
ia
1
1
1
(R) (R) R265

C302 R263 10KR2J-3-GP
19,39,46,48,50,51 SLP_S3_N
SC1U10V2KX-1GP 0R2J-2-GP
19,39,48,49 SLP_S4_N
2
19 SLP_A# HSW_PCUDEBUG_13 HSW_ST RAP_13

2
es R122 1 2 1KR2J-1-GP
14,19,39,45 PWRBT N_N

10,19 FP_RST _PCH_N
A A
on
<Variant Nam e>
nd
Hs ichih, Taipei
T itle
XDP/80 PORT HEADER/APS
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
DDR DATA
12 M _DAT A_A[0..63]
12 M _DQS_A_DP[0..7] DIM M 1A 1 OF 3
DIM M 1C 3 OF 3 DIM M 1B 2 OF 3 V_SM
12 M _DQS_A_DN[0..7] M _DAT A_A0 3 188 M _M AA_A0
M _DAT A_A1 4 DQ0 A0 181 M _M AA_A1 M _DQS_A_DP0 7 2 51
M _DAT A_A2 9 DQ1 A1 61 M _M AA_A2 M _DQS_A_DN0 6 DQS0 5 VSS VDD 54
M _DAT A_A3 10 DQ2 A2 180 M _M AA_A3 M _DQS_A_DP1 16 DQS0# 8 VSS VDD 57
M _DAT A_A4 122 DQ3 A3 59 M _M AA_A4 M _DQS_A_DN1 15 DQS1 11 VSS VDD 60
DDR CMD/ADD M _DAT A_A6
M _DAT A_A7
128 DQ5
DQ6
A5
A6
178 M _M AA_A6
M _M AA_A7
M _DQS_A_DN2
M _DQS_A_DP3
24 DQS2
DQS2#
17 VSS
VSS
VDD
VDD
65
129 56 34 20 66
12 M _M AA_A[0..15] M _DAT A_A8 12 DQ7 A7 177 M _M AA_A8 M _DQS_A_DN3 33 DQS3 23 VSS VDD 69
12 M _WE_A_N M _DAT A_A10 18 DQ9 A9 70 M _M AA_A10 M _DQS_A_DN4 84 DQS4 29 VSS VDD 75
12 M _CAS_A_N M _DAT A_A11 19 DQ10 A10_AP 55 M _M AA_A11 M _DQS_A_DP5 94 DQS4# 32 VSS VDD 78
D 12 M _RAS_A_N M _DAT A_A12 131 DQ11 A11 174 M _M AA_A12 M _DQS_A_DN5 93 DQS5 35 VSS VDD 170 D
M _DAT A_A13 132 DQ12 A12_BC# 196 M _M AA_A13 M _DQS_A_DP6 103 DQS5# 38 VSS VDD 173
12 M _SBS_A0 M _DAT A_A14 137 DQ13 A13 172 M _M AA_A14 M _DQS_A_DN6 102 DQS6 41 VSS VDD 176
12 M _SBS_A1 M _DAT A_A15 138 DQ14 A14 171 M _M AA_A15 M _DQS_A_DP7 112 DQS6# 44 VSS VDD 179
12 M _SBS_A2 M _DAT A_A16 21 DQ15 A15_NC M _DQS_A_DN7 111 DQS7 47 VSS VDD 182
M _DAT A_A17 22 DQ16 71 M _SBS_A0 43 DQS7# 80 VSS VDD 183
M _DAT A_A18 27 DQ17 BA0 190 M _SBS_A1 42 DQS8 83 VSS VDD 186
DDR CTRL M _DAT A_A19
M _DAT A_A20
28 DQ18 BA1 52 M _SBS_A2 125 DQS8# 86 VSS VDD 189
140 DQ19 BA2 126 DQS9_DM0 89 VSS VDD 191
12 M _SCS_A_N0 M _DAT A_A21 141 DQ20 184 CK_M _DDR0_A_DP 134 DQS9#_NC 92 VSS VDD 194
12 M _SCS_A_N1 M _DAT A_A22 146 DQ21 CK0 185 CK_M _DDR0_A_DN 135 DQS10_DM1 95 VSS VDD 197
12 M _SCKE_A0 M _DAT A_A23 147 DQ22 CK0# 63 CK_M _DDR1_A_DP 143 DQS10#_NC 98 VSS VDD
12 M _SCKE_A1 M _DAT A_A24 30 DQ23 CK1_NC 64 CK_M _DDR1_A_DN 144 DQS11_DM2 101 VSS 48
12 M _ODT _A0 M _DAT A_A25 31 DQ24 CK1#_NC 152 DQS11#_NC 104 VSS VTT_48_NC 49
12 M _ODT _A1 M _DAT A_A26 36 DQ25 193 M _SCS_A_N0 153 DQS12_DM3 107 VSS VTT_49_NC 120
M _DAT A_A27 DQ26 S0# M _SCS_A_N1 DQS12#_NC VSS VTT V_SM _VT T
37 76 203 110 240
M _DAT A_A28 149 DQ27 S1#_NC 79 204 DQS13_DM4 113 VSS VTT
M _DAT A_A29 DQ28 S2#_NC DQS13#_NC VSS
DDR CLOCK M _DAT A_A30
M _DAT A_A31
150
155 DQ29 S3#_NC
198
M _SCKE_A0
212
213 DQS14_DM5
116
121 VSS EVENT#_NC
187
167
156 DQ30 50 221 DQS14#_NC 124 VSS NC_TEST
M _DAT A_A32 81 DQ31 CKE0 169 M _SCKE_A1 222 DQS15_DM6 127 VSS
12 CK_M _DDR0_A_DP M _DAT A_A33 DQ32 CKE1_NC DQS15#_NC VSS
82 230 130
12 CK_M _DDR0_A_DN M _DAT A_A34 DQ33 M _WE_A_N DQS16_DM7 VSS
87 73 231 133
12 CK_M _DDR1_A_DP M _DAT A_A35 DQ34 WE# M _RAS_A_N DQS16#_NC VSS
88 192 161 136
12 CK_M _DDR1_A_DN M _DAT A_A36 DQ35 RAS# M _CAS_A_N DQS17_DM8 VSS
200 74 162 139
M _DAT A_A37 201 DQ36 CAS# DQS17#_NC 142 VSS
M _DAT A_A38 206 DQ37 195 M _ODT _A0 NP1 145 VSS
DDR OTHERS M _DAT A_A39
M _DAT A_A40
207 DQ38 ODT0 77 M _ODT _A1 DM8 must connect to GND NP1 148 VSS
90 DQ39 ODT1_NC 151 VSS
10 DIM M _CA_VREF_A M _DAT A_A41 DDR3-240P-4-GP
91 DQ40 68 (022.10010.0001) 154 VSS
M _DAT A_A42 96 DQ41 PAR_IN_NC 53 157 VSS
12 DIM M _DQ_CPU_VREF_A M _DAT A_A43 97 DQ42 ERR_OUT#_NC 160 VSS
12,17 DDR3_DRAM RST _N M _DAT A_A44 209 DQ43 39 163 VSS
M _DAT A_A45 210 DQ44 CB0_NC 40 166 VSS
17,39 SM B_DAT A_M AIN M _DAT A_A46 215 DQ45 CB1_NC 45 199 VSS
17,39 SM B_CLK_M AIN M _DAT A_A47 216 DQ46 CB2_NC 46 202 VSS
M _DAT A_A48 99 DQ47 CB3_NC 158 205 VSS
M _DAT A_A49 DQ48 CB4_NC VSS
C
M _DAT A_A50
M _DAT A_A51
100
105 DQ49 CB5_NC
159
164 CHANNEL A DIMM1 208
211 VSS
C
106 DQ50 CB6_NC 165 214 VSS

M _DAT A_A52 218 DQ51 CB7_NC 217 VSS
M _DAT A_A53 219 DQ52 168 DDR3_DRAM RST _N SMB ADDRESS: 000 220 VSS
M _DAT A_A54 224 DQ53 RESET# 223 VSS
M _DAT A_A55 225 DQ54 236
SPD R/W: 0*A1, 0*A0 226 VSS
M _DAT A_A56 108 DQ55 VDDSPD 117 VCC3 229 VSS
M _DAT A_A57 109 DQ56 SA0 237 232 VSS
M _DAT A_A58 114 DQ57 SA1 119 235 VSS
M _DAT A_A59 115 DQ58 SA2 238 SM B_DAT A_M AIN 239 VSS
M _DAT A_A60 227 DQ59 SDA 118 SM B_CLK_M AIN VSS
M _DAT A_A61 228 DQ60 SCL
M _DAT A_A62 233 DQ61 1 DIM M _DQ_VREF_A
DDR3-240P-4-GP
M _DAT A_A63 234 DQ62 VREFDQ 67 DIM M _CA_VREF_A
(022.10010.0001)
DQ63 VREFCA
DDR3-240P-4-GP Trace: 12/12 mils

(022.10010.0001)
Black color
Pin Height is 2.7mm
V_SM DIMM VREF DQ A (To DIMM/CPU)

1
V_SM _VT T V_SM

1
R247 V_SM
1KR2F-3-GP C295
SCD1U16V2KX-3GP
2
2
1
T C3 C250
E820U2D5VM -6-GP SC4D7U6D3V3KX-GP C251 C247 C280 C245 C253 C282
DIM M _DQ_VREF_A_L 1 R238 2 DIM M _DQ_VREF_A SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
B B
2
2
0R0402-PAD-2-GP
1
C271
R242 SCD1U16V2KX-3GP
1KR2F-3-GP
2
2
om
DIM M _DQ_CPU_VREF_A
Place Near Power Pin
R172 1 2 2R2F-GP
Net CAP Qty
1
C238
SCD022U16V2KX-3GP V_SM 0.1uf 0402 Y5V 5+4
.c
2
DIM M _DQ_CPU_VREF_RC
V_SM_VTT 4.7uf 0603 X5R 1
1
R188 V_SM_VTT 0.1uf 0402 Y5V 1

24D9R2F-L-GP
ia
2
Layout NOTE: place above the DIMM side
CAPS FOR DIMM

DIMM VREF CA A (To DIMM)
V_SM
es
V_SM
1
A R234 C248 (R) C342 A

1KR2F-3-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
on
2
Eric add C342 (R) (R) (R) (R)

1
1
C299 C298 C297 C300
2013/5/6
2
SC22U6D3V5M X-2GP SC22U6D3V5M X-2GP SC22U6D3V5M X-2GP SC22U6D3V5M X-2GP

2
2
DIM M _CA_VREF_A <Variant Nam e>
1
R235 Eric del R233 C270 C426 21F, 88, Hs in Tai Wu Rd

nd
1KR2F-3-GP SCD1U16V2KX-3GP SC4D7U6D3V2M X-GP-U

2013/5/6 Hs ichih, Taipei
2
T itle
2
Eric add C426 DDR3 CHA DIMM 0

2013/7/5
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
D D
C C
B B
om
.c
ia
es <Variant Name>
A A
Hsichih, Taipei
on
Title
TBD
nd

A ROSA TIGRIS SFF 1
-i
5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
DDR DATA DIM M 2A 1 OF 3

DIM M 2C 3 OF 3 DIM M 2B 2 OF 3 V_SM
12 M _DAT A_B[0..63] M _DAT A_B0 3 188 M _M AA_B0
12 M _DQS_B_DP[0..7] M _DAT A_B1 DQ0 A0 M _M AA_B1 M _DQS_B_DP0
4 181 7 2 51
12 M _DQS_B_DN[0..7] M _DAT A_B2 9 DQ1 A1 61 M _M AA_B2 M _DQS_B_DN0 6 DQS0 5 VSS VDD 54
M _DAT A_B3 10 DQ2 A2 180 M _M AA_B3 M _DQS_B_DP1 16 DQS0# 8 VSS VDD 57
M _DAT A_B4 122 DQ3 A3 59 M _M AA_B4 M _DQS_B_DN1 15 DQS1 11 VSS VDD 60
DDR CMD/ADD M _DAT A_B8
M _DAT A_B9
12 DQ7
DQ8
A7
A8
177 M _M AA_B8
M _M AA_B9
M _DQS_B_DN3
M _DQS_B_DP4
33 DQS3
DQS3#
23 VSS
VSS
VDD
VDD
69
13 175 85 26 72
12 M _M AA_B[0..15] M _DAT A_B11 19 DQ10 A10_AP 55 M _M AA_B11 M _DQS_B_DP5 94 DQS4# 32 VSS VDD 78
12 M _WE_B_N M _DAT A_B13 132 DQ12 A12_BC# 196 M _M AA_B13 M _DQS_B_DP6 103 DQS5# 38 VSS VDD 173
12 M _CAS_B_N M _DAT A_B14 137 DQ13 A13 172 M _M AA_B14 M _DQS_B_DN6 102 DQS6 41 VSS VDD 176
D 12 M _RAS_B_N M _DAT A_B15 DQ14 A14 M _M AA_B15 M _DQS_B_DP7 DQS6# VSS VDD D
138 171 112 44 179
12 M _SBS_B0 M _DAT A_B16 21 DQ15 A15_NC M _DQS_B_DN7 111 DQS7 47 VSS VDD 182
12 M _SBS_B1 M _DAT A_B17 22 DQ16 71 M _SBS_B0 43 DQS7# 80 VSS VDD 183
12 M _SBS_B2 M _DAT A_B18 27 DQ17 BA0 190 M _SBS_B1 42 DQS8 83 VSS VDD 186
M _DAT A_B19 28 DQ18 BA1 52 M _SBS_B2 125 DQS8# 86 VSS VDD 189
M _DAT A_B20 140 DQ19 BA2 126 DQS9_DM0 89 VSS VDD 191
DDR CTRL M _DAT A_B21
M _DAT A_B22
141 DQ20 184 CK_M _DDR0_B_DP
CK_M _DDR0_B_DN
134 DQS9#_NC 92 VSS VDD 194
146 DQ21 CK0 185 135 DQS10_DM1 95 VSS VDD 197
12 M _SCS_B_N0 M _DAT A_B23 147 DQ22 CK0# 63 CK_M _DDR1_B_DP 143 DQS10#_NC 98 VSS VDD
12 M _SCS_B_N1 M _DAT A_B24 30 DQ23 CK1_NC 64 CK_M _DDR1_B_DN 144 DQS11_DM2 101 VSS 48
12 M _SCKE_B0 M _DAT A_B25 31 DQ24 CK1#_NC 152 DQS11#_NC 104 VSS VTT_48_NC 49
12 M _SCKE_B1 M _DAT A_B26 36 DQ25 193 M _SCS_B_N0 153 DQS12_DM3 107 VSS VTT_49_NC 120
12 M _ODT _B0 M _DAT A_B27 37 DQ26 S0# 76 M _SCS_B_N1 203 DQS12#_NC 110 VSS VTT 240 V_SM _VT T
12 M _ODT _B1 M _DAT A_B28 149 DQ27 S1#_NC 79 204 DQS13_DM4 113 VSS VTT
M _DAT A_B29 150 DQ28 S2#_NC 198 212 DQS13#_NC 116 VSS 187
M _DAT A_B30 155 DQ29 S3#_NC 213 DQS14_DM5 121 VSS EVENT#_NC 167
M _DAT A_B31 DQ30 M _SCKE_B0 DQS14#_NC VSS NC_TEST
DDR CLOCK M _DAT A_B32
M _DAT A_B33
156
81 DQ31 CKE0
50
169 M _SCKE_B1
221
222 DQS15_DM6
124
127 VSS
82 DQ32 CKE1_NC 230 DQS15#_NC 130 VSS
12 CK_M _DDR0_B_DP M _DAT A_B34 DQ33 M _WE_B_N DQS16_DM7 VSS
87 73 231 133
12 CK_M _DDR0_B_DN M _DAT A_B35 DQ34 WE# M _RAS_B_N DQS16#_NC VSS
88 192 161 136
12 CK_M _DDR1_B_DP M _DAT A_B36 DQ35 RAS# M _CAS_B_N DQS17_DM8 VSS
200 74 162 139
12 CK_M _DDR1_B_DN M _DAT A_B37 DQ36 CAS# DQS17#_NC VSS
201 142
M _DAT A_B38 206 DQ37 195 M _ODT _B0 NP1 145 VSS
M _DAT A_B39 207 DQ38 ODT0 77 M _ODT _B1 DM8 must connect to GND NP1 148 VSS
M _DAT A_B40 90 DQ39 ODT1_NC 151 VSS
DDR OTHERS M _DAT A_B41
M _DAT A_B42
91 DQ40 68
DDR3-240P-4-GP
(022.10010.0001) 154 VSS
96 DQ41 PAR_IN_NC 53 157 VSS
M _DAT A_B43 97 DQ42 ERR_OUT#_NC 160 VSS
10 DIM M _CA_VREF_B M _DAT A_B44 209 DQ43 39 163 VSS
M _DAT A_B45 210 DQ44 CB0_NC 40 166 VSS
12 DIM M _DQ_CPU_VREF_B M _DAT A_B46 DQ45 CB1_NC VSS
215 45 199
M _DAT A_B47 216 DQ46 CB2_NC 46 202 VSS
12,15 DDR3_DRAM RST _N M _DAT A_B48 99 DQ47 CB3_NC 158 205 VSS
15,39 SM B_DAT A_M AIN

M _DAT A_B49
M _DAT A_B50
100 DQ48 CB4_NC 159 CHANNEL B DIMM1 208 VSS
105 DQ49 CB5_NC 164 211 VSS
15,39 SM B_CLK_M AIN M _DAT A_B51 DQ50 CB6_NC VSS
106 165 SMB ADDRESS: 010 214
C M _DAT A_B52 218 DQ51 CB7_NC 217 VSS C
M _DAT A_B53 219 DQ52 168 DDR3_DRAM RST _N 220 VSS
M _DAT A_B54 224 DQ53 RESET# SPD R/W: 0*A5, 0*A4 223 VSS
M _DAT A_B55 225 DQ54 236 226 VSS
M _DAT A_B56 DQ55 VDDSPD VCC3 VSS
108 117 229
M _DAT A_B57 109 DQ56 SA0 237 232 VSS
M _DAT A_B58 114 DQ57 SA1 119 235 VSS
M _DAT A_B59 115 DQ58 SA2 238 SM B_DAT A_M AIN 239 VSS
M _DAT A_B60 227 DQ59 SDA 118 SM B_CLK_M AIN VSS
M _DAT A_B61 228 DQ60 SCL
M _DAT A_B62 233 DQ61 1 DIM M _DQ_VREF_B
DDR3-240P-4-GP
M _DAT A_B63 234 DQ62 VREFDQ 67 DIM M _CA_VREF_B
(022.10010.0001)
DQ63 VREFCA
DDR3-240P-4-GP Trace: 12/12 mils

(022.10010.0001)
Black color
Pin Height is 2.7mm
DIMM VREF DQ B (To DIMM/CPU)

V_SM V_SM
V_SM V_SM C279 1 2 SCD1U16V2KX-3GP
V_SM
1
R248
1KR2F-3-GP C294
1
1
SCD1U16V2KX-3GP (R)
2
C281 C293 C289 C287 (R)

2
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SC1U10V2KX-1GP SCD1U16V2KX-3GP

2
1
DIM M _DQ_VREF_B_L 1 R239 2 DIM M _DQ_VREF_B
C277 C276 C278 C274
0R0402-PAD-2-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2
1
C272
1KR2F-3-GP
B B
2
2
V_SM _VT T
1
(R) (R)
C290 C291 C283 C275
DIM M _DQ_CPU_VREF_B
R170 1 2 2R2F-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2
om
1
1
1
C225 C284 C273

SCD022U16V2KX-3GP SC4D7U6D3V3KX-GP SCD1U16V2KX-3GP
2
2
2
1
(R) (R) (R) (R)
DIM M _DQ_CPU_VREF_B_RC
C249 C292 C296 C286 C246
SCD1U16V2KX-3GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP
2
.c
1
R166
24D9R2F-L-GP
2
Layout NOTE: place above the DIMM side Place Near Power Pin
ia
Net CAP Qty
DIMM VREF CA B (To DIMM) V_SM 0.1uf 0402 Y5V 9
V_SM
V_SM 1uf 0402 X5R 5

es
1
R229 (R) C288 (R) V_SM_VTT 0.1uf 0402 Y5V 1

1KR2F-3-GP SCD1U16V2KX-3GP
2
V_SM_VTT 4.7uf 0603 X5R 1

2
A Eric unmount R228,R229,C288 A

on
2013/5/6 DIM M _CA_VREF_B
1
R228 (R) C269

<Variant Nam e>
1KR2F-3-GP Eric del R230 SCD1U16V2KX-3GP
2013/5/6 Wistron Incorporated
2
2

nd
Hs ichih, Taipei
T itle
DDR3 CHB DIMM 0
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
D D
C C
B B
om
.c
ia
es <Variant Name>
A A
Hsichih, Taipei
on
Title
TBD
nd

A ROSA TIGRIS SFF 1
-i
5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
LPC SB3V
VCC3
14,31,39 L_AD0
14,31,39 L_AD1
14,31,39 L_AD2 SB3V VCC3
14,31,39 L_AD3
PECI_REQ_N
R409 1 2 10KR2J-3-GP
14,31,39 L_FRAME_N INTRUDER_DET
R44 1 2 10KR2J-3-GP
FVS must larger than 150mil R46 1 (R) 2 10KR2J-3-GP

for factory HDA & GPIO & SPI IO_SMI_N
R482 1 2 10KR2J-3-GP
HD LINK Jack add 2012/11/24 U32D 4 OF 11
LANPWR_EN
R58 1 2 10KR2J-3-GP
(R)
36 AUD_LINK_BCLK LPC_DRQ1_N PECI_REQ_N PCH_RI LPC_DRQ1_N
TPAD385X385-GP FVS1 1 AK26 G38 R299 1 2 10KR2J-3-GP R246 1 2 10KR2J-3-GP
36 AUD_LINK_RST_N L_AD0 L_AD0_R LDRQ1#/GPIO23 BMBUSY#/GPIO0 FB_USBF1_DET
R311 1 2 33R2J-2-GP AN24 N32
36 AUD_LINK_SDIN L_AD1 L_AD1_R LAD0 CLKRUN#/GPIO32 SOP_ENABLE_GP33 SERIAL_DETECT
R319 1 2 33R2J-2-GP AP26 AV26 R225 1 2 10KR2J-3-GP
36 AUD_LINK_SDO L_AD2 L_AD2_R LAD1 DOCKEN#/GPIO33 SPK_DETECT FP_RST_PCH_N
L_AD3 R321 1 2 33R2J-2-GP L_AD3_R AJ24 N34 R283 1 2 2K2R2J-2-GP
36 AUD_LINK_SYNC R328 1 2 33R2J-2-GP AN26 LAD2 STPPCI#/GPIO34 R45 1 (R) 2 1KR2J-1-GP
23 AUD_LINK_SDO_R LAD3 IGC_EN_N
AK22 AC40
L_FRAME_N L_FRAME_N_R LDRQ0# GPIO8 LANPWR_EN SPK_DETECT
R336 1 2 33R2J-2-GP AP24 AL40 R253 1 2 10KR2J-3-GP
LFRAME# LAN_PHY_PWR_CTRL/GPIO12 GPIO_PCIE_RESET
AUD_LINK_BCLK AUD_LINK_BCLK_R AN22 TLS_EN
R162 1 2 33R2J-2-GP AV23 HDA_DOCK_RST#/GPIO13 AC32
SMBUS
26,39,42,43 SMB_CLK_RESUME
AUD_LINK_RST_N
R163 1 2 33R2J-2-GP
AUD_LINK_RST_R_N
AU24 HDA_CLK
HDA_RST#
GPIO15
GPIO24
AE34
H_SKTOCC_R_N
1_WATT_CTRL_1
R303 1 2 0R0402-PAD-2-GP
H_SKTOCC_N FB_USBF1_DET
R278 1 2 10KR2J-3-GP
D AT26 V41 SLP_WLAN_N Eric change short PAD D
26,39,42,43 SMB_DATA_RESUME AV22 HDA_SDI0 GPIO28 AL39
AUD_LINK_SDIN MTST_ID 2013/5/7 ME_CNTL MINI_CLKREQ#_WLAN
HDA_SDI1 SLP_WLAN#/GPIO29 R146
39 SMLICLK_PCH AT22 W34 MINI_CLKREQ#_WLAN 1 2 10KR2J-3-GP R339 1 2 10KR2J-3-GP
AW23 HDA_SDI2 PCIECLKRQ0#/GPIO73 P39
39 SMLIDATA_PCH AUD_LINK_SDO AUD_LINK_SDO_R HDA_SDI3 PCIECLKRQ1#/GPIO18 IO_SMI_N LPC_PME_N
AUD_LINK_SYNC R161 1 2 33R2J-2-GP AUD_LINK_SYNC_R AU22 P37 LANCLK_REQ_N R402 1 2 10KR2J-3-GP R341 1 (R) 2 10KR2J-3-GP
R164 1 2 33R2J-2-GP AV24 HDA_SDO PCIECLKRQ2#/GPIO20/SMI# AA39
HDA_SYNC PCIECLKRQ3#/GPIO25 ME_CNTL TMIN_SHIFT
W35 R219 1 2 10KR2J-3-GP
SPI_MOSI SPI_MOSI_R PCIECLKRQ4#/GPIO26 INTRUDER_DET
R202 1 2 0R0402-PAD-2-GP P40 AA36
SPI_MISO SPI_MISO_R SPI_MOSI_IO0 PCIECLKRQ5#/GPIO44 SERIAL_DETECT SMLICLK_PCH
SPI_CS0_N R280 1 2 0R0402-PAD-2-GP SPI_CS0_N_R R36 W32 BOARD_ID_1 R384 1 2 2K2R2J-2-GP
R241 1 2 0R0402-PAD-2-GP R38 SPI_MISO_IO1 PCIECLKRQ6#/GPIO45 AA40
JTAG SPI_CLK
SPI_CS1_N
R182 1 2 0R0402-PAD-2-GP
SPI_CLK_R
SPI_CS1_N_R
U39 SPI_CS0#
SPI_CLK
PCIECLKRQ7#/GPIO46
USB_PWR_CRL1
SMLIDATA_PCH
R396 1 2 2K2R2J-2-GP
R276 1 2 0R0402-PAD-2-GP R35 AC36
14 PCH_JTAG_RST_R SPI_CS1# GPIO57 PCH_SYSPWROK WIFI_RF_EN R186
Eric change short PAD R40 W31 1 2 2K2R2J-2-GP
14 PCH_JTAG_TCK SPI_IO2 SPI_CS2# SYS_PWROK PCH_RI
14 PCH_JTAG_TDI 2013/5/7 SPI_IO3 U40 AE36 WAKE_N SMLINK0_CLK
U37 SPI_IO2 RI# AK34 R183 1 2 499R2F-2-GP
14 PCH_JTAG_TDO SPI_IO3 WAKE# SLP_A#
AN37 SLP_LAN_N SMLINK0_DATA
14 PCH_JTAG_TMS SLP_A# AU36 1 TP83 TPAD28 R217 1 2 499R2F-2-GP
SLP_LAN#
AC35 SLP_S3_N USB_PWR_CRL1
SLP_S0# AK40 R224 1 2 10KR2J-3-GP
PWR MANAGER PCH_RTCX1
SLP_S3#
SLP_S4#
AT35
SLP_S4_N
SLP_S5_N LANCLK_REQ_N
AN40 AA35 R226 1 2 10KR2J-3-GP
V_3P3_A
PCH_RTCX2 RTCX1 SLP_S5#/GPIO63 SUS_STAT_N
AN39 AD37 1 TP84 TPAD28 V_3P3_A
10,14 FP_RST_PCH_N PCH_RTCRST_PULLUP RTCX2 SUS_STAT#/GPIO61
AR38 W36 SUSCLK R227 1 (R) 2 10KR2J-3-GP
10,14 H_PWRGD PCH_SRTCRSTB_PULLUP RTCRST# SUSCLK/GPIO62 PCH_GP72_PU
AR39 AJ40
10 H_DRAMPWRGD PCH_INTRUDER_N SRTCRST# GPIO72 SUS_PWR_ACK 1_WATT_CTRL_1
(R) DB1 PWRGD_3V AR41 AJ37 SUS_WARNB R52 1 2 1KR2J-1-GP
1 AT40 INTRUDER# SUSACK# AG41
14,39,51 VR_READY RSMRST_SIO_N PCH_PWROK SUSWARN#/PWRDNACK/GPIO30 H_DRAMPWRGD MTST_ID WAKE_N
AM40 AE38 R364 1 2 10KR2J-3-GP R215 1 2 1KR2J-1-GP
PCH_INTVRMEN RSMRST# DRAMPWRGD LANWAKE_N
14,39,45 PWRBTN_N 2 AV36 AU34
PCH_SIO_DPWROK INTVRMEN GPIO27 PW_CLEAR SLP_WLAN_N
AV38 AM36 SLP_SUSB R332 1 (R) 2 10KR2J-3-GP R184 1 2 10KR2J-3-GP
38,39 RSMRST_SIO_N CLX-CON2-S3-GP DPWROK ACPRESENT/GPIO31
DSWVRMEN AM41 AK38
DSWODVREN SLP_SUS# PWRBTN_N PCH_GP72_PU
AK41 R181 1 2 1KR2J-1-GP
13,21,39 PWRGD_3V PWRBTN#
14,39,48,49 SLP_S4_N LPC_PME_N FP_RST_PCH_N LANWAKE_N R177
AG31 N36 1 2 10KR2J-3-GP
SMB_CLK_RESUME SMBALERT#/GPIO11 SYS_RESET#
14,39,46,48,50,51 SLP_S3_N SMB_DATA_RESUME AG36 R32 SPKR
AG32 SMBCLK SPKR
39 SLP_S5_N WIFI_RF_EN SMBDATA H_PWRGD
SMLINK0_CLK AG35 D40
AE32 SMI0ALERT#/GPIO60 PROCPWRGD
SMLINK0_DATA SML0CLK
39 SUS_WARNB_R TMIN_SHIFT AE35
AJ39 SML0DATA
SMLICLK_PCH SMI1ALERT#/PCHHOT#/GPIO74
AK36
39 SUS_PWR_ACK SMLIDATA_PCH SML1CLK/GPIO58/MGPIO11
AK33
SML1DATA/GPIO75/MGPIO12
39 SLP_SUSB PCH_JTAG_RST_R
W37
TP13 PCH_JTAG_TCK
Y40
14 SLP_A# JTAG_TCK PCH_JTAG_TDI
W39 PCH_JTAG_TDO
2013/6/26 Eric
JTAG_TDI Y38 change to 0 ohm short pad
JTAG_TDO PCH_JTAG_TMS
W40
JTAG_TMS
SUS_WARNB SUS_WARNB_R
LYNX-POINT-2-GP-U R371 1 2
0R0402-PAD-2-GP
C C
(71.82H81.A0U) SUS_PWR_ACK
R374 1 2
0R2J-2-GP (R)
GPIO/MISC
1
(R)
R368
10 H_SKTOCC_N
1KR2J-1-GP
43 WIFI_RF_EN
2
39 TMIN_SHIFT
21 BOARD_ID_0
23,36 SPKR
23 TLS_EN
23,39 SUSCLK
23 IGC_EN_N
23 DSWVRMEN
23 PCH_INTVRMEN
26,35,42,43 WAKE_N
Jack delete R600
39 SIO_SPKR 1 GND on 2012/12/10
CLEAN CMOS Fast Boot PASSWORD CLEAR ME ENABLE/DISABLE

NOTE:if use fast boot, stuff R522, R600
39 LPC_PME_N 2 RTC_RST un-stuff R500
1 NC
39 PCH_SIO_DPWROK 3 NC
CMCLR1
2 AUD_LINK_SDO_R1
26 GPIO_PCIE_RESET
R214 1 2 20KR2F-L-GP
PCH_RTCRST_PULLUP
2 1-2 CLR PASSWORD
V_3P0_BAT_VREG PCH_RTCRST_DOWN
1 Jack change X01 3 SB3V
39 PECI_REQ_N
Debug Only 2-3 NORMAL(DEFAULT) 2013/3/13
JOWLE-CON2-5-GP 0R2J-2-GP
46 LANPWR_EN
1
1
46 1_WATT_CTRL_1 R212 (21.62874.102) ME_CNTL_2
C264 0R2J-2-GP R273 R145 1 2
39 IO_SMI_N SC1U10V2KX-1GP SB3V
(R) 4K7R2J-2-GP V_3P3_A
35 LANCLK_REQ_N SPKR_D23
2
R625 1 (R) 2 0R3J-0-U-GP VCC

2
2
Jack Modify 1KR2J-1-GP
41 SERIAL_DETECT
E
1
D23 2013/03/29(X01)
43 MINI_CLKREQ#_WLAN PCH_SRTCRSTB_PULLUP Prevent Buzzer voltage 14V peak-peak ME_CNTL ME_CNTL_1
V_3P0_BAT_VREG R213 1 2 20KR2F-L-GP BAT54A-11-GP R626 1 (R) 2 0R3J-0-U-GP SB5V Check pin 7 (FIT setting) R207 R148 1 2 B Q17 (84.T3906.E11)
(R) 10KR2J-3-GP PWCLR1 MMBT3906-4-GP
48 USB_PWR_CRL1
1
0R2J-2-GP
C
1
R209 1 R141 MECLR1

45 MTST_ID AUD_LINK_SDO_R AUD_LINK_SDO_C AUD_LINK_SDO_R1
2
C258 4K7R2J-2-GP
PW_CLEAR 1 2 R196 1 2 2
SC1U10V2KX-1GP (R) 2 1
SB3V
2
3 1KR2J-1-GP
2
VCC SB5V Jack change X01 for ME step issue JOWLE-CON2-5-GP

2013/5/15 (21.62874.102)
BUZZER
2013/6/26 Eric (R) PIN-CON3-S-GP
2
B DEL BUZZER (R) (R) C313 B
R315 R314 SC1U16V3KX-2GP
0R3J-0-U-GP 0R3J-0-U-GP
1
INTRUDER
BZ_5V BZ1
2
1
BOARD ID
+
Battery Socket (R)
VCCRTC
PCH_RTCX1 R301 VCC3 SB3V
ST: 22.70017.051 BZ_ON BZ_ON1 BUZZER
X3 FLAT: 22.70017.061 1 2 2 V_3P0_BAT_VREG
-
PCH_RTCX2
C
1 4 (R) PCH_SPKR_B (R) 75R3J-L-GP BUZZER-17-GP-U
TP6 TP7 Battery (CR2032):
1
SPKR R290 1 2 B Q19 (R) (R23.60025.051) PCH_INTRUDER_N Board ID X00 X00(SIO) X01 X01(SIO revC (R) (R)
23.22063.001 R210 1 2 1MR2J-1-GP
VBAT1 TPAD28 TPAD28 10KR2J-3-GP R313 R279 R220
MMBT3904-4-GP
1
BAT1 1 2 BOARD_ID_0 1 1 0 0 10KR2J-3-GP 10KR2J-3-GP
E
2 3 BATTERY CR2032 R289
R528 V_3P3_A (23.22063.001) 1KR2J-1-GP (R) 75R3J-L-GP BOARD_ID_1 1 0 1 0
2
VBAT1_R
1
2
1 2 (R) (R) C312 R211
XTAL-32D768KHZ-65-GP BOARD_ID_0 BOARD_ID_1
R291 SC1U16V3KX-2GP 10KR2J-3-GP
2
2
R208 1 2 1KR2J-1-GP 0R2J-2-GP

1
2
(83.R5003.H8H) D12
+
INTR1
PCH_INTRUDER_L
1
1
BT1 CH551H-30PT-GP BAS40C-2-GP 1
10MR3J-L1-GP
2
BAT-T15-0013-BA10-0-GP D13 NP1 R277 R221
1
2 10KR2J-3-GP 10KR2J-3-GP
INTRUDER_DET
C
2
C254 C255 V_3P0_BAT_VREG (R) (R) 3

SIO_SPKR PCH_SPKR1
2
SC15P50V3JN-GP SC15P50V3JN-GP R505 1 2 10KR2J-3-GP B Q21

2
2
MMBT3904-4-GP FOX-CON3-S15-GP
(21.61880.103)
E
VBAT2
Defensive Design
SPI ROM
VCC3
om
1
DEFENSIVE DESIGN
R521
10KR2J-3-GP V_3P3_EPW
SOP8 for 8MB V_3P3_EPW V_3P3_EPW
(R)
72.25644.001 - MXIC SOP8
72.25Q64.001 - Winbond SOP8 SOP8 for 2MB
2
VR_READY PCH_SYSPWROK
1
R526 1 2 0R0402-PAD-2-GP R250 (R)
72.25644.001 - MXIC SOP8
1
1KR2J-1-GP C303 C301

Jack change to 0 short pad SC1U10V2KX-1GP R264 72.25Q64.001 - Winbond SOP8 SC1U10V2KX-1GP
1
2
2013/05/20 C413 U14 (72.25Q64.G01) 1KR2J-1-GP
.c
2
SCD1U16V2KX-3GP U15 (R)

SPI_CS0_N
1 8
SPI_MISO SPI_MISO_ROM_1 CS# VCC SST_HOLDJ_1 SPI_IO3 SPI_CS1_N
2
SPI_IO2 R266 1 2 33R2J-2-GP SPI_WP_N_1 2 7 SPI_CLK_1 R267 1 2 33R2J-2-GP SPI_CLK SPI_MISO SPI_MISO_ROM_2 1 8 SST_HOLDJ_2 SPI_IO3
A EV FOR FUTURE ENGINEERING R268 1 2 33R2J-2-GP 3 SO/SIO1 SIO3 6 R269 1 2 33R2J-2-GP R281 1 (R) 2 33R2J-2-GP 2 CS# VCC 7 R285 1 (R) 2 33R2J-2-GP A
DEBUG ONLY SIO2 SCLK SPI_MOSI_1 SPI_MOSI SPI_IO2 SPI_WP_N_2 SO/SIO1 HOLD# SPI_CLK_2 SPI_CLK
4 5 R272 1 2 33R2J-2-GP R271 1 (R) 2 33R2J-2-GP 3 6 R284 1 (R) 2 33R2J-2-GP
GND SI/SIO0 WP# SCLK SPI_MOSI_2 SPI_MOSI
4 5 R282 1 (R) 2 33R2J-2-GP
WP# function is not supported when GND SI/SIO0
SPI ROM is used on descriptor mode. MX25L6473EM21-10G-GP
MX25L1606EM2I-12G-GP
(X)
U14CN1
1 8 (X)
2 7 U15CN1
ia
SOP_ENABLE_GP33
R193 1 (R) 2 1KR2J-1-GP 3 6 1 8
VCC3
4 5 2 7
<Variant Name>
1
3 6
R185 SKT-91960-0084L-GP 4 5
0R0402-PAD-2-GP 62.10076.011
RESERVE R185 FOR CRB SKT-91960-0084L-GP 21F, 88, Hsin T ai Wu Rd
STUFF R185 FOR HSW(DEFAULT) 2013/6/26 Eric 62.10089.001
Hsichih, T aipei
2
change to 0 ohm short pad

62.10076.011 Title
SPI socket mount in SA stage 62.10089.001
Ly nxpoint_AUDIO/GPIO/SPI
SPI socket mount in SA stage D ROSA TIGRIS SFF
5 4 3
es 2
Date: Thursday, April 03, 2014
1
Sheet 19 of 52
1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
CPU CLOCK
14 CK_100M _CPU_XDP_DN
14 CK_100M _CPU_XDP_DP
PCI CLOCK
14 CK_P_33M _LPCP80
22 CK_PCH_33M _FB
39 CK_P_33M _SIO
31 CK_P_33M _T PM
D D
PCIE CLOCK
10 CK_DPNS_R_DN
10 CK_DPNS_R_DP
10 CK_PE_100M _M CP_DN
10 CK_PE_100M _M CP_DP
11 CK_DP_DN
11 CK_DP_DP
26 CK_PE_100M _16PORT _DP

26 CK_PE_100M _16PORT _DN
35 CK_GLAN_DN
35 CK_GLAN_DP
Eric change
42 CK_PCIE_1PCIEX1_DN 2013/5/6
U32G 7 OF 11
42 CK_PCIE_1PCIEX1_DP
RN12 SRN10KJ-5-GP
G16 CK_CSI_PCH_IN_DN 1 4
CLKIN_GND0# F16 CK_CSI_PCH_IN_DP 2 3
43 CK_PCIEX1_WLAN_DN CLKIN_GND0_P
43 CK_PCIEX1_WLAN_DP R2 CK_PE_100M _M CP_DN
CK_P_33M _LPCP80 CK_33M _PCI0 CLKOUT_DMI# CK_PE_100M _M CP_DP
To LPC P80 Debug R159 1 2 22R2J-2-GP AV5 T2 CLK OUT TO CPU for DMI
CLKOUT_33MHZ0 CLKOUT_DMI_P
CK_P_33M _T PM CK_33M _T PM CK_DP_DN
To TPM R154 1 2 22R2J-2-GP AV7 T3
CLKOUT_33MHZ1 CLKOUT_DP# T5 CK_DP_DP
CK_PCH_33M _FB CK_33M _PCI2 CLKOUT_DP_P CLK OUT TO CPU
LOOPBACK CLK R140 1 2 22R2J-2-GP AU2
CK_DPNS_R_DN
CLKOUT_33MHZ2 W2
GPIO To SIO
CK_P_33M _SIO
R156 1 2 22R2J-2-GP CK_33M _PCI3 AN9 CLKOUT_DPNS# U2 CK_DPNS_R_DP
CLK OUT TO CPU
CLKOUT_33MHZ3 CLKOUT_DPNS_P
AU5 U6 CK_100M _CPU_XDP_DN
(R)
36 PCH_AUD_M UT E CLKOUT_33MHZ4 CLKOUT_ITPXDP# CK_100M _CPU_XDP_DP
VCC3 R174 1 2 10KR2J-3-GP U7 CLK OUT TO XDP
CLKOUT_ITPXDP_P
43 BT _RADIO_CL R39 1 2 10KR2J-3-GP
C AA3 CK_PE_100M _16PORT _DN C
(R)
39 CK_14M _SIO PCH_AUD_M UT E AV8 CLKOUT_PEG_A# AA2 CK_PE_100M _16PORT _DP
CK_14M _SIO CK_14M _FLEX1 CLKOUTFLEX0/GPIO64 CLKOUT_PEG_A_P CLK OUT TO X16 Graphic
R155 1 2 22R2J-2-GP AT9
31 CK_14M _T PM BT _RADIO_CL AV9 CLKOUTFLEX1/GPIO65 AE6
CK_14M _T PM CK_14M _FLEX3 CLKOUTFLEX2/GPIO66 CLKOUT_PEG_B#
R153 1 2 22R2J-2-GP AU8 AE7
CLKOUTFLEX3/GPIO67 CLKOUT_PEG_B_P
To SIO
AE10
R137 1 2 7K5R2F-1DL-GP XCLK_RCOM P R11 CLKOUT_PCIE_N0 AE11
V_1P5_PCH DIFFCLK_BIASREF CLKOUT_PCIE_P0
CK_14M _PCH
R151 2 1 10KR2J-3-GP AR7 AC6
REFCLK14IN CLKOUT_PCIE_N1 AC7
CLKOUT_PCIE_P1
AC11
CLKOUT_PCIE_N2 AC10
CLKOUT_PCIE_P2
W11 CK_GLAN_DN
CLKOUT_PCIE_N3 W10 CK_GLAN_DP
CLKOUT_PCIE_P3 CLK OUT TO PCIEX1 for LAN
Y4
CLKOUT_PCIE_N4 Y2
CLKOUT_PCIE_P4
W7 CK_PCIE_1PCIEX1_DN
CLKOUT_PCIE_N5 W6 CK_PCIE_1PCIEX1_DP
CLKOUT_PCIE_P5
CLK OUT TO PCIEX1
When support FCIM need to stuff.
AA7
CLKOUT_PCIE_N6 AA6
XT AL_25M _PCH_IN N7 CLKOUT_PCIE_P6
XTAL25_IN R6 CK_PCIEX1_WLAN_DN
XT AL_25M _PCH_OUT N6 CLKOUT_PCIE_N7 CK_PCIEX1_WLAN_DP
R124 1 2 1M R3F-GP R7 CLK OUT TO Mini PCIE
XTAL25_OUT CLKOUT_PCIE_P7
X2
1 2
LYNX-POINT -2-GP-U
XT AL-25M HZ-115-GP (71.82H81.A0U)
(82.30020.691)
SMD +- 30ppm CL:12P WHEN USING 25MHZ EXTERNAL
B REFERENCE FROM SINAI CMV: B
1
C198 C188
SC10P50V2JN-4GP SC10P50V2JN-4GP
XTAL_IN should be pulled to
2
GND via a 0-Ω resistor by

default.
Intel reliability concerns
Jack change to 10pF for vendor advise
om
2013/05/31
WHEN USING 25MHZ EXTERNAL REFERENCE FROM
SINAI CMV:REMOVE R313, X2, C344
REPLACE C343 WITH 50OHM RES 0402 PACKAGE
.c
ia
es
A A
on
<Variant Nam e>
nd
Hs ichih, Taipei
T itle
Lynxpoint_CLK
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
SATAS Port (H81)
DP PORT B SATA 3.0 PORT SATA 2.0 Port
28 DDPB_CT RL_CLK
28 DDPB_CT RL_DAT A
PORT0 Support Support
28 DDPB_AUX_DN
28 DDPB_AUX_DP PORT1 Support Support
28 DDSP_B_HPD PORT2 Disabled
PORT3 Disabled
PORT4 Support VCC3
PORT5 Support Pull-up on MB
D D
PCH_CONFIG_JUM PER
U32C 3 OF 11 R254 1 2 10KR2J-3-GP
U36 B28 SAT AHDR_RX_DN0

U35 CL_CLK SATA_RXN0 A28 SAT AHDR_RX_DP0
U34 CL_DATA SATA_RXP0 F31 SAT AHDR_T X_DN0
CL_RST# SATA_TXN0 H31 SAT AHDR_T X_DP0
PWRGD_3V AA32 SATA_TXP0 D30 PCH_GP38_PU
R260 1 2 10KR2J-3-GP
APWROK SATA_RXN1
CLINK
C30
SATA_RXP1 B34 SER_IRQ
R468 1 2 10KR2J-3-GP
SATA_TXN1 C34
SATA_TXP1 A20GAT E R491 1 2 10KR2J-3-GP
VGA AL31 SATA_RXN2
A31
B31 KBRST _N
R490 1 2 10KR2J-3-GP
AM31 PWM0 SATA_RXP2 B35
27 VGA_HSYNC_3V_L AP31 PWM1 SATA_TXN2 D35 PCH_SAT A_LED_N
27 VGA_VSYNC_3V_L R270 1 2 10KR2J-3-GP
AV30 PWM2 SATA_TXP2 B32
FAN
27 VGA_RED PWM3 SATA_RXN3 C32 PCIEX16_PRSNT 2_N
R204 1 2 10KR2J-3-GP
27 VGA_GREEN SATA_RXP3 G33
27 VGA_BLUE CHASSIS_ID_1 AP28 SATA_TXN3 F33 FP_AUD_DET ECT
R240 1 2 10KR2J-3-GP
27 VGA_PCH_DDCSDA CHASSIS_ID_0 AT31 TACH0/GPIO17 SATA_TXP3
27 VGA_PCH_DDCSCL T ACH2 AM28 TACH1/GPIO1 A26
22,27 VGA_DET AV34 TACH2/GPIO6 SATA_RXN4/PERN1 B26
T ACH3
PCIEX16_PRSNT 2_N AT30 TACH3/GPIO7 SATA_RXP4/PERP1 L28 FP_DET ECT
R251 1 2 10KR2J-3-GP
FB_USBF2_DET AV35 TACH4/GPIO68 SATA_TXN4/PETN1 K28
TACH5/GP69 SATA_TXP4/PETP1 C27 SAT AHDR_RX_DN5
SATA SATA_RXN5/PERN2
SATA_RXP5/PERP2
B27 SAT AHDR_RX_DP5
SAT AHDR_T X_DN5
Eric change
2013/5/6 PCIEX1_PRSNT 2_N
G28 R275 1 2 10KR2J-3-GP
SST _CT L_R SATA_TXN5/PETN2 SAT AHDR_T X_DP5
25 SAT AHDR_RX_DN0 R168 1 (R) 2 0R2J-2-GP AJ31 F28 RN13
SSTCTL SATA_TXP5/PETP2 H35 CK_SAT A_PCH_DN 1 4 SRN10KJ-5-GP R274 1 (R) 2 10KR2J-3-GP
25 SAT AHDR_RX_DP0 PCH_CONFIG_JUM PER L38 CLKIN_SATA# H36 CK_SAT A_PCH_DP 2 3
25 SAT AHDR_T X_DN0 PCH_GP38_PU H41 SCLOCK/GPIO22 CLKIN_SATA_P
25 SAT AHDR_T X_DP0 FP_AUD_DET ECT R31 SLOAD/GPIO38 J39 PCH_SAT A_LED_N VCC3 VCC3
45 PCH_SAT A_LED_N DDSP_B_HPD DISPLY_DET ECT SDATAOUT0/GPIO39 SATALED# SAT ARBIAS_PCH
R120 1 2 0R0402-PAD-2-GP L40 D33 R165 1 2 7K5R2F-1DL-GP
V_1P5_PCH
SDATAOUT1/GPIO48 SATA_RCOMP
25 SAT AHDR_RX_DN5
TIE TRACES TOGETHER CLOSE TO PINS,
25 SAT AHDR_RX_DP5 Jack changed 0 Ohm short pad M37 BOARD_ID_0 WITH LENGTH NO LONGER THAN 450 MILS TO RESISTOR
C 25 SAT AHDR_T X_DN5 2013/05/20 SATA0GP/GPIO21 J40 C
SAT A1GP
25 SAT AHDR_T X_DP5 SATA1GP/GPIO19 H40 SAT A2GP
GPIO
SATA2GP/GPIO36
2
N41 SAT A3GP
SATA3GP/GPIO37 M39 FP_DET ECT
PCIEX1_PRSNT 2_N R259 R542
SATA4GP/GPIO16 N40 10KR2J-3-GP 10KR2J-3-GP
SATA5GP/GPIO49
mSATA (R)
1
AP2 CHASSIS_ID_0 CHASSIS_ID_1
EDP_BKLTCTL AT2
EDP_BKLTEN AP1
EDP_VDDEN
2
R465 R466
10KR2J-3-GP 10KR2J-3-GP
N30 A20GAT E (R)
RSVD#N30 K36 KBRST _N
HOST
RCIN# SER_IRQ
1
G39
OTHERS SERIRQ
THRMTRIP#
C40 H_T HERM T RIP_N
G40
10 H_PM _SYNC_0 PECI F40 H_PM _SYNC_0
10 H_T HERM T RIP_N PM_SYNCH F41 PLT RST _CPU_N
PLTRST_PROC# Jack modify for front cable no short to GND
2013/05/15
30 FB_USBF2_DET
13,19,39 PWRGD_3V VCC3
LYNX-POINT -2-GP-U
37 FP_AUD_DET ECT
(71.82H81.A0U)
39 A20GAT E
39 KBRST _N
31,39 SER_IRQ T ACH2 R205 1 2 10KR2J-3-GP
10,14 PLT RST _CPU_N T ACH3 R176 1 2 10KR2J-3-GP
FB_USBF2_DET
R194 1 2 10KR2J-3-GP
DISPLY_DET ECT
(R) R262 1 2 10KR2J-3-GP
B B
ID 45 CHASSIS_ID_0 Jack Reserved void 3.3V will divider
2013/03/14
45 CHASSIS_ID_1
om
U32E 5 OF 11
19 BOARD_ID_0
DDSP_B_HPD AJ2 AH3 VGA_HSYNC_3V R126 1 2 33R2J-2-GP VGA_HSYNC_3V_L
AH5 DDPB_HPD VGA_HSYNC AH2 VGA_VSYNC_3V VGA_VSYNC_3V_L
R125 1 2 33R2J-2-GP
AJ4 DDPC_HPD VGA_VSYNC VCC3
Straps DDPB_AUX_DN
DDPD_HPD AC2 VGA_RED
VGA_GREEN
AK6 VGA_RED AE2
23 SAT A1GP DDPB_AUX_DP AK8 DDPB_AUXN VGA_GREEN AC3 VGA_BLUE
.c
AG7 DDPB_AUXP VGA_BLUE
23 SAT A2GP AG6 DDPC_AUXN AG4 Jack Delete HDMI I2C signal
DDPC_AUXP VGA_IRTN VGA_PCH_DDCSDA
1
AG11 AL3 20121225
23 SAT A3GP AG10 DDPD_AUXN VGA_DDC_DATA AL2 VGA_PCH_DDCSCL
R130 R128 R129
DDPD_AUXP VGA_DDC_CLK AF5 VGA_DACREFSET
R138 1 2 649R2F-GP 150R2F-1-GP 150R2F-1-GP 150R2F-1-GP
DAC_IREF DDPB_CT RL_CLK
R32 1 2 2K2R2J-2-GP
AN3 CLOSE TO PCH :
DDPC_CTRLCLK DDPB_CT RL_DAT A
2
AM2 R18 1 2 2K2R2J-2-GP
ia
DDPC_CTRLDATA DDPB_CT RL_CLK <500 MIL TO PIN BALLS
AM1
DDPB_CTRLCLK AJ5 DDPB_CT RL_DAT A
DDPB_CTRLDATA AN4
DDPD_CTRLCLK CLOSE TO PCH :<250 MIL TO PIN BALLS
AN2
DDPD_CTRLDATA
LYNX-POINT -2-GP-U
(71.82H81.A0U)
es
A A
on
<Variant Nam e>
nd
Hs ichih, Taipei
T itle
Lynxpoint_SATA/FAN/DP/VGA
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
DMI USB3.0 Port Mapping (H81)

11 DM I_M T _IR_DN[0..3]
11 DM I_M T _IR_DP[0..3] USB 2.0 SuperSpeed
11 DM I_IT _M R_DN[0..3] Signals Signals
11 DM I_IT _M R_DP[0..3]
USB3Tp0
USB Port USBP0P USB3Tn0
0 Enable USBP0N USB3Rn0
PCIE USB3Rp0
35 HSI_DN4
35 HSI_DP4 USB3Tp1
35 HSO_C_DN4 USB Port USBP1P USB3Tn1
35 HSO_C_DP4 1 Enable USBP1N USB3Rn1
D D
U32B 2 OF 11 USB3Rp1
42 HSI_DN3 DM I_M T _IR_DN0 USB_PCH_DN0
L24 AV10
42 HSI_DP3 DM I_M T _IR_DP0 K24 DMI_RXN0 USB2N0 AU10 USB_PCH_DP0
42 HSO_C_DN3 DM I_IT _M R_DN0 DMI_RXP0 USB2P0 USB_PCH_DN1 FOR Rear USB 3.0 USB Port
C20 AV11
42 HSO_C_DP3 DM I_IT _M R_DP0 B20 DMI_TXN0 USB2N1 AW11 USB_PCH_DP1 2 Disable
DM I_M T _IR_DN1 DMI_TXP0 USB2P1 USB_PCH_DN2 FOR Rear USB 3.0
G24 AN14
DM I_M T _IR_DP1 H24 DMI_RXN1 USB2N2 AP14 USB_PCH_DP2
DM I_IT _M R_DN1 DMI_RXP1 USB2P2 USB_PCH_DN3 FOR Rear USB 2.0+LAN
D21 AJ16
43 HSI_DN2 DM I_IT _M R_DP1 DMI_TXN1 USB2N3 USB_PCH_DP3
B21 AK16 USB Port
DMI
43 HSI_DP2 DM I_M T _IR_DN2 DMI_TXP1 USB2P3 USB_PCH_DN4 FOR Rear USB 2 .0+LAN
F26 AU15
43 HSO_C_DN2 DM I_M T _IR_DP2 G26 DMI_RXN2 USB2N4 AV15 USB_PCH_DP4 3 Disable
43 HSO_C_DP2 DM I_IT _M R_DN2 DMI_RXP2 USB2P4 USB_PCH_DN5 FOR Front USB 2.0
B22 AU12
DM I_IT _M R_DP2 C22 DMI_TXN2 USB2N5 AT12 USB_PCH_DP5
DM I_M T _IR_DN3 DMI_TXP2 USB2P5 FOR Front USB 2.0
K26 AV14
DM I_M T _IR_DP3 L26 DMI_RXN3 USB2N6 AW14
DM I_IT _M R_DN3 A24 DMI_RXP3 USB2P6 AU17
USB 2.0 ports 6,7 USB Port
DM I_IT _M R_DP3 B24 DMI_TXN3 USB2N7 AT17 are disabled on H81 4 Disable
DMI_TXP3 USB2P7 AW16 USB_PCH_DN8
USB2N8 USB_PCH_DP8
R157 1 2 7K5R2F-1DL-GP DM IRCOM P B19 AV16 FOR Rear USB 2.0
DMI_RCOMP USB2P8 USB_PCH_DN9
V_1P5_PCH R152 1 2 7K5R2F-1DL-GP DM ICOM P C13 AN16
PCIE_RCOMP USB2N9 AP16 USB_PCH_DP9
RN14
100M _DM I_PCH_DN USB2P9 USB_PCH_DN10 FOR Rear USB 2.0 USB Port
SRN10KJ-5-GP 4 1 G22 AJ18
3 2 100M _DM I_PCH_DP F22 CLKIN_DMI# USB2N10 AK18 USB_PCH_DP10 5 Disable
Eric change CLKIN_DMI_P USB2P10 FOR Mini PCIE
USB
2013/5/6 AP18
L14 USB2N11 AN18
K14 PERN1/USB3RN2 USB2P11 AW18
PERP1/USB3RP2 USB2N12 OC[0..3] for Ports 0-7
USB2.0 Jack change on 12/04
close to CONN
B12
B11 PETN1/USB3TN2 USB2P12
AV18
AP20
USB 2.0 ports 12 ,13
are disabled on H81 OC[4..7] for Ports 8-13
HSI_DN2 F14 PETP1/USB3TP2 USB2N13 AN20
33 USB_PCH_DN0 HSI_DP2 G14 PERN2/USB3RN3 USB2P13
33 USB_PCH_DP0 HSO_C_DN2 HSO_DN2 PERP2/USB3RP3 USB_OC0_R_N USB_OC_01*
FOR Mini PCIEx1 C321 1 2 SCD1U16V2KX-3GP D11 AE40 R206 1 2 0R0402-PAD-2-GP FOR Rear USB 3.0
33 USB_PCH_DN1 HSO_C_DP2 HSO_DP2 PETN2/USB3TN3 GPIO59 USB_OC1_R_N USB_OC_23*
C323 1 2 SCD1U16V2KX-3GP C11 AF37 R201 1 2 0R0402-PAD-2-GP FOR LAN USB 2.0 + LAN
33 USB_PCH_DP1 HSI_DN3 F11 PETP2/USB3TP3 GPIO40 AD39 USB_OC2_R_N 1 2 USB_OC_45*
R394 0R0402-PAD-2-GP FOR Front USB 2.0
32 USB_PCH_DN2 HSI_DP3 H11 PERN3 GPIO41 AD40 USB_OC3_R_N 1 2
R222 10KR2J-3-GP
32 USB_PCH_DP2 HSO_C_DN3 HSO_DN3 PERP3 GPIO42 USB_OC4_R_N USB_OC_89*
FOR PCIEx1 C126 1 2 SCD1U16V2KX-3GP B9 AF39 R203 1 2 0R0402-PAD-2-GP FOR Rear USB 2.0
32 USB_PCH_DN3 HSO_C_DP3 HSO_DP3 PETN3 GPIO43 USB_OC5_R_N
PCI-E
C128 1 2 SCD1U16V2KX-3GP A9 AC41 R187 1 2 10KR2J-3-GP FOR Front USB 2.0
C 32 USB_PCH_DP3 HSI_DN4 J11 PETP3 GPIO9 AF40 PC_SPKR_DET _OC6 1 2 C
R195 10KR2J-3-GP
30 USB_PCH_DN4 HSI_DP4 L11 PERN4 GPIO10 AG40 FP_CBL_DET _OC7 1 2
Jack Swap Port3 and Port4 R216 10KR2J-3-GP SB3V
30 USB_PCH_DP4 HSO_C_DN4 B8 PERP4 GPIO14
30 USB_PCH_DN5 2012/03/27 for PCIE IRQ FOR LAN HSO_C_DP4 PETN4
C8 AV20
30 USB_PCH_DP5 G9 PETP4 USBRBIAS# AU20 USBRBIAS_PCH
R160 2 1 22D6R2F-L1-GP USBRBIAS_PHY (R465): TIE TRACES TOGETHER CLOSE TO PINS,
F9 PERN5 USBRBIAS
PERP5 CK_96M _DREF_DN WITH LENGTH NO LONGER THAN 1 INCHE TO RESISTOR
B7 AP11 R147 1 2 10KR2J-3-GP
A7 PETN5 CLKIN_DOT96# AM11 CK_96M _DREF_DP R149 1 2 10KR2J-3-GP
F7 PETP5 CLKIN_DOT96_P
34 USB_PCH_DN8 H7 PERN6
34 USB_PCH_DP8 PERP6 Eric change
E1 2013/5/13
34 USB_PCH_DN9 D2 PETN6
34 USB_PCH_DP9 K6 PETP6
43 USB_PCH_DN10 K8 PERN7
43 USB_PCH_DP10 G3 PERP7
G5 PETN7
J2 PETP7
J3 PERN8 FP_CBL_DET _OC7 R556 2 1 0R0402-PAD-2-GP FP_CBL_DET
H2 PERP8 PC_SPKR_DET _OC6 PC_SPKR_DET
R557 2 1 0R0402-PAD-2-GP
H1 PETN8
33 USB_OC_01* PETP8 2013/6/26 Eric
32 USB_OC_23* change to 0 ohm short pad
30 USB_OC_45*
34 USB_OC_89*
LYNX-POINT -2-GP-U
(71.82H81.A0U)
USB3.0
B B
SB3V
U32A 1 OF 11
U32F 6 OF 11
33 USB3_T X0_C_DN
33 USB3_T X0_C_DP P_PM E# V_1P5_PCH
R218 1 (R) 2 10KR2J-3-GP AA31
33 USB3_T X1_C_DN CK_PCH_33M _FB AM22 PME# AA37 PLT RST _N USB3_RX0_DN F20 N1 FDI_T X_DN0
om
Jack reserved
33 USB3_T X1_C_DP CLKIN_33MHZLOOPBACK PLTRST# 2013/05/17 USB3_RX0_DP G20 USB3RN0 FDI_RXN0 N2 FDI_T X_DP0
M40 PCH_GP35_NM I# USB3_T X0_C_DN B18 USB3RP0 FDI_RXP0 P2 FDI_T X_DN1
GPIO35_NMI# P_REQ_N1 PCIEX1_PRSNT 2_DET USB3_T X0_C_DP USB3TN0 FDI_RXN1 FDI_T X_DP1
1
A2 AH26 R554 2 (R) 1 0R2J-2-GP C18 P3
A3 TP16 GPIO50 AU31 P_GNT _N1 USB3TP0 FDI_RXP1
P_REQ_N2 Straping Pin PCIEX16_PRSNT 2_DETFOR REAR USB 3.0 USB3_RX1_DN FDI_CSYNC R139
B2 TP17 GPIO51 AJ26 R555 2 (R) 1 0R2J-2-GP G18 L2 7K5R2F-1DL-GP
B1 TP18 GPIO52 AV31 P_GNT _N2 USB3_RX1_DP H18 USB3RN1 FDI_CSYNC
Straping Pin
R136 2 1 8K2R2F-1-GP T D_IREF C3 TP19 GPIO53 AW33 P_REQ_N3 USB3_T X1_C_DN B15 USB3RP1 L3 FDI_INT
TD_IREF GPIO54 P_GNT _N3 USB3_T X1_C_DP USB3TN1 FDI_INT
2
R30 B16
.c
GPIO55
Straping Pin USB3TP1 FDI_RCOM P
USB3 K2
33 USB3_RX0_DN P_INT A_N AU29 K20 FDI_RCOMP
33 USB3_RX0_DP P_INT B_N AU27 PIRQA# L20 USB3RN4
33 USB3_RX1_DN P_INT C_N AW28 PIRQB# D15 USB3RP4
33 USB3_RX1_DP P_INT D_N AV27 PIRQC# C15 USB3TN4
W1_DET ECT _USB AR30 PIRQD# VCC3 USB3TP4 FDILINK
P_INT F_N AV29 GPIO2 Jack chang RN5,RN6,RN7 to 10K L18
VGA_DET GPIO3 2012/01/25 USB3RN5
FDI AV28 K18
ia
PCIE_WLAN_DET ECT AT27 GPIO4 B14 USB3RP5
11 FDI_T X_DN[0..1] GPIO5 P_REQ_N1 RN7 USB3TN5
Jack 12/25 1 8 A14
11 FDI_T X_DP[0..1] P_REQ_N2 2 7 USB3TP5
P_REQ_N3 3 6
11 FDI_INT W1_DET ECT _USB 4 5 PCH_GP70_PU AK28
11 FDI_CSYNC PCH_GP71_PU AT34 TACH6/GPIO70
SRN10KJ-6-GP TACH7/GPIO71
OTHERS VGA_DET
PCIE_WLAN_DET ECT
1
2
RN5
8
7
es LYNX-POINT -2-GP-U
(71.82H81.A0U)
P_INT D_N 3 6
23 P_GNT _N1 P_INT B_N 4 5
23 P_GNT _N2
A 23 P_GNT _N3 A
SRN10KJ-6-GP
RN6
on
43 W1_DET ECT _USB P_INT F_N 1 8
P_INT A_N 2 7
27 VGA_DET P_INT C_N 3 6
4 5
20 CK_PCH_33M _FB <Variant Nam e>
39 PLT RST _N Jack change 11/27
SRN10KJ-6-GP
43 PCIE_WLAN_DET ECT PCI Wistron Incorporated
39,45 FP_CBL_DET
nd
36,39 PC_SPKR_DET LYNX-POINT -2-GP-U PCH_GP35_NM I# R252 2 1 10KR2J-3-GP

42 PCIEX1_PRSNT 2_DET Hs ichih, Taipei
(71.82H81.A0U)
26 PCIEX16_PRSNT 2_DET PCH_GP70_PU R190 2 1 10KR2J-3-GP T itle
PCH_GP71_PU FOR LPT: GP70 STRAP - USB3 PORT4 Lynxpoint_FDI/PCIE/DMI/USB
R175 2 1 10KR2J-3-GP GP71 - USB3 PORT5
SOFT STRAP TO DETERMINE NATIVE FUNCTION Size Docum ent Num ber Rev
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
STRAP
14 HSW_STRAP_13
21 SATA1GP
21 SATA2GP
21 SATA3GP
19 TLS_EN
U32I 9 OF 11 U32K 11 OF 11
19,39 SUSCLK
D9 A12
19 DSWVRMEN VSS_121 VSS_1
E12 A16 D12 AN28
19
19
IGC_EN_N
PCH_INTVRMEN
E3
E31
VSS_122
VSS_123
VSS_2
VSS_3
A21
A35
D13
D14
VSS_100
VSS_101
VSS_62
VSS_63
AP4
AP9
BOOT SELECT STRAPS
19 AUD_LINK_SDO_R VSS_124 VSS_4 VSS_102 VSS_64
E35 AA10 D16 AR11
E38 VSS_125 VSS_5 AA11 D18 VSS_103 VSS_65 AR35
19,36 SPKR
E4 VSS_126 VSS_6 AA12 D19 VSS_104 VSS_66 AR37
GNT1/ SATA1GP
E5 VSS_127 VSS_7 AA14 D20 VSS_105 VSS_67 AT10 BOOT DEVICE GPIO51 /GPIO19
22 P_GNT_N1 VSS_128 VSS_8 VSS_106 VSS_68
E7 AA17 D22 AT11
22 P_GNT_N2 VSS_129 VSS_9 VSS_107 VSS_69
F18 AA22 D24 AT14
22 P_GNT_N3
F24
VSS_130 VSS_10
AA28 D25
VSS_108 VSS_70
AT15
LPC 0 0
F35 VSS_131 VSS_11 AA30 D26 VSS_109 VSS_71 AT16
F37 VSS_132 VSS_12 AA34 D27 VSS_110 VSS_72 AT18
D F38 VSS_133 VSS_13 AA5 D28 VSS_111 VSS_73 AT20
SPI 1 1 D
G2 VSS_134 VSS_14 AA8 D31 VSS_112 VSS_74 AT21
VSS_135 VSS_15 VSS_113 VSS_75
H14 AB14 D32 AT23 P_GNT_N1
H16 VSS_136 VSS_16 AB28 U4 VSS_114 VSS_76 AT24 R178 1 (R) 2 1KR2J-1-GP
H20 VSS_137 VSS_17 AB4 U8 VSS_182 VSS_77 AT28
H22 VSS_138 VSS_18 AC30 V26 VSS_183 VSS_78 AT29
H26 VSS_139 VSS_19 AC34 V28 VSS_184 VSS_79 AT33 R255 1 2 10KR2J-3-GP
VCC3 SATA1GP
H28 VSS_140 VSS_20 AC38 V38 VSS_185 VSS_80 AT36
H33 VSS_141 VSS_21 AC5 V40 VSS_186 VSS_81 AT38 R256 2 (R) 1 1KR2J-1-GP
H34 VSS_142 VSS_22 AC8 W12 VSS_187 VSS_82 AT7
H38 VSS_143 VSS_23 AD14 W20 VSS_188 VSS_83 AT8 SATA1GP/GPIO19
H4 VSS_144 VSS_24 AD26 W22 VSS_189 VSS_84 AU3
H6 AD28 W28 AU39 DESIGN NOTE:
H8 VSS_146 VSS_26 AE12 W3 VSS_191 VSS_86 AV12 WEAK INTERNAL PULLUPS ON GP51. DEFAULT SPI BOOT DEVICE.
H9 VSS_147 VSS_27 AE31 W5 VSS_192 VSS_87 AV17
J31 VSS_148 VSS_28 AE4 W8 VSS_193 VSS_88 AV33
J37 VSS_149 VSS_29 AE41 Y1 VSS_194 VSS_89 AW30
J5 AE8 Y41 AW7
K31 VSS_151 VSS_31 AF14 VSS_196 VSS_91 B25
K4 VSS_152 VSS_32 AF16 VSS_92 B3
VSS_153 VSS_33 VSS_93 P_GNT_N2
K9 AF17 B30 R179 1 (R) 2 1KR2J-1-GP
L37 VSS_154 VSS_34 AF28 VSS_94 B33
VSS_155 VSS_35 VSS_95
L41 AG2 B38
M16 VSS_156 VSS_36 AG30 VSS_96 C25 DESIGN NOTE:
M18 VSS_157 VSS_37 AG34 VSS_97 C37 FULL VOLTAGE MODE WHEN SAMPLED LOW DMI AC COUPLING
M20 VSS_158 VSS_38 AG38 VSS_98 C6
M22 VSS_159 VSS_39 AG8 VSS_99 D34
M24 VSS_160 VSS_40 AH14 VSS_115 D37
M26 VSS_161 VSS_41 AH16 VSS_116 D4
M28 VSS_162 VSS_42 AJ1 VSS_117 D6
VSS_163 VSS_43 VSS_118 P_GNT_N3
N31 AJ28 D7 R189 1 (R) 2 1KR2J-1-GP
N35 VSS_164 VSS_44 AK24 VSS_119 D8
VSS_165 VSS_45 VSS_120
N38 AK37
N4 VSS_166 VSS_46 AK9 LYNX-POINT-2-GP-U DESIGN NOTE:
N8 VSS_167 VSS_47 AL11 (71.82H81.A0U) A16 SWAP OVERRIDE OVERRIDE IF SAMPLED LOW
R1 VSS_168 VSS_48 AL37
R10 VSS_169 VSS_49 AL5
VSS_170 VSS_50
R34 AM14
R8 VSS_171 VSS_51 AM16
T17 VSS_172 VSS_52 AM18 R286 1 (R) 2 1KR2J-1-GP SPKR
VSS_173 VSS_53 VCC3
T22 AM20
T23 VSS_174 VSS_54 AM24
T25 VSS_175 VSS_55 AM26
T26 VSS_176 VSS_56 AM35
T28 VSS_177 VSS_57 AM38
U1 VSS_178 VSS_58 AM4
U31 VSS_179 VSS_59 AM6
VSS_180 VSS_60 (R)
U32 AM8
VSS_181 VSS_61 AUD_LINK_SDO_R
SB3V R142 1 2 1KR2J-1-GP
C LYNX-POINT-2-GP-U C
(71.82H81.A0U) DESIGN NOTE:
SPI OVERRIDE PROTECTION
SUSCLK R348 1 (R) 2 1K5R2J-3-GP
DESIGN NOTE:
OD PLL VR ENABLE
DISABLE WHEN SAMPLED LOW
U32J 10 OF 11
AT1 U11
VSS_NCTF_1 TP22 R258 (R)
AT41 U10 VCC3 1 2 1KR2J-1-GP SATA2GP
AU1 VSS_NCTF_2 TP23 AJ14 SATA2GP/GPIO36
AV1 VSS_NCTF_3 TP21 AK14 R257 1 (R) 2 10KR2J-3-GP
AV2 VSS_NCTF_4 TP20 K34
AV40 VSS_NCTF_5 TP14 K33
VSS_NCTF_6 TP15
AV41 AH24
AW2 VSS_NCTF_7 TP12 R288 1 2 1KR2J-1-GP SATA3GP
AW40 VSS_NCTF_8 L16 SATA3GP/GPIO37
B40 VSS_NCTF_9 TP10 K16 R287 2 (R) 1 10KR2J-3-GP
B41 VSS_NCTF_10 TP11 AM34
C41 VSS_NCTF_11 TP9
D1 VSS_NCTF_12
D41 VSS_NCTF_13
VSS_NCTF_14 R12 GPIO37 DESIGN NOTE:
TP3 N12 LOW:TLS CIPHER SUITE WITH NO CONFIDENTIALITY.
TP4 L22 HIGH:TLS CIPHER SUITE WITH CONFIDENTIALITY.
TP1 K22
TP2
R192 PCH_INTVRMEN
R4 V_3P0_BAT_VREG 1 2 390KR2J-GP
TP5 K5
TP6 P5
TP7 L5 1KR2J-1-GP 2 (R) 1 R191
TP8
AC31
VSS
V_3P0_BAT_VREG R245 1 2 390KR2J-GP DSWVRMEN
INTVRMEN pin requires a pull-up of 390k ohm

to enable Internal VccVRM mode
AF3 The signal does not have an internal resistor; an
B VSS AV21 external resistor is required. B
VSS
LYNX-POINT-2-GP-U
(71.82H81.A0U)
TLS_EN
R223 1 2 4K7R2J-2-GP
SB3V
Jack changed 2012/11/21 HASWELL Strap

SB3V
SB3V VCC3
1
1
R294
(R) 10KR2J-3-GP
om
R296 R304
2
QF1
QF2_2
2
(R) 1 6
IGC_EN_N PCH_GP8 QF2_1
R307 1 2 0R2J-2-GP R300 1 2 10KR2J-3-GP 2
5
HSW_STRAP_13
1
3 4
R308
1KR2J-1-GP MBT3904DW1T1G-2-GP
2013/7/23 (R) (75.03904.07C)
Eric modify
2
.c
A A
ia
<Variant Name>
Hsichih, T aipei
Title
Ly nxpoint_GND/STRAPS
D ROSA TIGRIS SFF
5 4 3
es 2
Date:
1
1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
VCC3
(R) C195 1 2 SC1U10V2KX-1GP
C193 1 2 SC1U10V2KX-1GP
PCH CORE POWER DECOUPLING

C202 1 2 SC1U10V2KX-1GP
V_1P05_PCH
C244 1 2 SC10U10V5KX-2GP VCC3

D D
(R)
(R) C210 1 2 SC10U10V5KX-2GP C199 1 2 SCD1U16V2KX-3GP
V_1P05-FILTER CAPS: PLACE NEAR
ENDS OF POWER CORRIDOR
(R) C230 1 2 SC1U10V2KX-1GP DEFENSIVE DESIGN FOR
VCCASEFLEX0_3P3 POWER
V_1P05_PCH
C207 1 2 SC1U10V2KX-1GP
VCC3
(R) C262 1 2 SC1U10V2KX-1GP
U32H 8 OF 11 (R) C315 1 2 SCD1U16V2KX-3GP
(R) C261 1 2 SC1U10V2KX-1GP
AA19 A19 (R) C404 1 2 SCD1U16V2KX-3GP
V_1P05_PCH VCC_1 DMI_IREF V_1P5_PCH
C214 1 2 SCD1U16V2KX-3GP AA20 N11
VCC_2 FDI_IREF
1
AB16 N10 (R)
AB17 VCC_3 CLK_IREF B13 C197 (R) C116 1 2 SC1U10V2KX-1GP
V_1P05_PCH AB19 VCC_4 PCIE_IREF A33 SCD1U16V2KX-3GP
VCC_5 SATA_IREF
2
AB20
AD16 VCC_6 B37 C268 1 2 SC1U10V2KX-1GP
VCC_7 VCCVRM_1 V_1P5_PCH
C211 1 2 SCD1U16V2KX-3GP V17 A38
V19 VCC_8 VCCVRM_2 K1
V20 B39
STITCH CAP FOR GEN2 B V22 A39
V23 VCC_11 VCCVRM_5 A40
ACKUP CLOCK ROUTE VCC_12 VCCVRM_6
V25 T14
VCC_13 VCCVRM V_1P5_PCH
W17 C2
VCC_14 VCCVRM V_1P5_PCH
1
W19 C1
W23 VCC_15 VCCVRM B4
W25 VCC_16 VCCVRM_7 A4 V_1P5_PCH
C216
SCD1U16V2KX-3GP PLACE C381 OF PCH EAST CORNER
VCC_17 VCCVRM_8
2
AF2
AC12 VCCADAC V_1P5_DAC_FB
VCCIO_16 AE1 V_3P3_BG
R123 2 1 0R0603-PAD-2-GP-U
VCC3
1 2 0R0805-PAD-2-GP-U V_1P05_XCK_DCB_FB_R AB1 VCC3_3_0 B6 V_CPU_VCCIO2PCH
R117
V_1P05_PCH VCC VCC3_3_5
1
U12 AW21 C204 C206
V_1P05_PCH VCCCLK_1 VCC3_3_4
V14 SCD1U16V2KX-3GP SC1U10V2KX-1GP
VCCCLK_2
1
1
C (R) W14 AM7 C
VCCCLK VCCCLK3_3_1 VCC3
2
C200 C191 AB2 AM9
V_1P05_PCH SC1U10V2KX-1GP SC10U10V5KX-2GP AA16 VCCCLK VCCCLK3_3_2 AP5 V_3P3_BG
VCCCLK VCCCLK3_3_3
2
1
W16 AP7
T16 VCCCLK VCCCLK3_3_4 AR4 C231 C233 C232
VCCCLK VCCCLK3_3_5
1
(R) C259 1 2 SC1U10V2KX-1GP V16 AT5 (R) SC1U10V2KX-1GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
VCCSSC VCCCLK3_3_6
2
AV4 C201 C221
P14 VCCCLK3_3_7 AW4 SCD1U16V2KX-3GP SCD1U16V2KX-3GP
VCCIO_1 VCCCLK3_3_8
2
C242 1 2 SC1U10V2KX-1GP P16 AW9
P17 VCCIO_2 VCCCLK3_3_9 AG12
P22 VCCIO_3 VCCCLK3_3_10 AK11
C260 1 2 SC1U10V2KX-1GP P23 VCCIO_4 VCCCLK3_3_11 AV3
P25 VCCIO_5 VCCCLK3_3_12 AW3 layout note: close to pin AE1 for VGA
P26 VCCIO_6 VCCCLK3_3_13
VCCIO_7
C257 1 2 SC1U10V2KX-1GP P28 U30
VCC3
V_1P5_PCH T19 VCCIO_8 VCC3_3_1 W30 V_3P3_EPW
T20 VCCIO_9 VCC3_3_2
(R) AF19 VCCIO_10 AF26
VCCIO_11 VCC3_3_3
C227 1 2 SCD1U16V2KX-3GP AF20
V_1P05_PCH AF22 VCCIO_12 AG1 C241 1 2 SC1U10V2KX-1GP
AF23 VCCIO_13 VCCSUS3_3
AP22 VCCIO_14 R41
VCCUSBPLL VCCPSPI V_3P3_EPW
C263 1 2 SC1U10V2KX-1GP M14 SB3V
VCCIO_15 AW26
VCCSUS3_3 SB3V
AA23
V_1P05_M E VCCASW_1
1
(R) C265 1 2 SC1U10V2KX-1GP AA25 AM33 C239 1 2 SC1U10V2KX-1GP
AA26 VCCASW_2 VCCPSUS3_3 AN33 C235 C222
AB22 VCCASW_3 VCCPSUS3_3 SCD1U16V2KX-3GP SCD1U16V2KX-3GP
VCCASW_4
2
(R) C266 1 2 SC1U10V2KX-1GP AB23 AH18 C236 1 2 SC1U10V2KX-1GP
AB25 VCCASW_5 VCCSUS3_3 AH20
AB26 VCCASW_6 VCCSUS3_3 AH22
AD17 VCCASW_7 VCCSUS3_3 AJ20
AD19 VCCASW_8 VCCSUS3_3 AK20
AD20 VCCASW_9 VCCSUS3_3 P20
AD22 VCCASW_10 VCCSUS3_3 AP35
AD23 VCCASW_11 VCCRTC
W26 VCCASW_12 AV39
VCCASW_13 VCCDSW3_3 V_3P3_A
AD25 AW38
B VCCASW VCCDSW3_3 B
1
AF25 AW39 C237 V_3P0_BAT _VREG
V_1P05_M E VCCASW VCCDSW3_3 AP33 SCD1U16V2KX-3GP
VCCRTC V_3P0_BAT _VREG
2
C39 C229 1 2 SCD1U16V2KX-3GP
V_PROC_IO V_CPU_VCCIO2PCH
(R) C256 1 2 SC10U10V5KX-2GP
AU40 V_1P05_DSW_INT _R 1 2 5D11R3F-1-GP V_1P05_DSW_INT _C
R199 C243 1 2 SC1U10V2KX-1GP
DCPSUSBYP AU41
om
C387 1 2 SC1U10V2KX-1GP DCPSUSBYP
AJ22 T P_V_1P05_USBSUS_INT 1
DCPSUS T P81 T PAD28
AW35 V_1P5_RT C_INT
DCPRTC
AH28 V_1P5_ST BY_INT
DCPSST
1
T P_PCH_AE30
1
AE30 1
.c
C228
DCPSUS T P82 T PAD28 SCD1U16V2KX-3GP
C226
T P_PCH_P19
2
P19 1 SCD1U16V2KX-3GP
DCPSUS T P80 T PAD28
2
LYNX-POINT -2-GP-U
(71.82H81.A0U)
ia
V_1P05_PCH V_1P05_M E es
A A
on
<Variant Nam e>
nd
Hs ichih, Taipei
T itle
Lynxpoint_POWER
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
SATA SATA1
SATA_TXP0_C SATAHDR_TX_DP0
8 2 C308 1 2 SCD01U16V2KX-3GP
9 8 TXP 3 SATA_TXN0_C C309 1 2 SCD01U16V2KX-3GP SATAHDR_TX_DN0
21 SATAHDR_RX_DP0 9 TXN
21 SATAHDR_RX_DN0
D 1 6 SATA_RXN0_C C310 1 2 SCD01U16V2KX-3GP SATAHDR_RX_DN0 D
21 SATAHDR_TX_DN0 4 GND RXP 5 SATA_RXP0_C C311 1 2 SCD01U16V2KX-3GP SATAHDR_RX_DP0
21 SATAHDR_TX_DP0 7 GND RXN
GND
SKT-SATA7P-56-GP
Blue color
21 SATAHDR_RX_DP5
21 SATAHDR_RX_DN5
21 SATAHDR_TX_DN5
21 SATAHDR_TX_DP5 SATA2
9
7
6 SATA_TXP5_C C304 1 2 SCD01U16V2KX-3GP SATAHDR_TX_DP5
5 SATA_TXN5_C C305 1 2 SCD01U16V2KX-3GP SATAHDR_TX_DN5
4
3 SATA_RXN5_C C306 1 2 SCD01U16V2KX-3GP SATAHDR_RX_DN5
2 SATA_RXP5_C C307 1 2 SCD01U16V2KX-3GP SATAHDR_RX_DP5
C C
1
8
SKT-SATA7P-19-GP-U
(20.81274.007)
White color
B B
om
.c
<Variant Name>
A A
ia
Hsichih, Taipei
Title
SATA Port
B ROSA TIGRIS SFF
es Date: Thursday, April 03, 2014 Sheet 25 of 52
1
5 4 3 2 1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
w/o Latch: 20.50352.164

with Latch: 20.50356.164
PCIEX16 PCIEx16 CONN may need LATCH if supporting 75W GFX Card
11 EXP_A_RX_DN[0..15]
11 EXP_A_RX_DP[0..15]
+12V
PCI2.2 COMPATIBLE: need the +12V SLOT 1
11 EXP_A_T X_DP[0..15] SMB_BUS two signals connect to R424
11 EXP_A_T X_DN[0..15] VCC3 through 5.6K 5% Res B1 A1 PCIEX16_PRSNT 1_N 1 2
D +12V PRSNT1# D
B2 A2 0R0402-PAD-2-GP
20 CK_PE_100M _16PORT _DP B3 +12V +12V A3
20 CK_PE_100M _16PORT _DN B4 +12V +12V A4
SM B_CLK_RESUM E B5 GND GND A5
39 PLT RST _SL_X1_N VCC3 SM B_DAT A_RESUM E B6 SMCLK JTAG2 A6
B7 SMDAT JTAG3 A7 VCC3
19 GPIO_PCIE_RESET B8 GND JTAG4 A8
V_3P3_PCIVAUX B9 +3.3V JTAG5 A9
B10 JTAG1 +3.3V A10
WAKE_N B11 3.3VAUX +3.3V A11 PLT RST _RISER#_CN PLT RST _RISER#
R72 1 2 0R0402-PAD-2-GP
WAKE# PERST# 1 2
C124 SCD1U16V2KX-3GP
B12 A12 +12V

B13 RSVD GND A13 CK_PE_100M _16PORT _DP
EXP_A_T X_DP0 C129 1 2 SCD22U10V2KX-1GP EXP_A_T X_0_C_DP B14 GND REFCLK+ A14 CK_PE_100M _16PORT _DN
EXP_A_T X_DN0 1 2 SCD22U10V2KX-1GP EXP_A_T X_0_C_DN B15 PETP0 REFCLK- A15
C127 EXP_A_RX_DP0
B16 PETN0 GND A16 T C1 C108 C101 C105 C107 C106
B17 GND PERP0 A17 EXP_A_RX_DN0
Jack change PCIEX16_PRSNT2_DET (R) (R) (R)
B18 PRSNT2# PERN0 A18
E470U16VM-L8-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
to B81 pin 2013/03/25 GND GND
2
EXP_A_T X_DP1 1 2 SCD22U10V2KX-1GP EXP_A_T X_1_C_DP B19 A19
C131
EXP_A_T X_DN1 EXP_A_T X_1_C_DN PETP1 RSVD
1
C130 1 2 SCD22U10V2KX-1GP B20 A20
B21 PETN1 GND A21 EXP_A_RX_DP1
OTHERS EXP_A_T X_DP2 EXP_A_T X_2_C_DP
1 2 SCD22U10V2KX-1GP B23 GND PERN1 A23
19,39,42,43 SM B_CLK_RESUM E EXP_A_T X_DN2 C137 EXP_A_T X_2_C_DN
1 2 SCD22U10V2KX-1GP B24 PETP2 GND A24
19,39,42,43 SM B_DAT A_RESUM E C135
19,35,42,43 WAKE_N EXP_A_T X_DP3 C139 1 2 SCD22U10V2KX-1GP EXP_A_T X_3_C_DP B27 GND PERN2 A27
EXP_A_T X_DN3 1 2 SCD22U10V2KX-1GP EXP_A_T X_3_C_DN B28 PETP3 GND A28
C138 EXP_A_RX_DP3
22 PCIEX16_PRSNT 2_DET B29 PETN3 GND A29
B31 RSVD PERN3 A31
B32 PRSNT2# GND A32 VCC3
GND RSVD
C EXP_A_T X_DP4 1 2 SCD22U10V2KX-1GP EXP_A_T X_4_C_DP B33 A33 C

C141
EXP_A_T X_DN4 1 2 SCD22U10V2KX-1GP EXP_A_T X_4_C_DN B34 PETP4 RSVD A34
C140 T C2 C121 C120 C119
(R) (R)
E100U16VM-25-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
EXP_A_T X_DP5 EXP_A_T X_5_C_DP GND PERN4
2
C144 1 2 SCD22U10V2KX-1GP B37 A37
EXP_A_T X_DN5 C143 1 2 SCD22U10V2KX-1GP EXP_A_T X_5_C_DN B38 PETP5 GND A38
GND PERP5 EXP_A_RX_DN5
1
B40 A40
EXP_A_T X_DP6 1 2 SCD22U10V2KX-1GP EXP_A_T X_6_C_DP B41 GND PERN5 A41
C148
C146
C151
C150
GND GND
EXP_A_T X_DP8 1 2 SCD22U10V2KX-1GP EXP_A_T X_8_C_DP B50 A50

C163
EXP_A_T X_DN8 C162 1 2 SCD22U10V2KX-1GP EXP_A_T X_8_C_DN B51 PETP8 RSVD A51
B52 PETN8 GND A52 EXP_A_RX_DP8 V_3P3_PCIVAUX
C184
C183 C122
GND PERP9 EXP_A_RX_DN9
2
B57 A57
SCD1U16V2KX-3GP
C189
C187
PETN10 GND EXP_A_RX_DP10
1
B60 A60
C196
EXP_A_T X_DN11 C194 1 2 SCD22U10V2KX-1GP EXP_A_T X_11_C_DN B63 PETP11 GND A63
C205
C203
B GND PERP12 EXP_A_RX_DN12 B
B69 A69
C208
C209
C215
om
C213
EXP_A_T X_DP15 C218 1 2 SCD22U10V2KX-1GP EXP_A_T X_15_C_DP B78 GND PERN14 A78
C219 EXP_A_RX_DP15
Jack change GPIO13 High to Reset PCIE*16
B80 PETN15 GND A80 2012/12/11
PCIEX16_PRSNT 2_DET B81 GND PERP15 A81 EXP_A_RX_DN15 SB3V
RSVD GND
.c
Jack add PCIEX16_PRSNT2_DET
2013/03/26
T -CONN164-4R4-GP
1
(020.50008.0164) (R)
R475
10KR2J-3-GP
2
ia
U25 (R)
1 6 PLT RST _RISER
(R) VCC3
R508 1 2 1KR2J-1-GP PCIRST 3#_R 2 5
PLT RST _SL_X1_N
R509 1 2 33R2J-2-GP 3 4
1
es 2013/7/15 Eric
change to 33 ohm 2N7002KDW-1-GP
R510 (R)
10KR2J-3-GP
2
(R) Q46 (R)
A GPIO_PCIE_RESET R512 1 2 GPIO_PCIE_RESET _R G A
on
D PLT RST _RISER#
1KR2J-1-GP
S
<Variant Nam e>
2N7002K-2-GP
nd
Hs ichih, Taipei
T itle
PCIEX16 CONNECTOR
-i

5 4 3 2 1
si
ni
t ek
w.
ww
VCC
A
RGB D1
21 VGA_RED 1SS355-4-GP
(83.00355.F1F)
21 VGA_GREEN
21 VGA_BLUE VGA_DDC_PU
K
Jack H Zhang
SYNC 2012/11/28
1
2013/6/27 Eric
R12 R11 change to 0 ohm short pad
21 VGA_HSYNC_3V_L
2K2R2J-2-GP 2K2R2J-2-GP
21 VGA_VSYNC_3V_L
L7
VGA_RED 1 2 VGA_RED_C_L L4 1 2 0R0402-PAD-2-GP RED_CRT
2
DDC VCC3
FCM1005MF-750T03-GP
(68.00084.551)
L6
21 VGA_PCH_DDCSDA VCC3 VGA_GREEN 1 2 VGA_GREEN_C_L 1 2 0R0402-PAD-2-GP GREEN_CRT
L3
21 VGA_PCH_DDCSCL
1
FCM1005MF-750T03-GP
R22 (68.00084.551)
2K2R2J-2-GP L5
22 VGA_DET VGA_BLUE 1 2 VGA_BLUE_C_L L2 1 2 0R0402-PAD-2-GP BLUE_CRT
FCM1005MF-750T03-GP
VGA_PCH_DDCSDA
2
(68.00084.551)
5VDDCDA_R 1 2 100R2F-L1-GP-U 5VDDCDA
R7
5VDDCCL_R 1 2 100R2F-L1-GP-U 5VDDCCL
DDC_DATA/DDC_CLK; VCC3 3
U7
4
R6
LOCATE PULL-UPS
ANYWHERE ON ROUTE
2
2 5
1
OF TRACE
R23 1 6 R27 R26 R28 C11 (R) (R) (R)
1
2K2R2J-2-GP C43 C42 C44 C26 C25 C27 C12 SC100P50V2JN-3GP C15 C16 C17
2N7002KDW-1-GP 150R2F-1-GP 150R2F-1-GP (R) (R)
1
150R2F-1-GP
VGA_PCH_DDCSCL
2
2
SC100P50V2JN-3GP
1
(R) (R)
C22 C23 SC3D3P50V2CN-GP SC3D3P50V2CN-GP SC3D3P50V2CN-GP SC3D3P50V2CN-GP SC10P50V2JN-4GP SC10P50V2JN-4GP
SC100P50V2JN-3GP SC100P50V2JN-3GP SC3D3P50V2CN-GP SC3D3P50V2CN-GP SC10P50V2JN-4GP
2
L8
VGA_HSYNC_3V_L 1 2 MCB1005S121FBP-GP HSYNC_3P3V
(63.R0034.1DL)
L9
VGA_VSYNC_3V_L 1 2 MCB1005S121FBP-GP VSYNC_3P3V
(63.R0034.1DL)
Jack H Zhang Jack H Zhang

2012/11/29 2012/11/28
1
(R) (R)
C28 C29
2
Jack change X01
ESD Diode
2013/3/13
Jack H Zhang unmount +5V_VGA VGA_DDC_PU
2013/05/22
1
VCC C8(R) C7(R)
SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2
U1 U2
BLUE_CRT 1 6 RED_CRT VSYNC_3P3V 1 6 5VDDCDA
I/O1 I/O4 I/O1 I/O4
1
C24 (R) 2 5 2 5
SCD1U16V2KX-3GP GND VDD GND VDD
GREEN_CRT 3 4 VGA_DET HSYNC_3P3V 3 4 5VDDCCL
I/O2 I/O3 I/O2 I/O3
2
AZC099-04S-1-GP AZC099-04S-1-GP
2
F1
(R) (R)
POLYSW-1D5A8V-3-GP
om
1
V_5P0_CONN_CRT_L 1 TP1 TPAD30
.c
1
L1
Jack change on 0R0603-PAD-2-GP-U
2012/11/28
2013/6/27 Eric
2
ia
VGA1
VGA_PWR 9 4 VGA_DET
+5V_VGA VCC_CRT NC#4 11
NC#11
5VDDCDA 12
5VDDCCL 15 DDCDATA_ID1
DDCCLK_ID3
es <Variant Name>
1
C9 5
SCD1U16V2KX-3GP RED_CRT 1 GND 6
GREEN_CRT 2 CRT_RED GND 7 Wistron Incorporated
BLUE_CRT CRT_GREEN GND
2
3 8 21F, 88, Hsin Tai Wu Rd

CRT_BLUE GND 10
VSYNC_3P3V 14 GND 16 Hsichih, Taipei
HSYNC_3P3V VSYNC GND
on
13 17 Title
HSYNC GND
VGA Port
D-SUB-15-183-GP Size Document Number Rev
A3 ROSA TIGRIS SFF
1
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
DP connector
Place all CAP near DP Connector
Impedance 85 ohm
Display Port DP1
DDSP_B_T X_DP_0_C 1 X1
11 DDSP_B_T X_DP_0 DDSP_B_T X_DP_0 1 2 SCD1U16V2KX-3GP DDSP_B_T X_DP_0_C VCC3 2 ML_LANE0P SHELL1 X2
C34
11 DDSP_B_T X_DN_0 DDSP_B_T X_DN_0 1 2 SCD1U16V2KX-3GP DDSP_B_T X_DN_0_C DDSP_B_T X_DN_0_C 3 GND SHELL2
C35
DDSP_B_T X_DP_1_C 4 ML_LANE0N
11 DDSP_B_T X_DP_1 DDSP_B_T X_DP_1 1 2 SCD1U16V2KX-3GP DDSP_B_T X_DP_1_C 5 ML_LANE1P
C36
11 DDSP_B_T X_DN_1 DDSP_B_T X_DN_1 1 2 SCD1U16V2KX-3GP DDSP_B_T X_DN_1_C DDSP_B_T X_DN_1_C 6 GND
C37
DDSP_B_T X_DP_2_C 7 ML_LANE1N
11 DDSP_B_T X_DP_2 DDSP_B_T X_DP_2 1 2 SCD1U16V2KX-3GP DDSP_B_T X_DP_2_C 8 ML_LANE2P
11 DDSP_B_T X_DN_2 DDSP_B_T X_DN_2
C38 30mil
C39 1 2 SCD1U16V2KX-3GP DDSP_B_T X_DN_2_C 500mA (Max.)
DDSP_B_T X_DN_2_C 9 GND
DDSP_B_T X_DP_3_C ML_LANE2N
1
10
11 DDSP_B_T X_DP_3 DDSP_B_T X_DP_3 C40 1 2 SCD1U16V2KX-3GP DDSP_B_T X_DP_3_C F2 11 ML_LANE3P
D 11 DDSP_B_T X_DN_3 DDSP_B_T X_DN_3 D
C41 1 2 SCD1U16V2KX-3GP DDSP_B_T X_DN_3_C POLYSW-1D5A8V-3-GP
DDSP_B_T X_DN_3_C 12 GND
DP_Dongle_DET 13 ML_LANE3N
21 DDPB_CT RL_CLK R8 2 1 1M R2J-1-GP DP1_14 14 GND
21 DDPB_CT RL_DAT A DDPB_AUX_DN 2 SCD1U16V2KX-3GP DDPB_AUX_DN_C DDSP_1_AUX_DP_C GND
2
C61 1 15
DDPB_AUX_DP 1 2 SCD1U16V2KX-3GP DDPB_AUX_DP_C 16 AUX_CHP
C62
21 DDSP_B_HPD DDSP_1_AUX_DN_C 17 GND
DDSP_B_HPD_CONN 18 AUX_CHN
21 DDPB_AUX_DP 19 HP_DETECT X3
21 DDPB_AUX_DN DP_PWR 20 RETURN SHELL3 X4
DP_PWR SHELL4
1
(R) DISPLAYPORT -1-GP
VCC C20 C19 (022.10006.0011)
SC470P50V2KX-3GP SCD1U16V2KX-3GP
2
R16 100KR2J-1-GP
2 1
(R)
Q1
G
D DDSP_B_HPD_CONN
DDSP_B_HPD S PLACE NEAR CONNECTOR PIN
1
2N7002K-2-GP R37
100KR2J-1-GP
2
+12V
+12V
1
C
Jack H Zhang change R25
C
2012/11/28 20KR2J-L2-GP
1
VCC
10KR2J-3-GP
2
1
R36
1
R10
2
(R)
1KR2J-1-GP R24 Jack H Zhang unmount
ESD Diodes
15KR2F-GP
2013/05/22
2
Q7
HDM I_DEVICE_DET ECT
2
6 1
2 Q64_PIN2
U4
DP_Dongle_DET HDM I_Q64_PIN5
R35 1 2 5
DP_DEVICE_DET ECT DDSP_1_AUX_DN_C DDSP_1_AUX_DN_C
1
4 3 1 10
DDSP_1_AUX_DP_C LINE_1 NC#10 DDSP_1_AUX_DP_C
1
4K7R2J-2-GP 2 9
3 LINE_2 NC#9 8
M BT 3904DW1T 1G-2-GP R34
DDSP_B_HPD_CONN GND GND DDSP_B_HPD_CONN
1
R9 C60 (75.03904.07C) 4K99R2F-L-GP 4 7

DP_Dongle_DET 5 LINE_3 NC#7 6 DP_Dongle_DET
1M R2J-1-GP SC470P50V2KX-3GP
LINE_4 NC#6
2
(R)
2
AZ1045-04F-R7G-GP
(R)
U3
DDSP_B_T X_DP_2_C 1 10 DDSP_B_T X_DP_2_C
DDSP_B_T X_DN_2_C 2 LINE_1 NC#10 9 DDSP_B_T X_DN_2_C
3 LINE_2 NC#9 8
DDSP_B_T X_DP_3_C 4 GND GND 7 DDSP_B_T X_DP_3_C
LINE_4 NC#6
VCC3
AZ1045-04F-R7G-GP
(R)
2
U5
R14
B DDSP_B_T X_DP_0_C DDSP_B_T X_DP_0_C B
100KR2J-1-GP 1 10
3 LINE_2 NC#9 8
DDSP_B_T X_DP_1_C GND GND DDSP_B_T X_DP_1_C
1
Q5 Q6 4 7
DDSP_1_AUX_DN_C 3 4 DDPB_AUX_DN_C DDSP_1_AUX_DN_C 3 4 DDPB_CT RL_DAT A DDSP_B_T X_DN_1_C 5 LINE_3 NC#7 6 DDSP_B_T X_DN_1_C
LINE_4 NC#6
DP_DEVICE_DET ECT 2 5 DP_DEVICE_DET ECT HDM I_DEVICE_DET ECT 2 5 HDM I_DEVICE_DET ECT
om
DDPB_AUX_DP_C DDSP_1_AUX_DP_C DDSP_1_AUX_DP_C DDPB_CT RL_CLK AZ1045-04F-R7G-GP
1 6 1 6 (R)
1
2N7002KDW-1-GP R13 2N7002KDW-1-GP
100KR2J-1-GP
.c
2
ia
es
A A
on
<Variant Nam e>
nd
Hsichih, Taipei
T itle
HDMI Port
-i

5 4 3 2 1
si
ni
t ek
w.
ww
Jack Delete HDMI
20121225
om
.c
ia
es
on
<Variant Nam e>
nd
Hsichih, Taipei
T itle
TBD
-i
si
ni
ek
t
w.
ww
5 4 3 2 1
FRONT USB FRONT USB PORT

Eric F7&F10 co-lay
Jack H Zhang change
2012/11/27
EMI
2013/5/7
22 USB_OC_45* F10 1 2 POLYSW-1D5A8V-3-GP
5VDUAL_USB_R USBVCC45
22 USB_PCH_DP5
2
LR12
22 USB_PCH_DN5 USB_PCH_DN5 1 2 USB_EXT_DN5
R391
22 USB_PCH_DN4
10KR2J-3-GP Jack H Zhang delete
22 USB_PCH_DP4 USB_PCH_DP5 4 3 USB_EXT_DP5
2013/1/11
D USB_OC_45* D
1
MCM1012B900FBP-GP-U
C349 TC4 (68.01012.20B)
1
SCD1U16V2KX-3GP E220U16VM-L8-GP
21 FB_USBF2_DET
2
1
C348 R392
SC1KP50V2KX-1GP 15KR2F-GP
2
Jack H Zhang delete
2013/1/11
UU4
USB_PCH_DN4 LR11 USB_EXT_DN4 USB_EXT_DN5 USB_EXT_DP5
1 2 1 6
I/O1 I/O4
USB_PCH_DP4 4 3 USB_EXT_DP4 2 5 USBVCC45
GND VDD
USB_EXT_DP4 3 4 USB_EXT_DN4
MCM1012B900FBP-GP-U
I/O2 I/O3
1
(68.01012.20B)
UC11
AZC099-04S-1-GP SCD1U16V2KX-3GP
2
C C
Jack H Zhang delete

2013/1/11
USBF2
USBVCC45 1 2
USB_EXT_DN4 3 4 USB_EXT_DN5
USB_EXT_DP4 5 6 USB_EXT_DP5
7 8
9 10
X Down
UP DVD-CONN10A-SFP4-GP
FB_USBF2_DET
(21.62735.205)
Green
B B
om
.c
ia
es
A A
on
<Variant Name>
nd
Hsichih, Taipei
Title
FRONT USB20 HEADER
C ROSA TIGRIS SFF 1
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
LPC
Close to P10 Close to P24
14,19,39 L_AD0
14,19,39 L_AD1 VCC3
14,19,39 L_AD2
14,19,39 L_AD3 +12V
14,19,39 L_FRAME_N
C383 C394 C389
1
(R)
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP
D D
1
C382 (R)
2
SCD1U16V2KX-3GP
2
20 CK_P_33M_TPM
U23
Q38
21,39 SER_IRQ TP_TPM_PIN7
G TPAD28 TP4 1 7 10
PP VPS 24
14,39 PLTRST_LPC_N PLTRST_LPC_N CK_P_33M_TPM VPS
D 21
LCLK
S PLTRST_TPM_N 16 1
L_FRAME_N 22 LRESET# NC#1 2
20 CK_14M_TPM L_PWRDWN_N LFRAME# NC#2 TCM_BA1
2
2N7002K-2-GP VCC3 R4691 2 4K7R2J-2-GP 28 3
R442 LPCPD# NC#3 5 TCM_NC5#
SER_IRQ 27 NC#5 6 TP_TPM_PIN6 1 TP5 TPAD28
10KR2J-3-GP SERIRQ NC#6
1
(R) 12 (R)
R4231 2 0R2J-2-GP L_AD0 26 NC#12 13 CK_14M_TPM C398
L_AD1 LAD0 NC#13 TCM_NCP
1
23 14 SCD1U16V2KX-3GP
L_AD2 LAD1 NC#14 TCM_CLK_RUN
2
20 15 (R)
L_AD3 LAD2 NC#15
1
17 19 VCC3 C379
LAD3 NC#19 P25_GND
1
25 SC1U16V3KX-2GP
NC#25 C384
2
4 SCD1U16V2KX-3GP
GND
2
C
11 8 (R) C
18 GND VNC#8 9 TCM_BA0
GND VNC#9
ST33ZP24AR28PVSP-D-GP
TCM_BA1
TCM_BA0
TCM_CLK_RUN
P25_GND
1
Dual layout with U18 (R) (R) (R) (R)
B VCC3 R464 R438 R456 R476 B
0R2J-2-GP 4K7R2J-2-GP 1KR2J-1-GP 1KR2J-1-GP
U22 (R)
L_AD0
2
10 26
19 VDD LAD0 23 L_AD1
24 VDD LAD1 20 L_AD2
VDD LAD2 17 L_AD3
TCM_NCP 14 LAD3
NC_P 21 CK_P_33M_TPM
LCLK 28 L_PWRDWN_N
TP_TPM_PIN7 7 LPCPD# 22 L_FRAME_N
SER_IRQ 27 PP LFRAME# 16 PLTRST_TPM_N
TCM_CLK_RUN 15 SERIRQ LRESET#
CLKRUN#
9 TCM_BA0
om
1 BA0 3 TCM_BA1
2 NC#1 BA1
TCM_NC5# 5 NC#2
TP_TPM_PIN6 6 NC#5 4
8 NC#6 GND 11
12 NC#8 GND 18
.c
CK_14M_TPM 13 NC#12 GND 25 P25_GND
NC#13 GND <Variant Name>
A A
SSX44-B-D-T-GP Wistron Incorporated
ia
Hsichih, Taipei
Title
TPM&TCM
B ROSA TIGRIS SFF
1
5 4 3 2 1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
REAR USB REAR USB+LAN Eric F6&F9 co-lay

Jack H Zhang change
2012/11/27
V_3P3_LAN
2013/5/7
U12
22 USB_PCH_DP2 UU3
22 USB_PCH_DN2 SPEED_1000
F9 1 2 POLYSW-1D5A8V-3-GP 1 6
22 USB_PCH_DN3 USB_EXT_DN2 1 6 USB_EXT_DP2 I/O1 I/O4
22 USB_PCH_DP3 I/O1 I/O4 2 5
22 USB_OC_23* 5VDUAL_USB_R USBVCC23
2 5 USBVCC23 GND VDD
GND VDD LINK_ACTIVITY SPEED_100
1
UTC3 3 4
USB_EXT_DP3 3 4 USB_EXT_DN3 I/O2 I/O3
UR8 E220U16VM-L8-GP UC10
I/O2 I/O3
1
10KR2J-3-GP SCD1U16V2KX-3GP
RJ45
2
UC8 AZC099-04S-1-GP
1
D 35 LAN_MDI2_DP D
35 LAN_MDI2_DN USB_OC_23* swap U16 net C73
SCD1U16V2KX-3GP
2013/01/03
2
35 LAN_MDI1_DP
1
35 LAN_MDI1_DN
UR9 UC9
1
15KR2F-GP SC1KP50V2KX-1GP
35 LAN_MDI0_DP
35 LAN_MDI0_DN Jack H Zhang change U16 near LAN connector
2012/11/27
2
35
35
LAN_MDI3_DP
LAN_MDI3_DN ESD Diodes
35 SPEED_100_N
35 SPEED_1000_N
35 LINK_ACTIVITY_N V_3P3_LAN
V_3P3_LAN
U11 U10
LAN_MDI0_DN_C 1 6 LAN_MDI1_DN_C LAN_MDI2_DN_C 1 6 LAN_MDI3_DN_C
I/O1 I/O4 I/O1 I/O4
2 5 2 5
EMI LAN_MDI0_DP_C 3
GND
I/O2
VDD
I/O3
4 LAN_MDI1_DP_C LAN_MDI2_DP_C 3
GND
I/O2
VDD
I/O3
4 LAN_MDI3_DP_C
1
AZC099-04S-1-GP AZC099-04S-1-GP
1
LR6 LR5 (075.003V3.007C) C83 (075.003V3.007C)
USB_PCH_DN2 1 2 USB_EXT_DN2 USB_PCH_DN3 1 2 USB_EXT_DN3 SCD1U16V2KX-3GP C84
2
SCD1U16V2KX-3GP
USB_PCH_DP2 USB_EXT_DP2 USB_PCH_DP3 USB_EXT_DP3
2
4 3 4 3
MCM1012B900FBP-GP-U MCM1012B900FBP-GP-U
(68.01012.20B) (68.01012.20B)
C C
Jack change on
2012/11/28 EMI
LR7 LR8
LAN_MDI0_DN 2 1 LAN_MDI0_DN_C LAN_MDI1_DN 2 1 LAN_MDI1_DN_C
LAN_MDI0_DP 3 4 LAN_MDI0_DP_C LAN_MDI1_DP 3 4 LAN_MDI1_DP_C
(66.R0036.04L) (66.R0036.04L)
LR10 LR9
LAN_MDI2_DN 2 1 LAN_MDI2_DN_C LAN_MDI3_DN 2 1 LAN_MDI3_DN_C
LAN_MDI2_DP 3 4 LAN_MDI2_DP_C LAN_MDI3_DP 3 4 LAN_MDI3_DP_C
(66.R0036.04L) (66.R0036.04L)
B B
om
USB+RJ45
Giga
.c
100 10
LNUSB1
G8
Orange
G2
L4 SPEED_1000
UR7
2
249R2F-GP
1 SPEED_1000_N
Link Orange Green X
G4
G6 Act Blink Blink Blink
GREEN
ORANGE
Green UR6 249R2F-GP

L3 SPEED_100 2 1 SPEED_100_N
ia
USBVCC23 U5 R10
U1 R9 LAN_MDI3_DN_C
USB_EXT_DN3 U6 R8 LAN_MDI3_DP_C
USB_EXT_DN2 U2 R7 LAN_MDI2_DN_C
USB_EXT_DP3 U7 R6 LAN_MDI2_DP_C
USB_EXT_DP2 U3 R5 LAN_MDI1_DN_C
U8 R4 LAN_MDI1_DP_C
UP U4 R3 LAN_MDI0_DN_C
R2
R1
L2
LAN_MDI0_DP_C
LAN_CONN_CVT
RJ45_ACT
es
V_3P3_LAN
G5
1
YELLOW
G3 UC5
UR5 330R2J-3-GP SCD1U16V2KX-3GP
A L1 LINK_ACTIVITY 1 2 LINK_ACTIVITY_N A
2
G7 G1
on
SKT-RJ45-USB-9-GP
Jack H Zhang delete UC9
2013/01/02 <Variant Name>
nd
Hsichih, Taipei
Title
USB+RJ45
C ROSA TIGRIS SFF 1
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
Rear USB3.0
22 USB3_RX0_DN Jack H Zhang change CONN
22
22
USB3_RX0_DP
USB3_TX0_C_DN REAR USB3.0 2012/11/29
22 USB3_TX0_C_DP
22 USB3_RX1_DN
REAR USB3.0 CONN
22 USB3_RX1_DP
USB3R1
22 USB3_TX1_C_DN 1 2
5VDUAL_USB_R F5 POLYSW-3A6V-3-GP USBVCC01
22 USB3_TX1_C_DP 1 5 REAR_USB3_RX0-
USBVCC01
VBUS#1 STDA_SSR-#5 REAR_USB3_RX1-
1
(69.50007.B81) 10 14
22 USB_PCH_DP0 VBUS#10 STDA_SSR-#14 6 REAR_USB3_RX0+
22 USB_PCH_DN0 STDA_SSR+#6 15 REAR_USB3_RX1+
UR3 UC1 UTC2
22 USB_PCH_DP1 10KR2J-3-GP STDA_SSR+#15
D 22 USB_PCH_DN1 REAR_USB3_TX0- D
8
SCD1U16V2KX-3GP
E220U16VM-L8-GP
USB_OC_01* USB_EXT_DN0 STDA_SST-#8 REAR_USB3_TX1-
1
2 17
22 USB_OC_01* USB_EXT_DN1 D-#2 STDA_SST-#17 REAR_USB3_TX0+
11 9
D-#11 STDA_SST+#9 REAR_USB3_TX1+
1
18
USB_EXT_DP0 STDA_SST+#18
2
UC7 UR4 3
SC1KP50V2KX-1GP 15KR2F-GP USB_EXT_DP1 12 D+#3
D+#12 4
GND
2
13
GND
2
19
GND 20
7 GND 21
16 GND_DRAIN#7 GND 22
GND_DRAIN#16 GND
SKT-USB22-12-GP
(22.10339.771)
USB3_TX1_C_DN 1 2 SCD1U16V2KX-3GP USB3_TX1_EMI_DN

C74
USB3_TX1_C_DP 1 2 SCD1U16V2KX-3GP USB3_TX1_EMI_DP
C75
USB3_TX0_C_DN C76 1 2 SCD1U16V2KX-3GP USB3_TX0_EMI_DN

USB3_TX0_C_DP C77 1 2 SCD1U16V2KX-3GP USB3_TX0_EMI_DP
Jack H Zhang change ESD Diodes

EMI
C C
2012/11/28 U9
REAR_USB3_RX0+ 1 10 REAR_USB3_RX0+
USB3_TX0_EMI_DN REAR_USB3_TX0- USB3_RX0_DN REAR_USB3_RX0- REAR_USB3_RX0- 2 LINE_1 NC#10 9 REAR_USB3_RX0-
3 LINE_2 NC#9 8
REAR_USB3_RX1+ 4 GND GND 7 REAR_USB3_RX1+
REAR_USB3_RX1- 5 LINE_3 NC#7 6 REAR_USB3_RX1-
LINE_4 NC#6
2
4
LR3
USB_PCH_DN0 1 2 USB_EXT_DN0
L23 L18 AZ1045-04F-R7G-GP
FILTER-4P-98-GP FILTER-4P-98-GP USB_PCH_DP0 USB_EXT_DP0 (75.01004.073)
(66.R0036.04L) (66.R0036.04L) 4 3 U8
REAR_USB3_TX0- 1 10 REAR_USB3_TX0-
MCM1012B900FBP-GP-U
REAR_USB3_TX0+ 2 LINE_1 NC#10 9 REAR_USB3_TX0+
(68.01012.20B)
3 LINE_2 NC#9 8
REAR_USB3_TX1- GND GND REAR_USB3_TX1-
1
3
4 7
REAR_USB3_TX1+ 5 LINE_3 NC#7 6 REAR_USB3_TX1+
LINE_4 NC#6
USB3_TX0_EMI_DP REAR_USB3_TX0+ USB3_RX0_DP REAR_USB3_RX0+
AZ1045-04F-R7G-GP
(75.01004.073)
USB3_TX1_EMI_DN REAR_USB3_TX1- USB3_RX1_DN REAR_USB3_RX1-
UU1
2
4
L22 L19
I/O1 I/O4
FILTER-4P-98-GP FILTER-4P-98-GP
(66.R0036.04L) (66.R0036.04L) 2 5 USBVCC01
B GND VDD B
USB_EXT_DN1 3 4 USB_EXT_DP1
I/O2 I/O3
1
LR4
USB_PCH_DN1 1 2 USB_EXT_DN1
UC6
1
USB_PCH_DP1 USB_EXT_DP1
2
4 3
om
USB3_TX1_EMI_DP REAR_USB3_TX1+ USB3_RX1_DP REAR_USB3_RX1+ MCM1012B900FBP-GP-U
(68.01012.20B)
.c
ia
es
A A
on
<Variant Name>
nd
Hsichih, Taipei
Title
REAR USB30_1
C ROSA TIGRIS SFF 1
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
Rear USB2.0
REAR USB2.0 Eric F4&F8 co-lay
22 USB_PCH_DP8 2013/5/7
22 USB_PCH_DN8
22 USB_PCH_DP9
F8 1 2 POLYSW-1D5A8V-3-GP
22 USB_PCH_DN9
USBVCC89
22 USB_OC_89* 5VDUAL_USB_R
D D
1
USB2R1
UR1 (22.10341.D71)
10KR2J-3-GP UC2 UTC1
12
SCD1U16V2KX-3GP
E220U16VM-L8-GP
USB_OC_89*
1
10
4
1
8
USB_EXT_DP8
2
UC4 UR2 3
SC1KP50V2KX-1GP 15KR2F-GP USB_EXT_DP9 7
USB_EXT_DN8 2
USB_EXT_DN9
2
6
2
USBVCC89 1
5
DOWN
UP
9
11
SKT-USB12-24-GP
C C
Jack change USB2R1 to 22.10321.W41

2012/12/13
Jack H Zhang change

2012/11/27
EMI
USB_PCH_DN9 1
LR2
2 USB_EXT_DN9 ESD Diodes
USB_PCH_DP9 4 3 USB_EXT_DP9
B B
MCM1012B900FBP-GP-U UU2
(68.01012.20B)
I/O1 I/O4
LR1 2 5 USBVCC89
USB_PCH_DN8 1 2 USB_EXT_DN8 GND VDD
USB_EXT_DN9 3 4 USB_EXT_DP9
USB_PCH_DP8 USB_EXT_DP8 I/O2 I/O3
1
4 3
UC3
MCM1012B900FBP-GP-U AZC099-04S-1-GP SCD1U16V2KX-3GP
2
(68.01012.20B)
om
.c
<Variant Name>
A A
ia
Hsichih, Taipei
Title
REAR USB20_1
B ROSA TIGRIS SFF
1
5 4 3 2 1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
V_3P3_LAN V_1P05_LAN
To connector Jack Delete TP4,TP5,TP6

2012/12/11
32 LAN_MDI0_DP
LINK_ACTIVITY_N
R64
32 LAN_MDI0_DN 1 2 LAN_RSET
SPEED_1000_N
SPEED_100_N
LAN_XTALO
32 LAN_MDI1_DP
LAN_XTALI
2K49R2F-GP
32 LAN_MDI1_DN
32 LAN_MDI2_DP Layout Note: near pin46.

32 LAN_MDI2_DN
D D
32
31
30
29
28
27
26
25
32 LAN_MDI3_DP
U13
32 LAN_MDI3_DN
AVDD33
AVDD10
CKXTAL2
CKXTAL1
LED0
LED2
RSET
LED1/GPO
33
32 SPEED_100_N GND
32 SPEED_1000_N
32 LINK_ACTIVITY_N
V_3P3_LAN_VDDSREG
LAN_MDI0_DP 1 24 LAN_1P05_OUT
LAN_MDI0_DN 2 MDIP0 REGOUT 23 AVDD33_REG
3 MDIN0 VDDREG 22
V_1P05_LAN LAN_MDI1_DP AVDD10 DVDD10 WAKE_N V_1P05_LAN
4 21
LAN_MDI1_DN 5 MDIP1 LANWAKE# 20 RTL_ISOLATE_N
LAN_MDI2_DP 6 MDIN1 ISOLATE# 19 PLTRST_LAN_N
OTHERS LAN_MDI2_DN 7 MDIP2 PERST# 18 HSI_LAN_DN4_R
HSI_LAN_DP4_R
C111 2 1 SCD1U16V2KX-3GP HSI_DN4
HSI_DP4
8 MDIN2 HSON 17
V_1P05_LAN C109 2 1 SCD1U16V2KX-3GP
AVDD10 HSOP
20 CK_GLAN_DP
REFCLK_N
REFCLK_P
20 CK_GLAN_DN
CLKREQ#
VCC3
AVDD33
MDIP3
MDIN3
HSIN
HSIP
22 HSI_DP4
1
22 HSI_DN4
22 HSO_C_DN4 R69
(71.08151.M06) 1KR2J-1-GP
22 HSO_C_DP4
9
10
11
12
13
14
15
16
RTL_ISOLATE_N
2
HSO_C_LAN_DP4
LAN_MDI3_DN
LAN_MDI3_DP
HSO_C_LAN_DN4
LANCLK_REQ_U_N
CK_GLAN_DN
CK_GLAN_DP
19 LANCLK_REQ_N
1
R68
39,42 PLTRST_LAN_N 15KR2F-GP
19,26,42,43 WAKE_N
2
Jack change it as PB-AIO
2012/01/21
SB3V
C C
HSO_C_DN4
1
C102 1 2 SCD1U16V2KX-3GP V_3P3_LAN
HSO_C_DP4
C100 1 2 SCD1U16V2KX-3GP R73
25MHz XTAL 10KR2J-3-GP
R63 1 (R) 2 0R2J-2-GP LANCLK_REQ_N
LAN_XTALO
1
6 Q15A
2
vendor advice add 0 Ohm debug R71 MMBT3904DW-GP
2K2R2J-2-GP RTL_ISOLATE_N_2 2 (75.03904.07C)
X1 V_3P3_LAN
1 2 LAN_XTALI
3 Q15B
2
MMBT3904DW-GP 1
RTL_ISOLATE_N_5 5 (75.03904.07C)
XTAL-25MHZ-115-GP
1
(82.30020.691)
4
1
R70 C118
R65 1 (R) 21MR3J-L-GP 1KR2J-1-GP SC1U10V2KX-1GP
(R)
2
2
1
C99 C104
2
Jack change to 10pF for vendor advise

2013/05/31
Jack delete 0603 short PAD for layout

20121227
V_1P05_LAN V_3P3_LAN
2013/05/20 Place C118,C92,C85,C88 close to each Place C115, C117 close to V_3P3_LAN_VDDSREG
LAN_1P05_OUT VDD10 pins -- 3, 8, 22, 30 VDD10 pin -- 22 LAN_EVDD10
R67 1 2 0R0603-PAD-2-GP-U
B B
1
1
(R)
1
1
C110 C112 C98 C92 C93 C115 C117 C95 C94
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U16V3KX-2GP
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
2
om
RTL8111G (LDO mode)
Layout Note:Close to
.c
RTL8111G Pin11,32
ia
es
A A
on
<Variant Name>
nd
Hsichih, Taipei
Title
LAN RTL8151G
C ROSA TIGRIS SFF 1
-i

5 4 3 2 1
si
ni
t ek
w.
ww
HP_OUT_R
HP_OUT_L For Front HP

AGND R_BIAS_MIC1
FP_MIC1_R
FP_MIC1_L
VCC_AUD
For Front MIC
1
C65 C67
VCC_AUD
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
AGND
Cap-saving, if HP-OUT
2
port no use
2
C69
SC10U10V5KX-2GP Amplifer Power from 5V
CPVEE
CBN
CBP
VREF_1
1
2013/7/15 Eric
VCC change to short pad +5VA
36
35
34
33
32
31
30
29
28
27
26
25
U6 L24 0R0603-PAD-2-GP-U
2 1
AVSS2
HP-OUT-L
LINE1-L
AVDD1
AVSS1
CBN
HP-OUT-R
LINE1-R
VREF
MIC1-VREFO
CBP
CPVEE
1
C14 C68
37 24
SCD1U16V2KX-3GP
SC10U10V5KX-2GP
MONO-OUT NC#24 Delete C4,C69 Close to pin 41
VCC_AUD FP_BIAS_MIC1
2
38 23
VCC_AUD AVDD2 LINE1-VREFO
Rear Audio Jack R_OUT_L 39 22 JDREF R547 2 1
LINE2-L JDREF
37
37
R_OUT_L
R_OUT_R
For Rear Line Out R_OUT_R 40
LINE2-R LDO-CAP
21 LDO_CAP
C4211 2
20KR2F-L-GP AGND
SC10U10V5KX-2GP
41 20 R_MIC1_R
37 R_MIC1_L +5VA PVDD1 MIC1-R
37
37 R_MIC1_R
R_BIAS_MIC1
Internal Speaker
CLASSD_L+ 42
SPK-L+ MIC1-L
19 R_MIC1_L
For Rear MIC/Line In
CLASSD_L- 43 18
SPK-L- NC#18
44 17
SPK-R- NC#17
45
SPK-R+ NC#16
16 Digital Power from 3V
Front Audio Jack 46 15 VCC3
+5VA PVDD2 NC#15 2013/7/15 Eric +3V_VA
SENSE_B
GPIO1/DMIC-DATA12
Head Phone TPAD28 TP86 1 TP48 47 14 change to short pad
GPIO2/DMIC-DATA34 SENSE_B
37 HP_OUT_L L20 0R0603-PAD-2-GP-U
GPIO0/DMIC-CLK
PCH_AUD_MUTE 1 2 0R0402-PAD-2-GP PD# 48 13 SENSE_A 2 1
R17
GPIO3/SPDIFO
37 HP_OUT_R EAPD SENSE_A
SDATA-OUT
MIC 49
GND
1
SDATA-IN
C47 C52 C21
DVDD-IO
PCBEEP
RESET#
37 FP_MIC1_L
BIT-CLK
ANALOG
SCD1U16V2KX-3GP
SC10U10V5KX-2GP
SCD1U16V2KX-3GP
Delete C57
GPIO4
37 FP_MIC1_R
DVDD
SYNC
37 FP_BIAS_MIC1 Close to pin3
2
Close to pin9
DIGITAL
10
11
12
ALC3220-CG-GP Jack Add
2012/03/25 R562
C333
AUD_BEEP_C 1 2 AUD_BEEP_R 2 1 SPKR
AUD_LINK_SDIN_1
SCD1U25V2KX-GP
AUD_LINK_RST_N R563
1 2 47KR2J-2-GP
+3V_VA
Sense Signal AUD_LINK_SYNC 47KR2J-2-GP
AUD_LINK_SDO_CODEC
37 R_OUT_JD
(R) +3V_VA
R549 1 2 0R2J-2-GP
37 HP_OUT_JD AUD_LINK_BCLK AUD_LINK_SDIN
R15 2 1
Discret Analog Power
2
37 FP_MIC1_JD 2N7002K-2-GP C66 33R2J-2-GP
S AUD_LINK_SDO_CODEC
37 R_MIC1_JD SC22P50V2JN-4GP
1
(R) VCC_AUD
AUD_LINK_SDO D V_5P0_A L21 HCB1608KF-601T10-GP
40 mils
G 2 1
2013/6/27 Eric
2
(R) Q2 +3V_VA Must pull high +3.3V modify to V_5P0_A (63.00000.00L)
1
PCH Audio Link C419 C58 C18
SC10U10V5KX-2GP
SCD1U16V2KX-3GP
SC100P50V2JN-3GP +3V_VA
1
19 AUD_LINK_SDO
VCC Close to pin27
2
2
Jack added for pop noise
19 AUD_LINK_RST_N 2013/05/17 R33
19 AUD_LINK_SYNC 10KR2J-3-GP
2 10KR2J-3-GP SDOUT_VCC
2
R558 1 (R)
2
R1 AGND AGND
19 AUD_LINK_BCLK
1
10KR2J-3-GP R550 (R)
SQ34_B
19 AUD_LINK_SDIN
Jack change to VCC (R) C32 10KR2J-3-GP
2013/04/02 X01 SC1U10V2KX-1GP
2
(R)
1
(R)
C
(R) (R)
PCH_AUD_MUTE 1 2 PCH_AUD_MUTE_BB AUD_LINK_RST_N E C
R133 SQ2 PD#
1KR2J-1-GP MMBT3904-4-GP SQ1
VCC_AUD decouple
E
Speaker Detect MMBT3904-4-GP

R551 1 2 0R2J-2-GP
VCC_AUD
22,39 PC_SPKR_DET (R)
om
20 PCH_AUD_MUTE Close to pin 38
1
C10 C4
19,23 SPKR
SCD1U16V2KX-3GP
SC10U10V5KX-2GP
delete C59
2
.c
AGND AGND AGND
Place near to Audio Codec
CLASSD_L-/CLASSD_L+>20mils CHASSIS
ia
R_OUT_JD
R3
2
5K1R2F-2-GP
1 SENSE_B
(2W4Ohm) Internal Speaker SPEAKER
Place close to Audio chip
R5 39K2R2F-L-GP INSKR1
HP_OUT_JD 2 1 SENSE_A CLASSD_L- 1 Pin.1--> Left-
Pin.2--> NC key
1
R2 10KR2F-2-GP C30 2
FP_MIC1_JD 2 1 SC1U10V2KX-1GP 3 Pin.3--> GND
PC_SPKR_DET 4 Pin.4--> SPK det#
(R)
CLASSD_L+
es
2
R_MIC1_JD
R4 20KR2F-L-GP 5 Pin.5--> Left+
2 1
CLX-CON5-S1-GP-U
1
UC12 UC13 (R) (R)

SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
C417 C377
Place close to connector
SC100P50V2JN-3GP
SC100P50V2JN-3GP
on
2
Hsichih, Taipei
nd
Title
AUDIO CODEC_ALC3220
C ROSA Shark Bay DTX 1
-i
si
ni
t ek
w.
ww
Rear Audio Jack Rear Audio Jack
(09.10612.08L)
Audio Jack
TC6 E10U25VM-1-GP R30 75R2F-2-GP
R_OUT_L 1 2 R_OUT_L_C 2 1 R_OUT_L_L
Rear Line Out R_OUT_R 1 2 R_OUT_R_C

R21
2
75R2F-2-GP
1 R_OUT_R_R
TC7 E10U25VM-1-GP
36 R_OUT_L R_BIAS_MIC1
36 R_OUT_R
36 R_OUT_JD
(09.10612.08L)
D LINE_OUT
3
D16
36 R_MIC1_L
36 R_MIC1_R
close to codec BAT54A-11-GP
(75.00054.R7D) C LINE_IN/MIC_IN
36 R_BIAS_MIC1
36 R_MIC1_JD R_MIC1_L_D12 R_MIC1_L_D11
1
AUDJK1
INSULATOR
2
22
R_OUT_JD 23
PORT 2
R31 R38
4K7R2F-GP 4K7R2F-GP 24
25
C3 SC4D7U6D3V3KX-GP R29 1KR2F-3-GP
R_MIC1_L R_MIC1_L_C R_MIC1_L_L
1
2 1 2 1 2
R_MIC1_JD 3
PORT 1
4
Rear or MIC/Line In R_MIC1_R C2
2
SC4D7U6D3V3KX-GP
1 R_MIC1_R_C
R20
2
1KR2F-3-GP
1 R_MIC1_R_R 5
1
C63 SC1KP50V2KX-1GP 6
1 2 7
(R) 8
9
AGND NP1
C64 SC1KP50V2KX-1GP
1 2 AUDIO-JK268-GP
2
(R) C31 C50 C33 C51
SC470P50V2KX-3GP
SC470P50V2KX-3GP
SC470P50V2KX-3GP
SC470P50V2KX-3GP
EMI
1
AGND
R548
1 2
(R)
0R3J-0-U-GP
AGND
AGND AGND AGND AGND AGND
R47
1 2
(R)
0R3J-0-U-GP
AGND
R_OUT_L_L R_MIC1_L_L ESD
R40
R_OUT_R_R R_MIC1_R_R
1 2
0R0603-PAD-2-GP-U
AGND
2013/6/26 Eric R41
1
1 2 Q4 Q3
AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP
0R0603-PAD-2-GP-U
(R) (R)
AGND
R19
3
1 2
(R)
0R3J-0-U-GP
AGND AGND AGND
FP_BIAS_MIC1
Front Panel
3
Front Audio Jack D6 AUDF1

FP_MIC1_L_L 1 2
BAT54A-11-GP
Front Audio Jack

(75.00054.R7D) R57 0R3J-0-U-GP
FP_MIC1_R_R 3 4 FP_AUDIO_PRESENCE*_C 1 2 FP_AUD_DETECT
HP_OUT_R_R 5 6 FP_MIC1_JD
(68.00217.351)
FP_MIC1_R_D22 FP_MIC1_R_D21
2
7 8
HP_OUT_L_L X HP_OUT_JD
1
9 10 C418
close to codec SC100P50V2JN-3GP
om
DVD-CONN10A-FP10GP (R)
2
2
(21.62737.205)
R42 R43
36 FP_MIC1_R 4K7R2F-GP 4K7R2F-GP
36 FP_MIC1_L AGND
AGND AGND
36 FP_BIAS_MIC1
1
36 FP_MIC1_JD FP_MIC1_R C5 SC4D7U6D3V3KX-GP R48 1KR2F-3-GP

2 1 FP_MIC1_R_C 2 1 FP_MIC1_R_R
.c
36 HP_OUT_R Front MIC I/O FP_MIC1_L C6
2
SC4D7U6D3V3KX-GP
1 FP_MIC1_L_C
R49
2
1KR2F-3-GP
1 FP_MIC1_L_L
36 HP_OUT_L
36 HP_OUT_JD
2
C81 C78
FP_MIC1_L_L HP_OUT_L_L
SC470P50V2KX-3GP
SC470P50V2KX-3GP
21 FP_AUD_DETECT FP_MIC1_R_R HP_OUT_R_R

1
ia
ESD
1
AGND AGND
Q11 Q9
R53 16D5R2F-GP
es AZ5125-02S-R7G-GP
(R)
AZ5125-02S-R7G-GP
(R)
HP_OUT_R 2 1 HP_OUT_R_R
3
Front HP I/O HP_OUT_L
R54
2
16D5R2F-GP
1 HP_OUT_L_L
on
2
C89 C85
SC470P50V2KX-3GP
SC470P50V2KX-3GP
AGND AGND
<Variant Name>
1
nd
Hsichih, Taipei
Title
AGND AGND
AUDIO CODEC JACKS
C ROSA Shark Bay DTX 1
-i
si
ni
t ek
w.
ww
5 4 3 2 1
39 SUS3V_ON_N
39 SUS3V_FON_N
39 SUS5V_ON_N
38,47 VCC3_3SB_EN_2
38,47 VCC5SB_EN_2
D D
19,39 RSMRST_SIO_N
V_3P3_A
Three Pin Control
1
1
R363
C334 47KR2F-GP
S0 S3 S5 DS SC3D3U10V5KX-2GP
2
SUS3V_FON_N 1 2 220R2F-GP
L L L H R362
2
D8
CH551H-30PT-GP
(83.R5003.H8H)
1
SUS3V_ON_N VCC3_3SB_EN_2
S0 S3 S5 DS R369 1 2 15KR2F-GP
C C
L L L H
D_RSMRST_N_2 R358 2 1 0R0402-PAD-2-GP VCC3_3SB_EN_2

2013/6/26 Eric S0 S3 S5 DS
C
S0 S3 S5 DS RSMRST_SIO_N D_RSMRST_N_1
R342 1 2 10KR2J-3-GP B Q27 L L L H
H H H L MMBT3904-4-GP
1
R343 (84.T3904.H11)
E
4K7R2J-2-GP
VCC3_3SB_EN_2 38,47
2
B
One Pin Control B
2
(R)
R376
Three Pin Control V_5P0_A
0R3J-0-U-GP
Two Pin Control
1
om
1
2
R387 C344 S0 S3 S5 DS
22KR2F-GP
SCD1U16V2KX-3GP L L L H
1
2
S0 S3 S5 DS
.c
SUS5V_ON_N 1 2 68KR2F-GP VCC5SB_EN_2
R388 VCC5SB_EN_2 38,47
L L L H
1
(R)
C341
SCD01U16V2KX-3GP
ia
es
A A
on
<Variant Name>
nd
Hsichih, Taipei
Title
DSW
C ROSA TIGRIS SFF 1
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
Layout Note: place 2200PF near SIO, others near CPU core MOS location
0713 eric modify from Darren Layout Note: place 2200PF near SIO, others near PCH location
SYS_TH ER MD A+ C PU _TH ER MD A+
SLP_S4_SIO SLP_S4_N
R 372 1 2 0R 0402-PAD -2-GP
SLP_S5_N
(R ) (R ) R 377 1 (R ) 2 0R 2J -2-GP
C
1
1
C 285 C 79
C 326 Q18 B SC 100P50V2J N -3GP C 328 Q8 B SC 100P50V2J N -3GP
FAN SC 2200P50V2KX-2GP MMBT3904-4-GP SC 2200P50V2KX-2GP MMBT3904-4-GP PLTR ST_LAN _N
2
(84.T3904.H 11) (84.T3904.H 11) PC IR ST2# R 335 2 1 33R 2J -2-GP
40 C PU _FAN _TAC H _SIO
E
40 C PU _FAN _C TR L_SIO PC IE_R ST#
R 327 2 10R 0402-PAD -2-GP For WLAN
SYS_TH ER MD A- C PU _TH ER MD A- PLTR ST_PC IEX1
40 SYS_FAN _TAC H _SIO Circuit to Support pre-Post Diagnostic For PCIEx1
40 SYS_FAN _C TR L_SIO PLTR ST_LPC _N

R 347 2 1
0R 0402-PAD -2-GP
Jack modify independent PCIE*16
2013/5/17
VC C 12C PU V_3P3_A PLTR ST_SL_X1_N
CLOCK 2013/6/27 Eric
PC IR ST1# R 349 2 1 0R 0402-PAD -2-GP
2013/7/15 Eric
For PCIEx16
20 C K_14M_SIO modify change to 0 ohm short pad
D 20 C K_P_33M_SIO D
Eric modify
19,23 SU SC LK
1
2013/5/7
C 367 1 2 SC 1U 10V2KX-1GP R 540 R 537

8K2R 2F-1-GP 30KR 2F-GP
LPC Q53
2
PW R 2_PR SN _1 1 6 V_5P0_A
14,19,31 L_AD 0
2
14,19,31 L_AD 1 PW R 2_PR SN _2
SB3V 5
14,19,31 L_AD 2 PW R 2_PR SN T PS_ON _N
1
3 4 R 345 2 1 4K7R 2J -2-GP
14,19,31 L_AD 3 VBAT2
R 539 SU S_AC K_EN _N
14,19,31 L_FR AME_N
680R 2F-GP MBT3904D W 1T1G-2-GP R 452 1 2 10KR 2J -3-GP
19 LPC _PME_N (75.03904.07C )
1
V_3P3_A
2
R 334
10KR 2F-2-GP
Divide to 0.55V VC C 3 V_3P3_A SB3V
COM SP_D C D _N VIN _D ET SB3V
2
41 SP_D C D _N SP_D SR _N V5_ALW _MON
41 SP_D SR _N SP_R XD _N
1
41 SP_R XD _N SP_R TS_N
SP_TXD _N R 344
41 SP_R TS_N
2
SP_C TS_N 2KR 2F-3-GP Jack delete R575, R458.
41 SP_TXD _N
104
120
C 324 PCH have pull up
15
22
32
55
60
65
77
21
45
27
41 SP_C TS_N SP_D TR _N U 19 2012/12/13
SC D 01U 16V2KX-3GP
4
41 SP_D TR _N SP_R I_N
VBAT
V5_ALW_MON
VCC
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
V3_DUAL
HV3_DUAL
V3_S5
41 SP_R I_N VC C 3
VC C 3 SIO_SMBD AT1
SMB_D ATA_R ESU ME R 389 1 2 4K7R 2J -2-GP
SUK_14M_SIO
SC LK 19 78
SMBUS C
L_AD 0 7 CLK32
CLOCKI
SDAT_1/GP120
SDAT/GP121
79
SMB_D ATA_MAIN
SMB_C LK_R ESU ME
SIO_SMBC LK1
R 385 1 2 4K7R 2J -2-GP
1
8 80
15,17 SMB_C LK_MAIN L_AD 1 LAD0 SCLK_1/GP122 SMB_C LK_MAIN
L_AD 2 9 81 R 523
15,17 SMB_D ATA_MAIN LAD1 SCLK/GP123
L_AD 3 10 R 520 8K2R 2F-1-GP R SMR ST_SIO_N
19,26,42,43 SMB_D ATA_R ESU ME 11 LAD2 2 1 10KR 2J -3-GP
30KR 2F-GP R 354 (R )
LPC I/F
LPC Interface
Miscellaneous
19,26,42,43 SMB_C LK_R ESU ME L_FR AME_N LAD3
H _PR OC H OT_N SIO_PR OC H OT_R _N PLTR ST*_SIO 12 VR _R EAD Y Q50 MB_R EG_PG
2
1 R 359 2 C K_P_33M_SIO 14 LFRAME# MEM_R EG_PG_2 1 6
19 SMLIC LK_PC H 16 LRESET# 2
0R 0402-PAD -2-GP SER _IR Q MEM_R EG_PG_1 PC IAU X_GATE
19 SMLID ATA_PC H Jack change to 0 short pad 127 PCICLK 87 5 2 1 10KR 2J -3-GP
LPC _PME_N MEM_R EG_PG R 443
2013/05/20 75 SER_IRQ GP105 3 4
IO_SMI_N SIO_H D D _LED V_SM
126 GP041/IO_PME# 89
SLP_M#/GP071/IO_SMI# GP107
1
13 MBT3904D W 1T1G-2-GP
GP117 PC IAU X_GATE
92 (75.03904.07C ) R 529 SMB_C LK_R ESU ME
GP125 93 10KR 2F-2-GP R 425 2 1 4K7R 2J -2-GP
H _PEC I PEC I_SIO_R SMLIC LK_PC H SIO_SMBC LK1 SU S_AC K_EN _N
R 378 1 2 43R 2J -GP R 380 0R 2J -2-GP 1 2 (R ) 70 GP126 94
OTHERS SMLID ATA_PC H
SMLID ATA_PC H R 398 0R 2J -2-GP 1 2 (R )
SIO_SMBD AT1
SIO_SMBD AT2 72 GP036/SMB_CLK1 SUS_ACK_EN#/GP127 95
SMB_D ATA_R ESU ME
R 413 2 1 4K7R 2J -2-GP
SMB
2
PLTR ST_N PLTR ST*_SIO SMLIC LK_PC H 1
R 401 0R 0402-PAD -2-GP 2 SIO_SMBC LK2 25 GP040/SMB_DAT1 BACKFEED_CUT#/GP116 FP_C BL_D ET
R 419 2 1 33R 2J -2-GP 1
R 397 0R 0402-PAD -2-GP 2 26 SMBDAT2/GP010 R 352 1 2 10KR 2J -3-GP
10,51 H _PR OC H OT_N SP_D C D _N
2013/6/26 Eric SMBCLK2/GP011 96 (R )
21 KBR ST_N change to 0 ohm short pad DCD1#/GP043 SP_D SR _N PC _SPKR _D ET
97 R 351 1 2 10KR 2J -3-GP
21 A20GATE SIO_PEC I_R EQ_N SP_R XD _N
20 DSR1#/GP044 98 SP_R TS_N (R )
21,31 SER _IR Q H_CPURST#/GP005/PECI_REQUEST# RXD1/GP045
29 99
Serial Port 1
Jack delete R460,R465
V_1P05_PC H PEC I_SIO_R PECI_VREF RTS1#/GP046 SP_TXD _SIO 2012/03/25
1
C 410 PEC I_R EAD Y 30 100 SP_C TS_N
SC D 1U 16V2KX-3GP R 375 1 2 31 PECI/LVSMB_CLK1 5V_PRSNT/GP047/TXD1 101
V_1P05_PC H SP_D TR _N SP_TXD _N
PECI
19 SIO_SPKR PECI_READY/LVSMB_DAT1 CTS1#/GP050 102 1 2 160R 2F-GP
10KR 2J -3-GP SP_R I_N R 474
DTR1#/GP051
2
103 VC C 3 VC C 3
PC IR ST1# 51 RI1#/GP052
SIO_PEC I_R EQ_N PC IR ST2# 52 PCI_RST_1#/GP026 V_1P05_PC H
PS_ON _N
53 PCI_RST_2#/GP027
GPIO PW R OK3_1 PS_ON#/GP030
1
(84.T3904.H 11) RPW
SMRR OK3
ST_SIO_N R 356 1 2 33R 2J -2-GP R SMR ST_SIO_N _1 57 106
19 IO_SMI_N Q35 PWR_GOOD_3V/GP033 GP054
1
PEC I_R EQ_N MMBT3904-4-GP 0R 0402-PAD 1 R 355 2 58 PW R 2_PR SN T R 492
1 R 412 2 C E 67 RSMRST# 108
Glue Logic
C R 485 30KR 2F-GP C
22,45 FP_C BL_D ET LATCHED_BF_CUT/GP035 PWR2_PRSNT/GP056 MB_R EG_PG
0R 0402-PAD -2-GP PSPW R GD 123 109 8K2R 2F-1-GP
Diagnostic
22,36 PC _SPKR _D ET PWRGD_PS MB_REG_PG/GP057
Jack change to 0 short pad MEM_R EG_PG Q45 MB_R EG_PG
2
2013/05/20 111 MB_R EG_PG_1
1 6
MEM_REG_PG/GP061
2
B
H _C PU R ST_SIO_N _1 SLP_S3_N 2 SP_TXD _N _1

R 448 SLP_S4_SIO 121 SP_TXD _N 5
69 SLP_S3# 3 4
2 1 SLP_S4# VC C
1
V_1P05_PC H
PC H _SIO_D PW R OK
122 113 KC LK
28 SLP_S5#/GP066 KCLK 114 R 481 MBT3904D W 1T1G-2-GP
KD AT
22KR 2F-GP DPWROK/GP013 KDAT 115 MC LK 7K15R 2F-L-GP (75.03904.07C )
SU S_W AR N B_R
68 MCLK 116
Deep Sleep Logic

PLTR ST_N H _C PU R ST_SIO_N SLP_SU SB MD
KBRAT
ST_N
R 444 1 2 0R 0402-PAD -2-GP 71 SUS_WARN#/GP004 MDAT 118
SU S3V_ON _N
2
74 SLP_SUS# GP063/KBDRST# 119 A20GATE
SU S3V_FON _N
56 SUS3V_ON#/GP076 GP064/A20M
Keyboard/
2013/05/20 SU S5V_ON _N SUS3V_FON#/GP032
73
Mouse
Power Manager SUS5V_ON#/GP075 C PU _FAN _TAC H _SIO
37 SYS_FAN _TAC H _SIO
TACH1/GP017 38
14,19,39,45 PW R BTN _N TACH2/GP020 SIO_TAC H 3
39 5VD U AL_U SB_R
19 PC H _SIO_D PW R OK TACH3/GP021
Miscellaneous
VC C 3 VC C 3 R N 10
14,19,46,48,50,51 SLP_S3_N C PU _FAN _C TR L_SIO
47 SYS_FAN _C TR L_SIO MD AT 1 8
14,19,48,49 SLP_S4_N GP022/PWM1 48 MC LK 2 7
19 SLP_S5_N GP023/PWM2 49 V_1P05_ME 3 6
SIO_GR EEN _GP000 SIO_GR EEN KD AT
19,38 R SMR ST_SIO_N THERM_THRESH/GP024/PWM3 2 R 552 1 2 0R 0402-PAD -2-GP KC LK 4 5
GP000/PWM4
1
HWM Interface
VIN _D ET 2013/6/26 Eric
13,19,21 PW R GD _3V 46 change to 0 ohm short pad
SIO_YELLOW R 531 R 525 SR N 10KJ -6-GP
22 PLTR ST_N 23 V_IN 8K2R 2F-1-GP 2KR 2F-3-GP
SIO_GR EEN YELLOW#/GP006 C PU _TH ER MD A+
24 41 VC C 3
26 PLTR ST_SL_X1_N TMIN _SH IFT C PU _TH ER MD A-
PW R BTN _N 33 GREEN#/GP007 REMOTE1+ 42 SYS_TH ER MD A+ Q51 MB_R EG_PG
35,42 PLTR ST_PC IEX1 TMIN_SHIFT/GP014 REMOTE1-
2
34 43 1 6
35,42 PLTR ST_LAN _N FP_C BL_D ET PWRBTN#/GP015 REMOTE2A+/REMOTE2B- SYS_TH ER MD A- MB_R EG_PG_3
PC _SPKR _D ET 50 44 2 MB_R EG_PG_2 SP_R TS_N RN8
54 FP_CBL_DET#/GP025 REMOTE2A-/REMOTE2B+ 5 1 8
45 PSPW R GD SIO_PR OC H OT_R _N MB_R EG_PG SP_R XD _N
76 PC_SPKR_DET/GP031 36 3 4 2 7
TR ST_N VC C 3 SP_D SR _N
1
124 GP042 PROCHOT_IN#/PROCHOT_OUT#/GP016 3 6

38 SU S3V_ON _N R 367 SIO_SPKR SP_D C D _N
TRST#
1
125 MBT3904D W 1T1G-2-GP 4 5
330KR 2F-L-GP SPEAKER/DIAG_EN#/GP070
2
R 538 (75.03904.07C ) R 536
NC#105
NC#107
NC#110
NC#112
38 SU S3V_FON _N 33KR 2F-GP
NC#61
NC#62
NC#63
NC#64
NC#84
NC#85
NC#91
7K15R 2F-L-GP SR N 10KJ -6-GP
HVSS
AVSS
CAP1
NC#5
NC#6
1
R 504
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
38 SU S5V_ON _N V_12P0_A V_5P0_A 1KR 2J -1-GP R 503
2
10KR 2J -3-GP
14,19,51 VR _R EAD Y
1
V_12P0_A Pull Down to enable
19 SU S_W AR N B_R
5
6
61
62
63
64
84
85
91
105
107
110
112
128
1
3
17
35
59
66
82
83
86
88
90
117
40
18
1
Pre-Post Diagnostic RN9

2
2
R 496 1 8
19 SU S_PW R _AC K SP_R I_N
16KR 2F-GP SP_D TR _N 2 7
CAP_1
1
19 SLP_SU SB R 495 SC H 5553-N U -GP SP_C TS_N 3 6

R 494 10KR 2J -3-GP (71.05553.A0E) 4 5
2
20KR 2F-L-GP
45 PS_ON _N V5_ALW _MON
1
1
C 393 SR N 10KJ -6-GP
SC 4D 7U 6D 3V2MX-GP-U
43 PC IE_R ST#
2
14,31 PLTR ST_LPC _N
2
1
Q43 V5_ALW _MON _1

V5_ALW _MON _2 1 6 R 497
2 6K8R 2F-2-GP
PECI 10 H _PEC I V5_ALW _MON 5 V_3P3_A
1
3 4
1
R 493
C 408
1K65R 2F-GP MBT3904D W 1T1G-2-GP PC H _SIO_D PW R OK
SC D 1U 16V2KX-3GP
(75.03904.07C ) R 383 2 (R ) 1 4K7R 2J -2-GP
2
B B
LED SU S_PW R _AC K
R 441 2 (R ) 1 4K7R 2J -2-GP
The divider must give a voltage above 1.37V while V_5P0_A in the system is valid.
If V_5P0_A begins to fall unexpectedly, the V5_ALW_MON voltage must be below 1.11V before V_3P3_A or SB3V become invalid to PCH V_3P3_A
Place 10uF cap on V_3P3_A path PW R BTN _N
45 SIO_YELLOW 2 1 4K7R 2J -2-GP
R 360 (R )
45 SIO_GR EEN
2
C 331 C 407 C 339 C 363 C 330 C 406 C 362 C 409
C 336 C 332 (R )
45 SIO_H D D _LED
SC 10U 16V5KX-GP-U
1
SC D 1U 16V2KX-3GP
1
SC D 1U 16V2KX-3GP SC D 1U 16V2KX-3GP
1
SC D 1U 16V2KX-3GP
1
SC D 1U 16V2KX-3GP
1
SC D 1U 16V2KX-3GP
1
SC D 1U 16V2KX-3GP
1
SC D 1U 16V2KX-3GP
1
SC D 1U 16V2KX-3GP
0803 Eric modify VC C 3

SIO_TAC H 3
R 324 1 2 10KR 2J -3-GP
Place these 0.1uF de-coupling caps on pin 24, 34, 47, 57, 62, 67, 79, 106 and 122
Power Botton/Reset VC C 3
SB3V
14,19,39,45 PW R BTN _N PW R GD _3V
2
PW R OK3 R 337 1 2 0R 0402-PAD -2-GP C 347
Place near pin 29 C 390 PC IR ST1# R 346 2 (R ) 1 10KR 2J -3-GP
SC D 1U 16V2KX-3GP
SB3V SC D 1U 16V2KX-3GP
1
PC IR ST2# R 320 2 (R ) 1 10KR 2J -3-GP
1
R 353
19 TMIN _SH IFT 1KR 2J -1-GP SMB_D ATA_MAIN
1
(R ) R 421 1 2 4K7R 2J -2-GP
om
C
PW R GD _3V_B_1 SMB_C LK_MAIN

2
B Q24 C 318 R 329 R 429 1 2 4K7R 2J -2-GP

19 PEC I_R EQ_N MMBT3904-4-GP SC 100P50V2J N -3GP 20KR 2J -L2-GP
(R )
2
2
E
D
Q26 Jack delete R458,R466

2012/03/25
2N 7002K-2-GP
KBMS (R )
SB5V
41 KC LK
41 KD AT PW R 2_PR SN T
R 532 2 1 30KR 2F-GP
41 MC LK
G
41 MD AT
.c
MB_R EG_PG
R 519 2 1 30KR 2F-GP
R SMR ST_SIO_N R SMR ST*_R
R 333 1 2 1KR 2J -1-GP
1
(R ) MEM_R EG_PG
R 439 R 486 2 1 30KR 2F-GP
4K7R 2J -2-GP
5VD U AL_U SB_R
S0 S3 S5 DS
SP_TXD _N
2
2 1 30KR 2F-GP
S0 S3 S5 DS (R )
H H H L
SU S_AC K_EN _N
R 473
2
R 432 2 1 0R 2J -2-GP
H H H L R 379
SU S_PW R _AC K SU S_PW R _AC K_R 10KR 2J -3-GP
A R 428 1 2 0R 0402-PAD -2-GP A
ia
2013/6/26 Eric
1
SUS_PWR_ACK_5V_DUAL
1
(R ) (R )
C 380 R 434 Q32
SC D 1U 16V2KX-3GP 10KR 2J -3-GP R 404 1 6
S0 S3 S5 DS
SU S_PW R _AC K_BJ T
2
1 2 2 R 410
SU S_PW R _AC K_5V_D U AL_L H H H L
1
0R 0402-PAD -2-GP SU S_PW R _AC K_BJ T_L
5 2 1
3 4
10KR 2J -3-GP
1
MBT3904D W 1T1G-2-GP
2
(75.03904.07C ) C 369
2
SC D 1U 16V2KX-3GP
1
R 400 R 417 (R )
22KR 2J -GP 10KR 2J -3-GP R 403
V_5P0_A 10KR 2J -3-GP
es
1
<Variant N ame>
2
Hsichih, Taipei
Title
SIO_SCH5555(NEW)
Siz e D oc ument N umber R ev
C us tom R OSA TIGR IS SFF
1
D ate: Thurs day , April 03, 2014 Sheet 39 of 52

on
5 4 3 2 1
nd
-i
si
ni
t ek
w.
ww
+12V
SIO FAN CONTROL CPU FAN VCC3
1
39 CPU_FAN_CTRL_SIO
R173
39 CPU_FAN_TACH_SIO 4K7R2J-2-GP
39 SYS_FAN_CTRL_SIO
39 SYS_FAN_TACH_SIO
2
1
CPU_FAN_TACH_1 CPU_FAN_TACH_L CPU_FAN_TACH_SIO
K
R171 2 R169 1 1 R200 2
PWM:21-28KHz 2K2R2J-2-GP D7
1SS355-4-GP +12V FNCPU1
20KR2J-L2-GP 0R0402-PAD-2-GP
NP1
1
(83.00355.F1F)
2
1 R167
A
8K2R2F-1-GP
2
R180 3
CPU_FAN_CTRL_SIO CPU_FAN_CTRL_CONN
2
1 2 4
5
1
(R)
100R2F-L1-GP-U C223 FOX-CON5-S3-GP
SC1U25V5KX-1GP (21.61880.105)
2
SYS FAN +12V +12V +12V
1
VCC3
R511
10KR3J-L1-GP +12V
1
(R)
R522
2
0R3J-0-U-GP
1
R498
2
K 4K7R2J-2-GP
1
(R)
3
R500 D11
SYS_FAN_3P_G SYS_FAN_TACH1_1 1SYS_FAN_TACH1_2 1 R518 2SYS_FAN_TACH_SIO
2
2K2R2J-2-GP 1SS355-4-GP 1 BCP69-GP 2 R499
Q52 20KR2J-L2-GP 0R0402-PAD-2-GP
(84.DCP69.01B)
R478
2
2
C
A
1
FANS1
SYS_FAN_CTRL_SIO 1 2 SYSTEM_FAN_PWM1_1 2 R479 1SYSTEM_FAN_PWM1_2 B NP1
Q47 (84.T3904.H11) R507
10KR2J-3-GP MMBT3904-4-GP 1 8K2R2F-1-GP
100R2F-L1-GP-U
SYS_FAN_FB SYS_FAN_3P_POWER
E
1 R515 2 2
1
C403
2
SC1U16V3KX-2GP 1K5R2F-2-GP 3
SYSTEM_FAN_PWM1_1 4
2
5
1
R514
330R2F-GP FOX-CON5-S3-GP
1
(R) (21.61880.105)
TC5 C335
2
E220U16VM-L8-GP SC1U25V5KX-1GP
2
3/28 Eric J Wu add
Option for 3PIN CTRL
2012/12/10
change H2 from GND to AGND
PCB MOUNTING HOLES
H6 H5 H4 H3 H1 H2
3
2
4 4 4 4 4 4
1 1 1 1 1 1
5 8 5 8 5 8 5 8 5 8 5 8
6
7
GENS315R158-8-F-A-GP GENS315R158-8-F-A-GP GENS315R158-8-F-A-GP GENS315R158-8-F-A-GP GENS315R158-8-F-A-GP GENS315R158-8-F-A-GP
<Variant Name>
AGND
om
Hsichih, Taipei
Title
FAN CIRCUITS/HOLE
.c
Custom ROSA TIGRIS SFF 1
ia
es
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
5VDUAL_USB_R
R1141 1 (R) 2 0R3J-0-U-GP
PS2 KB/MS F3
1 2 KEYBRD_PWR2
39 KDAT
39 KCLK
39 MDAT POLYSW-1D5A8V-3-GP
39 MCLK
KMCOM1
SP_DCD_N SP_RXD_N
1
C46 2 1
C45 (R)
D
SCD1U16V2KX-3GP SC470P50V2KX-3GP SP_TXD_N 4 3 SP_DTR_N D
SP_DSR_N
2
6 5
SP_RTS_N 8 7 SP_CTS_N
SP_RI_N 10 9
12 11
KBDATA_FB KBCLOCK_FB X
KDAT L16 1 2 14 13
MCB1005S121FBP-GP KBDATA_FB 16 15 SERIAL_DETECT
(68.00084.B21) VCC KEYBRD_PWR2 18 17
-12V 20 19 MSCLOCK_FB
KCLK L17 1 2 KBCLOCK_FB 22 21 MSDATA_FB +12V
MCB1005S121FBP-GP 24 23
COM Port (68.00084.B21)

JWT-CONN24D-SFP-GP
(21.62426.212)
39 SP_DCD_N pitch 2.0mm
1
39 SP_DSR_N
C80
39 SP_RXD_N MSDATA_FB
MDAT L14 1 2 SC10U16V5KX-GP-U
39 SP_RTS_N
2
MCB1005S121FBP-GP
39 SP_TXD_N (R)
(68.00084.B21)
39 SP_CTS_N
39 SP_DTR_N MSCLOCK_FB
MCLK L15 1 2
C MCB1005S121FBP-GP C
19 SERIAL_DETECT
ESD Diodes
(68.00084.B21) C55 C56 C53 C54
39 SP_RI_N
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1
KBDATA_FB
MSCLOCK_FB
2
KBCLOCK_FB
MSDATA_FB
1
1
(R) (R) (R) (R)
D4 D5 D2 D3
EZJZ0V800AA-GP-U1 EZJZ0V800AA-GP-U1 EZJZ0V800AA-GP-U1 EZJZ0V800AA-GP-U1
2013/7/1
power team modify NPC3063_SWC
2
1
B VCC (R) (R) U17 B

1
(R) R1140
R395 10KR2F-2-GP Jack H Zhang
D15R2010F-GP NPC3063_COMP5 1
7 COMPARATOR_INVERTING_INPUT SWITCH_COLLECTOR 2 NPC3063_SWE 2012/12/18
NPC3063_#8 IPK_SENSE SWITCH_EMITTER NPC3063_TCAP
2
8 3
NC#8 TIMING _CAPACITOR
2
1
(R)
L26
K
6 4
VCC GND
IND-22UH-72-GP
D9 (R)
SSM14-1-GP
1
(R)
2
1
NCP3063DR2G-GP C340
A
C358 (R) SC2200P50V2KX-2GP -12V
2
SCD1U16V2KX-3GP (R)
Iomax=100mA
2
om
R386
1 2
2013/7/1
1K96R2F-1-GP
1
1
PC89 power team modify
R390 (R) C346 (R) PC1 (R) SC10U16V5KX-GP-U
.c
16K9R2F-GP SCD1U16V2KX-3GP SC10U16V5KX-GP-U (R)
<Variant Name>
2
A A
2
ia
Hsichih, Taipei
Title
KB/MS/Serial Port
B ROSA TIGRIS SFF
1
5 4 3 2 1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
PCIEX1 CONN
V_3P3_PCIVAUX VCC3 +12V SLOT2 +12V VCC3

R458
B1 A1 PCIEX1_PRSNT1_N 1 2
D B2 +12V PRSNT1# A2 D
PCIEX1 22 HSO_C_DP3
B3 +12V
+12V
+12V
+12V
A3
0R0402-PAD-2-GP
22 HSO_C_DN3
B4 A4
SMB_CLK_RESUME B5 GND GND A5
22 HSI_DP3 SMB_DATA_RESUME SMCLK JTAG2
B6 A6
22 HSI_DN3 SMDAT JTAG3 V_3P3_PCIVAUX
B7 A7 VCC3
B8 GND JTAG4 A8 Jack change to 0 short pad
20 CK_PCIE_1PCIEX1_DP B9 +3.3V JTAG5 A9 2013/05/20
R61
20 CK_PCIE_1PCIEX1_DN B10 JTAG1 +3.3V A10 0R0402-PAD-2-GP
WAKE_N 3.3VAUX +3.3V PLTRST_PCIEX1_N PLTRST_PCIEX1
1
B11 A11 1 2 (R) (R)
WAKE# PERST# C113 C114 C123
C125 1 2 SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2
B12 A12
B13 RSVD GND A13 CK_PCIE_1PCIEX1_DP
HSO_C_DP3 B14 GND REFCLK+ A14 CK_PCIE_1PCIEX1_DN
HSO_C_DN3 B15 PETP0 REFCLK- A15
B16 PETN0 GND A16 HSI_DP3
PCIEX1_PRSNT2_DET B17 GND PERP0 A17 HSI_DN3
GND GND
Jack add PCIEX1_PRSNT2_DET
2013/03/20 TYCO-CONN36-4R-1GP
(20.50425.036)
C C
Others35,39 PLTRST_PCIEX1
19,26,39,43 SMB_DATA_RESUME
19,26,35,43 WAKE_N
22 PCIEX1_PRSNT2_DET
Delete mSATA circuit on X01

Jack 2013/03/14
B B
om
.c
<Variant Name>
A A
ia
Hsichih, Taipei
Title
PCIEX1_CONN
B ROSA TIGRIS SFF
1
5 4 3 2 1
on
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
USB2.0
22
22
USB_PCH_DP10
USB_PCH_DN10
Wireless Card(Present support EP/SP)
D PCIEX1 D
22 HSI_DN2
H=8MM
22 HSI_DP2 V_3P3_PCIVAUX_1
22 HSO_C_DN2
22 HSO_C_DP2 MINI1
53
NP1 0R2J-2-GP
1D5V_S0_MINIPCIE 2 1 MINI1_WAKE# R350 1 (R) 2 WAKE_N
20 CK_PCIEX1_WLAN_DP
20 CK_PCIEX1_WLAN_DN 4 3
6 5 0R2J-2-GP
8 7 MINI_CLKREQ#_WLAN_C R340 1 (R) 2 MINI_CLKREQ#_WLAN
10 9
12 11 CK_PCIEX1_WLAN_DN
OTHERS 14 13 CK_PCIEX1_WLAN_DP
16 15
(R)
1 2
19,26,39,42 SMB_DATA_RESUME
R399 10KR2J-3-GP 18 17
WIFI_RF_EN 20 19
19,26,35,42 WAKE_N PCIE_RST# 22 21
24 23 HSI_DN2
39 PCIE_RST# V_3P3_PCIVAUX_1 HSI_DP2
26 25
C
28 27 C
SMB_CLK_RESUME 30 29
19 MINI_CLKREQ#_WLAN SMB_DATA_RESUME 32 31 HSO_C_DN2
19 WIFI_RF_EN HSO_C_DP2
34 33
USB_PCH_DN10 36 35
20 BT_RADIO_CL USB_PCH_DP10 38 37 PCIE_WLAN_DETECT
W1_DETECT_USB 40 39
22 W1_DETECT_USB 42 41
V_3P3_PCIVAUX_1
44 43
22 PCIE_WLAN_DETECT 46 45
48 47
50 49
52 51 BT_RADIO_CL
V_3P3_PCIVAUX_1 H7
NP2
54 STF256R107H219-GP
MINIPCI52P-6-GP (R)
(R)
1101 EricCC change
to 5.2mm
1
B V_3P3_PCIVAUX_1 1D5V_S0_MINIPCIE B
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U10V5KX-2GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C357 C325 C351 C354 C322 C353 C356 C360 C352
(R) (R) (R) (R) (R) (R) (R) (R) (R)
2
2
PIN2 PIN52 PIN24 PIN39 PIN41 PIN6 PIN28 PIN6 PIN48
om
.c
<Variant Name>
A A
ia
Jack Delete one 0 Ohm resistor
Hsichih, Taipei
2013/01/14 Title
TBD
B ROSA TIGRIS SFF
1
5 4 3 2 1
on
nd
-i
si
ni
t ek
w.
ww
8 7 6 5 4 3 2 1
D D
5VDUAL_USB_R 5VDUAL_USB_R 5VDUAL_USB_R 5VDUAL_USB_R
C C
1
1
(R) (R) (R) (R)
C422 C423 C424 C425
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2
2
B B
om
.c
ia
es <Variant Name>
A A
Hsichih, Taipei
on
Title
EMC
nd

A ROSA TIGRIS SFF 1
-i
8 7 6 5 4 3 2 1
si
ni
t ek
w.
ww
39 PS_ON_N ATX CONNECTOR 1 +12VSB 5 +12VBDC
2 COM 6 +12VBDC
3 COM 7 COM V_3P3_A POWER BUTTON
4 P_OK 8 PS_ON
1
21 PCH_SATA_LED_N
R361
10KR2J-3-GP
39 PSPWRGD
2
VCC PWR_BTNJ_C PWRBTN_N
SB5V R357 2 1 33R2J-2-GP
FRONT PANEL HEADER

14,19,39 PWRBTN_N
+12V V_12P0_A
1
39 SIO_HDD_LED
1
ATX2 (R) (R) C329
NP1 R489 R483 SC1U10V2KX-1GP
2 1 10KR2J-3-GP 10KR2J-3-GP
2
2
2
4 3
6 5 V_5P0_A
PS_ON_N 1 R430 2 ATX_ON* 8 7 PSPWRGD LED1 VCC
R463
0R0402-PAD-2-GP
1 2 LED_L 2 1
1
TYCO-CONN8D-S-GP 2011/12/12
1
C378 (21.70131.204) C405 330R3J-L-GP LED-Y-11-GP R316 2011/08/01
SCD1U16V2KX-3GP SCD1U16V2KX-3GP 1KR3J-L1-GP
(63.15234.15L) modify
2
+12V LEDH1
HD_LED_PWR1 PWR_LED_Y
2
V_12P0_A 1 2
SATA_LED_OUT 3 4 PWR_LED_G
PWR_BTNJ_C
1
5 6
HDD LED
(R) (R) CHASSIS_ID_0
C372 C374 C376 7 8
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP CHASSIS_ID_1 9 10
39 SIO_GREEN MTST_ID
2
11 X 12
39 SIO_YELLOW
DVD-CONN12A-FP2GP
(21.62930.206)
Jack change to 2 MOS control
SATA POWER CONNECTOR

2012/12/07 VCC3
1
R338
U16 10KR2J-3-GP
SATA_LED_OUT 3 4
19 MTST_ID PCH_SATA_LED_N
2
2 5
VCC3 +12V
1 6 PCH_SATA_LED_NMOS
21 CHASSIS_ID_0
2012/5/20 change SATAPWR1 symbol
2N7002KDW-1-GP
2013/7/15 Eric VCC3
21 CHASSIS_ID_1
1
VCC3 +12V VCC (R) C414 change to short pad
1
C412 C415 SCD1U16V2KX-3GP
SCD1U16V2KX-3GP SC10U16V5KX-GP-U R323 R325 PWRSW1 Change to SIO side
22,39 FP_CBL_DET
2
0R0402-PAD-2-GP 10KR2J-3-GP 20121224
(R) PWR_BTNJ_C 5 6
PWR_LED_G 3 4 FP_CBL_DET
2
1 2 PWR_LED_Y
STPWR1 Q23 (R)
SIO_HDD_LED
X
NP1 G (R)
1 6 R322
DVD-CONN6D-SFP-GP
D SATA_LED_OUT_OD
1 2 SATA_LED_OUT
(21.62756.203)
2 5 VCC
3 4 S 0R2J-2-GP
NP2
2N7002K-2-GP
KOR-CONN6E-S-GP
1
1
(20.82108.006) C392 C397
SC10U10V5KX-2GP SCD1U16V2KX-3GP
2
SB5V
Eric modify
1
2013/5/10
R373
360R3-GP
2
PWR_LED_G_1
om
1
SB3V
R630
Green LED Amber LED 0R3J-0-U-GP

1
PWR_LED_G
2
R381
4K7R2J-2-GP
.c
U28
1 6
2
SIO_YELLOW 2 5 SIO_GREEN
3 4
SB5V
ia
2N7002KDW-1-GP
1
2
R393
R382
S0 White SB3V
R366
0R2J-2-GP 0R2J-2-GP 360R3-GP
(R) (R) PWR_LED_Y_1
2
S3 Amber
es
1
1
1
WHITE/GREEN(PWR_LED)
S4 LED off R365
4K7R2J-2-GP
R631
0R3J-0-U-GP
No Post Amber PWR_LED_Y
2
SIO_GREEN
Failure Amber
on
to Post (blinking)
<Variant Name>
ORANGE/YELLOW(SUS_LED)
LED_YELLOW LED_GREEN 21F, 88, Hsin Tai Wu Rd
nd
Hsichih, Taipei
ORANGE(SUS_LED) L H Title
PWR/FNT PNL
WHITE(PWR_LED) H L Size Document Number Rev
C ROSA TIGRIS SFF 1
-i
si
ni
t ek
w.
ww
5 4 3 2 1
P-MOS
19 1_WATT_CTRL_1 V_3P3_PCIVAUX DUAL SB3V Q12
AO3401AL-GP V_3P3_PCIVAUX
place these placement near MINI1
2013/01/14
P-MOS
V_3P3_PCIVAUX
S D SB3V (R) Q34
AO3401AL-GP V_3P3_PCIVAUX_1
1
V_3P3_EPW
SCD1U16V2KX-3GP
SC2D2U10V3KX-1GP
14,19,39,48,50,51 SLP_S3_N C90 C88 C87 C86
S D
SCD1U16V2KX-3GP
SC2D2U10V3KX-1GP
(R) (R) (R) R55
G
Jack delete C119
1
2012/01/23
SC2D2U10V3KX-1GP
10KR2J-3-GP C375 C366
SC2D2U10V3KX-1GP
(R) (R)
19 LANPWR_EN
G
2
2
V_3P3_EPW
48,50 +12V_PG
VREG_PCIAUX_PCH_1
2013/05/20
SB3V SB3V
R249 1 2 0R0603-PAD-2-GP-U
VCC3
1
VREG_PCIAUX_PCH_1
1
D R51 V_3P3_PCIVAUX SB3V D
10KR2J-3-GP C91
SC1U10V2KX-1GP
2
R50 R56 1 (R) 2 0R3J-0-U-GP
VREG_PCIAUX_PCH
2
1 2
SB3V V_3P3_PCIVAUX_1 Stuff w/o AMT
39K2R2F-L-GP
Jack change to 39.2K Jack delete C108 1

(R)
2 0R3J-0-U-GP
None stuff w/ AMT
R420
X01 2013/4/12 2012/01/23
Q10
1_WATT_CTRL_1
G
D
S0 S3 S5 DS
S
H H L L
2N7002K-2-GP
V_3P3_LAN
BOM NOTE: Q18 PMOS can

change to 84.02130.031 SB3V
1
R66
Q14
SB3V (R)
SB3V AO3401AL-GP V_3P3_LAN 0R3J-0-U-GP
2
S D
1
SB3V
Jack change X01
1
R60 C103 C97
2013/3/13
SCD1U16V2KX-3GP
SC2D2U10V3KX-1GP
10KR2J-3-GP C96 (R)
SC1U10V2KX-1GP
2
C (R) R62 C
SLP_LAN_G3 SLP_LAN_G2
2
R1138 1 2
10KR2J-3-GP
39K2R2F-L-GP
2
Q13 LAN_DISABLE_N_2
R59 1 6
LANPWR_EN 1 2 SLP_LAN_B1 2
5
10KR2J-3-GP SLP_LAN_G3
3 4
1
(R) C13
S0 S3 S5 DS SC1U10V2KX-1GP
(R) MBT3904DW1T1G-2-GP
L L L L
2
(75.03904.07C)
2012/05/8 modify
R1139
1 2
10KR2J-3-GP
S0 S3 S4 S5
2012/11/22 Eric J Wu L H H H
+12V
modify 12V_dual power sequence
U18
8 D S 1
7 D S 2
6 D S 3
5 D 4 12V_DUAL
G
om
AO4435-GP C364
B 1 2 220KR2F-GP 12VBDC_EN_1 1 2 22KR2F-GP 12VBDC_EN 1 2 B
V_12P0_A R416 R414
Jack H Zhang
2012/11/29
1
1
C371 SCD1U16V2KX-3GP
22KR2F-GP (R)
.c
K
2
+12V
S0 S3 S5 DS D10
L H H H SSM24PT-GP
(83.2R004.S8M)
12VBDC_EN_2
S0 S3 S5 DS S0 S3 S5 DS
1
A
H L L L H L L L V_12P0_A
1
(R) R480
C402 100KR2F-L1-GP +12V
SCD1U25V2KX-GP Q36 2013/7/22
R454 SLP_S3_N_R_1
2
R445 1 6 R437 Eric modify

12V_DETECT 12V_DETECT_1 12V_DETECT_DELAY
ia
2
1 2 1 2 2
SLP_S3_N_R SLP_S3_N
1
5 1 2
1
0R2J-2-GP 22KR2F-GP 3 4 R450

1
R470 (R) 10KR2J-3-GP 12VBDC_EN_2 Q37 10KR2J-3-GP

1
10KR2F-2-GP C400 C386 MBT3904DW1T1G-2-GP G

SCD1U16V2KX-3GP SC1U16V3KX-2GP (75.03904.07C)
+12V_PG
2
2
Eric change X01 D
2
2013/5/6 es S
2N7002K-2-GP SB3V
V_12P0_A V_12P0_A
SB3V
1
(R)
1
R501
R453 R459
L H H H 10KR2J-3-GP
H L L L
1
200KR2J-L1-GP (R)
100KR2J-1-GP R405 +12V_PG
2
10KR2J-3-GP
2
on
C
+12V_PG_R
2
B Q58 (R)
MMBT3904-4-GP
Q41 E
1 6 12V_DETECT_2
2 (R) Q33
SLP_S3*_AND
1
5 6 1 (R)
SLP_S3*_G SLP_S3_N
3 4 (R) 2 R418 1 2 10KR2J-3-GP
nd
12V_DETECT_DELAY 1 210KR2J-3-GP +12V_PG_1 5

R455 R451 (R) +12V_PG_R
MBT3904DW1T1G-2-GP 10KR2F-2-GP 4 3
1
A (75.03904.07C) A
2
MBT3904DW1T1G-2-GP R411 (R)

100KR2J-1-GP
V_3P3_A
H L L L H L L L
2
V_3P3_A
1
-i
(R) 2013/01/17 Jack H Zhang

R471 U24 (R)
1KR2J-1-GP
merge Q44 and Q75 as Q44
R472 (R) 1 5
12V_DETECT_RC 12V_DETECT_A NC#1 VCC R457
2
1 2 2
3 A 4 12V_DETECT_DELAY_1 1 2 12V_DETECT_DELAY <Variant Name>
GND Y
C
10KR2F-2-GP (R)
12V_DETECT Wistron Incorporated
B Q44 (R)
0R2J-2-GP
1
MMBT3904-4-GP (R) 74LVC1G14GW-GP (R) 21F, 88, Hsin Tai Wu Rd

1
(R) C401 C395

Hsichih, Taipei
E
si
C399 SCD1U16V2KX-3GP SCD1U16V2KX-3GP

2
SC1U10V2KX-1GP Title
2
DUAL POWER
Custom ROSA TIGRIS SFF
1
5 4 3 2 1
ni
t ek
w.
ww
5 4 3 2 1
12V_DUAL VIN12V_SYS
PL12 1 2 MHC2012S221QBP-GP
D PL10 1 2 MHC2012S221QBP-GP D
SYS_5V V_5P0_A
PL11 1 2 MHC2012S221QBP-GP
PL9 1 2 MHC2012S221QBP-GP PR127 1 2 0R0805-PAD-2-GP-U

Vin =12V&Iout=8A, Iripple=3.57A VIN12V_SYS
Vin =12V&Iout=8A, Iripple=3.94A
PR106 1 2 0R0805-PAD-2-GP-U
V_3P3_A SYS_3V 270uF/16V ESR=10m ohm 270uF/16V ESR=10m ohm
Ripple Current =5000mA Ripple Current =5000mA PR105 1 2 0R0805-PAD-2-GP-U
VIN12V_SYS VIN12V_SYS PR107 1 2 0R0805-PAD-2-GP-U
1
PR111 1 2 0R0805-PAD-2-GP-U
PR101 PR129 1 2 0R0805-PAD-2-GP-U
PR112 1 2 0R0805-PAD-2-GP-U 2D2R5J-1-GP
PR128 1 2 0R0805-PAD-2-GP-U
PR110 1 2 0R0805-PAD-2-GP-U
2
PR130 1 2 0R0805-PAD-2-GP-U
1
PR108 1 2 0R0805-PAD-2-GP-U PC83 PC80
PTC16 SC10U16V6KX-2GP SC10U16V6KX-2GP PTC17 PR104 1 2 0R0805-PAD-2-GP-U
PR109 1 2 0R0805-PAD-2-GP-U E270U16VM-12-GP PC71 E270U16VM-12-GP
2
LDO5V SC4D7U6D3V2MX-GP-U PU8
Imax=8A, OCP>14A
8
7
6
5
5
6
7
8
2 1
Iomax=8A Imax=8A, OCP>14A RT8243BZQW-GP PC74
Freq=320KHz
D
D
D
D
PG1 SCD1U25V3KX-GP
D
D
D
D
OCP>14A Freq=375KHz GAP-CLOSE-PWR-2U-GP 8243_LDO5 ENLDO
12
2
2 1 14
SYS_3V PQ17
FDS8884-G-GP LDO5
PQ18
FDS8884-G-GP
SYS_5V
Iomax=8A
(84.08067.037) 4 8243_HG2_R 4 (84.08067.037) OCP>14A
G
DCR=4.8 m ohm+/-8%
G
11 8243_VIN 8243_HG1_R
S
S
S
DCR=4.8 m ohm+/-8%
1 S
2 S
3 S
VIN IDC=15A, Isat=15A
1
PC70 SCD1U25V3KX-GP
8243_BT2_R PR94 2D2R5J-1-GP 8243_BT2 PR95 2D2R5J-1-GP8243_BT1_R PC69 SCD1U25V3KX-GP
IDC=15A, Isat=15A 8243_BT1
3
2
1
1 2 1 2 7 19 2 1 2 1
220uF/6.3V ESR=15m ohm PL5 PR115 PR116 2D2R5J-1-GP BOOT2 BOOT1 PR103 2D2R5J-1-GP PR113 PL6
Ripple Current =3110mA COIL-3D3UH-37-GP 10KR2J-3-GP 1 2 8243_HG2
8 18 8243_HG1
2 1 10KR2J-3-GP COIL-3D3UH-37-GP
220uF/6.3V ESR=15m ohm
(19.40352.021) UGATE2 UGATE1 (19.40352.021) Ripple Current =3110mA
8243_LX2 8243_LX1
2
2 1 9 17 1 2
PHASE2 PHASE1
Power team modify Power team modify
2013/5/13 8243_LG1 2013/5/13
16
8243_LG2 LGATE1
1
10
1 LGATE2
8
7
6
5
5
6
7
8
1
PG9 (R) PC79 PC78 (R)
8243_FB2 8243_FB1
1
D
D
D
D
1
PC76 PTC14 SC1800P50V3KX-GP 5 1 SC1800P50V3KX-GP PG10 PTC13 PC75
D
D
D
D
GAP-CLOSE-PWR-2U-GP
C SC1U16V3KX-5GP SE220U6D3VM-8GP PC72 FB2 FB1 GAP-CLOSE-PWR-2U-GP SE220U6D3VM-8GP SC1U16V3KX-5GP C
8243_BYP
2
2
PQ16 LDO3V SC4D7U6D3V2MX-GP-U 20 PQ19
8243_SN2
8243_SN1
BY P1
2
2
FDS6690AS-G-GP 2 1 FDS6690AS-G-GP
8243_VO2 8243_LDO3
(84.08065.A37) 4 PG2 15 PR99 4 (84.08065.A37)
G
G
LDO3
1
1
GAP-CLOSE-PWR-2U-GP 21K5R2F-GP LDO5V
S
S
S
1 S
2 S
3 S
2 1 13 2 1 PC67 PR114 (R)
8243_SECFB
SECFB
3
2
1
(R) PR117 SYS_3V SC1U10V2KX-1GP 2D2R5J-1-GP
1
2
2D2R5J-1-GP PR85 (R) PR102
1 8243_PG
1
PC60 (R) 10KR2J-3-GP 2 6 10KR2F-2-GP
PGOOD
2
2
SC22P50V2JN-L-GP 2 1 PC66 (R)
2 8243_CS1
2
1
PR91 1 2 SC22P50V2JN-L-GP
8243_COMP2 ENTRIP1
1
PC65 160KR2F-GP (R)
3 8243_TON 8243_COMP1
S CD1U10V2MX-3GP
PR86 (R) PR93
2 8243_CS2 TON
1
1
6K65R2F-GP PR89 1 4 15K4R2F-GP
ENTRIP2
2
PR87 (R) 160KR2F-GP PR84 (R)
GND
2
1
0R2J-2-GP 2013/7/22 power team 0R2J-2-GP
2
change PR89,91 to 160k ohm
PR90
68KR2F-GP
2
21
2
2
1
1
PR88 PR92
10KR2F-2-GP 10KR2F-2-GP
Q57
8243_CS1_1
LDO5V 3 4 LDO5V
2
2
LDO5V_2 LDO5V_5
PR465 1 2 220KR2F-GP 2 5 PR466 1 2 200KR2J-L1-GP
1 6
1
1
PC88 PC87
SCD1U16V2KX-3GP SCD1U16V2KX-3GP
8243_CS2_1 2N7002KDW-1-GP
2
2
Eric modify for inrush current
2013/5/7
V_3P3_A
B V_5P0_A B
(R)
S
G R295
38 VCC3_3SB_EN_2
S
0R5J-5-GP (R) 2013/6/27 Eric

AO3401AL-GP G R477
change to 0402 size
Q20 38 VCC5SB_EN_2 0R2J-2-GP
2
AO3401AL-GP
D
Q42
2
SB3V
D
1
SB5V
R293
1
4K7R2J-2-GP
(R)
R488
(R) 4K7R2J-2-GP
om
2
.c
ia
A A
<Variant Name>
es Wistron Incorporated
Hsichih, Taipei
Title
DC to DC_5V/3D3V(RT8243B)
Custom ROSA TIGRIS SFF
on
1
5 4 3 2 1
nd
-i
si
ni
t ek
w.
ww
5 4 3 2 1
+12V
V_12P0_A
1
R330
1
47KR2J-2-GP
R467
2012/11/22 Eric J Wu 100KR2J-1-GP V_3P3_A
2
modify
2
VCC3
Q55 U27 R331 Q22

R535 1 (R) 2 0R2J-2-GP SLP_S3_N_R1 G 1 6 V_VCC3P3_EN_R 1 2 V_VCC3P3_EN 4 5
14,19,39,46,50,51 SLP_S3_N 10KR2J-3-GP 3
G D
6
D VCTRL_VCC_EN VCTRL_VCC_EN D
1
D 2 5 (R) 2 7
S D
1
R543 1 2 0R0402-PAD-2-GP C319 1 8 (R)
S D
46,50 +12V_PG
1
S 3 4 SCD1U25V3KX-GP C317 R310 C314
S D
2013/7/15 Eric
2
change to short pad C320 AO4468L-GP SC10U10V5KX-2GP 4K7R2J-2-GP SCD1U16V2KX-3GP
2
S0 S3 S5 DS 2N7002K-2-GP SCD1U25V3KX-GP
2
2N7002KDW-1-GP
2
H L L L
AO4468, SO-8, N-MOS
+12V 84.04468.037
Id=9.2A Vds=30V
Rdson=14m ohm
1
R461
33KR2J-3-GP
2
V_5P0_A
VCC
R462 Q39
V_VCC5_EN_R 1 2 V_VCC5_EN 4 5
10KR2J-3-GP 3 6
G D
1
(R) 2 7
S D
1
C385 1 8
S D
1
S D
SCD1U25V3KX-GP C373 RR1 C370
2
C388 AO4468L-GP SC10U10V5KX-2GP 4K7R2J-2-GP SCD1U16V2KX-3GP
2
SCD1U25V3KX-GP
2
C C
V_SM
Jack change on 2012/12/19
for mSATA power
can not use P-MOS 1D5V_S0_MINIPCIE
D
(R)
Q25
R326 DMN3404L-7-GP
V_VCC3P3_EN 1 2 V_1D5V_MSATA_EN G
10KR2J-3-GP
S
1
(R) (R)
C316
SCD1U25V3KX-GP
1
R561
10KR2J-3-GP
(R)
2
Jack change for discharge
2013/03/21
B B
V_12P0_A V_12P0_A
2012/12/11 Jack H Zhang
modify V_5P0_A
Q28
4 5
om
3 6
G D
2 S D 7
1
(R) 1 8
S D
1
5VDUAL_USB_R
S D
C327
R530 SCD1U25V3KX-GP AO4468L-GP
2
100KR2J-1-GP R541
10KR2J-3-GP
.c
2
1
R524
USB_EN2 USB_EN
1
1 2 R370
10KR2J-3-GP 4K7R2J-2-GP C337 C338
(63.33334.1DL) SC10U10V5KX-2GP SCD1U16V2KX-3GP
USB_EN1
2
1
2013/7/5
2
Eric modify C411
1
SCD1U25V3KX-GP
2
R533
ia
100KR2J-1-GP
Delete 5VDUAL_USB_F power use 5VDUAL_USB_R
2013/01/14
2
U26
2013/7/15 Eric 1 6
change to short pad
R502 1 2 0R0402-PAD-2-GP SLP_S4_N_G 2 5
14,19,39,49 SLP_S4_N
1
USB_EN2
es
1
3 4 C48 C49
R527 SC10U10V5KX-2GP SCD1U16V2KX-3GP
2
100KR2J-1-GP
SB5V 2N7002KDW-1-GP
2
1
A (R) place these two cap near USBF2 side A

R516 2013/01/14
on
1KR2J-1-GP
2
<Variant Name>
C
(R)
USB_PWR_CRL1 2USB_PWR_CRL1_B1 Wistron Incorporated
19 USB_PWR_CRL1 R487 1 B Q48 (R)
10KR2J-3-GP MMBT3904-4-GP 21F, 88, Hsin Tai Wu Rd
nd
Hsichih, Taipei
E
(R)
Title
Run PWR/USB PWR
R484 1 2
10KR2J-3-GP Size Document Number Rev
C ROSA TIGRIS SFF 1
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
Vin =12V&Iout=14.5A, Iripple=4.795A

270uF/16V ESR=10m ohm
VIN RIPPLE CURRENT Imax=4.8A
Ripple Current =5080mA 12V_DUAL
MEM_VIN 1 2 HCB2012KF-GP
PL7
PL8 1 2 HCB2012KF-GP
S0 S3 S5 DS (R)
1
PC77 Jack change
2013/04/11 X01
H H L L SC10U16V6KX-2GP PTC15
E270U16VM-12-GP
D D
2
5
6
7
8
D
D
D
D
PQ14
V_5P0_A 1P5V_AUX FDMS7698-GP
PR100 (84.04C10.037)
1R5J-2-GP
MEM_HG_1 Iomax=14.5A
1
Jack add on 2 1 4
G
OCP>21.75A
1
2012/11/30 (R)
S
S
S
SLP_S4_N SLP_S4_N_R
14,19,39,48 SLP_S4_N R422 1 2 10KR2F-2-GP PR122 PR97
3
2
1
R433 (R) 10KR2J-3-GP PU9 10KR2J-3-GP 1.2uH, DCR=1.6mohm, Idc=21A 1P5V_AUX
10KR2J-3-GP PC84 PR118 PC81 1 2
2
C368 SC1U16V3KX-2GP 11 2D2R5J-1-GP SCD1U25V3KX-GP PL4
MEM_PG GND MEM_BOOT 1 MEM_BOOT_1 2
2
SC1U16V3KX-2GP 2 1 1 10 2 1 COIL-1D2UH-35-GP
MEM_CS 2 PGOOD BOOT 9 MEM_HG
(R) High Enable MEM_EN CS UGATE MEM_LX
2
3 8 1 2
MEM_FB 4 EN# PHASE 7 MEM_VCC
MEM_RF MEM_LG (19.40335.011)
5 FB VCC 6
RF LGATE
1
(R)
1
(R) PC64 PC58 PTC11 PTC12
5
6
7
8
V_5P0_A
E820U2D5VM-6-GP
E820U2D5VM-6-GP
RT8237AZQW-GP-U PR98 PC85
D
D
D
D
V_5P0_A 2D2R5J-1-GP SC22P50V2JN-L-GP
SCD1U25V3KX-GP
SC10U6D3V5KX-4GP
(74.08828.073) PR119
1
2D2R5J-1-GP PQ15
2
PR123 1 2 FDMS0312AS-GP
MEM_SNB MEM_COMP_3
1
100KR2F-L1-GP PR120 (84.04C06.037)
2
1
3
470KR2F-GP 4 PR124
G
U20 11K5R2F-GP
S
S
S
Needs EE confirm
1
2N7002KDW-1-GP PC82 PC73 (R)
SC1U16V3KX-2GP Sequence!!!
3
2
1
R447 SC1500P50V3KX-GP PR125
2
0R2J-2-GP
2
2
10KR2J-3-GP
2
VCC3 ROSC=100K ohm, RF=470K ohm,
R446
IOCP=25.4A PWM Freq=290K Hz MEM_FB
0R0402-PAD-2-GP
DDR_SHDN 820uF/2.5V, ESR=7mohm
1
1 2
R427 VOut=0.7(1+(Rt/Rb))
1KR2J-1-GP Jack change to 0 short pad
CQ54_C
C 2013/05/20 C
1
2
R436
V_SM_1P5_EN 1 2Q54_B B Q40 PR121
MMBT3904-4-GP 10KR2F-2-GP
10KR2J-3-GP (84.T3904.H11) 1P5V_AUX V_SM
2
E
1
R431 C381
1KR2J-1-GP SCD1U16V2KX-3GP
2
(R) PR69 1 2 0R0603-PAD-2-GP-U

2
PR68 1 2 0R0603-PAD-2-GP-U
PR65 1 2 0R0603-PAD-2-GP-U
PR77 1 2 0R0603-PAD-2-GP-U
PR75 1 2 0R0603-PAD-2-GP-U
PR74 1 2 0R0603-PAD-2-GP-U
PR73 1 2 0R0603-PAD-2-GP-U
PR72 1 2 0R0603-PAD-2-GP-U
B B
om
DDR3 MEM_VTT
(0.75V)
.c
V_SM_1 V_SM_VTT
Jack delete PTC14

PR67 1 2 0R0603-PAD 2012/11/30
Iomax=1A
ia
V_SM V_SM PR66 1 2 0R0603-PAD
VCC
1
PC62
SC10U6D3V5KX-4GP
1
2
1
PR70
1KR2F-3-GP PU7
PR96
es
2D2R5J-1-GP
2
2
4 5
5337_VREF 3 VOUT NC#5 6 5337_CTRL
A 2 VREF VCNTL 7 A
1 GND NC#7 8
on
VIN NC#8 9
GND
1
1
PC54 APL5337KAI-TRG-GP PC68

<Variant Name>
SC10U6D3V5KX-4GP PR71 PC52 SC1U16V3KX-2GP
1KR2F-3-GP SCD1U25V3KX-GP
2
2
2

nd
Hsichih, Taipei
Title
DDR POWER
C ROSA TIGRIS SFF 1
-i

5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
14,19,39,46,48,51 SLP_S3_N

51 H_VTTPWRGD_R
46,48 +12V_PG
Jack change short pad to close pad
2012/12/10
V_SM
V_1P05_PCH_R V_1P05_PCH
Iomax=7A
+12V
SB5V VCC3
1
PC51
SC10U6D3V5KX-4GP PC50 G5 1 2 GAP-CLOSE-PWR-3-GP
1
D Jack change to 10K SCD1U16V2KX-3GP D
2
2013/04/02 X01
1
VCC3 PR126 PR79 PC55 G4 1 2 GAP-CLOSE-PWR-3-GP
10KR2J-3-GP 10KR2J-3-GP SC1U16V3KX-2GP
5
6
7
8
PQ13
D
D
D
D
FDMS7698-GP G3 1 2 GAP-CLOSE-PWR-3-GP
1P05_PCH_EN_Q48_R
2
PU6 (84.04C10.037)
1P05_PCH_EN
1
(R) 1 6 PR78
R534 EN VCC 100R5J-4-GP G2 1 2 GAP-CLOSE-PWR-3-GP
1KR2J-1-GP PU18_DRI PQ36_G
(R) 2 5 2 1 4
G
GND DRV
1
PC56
S
S
S
PU18_SS
Q54 SCD1U16V2KX-3GP 3 4 G1 1 2 GAP-CLOSE-PWR-3-GP
FB SS
3
2
1
1
1 6 PC53
SLP_S3_N 1P05_PCH_EN_Q48 TDC :6.2A(Imax)
1
R546 1 (R) 2 10KR2J-3-GP 2 APL5611ACI-TRG-GP SCD022U16V2KX-3GP
1
5 PC57 2013/7/22 power team G6 1 2 GAP-CLOSE-PWR-3-GP
+12V_PG
2
R545 1 2 10KR2J-3-GP 3 4 SCD047U16V2KX-1-GP PR83 change Pc53 to 0.022uf
1
10KR2F-2-GP
2
1
(R) (R) MBT3904DW1T1G-2-GP V_1P05_PCH_R
2
R544
1
C416 (75.03904.07C) (R)
1P05_PCH_FB_1
2012/11/22 Eric J Wu 1KR2J-1-GP SCD1U16V2KX-3GP PC61 PR76 2 1 0R0402-PAD-2-GP
2
modify SC1KP50V2KX-1GP 2013/7/15 Eric
PR149_2
2
1
change to short pad
1
PC63 PR80 (R) (R)
PR81 10R2F-L-GP PC49
SC150P50V2KX-GP
PC47 PC46
1
R1
2
R564 PC48 PTC10
7K68R2F-GP
SC4D7U16V5KX-1-GP
Jack change to 10K
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
2013/04/10 X01 PC73_1
0R2J-2-GP SCD1U16V2KX-3GP SE560U2D5VM-4-GP
2
1
PC59
SC680P50V2KX-2DLGP
2
1P5_PCH_EN_R_1 1P05_PCH_FB
2
2013/7/22 power team
Eric modify change Pc59 to 680pf
1
connect 1P05_PCH_EN and 1P5_PCH_EN_R_1
2013/5/17
PR82
R2 24KR2F-GP Vout = 0.8*(1+R1/R2)=1.056V
2
C C
Jack change on
2012/11/28
V_1P5
V_1P5_PCH V_1P05_PCH SB3V
VCC3 VCC
V_1P5_DAC_FB_R
1
(R) (R)
(R)
R74 R513 R75
10KR2J-3-GP
10KR2J-3-GP
2K2R2J-2-GP
1
PC21
2
SC1U10V2KX-1GP VCC3
1
PC18
VCC3
2
SC10U6D3V5KX-4GP
B MAX 0.7A 3.3V/100mA V_1P5_DAC_FB B
2
1
1P5_PCH_CTRL
1P05_PCH_EN_R
PR21
V_1P5_PCH
1
PU4 1KR2J-1-GP (R) V_1P5_DAC_FB_R

PR24 L25 1 2 R127 1 2 1R2J-GP
V_1P5_PCH
5 22KR2J-GP MCB1608S301HBP-GP
VIN#5
2
4 6 Q49 (R) (68.00217.351)

VOUT#4 VNTL H_VTTPWRGD_R (R) Q16 (R) Q3904_PIN3
3 7 3 4
1P5_PCH_FB 1P5_PCH_EN 1P5_PCH_EN_R_1 1P5_PCH_EN_R SLP_S3_N_G1 +12V_PG
2
2 VOUT#3 POK 8 PR23 1 2 1KR2J-1-GP R76 1 2 3 4 5 R506 1 (R) 2 0R2J-2-GP

FB EN Q3904_PIN2
1
1 9 0R2J-2-GP 2 (R) (R)

GND VIN#9 VCC3 Q46_PIN6
1
1
PC22 2 5 1 6 SLP_S3_N C186 C190 C192 Place near
PR18 SC100P50V2JN-3DLGP (R) R517 1 (R) 2 10KR2J-3-GP SC10U10V5KX-2GP SC4D7U6D3V3KX-GP SCD01U16V2KX-3GP PCH ball AF2
1
PC19 PC20 8K87R2F-2-GP (R) UP0101QSW8-GP PC17 PC86 PC24 1 6 MBT3904DW1T1G-2-GP

2
2
SC10U6D3V5KX-4GP SC10U6D3V5KX-4GP (74.05930.B3D) SC10U10V3MX-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2
Jack delete R12 change R704 to 10K

2
2N7002KDW-1-GP 2012/12/13
Jack change C322 and C15
Jack reserve PC86 for debug 2012/12/11
2013/05/20
1
PR19
10KR2F-2-GP
2
om
.c
A A
ia
<Variant Name>
21F, 88, Hs in T ai W u Rd
Hs ic hih, T aipei
Title
SYSTEM POWER
D ROSA TIGRIS SFF
5 4 3
es 2
Date:
1
1
on
nd
-i
si
ni
t ek
w.
ww
8 7 6 5 4 3 2 1
VCC_CORE
Vin =12V&Iout=90A, Iripple=14.8A
SharkBay VR12.5 POWER CKT - 3 PHASE
270uF/16V ESR=10m ohm
Ripple Current =5080mA Jack change X01 VR_READY
2013/3/13
OS-CON
VCC12CPU
3
PC5
SC1U16V3KX-5GP ATX1
C
1
1
TYCO-CONN4B-2GP Q37_6 Q56_B B
2 PTC2 PTC3 PTC1 R553 1 2 10KR2F-2-GP Q56 (84.T3904.H11)
(20.82008.004)
E270U16VM-12-GP E270U16VM-12-GP E270U16VM-12-GP MMBT3904-4-GP
2
D D
E
Q37_6
SB3V R406 1 2 10KR2F-2-GP
Q31
1 6
SLP_S3_N R408 1 2 10KR2F-2-GP Q37_2 2
14,19,39,46,48,50 SLP_S3_N 5 Q37_5 VCC12CPU
H_VTTPWRGD_R R407 2 1 10KR2F-2-GP VCC
3 4
1
MBT3904DW1T1G-2-GP VCC3 VCC3 V_CPU_VCCIO_RIGHT
(75.03904.07C) PR64
2D2R5J-1-GP PR41
1KR2J-1-GP
2
1
1
81102_VCC 81102_RAMP
1
(R) PC45
PR61 R84 SC1U10V2KX-1GP
1
2
PC42 PC32 (R)
2
SC2D2U10V3KX-1GP SCD01U16V2KX-3GP PR58 PR60 PR59
1
PC44 C145 110R2F-GP 54D9R2F-L1-GP 90D9R2F-1-GP PUT CLOSE
2
SCD01U16V2KX-3GP SCD1U16V2KX-3GP TO PWM
2
27
2
2
PU5
4 H_VIDSOUT_VR
VCC
H_VTTPWRGD_R H_VTTPWRGD
VRMP
1 2 0R0402-PAD-2-GP 1 SDIO 6 H_VIDSCK_VR H_VIDSOUT_VR 10
R85
50 H_VTTPWRGD_R ENABLE SCLK 5 H_VIDALERT_N_VR H_VIDSCK_VR 10
ALERT# H_VIDALERT_N_VR 10
VR_READY 7 13
C 14,19,39 VR_READY VR_RDY DRON 12 DRVON 52 C
PR42 ADDR
81102_DIFF 30 PWM1/INT_SEL 15 CSN1 PWM1 52
0R0402-PAD-2-GP PR43 100KR2F-L1-GP
DIFFOUT CSN1 CSP1_R CSN1 52
1
2 1 14 2 (R) 1 (R) SCD1U25V2KX-GP CSP1
81102_COMP_11 81102_COMP_2 CSP1 CSP1 52
1
2 PR48 1 2 PC38 2 PR44 1 1 2 PC36 28 PR45 6K8R2F-2-GP PC35 (R)
COMP CSP1 1 2 1 2 PC34
SC470P50V2KX-3GP (R) SC2200P50V2KX-2GP PC39 SCD1U16V2KX-3GP
2
V_CPU_CORE 47D5R2F-1-GP PR46 3K9R2F-GP SCD1U25V2KX-GP
2 PC37 81102_COMP
2
2 1 1 10 VBOOT
81102_FB SC22P50V2JN-4GP 29 PWM2/VBOOT 19 PR36 100KR2F-L1-GP (R) CSN2 PWM2 52
FB CSN2 CSP2_R CSN2 52
1
1
1KR2F-3-GP 18 2 (R) 1 PC27 CSP2
CSP2 SCD1U25V2KX-GP CSP2 52
(R) PR31 6K8R2F-2-GP
PR55 PR47 CSP2 1 2 1 2 PC30
2
100R2F-L1-GP-U 560KR2F-GP SCD1U25V2KX-GP
11 IMAX
PWM3/IMAX PWM3 52
2
2
PR54 17 PR40 100KR2F-L1-GP (R) CSN3
CSN3 CSP3_R CSN3 52
1
0R0402-PAD-2-GP 4X4 32PIN 16 2 (R) 1 PC29 CSP3
VCC_SENSE 2 1 81102_VSP 32 CSP3 SCD1U25V2KX-GP CSP3 52
QFN PR39 6K8R2F-2-GP
10 VCC_SENSE VSP
1
PC41 CSP3 1 2 1 2 PC33
2
(R) SC1KP50V2KX-1GP PR50 SCD1U25V2KX-GP
VSS_SENSE 2 1 81102_VSN 31 9 ROSC
10 VSS_SENSE VSN PWM4/ROSC PWM_CSN4
2
1K2R2F-1-GP 21
CSN4
1
20
1 2 PC40 CSP4
PR51
100R2F-L1-GP-U
SC4700P50V2KX-1GP
81102_CSSUM
2
23 PR33 PR25 2 1 127KR2F-GP CSP1

2 1 81102_IOUT 26 CSSUM 75KR2F-GP PR38 174KR2F-GP
VCC IOUT 24 81102_CSCCOMP 2 181102_CSCM_1
2 1 PR28 2 1 127KR2F-GP CSP2
CSCOMP
1
PR30 (R)
1
10KR2F-2-GP PR37 2 PR15 1 1 2 PC25 PR27 2 1 127KR2F-GP CSP3
PR34 PC28 22K6R2F-1-GP NTC-220K-5-GP (R) SC470P50V2KX-3GP
30K9R2F-GP SC470P50V2KX-3GP 25 1 2 1 2 PC26
ILIM
2
SC2200P50V2KX-2GP
2
81102_ILIM
PR62
0R0402-PAD-2-GP PR26 2 1 10R2F-L-GP CSN1
FLAG/GND
B H_PROCHOT_N H_PROCHOT_N_R 3 B
10,39 H_PROCHOT_N 2 1
VR_HOT#
PR32 2 1 10R2F-L-GP CSN2
81102_TSENSE 8
TSENSE 22 81102_CSREF
PR29 2 1 10R2F-L-GP CSN3
CSREF
1
PR63 NCP81102MNTXG-SI4-GP
33
1
om
0R0402-PAD-2-GP (74.81102.D73) PC31
SC1KP50V2KX-1GP
2
2
81102_TSENSE_R
PR11
NTC-100K-6-GP
BOTTOM PAD
1
PC43
CONNECT TO
.c
PUT COLSE SCD1U16V2KX-3GP
TO VCORE PR56 GND Through
2
56K2R2F-2-GP 5 VIAs NET : H_SKTOCC_VCORE

MOSFET
CPU mode : NET is H active
2
HOT SPOT
Test mode : NET is L active
ia
Remove Q26 Vboot circuit 11/27
ADDR IMAX VBOOT ROSC
VCC
3PHASE
OPTION
es
1
VCORE
1
PR35 VCORE VBOOT

0R0402-PAD-2-GP PWM PR49 PR52 PR53 PR57
68KR2F-GP IMAX SET 75KR2F-GP SET AT 69K8R2F-GP 20K5R2F-GP
ADDRESS AT 95A 1.7V Work F=
330Khz
2
A A
PWM_CSN4
2
2
on
<Variant Name>
nd
Hsichih, Taipei
Title
CPU_VRD 12-5_1
C ROSA TIGRIS SFF 1
-i

8 7 6 5 4 3 2 1
si
ni
t ek
w.
ww
5 4 3 2 1
84.04927.A37 NTMFS4927 84.04925.031 NTMFS4925

Vgs @ 4.5V, Vgs @ 4.5V,
Id = 13.7A, Id = 15.9A,
Rds(on) = 9.2~13mohm, Rds(on) = 6.4~10mohm,
VIN RIPPLE CURRENT Imax=14.8A VCC12CPU
PWM1_BT_1
1
VCC12CPU PC3 PC4
SC1U16V3KX-5GP SC10U16V6KX-2GP
5
6
7
8
5
6
7
8
2
1
D
D
D
D
D
D
D
D
PC11 PQ3 PQ4
PR4 SCD1U25V3KX-GP (R) (84.04C10.037)
1
2D2R5J-1-GP FDMS7698-GP FDMS7698-GP
2
PWM1_HG_1 PWM1_HG_1
2
PR7 4 4
G
2D2R5J-1-GP PWM1_BT
S
S
S
S
S
S
D D
2
3
2
1
3
2
1
PR12
Iccmax=90A
IccTDC=55A
PWM1_VCC
PU1 1 PR9 10KR2J-3-GP 0.36uH, DCR=0.8 mohm, Idc=41A

4 8 PWM1_HG 1 2
51 PWM1 PL2 OCP>135A
BST
VCC DRVH
2
1R5J-2-GP
7 PWM1_LX 1 2
2 SW V_CPU_CORE
GND
GND
DRVON 2 1PWM1_EN 3 PWM 5

EN DRVL COIL-D36UH-11-GP
1
PR1 (R)
6
5
6
7
8
5
6
7
8
1
51R2J-2-GP PR14 PTC4 PTC7
D
D
D
D
D
D
D
D
NCP81161MNTBG-GP PQ11 PQ8 2D2R5J-1-GP PG4 PG6 E560U6D3VM-3-GP E560U6D3VM-3-GP
2
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
FDMS0312AS-GP FDMS0312AS-GP
1
(84.04C06.037) (84.04C06.037)
PWM1_SNB
2
BOTTOM PAD 4 4
G
1
PC10
S
S
S
S
S
S
CONNECT TO
1
SC1U16V3KX-2GP GND Through 560uF/6.3V, ESR=8mohm
3
2
1
3
2
1
4 VIAs PC14
2
SC1500P50V3KX-GP
2
PWM1_LG
51 CSP1
51 CSN1
84.04927.A37 NTMFS4927 84.04925.031 NTMFS4925

Vgs @ 4.5V, Vgs @ 4.5V,
Id = 13.7A, Id = 15.9A,
Rds(on) = 9.2~13mohm, Rds(on) = 6.4~10mohm,
VCC12CPU
PWM3_BT_1
1
VCC12CPU PC2 PC8
1
5
6
7
8
5
6
7
8
C C
om
2
2
D
D
D
D
D
D
D
D
1
PC13 PQ6 PQ7

PR10 SCD1U25V3KX-GP (84.04C10.037) (R)
1
2D2R5J-1-GP FDMS7698-GP FDMS7698-GP

2
PWM3_HG_1 PWM3_HG_1
2
PR3 4 4
G
2D2R5J-1-GP PWM3_BT
S
S
S
S
S
S
.c
2
3
2
1
3
2
1
1
PR13
PWM3_VCC
PU2
PWM3_HG
PPR1 10KR2J-3-GP 0.36uH, DCR=0.8 mohm, Idc=41A
4 8 1 2
51 PWM3 PL3
BST
VCC DRVH
ia
2
1R5J-2-GP
7 PWM3_LX 1 2
2 SW V_CPU_CORE
GND
GND
DRVON 2 1PWM3_EN 3 PWM 5

EN DRVL COIL-D36UH-11-GP
2
PR5
es
6
5
6
7
8
1
51R2J-2-GP PR16 (R)
D
D
D
D
5
6
7
8
NCP81161MNTBG-GP PQ9 2D2R5J-1-GP PG7 PG8 PTC9 PTC5

D
D
D
D
PQ12 E560U6D3VM-3-GP E560U6D3VM-3-GP
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
2
FDMS0312AS-GP
1
BOTTOM PAD (84.04C06.037) FDMS0312AS-GP

PWM3_SNB
2
2
1
PC12 CONNECT TO 4 (84.04C06.037)

G
on
SC1U16V3KX-2GP 4
S
S
S
GND Through
G
1
S
S
S
4 VIAs
2
3
2
1
PC15 560uF/6.3V, ESR=8mohm

3
2
1
SC1500P50V3KX-GP
2
PWM3_LG
nd
51 CSP3
51 CSN3
-i
si
84.04927.A37 NTMFS4927 84.04925.031 NTMFS4925

Vgs @ 4.5V, Vgs @ 4.5V,
Id = 13.7A, Id = 15.9A,
ni
B
Rds(on) = 9.2~13mohm, Rds(on) = 6.4~10mohm, B
VCC12CPU
ek
PWM2_BT_1
1
VCC12CPU PC6 PC7

t
5
6
7
8
5
6
7
8
1
2
D
D
D
D
D
D
D
D
PC23 PQ2 PQ1

SCD1U25V3KX-GP (R) (84.04C10.037)
w.
1
PR22 FDMS7698-GP FDMS7698-GP

2
2D2R5J-1-GP
PR17 PWM2_HG_1 4 PWM2_HG_1 4
G
G
2
2D2R5J-1-GP
S
S
S
S
S
S
51 PWM2 PWM2_BT
PWM2_VCC 2
3
2
1
3
2
1
ww
PR8
1
PU3 PR2 10KR2J-3-GP 0.36uH, DCR=0.8 mohm, Idc=41A

4 8 PWM2_HG 1 2
PL1
BST
VCC DRVH
2
1R5J-2-GP
7 PWM2_LX 1 2
2 SW V_CPU_CORE
GND
GND
PR20 1 2 51R2J-2-GP PWM2_EN 3 PWM 5

51 DRVON EN DRVL COIL-D36UH-11-GP
2
1
6
5
6
7
8
5
6
7
8
PR6 PTC6 PTC8

D
D
D
D
D
D
D
D
NCP81161MNTBG-GP PQ10 PQ5 2D2R5J-1-GP PG3 PG5 E560U6D3VM-3-GP E560U6D3VM-3-GP

2
2
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
FDMS0312AS-GP FDMS0312AS-GP
PWM2_SNB
1
(84.04C06.037) (84.04C06.037)
2
BOTTOM PAD 4 4
G
CONNECT TO
S
S
S
S
S
S
GND Through PC9 560uF/6.3V, ESR=8mohm

3
2
1
3
2
1
1
PC16 4 VIAs SC1500P50V3KX-GP

SC1U16V3KX-2GP
2
PWM2_LG
2
51 CSP2
51 CSN2
A A
<Variant Name>
Hsichih, Taipei
Title
CPU_VRD 12-5_2
Custom ROSA TIGRIS SFF 1
5 4 3 2 1

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5 4 3 2 1

Model:TIGRIS_SFF PCB BOARD SIZE 1 BUILD

PAGE TITLE Quantity PAGE TITLE Quantity

18 TBD 48 Run power/USB power

<Variant Nam e>

Date: T hursday, April 03, 2014 Sheet 1 of 52

PCB BOARD SIZE

Chipset PCIE_X16 Gen2 PCI EXPRESS Gen2

DDR3 DIMM 33MHz

100 MHz CLOCK

PCIE Gen2 Interface 5.0Gbps PCIE X1

SATA1-ODD SATA2.0 BUS

FRONT TPM 1.2 LPC BUS

KB/MS/COM Wistron Incorporated

Date: T hursday, April 03, 2014 Sheet 2 of 52

CPU 2X2 POWER CONN

ATX 2X4 POWER CONN

FDMS7698*1 V_SM N-MOSFET V_1P05_PCH

12VBDC P-MOSFET 1 Phase Design

N-MOSFET VCC3 V_1P5_PCH V_1P5_DAC_FB

<Variant Nam e>

Date: T hursday, April 03, 2014 Sheet 3 of 52

RESET / Power Good MAP

ME POWER-GOOD (7) PROCPWRGD

VR12.5 RSMRST# RSMRST#

<Variant Nam e>

Date: T hursday, April 03, 2014 Sheet 4 of 52

CLKOUT_PCI3 Rs SIO NCT5532D

Note: Red Color is Gen2 spec.

Date: T hursday, April 03, 2014 Sheet 5 of 52

PCH Output clock 100MHZ

ALC3220 PCIE X16 Slot

Intel LGA1150 VCC 5V (NA mA)

V_12P0_A V_3P3_EPW 3.3V V_3P3_EPW 0.022A

VCC3 3.3V (>0.5 A f use x 1)

AO4435 AO4468 SB3V

<Variant Nam e>

Size Docum ent Num ber Rev

Date: T hursday, April 03, 2014 Sheet 8 of 52

Size Document Number Rev

CLOCK MINIMIZE STUB BETWEEN THESE AND RESISTORS AT SINAL PAGE

14 HSW_PCUDEBUG_3 AA36 AB6 1

14 HSW_PCUDEBUG_8 V38 R2 R80 1 2 100R2F-L1-GP-U

14,19 FP_RST _PCH_N

Put near CPU side

H_PROCHOT _N 1 2 0R0402-PAD-2-GP H_PROCHOT _R_N

Jack change to 0 short pad

<Variant Nam e>

Date: T hursday, April 03, 2014 Sheet 10 of 52

26 EXP_A_RX_DP[0..15] U21C 3 OF 10 U21D 4 OF 10

Sandy Bridge Socket

<Variant Nam e>

Date: T hursday, April 03, 2014 Sheet 12 of 52

Put R333 near PCH side for V_CPU_VCCIO2PCH

NCTF TEST PIN: AU40,

CPU Power Capacitor Quantity

V_SM 22uf 0805 4+5(R)

(R) (R) (R) (R) (R)

C181 C173 C179 C178 C177 C176 C175 C174 C180

C136 C133 C132 C134

XDP for CPU

XDP for CPU V_CPU_VCCIO_RIGHT VCC3