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USN 21CST304
Dr. Ambedkar Institute of Technology, Bangalore
B. E. Third Semester End Examination
Model Paper - 2
Computer Organization and Architecture
[Time: 3 Hours ] [ Maximum Marks: 100]

Note: 1. Answer ANY FIVE fully Question.

Marks CO RBT
Level
1.a) Describe the basic functional units of a computer with a neat [10Marks] CO1 L1
diagram.
b) Write a program to evaluate the expression Z= (A + B) × (C + [10Marks] CO1 L2
D) using one address, and two address instruction format.
OR
2.a) What is an addressing mode? Explain different addressing [10Marks] CO1 L1
modes.
b) What are conditional code flags? Explain only four [05Marks] CO1 L2
c) Write a program that evaluate A × B + C × D in a single [05Marks] CO1 L2
accumulator processor.
3.a) Explain the hardware registers that are required in a DMA [06Marks] CO2 L2
controller.
b) Discuss Interrupt I/O method for data transfer. [06Marks] CO2 L2
c) Explain with a block diagram, a general 8-bit parallel interface [08Marks] CO2 L3
OR
4.a) Explain a synchronous bus. Also give the timing diagram of an [06Marks] CO2 L2
input transfer on s synchronous bus.
b) Define the following: [06Marks] CO2 L2
a) Burst Mode.
b) Handshaking Mechanism.
c) What is bus arbitration? Explain the centralized arbitration with [06Marks] CO2 L2
a neat diagram.
5.a) Explain direct mapping and set-associative mapping between [10Marks] CO3 L2
cache memory and main memory.
b) What is a virtual memory? With a neat diagram, explain virtual [10Marks] CO3 L1
memory address translation.
OR
6.a) Describe the terms: [10Marks] CO3 L2
a) locality of reference
b) Replacement algorithms.
b) What is a cache? Explain any two mapping functions. [10Marks] CO3 L2

7.a) With neat diagram, explain the floating –point [10Marks] CO4 L2
addition/subtraction unit
b) With a neat diagram, explain the 4-bit carry look-ahead adder. [10Marks] CO4 L2
OR

Dr. Ambedkar Institute of Technology, Bangalore – 560056

(Autonomous Institution Affiliated to Visvesveraya Technological University, Belgaum)
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8.a) Explain single bus organization if the processor with a neat [06Marks] CO4 L2
diagram.
b) Discuss how unconditional branching is taken into account in a [07Marks] CO4 L2
control sequence
c) Discuss the organization of hardwired control unit. [07Marks] CO4 L2

9.a) Describe pipelining. [05Marks] CO5 L1

b) Explain the Characteristics of multi-processor [05Marks] CO5 L1
c) What is arithmetic pipeline and explain it clearly? [05Marks] CO5
d) Describe Instruction pipeline. [05Marks] C05
OR
10. Describe the vector processing. [05Marks] CO5 L1
a)
b) Explain the following: [05Marks] CO5 L2
a) Data hazard
b) Control hazard
c) Structural hazard

Dr. Ambedkar Institute of Technology, Bangalore – 560056

(Autonomous Institution Affiliated to Visvesveraya Technological University, Belgaum)