COMPUTER SCIENCE & ENGINEERING MSI Combinational Logic (part 1)

Experiment 3

MSI COMBINATIONAL LOGIC

Objectives
After completing this experiment, you will be able to:
- Build a 4-bit magnitude comparator using 74LS86
- Design and test Four bit parity generator/checker using 74LS86
- Understand the operation of priority encoder 74LS148 (8-to-3)
- Understand the operation of decoder 74LS139 (1-to-4)
- Understand the operation of decoder/demultiplexer 74LS138 (3-to-8)

Materials Needed
- 2 INPUT-NAND GATE: IC 74LS00.
- Four-Bit Magnitude Comparators: IC 74LS85
- 8-to-3 Priority Encoder: IC 74LS148
- 3-to-8 Decoder/Demultiplexer: IC 74LS138
- 2-to-4 Decoder/Demultiplexer IC 74LS139
For further investigation:
Materials to be determined by students.

Presentation:

On Tuesdays (Group1: P1, Group2: P2, Group3: P3, Group4: P4, Group5: P5)
On Thursdays (Group1: P1, Group2: P2, Group3: P3, Group4: P4, Group5: P5)

Procedures

P1. 4-bit magnitude comparator-IC 74LS85

Build the circuit as follow:
 A and B are connected to data switches.

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2
3 A < B (ALTBI)
4 A = B (AEQBI)
A > B (AGTBI)
10
12 A0
A 13 A1
A2
15
A3 7
A < B (ALTBO) 6
A = B (AEQBO) 5
A >B (AGTBO)
9
11 B0
B1
B 14
1 B2
B3

74LS85

 Experiment to verify the truth table of IC 74LS85.

Comparing Input Cascading Input Output
A3,B3 A2,B2 A1,B1 A0,B0 A > B A<B A=B A>B A<B A=B
A3>B3 X X X X X X
A3<B3 X X X X X X
A3 =B3 A2>B2 X X X X X
A3 =B3 A2<B2 X X X X X
A3 =B3 A2=B2 A1>B1 X X X X
A3 =B3 A2=B2 A1<B1 X X X X
A3 =B3 A2=B2 A1=B1 A0>B0 X X X
A3 =B3 A2=B2 A1=B1 A0<B0 X X X
A3 =B3 A2=B2 A1=B1 A0=B0 1 0 0
A3 =B3 A2=B2 A1=B1 A0=B0 0 1 0
A3 =B3 A2=B2 A1=B1 A0=B0 X X 1
A3 =B3 A2=B2 A1=B1 A0=B0 0 0 0
A3 =B3 A2=B2 A1=B1 A0=B0 1 1 0
Extra problem: design eight-bit magnitude comparator using IC 74LS85

P2. Design Four bit parity generator/checker using 74LS86

Conduct the truth table of the four bit parity generator/checker

A B C D Even Odd Output

Output

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COMPUTER SCIENCE & ENGINEERING MSI Combinational Logic (part 1)

Build the circuit

 A, B, C and D are connected to data switches.
 Experiment to verify the above truth table.

P3. 8-to-3 priority encoder (Interrupt sorter) – IC 74LS148

Conduct the truth table of 74LS148:
SW1 - 8

10 9
11 D0 A0 7
12 D1 A1 6
13 D2 A2
D3 LED_DISPLAY
1
2 D4
3 D5 14
4 D6 GS LED
D7
5 15
SW9 EI EO LED
74LS148

 The outputs are connected to LED display to determine the logic levels.
 Choose the input data D0  D7 by switches in the order from SW0 to SW7.
 Control EI by using switch.
 Observe the results and fulfill the truth table of 74LS148.

 What are the functions of GS and EO ?

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COMPUTER SCIENCE & ENGINEERING MSI Combinational Logic (part 1)

Input Output
EI D0 D1 D2 D3 D4 D5 D6 D7 GS A2 A1 A0 E0
1 X X X X X X X X
0 1 1 1 1 1 1 1 1
0 X X X X X X X 0
0 X X X X X X 0 1
0 X X X X X 0 1 1
0 X X X X 0 1 1 1
0 X X X 0 1 1 1 1
0 X X 0 1 1 1 1 1
0 X 0 1 1 1 1 1 1
0 0 1 1 1 1 1 1 1

Priority encoder:
 Let’s EI equal to 0, how are the outputs A2, A1, A0 in the following cases?

A2 A1 A0
Case 1:
I3 = I2 = I1 = 0
I7 = I6 = I5 = I4 = I0 = 1
Case 2:
I7 = I2 = 0.
I6 = I5 = I4 = I3 = I1= I0 =1
Case 3:
All 8 inputs are equal to 0.
Make comment on results

P4. 2-to-4 Decoder – IC 74LS139

2 4
SW2 3 A Y0 5
SW3 B Y1 6
Y2 7
1 Y3
SW1 G
LED DISPLAY (1,2,3,4)

74LS139

Build the circuit as follows:

 4 outputs (Y0-Y3) are connected to LED display (Led 1-4).
 The data inputs (A, B) and control input (G) are connected to switches.
 Change the states of inputs to fulfill the truth table of IC 74LS139.

Inputs
Contro Data Outputs
l
G B A Y0 Y1 Y2 Y3
0 0 0
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0 0 1
0 1 0
0 1 1
1 X X

P5. 3-to-8 decoder/demultiplexer –IC 74LS138

1 15
SW1 2 A Y0 14
SW2 3 B Y1 13
SW3 C Y2 12
Y3 11
6 Y4 10
SW4 4 G1 Y5 9
SW5 5 G2A Y6 7
SW6 G2B Y7
LED_DISPLAY
74LS138

Build the circuit as follows

 8 outputs are observed by using LEDs.
 The inputs are controlled by switches.
 Fulfill the following table:
INPUT OUTPUT
G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
1 0 0 0 0 0
1 0 0 0 0 1
1 0 0 0 1 0
1 0 0 0 1 1
1 0 0 1 0 0
1 0 0 1 0 1
1 0 0 1 1 0
1 0 0 1 1 1
0 X X X X X
X 1 X X X X
X X 1 X X X

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