Outline

4-,3-,2-,1-,0- Address Machine instructions

Instruction formats

Performance Parameters

Comparisons on Performance parameters

Summary, References
Instruction
⚫ Definition:

⚫ Instruction is a statement by which the operation

of CPU is determined.
⚫ These instructions referred as “Machine instructions or
computer Instructions”

⚫ The collection of different instructions that the CPU

can execute is referred to as the CPU’s instruction set.
⚫What must an
instruction set specify…?
⚫ Which Operation to perform
⚫ Where to find the operand or
operands
⚫ Where to put the result, if there is
result
⚫ Where to find the next instruction
 Instruction Representations
⚫ Each instruction is represented by sequence of bits
⚫ The instruction is divided into two fields
⚫ Opcode field
⚫ Operand field
⚫ This operand field further divided into one to four fields.
⚫ This layout of the instruction is known as the “Instruction Format”
⚫ Simple instruction format

Operand Operand Result Next

Opcode Address1 Address2 Address1 Instruction
 4-,3-,2-,1-,and 0- address instructions
Instruction • Instruction Set categorized into four categories
set categories based on number of operand address in the
instruction.
– 4- Address Instruction
– 3-Address Instruction
– 2-Address Instruction
– 1-Address Instruction
– 0-Address Instruction
General Register Organization
⚫The instruction
Format in this type
Of computer need
Three address fields

Address field is reduced

to two fields if destination
same as source register
Stack Organization
⚫Operation type
instruction do not
need an address
field in the stack
organized computers
THiS IS BEcAUSE
operation is performed
on two items that are on the
top of your stack
How to Evaluate the Arithmetic statement in ZERO,ONE,TWO,THREE
Address

⚫ SYMBOLS-ADD,SUB,MUL,DIV for arithmetic operations

⚫ MOVE –forTransfer type Operation
⚫ LOAD and STORE for transfers to and from Memory and
AC registers
Three Address Instruction
⚫Each address field to Specify either a
Processor Register or Memory Operand
Two Address Instruction
⚫Move Instruction
Moves or transfers
The operands to
and from memory
And processor
Registers
One Address Instruction
⚫USESAC
Accumulator reg
AC < - M[A]
AC <- AC+ M[B]
M[T]< -AC
AC < - M [C]
AC<- AC+ M[D]
AC <- AC * M[T]
M[X]<-AC
T -Temporary Location
Zero Address Instruction
⚫Do not use
Address Field for
Instruction
TOS<-A
TOS < -B
TOS<-A+B
TOS<- C
TOS<-D
TOS<-C+D
TOS<-(C+D)* (A+B)
M[X]< -TOS
For atwo-operand arithmetic instruction, five items need to be specified

Operation to be performed (opcode)

Location of the first operand
Location of the second operand
Place to store the result
Location of next instruction to be executed

Assumptions
24-bit memory address (3 bytes)
4 –address Instruction
⚫ Because of the large instruction word size and number of
memory accesses the 4- address machine and instruction
format is not seen machine design.
⚫ Although the 4-address structure is used internally in
some implementations of
computer control units. This kind of controller
implementations is known as micro
coded Control.
 4- Address Instruction
Instruction 24 Bits / 3 Bytes Bits→ 8(1byte) 24(3bytes) 24(3bytes) 24(3bytes) 24(3bytes)

CPU Op Code ResAddr Op1Addr Op2Addr NextiAddr

set categories
Op1 Memory Required to Encode an Instruction:
4-Address Op2 +
1Byte+ 4 x 3 bytes = 13 Bytes
Memory Required to store an Instruction:
Instruction Resop Example: add M1,M2,M3, nexti
5 x 3 bytes = 15 Bytes

M(1)M(2)+M(3)
Execution ResopOp1+Op2
Calculation of Memory Accesses
To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Op2Addr=1 Op2=1
ResAddr=1 Res=1
NextiAddr=1 Total=3
Total=5
Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute
Total Memory Traffic= 5 + 3 =8
Memory
 3- Address Instruction
 Instruction set categories Memory

 4-Address Instruction 24 Bits / 3 Bytes Bits→ 8(1byte) 24(3bytes) 24(3bytes) 24(3bytes)

 3-Address Instruction CPU Op Code ResAddr Op1Addr Op2Addr

Op1 Memory Required to Encode an Instruction:

1Byte+ 3 x 3 bytes = 10 Bytes
Op2 + Memory Required to store an Instruction:
Resop 4 x 3 bytes = 12 Bytes
Example: add M1,M2,M3
PC 24 M(1)M(2)+M(3)
Execution Calculation of Memory Accesses
To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Op2Addr=1 Op2=1
ResAddr=1 Res=1
Total=4 Total=3

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 4 + 3 = 7
 2- Address Instruction
 Instruction set categories Memory
24 Bits / 3 Bytes Bits→ 8(1byte) 24(3bytes) 24(3bytes)
 4-Address Instruction
 3-Address Instruction CPU Op Code Op1Addr Op2Addr
 2-Address Instrction Memory Required to Encode an Instruction:
Op1
1Byte+ 2 x 3 bytes = 7 Bytes
Op2 + Memory Required to store an Instruction:
3 x 3 bytes = 09 Bytes
Example: add M2,M3
M(2)M(2)+M(3)
PC 24
Execution
Calculation of Memory Accesses
To fetch Instruction itself To Execute an Instruction
Opcode=1 Op1=1
Op1Addr=1 Op2=1
Op2Addr=1 Res=1
Total=3 Total=3

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 3+ 3 =6
 1- Address Instruction
 Instruction set categories Memory
24 Bits / 3 Bytes Bits→ 8(1byte) 24(3bytes)
 4-Address Instruction
 3-Address Instruction CPU Op Code Op1Addr
 2-Address Instruction
Op1 Memory Required to Encode an Instruction:
 1-Address Instruction 1Byte+ 1 x 3 bytes = 4Bytes
Op2 + Memory Required to store an Instruction:
Resop
Acc 2 x 3 bytes = 06 Bytes

PC Example: add M2
24
Execution

Calculation of Memory Accesses

To fetch Instruction itself To Execute an Instruction

Opcode=1 Op1=1
Op1Addr=1 Total=1
Total=2
Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute
Total Memory Traffic= 2+ 1 =3
 0-Address Instruction
 Instruction set categories Memory
24 Bits / 3 Bytes
 4-Address Instruction
 3-Address Instruction
 2-Address Instruction
Op1
 1-Address Instruction CPU

TOS
SOS + Push Op1(TOS  M(3) )
etc.
Op Code Op1Addr
Stack
NextiAd Nexti Program
24 Add (TOS  TOS+SOS )
counter
dr:
Where to find next Where to find operands
instruction and where to put the
result (on the stack)
 0-Address Instruction
Memory
Uses a push stack in CPU
24 Bits / 3 Bytes
» Arithmetic uses stack for both operands and the results

Op1
CPU

TOS
SOS + Push Op1(TOS  M(3) )
etc.
Op Code Op1Addr
Stack
NextiAd Nexti Program
24 Add (TOS  TOS+SOS )
counter
dr:
Where to find next Where to find operands
instruction and where to put the
result (on the stack)
 Comparisons
 Instruction set categories
 4-Address Instruction Instruction Memory Memory M/As to M/As to Memory
Type To Store To Encode fetch an Execute an Traffic
 3-Address Instruction in Bytes in Bytes Instruction Instruction
 2-Address Instruction
4-address 5 x 3 = 15 1+(4 x 3) = 13 5 3 5+3=8
 1-Address Instruction
 0-Address Instruction 3-Address 4 x 3 = 12 1+(3 x 3) = 10 4 3 4+3=7
 Comparisons
2-Address 3 x 3 = 09 1+(2 x 3) = 07 3 3 3+3=6

1-Address 2 x 3 = 06 1+(1 x 3) = 04 2 1 2+1=3

0-Address 1 x 3 = 03 1+(0 x 3) = 01 1 0 1+0=1

 Evaluate a = (b+c)*d - e
 Instruction set categories
3-Address
 4-Address Instruction add a, b, c ab+c 0-Address
 3-Address Instruction mpy a, a, d aa*d push b
 2-Address Instruction sub a, a, e aa-e push c
 1-Address Instruction 2-Address
add
 0-Address Instruction load a, b ab
push d
 Comparisons add a, c aa+c
mpy
 Example mpy a, d aa*d
push e
sub a, e aa-e
1-Address sub
load b Accb pop a

add c AccAcc+c
mpy d AccAcc*d
sub e AccAcc-e
store a aAcc
 Evaluate a = (b+c)*d - e
 Instruction set categories Memory Memory M/As to M/As to Memory
to Store to Fetch Execute Traffic
 4-Address Instruction
encode
 3-Address Instruction 1+(3*3)=10
add a, b, c ab+c 4*3=12 4 3 4+3=7
 2-Address Instruction
mpy a, a, d aa*d 4*3=12 1+(3*3)=10 4 3 4+3=7
 1-Address Instruction
sub a, a, e aa-e 1+(3*3)=10
 0-Address Instruction 4*3=12 4 3 4+3=7
 Comparisons 36 30 12 9 21
 Example
Memory Memory M/As to M/As to Memory
to Store to Fetch Execute Traffic
load a, b ab encode
3*3=9 1+(2*3)=7 3 2 3+3=6
add a, c aa+c
3*3=9 1+(2*3)=7 3 3 3+3=6
mpy a, d aa*d
3*3=9 1+(2*3)=7 3 3 3+3=6
sub a, e aa-e
3*3=9 1+(2*3)=7 3 3 3+3=6
36 28 12 12 24
 Memory Memory M/As to M/As to Memory
to Store to Fetch Execute Traffic
 Instruction set categories encode
load b Accb
 4-Address Instruction 2*3=6 1+(1*3)=4 2 1 2+1=3
add c AccAcc+c
 3-Address Instruction 2*3=6 1+(1*3)=4 2 1 2+1=3
mpy d AccAcc*d
 2-Address Instruction 2*3=6 1+(1*3)=4 2 1 2+1=3
sub e AccAcc-e
 1-Address Instruction 2*3=6 1+(1*3)=4 2 1 2+1=3
store a aAcc
 0-Address Instruction 2*3=6 1+(1*3)=4 2 1 2+1=3
 Comparisons 30 20 10 5 15
 Example push b 1 1 1 0 1
push c 1 1 1 0 1
add 1 1 0 0 0
push d 1 1 1 0 1
mpy 1 1 0 0 0
push e 1 1 1 0 1
sub 1 1 0 0 0
pop a 1 1 1 0 1
8 8 4 0 4
 Summary of 3-,2-,1-, and 0-Addresss instruction programming
 Instruction set categories
 4-Address Instruction
Instruction Memory to Memory to M/As to M/As to Memory
 3-Address Instruction Format Store Encode Fetch Execute Traffic
 2-Address Instruction
 1-Address Instruction 4-Address 45 39 24 9 33
 0-Address Instruction
3-Address 36 30 12 9 21
 Comparisons
 Example 2-Address 36 28 12 12 24

1-Address 30 20 10 5 15

0-Address 8 8 4 0 4
 Instruction set categories
 4-Address Instruction 45
 3-Address Instruction
40
 2-Address Instruction
35
 1-Address Instruction
 0-Address Instruction 30

 Comparisons 25

 Example 20

– Traffic Analysis 15

10

0
4-Address 3-Address 2-Address 1-Address 0-Address
Memory to Store 45 36 36 30 8
Memory to Encode 39 30 28 20 8
M/As to Fetch 24 12 12 10 4
M/As to Execute 9 9 12 5 0
Memory Traffic 33 21 24 15 4
 Instruction set categories
50
 4-Address Instruction
45
 3-Address Instruction
 2-Address Instruction 40

 1-Address Instruction 35

 0-Address Instruction 30

Axis Title
 Comparisons 25

 Example 20

– Traffic Analysis
15

10

0
Memory to Store Memory to Encode M/As to Fetch M/As to Execute Memory Traffic
4-Address 45 39 24 9 33
3-Address 36 30 12 9 21
2-Address 36 28 12 12 24
1-Address 30 20 10 5 15
0-Address 8 8 4 0 4
 Summary
• Instruction Set Category Based on • Assembly language programming
Number of Operands using 3-,2-,1-,0-address
– 4- Address Instruction instructions
– 3-Address Instruction • Memory to store, Memory to
– 2-Address Instruction encode, M/As to fetch, M/As to
– 1-Address Instruction Execute and Total memory Traffic
– 0-Address Instruction for all type of instruction
• Instruction Format programming
– Memory to store, Memory to • Interesting observations and
encode, M/As to fetch, M/As to conclusions from the graphs
Execute and Total memory Traffic
 Homework
• Develop an comparative table for the performance parameters such as memory to
store, memory to encode, M/As to fetch , M/As to execute and total memory
Traffic for 4-,3-,2-,1-,0- address machine instructions.
Consider the following specifications:
– Memory word size is 1 byte, Memory/register Address size is 2byte, Opcode size is 1 byte.
• Write an appropriate assembly language programming using 3-Address, 2-
Address, 1-Address and 0-address machine instructions for the following
expression ( with registers & without registers). Assume that all are integer
operations. X= (A / B + C * D) / (D * E - F + C / A) + G
ii. Compute various performance factors such as memory to store a program, memory to
encode a whole program, Memory access to fetch & execute and memory traffic.
iii. Draw the graphs for the compasison of the above said parameters and tell your
observations from the graphs.
 References
Reference Book
• Vincent .P. Heuring, Harry F. Jordan “ Computer System design and
Architecture” Pearson, 2nd Edition, 2003