13 Marks: -

Describe with a neat block diagram the architecture of 8255 PPI.

Introduction

 The 8255 PPI is a programmable peripheral interface device.

 It is a general purpose programmable parallel I/O device.
 It contains 3 I/O ports which can be programmed in different modes.
 To program the function to all three i/O ports t contains a register called as
control registers. The control register defines the function of each I/O port and
in which mode they sould operate.
 8055 PPI is a general puspose in nature and provides many facilities for
connecting different devices. So it is used frequently in different applications

Features of 8255 PPI

 It is a progammable parallel I/O device.

 It contains 24 programmable I/O pins arranged as 2-8 bit ports and 2-4 bit ports.
 It has 3, 8-bit ports: Port A, Port B and Port C, which are arranged in two group
of 12 pins.
 Fully compatible with Intel microprocessor families.
 TTL compatible.
 Direct bit set/reset capability is available for port C.
 Improved DC driving capability.
 It can operate in 3 Modes:
1. Mode 0 : Simple I/O
2. Mode 1 : Strobed I/O
3. Mode 2 : Strobed bi-directional I/O
It contains the following blocks

1. Data bus buffer

2. Read/Write control logic
3. Group A and Group B control
4. Port A and Port B
5. Port C
8255 PPI Applications

8255 PPI is the most widely used chip for many applications like:

 LED / Relay Interface

 Display Interface
 Stepper Motor Interface
 Lift Controller etc
 Key board Interface
 ADC / DAC Interface
 Traffic Signal Controer

-:15 Marks: -

Explain the operations carried out when 8085 executes the instructions:

i) MOV A, M
In 8085 Instruction set, MOV r, M is an instruction where the 8-bit data
content of the memory location as pointed by HL register pair will be moved
to the register r. Thus this is an instruction to load register r with the 8-bit
value from a specified memory location whose 16-bit address is in HL
register pair.
As r can have any of the seven values, there are seven opcodes for this type
of instruction.

r = A, B, C, D, E, H, or L
ii) XCHG
In 8085 Instruction set, there is one mnemonic XCHG, which stands for
eXCHanGe. This is an instruction to exchange contents of HL register pair
with DE register pair. This instruction uses implied addressing mode. As it
is1-Byte instruction, so It occupies only 1-Byte in the memory. After
execution of this instruction, the content between H and D registers and L
and E registers will get swapped respectively.

iii) DAD B
In 8085 Instruction set, for 16-bit addition, there is one instruction available
that is DAD rp instruction. It is a 1-Byte instruction. With this instruction,
with the content of the HL register pair, the contents of the mentioned
register pair will get added and the result thus produced will be stored
on the HL register pair.

iv) DAA
Let us consider we want to add two decimal numbers 38 and 45. They will
be represented in BCD as 0011 1000 and 0100 0101. The addition results in
0111 1101. But the answer will be incorrect if we want to interpret this result
as a BCD number. The result will be not only incorrect but also illegal as
1101, which we obtained as the last nibble in the answer is not a valid BCD
number. Here, in such situations, we can use DAA to have the BCD sum as
outcome. All that is required to be done is to add the BCD numbers and store
the result in A, and then execute the DAA instruction.
 v) LDA 6000
In 8085 Instruction set, LDA is a mnemonic that stands for LoaD Accumulator with the
contents from memory. In this instructionAccumulatorwill get initialized with 8-bit
content from the 16-bit memory address as indicated in the instruction as a16. This
instruction uses absolute addressing for specifying the data. It occupies 3-Bytes in the
memory. First Byte specifies the opcode, and the successive 2-Bytes provide the 16-bit
address, i.e. 1-Byte each for each memory location.