Scribd Logo
Upload

Welcome to Scribd!

  • 144 views

    D5 Domain and For Thesis and Capstone Project (2482011)

    Uploaded by

    Ujjwal Verma
    This domain covers VLSI design projects using Cadence tools like Virtuoso and NC-Sim for analog and digital design, along with Xilinx for FPGA implementation. The lab has Cadence EDA tools for schematic capture, layout design, simulation, and synthesis. Example projects include analog circuit design using CMOS, home automation, microcontroller projects, digital design using VHDL/Verilog, and implementations of communication algorithms and signal processing on FPGAs. The faculty research interests include analog and mixed-signal design, communication systems, image processing, and MEMS sensors.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content

    You might also like

    D5 Domain and For Thesis and Capstone Project (2482011)

    Uploaded by

    Ujjwal Verma
    144 views2 pages
    This domain covers VLSI design projects using Cadence tools like Virtuoso and NC-Sim for analog and digital design, along with Xilinx for FPGA implementation. The lab has Cadence EDA tools for schematic capture, layout design, simulation, and synthesis. Example projects include analog circuit design using CMOS, home automation, microcontroller projects, digital design using VHDL/Verilog, and implementations of communication algorithms and signal processing on FPGAs. The faculty research interests include analog and mixed-signal design, communication systems, image processing, and MEMS sensors.

    Original Description:

    Original Title

    D5 Domain and for Thesis and Capstone Project(2482011)

    Copyright

    © Attribution Non-Commercial (BY-NC)

    Available Formats

    DOC, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    This domain covers VLSI design projects using Cadence tools like Virtuoso and NC-Sim for analog and digital design, along with Xilinx for FPGA implementation. The lab has Cadence EDA tools for schematic capture, layout design, simulation, and synthesis. Example projects include analog circuit design using CMOS, home automation, microcontroller projects, digital design using VHDL/Verilog, and implementations of communication algorithms and signal processing on FPGAs. The faculty research interests include analog and mixed-signal design, communication systems, image processing, and MEMS sensors.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as doc, pdf, or txt
    144 views2 pages

    D5 Domain and For Thesis and Capstone Project (2482011)

    Uploaded by

    Ujjwal Verma
    This domain covers VLSI design projects using Cadence tools like Virtuoso and NC-Sim for analog and digital design, along with Xilinx for FPGA implementation. The lab has Cadence EDA tools for schematic capture, layout design, simulation, and synthesis. Example projects include analog circuit design using CMOS, home automation, microcontroller projects, digital design using VHDL/Verilog, and implementations of communication algorithms and signal processing on FPGAs. The faculty research interests include analog and mixed-signal design, communication systems, image processing, and MEMS sensors.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as doc, pdf, or txt
    of 2

    Domain D5: VLSI DESIGN SEE

    This domain covers projects in Analog VLSI Design using Cadence Virtuoso Tool , Digital VLSI design using Cadence NC-Sim, Xilinx (Synthesis only), Model-sim (For Simulation only) and its FPGA implementation.

    lab facilities available: Cadence design Systems EDA tools : NC-Sim,


    Virtuoso(Schematic editor and Layout editor Both), RTL Synthesis , Xilinx ISE for synthesis and implementation on FPGA Kit. Capstone projects that can be conducted Design and simulation of analog circuits using cadence virtuoso, analog design based on CMOS etc. Home Automation, Microcontroller based projects,Design using VHDL/VERILOG , implementation of HDLC, AMBA AHB BUS etc. Finger Print Monitoring, MEMS etc. Fuzzy Logic, Optical Fiber Communication using VLSI and FPGA implementation etc. Dissertation Topics and Desired Areas Papers based upon cadence virtuoso, analog and mixed signal design using neural networks, Mixed signal Processing( Memories, OTA, Image Processing) Any paper with communication or image processing algorithms and should have a scope for its Hardware implementation MEMS biomedical Sensors, Bio Sensors Minimize temperature dependence of chromatic dispersion, Techniques for intelligent mirror, action and gesture recognition using sensors, improvement in arm movement in case of Robotics

    Faculty in VLSI Domain:


    Sr N o 1 Name of Faculty Mr Rajeev Patial B Id Area of Interest E mail Id

    1230 1

    Implementation of Communication and Signal processing (algorithms) using EDA Tools Analog Projects using Virtuoso and Mixed Signals using Neural networks , CMOS Mixed signal processing(MEMORIES, OTA, IMAGE Processing)

    Rajeev.kumar@lpu.co .in

    Ms Kanika Saini

    1530 0

    Kanika.15300@lpu.co .in

    Ms Pawandeep kaur

    1228 4

    Pawandeep.12284@l pu.co.in

    Ms Navjot Kaur

    1269 5

    Projects based on Microcontrollers, Home automation projects, Digital system Design using VHDL/Verilog Any VLSI Project Fuzzy Logic and Optical fiber Communication using VLSI and FPGA implementation Embedded based , VLSI based , Memory Based Projects VLSI and MEMS MEMS, BIO-Medical Sensors Analog VLSI design Using Virtuoso Tool(Schematic and Layout Editor)

    Navjot.kaur@lpu.co.in

    5 6

    Mr Anil Chowdary Ms Cherry Bhargav

    1489 2 1203 7

    Anil.14892@lpu.co.in Cherry.bhargava@lpu .co.in

    Ms Ashima Rangbulla Mr Jitender Singh Sengar Mr T Sampath Veerati Raju

    1483 6 1477 9 1550 4 1466 7

    Ashima.14836@lpu.c o.in Jitendra.14779@lpu.c o.in Sampath.15504@lpu. co.in Veerati.14667@lpu.c o.in

    8 9 10

    You might also like