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Analysis and Design of High-Step-Down Converter: Project Current Status
Analysis and Design of High-Step-Down Converter: Project Current Status
ANCY FELIX
OVERVIEW
1 INTRODUCTION
2 MOTIVATION
3 LITERATURE REVIEW
4 BLOCK DIAGRAM
5 CIRCUIT DIAGRAM
6 SIMULATION
7 RESULTS
8 LTspice SIMULATION RESULTS
9 TENTATIVE SPECIFICATION
10 DESIGN
11 COMPONENTS
12 COMPONENTS
13 CONCLUSION
14 REFERENCES
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
INTRODUCTION
MOTIVATION
For high input voltage applications, the voltage stress of a buck converter is large
Operating at extremely low duty cycles leads to poor characteristics.
High peak current
To reduce these problems, a high step-down converter is discussed.
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
LITERATURE REVIEW
LITERATURE REVIEW
LITERATURE REVIEW
High Step-Down Nonisolated DC–DC Converter With Coupled Inductor
by Mahdi Rezvanyvardom and Amin Mirzaei
[IEEE Journal on Power Electronics ]
In a DC-DC buck converter with autotransformer,high voltage stress takes place
A high step down DC-DC converter with
coupled inductors is introduced
Low current stress
Provides current ripple cancelation
Disadvantages:
Losses due to coupled inductors are high
High cost and
Figure 3: Circuit model of non isolated
Total number of elements are high DC-DC converter using coupled inductor
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
OBJECTIVE
METHODOLOGY
BLOCK DIAGRAM
CIRCUIT DIAGRAM
SWITCHING SIGNAL
MODES OF OPERATION
MODE-1
(t0 ≤ t ≤ t1 )
MODE-2
(t1 ≤ t ≤ t2 )
MODE-2
(t1 ≤ t ≤t2 )
MODE-3
(t2 ≤ t3 )
MODE-3
(t2 ≤ t ≤ t3 )
MODE-4
(t3 ≤ t4 )
MODE-1
(t0 ≤ t ≤ t1 )
MODE-2
(t1 ≤ t ≤ t2 )
M2 is OFF.
D2 is ON.
C1 & C2 gets charged.
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
MODE-2
(t1 ≤ t ≤t2 )
MODE-3
(t2 ≤ t ≤ t3 )
MODE-4
(t3 ≤ t ≤ t4 )
M1 is OFF.
D1 is ON.
C1 & C2 gets charged.
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
MODE-4
(t1 ≤ t2 )
SIMULATION
CIRCUIT DIAGRAM
OUTPUT WAVEFORM
LTspice SIMULATION
CIRCUIT DIAGRAM
OUTPUT WAVEFORM
TENTATIVE SPECIFICATION
TENTATIVE SPECIFICATION
DESIGN
Output Voltage V =24V.
Input VoltageVg = 400V.
Power P0 =120W
Conversion Ratio,D2 = VVg = 0.25
The dc conversion ratio of the step down converter can be derived by using the
principle of inductor volt second balance;
(VC 1 + V − Vg ) ∗ D = V ∗ (1 − D) (1)
(VC 1 − V ) ∗ D = V ∗ (1 − D) (2)
Equating 1 and 2,We get
VC 1 = Vg ∗ (1 − D) (3)
Substituting the value of VC 1 in equation 1
(Vg (1 − D) + V − Vg ) ∗ D = V ∗ (1 − D) (4)
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
DESIGN
We get;
Vg D 2 = V (5)
load resistor
Vo 2 242
= = = 5Ω (6)
Po 120
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
DESIGN
DESIGN OF INDUCTORS AND CAPACITORS
Inductor,L1
√ 3 Vg
= ( D − D − D2) ∗ (7)
∆iL1 ∗ fs
√ 3 400
= ( 0.25 − 0.25 − 0.25 2 ) ∗ = 1.4mH ≈ 1.5mH (8)
0.7 ∗ 50 ∗ 103
Inductor,L2
3 Vg
= (D − D 2 ) ∗ (9)
∆iL2 ∗ fs
3 400
= (0.25 − 0.25 2 ) ∗ = 0.5mH (10)
1.5 ∗ 50 ∗ 103
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
Capacitor,C1
Io ∗ D 5.4 ∗ 0.25
= = = 90µF ≈ 100µF (11)
2∆VC 1 ∗ fs 2 ∗ 0.15 ∗ 50 ∗ 103
Capacitor,C2
1 1
= √ = √ = 3.32µF ≈ 33µF (12)
4∗ 3 ∗ fs ∗ r ∗ R1 4 ∗ 3 ∗ 50 ∗ 103 ∗ 0.01
INTRODUCTION MOTIVATION LITERATURE REVIEW BLOCK DIAGRAM CIRCUIT DIAGRAM SIMULATION RESULTS LTspice SIMULATION
OUTPUT WAVEFORM
CONCLUSION
REFERENCES
The End