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Infrared Focal Plane Array Technology
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DEAN A. SCRIBNER, MELVIN R. KRUER,
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Invited Paper
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lnfrareclfiml plane arrays (IRFPA 'si are a criricul coinponcwt iieeded
for adt.ciiicerl infrared imaging s ~ s t e m s . Major udtzriices in infrared
detectors cind inicroelectroriics have led to the development of lurgr oreu
arrays of detectors fabricated usitig intrgruted cirwit techniques.
Requireineiits for IRFPA 's lire di.scussetl and an oi,ert?eil,i.! g i t m ofclf-
ferent IRFPA architectures. Trudirionnll~,IRFPA '.T were rither hybrid or
nionolithic architec.tures, but innot,crtiorisin epirccriul groir~thof thin jilnis
noio alloiv a nuinbcr of useful i.ariarions.
Iinportunr IR detector structures are reifeicwi including phorocniiduc-
(MIS), cind Schorrliy
t i i v , photovoltnic, inc~tal~iiisulator-seinic~~ii~luct~~r
barrier. Infrared detector inaterials and reluted c.ry.stal gro>vth re&
niques are also discussed. I n all cusc.s the enip/icisi.\ is on applic~ubilit~ to
IRFPA clesigns and performance. An iinportont ospecr of h!brid array.,
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is the coupling of the detector t o the reudour circuitn. This is u(ro~?i-
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plisked through an input circuit-three c.xartip1e.c are discussed, iianielx
direct injection, buffued direr/ injection, and gute modulation.
A riirrnber of readout techniques tiut7e been dei,eloped to rtiulripler the
signal and reduce the nurnber of signal leads Iea1irig the array. An oi'cr-
viebt, is given of several readout techniques, includiiig the CCD. MOSFET
switch. CID, and CIM. Also discussed (ire related on-chip .tignu1 pro-
cessirig topics as )vel1 as ynesrions regarding producibilitx crncl crrrux
imipler~ieritatiori.
I . INTRODUCTION
The discovery of infrared radiation occurred in 1800 when Sir
William Herschel essentially repeated Newton's famouh prism
experiment and detected heat in the region just above the visible
spectrum. The Planck radiation formula was derived in 1900 and
quantitatively predicted the amount of energy radiated from a
blackbody as a function of temperature and wavelength. The years
preceding and during World War I1 saw the origins of modem
infrared imaging technology.
During the 1950's and 1960's infrared sensors were built using
single element cooled lead salt detectors primarily for anti-air
missile seekers. At the same time, rapid advances were being
made in narrow bandgap semiconductors that would later prove
useful in extending wavelength capabilities and improving sen-
sitivity. These developments paved the way for the highly suc-
cessful forward-looking infrared (FLIR) airbome systems devel-
oped in the 1970's.
In 1970, the charge-coupled device (CCD) was invented and
was immediately recognized as a means of obtaining a solid state
imaging system that could replace vacuum tube imaging devices
Manuscript received April 5 , 1990; revised October 9, 1990
The authors are with the Naval Research Laboratory. Washington, DC
20375-5000.
IEEE Log Number 9041045.
0018-9219/91/0100-00b6$0l 00
AND JOSEPH M. KILLIANY, MEMBER, IEEE
such as vidicons and plumbicons. Silicon CCD imaging devices
operating in the visible spectrum have been intensively developed
over the past 20 years and advances in VLSI technology have
made feasible 600 x 600 pixel arrays for commercial applica-
tions [I]. Specialized scientific CCD image sensors of 2048 X
2048 are currently being fabricated and even larger arrays being
planned [ 2 ] . Throughout this period parallel efforts in the infrared
community have employed similar techniques to obtain infrared
focal plane arrays (IRFPA's) which are integrated two-dimen-
sional arrays of detectors on the focal plane with multiplexed
readouts,
There are several major differences between visible CCD imag-
ing devices and IRFPA's. First, visible CCD's have been devel-
oped using silicon as both the detector and multiplexer. High sen-
sitivity IRFPA applications, operating in the 3-5 and 8-12 pm
atmospheric transmission bands, require detectors with nominal
bandgaps of 0.25 to 0.1 eV. Therefore, IRFPA's have typically
been fabricated with narrow bandgap semiconductor detectors and
silicon multiplexers. This has resulted in very challenging inter-
connect and materials problems. Secondly, the infrared image of
a typical terrestrial infrared scene has very low contrast (unlike
the visible) and has a very high background pedestal which is
fundamentally limiting in terms of photon noise. As a result of
the small bandgap and the need to obtain the lowest level of elec-
tronic noise possible to approach the photon noise limit, it is nec-
essary to cryogenically cool the IRFPA. Therefore, any IRFPA
device must address additional questions conceming electronic
design of low temperature high performance analog circuits [3].
IRFPA system configurations must also address questions of
mechanical packaging and electrical integrity in dewars with cry-
ogenic cooler interfaces.
There are a number of IRFPA detector configurations possible.
These are compared with some conventional discrete infrared
detector configurations as shown in Fig. 1. Two major advantages
of IRFPA's are immediately obvious. First, they provide an eco-
nomical method for high density packing of detectors. Second,
they allow signal processing to take place on the focal plane. Both
of these advantages permit design tradeoffs of system parameters
such as smaller optical apertures, reduced spectral bandwidths,
and faster frame rates. Furthennore, other advantages are obtained
in terms of eliminating much of the conventional processing cir-
cuitry required in current systems (primarily involving preampli-
fiers and multiplexers attached to discrete detectors) and reducing
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the number of signal leads through the dewar. When the multi-
plexing function is performed within the dewar, the overall sys-
L 1991 IEEE
PROCEEDINGS OF THE IEEE. VOL 79. NO I , JANUARY 1991
-
CONVENTIONAL DISCRETE DETECTOR AND PREAMPLIFIER CONFIGURATIONS
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(a) (b)
F]
IRFPA DETECTOR, MULTIPLEXER, AND PREAMPLIFIER CONFIGURATIONS
...........
'.,..,I
. .... ........
8
Fig. 1. Comparison of conventional discrete detector configu-
rations versus IRFPA's. (a) Single element detector with dedi-
cated preamp performing a sequence of horizontal scans. (b) Mul-
tiple detectors, each with a dedicated preamp performing a parallel
scan. (c) Linear array with CCD multiplexer and preamp perforn-
ing parallel scan. (d) TDI array with multiplexer and preamp per-
forming parallel scan. (Horizontal delay devices not shown.) (e)
Staring detector array. (Horizontal and vertical charge transfer
devices not shown.)
tem design becomes much simpler than one involving discrete
detectors and associated components.
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High density detector configurations lead to higher image res-
olution as well as greater system sensitivity. This will be dis-
cussed in Section I1 which gives an overview of the focal plane
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array concept. The trend toward higher numbers of detectors per
chip is shown in Fig. 2 where the exponential rate of growth for
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t,
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'72 '76 '80 '84 '88 '92
YEAR OF INTROOUCTION
Fig. 2. Trends in staring IRFPA development in terms of the
number of pixels per chip compared to the number of DRAM chips
bits per chip.
several types of arrays (PtSi, InSb, and HgCdTe) is compared
against the evolution of dynamic RAM IC's which have had a
doubling rate of approximately 18 months. IRFPA's have nomi-
nally the same growth rate but lag behind in size by about 5-10
years. Large area PtSi IRFPA's have been fabricated as part of
standard silicon processes and completely operational IRFPA's
have been produced with 5 12 X 5 12 detectors [4] and even larger
anays of 1024 X 1024 are expected by 1991. HgCdTe and InSb
IRFPA's are currently being fabricated at the size of 256 x 256.
Although the development of IRFPA's using IC techniques
began only about 15 years ago, a great deal of progress has been
made, especially in terms of applying new material growth tech-
niques and microelectronic innovations as shown in Fig. 3. The
detector structures, materials and new growth techniques will be
SCRIBNER et al. : IRFPA TECHNOLOGY
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zyxwvutsr DEVELOPMENT AREAS
UATERINS GEGWW IR D m C m R S IRFPA,
c-7.
Fig. 3. Development milestones in IR imaging device technol-
ogy'
discussed in Section 111. The interface between the detector and
readout mechanism and the different types of readout mechanisms
will be discussed in Sections IV and V . Because of the current
advances in microelectronic design rules, increasingly sophisti-
cated signal processing functions can now be incorporated onto
the focal plane and are reviewed in Section
11. THE FOCALPLANEARRAYCONCEPT
The objective of focal plane array technology is to satisfy the
requirement for very large detector arrays by means of the IC
approach. The invention and development of the CCD [SI was
the technological breakthrough that initially made this possible.
By the mid-1970's a number of concepts for IR CCD's had been
explored [6]. It is important to keep in mind that prior to the
CCD, the only altemative for large arrays was to configure each
detector connected to a single wire (and probably an individual
preamplifier) which would all need to be packaged in a small
dewar. For a large number of detectors this would obviously cre-
ate an unmanageable maze of wires and processing electronics
and require an unacceptably large cooler.
A. Specific Advantages of IRFPA 's
As mentioned in Section I, the advent of IRFPA's has brought
about many new possibilities for IR systems with increased sen-
sitivity and spatial resolution. Aside from these immediate ben-
efits, a number of other important advantages are accrued in terms
of simplicity, reliability, and reduced costs. Just as IC technology
has revolutionized many areas of electronics, the fabrication of
detector arrays and multiplexers using IC techniques has the
potential to dramatically reduce IR system complexity and costs.
A few years ago, high quality single element detectors often were
priced over $2000, but now, some current IRFPA production costs
are less than $1 per detector and even greater reductions are
expected in the future. Multiplexing on the focal plane also greatly
reduces the number of signal leads through the dewar. When the
multiplexing function is performed within the dewar, the overall
system design also becomes much simpler: packaging can be
miniaturized and the FPA and dewar treated as separate modules
thus reducing system costs and improving maintainability and
reliability.
B. Overview of Focal Plane Array Architectures
A wide variety of architectures have been used in the devel-
opment of FPA's as shown in Fig. 4. In the past, these approaches
 TRANSPARENT
HYBRID zyxwvutsrqpo PSEUDO- MONOLITHIC

SILICON
n R O W SCANNERS

BUMP oR DETECTOR
COP HOLE TO ARRAY

EAOOUT REGISTER
PARALLEL
SHIFT MONOLITHIC DETECTOR ARRAY
REGISTER

MONOLITHIC

DETECTORSiClRCUlTS
MULTIPLEXER ,-./

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Fig. 4. IRFPA architectures. For hybrid arrays: (a) flip-chip; (b) Z-technology. For pseudo-
monolithic arrays: (c) xy-addressable. For monolithic arrays: (d) All-silicon; (e) heteroepitaxy-on-
silicon; (f) non-silicon-based (e.g., non-silicon CCD),

have generally been described as either hybrid or monolithic. but

these distinctions are often not as important as proponents and
critics state them to be. The central design questions involve per-
formance advantages versus ultimate producibility . Each appli-
cation may favor a different approach depending on the technical
requirements, projected costs, and schedule.
In general each FPA design must consider several major func-
tions: photon detection, charge storage, and multiplexed readout.
Monolithic devices perform all these functions on the same chip
which allows fabrication using silicon-like wafer processing and
ultimately very low cost devices. Hybrid devices typically per-
form the photon detection process in a narrow bandgap semicon-
ductor material (detector array) and then transfer the signal to a
silicon multiplexer (one contact per detector). The hybrid
approach has the distinct advantage of storing charge and per-
forming multiplexing functions in conventional analog silicon
devices.
Hybrid Arrays: The two hybrid architectures that are currently
the most developed are shown in Fig. 4(a) and (b). The so-called
flip-chip shown in Fig. 4(a) involves mating the detector array to
a silicon multiplexer where the front side of the detector array is
aligned with the multiplexer and one contact for each detector is
made using a previously deposited set of indium bumps fabricated
on both the detector array and on the silicon multiplexer [7]-[9],
as shown in Fig. 5(a). The detector array can be illuminated from
either the frontside (with the photons passing through the trans-
parent silicon multiplexer) or backside (with the photons passing
through the transparent detector array substrate). In general, the
latter approach is most advantageous as the multiplexer will typ-
ically have areas of metallizations and other opaque regions which
can reduce the effective optical area of the structure. Also, illu-
HgCdTe METALIZATION
LOOPHOLE :NTERCONNECT zyxw
INDIUM
BUMPS tS*/////$?%&/$?%%%%% MUX
METAL PAD
(a) (b)
Fig. 5. Hybrid IRFPA interconnect techniques between a detec-
tor array and a silicon multiplexer. (a) Indium bump technique.
(b) Loophole technique.
minating from the multiplexer side means the photons must pass
through the three semiconductor surfaces, only two of which can
be properly coated with antireflection (AR) films. When the struc-
ture is illuminated through the backside of the detector array only
one surface needs to be AR coated and this surface does not con-
tain any microelectronic devices or require any special process-
ing. In fact the backside of the detector array can be thinned to a
few microns to improve transient radiation hardness.
The same type of backside illuminated detector array can also
be hybridized in what is known as a Z-plane structure [lo], [ 11)
as shown in Fig. 4(b). The process of stacking integrated circuit
chips one on top of another creates a third dimension of electronic
real estate, and thus the name Z-plane. The detector array is
hybridized to the edges of the stacked IC chips which have one
channel per detector. The large increase in additional real estate
thus allows many FPA signal processing functions to be per-
formed on the focal plane, for example, preamplification, band-
pass filtering, gain and offset correction, analog-to-digital con-

68 PROCEEDINGS OF THF IEEE. VOL 79. NO 1 . JANUARY 1991

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version, as well as some image processing functions. To achieve
very small detector sizes however, the silicon IC chips must be
thinned to very small dimensions. Current technologies for thin-
ning are limited to 50-75 pm thereby limiting the ultimate reso-
lution of the IRFPA. It is interesting to note, that although other
electronics technologies (for example, high density RAM’S) are
also being developed using 3-D packaging approaches, the
infrared Z-plane efforts seem to be the most ambitious 3-D pack-
aging efforts in microelectronics today. In this regard, Z-plane
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technology will certainly be more difficult to develop than other
competing IRFPA technologies. Nevertheless it does hold great
promise for many advanced applications needed in the long term
and interest seems to be growing. In fact, an entire conference
was recently dedicated to materials, devices, technique, and
applications for Z-plane technology [ 121.
In both the flip-chip and Z-plane architectures the conventional
approach to detector/multiplexer interconnects is the indium bump
technique which can be problematic. During the hybridization
process, mechanical damage can occur to the detector due to the
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pressure required to cold weld the indium bumps. After hybrid-
ization, any mismatch in the coefficients of thermal expansion
between the silicon multiplexer and the detector array material
(for example, InSb or HgCdTe) will cause shearing mechanical
strain on the bumps as the array is cooled to cryogenic tempera-
tures. Special designs of the indium bumps along with highly con-
trolled processing and selection of detector substrates that have
thermal expansion properties well matched to the multiplexer will
greatly reduce these problems. It now appears that indium bump
technology may be suitable for fabricating array designs as large
as one-half inch square capable of sustaining several hundred
thermal cycles if the thermal expansion coefficient of the detector
substrate is close in value to that of the readout (silicon). Never-
theless, the unit cell dimensions may be difficult to reduce below
25 pm and the hybridization process is an extra cost in terms of
producibility .
An alternative to indium bump is the loophole or via-hole tech-
nique [13] shown in Fig. 5(b). Fabrication involves highly pol-
ishing the detector chips and silicon readout surfaces to a precise
level of flatness and parallelism ( < 1 pm tolerance) and then
gluing them together thus forming a single chip (or possibly a
full-size wafer) that can be processed in a silicon-like fashion.
The pv diodes are then formed by ion implantation or diffusion
on the detector array (in alignment with the multiplexing elements
in the silicon readout). Loopholes are then drilled by ion milling
through the centers of the detectors, doping the exposed detector
materials in each hole and back-filling with metallizations thus
connecting the detectors to the multiplexer. A final step involves
passivating the processed detector surface. The resulting struc-
tures have been reported to be mechanically and thermally stable
but extensive thermal cycling test results are unavailable. Unit
cell sizes can be made as small as 40 pm. One problem is reduced
fill factor due to the via hole. The loophole technique, although
considered a hybrid architecture, retains some of the advantages
of silicon-like processing but scaling-up to full size wafers for
manufacturing has not yet been optimized. Similarly, reliability
of these devices needs to be more fully evaluated and optimized.
Monolithic Arrays: Several IRFPA architectures are currently
being developed which are either fully or partially monolithic.
Fully monolithic IRFPA’s that are comparable in design to visible
CCD’s have been fabricated with PtSi or extrinsic Si detectors.
Obviously, the silicon-based nature of these detector types makes
it possible to fabricate the array as part of a silicon multiplexer/
substrate configuration. An example of a fully monolithic silicon
SCRIBNER et al. : IRFPA TECHNOLOGY
unit cell design is shown in Fig. 4(d). The disadvantage with this
type of monolithic design is that the detectors must be either sil-
icides or extrinsic-Si which have several limitations as will be
discussed in Section 111.
As an alternative to monolithic silicon devices, some devel-
opmental efforts have focused on fully monolithic arrays using
narrow bandgap semiconductors such as HgCdTe or InSb in a
CCD structure. In this case the photons are detected and trans-
ferred in a series of metal-insulator-semiconductor (MIS) struc-
tures as shown in Fig. 4(f). Used as part of a charge transfer
device (like a CCD), an MIS gate has several fundamental limi-
tations. Although most IR imaging applications tend to require
high charge handling capabilities in the unit cells, an MIS gate
fabricated in a narrow bandgap semiconductor material will have
a limited charge capacity because of its low breakdown potential
as well as more severe problems involving noise and charge trap-
ping when shifting charge through the narrow bandgap CCD to
accomplish the readout function.
Several other pseudomonolithic readout mechanisms have been
devised to avoid the long shift registors inherent in CCD’s. In
particular, two readout mechanisms (the CID and the CIM) have
been designed so that a minimum number of charge transfers are
required in the narrow bandgap semiconductor. These two read-
out mechanisms are discussed in Section V . In both cases, the
current designs are such that a two-dimensional array would need
to be addressed with one contact for each row and each column
as shown in Fig. 4(c). Thus an M x N staring array would need
a minimum of M + N contacts (or wire bonds as shown in Fig.
4(c)). In most of these so-called XY-addressable configurations
all of the charge storage takes place in the narrow bandgap semi-
conductor material whereas part of the multiplexing functions and
all of the preamplification functions take place in ancillary silicon
chips mounted directly adjacent to the detector array on a ceramic
chip carrier.
Another approach to a monolithic IRFPA involves heteroepi-
taxial growth of a narrow bandgap detector material on a silicon
substrate which also contains a multiplexer as shown in Fig. 4(e).
This approach combines the best features of silicon IC technology
with high quantum efficiency narrow bandgap semiconductors in
a fully monolithic design. The heteroepitaxial technologies that
could make this possible are only now reaching marginal levels
of maturity, but progress is being made rapidly. Other possibili-
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ties involve the use of GaAs as a substrate and high speed mul-
tiplexer instead of silicon [ 141.
C. Operational Requirements f o r FPA ‘s
In the design and development of a FPA, an important step is
to determine the operational requirements of the intended appli-
cations. This involves an analysis of the IR radiance levels of the
expected imagery and generic descriptions of anticipated optics
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(aperture and focal length) and cold shielding. Choice of spectral
band is important in achieving good contrast between objects of
interest and background clutter. Sometimes emissivities of the
objects of interest or the expected transmittance of the atmosphere
will dictate a specific spectral band. Background levels may have
large variations in terms of the standard deviation of the radiance
[15] within a given scene (intrascene variation). As the scene
changes over time, for example, due to motion or panning of the
sensor, the apparent mean background radiance may vary dra-
matically (interscene variation). In all cases, the IRFPA must be
capable of supplying continuous imagery of high dynamic range
without saturating or staring. Many applications require detection
69
of point sources or edges while others involve targets with various
levels of detail and scene contrast. This will dictate specific res-
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olution and sensitivity requirements for the sensor which in turn
specify detector sizes and noise levels.
Sensor resolution and sensitivity are also dcpendent on the opti-
cal parameters-usually the aperture is limited by size and weight
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constraints or the practical limitations of cost for fabricating large
IR lenses using special optical materials [ 161. The optical reso-
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lution is determined by the point spread function of the optics.
For the diffraction limited case, the radius of the central Airy disk
-
(containing 84% of the light from a point source) is r = 3.832
( X / a ) (F-number) where X is the wavelength of the light [17].
In practice, the actual b/ur circle is usually considerably greater
than the diffraction limited prediction. Obviously, the detector
size must be at least as small as the blur circle or overall system
resolution will be degraded even more. If the detector sizc is made
smallcr than the blur circle. then some over-sampling and signal
processing advantages can be obtained [ 181, but these advan-
tages, of course, dictate smaller and more densely packed detec-
tors. It is clear from this brief discussion that operational require-
ments for IRFPA’s such as detector size and flux handling
capabilities are strongly dependent on the overall sensor designs
and the specific applications.
D. FPA Development Problems
It is important to note that IRFPA development efforts continue
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to place very demanding requirements on both materials and fab-
rication technology. The IRFPA development issues will be dis-
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cussed in greater detail in the following sections but a brief over-
view of the general problems most encountered in IRFPA
development is shown below in Table 1.
Table 1 Test Issues for Starting IR Arrays
Detectors Input circuits Readouts
quantum efficiency charge storage charge handling
spectral response uniformity transfer efficiency
noise spectrum linearity data rate
uniformity noise spectrum cross talk
injection efficiency
FPA Operability
performance efficiency nonuniformity correctibility reliability
dead pixel count dynamic range hardness
temporal noise intrascene
saturation level - interscene
Saturation: IRFPA’s, for use in high sensitivity systems, gen-
erally strive for collecting the maximum number of photons using
the largest practical optical aperture and longest possible integra-
tion time. Both large-aperture optics and long integration times
will tend to saturate IRFPA charge storage wells when viewing
intense backgrounds. In IRFPA’s the signal camers are stored on
the focal plane and the charge storage capacity becomes critical
1191. In the case of conventional IR systems, saturation is not as
severe a problem because the collected charge is stored off the
focal plane, where space is not at such a high premium.
The saturation problem in IRFPA’s is usually addressed by
instituting various forms of dc suppression or subframe integra-
tion. In dc suppression, extra circuitry is added to the IRFPA to
remove the dc contribution from the ambient background radia-
tion. The extra circuitry in the IRFPA thus increases the dynamic
70
range. but at the expense of further complicating the FPA design.
Subframe integration is achieved by reading out the array several
times faster than the desired frame time and then summing the
individual subframes off the focal plane. Again, the dynamic range
can be increased but with the disadvantages of faster clock rates
and increased system complexity due to the addition of off-focal
plane summing electronics. Somc IRFPA’s avoid saturation by
making the integration time less than the frame time (reduced
duty cycle) causing a loss of sensitivity.
Nonuniformiry: Because all of the detectors and much of the
multiplexing electronics are fabricated collectively on single sub-
strates, no post-processing adjustment of the individual pixels is
possible. Nevertheless, the response across the entire array still
needs to be inherently uniform. With conventional discrete detec-
tor technology, uniformity is not as great a problem because indi-
vidual detectors can be selectively chosen and further matched
for uniformity by adjusting the electronics dedicated to each
channel. The uniformity problem is compounded by the desire to
fabricate increasingly larger area arrays on single-crystal semi-
conductors which are typically grown from newer, and conse-
quently less developed, nonsilicon materials such as HgCdTe.
Charge Transfer Eficiency, Noise, and Crosstalk: These prob-
lem areas often are discussed together. Charge transfer efficiency
describes the overall efficiency of the FPA’s readout mechanism
to transfer signal camers (generated in the detector) off the focal
plane. A major consideration in designing a high-efficiency read-
out mechanism is the amount of noise introduced into the output.
Often the signal being readout from the detector is picked up
(crosstalk) by an adjacent or nearby readout circuit in a poorly
designed IRFPA.
Producibiliry: One of the basic goals of all IRFPA develop-
ment is to use a technology similar to that of silicon integrated
circuits to produce a low cost detector module. Until recently,
IRFPA’s have been produced only for one-of-a-kind development
demonstrations or for high-priority low-volume applications. At
this time, IRFPA’s, such as PtSi, are based on highly developed
silicon material and are more producible than those based on InSb
or HgCdTe. In addition, SWIR and MWIR HgCdTe arrays are
more producible than LWIR. The maturing of IRFPA technology
has lead to efforts aimed at developing manufacturing technolo-
gies needed to produce IRFPA’s for high-volume low-cost appli-
cations. The current goal is to reduce the cost of an IRFPA to a
level comparable to that of the other system components (for
example, the optics, the cryogenic cooler, and the dewar).
111. IR DETECTORS
FOR USE I N ARRAYCONFIGURATIONS
An infrared detector is used to convert incident radiation, either
directly or indirectly, into an electrical signal. We will primarily
discuss only that class of devices known as photon detectors which
convert photons directly into free carriers in a semiconductor by
photoexcitation. A second class is thermal detectors in which
incident radiation is absorbed by the lattice increasing the lattice
temperature and changing the electronic properties of the detec-
tor. Thermal detectors are significantly less sensitive than photon
detectors but have the advantage of operating at room tempera-
ture. For the purposes of this paper we will limit our discussion
to four major classes of photon detectors; photoconductive, pho-
tovoltaic, MIS, and Schottky bamer.
The focal plane array concept requires densely packing detec-
tors on the focal plane with eventually as many as IO6 or more
elements. To be practical these designs must employ extremely
PROCEEDINGS OF THE IEEE. VOL 79. NO I . J A N U A R Y 1991
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 zyxwvutsrqpo
small detectors (with dimensions < 25 wm) and be fabricated by
a high-yield low-cost approach. Performance parameters for a
detector array include all the traditional measures for a discrete
detector such as quantum efficiency, spectral response, and noise
levels as well as a number of array-specific parameters such as
detector-to-detector uniformity, overall power consumption, dead
pixel count, fill factor, and stability. The choice of a specific
detector structure and detector material is highly dependent upon
the application. Operational requirements usually dictate a spe-
cific spectral band and sensitivity level. Other practical consid-
erations in choosing a detector structure and material include
operating temperature, compatibility with desired FPA architec-
tures, and cost.
Any discussion of detectors would not be complete without
mentioning figures-of-merit used to make detector performance
comparisons. Because infrared radiation levels incident on the
focal plane of MWIR and LWIR sensors are characterized by a
large, predominant component of ambient background radiation,
most IR images have a high background pedestal and a low con-
trast signal. Note that this is the opposite of near IR and visible
photons (assumed to be incoherent). The theoretical D*bl,p
expressions [22] for an ideal detector under given backgrounds
and cold shielding conditions is
I /z
D*bl,p= -
fihc
AP
(")
QB
where f y is the quantum efficiency, h is Planck's constant, c is
the speed of light, and Q,, is the photon flux from the background
incident on the detector for a given spectral bandwidth which has
a peak wavelength Ap. It should be noted that (1) refers to a detec-
tor that produces generation noise only (e.g., a PV detector-
discussed below). Whereas a detector operating in an equilibrium
mode (e.g., a PC detector-discussed below) produces both gen-
eration and recombination noise and D*bllpis then reduced by a
factor ofA. Traditionally, Q B in ( I ) is for a 2 a steradian FOV
[23], however, it has become an informal practice to let Q B rep-
resent a pre-spec@ed photon flux on the detector based on
assumed cold shielding ( < 2 a steradian FOV), background tem-
perature and spectral bandwidth.

zyxwvutsrqpo
images where there is very little background radiation and very For a non-BLIP detector, with non negligible levels of elec-
high contrast. Thus IR imagery under ideal conditions is limited tronic noise, the detectivity is
by the fluctuations in the rate of arrival of background photons
(photon noise). The photon noise level is often used as a point of
reference for comparing noise levels of detectors.
Quantitative comparisons of detectors are usually given in terms
where Q , is the equivalent photon flux which would generate a
of noise equivalent power (NEP) or normalized detectivity (D*).
noise level equal to the electronic noise level from sources other
NEP is simply the required level of radiation (within a specified
than the background photon flux [24]. Typically measured D*
spectral band given in watts) incident on the detector to obtain a

zyxwvutsrqponm
values for flux levels corresponding to 3-5 and 8-12 pm spectral
photon signal level equal to the electronic noise level. Because
bands with ambient temperature backgrounds, conventional
NEP is usually a very small number and is directly proportional

zyxw
F-numbers and cold shield efficiencies are on the order of 10"

zyxwvutsr
to the electronic noise level, a second figure-of-merit has been
cm . Hz'/'W-' and cm . Hz'/'W-', respectively. D* com-
devised which gets larger for decreasing levels of electronic noise.
parisons can often be difficult to make because flux levels are
The detectivity D is the inverse of the NEP. Normalizing D with
inadequately specified. In the two subsections that follow, we first
respect to the detector area and bandwidth gives D* (traditionally

zyxwvutsrqponm
referred to as D - s t a r ) .
To measure the sensitivity of a single detector [20], [16, pp.
11-40 - 11-41], the detector is configured to view a small chopped
blackbody source embedded in a uniform background. A square
wave electrical output signal V, is generated by the detector, and
the NEP is given by
give an overview of detector structures used in IRFPA's and then
discuss the status of relevant IR materials.
A. 1R Detector Structures
The IR detector structures most commonly used in arrays are
shown conceptually in Fig. 6. Several excellent reviews of these
devices exist in the literature [25], (261, [20]. In our discussion
of detectors, we will only briefly review the various device struc-
tures but emphasize those characteristics important for FPA's.

zyxwvutsrq
where d is the signal irradiant power on the surface of the detector
(in watts) and V,, is the rms noise level of the detector. This leads

zyxwvutsrq
to the detectivity D and normalized detectivity D*

D = I / N E P and D* =
(Ad Af 1I 'z
~

NEP
where Ad is the detector area ( cm2) and Af is the electrical band-
width (Hz). For a sample-and-hold-circuit, the bandwidth is
approximately ( 2 ~ ~ " [ ) -where
' 71,t is the integration time. It is
important to note that IC# is dependent on the background temper-
For example, photoconductive detectors, using intrinsic semicon-,
ductors can be fabricated with very simple structures and without
limitations of forming junctions or insulator layers. Nevertheless,
photoconductive detectors have the distinct disadvantage that they
must carry a primary current I, through a generally low resistance
R detector, and therefore generate 12R of electrical power. This
creates an intolerable heat dissipation problem for large numbers
of detectors densely packed on the focal plane.
Photovoltaic detectors can be fabricated with relatively high
resistances and operated at zero and near zero bias voltages. Thus,

zyxwvutsrq
ature, spectral band, and aperture (combined F-number and cold
shield efficiency [18, p. 1771). Thus D* is always highly depen-
dent on these operating conditions.
The ultimate performance of an ideal detector under prescribed
flux conditions is known as background-limit-IR-performance
(BLIP) [21]. In this case the dominant noise source is the photon
noise-all other noise sources being negligible in comparion. The
photon noise is calculated based on the arrival statistics of the
heat generation in the detectors is typically not a problem. How-
ever, for LWIR devices, the fabrication of low noise detectors
has proven to be very challenging for narrow bandgap materials
such as HgCdTe.
The MIS detector (sometimes referred to as a photocapacitor)
has a very simple structure that lends itself immediately to mono-
lithic array designs, for example, a CCD. It has the disadvantage
that a fairly high potential is needed on the gate to create a sig-

zyxwvutsrqponmlkjihgfed
SCRIBNER er al. : IRFPA TECHNOLOGY 71
 d zyxwvutsrqpo
zyxwvutsr
Fig. 6 . Four common IR detector structures and their related energy band diagrams. (a) Photo-
conductive. (b) Photovoltaic. (c) Metal-insulator-semiconductor. (d) Schottky barrier.
nificant charge storage well. High potentials in the narrow band-
gap detector material tend to cause significant increases in the
number of charge carriers excited into the semiconductor’s con-
zyxwvutsrq
duction band thus increasing noise and decreasing usable storage
capacity. Material requirements are usually more demanding for
MIS detectors than for PV detectors.
Silicide Shottky barrier devices (primarily using PtSi) can be
fabricated using technologies identical to, or compatible with,
existing silicon processes. Very large arrays (512 X 512) have
been monolithically incorporated on conventional silicon readout
chips (for example, CCD’s) using 1.25 pm design rules making
this a very powerful approach in terms of producing working,
high density FPA’s. Nevertheless, PtSi detectors have very low
quantum efficiencies and spectral responses limiting them to the
3-5 km range as will be shown below.
Thermal detectQrs (e.g., pyroelectrics and bolometers) [27]
have the highly practical advantage that they can be used at
ambient temperatures thus eliminating the need for cryogenic
zyxwvutsrq
zyxwvutsrqpo
cooling systems. Although thermal detectors have poor sensitiv-
ities and response times compared to photon detectors (typically
two orders of magnitude lower D*), they have been developed as
arrays for use in staring applications where integration times can
be long, and moderate overall sensitivities can still be achieved
zyxwvutsr
[28]-[31].
Photoconducrive Defectors [32]:This is the simplest detector
structure using direct photon capture (as opposed to thermal
detection). It can use either an intrinsic or extrinsic semiconduc-
tor as shown in Fig. 6(a). The photon energy, hv, must be greater
than the energy gap, E,, of the intrinsic semiconductor in order
for the detector to absorb the photon. This photoelectrically
excites an electron from the valence band into the conduction band
leaving a hole in the valence band. Typically electrons have much
higher mobility values than holes in IR detector materials and
hence, determine the photoresponse. In the case of an extrinsic
semiconductor a photon is absorbed by an impurity (with an
impurity ionization energy E , << hv) and a free electron is cre-
ated in an n-type semiconductor and a free hole in a p-type semi-
conductor. Through this absorption process the number of free
charge carriers is changed resulting in a change in the conductiv-
ity of the semiconductor. When a constant bias is placed across
72
_ _ -
6
METAL
SILICIDE
the detector, the modulation in the current through the detector is
proportional to the change in photon flux incident on the detector.
Photoconductive detectors can exhibit gain which is the ratio
of the mean carrier lifetime to the transit time of the higher mobil-
ity free carrier across the detector between the two ohmic con-
tacts. The gain may have a value from zero to greater than unity.
In the latter case, the lifetime is greater than the transit time.
Physically, this can be thought of as the free carriers transversing
the detector (and the extemal circuit) several times before recom-
bining.
For intrinsic photoconductors the bandgap of the semiconduc-
tor must be less than the energy of the incident photon energies.
For a pseudobinary semiconductor like Hg, - ,Cd,Te the com-
position (described by the mode fraction x ) can be controlled to
obtain the precise bandgap desired. By achieving the maximum
possible bandgap, the operating temperature can be maximized
thus decreasing the complication and cost of the cooling system.
If the bandgap were too small, then increased cooling would be
required to minimize the number of thermally excited carriers
which increases the noise level. Since intrinsic photoconductors
exhibit relatively high conductivities, severe heat dissipation
problems occur when large numbers of detectors are densely
packed together on the focal plane.
Extrinsic detectors using silicon or germanium can be fabri-
cated with large internal resistances under ambient background
illumination levels. However, because the photon capture process
involves an impurity center rather than an intrinsic material, the
absorption coefficient is low unless the material is very heavily
doped. If the impurity concentration is increased too much the
performance is degraded by the increase in impurity band con-
duction. Thus trade-offs are made when specifying impurity lev-
els in an extrinsic detector. The effective lifetime can be increased
by significantly lowering the operating temperature. As a specific
example, extrinsic LWIR silicon detectors are operated in the 10-
20K range in order to freeze-out such impurities as boron.
In general, the LWIR intrinsic photoconductive detectors can
be operated at higher temperatures than extrinsics because extrin-
sics are limited by a spectral band tail which has a low thermal
activation energy [33]. At very low temperatures extrinsics offer
better performance than intrinsics while dissipating less power
PROCEEDINGS OF THE IEEE. VOL. 79. NO. I , JANUARY 1991
 zyxwvutsrqpo
zyxwvutsrqpo
and consequently the responsivity [34].
zyxwvu
because intrinsics become sweepout limited thus reducing the gain
Photovoltaic Detectors ( p - njunction): This structure shown in
Fig. 6(b) is based on the p-n junction device concept. Incident
zyxwvutsrqponm
photons generate electron-hole pairs by intrinsic photon absorp-
tion and minority carriers diffuse to the junction where they are
swept across by the built-in electric field in the reverse current
direction. Because they are junction devices, they exhibit recti-
fication and IR detectors have I ( V ) curves similar to a typical p-n
junction rectifiers. Thus the basic theory of ideal photovoltaic
detectors can be developed based on traditional models for p-n
junction devices [35]. For high quantum efficiency detectors, the
optical absorption of photons must occur very near the junction
(i.e., within the diffusion length of the minority carriers). Unlike
photoconductors there is no current gain. Actually the term pho-
tovoltaic in its strictest sense implies that the bias on the detector
is zero. It has become common usage to use the term photovoltaic
to refer to all p-n junction detectors even though they are typically
operated at small reverse biases. A photovoltaic detector operat-
ing in the short circuit current mode is very linear with respect to
optical irradiance. Operation in the open-circuit voltage mode with
charge stored on the photodiode causes changes in the junction
capacitance which can lead to nonlinear saturation effects. Thus
the preferred operating mode is to measure the photogenerated
signal in terms of the photocurrent rather than the change in the
zyxwvutsrqp
photovoltage.
Analysis of thi: noise performance of p-n junction infrared
detectors generally involves modeling of the diffusion current
across the junction and g-r current in the space-charge region [36],
[37]. An important measure of performance is the incremental
resistance at zero bias voltage, that is Ro-’ = ( d I / d V ) , , = oBecause
. The surface potential of the semiconductor is controlled by the
the value for Ro is inversely proportional to area, it often nor-
malized for purposes of comparison to RoA. For the case of the
ideal p-n junction, it can be shown that Ro is inversely propor-
tional to the diffusion current. At elevated temperatures this is
typically the limiting noise mechanism. Diffusion current can be
estimated as a function of material parameters such as carrier life-
times, mobilities, and intrinsic carrier concentrations. In the limit
of zero bias voltage, the ideal p-n junction resistance due only to
diffusion current reduces to the Johnson noise limit [38]. In the
case where the Johnson noise is the dominant noise source, the
zyxwvutsrq
detectivity is
zyxwvutsrqp
where e is the electron charge, ks is Boltzmann’s constant, and
To is the temperature of the detector [20, p. 811. Thus in the
Johnson noise limit, D* 0: (RA)’”. Although diffusion current
can theoretically be reduced by decreasing temperature, diode
performance at low temperature is usually set by the g-r statistics
which limit carrier lifetime and thus dominate noise performance.
Whereas diffusion-limited performance is theoretically best at a
reverse bias voltage away from zero, g-r noise can be reduced by
operating at zero bias. It is also worth noting that 1 lfnoise, which
can be found in all PV detectors (391, [40] can be reduced by
operating at zero bias [41], [42]. An optimum reverse bias con-
dition therefore, depends on many detector factors as well as the
characteristics of any coupling circuitry to preamplifiers or IRFPA
readouts.
BLIP performance implies that all of the above mentioned noise
sources can be reduced below the photon noise level. In certain
applications this can place extremely low limits on the internal
detector noise levels, which as a consequence requires junction
SCRIBNER er U/ IRFPA TECHNOLOGY
~ ~
and material parameters at o r beyond the current state of the art.
The RoA for PV detectors used in hybrid FPA’s must be partic-
ularly good, not only for sensitivity, but also for coupling to the
input circuit, as will be discussed in Section IV. The BLIP noise
performance of a PV detector compared to a comparable BLIP
PC detector is a factor of f i better because the PC detector has
both generation and recombination fluctuation, while the PV
detector sweeps carriers across the junction before recombination
occurs. Typically. RoA values in HgCdTe are lo5 for the 3-5 pm
band and I O for the 8-10 pm band.
In the fabrication of PV detectors, a theoretical advantage is
obtained from having the photon capture (and creation of an elec-
tron-hole pair) very close to the junction with respect to the rel-
evant diffusion length as this allows reducing the thickness of the
device and thus a decrease in the diffusion current [25, p. 7751.
Heterostructures are also being developed for reducing diffusion
current as will be discussed in the next subsection.
Metal-insulator-semiconductor (MIS) Detectors: The MIS
stmcture shown in Fig. 6(c) consists of a transparent metal gate,
a thin insulator layer and a doped semiconductor. Because of its
inherent simplicity and its successful use in visible imaging CCD’s
(fabricated as silicon devices), significant efforts have been made
to use this technology with infrared detector materials. The device
is operated by applying a voltage pulse to the gate which creates
a depletion region in the semiconductor that acts as a potential
well. Incident photons passing through the transparent gate and
insulator are captured by the infrared semiconducting material
producing electron-hole pairs. The minority carriers remain in the
potential well near the surface while the majority carriers are
forced into the neutral bulk region by the surface potential.
voltage difference between the gate and the semiconductor sub-
strate. This structure is often analyzed as a one-dimensional
potential 4 ( x ) , where x is the distance from the surface [35, p.
3621. Knowing the insulator parameters and the electrical char-
acteristics of the semiconductor (that is, carrier concentrations
and dielectric constant) the space-charge density under the gate
can be estimated. For large bias values and consequently high
surface potentials, the minority camer concentration is much
greater than the unbiased majority camer concentration. HOW-
ever, the capacitance of the space-charge region of the semicon-
ductor becomes smaller for stronger surface potentials. The com-
bined capacitance of the device due to the insulator capacitance
C,, and the space charge capacitance C, is a series combination,
that is, C = Ci,C,/(C,, + C,). The change in capacitance as a
function of voltage (measured at various frequencies) has become
a standard method for characterizing MIS detectors [43] (and
semiconductor doping profiles) [44] by plotting the resulting
capacitance-voltage ( C - V ) curves.
For IR semiconducting materials, MIS characteristics are often
limited by surface states which can exist in the thin insulator or
at the semiconductor insulator interface [45]. Band-to-band tun-
neling currents are typically much less significant but represent
the theoretical limit of performance for all narrow bandgap devices
[46]. Fixed insulator charge can cause flat-band conditions well
away from the zero gate bias condition. Fast and slow interface
states can both exist. Slow interface states can cause hysteresis
effects in the C-V curves due to trapping near the interface. Fast
interface states can cause large dark currents that are essentially
due to generation-recombination through Shockley-Read centers.
Dark current can also exist due to minority carriers generated in
the neutral bulk and diffusing into the depletion region as well as
minority carriers generated in the depletion region or carriers tun-
13
 zyxwvutsrqpon
zyxwvutsrqpo
neling directly across the bandgap. The dark current level limits
the storage time particularly for LWIR devices. Although MIS
detectors are essentially capacitors, their dark current levels can
be compared with dark current levels in photovoltaic detectors
allowing a reference to R,A product. Recently studies have been
made of MIS detector structures using HgTe-CdTe superlattices
WI.
zyxwvutsrqpo
Silicide Schottky Barrier Detectors: The Schottky barrier struc-
ture is shown in Fig. 6(d) and has been studied extensively by
Shepherd [48]. Photons enter the structure from the backside of
the substrate and are absorbed in the silicide electrode. A small
fraction of the excited carriers are emitted over the Schottky bar-
rier (that has a potential $,,,,) and into the semiconductor. Before
carriers are emitted into the semiconductor they can give up part
of their kinetic energy through scattering processes with the sili-
cide lattice. grain boundaries and the electrode walls. These pro-
cesses are not well understood and methods for optimizing per-
formance have been mostly empirical, but some modeling has
been attempted [49]. As camers are emitted into the semicon-
ductor. charge builds up on the silicide electrode which has a
metallic character (recombination is prevented by the Schottky
barrier). The charge can be transferred into a readout structure,
for example, a CCD. through a diffusion formed in the semicon-
ductor below the silicide.
Silicide films with suitable bamer heights for IR detectors can
be fomied by vacuum evaporation on to a patterned silicon sub-
zyxwvutsrq
strate using a number of different metals. Platinum has been suc-
cessfully used for the MWIR band (where the long wavelength
cutoff is A,,, = 6.0 pm) but other metals for silicides are also
being investigated such as palladium (A,,, = 3.5 pm). iridium
(A,,, = 10 p m ) . and nickel (A,,, = 2 p m ) . It should be noted that
upper cutoff wavelengths quoted for silicides are for the ;ero
response poir7t instead of the 5 0 % rcsponse point as quoted for
other detectors. The lower wavelength cutoff for all silicides is at
1 . 1 pm due to optical absorption in the silicon substrate.
The spectral quantum efficiency of the detector as a function
of wavelength can be estimated by the expression
zyxwvutsr
where C , is the Fowler emission coefficient, h v is the photon
energy, $,,,, the Schottky bamer potential and A,,, is the cutoff
wavelength whose energy corresponds to $,,,,. For the case of
PtSi. currently achievable values are C , = 0.25 ( 1 / e V ) . Some
improvements in quantum efficiency can be achieved by fabricat-
ing the detector as part of an optical cavity wherein an antireflec-
rive coating is added to backside of the silicon substrate and a
transparent dielectric and aluminum coating (mirror) is added to
the front side [SO]. Nevertheless, quantum efficiency tends to be
very low for PtSi devices, on the order of 2 % at 4.0 pn.
In spite of the poor quantum efficiency for these detectors. they
have several advantages over high quantum efficiency detectors
when used in FPA’s. First. they are fabricated in silicon using
conventional processing techniques. Second. photo absorption in
a silicide film leads to extremely uniform detector arrays with
good yields.
B. IR Detector M m r r i a l s
Quality detectors are available across a broad IR spectrum
because of advances in the development of detector materials.
Fig. 7 shows the spectral range and r 7 0 t ~ 1 i operating
~~/ tempera-
tures of those materials most commonly used in IRFPA’s. For
71
zyxwvutsrqpon
zyxwvutsrqponml
(HgCdTs
x = 32)
THERMO-
3
- PASSIVE
SPACE - BORNE
COOLER
0 I 1
IHBI
0 5 10 15 20 25
SPECTRAL CUTOFF WAVELENGTH IPT)
Fig. 7. 1R detector materials; cutoff wavelengths and nominal
operating temperatures for imaglng systems.
the MWIR region, InSb has previously been one of the most
widely used and sensitive materials. Recently, advances in
HgCdTe (which has a variable bandgap depending on composi-
tion) have not only made it a practical alternative to InSb in the
MWIR region, but offer the potential for higher operating tem-
peratures and LWIR PV applications. Before that, extrinsic sili-
con PC detectors, cooled to a very low temperature, were the only
viable choice for LWIR arrays.
Within the area of materials research, epitaxial growth tech-
niques 1.511 such as liquid phase epitaxy (LPE), metal-organic
chemical vapor deposition (MOCVD). and molecular beam epi-
taxy (MBE) are being employed to fabricate detectors with
improved performance over previous bulk material approaches
such as solid-state recrystallization. Primarily these techniques
offer higher punty materials, thin layers with well controlled sur-
faces, improved (as well as novel) device structures, and larger
area wafers for lower cost production. Epitaxy is the growth of
semiconductor films in which the substrate determines the crys-
tallinity and orientation of the grown layer. When thin films are
grown with dissimilar semiconductors from the substrate, this is
called heteroepitaxy . The development of these advanced crystal-
growth techniques for IR detectors has dramatically increased the
quality and size of detector materials and made possible many
exciting new monolithic heterostructures 1521. Some techniques
also offer precise iti situ control for sharp interface formation and
doping profiles making possible advanced heterojunction diodes
and superlattices.
Liquid phase epitaxy (LPE) is accomplished by bringing a
heated liquid solution (of the constituents of the film to be grown)
in contact with the substrate. The actual growth is done by tip-
ping, sliding, or dipping the substrate into the melt. The concen-
trations and temperature are ad.justed for growing the epitaxial
film to a desired composition. LPE requires relatively simple
equipment and procedures making it a fairly inexpensive growth
technique but temperature gradients limit its ability to provide
highly unifonn layers and precisely controlled compositions.
Consequently. it is not suitable for growing superlattices and other
specialized structures. Another problem with this technique is that
zyxwvuts
the required growth temperatures can be high and problems can
occur in terms of voids, inclusions, and poor surface morpholo-
gies.
Vapor phase epitaxy (VPE) methods have the potential for large
area and highly uniform films which ultimately could provide a
high production capability. Because VPE growth temperatures can
PROCEEDIIU’GS O F T H E IEFE. VOL 79. NO I. J A N U A R Y 19YI
be kept considerably lower than LPE, higher quality films are
possible because fewer impurities are activated. One form that
has been used extensively for IR materials has been metal-organic
chemical vapor deposition (MOCVD). In this approach, a stream
of gaseous elements or compounds are carried into the growth
reactor by a complex metal-organic molecular compound. Once
in the hot reactor the compounds disassociate allowing the desired
detector elements to condense onto the substrate.
Molecular Beam Epitaxy (MBE) is an ultra high vacuum growth
method that involves the reaction of collimated beams of atomic
species with a crystalline substrate surface held at an appropriate
temperature. The beams originate in specialized chambers that
vaporize elemental constituents and control beam intensities by
shutters. The clean environment combined with the slow growth
rate and the independent control of the individual beam sources
allows precise fabrication of heterostructure layers and doping
profiles. The ability to control layer thickness and abruptness of
growth interfaces make superlattice structures possible.
The ultimate performance of IR detector arrays is dependent
on the same material parameters as required for discrete single
element detectors. Electronic properties of detector materials are
zyxwvuts
dependent on carrier concentration, mobility, and lifetime. Fur-
thermore, device performance can depend on control of dopants,
impurities and defect levels, and surface properties. However,
compared to single element detectors, array fabrication involves
additional materials requirements that can be very demanding.
Obviously large area wafers with epitaxial detector layers must
have very stringent uniformity requirements and good surface
morphology for processing. In addition, the IRFPA requirement
that the readout and detector interface be small and low power,
zyxwvu
zyxwvutsrqpo
usually demands that detectors be higher quality to compensate
for the less efficient preamps. Other material parameters for arrays
include crystallinity (grain boundaries, twinning, etc.), mechan-
ical properties (such as hardness and brittleness as in the case of
hybrid bump bonding), interface properties (as they pertain to
heteroepitaxial IRFPA’s), producibility , cost and surface passi-
vation. The latter is required not only for simple mechanical pro-
tection, but more importantly passivation is needed to prevent
zyxwvutsrqpo
chemical and electrical changes to the surface that could cause
unwanted surface states and degrade performance. In certain
zyxwvutsrqpon
device structures, passivants serve as antireflection coatings.
Below we discuss the various classes of semiconductor materials
either being used or considered for IRFPA’s.
Group IV Semiconductors: Both silicon and germanium have
been used as extrinsic photoconductors [ 3 2 , p. 241 for discrete
detectors and exhibit both gain and large intemal resistances, but
require relatively low operating temperatures. In the early years
of semiconductors, Ge could be made purer than Si, but today Si
can be made very pure and has the additional advantages of better
zyx
solubilities of dopants and a lower dielectric constant. Si is the
zyxwvutsrqp
preferred material for extrinsic IR detector arrays because of the
obvious benefits of compatibility with conventional silicon pro-
cessing technologies. Some of the dopants possible for achieving
specific spectral cutoffs are shown in Fig. 7 along with their nom-
inal operating temperatures [53], [54]. Note that for the LWIR
band, there is no known dopant that provides a cutoff of exactly
12 pm. Technical issues involving optimization of detector per-
formance with respect to material parameters have been discussed
by Marsh [55] and concepts for monolithic extrinsic silicon
IRFPA’s have been described [56], [57].
Silicide research has been continuously increasing over the past
decade with emphasis on PtSi Schottky barrier detectors. Future
PtSi work is aimed at extending the Fowler emission coefficient
zyxwvutsrqponmlkjih
zyxwvutsrqponmlkjihgfed
SCRIBNER cf d . : IRFPA T E C H N O L O G Y
C , to 0.3/eV. Other research in IrSi [58] and PtIrSi [59] is also
underway with the goal of extending IRFPA cutoff wavelengths
into the 8-12 pm band. But IrSi fabrication has proven to be more
difficult than other silicide technologies as IrSi tends to bond to
silicon dioxide as well as silicon which complicates processing
[48, P. 31.
In the last few years, MBE growth techniques have been used
to fabricate a-Sn,Gel - - x alloys [60], [61]. This is an attractive IR
detector material because of the a-phase of tin (Diamond struc-
tured) is a semimetal and when combined with Ge should result
in a narrow bandgap material. Several major problems have pre-
viously prohibited preparation of this alloy. First, bulk a-Sn is
not stable above 13.2”C as it goes through a phase transition into
P-Sn. Second, Sn in nearly immiscible in Ge. Both of these prob-
lems may be overcome by MBE growth techniques and a number
of research efforts are in progress to grow alloys that would be
stable above 100°C.
III-V Compounds: The primary 111-V compound used as an
infrared detector is InSb which has a cutoff wavelength of 5.5
pm. InAs has also been used but its cutoff wavelength of 3.5 pm
makes it of limited utility for the MWIR band even though it
could theoretically be operated near 190K. Developmental work
for InAs has been limited by growth and passivation problems.
InSb, on the other hand, has been highly developed and has been
one of the most sensitive and widely used MWIR detectors [62].
Bulk InSb MIS detectors have been typically operated in the 77-
90K, range but recent results have shown that LPE devices may
allow operating temperatures above 100K. LPE wafers of InSb
have been grown as large as 2 inches in diameter with minimum
carrier concentrations of 3 X IOl3 cm--’ [63].
Recently, development of superlattice structures has provided
new possibilities for extending 111-V materials into the LWIR
region. One is the GaAs/AIGaAs multiquantum well PC detector
that has demonstrated good sensitivity with LWIR cutoff wave-
lengths operating at 77K [64]. The initial limitations of the cur-
rent approach are that the spectral band must be fairly narrow and
the quantum efficiency tends to be somewhat low. A second pos-
sibility is either the strained-layer superlattices (SLS)
InAsSb/InSb [65] or InGaSb/InAs. The InAs, -,Sb, alloy f o r x
= 0.6 has a bandgap of approximately 0.14 eV (equating to over
8 pm) at 77K. This is a narrower bandgap than either InAs or
InSb because of a strain-induced shift. This effect can be accen-
tuated using thin altemating layers in the periodic structure of a
superlattice. Ultimately, devices could be fabricated out to 12 pm
and beyond. Currently, test structures for SLS PV detectors have
been fabricated and cutoff wavelengths of 7 pm have been
achieved with D* values only an order of magnitude less than
comparable HgCdTe devices. A third possibility which also uses
either of the materials InSb or InAs is the nipi superlattice which
can be grown by MBE or MOCVD [66].
II-IV Compounds: The most extensively studied infrared mate-
rial at this time is the Hg, -,Cd,Te alloy system [67]-1701 which
is a pseudobinary crystal of HgTe and CdTe where x represents
the mole fraction of CdTe. This alloy system is of extreme inter-
est because the energy gap varies with the compositional value x.
By combining the widegap CdTe ( .Eq= I .6 eV ) and the zero gap
HgTe, the energy gap of the resulting material can be tailored by
controlling the composition over the full range of x from 0 to 1.O.
The resulting alloys have well-defined band structures that vary
continuously with composition instead of being fixed like ele-
mental and normal compound semiconductors. Obviously this
makes HgCdTe a very versatile material for infrared detector
technology. For example, tailoring the bandgap to the desired
15
 zyxwvu
cutoff wavelengths can allow elevated operating temperatures for
thermoelectric or passive space cooling. Other 11-VI pseudobi-
nary alloys have been studied including HgZnTe, and CdZnTe,
the latter also being of recent interest as a substrate material for
zyxwvutsr
zyxwvutsrqpo
HgCdTe to achieve better lattice matching than commonly used
CdTe substrates. Still other compounds similar to HgCdTe are
zyxwvutsr
possible where Mn is substituted for some or all of the Cd and Se
can be substituted for Te. In spite of the interesting possibilities
with these other materials, it is generally accepted that HgCdTe
will continue to offer the most advantages and highest perfor-
mance.
Before the initial development of HgCdTe in the late 1950's,
the only suitable LWIR material was extrinsic Ge:Hg which had
several limitations as discussed previously. The need for an
intrinsic LWIR material with a higher operating temperature has
focused development almost entirely on HgCdTe ever since.
Although superlattice structures (using both 111-IV materials and
HgTe-CdTe) [71] may hold great potential for higher D* and
higher operating temperature, HgCdTe will most certainly con-
tinue to be an important infrared material. We limit the remainder
zyxw
of our comments to a few remarks concerning recent IRFPA
developments related directly to HgCdTe [72].
zyxwvutsrqponm
The specific advantages of HgCdTe include: low camer con-
centration; long minority camer lifetime; high mobility; and good
ability to control epitaxial growth and surface properties. In addi-
tion, HgCdTe is known to have a low dielectric constant and an
extremely small change in its lattice constant with compositional
changes (x value). When used in IRFPAs. the requirements for
large area wafers ( 3 inches or larger for silicon-like processing),
good uniformity, and highly reproducible processes put great
demands on this material. Bulk growth techniques have been lim-
ited by radial and axial composition variations and much of the
current work on HgCdTe detector arrays focuses on epitaxial
growth [73], [74]. Epitaxial detector structures only require
approximately 5-20 pm of a HgCdTe layer.
A necessary requirement for epitaxial growth of any thin film
is a high quality substrate. Any defects or crystalline imperfec-
tions in the substrate are replicated into the epitaxial layer. CdTe
which has a fairly good lattice match to HgCdTe ( 0 . 3 % lattice
mismatch ) has previously been the prime substrate for epitaxial
growth. But the limited quality, small size (areas typically < 10
cm') and high cost of substrates have limited detector array devel-
opment. Other materials are currently being investigated includ-
ing CdZnTe, CdSeTe. sapphire, InSb, GaAs, and Si using epi-
taxial buffer layers. One interesting result with long range
implications is that good pv HgCdTe detector structures appear
possible on a CdTe/GaAs/Si layered structure where the sub-
strate material is Si which could also serve as the multiplexer in
a monlithic IRFPA architecture [75], [76].
A number of groups have successfully grown high quality LPE
HgCdTe under laboratory conditions. and these processes are
currently being transitioned into production. LPE materials have
-
been demonstrated with low carrier conccntrations ( 1014-10's
cm-') but problems with voids. inclusions. and twinning tend to
limit current production efforts of LWIR material. LPE layer
interfaces are on the order of 2-3 pm in width making the process
inadequate for superlattice and quantum well applications. Scv-
eral problems with LPE HgCdTe arc: composition and conduc-
tivity type are difficult to control at the interfaces: the stoichi-
ometry of the melt is difficult to maintain due to the high growth
temperature (400-500°C ); and good surface morphology is dif-
ficult to achieve.
Recent successes in other materials (like GaAs) grown by
76
MOCVD and MBE have caused these low temperature growth
techniques to be applied to HgCdTe. Both techniques have poten-
tial advantages in heterojunction and multilayer structures because
interfaces of 5 1 pm are possible. MBE has sharper interfaces
than MOCVD as well as good surface morphology. Growth tem-
peratures for MBE ( 180-200°C) are slightly lower than MOCVD
(200-250°C). The potential advantages of MBE are the inher-
ently straightforward controls for growing very high quality diodes
(doped in siru ), heterojunctions, superlattices, and passivation
layers. The disadvantages of MBE are the high cost of machines
(current research systems cost $1-2 M) and the low throughput
due to the slow growth rate. An alternative to MBE is the
MOCVD approach which should be cheaper to implement and
provide higher throughput. Recent results have shown that
MOCVD may have potential to provide HgCdTe films with basic
electronic properties competitive with MBE, but improved pro-
cesses will be necessary to fabricate interfaces suitable for super-
lattice structures. Currently, both MOCVD and MBE have pro-
duced HgCdTe films that have electronic properties slightly
inferior to state-of-the-art bulk HgCdTe but this situation is
changing rapidly and many IRFPA developers are anticipating
expanded use of these growth techniques.
One subtle, yet highly problematic area of HgCdTe develop-
ment has been passivation which is critical to device performance
as it can greatly affect surface leakage currents and 1/ f noise
levels. Passivation techniques are often so crucial to good per-
formance that most commercial developers treat it as a proprie-
tary process. Generally, passivation techniques have included
native oxide, ZnS. anodic sulfides, SiOz, and heterostructures
involving HgCdTe or CdTe [77].
IV-VI Compounds: The compounds PbS. PbSe, and PbTe all
have a rock salt lattice structure and direct energy band gaps with
cutoff wavelengths of 3.3, 4.8, and 4.1. respectively (measured
at 300K). These detectors were the primary materials used in sin-
gle element IR systems in the 1950's. In the late 1950's and early
1960's Pb, Sn, Te and Pb, L. Sn, Se compounds were devel-
- ~ -
oped [78]. These compounds have the advantage of variable
bandgaps as a function of x-value just like the previously dis-
cussed Hg, ,Cd,Te compounds. In PbSnSe for x > 0.43 the
lattice structure is no longer rock salt, but below this value it
behaves much like PbSnTe. A common property of lead salt
detectors is that their dielectric constants are anomalously high,
ranging from 170 for PbS to over 400 for PbTe. For detector
array designs where charge storage takes place in the detector
structures, this could be advantageous. For scanning IRFPA's, a
high dielectric constant can be a severe detriment in that it limits
high frequency performance and causes amplifier matching diffi-
culties. Such high dielectric constants would also prevent the ulti-
mate use of lead salts in monolithic CCD designs as the charge
transfer efficiency would be very poor at conventional FPA data
rates. Another limiting factor is the large thermal expansion coef-
ficient which is a poor match with silicon, making it impractical
for conventional FPA structures.
In spite of these limitations. the lead salts are particularly easy
materials to fabricate either by vacuum evaporation or chemical
deposition. For example. high resistivity PC detectors can be fab-
ricated using these techniques in PbS and PbSe with moderate
performance even though they tend to have highly granular struc-
tures and high carrier concentrations which are typical of many
lead salt crystals making BLIP performance usually unachieva-
ble. Work on PbSnTe and PbSnSe advanced fabrication tech-
niques has been performed on bulk. LPE, VPE. and MBE growth
techniques and very sophisticated device structures have been
PROCEEDINGS OF THE IEEE VOL 79 NO I JANUARY 1991
~
 zyxwvutsrqponm
demonstrated with excellent uniformity and material stability [8,
p. 2271. Passivation of lead salt surfaces appears to be well under-
zyx
stood. Monolithic arrays may also be of interest. Recently, a Swiss
research group demonstrated moderate performance pv PbTe
detectors grown heteroepitaxially on silicon substrates with an
zyxwvutsrqp
intermediate buffer layer of CaF2/BaF2 [79].
IV. FOR HYBRIDFPA's
INPUTCIRCUITS
In an IRFPA, after the detectors convert the incident photons
to electrical charge, the resulting signal must be injected into a
readout for output multiplexing. In present hybrid configurations,
VLSI multiplexers are fabricated on silicon chips which can then
be bump bonded to the detector arrays, as shown previously in
Fig. 5(a). In a monolithic design using MIS detectors, the mul-
tiplexer and detector can be coupled directly to transfer charge
zyxwvu
(e.g., a visible CCD) thus eliminating the need for an input cir-
cuit. For present monolithic designs, this has the disadvantage of
transferring charge through a device structure fabricated in a nar-
zyxwvu
row bandgap material.
Although input circuits for hybrid IRFPA's must be designed
to meet a number of requirements and constraints as shall be dis-
cussed below, it is often of critical importance that they have
lower noise than the detectors so as to meet BLIP requirements.
Many high performance preamplifier designs have been devel-
oped in the past for coupling to discrete IR detectors [80], how-
ever, such designs cannot practically be fabricated in a silicon
integrated circuit geometry with the small unit cell area con-
straints of current IRFPA designs. Some linear IRFPA designs
are exceptions for which there is enough area for a transimped-
ance amplifier (TIA) [81] which is a near ideal circuit for cou-
pling an IR detector to a multiplexer. However, most IRFPA array
designs have unit cells too small to accommodate all the TIA
components. Thus input circuits for advanced staring and TDI
FPA's must be designed with very specialized input circuits that
meet stringent high performance specifications yet have very little
available area for complex circuitry and a commensurate high
dc EQUIVALENT CIRCUIT dc EQUIVALENT CIRCUIT
iD l m : l C H , , ,
Fig. 8. Input circuits for hybrid IRFPA's. (a) Direct injection. (b) Buffered direct injection.
(c) Gate modulation.
SCRIBNER er al IRFPA TECHNOLOGY zyxwvutsrqpon
component count [82]. The design and fabrication of these analog
circuits must be suitable for cryogenic operation as well.
Because the input circuit is so very critical to high performance
in hybrid FPAs, many array developers treat their designs as pro-
prietary. In the two subsections below we first present three
examples of simple input circuits that have been used over the
past decade and then discuss overall design considerations for
input circuits which are dependent on specific applications.
A. Conventional Input Circuits
Three examples of input circuits that have been studied and
used to a great extent (and serve as the basis for more sophisti-
cated designs) are shown in Fig. 8. For the purpose of this dis-
cussion, we will assume that a PV detector is to be coupled to a
CCD readout device. Coupling to other types of readouts, for
example, a switch array, would involve nearly the same design
considerations with some exceptions which will be mentioned in
the next subsection. Note that in all three configurations the input
diffusion and gate GI are identical to a MOSFET source and gate.
In studying these input structures, G, is then treated like a virtual
drain and this segment of the input is modeled as a MOSFET.
The gates 4, and 4, are the CCD transfer and phase one gates.
Direct Injection: The direct injection input circuit shown (831
in Fig. 8(a) has an input gate GI which is held at a fixed potential
and fulfills the function of reverse biasing the PV detector. The
charge carriers generated by the detector are directly injected into
the input diffusion and potential well under the storage gate G,
where it is accumulated. The potentials supplied to the transfer
gate GI and storage gate G, are applied to all unit cells simulta-
neously from common bias lines. The exact bias on each detector
zyxwvutsr
is thus dependent on the common bias voltage as well as the spe-
cific threshold voltage of the gate GI. The operating point of the
coupled detector and input circuit is found by constructing a load
line for the I ( V ) characteristics of the detector and input MOS-
FET. The direct injection approach has the advantage of simplic-
ity (small area) and high injection efficiencies, which in the low
gmVGS
ac EQUIVALENT CIRCUIT
I
TCGGS
zyxwvu
(1 AVs
I L
~~
77
 zyxwvutsrqp
frequency limit is
zyxwvutsrq
zyxwvutsrqponm
where g,,, is the transconductance of the MOSFET and R , the
intemal resistance of the detector at the operating voltage. The
highest injection efficiency is obtained for large g,,, and R,, that
is, g,,,R , >> 1, In addition, if g),, is too low the maximum fre-
quencyf,,,, of the input circuit will begin to fall off as
z
where C , is the capacitance of the detector. Generally, this is not
a problem for MWIR staring designs where R , is large, but it can
be very important for LWIR scanning designs where R, is small.
The added noise from the input circuit is simply that associated
with the MOSFET as shown in the equivalent circuit diagram of
Fig. 8(a). Although this noise can be kept fairly low, the back-
biasing condition needed to operate the MOSFET (typically in
the subthreshold condition) can cause levels of dark current that
degrade sensitivity and also result in a loss of usable storage well
capacity. A simple variation of this circuit is to store charge on
the detector thus eliminating the need for the transfer gate G, and
the storage well G,. Thus bias on the detector generally needs to
be higher in this mode and the charge storage is now in the narrow
bandgap detector material which will have a dramatically lower
charge storage capacity than the previous silicon MOS capacitor
configuration. As mentioned in Section 111, there is also a poten-
tial problem of a nonlinear response when storing charge in the
detector.
Buffered Direct Injection 1841, fS.51: One approach to improv-
zyxwvutsrq
ing the direct injection current is to use feedback as shown in Fig.
8(b). The detector is connected to both the input diffusion and the
input of a simple amplifier whose output is then used to control
the potential on the transfer gate. In this configuration, the trans-
zyxwvutsrqpon
fer gate G, is no longer held at a constant potential, but varies in
proportion to the photogenerated current of the detector. Analysis
of this circuit shows that it operates like the previously described
direct injection circuit but with an effective g,,, that is increased
by a factor of ( 1 + A ) where A is the gain of the amplifier. The
improvemcnt in effective x,,~thus increases the injection efficiency
and extends the maximum frequency response of the circuit. Fur-
thermore. if' the gain of the amplifier in the buffered direct injec-
tion circuit is high, then improved noise performance can be
obtained over a comparable direct injection circuit provided the
feedback amplifier noise is kept low.
zyxwvutsrqponmlk
zyxwvutsrq
Another advantage of the buffered direct injection circuit is that
the amplifier operating voltages can be controlled, allowing some
zyxwvuts
flexibility in the level of reverse bias voltage applied to the detec-
tor. Because the I / f noise levels in a PV detector is believed to
be proportional to current [4I ] . [42], biasing the detector at zero
volts minimizes the I / f noise contribution from the detector.
However. reverse biasing a PV detector tends to improve the RA
product (provided it is not biased into the breakdown rcgion)
which then improves injection efficiency and reduces the added
noise level from the amplifier. Therefore, an optimum bias level
for reduced noise performance probably occurs at a reverse bias
voltage slightly below zero.
The buffered direct injection circuit achieves improved injec-
tion efficiency, better frequency response and lower noise at the
expense of increased circuit complexity. Because all the photo-
generated charge is injected (just like direct injection). back-
ground suppression is still lacking.
7x
Gate Modulation 18, p . 2241: For those applications where very
high photon flux becomes a problem in terms of saturating the
available storage well capacity, the gate modulation circuit shown
in Fig. 8(c) can be employed. It essentially suppresses dc back-
ground current by directly coupling the detector output to the
transfer gate G, which then modulates the current flowing into the
storage well in proportion to the ac component of the signal. Good
injection efficiency of the ac signal requires a high value for RD.
Also the load resistor R, must have a value greater than the detec-
tor resistance R, in order to maximize the injection efficiency and
minimize added thermal noise. For some applications where RD
is fairly high (for example, in MWIR detectors) the required
resistance for RL becomes so high that resistors may be difficult
to fabricate using standard silicon technology.
Another problem with gate modulation is that the threshold
variations of the MOSFET input cause serious problems with
nonuniformity of response across the IRFPA as compared to direct
injection inputs. Linearity of response is also inferior to direct
injection. Nevertheless. the ability to suppress very large IR
backgrounds has been demonstrated and is particularly useful in
certain applications.
B. Requirements and Constraints f o r Input Circuii
Design constraints for input circuits are shown in Fig. 9 and
can be quite severe. As mentioned previously, unit cell dimen-
wH INPUT CIRCUIT Hxl
REQUIREMENTS CONSTRAINTS
R d LOW NOISE UNIT CELL AREA
POWER DlSSlPAnON
DATA RATE
CHARGE CAPACITY
tIF NOISE DYNAMIC RANGE
IN) CURVE BACKGROUND SUPPRESSION THRESHOLC SENSlTlVlTY
QUANTUM EFFClENCY CHARGE HANWNG CAPACIlY LOW TEMPERATURE
UNIFORMIW BLWMING CONTROL FABRICATION YIELD
PHOTON FLUX FREWENCY RESPONSE
LlNEARlW
UNIFORMITY
Fig. 9. Requirements and constraints for input circuits as well as
related considerations for detectors and readouts.
sions are typically 25 to 50 pm or less. In terms of power dissi-
pation, arrays operating at 77K should be designed with heat loads
on the order of < 0 . 2 5 W in order to meet practical cryogenic
cooling limits. Thus for an array with IO 000 detectors, each input
circuit must dissipate less than 25 pW of power. Also, it is impor-
tant to note that any design, no matter how ingenious or clever
must be producible and capable of high yield when fabricated in
a conventional silicon process or the production cost will be pro-
hibitive even in small quantities.
As discussed above, even for simple input circuit designs, there
are many considerations and complications. With regard to high
injection efficiency, and low noise requirements for the input cir-
cuit. this is very challenging in the case of LWIR PV IRFPA's
where the detectors have low R,,A values, typically 1-100 R .
cm. The detector can be represented by an equivalent circuit with
a current source, a resistor and a capacitor all in parallel. If the
input circuit impedance is significantly greater than the detector
impedance, then the injection efficiency of the photogenerated
signal will be very low. That is. the photogenerated current is
essentially shunted through the intemal detector impedance and
injection efficiency is reduced. If the input impedance of the input
circuit is too low the current through the detector would become
unacceptably high increasing the Johnson noise level. Therefore,
PROCEEDINGS OF THE IEEE. VOL. 79. NO. I . JANUARY 1991
 zyxwvutsrqpo
a practical design rule is to nominally match the input circuit
impedance to that of the detector.
A . CCD Readouts
The CCD readout has been extensively developed for use in

zyxwvutsrqponm
As discussed in Section 11, background flux levels and the
visible camera systems and a number of excellent review articles
resulting irradiance on the focal plane can vary by several orders
exist [89], [90]. For infrared devices, CCD’s have been used in
of magnitude. Thus background suppression to meet dynamic
hybrid and monolithic structures. The readout is composed of MIS
range requirements can be unnecessary in some applications and

zyxwvutsrq
gates that shift analog charge packets systematically as shown in
highly demanding in others. For example, a CCD gate can hold
Fig. 10. A number of CCD structures are possible including one-,
approximately 10” camers/cm’. This implies that 50 x 50 pm
unit cell, with only part of the area dedicated to charge transfer,
can only handle on the order of IO7 camers before saturating. UNIT CELL

Presently, CCD’s for IRFPA’s have dynamic ranges less than

lo4. Additionally very intense sources within an image (e.g., a
fire or exhaust plume) may cause intense saturation and bloom-
ing. Although some input circuits such as gate modulation are
inherently tolerant to blooming, other input circuit designs may
need additional anti-blooming circuitry [86]. In Section VI we
will discuss the importance of linearity and uniformity in terms
of making corrections to the output video to achieve very high

:‘’m
levels of performance. I
CLOCKING
V . READOUTMECHANISMS WAVEFORMS t k
t tt
A number of readout mechanisms have been developed for
IRFPA’s. The most common types currently in use are the CCD, Fig. 10. Operation of a three-phase CCD.
charge injection device (CID), charge imaging matrix (CIM), and
MOSFET switch. Each will be discussed individually below. The

zyxw
CCD or the MOSFET switch are the obvious choices for use in
hybrid arrays where the readout mechanism can be fabricated in
silicon. Fabricating high performance readout mechanisms in
materials other than silicon is a technological challenge. Never-
theless CCD devices have been fabricated in InSb and HgCdTe.
To avoid the large number of charge transfers associated with a
CCD, the CID and CIM approaches have been developed.
The major design requirements for readout mechanisms [ 19, p.
two-, three-, and four-phase gate configurations and in some cases
altemative clocking waveforms can be used. For an imaging
CCD, photogenerated charge at the detector is transferred
sequentially along individual CCD rows to a fast output CCD
column at the side of the array as shown in Fig. 11.

IN ROWS OF
FOUR- PHASE
CLOCKS AND
INPUT DETEC-
1121, [87], [88] are high charge capacity, high transfer efficiency, TOR CIRCUITS
low noise, and low power dissipation. Other technical issues that
need to be addressed are antiblooming control and crosstalk

zyxwvutsrqponm
reduction. For readout mechanisms fabricated in narrow bandgap
semiconductors the charge capacity is significantly less than a

zyxwvutsrqpo
comparable silicon device. The bulk breakdown voltage Vbd of a
semiconductor has been empirically related to the semiconduc-
tor’s bandgap energy E, as Vb, 0: E:” [8, p. 2181. The bandgap
of silicon is 1.1 eV. The bandgap of InSb (cutoff length, A,, =
5.5 p m ) is 0.23 eV and the approximate bandgap of an LWIR
INPUT

DETECTOR
Fig. 11. Operation of a two-dimensional imaging CCD.
material (A,, = 12 p m ) is 0.1 eV. Therefore, the nominal break-

zy
down voltage of InSb is about 1 / 10 of silicon, whereas an LWIR
The charge-transfer efficiency of an ideal CCD is unity, that
detector is about 1/30, Charge storage is also dependent upon
is no loss of signal. A typical efficiency per transfer for a well
the dielectric constant of the insulator thickness. Although very
developed visible CCD is around 0.999 99 per phase. This is
impressive charge storage capacities have been achieved for InSb
sometimes expressed as charge inefficiency e (in this case E =
and MWIR HgCdTe, silicon readout devices have an undisputa-
0.000 01). For m transfers (where m is the number of phases
ble advantage in this area.
times the number of pixels), the total loss (or inefficiency) is
The charge transfer efficiency quantifies the performance of the
readout to move charge from the storage well to the IRFPA out-
put. Retention of charge in the storage well or other transfer losses
a = 1 - (1 - ET = me, for small E

of signal can reduce performance. In some cases, the charge
transfer efficiency sometimes decreases (droops) from one side of
the array to the other. Although a slight degree of droop can be
corrected off the focal plane with nonuniformity correction elec-
tronics, too much droop can cause problems with loss of sensi-
Thus a poorly designed three-phase CCD with E = 0.0001 and
512 pixelslrow would have a loss of 15% for the pixels at the far
side of the CCD. The dynamics of the charge transfer processes
involve solving the continuity equation and Poissons equation with
appropriate boundary conditions. The charge transfer losses gen-

zyxwvutsrqponm
tivity and may require increased resolution in the accompanying
AID signal conditioning.
In the discussion below we briefly review the most important
charge transfer devices used in IRFPA’s and comment on their
developmental status.
erally involve two drift current mechanisms. The first is caused
by the electrical field due to nonuniform distribution of electrons
under two adjacent electrodes at the same potential. This is known
as self-induced drift. The second is caused by a field due to the
potential difference between electrodes. This is called fringe-field

SCRIBNER et zyxwvutsrqponml
U/ IRFPA TECHNOLOGY

__
~~-
79

-_
face.
zyxwvutsrqpon
drift. Still another phenomenon that contributes to losses in charge
transfer efficiency is trapping at the semiconductor-oxide inter-

There are a number of possible random noise sources in a CCD

including thermal noise, charge trapping, and reset noise. There
are also correlated sources of noise that are also present due to
cross talk, clocking, and EMI.
The most successful use of CCD technology in large area
IRFPA’s has probably been the PtSi CCD. Another important
implementation has been with hybrid arrays that use CCD’s as
charge storage. This factor combined with relatively good noise
performance leads to very high dynamic range capabilities. The
silicon processing technology is highly standardized for MOS-
FET designs, leading to high yields and low costs. Finally, the
readout can be designed with very simple interface requirements
as some of the clocking and switching circuitry can be incorpo-
rated onto the side of the chip. This can reduce the number of
clock waveforms that need to be supplied through the dewar wall.
C. CID Readouts

zyxwvutsrqpo
the readout mechanism. For the PtSi IRFPA’s the advantage is
The CID was originally fabricated as a MOS silicon device to

zyxwvutsrqp
that they are highly producible, being very similar to fabricating
reduce the number of transfers needed for readout (as compared
a visible silicon CCD, the only major difference being the incor-
to a CCD) [95]. Shortly thereafter CID devices were fab-
poration of a short series of Pt deposition steps. Other advantages
ricated using narrow bandgap semiconductor materials to form
of the CCD are: the response is highly linear and uniform: the
InSb and HgCdTe monolithic IRFPA’s [96], [91, p. 1341. In a
random noise is low and the 1/f noise is low leading to good
CID, the detection process occurs within the unit cells which are
stability; and the ability to fabricate large area arrays with very
comprised of two MIS structures that are readout in an x-y
small unit cells is well demonstrated.
addressable manner as shown in Fig. 13. The structure is some-
However, CCDs require custom fabrication processes that are
not commonly available at commercial silicon foundries. In addi-
tion, CCD’s are limited to those applications which require only COLUMN SCAN REGISTER

moderate charge handling capabilities per unit area. Charge han- OUTPUT
dling in a CCD increases with gate voltage but higher gate volt-
ages present problems with waveform generation and noise 99
crosstalk. * ov
Development of monolithic CCD imaging devices in narrow

zyxwvutsrq
bandgap infrared materials has been of great interest since the
early 1970’s. A number of small working test arrays have been
fabricated and demonstrated [91], [92]. More work needs to be
performed to achieve dynamic range levels that will be competi-
tive with existing large area IRFPAs such as current hybrid arrays.

B. MOSFET Switch Readouts

‘COMMON
The basic structure of the MOSFET switch readout [93], [94] COLUMN SWITCH
is shown in a very simplistic form in Fig. 12. Each photodiode
Fig. 13. Simplified schematic of a CID showing a 3 X 3 array

zy
detector is shown connected in parallel to a storage capacitor with row and column scanners.

what similar to the MOSFET switch readout discussed above, but

-
U

L5cK
$E
a?
Z P
$3
A =
4 0
o z
E 4
zyxwvutsrqpon
zyxwvutsrqponmlkjihgfedcbaZ
with extra switches on the row and column lines to control the
charge transfers needed within the unit cells. For IRFPA’s, the
CID readout has been designed typically as a pseudomonolithic
array with the MIS detector structures fabricated on narrow band-
gap semiconductor material and the row scanner and the column
scanner fabricated as silicon chips which are bonded to row and
column input pads on the detector array. The advantages of this
configuration are that no diodes or transistors need to be formed
w
in the narrow bandgap semiconductor and the entire device can
I , , be epoxied on a ceramic carrier for mounting inside the dewar.
: : I
A number of different readout methods have been devised for
Fig. 12. Simplified schematic ot a MOSFET switch readout the CID. In the early CID’s (fabricated as MOS silicon devices)
rudimentary readouts were sequenced by selecting a pixel (after
integrating the optical signal) in such a manner that the photo-
located in the unit cell. A digital horizontal scan register (usually generated charge is stored completely under the column gate
fabricated on the chip) is shown at the top of the figure and a which is biased into deep depletion to form a potential well (the
multiplexer is shown on the left. A column of diodes and storage row gate is set to zero volts). All other pixels in the selected
capacitors is selected one at a time by the scan register. Simul- column have charge stored under both the row gate and the col-
taneously, a row bus is selected by the vertical scan register. In

this manner, each pixel can be addressed individually in sequence.
The signal charge removed from the individual pixels is trans-
ferred into the multiplexer for readout.
The MOSFET switch readout has several desirable properties.
First, the circuit density can be quite high leaving more room for
zyx
umn gate. The voltage on the column gate is then removed and
the potential well under the selected pixel collapses and the stored
charge is injected into the bulk semiconductor. These carriers
recombine causing a proportional displacement current which can
be sensed by the external circuitry. The major problem with the
read-on-inject approach is that the potential well under the col-

80 PROCEEDINGS OF THE IEEE, VOL 79. NO I . JANUARY 1991

~ -~ ~~ ~~
 umn gate does not immediately retum to the substrate potential
after injection because of charge trapping. Furthermore, sensing
injected current from an interconnect to the bulk substrate is an
inherently noisy process. Both these problems are particularly
more acute in narrow bandgap semiconductor CID’s than in com-

zyxwvutsrqp
zyxwvuts
parable silicon devices.
To avoid the problems of read-on-inject sensing schemes, the
signal can be detected by sensing the column line voltage before
and after injection while the voltage on the column line is allowed
to float. This is called the ideal mode scheme [97] and is shown

zyxwvutsrqponmlkjihgfedcbaZ
in Fig. 14(a). In other readout schemes, the injection pulse is not

zyxwvutsrqponmlkjihg
y&EG”
zyxw
C R C R

COLUMN

Fig. 15. Charge imaging matrix consisting of an M X N MIS

detector array.

(a) zyxwvutsrqp
$e
(b)
Fig. 14. Sequencing of CID potential wells for (a) the ideal mode
readout and (b) the SRI mode readout.
Field
Plate

III I
Detector Gate
senre Diode

reduced completely to a zero voltage value; instead an intetme-

diate bias level is used during injection to provide just enough
potential well depth to avoid dropping below the MIS strong
inversion threshold potential. As a result, a bias charge is always
II
present under the column gate which serves to saturate the MIS
surface states thus improving charge transfer speeds and noise
levels. Another problem with the ideal mode readout scheme is
that the charge storage capacity of either the row or the column
Transfer Gate /
gate must have a large enough capacity to store the entire pho-
togenerated signal charge (plus any dark current).
The sequential row inject (SRI) readout shown in Fig. 14(b) is : i e l d Plarc D e t e c t o r Gate T r a n s f e r Gate

one approach to overcoming the limitations of the ideal mode

2”s
readout discussed above. It uses the same techniques of voltage
ZnS
sensing before and after injection as well as charge sharing
Oxide
between the two gates to make better use of available charge stor-
age capacity.
In general, well-designed CID’s have the inherent advantage n+ Sense Diode

of rapid readout because charge is sensed as a change in potential Fig. 16. Plan view and cross-sectional view of a CIM device

zyxwvutsrqponm
at each site and large numbers of charge transfers are avoided.
On the other hand, sensing of changes in column potential can
limit the ultimate size of the array. Because a large number of

zyxwvutsrq
pixels increases the node capacitance of the column line, this
increases the kTC noise level during the sensing process. Also,
with an increase in node capacitance (and no change in the num-
ber of photon generated charge carriers), there would be an asso-
ciated decrease in the output voltage.
D. CIM Readouts
The CIM [98] consists of an array of MIS photodetectors as
shown in Fig. 15 wire bonded in a pseudomonolithic design to
silicon processing chips. A plan view and cross sectional view of
an individual pixel is shown in Fig. 16. The individual pixels are
composed of semitransparent electrodes for collecting the photon
generated charge during an optical integration period. Narrow
diode channels are formed (typically by ion implantation) as con-
tinuous linear columns beside the MIS detectors. The diode col-
umns are used as output nodes for draining charge collected in
the individual MIS detectors. The controlled flow of charge from
under the MIS detector gate into the diode column, is by a trans-
fer gate. The full device can also be designed with a field plate
to control the surface potential and electric field at the edges of
the MIS detectors and the diode columns.
In operation, an MIS detector is biased into deep detection to
create a potential well in which incident photons are captured and
the resulting photogenerated charge carriers are stored. After an
appropriate integration time the transfer gate is biased into slight
depletion and the diode column of the selected pixel is reverse
biased (using off chip electronics) and allowed to float. Next, the
voltage on the detector gate is tumed off and the potential well is
collapsed and the stored charge is drained under the transfer gate

SCRIBNER er al. IRFPA TECHNOLOGY

-~ ~-
into the diode column. Because the diode is in the float mode. a
measurable potential change on the diode occurs proportional to
the collected charge. The change in potential of the diode is sensed
with an off-chip voltage amplifier in the form of a source follower
and preamp.
Because of inherent charge storage limitations in MIS detec-
tors, the design must carefully take into account the projected flux
zyxwvutsr
levels which the MIS detector will need to handle for a given
integration time. A related factor is that the design and operation
of the diode column must be such that it can be reverse biased a
few tenths of a volt so that when the photogenerated charge is
transferred into the diode it does not shift into the forward bias
region. This is of course dependent upon the I( V ) characteristics
of the diode and the degree to which it can be reverse biased
before leakage currents become a limiting factor.
The readout sequence of a CIM device is generally performed
zyxwvutsrqpo
by electronically scanning the MIS detector rows while synchron-
ously sensing and multiplexing the output voltages of the diode
columns. The majority of developmental work performed on the
CIM concept has been aimed at HgCdTe devices using p-type
bulk or LPE starting material. CIM devices have recently been
fabricated as large as 128 X 128 element MWIR staring arrays
and 480 X 4 element LWIR arrays 1991. These designs are very
demanding in terms of obtaining successful yields. The starting
material must by very pure (to minimize leakage in the MIS
detectors and the diode columns) and the insulator materials must
be highly controllable to support multilevel gate structures with-
out breakdown or catastrophic shorts. Ultimately the CIM con-
cept has good potential for fabricating very large area arrays,
however. improved interface techniques are necessary beyond its
present configuration as a pseudomonolithic device with wire bond
interconnects.
VI. IRFPA SIGNAL
PROCESSING
Generally, IRFPA signal processing for advanced IR systems
includes nonuniformity correction [ IOO]. [ IOI]. gain control, spa-
tial filtering for point or edge enhancement, thresholding, motion
detection, and image segmentation. These signal processing func-
tions require that arithmetic operations be applied to every pixel
and often include local neighborhood operations. The number of
operations for even a very simple signal processing system work-
ing with a 256 X 256 array at a 100-Hz frame rate can exceed
IO9 arithmetic operations per second.
Analog sampled outputs from an IRFPA are usually multi-
plexed through the dewar walls in a serial fashion and the serial
processing which follows often causes a processing bottleneck.
Because the information is integrated on the focal plane array in
parallel fashion, many workers have been interestcd in perform-
ing some of the processing directly on the focal plane before leav-
ing the dewar. The size, weight, and power (cooling) constraints
require very innovative designs.
Because CCD’s are used extensively for signal processing in
many applications and also for readouts in IRFPA applications.
one approach has been to explore CCD’s to perform spatially par-
allel image preprocessing on the focal plane in the analog charge
domain. Because the charge handling capacity of most CCD’s is
limited to about IOh to IO7 carriers per pixel. the signal from an
IR scene with its characteristic high background and IOW contrast
can easily exceed the maximum capacity. To alleviate this prob-
lem, various forms of gain control have been attempted. As was
discussed in Section IV, on-chip signal processing functions (other
than multiplexing itself) often involve background suppression.
82
In the charge skimming approach [ 1021, suppression is accorn-
plished by controlling the gate voltages so that only a fraction of
the integrated charge in the storage well is transfered to the read-
out CCD. The maximum amount of charge that can be skimmed
is limited by the nonuniformity of the individual elements and the
intrascene dynamic range.
Another on-chip technique to alleviate the charge capacity
problems with the CCD multiplexer is charge partitioning [ 1031.
In this approach the storage area is contained undcr three gates
which integrate the photocurrent. After charge integration, the
center gate (which is very narrow) is raised to separate a smaller
charge packet under the smaller gate near the CCD multiplexer
from the larger charge packet contained under the larger gate near
the detector. The charge is divided according to the area of the
gates and the smaller packet is read out while the larger packet is
discarded using a drain. The same drain often performs anti-
blooming charge control.
Charge coupled computing devices have been demonstrated
[ 1041 to perform general purpose arithmetic functions such as
addition, subtraction, and amplitude comparison. This requires
the use of three-dimensional charge coupling. which involves
vertical coupling between the charge on the electrode and the
charge in the channel. Although charge coupled computing
devices have interesting processing characteristics, and relatively
low noise and power. little area is available in the unit cell of a
high density IRFPA device.
The ability to have a large amount of real estate per unit cell
for low power circuit designs is realized more readily with a
Z-technology architecture as was discussed in Section 11. Devel-
opmental IC test chips are being fabricated with amplifier, low
pass anti-aliasing filter, and a 13-bit analog-to-digital convertor
per detector channel [ IOS]. Transimpedance amplifiers with a
100-dB dynamic range have been fabricated with a chopper sta-
bilized design. These amplifiers are highly desired for detector
readouts but require more real estate than is available in most
IRFPA architectures. They dissipate about 3 pW per detector
channel at a frame rate of 1000 Hz. CID and CIM architectures
allow similar designs of the amplifier. filter, and other on-focal-
plane signal processing with one channel per column of detectors
instead of one per detector [98, p. 691.
The desire to develop lower cost more producible silicon read-
outs with higher dynamic range has generated a movement toward
CMOS readout circuits. This approach is an extension of the
switch readout in Section V . Another possible analog VLSI tech-
nique includes the JFET-CMOS technology for on-chip signal
processing to achieve lower noise and power dissipation, as well
as higher density fabrication.
Development of most on-chip signal processing is still in the
conceptual stage and requires additional engineering to yield
producible IRFPA’s. There is. however, interest in even more
zyxwvutsr
advanced circuits such as neural networks or two-dimensional fil-
ters that might be implemented on chip. This area is expected to
grow rapidly once the accepted techniques for IRFPA readouts
are established.
VIII. SUMMARY
The emphasis of future IRFPA development will continue to
be for larger area. smaller pixel, higher sensitivity devices which
will serve as the basic components for advanced imaging sys-
tems. Future developmental progress will be achieved primarily
by incorporating advances in materials growth technologies and
innovations in microelectronics. Even though considerable prog-
ress has been made in IRFPA fabrication, some of the more excit-
P R O C E E D I N G S OF THE IEEE. VOL 7Y. NO I . J A N U A R Y 1991
ing new technologies such as heteroepitaxy of narrow bandgap
semiconductors and submicron lithography are only now entering
into future design considerations.
In the first two decades of IRFPA development, researchers
have explored advanced detector concepts, novel materials, and
array architectures. The next decade will focus on process
improvement and producibility of demonstrated IRFPA’s and
development of larger arrays using smaller feature sizes and
zyxwvuts
advanced heteroepitaxial materials. Although progress has been
somewhat slow on LWIR HgCdTe material, it continues to offer
the most advantages and highest performance. Hybrid and mon-
olithic architectures will still compete but both will rely heavily
on advanced material growth techniques (LPE, MOCVD, and
MBE) to obtain larger areas and better uniformity. In the case of
zyxwvutsrqp
hybrids, altemate detector substrates (in particular, Si) will help
zyxwvutsrq
reduce previous thermal mismatch problems between the detector
array and the multiplexer. Growth of narrow bandgap semicon-
ductors as isolated detectors on combined Si multiplexer sub-
strates promises to provide new monolithic arrays that would have
many advantages in terms of large area ( >25* mm2) and pro-
ducibility. Z-plane architectures will continue to be of interest for
zyxwvutsrqpo
their long term potential to perform on-chip signal processing and
will benefit from all improvements in conventional flip-chip hybrid
architectures.
Advanced material growth techniques have also made possible
the fabrication of superlattice devices. The early III-V superlat-
tice IR detector candidates are GaAs /AIGaAs detectors and the
strain layer superlattice of InSb /InAsSb. Ultimately, superlat-
tices offer potential in the important area of LWIR detectors where
greater bandgap control is possible (as compared to alloy detec-
tors like HgCdTe). Also, electron effective mass can be tailored
by adjusting layer thickness. Increasing the effective mass reduces
dark current and tunneling thus increasing sensitivity. Higher
operating temperatures should therefore be possible.
In the area of MWIR detectors, HgCdTe and InSb IRFPA’s
are available with high detector density and very high quantum
efficiency. Nevertheless, PtSi arrays with very low quantum effi-
ciency are attractive because of their excellent uniformity, good
linearity, and low cost. Their overall performance for ambient
thermal imagery approaches that of some high quantum efficiency
arrays. Other silicide materials such as IrSi or PtIrSi promise to
extend the Schottky barrier cutoff wavelength into the area of the
LWIR, but ultimate arrays would need to be operated at temper-
atures significantly below that of liquid nitrogen.
Finally, all the developmental problems discussed above will
zyxwvutsrqponm
need to be further resolved in terms of producibility and reliabil-
ity. The availability of high-performance low-cost arrays will
make possible many new applications of advanced IR imaging
systems in astronomy [106], remote sensing [107], (1081, space
sciences [109], meteorology [110], military [88, p. 1841, medical
[ l l l ] , and industrial systems [112]. Based on the trend lines
shown in Fig. 2, array format sizes (no. of pixels) could continue
a doubling period of every 18 months given appropriate emphasis
zyxwvutsr
zyxwvutsrqponm
and funding.
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Dean A. Scribner received the B.S. degree
from Marist College, Poughkeepsie, NY, and
the M.S. degree from Fordham University,
Bronx, NY, both in physics. In 1982 he received
the Ph.D. degree from Georgetown University,
Washington, DC where his research included
the effects of heavy doping on the electronic
propertied of narrow band semiconductors.
Since 1983 he has been a Research Scientist
in the Optical Sciences Division of the Naval
Research Laboratory. His current research
interests are in infrared detectors, focal plane arrays, and associated image
processing techniques.
Melvin R. Kruer received the B.A. degree
from Bellarmine College in 1964 and the M.Sc.
and Ph.D. degrees from The Catholic Univer-
sity of America in 197I , all in physics.
After completing the Ph.D. degree he joined
the optical sciences division of the Naval
Research Laboratory. His research interests are
in the areas of infrared focal plane arrays,
advanced sensor concepts, and optical counter-
measures against infrared components and sys-
tems.
Joseph M. Killiany (Member, IEEE) received
the Ph.D. degree in physics from Georgetown
University, Washington, DC, in 1973.
In 1972 he joined the Functional Devices
Section of the Naval Research Laboratory as a
staff physicist, where he worked on radiation
effects and hardening of charged coupled
devices. In 1979 he became Head of the Section
and manager of the Infrared Focal Plane Array
Exploratory Development Project. Since 1984
he has been Head of the Solid State Devices
Branch in the Electronics Science and Technology Division. He is respon-
sible for the in-house execution of a multidisciplinary program of basic
and applied research in infrared materials and detectors, radiation effects
and hardening of silicon integrated circuits, silicon-based MBE materials
and devices, and integrated signal processing circuits. He serves as the
Subblock Manager for the Navy’s principal exploratory development pro-
gram in Infrared Focal Plane Arrays. He is the Navy’s Technical Director
for the DARPA IR Focal Plane Array Producibility Program. He has 25
technical publications.
Dr. Killiamy is a member of the Navy’s Member on Group B of the
Advisory Group on Electron Devices (AGED). He is also Chairman of
the IRIS Infrared Detector Specialty Group.
85