2200030030

KONERU LAKSHIMAIAH
K eo1OrUNIVERSI
EDUCATION FOUNDATION
(Deemed to be University, Estd. u/s. 3 of UGC Act 1956)

B.Tech Even Sem : Semester in Exam-I

Academie Year:2021-2022
21EC1202 - Computer Organization & Architecture
Set No: 2
Time: Max.Marks: 50
S.NO Answer All Questions Choice Options Marks Co CO CC
BTL BI
Define Bus and Explain different types of Buses. choice 4.5Marks coi 2 1
Q-2
Provide the assembly language zero-address instructions for
thegive expression: (A+B+C+D) /4 4.5Marks CO1 2 2
Emphasize the significance of Program Counter in
. Subroutine and demonstrate the Subroutine proess with an choice
example.
d
4 8Marks COi 2
Design an ALU (with any 4 operations) using the suitable
combinational logic circuit/s. 8Marks coi 2 2
List out different addressing modes and
of them in detail. List out the different
explain at least two choice
instruction set of a 12.5Marks|CO1 2
processor. Q-6
llustrate diferent types of operations in
instruction set. |12.5Marks CO1 2 2
List out the common
Micro-operations with one example choice
each
Q-8 4.5Marks CO2 2
Explain the four essential registers required for instruction
s.
execution. 4.5Marks CO2 2 2

9 Illustrate in detail about Microprogrammed control unit choice

Q-10 8Marks Co22
10 Interpret the significance of CPU Registers in Program
Execution. 8Marks CO2 2
1llustrate Instruction Cycle with neat
sketch. Briefly report
U the significance of the internal structure of CPU with the choice
suitable block diagram. Q-12 12.5Marks co2 2
1
Explain the each function of Hardwired control unit with
ncat block diagram
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12.5Marks co22 2

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 05/05/ 2022, 22 23

KONERU LAKSHMAIAH

EDUCATION FOUNDATION
UGC Act 1956)
Estd. u/s, 3 of
P B E U N I V E R S I T Y ) (Deemed tobe University,
Exam-1l
B.Tech Even Sem : Senmester in
Academle Year:2021-2022
& Archilecture
21EC1202 -
Computer Organization
Set No: 2
Max.Marks: 50
Time: Co CO COL
Choice Options Marks
S.NO Answer Al Questions CoBTL BTL
Why an 10 device is not directly conmected to the systein choice 4.5Marks Co 2
ius. Q-2
Draw the block diagram of 1/0 module and explain each 4.5Marks CO3 2
block briey.
1lustrate the physical characteristics of disk with suitable choice
Q-4
8Marks cO3 2
diagrams.
Cempare Strobe and Handshaking data transfer methods
using appropriateblock diagrams
8.Marks CO3 2
Mention different types of 1/O subsystems and IIlustrate |choice
the Interupt Driven 1/0 subsystem along with Daisy 12.5Marks CO3 2
Chain priority interrupt. Q-6
What is DMA ? Explain memory transfer operation using
DMA controller in detail. 12.SMarks Cos 2 2
illustrate compiler based register optimization with neat choicc
7.
sketch. Q-8 4.5Marks C04 3
8 Compare RISC and CISC architectures.
4.5Marks co43
9.
Explain conventional sequential execution and pipelining |choice
execution and write advantage of pipelining execution 10 8Marks co43
19. |Discuss in detail about the deta hazard, structural hazard
and branch or control hazard with an example cach. 8Marks co4|32
J.1. Explain the concept of pipeline with timing diagram and choice
flow chat. 0-12 |12.5MarksC043
12 Ilustrate the inmplementation of four stage pipeline with
he timing diagram 12.5Marks C04 3
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KONERU
KONERU LAKSHMAIAH
EDUCATION FOUNDATION
1956)
Estd. u/s. 3 of UGC Act
(Deemed to be University,
OEMED TO BUNIVERSITY)
Evam-l
B.Tech Even Sem: Semester in
Academic Year:2019-2020

& ARCHITECTURE
19EC1202 - COMPUTER ORGANIZATION
Set No: 2
Max.Marks: 50
Time: Choice Marks CO CO
BTL COI
BTL

S.NO Answer All Questions

List out the ditferent types of instruction sets of a

3Marks CO2
processor.
subroutine ith
lustrate the execution process of a 3Marks CO12
an example.
performed by CPU when an
Interpret the task 3Marks C022
instruction is executed.
the registers involved during instruction 3Marks C02 2
Specify
cyele.
Briefly discuss the different programming SMarks C01
echniques.
the working of PUSH and POP 5Marks CO1 2
Interpret
instructions.
execution
Discuss the instruction interpretation and 5Marks CO22
process with neat sketch.

Briefly explain general purpose and special purpose 5Marks CO2 2

8. registers in CPU.
and explain its choice
Draw the block diagram of ALU 9Marks Coi2 2
9. Q-10
operation with its functional table.
direct and register
10.
Explain immediate, register, 9Marks CO1 2
indirect addressing modes with example.
lustrate register organization of CPU and explain choice
11.
9Marks CO22
how data is obtained and stored in a register. Q-12
Discuss about the different types of primary and
12 secondary memory of a computer.
9Marks CO22
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 Student Id: Student Name:

K KONERU LAKSHMAIAH
EDUCATION FOUNDATION
tDEEMEDTODEUN IVERSITY) (Deemed to be University, Estd. u/s. 3 of UGC Act 1956)

Academic year: 2019-20

Sem-End Examinations, Nov-Dec 2019
B. Tech. (ECE,EEE,ECM,CSE), 2019 Batch
I Yr, 2nd Semester
Subject Code: 19EC1202 Subject Name:Computer Organization andArchitecture
Time: 3 hours Max. Marks: 100
(Assume any missing data suitably and design adequate hypothesis, if required)
Part-A (4X 10M=40M)
Answer ALL Questions
Q. No.1.a to 1.h Preferred to be at lower BTL than the Max BTL, No sub questions
1. Answer all questions each CO have internal choice.
T a. Discuss how PUSH and POP is performed in a stack.
(10M)
1b.
(OR)
Illustrate the operation of address bus, data bus and control bus
(10M)
I c. Interpret the basic instruction cycle of a processor.
(10M)
(OR
1d. Discuss the different cache replacement policy.
(10M)
1e. Discuss the steps involved during I/O interaction with processor. (10M)
1f.
(OR)
Briefly describe about Program controlled I/O transfer.
(10M)
1g. Briefly discuss the characteristics of CISC Architecture.
(10M)
(OR)
1h. Explain the effect of data hazard with
example. (1OM)
Part-B (4 X 15M=60M)
Answer ALL Questions
Q. No. 2 to 4 Preferred to be at lower BTL than the Max BTL, No sub
2. Answer
questions and have a internal choice
2(a) 2(b)
or

2.a Explain the various basic components constitute the

computer system with neat sketch |
(15M)
(OR)
2.b Briefly discuss the various addressing modes of a
3 Answer 3(a) or 3(b) processor with example (15M)
3.a Describe Micro programmed control CPU design with neat sketch. (15M)
(OR)
3.b
Briefly discuss the various types of registers in CPU (15M)
4. Answer 4.(a) 4 or (b)
4.a
Explain the architecture and operation of DMA controller with its block
(15M) diagram
4.b (OR)
Explain interrupt control I/O with neat sketch
5. Answer 5(a) or 5(b) (15M)
5.a Briefly explain about parallel computing and list its merits
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(OR)
5.b Explain how instruction
pipelining is performed with example (1 5M)
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 Question Bank Test 1
/1. List out the various specifications used to represent the computer system

configurations.
A. Differentiate assembly language, machine level and high level programming.
Sketch the Van Neuman architecture and explain it in brief.
Explain about the memory unit and control unit of a computer with its significance.
5 Specify the importance of cache memory.
6. 1llustrate the basic instruction cycle of a processor.
.Describe the bus system of CPU with appropriate diagrams.
Explain the paging concept in CPU design.
9Describe the set-associative mapping technique with neat sketeh.
10.
Briefly explain Uni level-programming and Multi level-programming
11. Explain the structure of ALU and illustrate the various arithmetic/logical operations it
peiforms.
12. Discuss the micro-operation transfer in parallel and serial modes.
13. Briefly explain the usage of Virtual memory with an example.
4 . Ilustrate the execution process of a subroutine with
example. an

13.Interpret Machine level programming and High-level programming. Also provide the
operation of the following instructions 1) BRP X 2) BRN X3) BRZX 4) BRO X
16. Discuss about primary and secondary memory devices of a computer.
(17)Compare the different cache mapping techniques available. Also discuss the cache
replacement policies
38. Interpret the words computer architecture and computer organization. Relate the
attributes.
19. List out the different instruction set of a processor.
200ifferentiate register addressing mode with implied addressing mode.
21. Illustrate instruction
interpretation and execution.
22. Compare the operation of stack
pointer and program counter.
23. Draw the block diagram of ALU for the operations like Addition, Subtraction, AND, NOR
apd explain the ALU function table.
24 Explain immediate, register, direct, register indirect and implied addressing modes with
examples.
25. Specify the sequence of operation involved when an instruction is executed.
2. List the different types of semiconductor memory.
27.Give the importance of a program status word.
28. Explain the basic components of computer system with a neat sketch.
29Aist out different addressing modes and explain at least two of
them

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 the suitable block
of the internal structure of CPU with
30. Briefly report the significance
diagram.
31. Differentiate between main memory,
cache memory and virtual memory.

in brief about address bus, data bus

and control bus.
32. Discuss
influences the subroutine call and return.
33. Explain about stack and how it and Hardwired control CPU design.
CPU design
34. Explain Micro programmed control
35. Give the formats of different micro instructions.
36. Explain the operations of MAR and MDR
37. List out the different types of ROM's.

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