Wistron 18796-SC Rev A00

5 4 3 2 1
https://vinafix.com
D D
Ben solo AMD Schematics

Picasso
C 2018-12-28 C
REV : A00
B B
A DY : None Installed <Core Design> A
UMA: UMA only installed Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
OPS: DISCRTE OPTIMUS installed Title

Taipei Hsien 221, Taiwan, R.O.C.
Cover Page
Size Document Number Rev
A3
Bensolo AMD A00
Date: Friday, December 28, 2018Sheet Sheet 1 of 106
5 4 3 2 1
5 4 3 2 1
Project code: 4PD0GP010001 SENSOR Bucky IO IO MB

PCB P/N: 18796
Revision: SC Ben Solo AMD Block Diagram 18B26 18B58
https://vinafix.com
18B25 18796
DDR4 2400
GPU AMD APU DDR4 2400MHz Channel A
VRAM(GDDR5) *2 SODIMM A
D
GDDR5 PCIe (Gen3) x4 12 D
R19M-M18-70
2GB
18W Picasso
81,82
DDR4 2400
76,77,78,79,80
15W DDR4 2400MHz Channel B
BGA-1140pin SODIMM B
13
14" FHD eDP x2
R5 / R7 (TYPE1)
Touch Panel I2C
55 DDR4 To USB Hub USB2.0
DDI (x4) NGFF WLAN
PCIE GEN3 I/F (GFX 1x8)
PCIE GEN3 I/F (GPP 6x1) PCIe (Gen1) x1 61
GPP/ SATA x2
HDMI 1.4b HDMI USB 2.0(x6)
USB 3.0(x3)
57 HD AUDIO
SPI I/F
LPC I/F
eSPI I/F M.2 SSD
PCIe (Gen3) x4 NGFF/NvMe
Control Signal CCG4
CYPRESS 63
C
CYPD4126 I2C C
72
(To KBC) I2C
USB3.1 Type-C R3 / Athlon(TYPE2) I2C Sensor Board

DP 1.2 / USB 3.1 DDR4
DDI (x3)
MUX PCIE GEN3 I/F (GFX 1x4) Sensor Hub E-compass
DP AUX DP AUX ST
NXP PCIE GEN3 I/F (GPP 4x1)
73 NX3DV221 SATA x2 ST LIS2MDL
USB 2.0(x6) To USB Hub USB2.0 I2C
USB 3.0(x2) STM32L151
HD AUDIO (Reserved)
Gyro+G
ST
MB side SPI I/F 69
USB3.1 x1 LPC I/F LSM6DS3
USB4(USB3.1) eSPI I/F
35
USB2.0 x1
Universal Jack
MB side
USB3.1 x1 HP_R/L
USB3(USB3.1) USB PowerShare
TI USB2.0 x1 Camera MIC_IN/GND
35
TPS2544RTER 36 USB2.0 x1 Digital MIC
B 2CH SPEAKER B
SATA Re-driver Audio Codec (2CH 2W/4ohm)

HDD SATA (Gen3) x1
SN75LVCP601 60
SATA (Gen3) x1
HDA Realtek
60
ALC3204 27
29
IO Board Free Fall Sensor I2C
LPC debug port

Finger Printer LPC BUS 68
USB2.0 x1
with Power Button
To Sensor Hub
USB2.0 KBC
CardReader I2C To CCG4
SD Card Slot Realtek RTS5144 USB2.0 x1 Nuvoton
USB Hub To Bluetooth SPI
NPCE385 24
USB2.0
GENESYS Flash ROM
A GL850G 16MB A
Quad Read PS2

USB2(USB2.0) USB2.0 x1
25
USB2.0 Fan Control Int. <Core Design>

38 Touch PAD KB
I2C PWM 26
Image sensor Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LAN 10/100 PCIe (Gen1) x1
RJ45 Conn. FAN Title

REALTEK RTL8106 Block Diagram
A2 Bensolo AMD A00
Date: Friday, December 28, 2018 Sheet 2 of 106
5 4 3 2 1
5 4 3 2 1
SSID = PCH
GFX & GPP, 85Ω https://vinafix.com
GPU CPU1B 2 OF 13
[76] GFX_PCIE_RX_N0 PCIE
[76] GFX_PCIE_RX_P0
[76] GFX_PCIE_TX_N0
GFX_PCIE_RX_P0 P8 N1 GFX_PCIE_TX_C_P0 C313 1 GFX_PCIE_TX_P0
[76] GFX_PCIE_TX_P0
GFX_PCIE_RX_N0 P9 P_GFX_RXP0 P_GFX_TXP0 N3 GFX_PCIE_TX_C_N0 C314 1
PX22 SCD22U10V2KX-2-GP
GFX_PCIE_TX_N0
P_GFX_RXN0 P_GFX_TXN0 PX SCD22U10V2KX-2-GP
[76] GFX_PCIE_RX_N1
GFX_PCIE_RX_P1 N6 M2 GFX_PCIE_TX_C_P1 C315 1 GFX_PCIE_TX_P1
D [76] GFX_PCIE_RX_P1
GFX_PCIE_RX_N1 N7 P_GFX_RXP1 P_GFX_TXP1 M4 GFX_PCIE_TX_C_N1 C316 1
GFX_PCIE_TX_N1
D
GPU PX
[76] GFX_PCIE_TX_N1 SCD22U10V2KX-2-GP
P_GFX_RXN1 P_GFX_TXN1
[76] GFX_PCIE_TX_P1
GFX_PCIE_RX_P2 M8 L2 GFX_PCIE_TX_C_P2 C317 1 GFX_PCIE_TX_P2
GFX_PCIE_RX_N2 M9 P_GFX_RXP2 P_GFX_TXP2 L4 GFX_PCIE_TX_C_N2 C318 1
GFX_PCIE_TX_N2
[76] GFX_PCIE_RX_N2 P_GFX_RXN2 P_GFX_TXN2 PX SCD22U10V2KX-2-GP
[76] GFX_PCIE_RX_P2
GFX_PCIE_RX_P3 L6 L1 GFX_PCIE_TX_C_P3 C319 1 GFX_PCIE_TX_P3
[76] GFX_PCIE_TX_N2
GFX_PCIE_RX_N3 L7 P_GFX_RXP3 P_GFX_TXP3 L3 GFX_PCIE_TX_C_N3 C320 1
GFX_PCIE_TX_N3
[76] GFX_PCIE_TX_P2 P_GFX_RXN3 P_GFX_TXN3 PX SCD22U10V2KX-2-GP
[76] GFX_PCIE_RX_N3 K11 K2

J11 P_GFX_RXP4 P_GFX_TXP4 K4
[76] GFX_PCIE_RX_P3 P_GFX_RXN4 P_GFX_TXN4
[76] GFX_PCIE_TX_N3
[76] GFX_PCIE_TX_P3 H6 J2
H7 P_GFX_RXP5 P_GFX_TXP5 J4
G6 H1
F7 P_GFX_RXP6 P_GFX_TXP6 H3
SSD M.2 (PCIE) G8
P_GFX_RXP7 P_GFX_TXP7
H2
[63] SSD_PCIE_RX_P0 F8 H4
[63] SSD_PCIE_RX_N0
[63] SSD_PCIE_RX_P1
[63] SSD_PCIE_RX_N1
SSD_PCIE_RX_P0 N10 N2 SSD_PCIE_TX_C_P0 C305 1 2 SCD22U10V2KX-2-GP SSD_PCIE_TX_P0
SSD_PCIE_RX_N0 N9 P_GPP_RXP0 P_GPP_TXP0 P3 SSD_PCIE_TX_C_N0 C306 1 2 SCD22U10V2KX-2-GP SSD_PCIE_TX_N0
[63] SSD_PCIE_RX_P2 P_GPP_RXN0 P_GPP_TXN0
[63] SSD_PCIE_RX_N2
SSD_PCIE_RX_P1 L10 P4 SSD_PCIE_TX_C_P1 C307 1 2 SCD22U10V2KX-2-GP SSD_PCIE_TX_P1
[63] SSD_PCIE_RX_P3 P_GPP_RXP1 P_GPP_TXP1
SSD_PCIE_RX_N1 L9 P2 SSD_PCIE_TX_C_N1 C308 1 2 SCD22U10V2KX-2-GP SSD_PCIE_TX_N1
[63] SSD_PCIE_RX_N3
M.2 SSD (PCIE) P_GPP_RXN1 P_GPP_TXN1
C
[63] SSD_PCIE_TX_P0
Modify For Support Type 2 CPU 8/19 SSD_PCIE_RX_P2 L12
P_GPP_RXP2 P_GPP_TXP2
R3 SSD_PCIE_TX_C_P2 C309 1 2 SCD22U10V2KX-2-GP SSD_PCIE_TX_P2 M.2 SSD (PCIE) C
SSD_PCIE_RX_N2 M11 R1 SSD_PCIE_TX_C_N2 C310 1 2 SCD22U10V2KX-2-GP SSD_PCIE_TX_N2
[63] SSD_PCIE_TX_N0 P_GPP_RXN2 P_GPP_TXN2
[63] SSD_PCIE_TX_P1
SSD_PCIE_RX_P3 P12 T4 SSD_PCIE_TX_C_P3 C311 1 2 SCD22U10V2KX-2-GP SSD_PCIE_TX_P3
[63] SSD_PCIE_TX_N1 P_GPP_RXP3 P_GPP_TXP3
SSD_PCIE_RX_N3 P11 T2 SSD_PCIE_TX_C_N3 C312 1 2 SCD22U10V2KX-2-GP SSD_PCIE_TX_N3
P_GPP_RXN3 P_GPP_TXN3
[63] SSD_PCIE_TX_P2
[63] SSD_PCIE_TX_N2
[63] SSD_PCIE_TX_P3
LAN_PCIE_RX_P V6 W2 LAN_PCIE_TX_C_P Bucky2 SCD1U16V2KX-3DLGP
C333 1 LAN_PCIE_TX_P
[63] SSD_PCIE_TX_N3
LAN LAN_PCIE_RX_N V7 P_GPP_RXP4
P_GPP_RXN4
P_GPP_TXP4
P_GPP_TXN4
W4 LAN_PCIE_TX_C_N C363 1 2 SCD1U16V2KX-3DLGP LAN_PCIE_TX_N LAN
W LAN_PCIE_RX_P T8 W3 W LAN_PCIE_TX_C_P Bucky2 SCD1U16V2KX-3DLGP
C303 1 W LAN_PCIE_TX_P
WLAN W LAN_PCIE_RX_N T9 P_GPP_RXP5 P_GPP_TXP5 V2 W LAN_PCIE_TX_C_N C304 1 2 SCD1U16V2KX-3DLGP W LAN_PCIE_TX_N WLAN
HDD P_GPP_RXN5 P_GPP_TXN5
[60] HDD_SATA_RX_N R6 V1
R7 P_GPP_RXP6/SATA_RXP0 P_GPP_TXP6/SATA_TXP0 V3
[60] HDD_SATA_RX_P P_GPP_RXN6/SATA_RXN0 P_GPP_TXN6/SATA_TXN0
[60] HDD_SATA_TX_N
HDD_SATA_RX_P R9 U2 HDD_SATA_TX_P
[60] HDD_SATA_TX_P
HDD HDD_SATA_RX_N R10 P_GPP_RXP7/SATA_RXP1
P_GPP_RXN7/SATA_RXN1
P_GPP_TXP7/SATA_TXP1
P_GPP_TXN7/SATA_TXN1
U4 HDD_SATA_TX_N HDD
LAN FP5 REV 0.90
PART 2 OF 13
[66] LAN_PCIE_RX_N RAVEN-BRIDGE-GP
[66] LAN_PCIE_RX_P CPU
[66] LAN_PCIE_TX_N 1st = 071.RAVEN.000U
[66] LAN_PCIE_TX_P
B WLAN B
[61] W LAN_PCIE_RX_N
[61]
[61]
W LAN_PCIE_RX_P
W LAN_PCIE_TX_N
PCIe
[61] W LAN_PCIE_TX_P P_GFX port Device CLKREQ#
0
1 NC
2
3
4
5 NC
6
7
PCIe
P_GPP port Device CLKREQ#
0 M.2 SSD
1 M.2 SSD
2 M.2 SSD
3 M.2 SSD
4 LAN 1
5 WLAN
6 NC
7 HDD
A <Core Design> A
Wistron Corporation
Title
Title
Size
CPU (PCIE/SATA)
DocumentNumber
Number Rev
Size Document Rev
A3
Bensolo AMD A00
Date:
Date: Friday, December 28, 2018 Sheet Sheet 3 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A
Title
CPU (RSVD)
A4
Bensolo AMD A00
5 4 3 2 1
SSID = CPU APU Type 2 does not support Channel A

ADD, CMD, CTL, 40Ω https://vinafix.com
DATA CHECK, 50Ω
DDR4 Misc. 40~60Ω
[12] M_A_A0 [12] M_A_DQ0 Channel A to SO-DIMM DDR CLK, 72Ω
[12] M_A_A1 [12] M_A_DQ1 DQS, 80Ω
[12] M_A_A2 [12] M_A_DQ2
[12] M_A_A3 [12] M_A_DQ3
CPU1A 1 OF 13
[12] M_A_A4 [12] M_A_DQ4 ADD and CLK on the sam layer
[12] M_A_A5 [12] M_A_DQ5 MEMORY A DM, DQ & DQS on the same layer
D [12] M_A_A6 [12] M_A_DQ6 D
[12] M_A_DQ7 M_A_A0 AF25
[12] M_A_A7 M_A_A1 MA_ADD0 M_A_DQ0
AE23 J21
[12] M_A_A8 M_A_A2 MA_ADD1 MA_DATA0 M_A_DQ1
[12] M_A_DQ8 AD27 H21
[12] M_A_DQ9 AE21 F23
[12] M_A_DQ10 AC24 H23
[12] M_A_DQ11 AC26 G20
[12] M_A_DQ12 AD21 F20
[12] M_A_A14 [12] M_A_DQ13 AC27 J22
M_A_A8 AD22 MA_ADD7 MA_DATA6 J23 M_A_DQ7
[12] M_A_A15 [12] M_A_DQ14 MA_ADD8 MA_DATA7
[12] M_A_A16 [12] M_A_DQ15 M_A_A9 AC21
M_A_A10 AF22 MA_ADD9 G25 M_A_DQ8
M_A_A11 AA24 MA_ADD10 MA_DATA8 F26 M_A_DQ9
[12] M_A_DQ16 MA_ADD11 MA_DATA9
[12] M_A_DQ17 M_A_A12 AC23 L24 M_A_DQ10
[12] M_A_BA0 M_A_A13 MA_ADD12 MA_DATA10 M_A_DQ11
[12] M_A_DQ18 AJ25 L26
[12] M_A_BA1 M_A_A14 MA_ADD13_BANK2 MA_DATA11 M_A_DQ12
[12] M_A_DQ19 AG27 L23
M_A_A15 AG23 MA_WE_L_ADD14 MA_DATA12 F25 M_A_DQ13
[12] M_A_BG0 [12] M_A_DQ20 MA_CAS_L_ADD15 MA_DATA13
[12] M_A_DQ21 M_A_A16 AG26 K25 M_A_DQ14
[12] M_A_BG1 MA_RAS_L_ADD16 MA_DATA14 M_A_DQ15
[12] M_A_DQ22 K27
MA_DATA15
[12] M_A_ACT_N [12] M_A_DQ23
M_A_BA0 AF21 M25 M_A_DQ16
M_A_BA1 AF27 MA_BANK0 MA_DATA16 M27 M_A_DQ17
[12] M_A_DM0 [12] M_A_DQ24 MA_BANK1 MA_DATA17
[12] M_A_DQ25 P27 M_A_DQ18
[12] M_A_DM1 M_A_BG0 AA21 MA_DATA18 M_A_DQ19
[12] M_A_DQ26 R24
[12] M_A_DM2 M_A_BG1 AA27 MA_BG0 MA_DATA19 M_A_DQ20
[12] M_A_DQ27 L27
[12] M_A_DM3 MA_BG1 MA_DATA20 M_A_DQ21
[12] M_A_DQ28 M24
[12] M_A_DM4 M_A_ACT_N AA22 MA_DATA21 M_A_DQ22
[12] M_A_DQ29 P24
[12] M_A_DM5 MA_ACT_L MA_DATA22 M_A_DQ23
[12] M_A_DQ30 P25
[12] M_A_DM6 M_A_DM0 MA_DATA23
[12] M_A_DQ31 F21
[12] M_A_DM7 M_A_DM1 MA_DM0 M_A_DQ24
C G27 M22 C
M_A_DM2 N24 MA_DM1 MA_DATA24 N21 M_A_DQ25
[12] M_A_DQ32 MA_DM2 MA_DATA25
[12] M_A_DQ33 M_A_DM3 N23 T22 M_A_DQ26
[12] M_A_DQS_DP0 M_A_DM4 MA_DM3 MA_DATA26 M_A_DQ27
[12] M_A_DQ34 AL24 V21
[12] M_A_DQS_DN0 M_A_DM5 MA_DM4 MA_DATA27 M_A_DQ28
[12] M_A_DQ35 AN27 L21
[12] M_A_DQS_DP1 M_A_DM6 MA_DM5 MA_DATA28 M_A_DQ29
[12] M_A_DQ36 AW25 M20
[12] M_A_DQS_DN1 M_A_DM7 MA_DM6 MA_DATA29 M_A_DQ30
[12] M_A_DQ37 AT21 R23
[12] M_A_DQS_DP2 MA_DM7 MA_DATA30 M_A_DQ31
[12] M_A_DQ38 DM, DQ & DQS on the same layer T27 T21
[12] M_A_DQS_DN2 RSVD_36 MA_DATA31
[12] M_A_DQS_DP3 [12] M_A_DQ39
M_A_DQS_DP0 F22 AL27 M_A_DQ32
[12] M_A_DQS_DN3 M_A_DQS_DN0 G22 MA_DQS_H0 MA_DATA32
[12] M_A_DQ40 AL25 M_A_DQ33
[12] M_A_DQS_DP4 M_A_DQS_DP1 H27 MA_DQS_L0 MA_DATA33
[12] M_A_DQ41 AP26 M_A_DQ34
[12] M_A_DQS_DN4 M_A_DQS_DN1 H26 MA_DQS_H1 MA_DATA34
[12] M_A_DQ42 AR27 M_A_DQ35
[12] M_A_DQS_DP5 M_A_DQS_DP2 N27 MA_DQS_L1 MA_DATA35
[12] M_A_DQ43 AK26 M_A_DQ36
[12] M_A_DQS_DN5 M_A_DQS_DN2 N26 MA_DQS_H2 MA_DATA36
[12] M_A_DQ44 AK24 M_A_DQ37
[12] M_A_DQS_DP6 M_A_DQS_DP3 R21 MA_DQS_L2 MA_DATA37
[12] M_A_DQ45 AM24 M_A_DQ38
[12] M_A_DQS_DN6 M_A_DQS_DN3 P21 MA_DQS_H3 MA_DATA38
[12] M_A_DQ46 AP27 M_A_DQ39
[12] M_A_DQS_DP7 M_A_DQS_DP4 AM26 MA_DQS_L3 MA_DATA39
[12] M_A_DQS_DN7 [12] M_A_DQ47 MA_DQS_H4
M_A_DQS_DN4 AM27 AM23 M_A_DQ40
M_A_DQS_DP5 AN24 MA_DQS_L4 MA_DATA40 AM21 M_A_DQ41
[12] M_A_DQ48 MA_DQS_H5 MA_DATA41
[12] M_A_DQ49 M_A_DQS_DN5 AN25 AR25 M_A_DQ42
M_A_DQS_DP6 AU23 MA_DQS_L5 MA_DATA42 AU27 M_A_DQ43
[12] M_A_CLK0 [12] M_A_DQ50 MA_DQS_H6 MA_DATA43
[12] M_A_DQ51 M_A_DQS_DN6 AT23 AL22 M_A_DQ44
[12] M_A_CLK#0 M_A_DQS_DP7 AV20 MA_DQS_L6 MA_DATA44
[12] M_A_DQ52 AL21 M_A_DQ45
[12] M_A_CLK1 M_A_DQS_DN7 AW20 MA_DQS_H7 MA_DATA45
[12] M_A_DQ53 AP24 M_A_DQ46
[12] M_A_CLK#1 MA_DQS_L7 MA_DATA46
[12] M_A_DQ54 V24 AP23 M_A_DQ47
V23 RSVD_41 MA_DATA47
[12] M_A_DQ55 RSVD_40 AW26M_A_DQ48
[12] M_A_CS#0 M_A_CLK0 MA_DATA48
[12] M_A_DQ56 AD25 AV25 M_A_DQ49
B [12] M_A_CS#1 M_A_CLK#0 MA_CLK_H0 MA_DATA49 B
[12] M_A_DQ57 AD24 AV22 M_A_DQ50
M_A_CLK1 AE26 MA_CLK_L0 MA_DATA50 AW22M_A_DQ51
[12] M_A_DQ58 MA_CLK_H1 MA_DATA51
[12] M_A_DQ59 M_A_CLK#1 AE27 AU26 M_A_DQ52
[12] M_A_CKE0 MA_CLK_L1 MA_DATA52
[12] M_A_DQ60 AV27 M_A_DQ53
[12] M_A_CKE1 MA_DATA53
[12] M_A_DQ61 AW23M_A_DQ54
MA_DATA54 AT22 M_A_DQ55
[12] M_A_DQ62 MA_DATA55
[12] M_A_DQ63
AW21M_A_DQ56
[12] M_A_ODT0 M_A_CS#0 MA_DATA56
AG21 AU21 M_A_DQ57
[12] M_A_ODT1 M_A_CS#1 MA_CS_L0 MA_DATA57
AJ27 AP21 M_A_DQ58
MA_CS_L1 MA_DATA58 AN20 M_A_DQ59
MA_DATA59 AR22 M_A_DQ60
MA_DATA60 AN22 M_A_DQ61
[12] M_A_ALERT_N MA_DATA61 AT20 M_A_DQ62
MA_DATA62 AR20 M_A_DQ63
[12] M_A_EVENT# M_A_CKE0 Y23 MA_DATA63
[12] SM_DRAMRST#_A M_A_CKE1 MA_CKE0
Y26 T24
MA_CKE1 RSVD_34 T25
RSVD_35 W25
RSVD_51 W27
[12] M_A_PARITY M_A_ODT0 AG24 RSVD_52 R26
M_A_ODT1 AJ22 MA_ODT0 RSVD_27 R27
MA_ODT1 RSVD_28 V27
RSVD_43 V26
RSVD_42
M_A_ALERT_N AA25
MA_ALERT_L AF24 M_A_PARITY
M_A_EVENT# AE24 MA_PAROUT
SM_DRAMRST#_A Y24 MA_EVENT_L
A MA_RESET_L <Core Design> A
FP5 REV 0.90
PART 1 OF 13
RAVEN-BRIDGE-GP
1st = 071.RAVEN.000U
CPU Wistron Corporation
Title
Title
CPU (DDR4_CHA)
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date:
5 4 3 2 1
5 4 3 2 1
SSID = CPU
https://vinafix.com
[13] M_B_A0 [13] M_B_DQ0
[13] M_B_A1 [13] M_B_DQ1
[13] M_B_A2 [13] M_B_DQ2
[13] M_B_A3 [13] M_B_DQ3 ADD, CMD, CTL, 40Ω
[13] M_B_A4 [13] M_B_DQ4 DATA CHECK, 50Ω
[13] M_B_A5 [13] M_B_DQ5
[13] M_B_A6 [13] M_B_DQ6 DDR4 Misc. 40~60Ω
D [13] M_B_A7 [13] M_B_DQ7 DDR CLK, 72Ω D
[13] M_B_A8 Channel B to SO-DIMM DQS, 80Ω
[13] M_B_A9 [13] M_B_DQ8
[13] M_B_A10 [13] M_B_DQ9
[13] M_B_A11 [13] M_B_DQ10 CPU1I 9 OF 13
[13] M_B_A12 [13] M_B_DQ11 ADD and CLK on the sam layer MEMORY B DM, DQ & DQS on the same layer
[13] M_B_A13 [13] M_B_DQ12
[13] M_B_A14 [13] M_B_DQ13 M_B_A0 AG30
M_B_A1 AC32 MB_ADD0 B21 M_B_DQ0
[13] M_B_A15 [13] M_B_DQ14 MB_ADD1 MB_DATA0
[13] M_B_A16 [13] M_B_DQ15 M_B_A2 AC30 D21 M_B_DQ1
M_B_A3 AB29 MB_ADD2 MB_DATA1 B23 M_B_DQ2
M_B_A4 AB31 MB_ADD3 MB_DATA2 D23 M_B_DQ3
[13] M_B_DQ16 MB_ADD4 MB_DATA3
[13] M_B_DQ17 M_B_A5 AA30 A20 M_B_DQ4
[13] M_B_BA0 M_B_A6 AA29 MB_ADD5 MB_DATA4 C20 M_B_DQ5
[13] M_B_BA1 [13] M_B_DQ18 MB_ADD6 MB_DATA5
[13] M_B_DQ19 M_B_A7 Y30 A22 M_B_DQ6
M_B_A8 AA31 MB_ADD7 MB_DATA6 C22 M_B_DQ7
[13] M_B_BG0 [13] M_B_DQ20
M_B_A9 W29 MB_ADD8 MB_DATA7 Signal GRP Signal
[13] M_B_BG1 [13] M_B_DQ21 MB_ADD9
[13] M_B_DQ22 M_B_A10 AH29 D24 M_B_DQ8
MB_ADD10 MB_DATA8
[13] M_B_ACT_N [13] M_B_DQ23 M_B_A11 Y32
MB_ADD11 MB_DATA9
A25 M_B_DQ9 Clocks CLK
M_B_A12 W31 D27 M_B_DQ10
M_B_A13 AL30 MB_ADD12 MB_DATA10 C27 M_B_DQ11
[13] M_B_DM0 [13] M_B_DQ24 MB_ADD13_BANK2 MB_DATA11 Address ADD BANK BG
[13] M_B_DQ25 M_B_A14 AK30 C23 M_B_DQ12
[13] M_B_DM1 M_B_A15 MB_WE_L_ADD14 MB_DATA12 M_B_DQ13
[13] M_B_DQ26 AK32 B24
[13] M_B_DM2 M_B_A16 MB_CAS_L_ADD15 MB_DATA13 M_B_DQ14
[13] M_B_DQ27 AJ30 C26 Command RAS_L CAS_L WE_L ACT
[13] M_B_DM3 MB_RAS_L_ADD16 MB_DATA14 M_B_DQ15
[13] M_B_DQ28 B27
[13] M_B_DM4 MB_DATA15
[13] M_B_DM5 [13] M_B_DQ29
[13] M_B_DM6 [13] M_B_DQ30 M_B_BA0 AH31
MB_BANK0 MB_DATA16
C30 M_B_DQ16 Control CKE ODT CS_L
[13] M_B_DQ31 M_B_BA1 AG32 E29 M_B_DQ17
[13] M_B_DM7 MB_BANK1 MB_DATA17 M_B_DQ18
H29
C
[13] M_B_DQ32 M_B_BG0 V31 MB_DATA18 H31 M_B_DQ19 Data Data DM DQS C
M_B_BG1 V29 MB_BG0 MB_DATA19 A28 M_B_DQ20
[13] M_B_DQS_DP0 [13] M_B_DQ33 MB_BG1 MB_DATA20 D28 M_B_DQ21
[13] M_B_DQS_DN0 [13] M_B_DQ34
M_B_ACT_N V30 MB_DATA21 F31 M_B_DQ22
Misc. M_RESET_L M_EVENT_L M_ALERT
[13] M_B_DQS_DP1 [13] M_B_DQ35 MB_ACT_L MB_DATA22 M_PAROUT
[13] M_B_DQ36 G30 M_B_DQ23
[13] M_B_DQS_DN1 M_B_DM0 MB_DATA23
[13] M_B_DQ37 C21
[13] M_B_DQS_DP2 M_B_DM1 MB_DM0 M_B_DQ24
[13] M_B_DQ38 C25 J29
[13] M_B_DQS_DN2 M_B_DM2 MB_DM1 MB_DATA24 M_B_DQ25
[13] M_B_DQ39 E32 J31
[13] M_B_DQS_DP3 M_B_DM3 MB_DM2 MB_DATA25 M_B_DQ26
K30 L29
[13] M_B_DQ40 AP30 L31
[13] M_B_DQ41 AW31 H30
[13] M_B_DQ42 BB26 H32
[13] M_B_DQ43 BD22 L30
[13] M_B_DQS_DN5 MB_DM7 MB_DATA30 M_B_DQ31
[13] M_B_DQ44 DM, DQ & DQS on the same layer N32 L32
[13] M_B_DQS_DP6 RSVD_21 MB_DATA31
[13] M_B_DQS_DN6 [13] M_B_DQ45
[13] M_B_DQ46 M_B_DQS_DP0 D22 AP29 M_B_DQ32
[13] M_B_DQS_DP7 M_B_DQS_DN0 MB_DQS_H0 MB_DATA32 M_B_DQ33
[13] M_B_DQ47 B22 AP32
[13] M_B_DQS_DN7 M_B_DQS_DP1 MB_DQS_L0 MB_DATA33 M_B_DQ34
D25 AT29
M_B_DQS_DN1 B25 MB_DQS_H1 MB_DATA34 AU32 M_B_DQ35
[13] M_B_DQ48 MB_DQS_L1 MB_DATA35
[13] M_B_DQ49 M_B_DQS_DP2 F29 AN30 M_B_DQ36
M_B_DQS_DN2 F30 MB_DQS_H2 MB_DATA36 AP31 M_B_DQ37
[13] M_B_CLK0 [13] M_B_DQ50 MB_DQS_L2 MB_DATA37
[13] M_B_DQ51 M_B_DQS_DP3 K31 AR30 M_B_DQ38
[13] M_B_CLK#0 MB_DQS_H3 MB_DATA38
[13] M_B_DQ52 M_B_DQS_DN3 K29 AT31 M_B_DQ39
[13] M_B_CLK1 MB_DQS_L3 MB_DATA39
[13] M_B_DQ53 M_B_DQS_DP4 AR29
[13] M_B_CLK#1 MB_DQS_H4
[13] M_B_DQ54 M_B_DQS_DN4 AR31 AU29 M_B_DQ40
M_B_DQS_DP5 AW30 MB_DQS_L4 MB_DATA40 AV30 M_B_DQ41
[13] M_B_DQ55 MB_DQS_H5 MB_DATA41
M_B_DQS_DN5 AW29 BB30 M_B_DQ42
M_B_DQS_DP6 BC25 MB_DQS_L5 MB_DATA42 BA28 M_B_DQ43
[13] M_B_DQ56 MB_DQS_H6 MB_DATA43
[13] M_B_DQ57 M_B_DQS_DN6 BA25 AU30 M_B_DQ44
B M_B_DQS_DP7 BC22 MB_DQS_L6 MB_DATA44 AU31 M_B_DQ45 B
[13] M_B_CS#0 [13] M_B_DQ58 MB_DQS_H7 MB_DATA45
[13] M_B_DQ59 M_B_DQS_DN7 BA22 AY32 M_B_DQ46
[13] M_B_CS#1 MB_DQS_L7 MB_DATA46 M_B_DQ47
[13] M_B_DQ60 N31 AY29
N29 RSVD_20 MB_DATA47
[13] M_B_DQ61 RSVD_18
[13] M_B_DQ62 BA27 M_B_DQ48
M_B_CLK0 AC31 MB_DATA48 BC27 M_B_DQ49
[13] M_B_DQ63 MB_CLK_H0 MB_DATA49
M_B_CLK#0 AD30 BA24 M_B_DQ50
M_B_CLK1 AD29 MB_CLK_L0 MB_DATA50 BC24 M_B_DQ51
[13] M_B_CKE0 M_B_CLK#1 MB_CLK_H1 MB_DATA51 M_B_DQ52
AD31 BD28
[13] M_B_CKE1 [13] M_B_PARITY MB_CLK_L1 MB_DATA52 M_B_DQ53
AE30 BB27
AE32 MB_CLK_H2 MB_DATA53 BB25 M_B_DQ54
AF29 MB_CLK_L2 MB_DATA54 BD25 M_B_DQ55
AF31 MB_CLK_H3 MB_DATA55
[13] M_B_ODT0 MB_CLK_L3 M_B_DQ56
BC23
[13] M_B_ODT1 M_B_CS#0 MB_DATA56 M_B_DQ57
AJ31 BB22
M_B_CS#1 AM31 MB0_CS_L0 MB_DATA57 BC21 M_B_DQ58
AJ29 MB0_CS_L1 MB_DATA58 BD20 M_B_DQ59
AM29 MB1_CS_L0 MB_DATA59 BB23 M_B_DQ60
[13] M_B_ALERT_N MB1_CS_L1 MB_DATA60 BA23 M_B_DQ61
MB_DATA61 BB21 M_B_DQ62
[13] M_B_EVENT# MB_DATA62 BA21 M_B_DQ63
[13] SM_DRAMRST#_B M_B_CKE0 MB_DATA63
U29
M_B_CKE1 T30 MB0_CKE0 M31
V32 MB0_CKE1 RSVD_17 N30
U31 MB1_CKE0 RSVD_19 P31
MB1_CKE1 RSVD_26 R32
M_B_ODT0 AL31 RSVD_29 M30
M_B_ODT1 AM32 MB0_ODT0 RSVD_16 M29
AL29 MB0_ODT1 RSVD_15 P30
A MB1_ODT0 RSVD_25 <Core Design> A
AM30 P29
MB1_ODT1 RSVD_24
M_B_ALERT_N W30
MB_ALERT_L
MB_PAROUT
AG31 M_B_PARITY Wistron Corporation
M_B_EVENT# AG29 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SM_DRAMRST#_B T31 MB_EVENT_L Taipei Hsien 221, Taiwan, R.O.C.
MB_RESET_L
FP5 REV 0.90
PART 9 OF 13 Title
Title
RAVEN-BRIDGE-GP
CPU CPU (DDR4_CHB)
Size
Size Document Number
Document Number Rev
Rev
A3
Bensolo AMD A00
Date:
5 4 3 2 1
5 4 3 2 1
VDDCR_SOC： PWR
TDC：10A
EDC：13A CPU1F 6 OF 13 https://vinafix.com
1V_CPU_CORE VDDCR_CPU:
POWER TDC：35A
1D2V_CPU_SOC M15 G7 EDC：45A
M18 VDDCR_SOC_1 VDDCR_1 G10
M19 VDDCR_SOC_2 VDDCR_2 G12
N16 VDDCR_SOC_3 VDDCR_3 G14
N18 VDDCR_SOC_4 VDDCR_4 H8
N20 VDDCR_SOC_5 VDDCR_5 H11
P17 VDDCR_SOC_6 VDDCR_6 H15
P19 VDDCR_SOC_7 VDDCR_7 K7
D D
R18 VDDCR_SOC_8 VDDCR_8 K12
R20 VDDCR_SOC_9 VDDCR_9 K14
T19 VDDCR_SOC_10 VDDCR_10 L8
U18 VDDCR_SOC_11 VDDCR_11 M7
U20 VDDCR_SOC_12 VDDCR_12 M10
V19 VDDCR_SOC_13 VDDCR_13 N14
W18 VDDCR_SOC_14 VDDCR_14 P7
1D2V_S3 W20 VDDCR_SOC_15 VDDCR_15 P10
Y19 VDDCR_SOC_16 VDDCR_16 P13
VDDCR_SOC_17 VDDCR_17 P15
VDDIO_MEM_S3:6A VDDCR_18
T32 R8
V28 VDDIO_MEM_S3_1 VDDCR_19 R14
W28 VDDIO_MEM_S3_2 VDDCR_20 R16
W32 VDDIO_MEM_S3_3 VDDCR_21 T7
Y22 VDDIO_MEM_S3_4 VDDCR_22 T10
AA20 VDDIO_MEM_S3_7 VDDCR_25 T17
AA23 VDDIO_MEM_S3_8 VDDCR_26 U14
AA26 VDDIO_MEM_S3_9 VDDCR_27 U16
AA28 VDDIO_MEM_S3_10 VDDCR_28 V13
AA32 VDDIO_MEM_S3_11 VDDCR_29 V15
AC20 VDDIO_MEM_S3_12 VDDCR_30 V17
AC22 VDDIO_MEM_S3_13 VDDCR_31 W7
AD23 VDDIO_MEM_S3_16 VDDCR_34 W16
AD26 VDDIO_MEM_S3_17 VDDCR_35 Y8
C AD28 VDDIO_MEM_S3_18 VDDCR_36 Y13 C
AD32 VDDIO_MEM_S3_19 VDDCR_37 Y15
AE20 VDDIO_MEM_S3_20 VDDCR_38 Y17
AE22 VDDIO_MEM_S3_21 VDDCR_39 AA7
AF23 VDDIO_MEM_S3_24 VDDCR_42 AA16
AF26 VDDIO_MEM_S3_25 VDDCR_43 AA18
AF28 VDDIO_MEM_S3_26 VDDCR_44 AB13
AF32 VDDIO_MEM_S3_27 VDDCR_45 AB15
AG20 VDDIO_MEM_S3_28 VDDCR_46 AB17
AG22 VDDIO_MEM_S3_29 VDDCR_47 AB19
AG25 VDDIO_MEM_S3_30 VDDCR_48 AC14
1D8V_S0_AUDIO AG28 VDDIO_MEM_S3_31 VDDCR_49 AC16
AJ20 VDDIO_MEM_S3_32 VDDCR_50 AC18
AJ23 VDDIO_MEM_S3_33 VDDCR_51 AD7
AJ26 VDDIO_MEM_S3_34 VDDCR_52 AD10
1
Non MS2 AJ28 VDDIO_MEM_S3_35 VDDCR_53 AD13
1D8V_S0_APU VDDIO_MEM_S3_36 VDDCR_54
R701 0R2J-2-GP AJ32 AD15
1 2 AK28 VDDIO_MEM_S3_37 VDDCR_55 AD17
1D8V_S5 VDDIO_MEM_S3_38 VDDCR_56
R702 MS+ 0R2J-2-GP AL28 AD19
AL32 VDDIO_MEM_S3_39 VDDCR_57 AE8
VDDIO_MEM_S3_40 VDDCR_58 AE14
VDDIO_AUDIO:0.2A VDDCR_59
If 'Wake-on-Ring' is supported, connect AP12 AE16
to a S5 rail, else connect to a S0 rail. VDDIO_AUDIO VDDCR_60 AE18
AL18 VDDCR_61 AF7
VDD_33:0.25A 3D3V_S0_APU VDD_33_1 VDDCR_62
AM17 AF10
VDD_33_2 VDDCR_63 AF13
AL20 VDDCR_64 AF15
B
VDD_18:2.0A 1D8V_S0_APU VDD_18_1 VDDCR_65 B
AM19 AF17
VDD_18_2 VDDCR_66 AF19
AL19 VDDCR_67 AG14
VDD_18_S5:0.5A 1D8V_S5_APU VDD_18_S5_1 VDDCR_68
AM18 AG16
VDD_18_S5_2 VDDCR_69 AG18
AL17 VDDCR_70 AH13
VDD_33_S5:0.25A 3D3V_S5_APU VDD_33_S5_1 VDDCR_71
AM16 AH15
VDD_33_S5_2 VDDCR_72 AH17
AL14 VDDCR_73 AH19
VDDP_S5:1A 0D9V_S5_APU VDDP_S5_1 VDDCR_74
AL15 AJ7
AM14 VDDP_S5_2 VDDCR_75 AJ10
VDDP_S5_3 VDDCR_76 AJ14
AL13 VDDCR_77 AJ16
VDDP:4A 0D9V_S0 VDDP_1 VDDCR_78
AM12 AJ18
AM13 VDDP_2 VDDCR_79 AK13
AN12 VDDP_3 VDDCR_80 AK15
AMD NBA AN13 VDDP_4 VDDCR_81 AK17
0D22uF C402 x1 0D22uF C402 x1 VDDP_5 VDDCR_82 AK19
AT11 VDDCR_83
VDDBT_RTC_G:4.5uA 1D5V_VDDBT_RTC VDDBT_RTC_G
FP5 REV 0.90
PART 6 OF 13
RAVEN-BRIDGE-GP
CPU
A <Core Design> A
Wistron Corporation
Title
Title
Size
CPU (ALL POWER)
Document Number
Number Rev
Size Document Rev
A3
Bensolo AMD A00
Date:
5 4 3 2 1
5 4 3 2 1
SSID = PCH
DISPLAY/SVI/JTAG/TEST APU Type I 1D8V
APU Type I(CZ): 1D8V CPU1C 3 OF 13 https://vinafix.com
APU Type II 3D3V
eDP APU Type II(CZ-L): 3D3V DISPLAY/SVI2/JTAG/TEST

DisplayPort Device eDP_TX_CPU_P0 C8 G15 eDP_BLON PINOUT Description
eDP_TX_CPU_N0 A8 DP0_TXP0 DP_BLON F15 eDP_DIGON
eDP
0 eDP DP_BLON BL_ENABLE
[55] eDP_TX_CPU_P0 1 HDMI out DP0_TXN0 DP_DIGON L14 eDP_VARY_BL DP_DIGON LCD_VCC_ENABLE
[55] eDP_TX_CPU_N0 1D8V_S0 eDP_TX_CPU_P1 D8 DP_VARY_BL DP_VARY_BL BL_PWM
[55] eDP_TX_CPU_P1
eDP_TX_CPU_N1 B8 DP0_TXP1
DP0_TXN1 DP0_AUXP
D9 eDP_AUX_CPU_P eDP
B9 eDP_AUX_CPU_N
[55] eDP_TX_CPU_N1 R803 1 2 300R2J-4-GP RST#_CPU B6 DP0_AUXN C10 eDP_HPD_CPU
C7 DP0_TXP2 DP0_HPD DisplayPort Device
D D
R811 1 2 300R2J-4-GP SVID_PW RGD DP0_TXN2 G11 HDMI_SCL_CPU 0 eDP
C6 DP1_AUXP F11 HDMI_SDA_CPU
HDMI
1 HDMI
1D8V_S5 HDT PIN Pull High Resistor D6 DP0_TXP3 DP1_AUXN G13 HDMI_DET_CPU 2
[24] eDP_BLON ASM if HDT CONN is needs of use DP0_TXN3 DP1_HPD
Swap 20180814 3 DP
[55] eDP_DIGON RN804 1 8 APU_TCK HDMI_DDI_TX_P2 E6 J12
[55] eDP_VARY_BL 2 7 APU_TMS HDMI_DDI_TX_N2 D5 DP1_TXP0 DP2_AUXP H12
3 HDT 6 APU_TDI DP1_TXN0 DP2_AUXN K13
[55] eDP_AUX_CPU_P 4 5 APU_TRST# HDMI_DDI_TX_P1 E1 DP2_HPD
[55] eDP_AUX_CPU_N SRN1KJ-4-GP HDMI_DDI_TX_N1 C1 DP1_TXP1 J10 DP3_AUXP
[55] eDP_HPD_CPU
HDMI DP1_TXN1 DP3_AUXP
DP3_AUXN
H10 DP3_AUXN TYPE-C DP
R805 1 2 1KR2J-L2-GP APU_DBREQ# HDMI_DDI_TX_P0 F3 K8 CPU_DP_HPD
HDMI_DDI_TX_N0 E4 DP1_TXP2 DP3_HPD
HDT DP1_TXN2 K15 DP_STEREOSYNC_APU
HDMI DP_STEREOSYNC
1
3D3V_S0 HDMI_DDI_TX_P3 F4
RN801 HDMI_DDI_TX_N3 F2 DP1_TXP3 F14 R814
[57] HDMI_DDI_TX_P2 1 8 SIC_CPU DP1_TXN3 RSVD_4 F12
[57] HDMI_DDI_TX_N2 RSVD_3 100KR2J-1-GP
2 7 SID_CPU
3 6 ALERT#_CPU F10
[57] HDMI_DDI_TX_P1 RSVD_2
2
4 5 H_PROCHOT#
[57] HDMI_DDI_TX_N1
SRN1KJ-4-GP
[57] HDMI_DDI_TX_P0
[57] HDMI_DDI_TX_N0
[57] HDMI_DDI_TX_P3 1D8V_S0

[57] HDMI_DDI_TX_N3 Swap 20180814
RN802 AP14
5 4 TEST14_APU TEST4 AN14
C 6 3 TEST15_APU TEST5 C
[57] HDMI_SCL_CPU 7 2 TEST17_APU F13
[57] HDMI_SDA_CPU
[57] HDMI_DET_CPU 8 DY 1 TEST16_APU TEST6
G18 TEST14_APU
TEST14 H19 TEST15_APU
SRN10KJ-6-GP TEST15 F18 TEST16_APU
TEST16 F19 TEST17_APU
TEST17
W24 TEST31_APU 1
TYPE-C DP DY2
TEST31 TP802 TPAD14-OP-GP
C821 1 SC27P50V2JN-2-GP RST#_CPU

[73] DP3_AUXP
C822 1 2 SC27P50V2JN-2-GP SVID_PW RGD
HDT AR11
[73] DP3_AUXN TEST41
DY APU_TDI AU2 AJ21
APU_TDO AU4 TDI TEST470 AK21
APU_TCK AU1 TDO TEST471
APU_TMS AU3 TCK
[72] CPU_DP_HPD TMS
APU_TRST# AV3
APU_DBREQ# AW3 TRST_L 0D9V_S0
DBREQ_L
HDT HDT 3D3V_S5
1D8V_S0 HDMI: High = Enable HDT CONN PIN#12 RST#_CPU AW4 V4 SMU_ZVDDP 1 R812 2 196R2F-GP
[68] APU_TDI RESET_L SMU_ZVDD
HDT CONN PIN#10 SVID_PW RGD AW2
[68] APU_TDO PWROK
[68] APU_TCK
1
SIC_CPU H14 AW11 CORETYPE R813 1 2 10KR2J-L-GP

[68] APU_TMS
R837 SMB1 SID_CPU J14 SIC 3D3V CORETYPE DY
[68] APU_TRST# ALERT#_CPU SID
[68] APU_DBREQ# 1KR2F-L1-GP J15 A00 Change 0 ohm to short pad
THERMTRIP#_CPU AP16 ALERT_L AN11 VDDP_RUN_FB_APU_Q
H_PROCHOT# L19 THERMTRIP_L VDDP_SENSE J19 VDDNB_SENSE_APU 1 R806 2 0R0402-PAD VDDNB_SENSE
PROCHOT_L VDDCR_SOC_SENSE
2
B DP_STEREOSYNC_APU K18 VCCCORE_SENSE_APU 1 R807 2 0R0402-PAD VCCCORE_SENSE B

an output signal as overtemperature condition
[68] RST#_CPU VDDCR_SENSE
[46,68] SVID_PW RGD
SVID_CLK_CPU F16
SVC0
1
SVID_DATA_CPU H16 J18 VSS_SENSE_APU 1 R809 2 0R0402-PAD VSSCORE_SENSE

R808 SVID SVID_ALERT_N_CPU J16 SVD0 VSS_SENSE_A AM11
[26] THERMTRIP#_CPU FP5 REV 0.90
DY 1KR2J-L2-GP SVT0 PART 3 OF 13
VSS_SENSE_B VSS_SENSEB 1
[24,44,46] H_PROCHOT# RAVEN-BRIDGE-GP TP801 TPAD14-OP-GP
CPU
2
SVID
[46] SVID_CLK_CPU
[46] SVID_DATA_CPU
[46] SVID_ALERT_N_CPU
3D3V_S0 VDDNB_SENSE 1 2
R801
DY 100R2F-L3-GP
1D2V_CPU_SOC
VCORE_PW RGD VCCCORE_SENSE 1 2
R802
DY 100R2F-L3-GP
1V_CPU_CORE
[46] VDDNB_SENSE Q808 1st = 084.03402.0031 VSSCORE_SENSE 1 2
[46] VCCCORE_SENSE SID_CPU 1 6 SML1_SMBDATA R804
DY 100R2F-L3-GP
2nd = 084.03404.0A31
Note:ZZ.27002.F7C01
G
3rd = 84.03418.A31
2 5
[46] VSSCORE_SENSE VDDP_RUN_FB_APU_Q S D VDDP_RUN_FB_APU
SIC_CPU 3 4
2N7002KDW-1-GP SML1_SMBCLK
Q805
PJA3402-R1-00001-GP
A
75.27002.F7C <Core Design> A
[24,79] SML1_SMBDATA
2nd = 075.67002.007C
[24,79] SML1_SMBCLK 3rd = 075.063D1.007C
4th = 075.07002.0A7C Wistron Corporation
[24,26,46] VCORE_PW RGD
Title
Title
[52] VDDP_RUN_FB_APU
CPU (DP/SVID/HDT/TEST)
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date: Friday, December 28, 2018
Date: Sheet Sheet 8 of 106
5 4 3 2 1
5 4 3 2 1
VSS https://vinafix.com
CPU1H 8 OF 13 CPU1G 7 OF 13 CPU1K 11 OF 13
GND GND GND/RSVD CPU1L 12 OF 13
V8 AG8 N12 K32 AR5 BD16 RSVD
V11 VSS_124 VSS_186 AG11 A3 VSS_316 VSS_62 L5 AR7 VSS_248 VSS_310 BD19 T11 AA9
V12 VSS_125 VSS_187 AG12 A5 VSS_1 VSS_63 L13 AR12 VSS_249 VSS_311 BD21 RSVD_32 RSVD_62 AA8
V14 VSS_126 VSS_188 AG13 A7 VSS_2 VSS_64 L15 AR14 VSS_250 VSS_312 BD23 AC7 RSVD_61 AC6
V16 VSS_127 VSS_189 AG15 A10 VSS_3 VSS_65 L18 AR16 VSS_251 VSS_313 BD26 RSVD_66 RSVD_65
V18 VSS_128 VSS_190 AG17 A12 VSS_4 VSS_66 L20 AR19 VSS_252 VSS_314 BD30
D D
V20 VSS_129 VSS_191 AG19 A14 VSS_5 VSS_67 L25 AR21 VSS_253 VSS_315 Y9
V22 VSS_130 VSS_192 AH14 A16 VSS_6 VSS_68 L28 AR26 VSS_254 Y10 RSVD_55 AD11
V25 VSS_131 VSS_193 AH16 A19 VSS_7 VSS_69 M1 AR28 VSS_255 RSVD_56 RSVD_72
W1 VSS_132 VSS_194 AH18 A21 VSS_8 VSS_70 M5 AR32 VSS_256 W11 AC9
W5 VSS_133 VSS_195 AH20 A23 VSS_9 VSS_71 M12 AU5 VSS_257 W12 RSVD_47 RSVD_67 AA11
W13 VSS_134 VSS_196 AJ1 A26 VSS_10 VSS_72 M21 AU8 VSS_258 RSVD_48 RSVD_63
W15 VSS_135 VSS_197 AJ5 A30 VSS_11 VSS_73 M23 AU11 VSS_259 V9 T12
W17 VSS_136 VSS_198 AJ13 C3 VSS_12 VSS_74 M26 AU13 VSS_260 V10 RSVD_38 RSVD_33 AD12
W19 VSS_137 VSS_199 AJ15 C32 VSS_13 VSS_75 M28 AU15 VSS_261 RSVD_39 RSVD_73
W23 VSS_138 VSS_200 AJ17 D16 VSS_14 VSS_76 M32 AU18 VSS_262 Y6
W26 VSS_139 VSS_201 AJ19 D18 VSS_15 VSS_77 N4 AU20 VSS_263 RSVD_53 Y7
Y5 VSS_140 VSS_202 AK5 D20 VSS_16 VSS_78 N5 AU22 VSS_264 RSVD_54
Y11 VSS_141 VSS_203 AK8 E7 VSS_17 VSS_79 N8 AU25 VSS_265 B20 AA12 W8
Y12 VSS_142 VSS_204 AK11 E8 VSS_18 VSS_80 N11 AU28 VSS_266 RSVD_1 G3 AC10 RSVD_64 RSVD_45 W9
Y14 VSS_143 VSS_205 AK12 E10 VSS_19 VSS_81 N13 AV1 VSS_267 RSVD_5 J20 RSVD_68 RSVD_46
Y16 VSS_144 VSS_206 AK14 E11 VSS_20 VSS_82 N15 AV5 VSS_268 RSVD_7 K3
Y18 VSS_145 VSS_207 AK16 E12 VSS_21 VSS_83 N17 AV7 VSS_269 RSVD_8 K6 FP5 REV 0.90
Y20 VSS_146 VSS_208 AK18 E13 VSS_22 VSS_84 N19 AV10 VSS_270 RSVD_9 K20 PART 12 OF 13
AA1 VSS_147 VSS_209 AK20 E14 VSS_23 VSS_85 N22 AV12 VSS_271 RSVD_10 M3 RAVEN-BRIDGE-GP
AA5 VSS_148 VSS_210 AK22 E15 VSS_24 VSS_86 N25 AV14 VSS_272 RSVD_11 M6
CPU
VSS_149 VSS_211 VSS_25 VSS_87 VSS_273 RSVD_12 1st = 071.RAVEN.000U
AA13 AK25 E16 N28 AV16 M13
AA15 VSS_150 VSS_212 AL1 E18 VSS_26 VSS_88 P1 AV19 VSS_274 RSVD_13 P6
AA17 VSS_151 VSS_213 AL5 E19 VSS_27 VSS_89 P5 AV21 VSS_275 RSVD_22 P22
AA19 VSS_152 VSS_214 AL7 E20 VSS_28 VSS_90 P14 AV23 VSS_276 RSVD_23 T3 CPU1M 13 OF 13
AB14 VSS_153 VSS_215 AL10 E21 VSS_29 VSS_91 P16 AV26 VSS_277 RSVD_30 T6 CAMERAS
AB16 VSS_154 VSS_216 AL12 E22 VSS_30 VSS_92 P18 AV28 VSS_278 RSVD_31 T29
AB18 VSS_155 VSS_217 AL16 E23 VSS_31 VSS_93 P20 AV32 VSS_279 RSVD_37 W6 A18 B15
AB20 VSS_156 VSS_218 AL23 E25 VSS_32 VSS_94 P23 AW5 VSS_280 RSVD_44 W21 C18 CAM0_CSI2_CLOCKP CAM0_CLK
C AC5 VSS_157 VSS_219 AL26 E26 VSS_33 VSS_95 P26 AW28 VSS_281 RSVD_49 W22 CAM0_CSI2_CLOCKN D15 C
AC8 VSS_158 VSS_220 AM5 E27 VSS_34 VSS_96 P28 AY6 VSS_282 RSVD_50 Y21 A15 CAM0_I2C_SCL C14
AC11 VSS_159 VSS_221 AM8 F5 VSS_35 VSS_97 P32 AY7 VSS_283 RSVD_57 Y27 C15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA
AC12 VSS_160 VSS_222 AM15 F28 VSS_36 VSS_98 R5 AY8 VSS_284 RSVD_58 AA3 CAM0_CSI2_DATAN0 B13
AC13 VSS_161 VSS_223 AM20 G1 VSS_37 VSS_99 R11 AY10 VSS_285 RSVD_59 AA6 B16 CAM0_SHUTDOWN
AC15 VSS_162 VSS_224 AM22 G5 VSS_38 VSS_100 R12 AY11 VSS_286 RSVD_60 AC29 C16 CAM0_CSI2_DATAP1
AC17 VSS_163 VSS_225 AM25 G16 VSS_39 VSS_101 R13 AY12 VSS_287 RSVD_69 AD3 CAM0_CSI2_DATAN1
AC19 VSS_164 VSS_226 AM28 G19 VSS_40 VSS_102 R15 AY13 VSS_288 RSVD_70 AD6 C19
AD1 VSS_165 VSS_227 AN1 G21 VSS_41 VSS_103 R17 AY14 VSS_289 RSVD_71 AF3 B18 CAM0_CSI2_DATAP2
AD5 VSS_166 VSS_228 AN5 G23 VSS_42 VSS_104 R19 AY15 VSS_290 RSVD_74 AF6 CAM0_CSI2_DATAN2
AD14 VSS_167 VSS_229 AN7 G26 VSS_43 VSS_105 R22 AY16 VSS_291 RSVD_75 AF30 B17
AD16 VSS_168 VSS_230 AN10 G28 VSS_44 VSS_106 R25 AY18 VSS_292 RSVD_78 AJ6 D17 CAM0_CSI2_DATAP3
AD18 VSS_169 VSS_231 AN15 G32 VSS_45 VSS_107 R28 AY19 VSS_293 RSVD_79 AJ24 CAM0_CSI2_DATAN3
AD20 VSS_170 VSS_232 AN18 H5 VSS_46 VSS_108 R30 AY20 VSS_294 RSVD_80 AK23 D12 B10
AE5 VSS_171 VSS_233 AN21 H13 VSS_47 VSS_109 T1 AY21 VSS_295 RSVD_81 AK27 B12 CAM1_CSI2_CLOCKP CAM1_CLK
AE11 VSS_172 VSS_234 AN23 H18 VSS_48 VSS_110 T5 AY22 VSS_296 RSVD_82 AL3 CAM1_CSI2_CLOCKN A11
AE12 VSS_173 VSS_235 AN26 H20 VSS_49 VSS_111 T14 AY23 VSS_297 RSVD_83 AN29 C13 CAM1_I2C_SCL C11
AE13 VSS_174 VSS_236 AN28 H22 VSS_50 VSS_112 T16 AY25 VSS_298 RSVD_87 AN31 A13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA
AE15 VSS_175 VSS_237 AN32 H25 VSS_51 VSS_113 T18 AY26 VSS_299 RSVD_88 CAM1_CSI2_DATAN0 D11
AE17 VSS_176 VSS_238 AP5 H28 VSS_52 VSS_114 T20 AY27 VSS_300 B11 CAM1_SHUTDOWN
AE19 VSS_177 VSS_239 AP8 K1 VSS_53 VSS_115 T23 BB1 VSS_301 C12 CAM1_CSI2_DATAP1 D13
AF1 VSS_178 VSS_240 AP13 K5 VSS_54 VSS_116 T26 BB20 VSS_302 CAM1_CSI2_DATAN1 CAM_PRIV_LED D10
AF5 VSS_179 VSS_241 AP15 K16 VSS_55 VSS_117 T28 BB32 VSS_303 M14 APU_PLLTEST0_R R902 1 2 J13 CAM_IR_ILLU
AF14 VSS_180 VSS_242 AP18 K19 VSS_56 VSS_118 U13 BD3 VSS_304 RSVD_14 AL6 RSVD_84 R901 1
HDT 2
0R0402-PAD APU_PLLTEST0 [68]
RSVD_6
FP5 REV 0.90
AF16 VSS_181 VSS_243 AP20 K21 VSS_57 VSS_119 U15 BD7 VSS_305 RSVD_84 AL11 APU_PLLTEST1_R R903 1
HDT 2
0R0402-PAD 5V_S5
RAVEN-BRIDGE-GP
PART 13 OF 13
AF18 VSS_182 VSS_244 AP25 K22 VSS_58 VSS_120 U17 BD10 VSS_306 RSVD_85 AN16 APU_DBRDY_R R904 1
HDT 2
0R0402-PAD
APU_PLLTEST1 [68] CPU
AF20 VSS_183 VSS_245 AP28 K26 VSS_59 VSS_121 U19 BD12 VSS_307 RSVD_86 HDT 0R0402-PAD APU_DBRDY [68] 1st = 071.RAVEN.000U
AG5 VSS_184 VSS_246 AR1 K28 VSS_60 VSS_122 V5 BD14 VSS_308
A00 Change 0 ohm to short pad 20181221
VSS_185 VSS_247 VSS_61 VSS_123 VSS_309
FP5 REV 0.90 FP5 REV 0.90 FP5 REV 0.90
B PART 8 OF 13 PART 7 OF 13 PART 11 OF 13 B
RAVEN-BRIDGE-GP RAVEN-BRIDGE-GP RAVEN-BRIDGE-GP
1st = 071.RAVEN.000U 1st = 071.RAVEN.000U 1st = 071.RAVEN.000U
CPU
CPU CPU
A <Core Design> A
Wistron Corporation
Title
CPU (VSS)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
APU Caps AMD

VDDCR
1V_CPU_CORE 22uF C603 x16 Follow Eva request add 22u to 20 pcs
180pF C402 x1 https://vinafix.com
1
1
PC1001 PC1002 PC1003 PC1004 PC1005 PC1006 PC1007 PC1008 PC1010 PC1011
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2
2
D D
1
1
2
2
1
C1018 1V_CPU_CORE
Stitching Caps
SC180P50V2JN-1DLGP
2
1
C1050 C1051 C1052
SCD01U50V2KX-1DLGP SCD01U50V2KX-1DLGP SCD01U50V2KX-1DLGP
2
AMD
VDDCR_SOC
22uF C603 x7
1D2V_CPU_SOC 1uF C402 x1 Follow Eva request add 22u to 12 pcs
180pF C402 x1
1
C1001 C1046
SC1U10V2KX-1DLGP SC180P50V2JN-1DLGP
2
C C
1
1
2
2
1
PC1066 PC1067
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2
AMD
1D2V_S3 VDDIO_MEM_S3
22uF C603 x9
1uF C402 x2
0D22uF C402 x4
180pF C402 x2
1
1
C1055 C1056 C1057 C1058
PC1051 PC1052 PC1053 PC1054 PC1060 PC1061
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SCD22U10V2KX-2-GP SCD22U10V2KX-2-GP SCD22U10V2KX-2-GP SCD22U10V2KX-2-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2
2
B B
1
PC1058 PC1059 PC1062

SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2
2
1
C1002 C1003 C1068 C1072

SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC180P50V2JN-1DLGP SC180P50V2JN-1DLGP
2
AMD
0D9V_S0 VDDP
22uF C603 x2
1uF C402 x8
180pF C402 x1
1
C1005 C1004 C1007 C1006 C1009 C1008 C1011 C1010

SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
2
A <Core Design> A
Wistron Corporation
1
C1078
PC1078 PC1080 SC180P50V2JN-1DLGP Title
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP CPU (POWER CAP1)
2

A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
AMD
AMD VDD_33_S5
0D9V_S5 VDDP_S5 0D9V_S5_APU 3D3V_S5 22uF C603 x1 3D3V_S5_APU https://vinafix.com
R1102 22uF C603 x1 APU Caps 1uF C402 x2 R1103
1 2 1uF C402 x3 1 2
0R0603-PAD C1115 C1101 C1102 C1103 0R0603-PAD C1110 C1119 C1114
1
SC22U6D3V3MX-1-DL-GP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
2
2
D D
AMD
VDD_18_S5 AMD
22uF C603 x1 VDD_33
1D8V_S5 1D8V_S5_APU 22uF C603 x1
1uF C402 x2
R1104 3D3V_S0 1uF C402 x2 3D3V_S0_APU
1 2 R1105
1 2
0R0603-PAD C1106 C1117 C1107
1
1
0R0603-PAD C1108 C1118 C1109
1
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
2
2
C C
AMD
VDD_18
22uF C603 x1
1uF C402 x2
1D8V_S0 1D8V_S0_APU
R1106
1 2
0R0603-PAD C1105 C1116 C1104
1
1
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
2
AMD
1D8V_S0_AUDIO VDDIO_AUDIO
22uF C603 x1
1uF C402 x1
C1120 C1111
1
B B
SC1U10V2KX-1DLGP
2
1D5V_VDDBT_RTC AMD
VDDBT_RTC_G
1uF C402 x1
0D22uF C402 x1 <Core Design>
C1112 C1113
1
Wistron Corporation
SC1U10V2KX-1DLGP
SCD22U10V2KX-2-GP
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A

2
Title
CPU (POWER CAP2)
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = DDR4 SODIMM
[5]
[5]
M_A_A0
M_A_A1
[5]
[5]
M_A_DQ0
M_A_DQ5
https://vinafix.com
[5] M_A_A2 [5] M_A_DQ3
Reverse Type
[5] M_A_A3 [5] M_A_DQ2
[5] M_A_A4 [5] M_A_DQ1
[5] M_A_A5 [5] M_A_DQ4
[5] M_A_A6 [5] M_A_DQ6
[5] M_A_A7 [5] M_A_DQ7
[5] M_A_A8 [5] M_A_DQ9 DM1A 1 OF 4
[5] M_A_A9 [5] M_A_DQ8 M_A_A0 M_A_DQ0
144 8 DM1D 4 OF 4
[5] M_A_A10 [5] M_A_DQ15 M_A_A1 A0 DQ0 M_A_DQ5 1D2V_S3 3D3V_S0
133 7
[5] M_A_A11 [5] M_A_DQ11 M_A_A2 A1 DQ1 M_A_DQ3
132 20 1 99
[5] M_A_A12 [5] M_A_DQ13 M_A_A3 A2 DQ2 M_A_DQ2 VSS VSS
D 131 21 DM1C 3 OF 4 2 102 D
128 4 5 103
126 3 111 255 6 106
[5] M_A_A15 [5] M_A_DQ10 M_A_A6 A5 DQ5 M_A_DQ6 VDD VDDSPD VSS VSS
127 16 112 9 107
[5] M_A_A16 [5] M_A_DQ20 M_A_A7 A6 DQ6 M_A_DQ7 VDD 2D5V_S3 VSS VSS
122 17 117 10 167
[5] M_A_DQ16 M_A_A8 A7 DQ7 M_A_DQ9 VDD VSS VSS
125 28 118 257 14 168
[5] M_A_BA0 [5] M_A_DQ23 A8 DQ8 VDD VPP VSS VSS
1
M_A_A9 121 29 M_A_DQ8 123 259 0D6V_S0 C1230 15 171
[5] M_A_BA1 [5] M_A_DQ18 M_A_A10 A9 DQ9 M_A_DQ15 VDD VPP VSS VSS
146 41 124 DY 18 172
[5] M_A_BG0 [5] M_A_DQ17 M_A_A11 A10/AP DQ10 M_A_DQ11 VDD SCD1U16V2KX-3DLGP VSS VSS
120 42 129 258 19 175
[5] M_A_BG1 [5] M_A_DQ21 A11 DQ11 VDD VTT VSS VSS
2
M_A_A12 119 24 M_A_DQ13 130 22 176
158 25 135 23 180
151 38 136 26 181
[5] M_A_DQ24 M_A_A15 WE#/A14 DQ14 M_A_DQ10 VDD VSS VSS
156 37 141 27 184
[5] M_A_DQ25 M_A_A16 CAS#/A15 DQ15 M_A_DQ20 VDD VSS VSS
152 50 142 30 185
[5] M_A_DQ31 RAS#/A16 DQ16 M_A_DQ16 VDD VSS VSS
49 147 261 31 188
[5] M_A_CLK0 [5] M_A_DQ26 M_A_BA0 DQ17 M_A_DQ23 VDD 261 VSS VSS
150 62 148 262 35 189
[5] M_A_CLK#0 [5] M_A_DQ28 M_A_BA1 BA0 DQ18 M_A_DQ18 VDD 262 VSS VSS
145 63 153 36 192
[5] M_A_CLK1 [5] M_A_DQ29 M_A_BG0 BA1 DQ19 M_A_DQ17 VDD VSS VSS
115 46 154 39 193
[5] M_A_CLK#1 [5] M_A_DQ30 M_A_BG1 BG0 DQ20 M_A_DQ21 VDD VSS VSS
113 45 159 NP1 40 196
[5] M_A_DQ27 BG1 DQ21 M_A_DQ22 VDD NP1 VSS VSS
[5] M_A_CKE0 58 160 NP2 43 197
[5] M_A_DQ32 DQ22 M_A_DQ19 VDD NP2 VSS VSS
[5] M_A_CKE1 92 59 163 44 201
[5] M_A_DQ33 CB0/NC DQ23 M_A_DQ24 VDD VSS VSS
91 70 47 202
[5] M_A_DQ34 CB1/NC DQ24 M_A_DQ25 VSS VSS
101 71 48 205
[5] M_A_CS#0 [5] M_A_DQ35 CB2/NC DQ25 M_A_DQ31 VSS VSS
105 83 DDR4-260P-79-GP-U 51 206
[5] M_A_CS#1 [5] M_A_DQ37 CB3/NC DQ26 M_A_DQ26 VSS VSS
88 84 52 209
[5] M_A_DQ36
87 CB4/NC DQ27 66 M_A_DQ28 062.10011.M003 56 VSS VSS 210
100 67 57 213
[5] M_A_ODT0 104 79 60 214
[5] M_A_ODT1 80 61 217
[5] M_A_DQ41 M_A_CLK0 DQ31 M_A_DQ32 VSS VSS
137 174 DM1B 2 OF 4 64 218
[5] M_A_DQ42 M_A_CLK#0 CK0_T DQ32 M_A_DQ33 VSS VSS
139 173 65 222
[5] M_A_DQ43 M_A_CLK1 CK0_C DQ33 M_A_DQ39 M_A_DQS_DN0 VSS VSS
138 187 11 68 223
[5] M_A_DQ44 M_A_CLK#1 CK1_T/NF DQ34 M_A_DQ34 DQS0_C M_A_DQS_DP0 VSS VSS
140 186 Swap 20180725 13 69 226
[5] M_A_DQ45 CK1_C/NF DQ35 M_A_DQ37 DQS0_T M_A_DQS_DN1 VSS VSS
170 32 72 227
[5] M_A_DQ46 M_A_CKE0 DQ36 M_A_DQ36 DQS1_C M_A_DQS_DP1 VSS VSS
109 169 34 73 230
[13,17] CPU_SMB_SDA_DDR [5] M_A_DQ47 M_A_CKE1 CKE0 DQ37 M_A_DQ38 DQS1_T M_A_DQS_DN2 VSS VSS
110 183 53 77 231
[13,17] CPU_SMB_SCL_DDR [5] M_A_DQ48 CKE1 DQ38 M_A_DQ35 DQS2_C M_A_DQS_DP2 VSS VSS
182 Swap 20180725 55 78 234
[5] M_A_DQ49 M_A_CS#0 DQ39 M_A_DQ40 DQS2_T M_A_DQS_DN3 VSS VSS
149 195 74 81 235
[5] M_A_DQ51 M_A_CS#1 CS0# DQ40 M_A_DQ41 DQS3_C M_A_DQS_DP3 VSS VSS
157 194 76 82 238
[5] M_A_DQ50 CS1# DQ41 M_A_DQ42 DQS3_T M_A_DQS_DN4 VSS VSS
162 207 177 85 239
[5] M_A_ACT_N [5] M_A_DQ52 C0/CS2#/NC DQ42 M_A_DQ43 DQS4_C M_A_DQS_DP4 VSS VSS
165 208 179 86 243
[5] M_A_ALERT_N [5] M_A_DQ53 C1/CS3#/NC DQ43 M_A_DQ44 DQS4_T M_A_DQS_DN5 VSS VSS
C 191 198 89 244 C
[5] M_A_EVENT# [5] M_A_DQ54 M_A_ODT0 DQ44 M_A_DQ45 DQS5_C M_A_DQS_DP5 VSS VSS
155 190 200 90 247
[5] M_A_DQ55 M_A_ODT1 ODT0 DQ45 M_A_DQ46 DQS5_T M_A_DQS_DN6 VSS VSS
161 203 219 93 248
[5] M_A_PARITY [5] M_A_DQ61 ODT1 DQ46 M_A_DQ47 DQS6_C M_A_DQS_DP6 VSS VSS
204 221 94 251
[5] M_A_DQ56 DQ47 M_A_DQ48 DQS6_T M_A_DQS_DN7 VSS VSS
256 216 240 98 252
[13] V_SM_VREF_CNTA [5] M_A_DQ63 SA0 DQ48 M_A_DQ49 DQS7_C M_A_DQS_DP7 VSS VSS
260 215 242
[5] M_A_DQ59 SA1 DQ49 M_A_DQ51 DQS7_T
166 228 95
[5] SM_DRAMRST#_A [5] M_A_DQ57 SA2 DQ50 M_A_DQ50 DQS8_C
229 97 DDR4-260P-79-GP-U
[5] M_A_DQ60 CPU_SMB_SDA_DDR 254 DQ51 M_A_DQ52 DQS8_T
211
[5] M_A_DQ58 CPU_SMB_SCL_DDR 253 SDA DQ52 212 M_A_DQ53 Applicable for ECC 12 M_A_DM0 062.10011.M003
[5] M_A_DQ62 SCL DQ53 M_A_DQ54 DM0#/DBI0# M_A_DM1
224 33
DQ54 225 M_A_DQ55 DM1#/DBI# 54 M_A_DM2
SM_DRAMRST#_A 108 DQ55 237 M_A_DQ61 DM2#/DBI2# 75 M_A_DM3
M_A_ACT_N 114 RESET# DQ56 236 M_A_DQ56 DM3#/DBI3# 178 M_A_DM4
[5] M_A_DQS_DN0 M_A_ALERT_N 116 ACT# DQ57 M_A_DQ63 DM4#/DBI4# M_A_DM5
249 199
[5] M_A_DQS_DP0 M_A_EVENT# ALERT# DQ58 M_A_DQ59 DM5#/DBI5# M_A_DM6
134 250 220
[5] M_A_DQS_DN1 EVENT#/NF DQ59 M_A_DQ57 DM6#/DBI6# M_A_DM7
232 241
[5] M_A_DQS_DP1 M_A_PARITY DQ60 M_A_DQ60 DM7#/DBI7#
143 233 96
[5] M_A_DQS_DN2 PARITY DQ61 M_A_DQ58 DM8#/DBI#/NC
245
[5] M_A_DQS_DP2 V_SM_VREF_CNTA DQ62 M_A_DQ62
164 246
[5] M_A_DQS_DN3 VREFCA DQ63
[5] M_A_DQS_DP3 DDR4-260P-79-GP-U
SM_DRAMRST#_A
[5] M_A_DQS_DN4
DDR4-260P-79-GP-U
062.10011.M003
[5] M_A_DQS_DP4
[5] M_A_DQS_DN5 062.10011.M003
[5] M_A_DQS_DP5
[5] M_A_DQS_DN6
1
[5] M_A_DQS_DP6
[5] M_A_DQS_DN7 ED1201
[5] M_A_DQS_DP7 AZ5123-01F-R7G-GP-U
83.05123.AA0
2
[5] M_A_DM0
[5] M_A_DM1
1D2V_S3
[5] M_A_DM2
[5] M_A_DM3
[5] M_A_DM4
1 2 M_A_EVENT#
[5] M_A_DM5 Layout note: closed to Dimm
[5] M_A_DM6 R1205 1KR2J-L2-GP
1 2 M_A_ALERT_N
[5] M_A_DM7
B
R1203 DY 1KR2J-L2-GP Layout Note : 10uF x8 B
Place these Caps near DIMM1 1uF x8
2D5V_S3 0D6V_S0 0D6V_S0
Layout Note : 1D2V_S3
1 DY 2 M_A_PARITY DIMM_VREFCA VREFCA traces should

have width=20 mil;
R1204 0R2J-2-GP C1225 C1226 C1227 C1228 C1221
spacing=20 mil C1219
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
1
1
C1203 C1204 C1205 C1206 C1207 C1208 C1209 C1210
DY
1
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC4D7U6D3V3KX-DLGP
1D2V_S3
DY
2
2
2
SPD Address of DIMMA 1 R1201 1KR2F-L1-GP
1
2
2 V_SM_VREF_CNTA
R1202 1KR2F-L1-GP
1
SPD SA2 0 C1229 C1233

C1211 C1212 C1213 C1214 C1215 C1216 C1217 C1218 modify follow CRB 20170914
1
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
Will change to 0603 type at DVT1

2
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
DY
SPD SA1 0
2
SPD SA0 0
A A
<Core Design>
Wistron Corporation
Title
Title
DDR (DDR4-SODIMM1_CHA)
Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bensolo AMD A00
Date:Friday, December 28, 2018
Date: Sheet
Sheet 12 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = DDR4 SODIMM
[6]
[6]
M_B_A0
M_B_A1
[6]
[6]
M_B_DQ0
M_B_DQ5
Standard Type 1D2V_S3
DM2C 3 OF 4
3D3V_S0
https://vinafix.com
[6] M_B_A2 [6] M_B_DQ3 DM2A 1 OF 4
111 255
[6] M_B_A3 [6] M_B_DQ2 M_B_A0 M_B_DQ0 VDD VDDSPD
144 8 112 DM2D 4 OF 4
[6] M_B_A4 [6] M_B_DQ1 M_B_A1 A0 DQ0 M_B_DQ5 VDD 2D5V_S3
133 7 117
[6] M_B_A5 [6] M_B_DQ4 M_B_A2 A1 DQ1 M_B_DQ3 VDD
132 20 118 257 1 99
[6] M_B_A6 [6] M_B_DQ6 A2 DQ2 VDD VPP VSS VSS
1
M_B_A3 131 21 M_B_DQ2 123 259 C1328 2 102
[6] M_B_A7 [6] M_B_DQ7 M_B_A4 A3 DQ3 M_B_DQ1 VDD VPP DY VSS VSS
128 4 124 5 103
[6] M_B_A8 [6] M_B_DQ9 M_B_A5 A4 DQ4 M_B_DQ4 VDD 0D6V_S0 SCD1U16V2KX-3DLGP VSS VSS
126 3 129 258 6 106
[6] M_B_A9 [6] M_B_DQ8 A5 DQ5 VDD VTT VSS VSS
2
M_B_A6 127 16 M_B_DQ6 130 9 107
[6] M_B_A10 [6] M_B_DQ15 M_B_A7 A6 DQ6 M_B_DQ7 VDD VSS VSS
122 17 135 10 167
D 125 28 136 14 168 D
121 29 141 15 171
146 41 142 18 172
[6] M_B_A14 [6] M_B_DQ14 M_B_A11 A10/AP DQ10 M_B_DQ11 VDD VSS VSS
120 42 147 261 19 175
[6] M_B_A15 [6] M_B_DQ10 M_B_A12 A11 DQ11 M_B_DQ13 VDD 261 VSS VSS
119 24 148 262 22 176
[6] M_B_A16 [6] M_B_DQ20 M_B_A13 A12 DQ12 M_B_DQ12 VDD 262 VSS VSS
158 25 153 23 180
[6] M_B_DQ16 M_B_A14 A13 DQ13 M_B_DQ14 VDD VSS VSS
[6] M_B_BA0 151 38 154 26 181
[6] M_B_DQ23 M_B_A15 WE#/A14 DQ14 M_B_DQ10 VDD VSS VSS
[6] M_B_BA1 156 37 159 NP1 27 184
[6] M_B_DQ18 M_B_A16 CAS#/A15 DQ15 M_B_DQ20 VDD NP1 VSS VSS
[6] M_B_BG0 152 50 160 NP2 30 185
[6] M_B_DQ17 RAS#/A16 DQ16 M_B_DQ16 VDD NP2 VSS VSS
[6] M_B_BG1 49 163 31 188
[6] M_B_DQ21 M_B_BA0 DQ17 M_B_DQ23 VDD VSS VSS
150 62 35 189
[6] M_B_DQ22 M_B_BA1 BA0 DQ18 M_B_DQ18 VSS VSS
145 63 36 192
[6] M_B_DQ19 M_B_BG0 BA1 DQ19 M_B_DQ17 VSS VSS
115 46 DDR4-260P-79-GP-U 39 193
[6] M_B_DQ24 M_B_BG1 BG0 DQ20 M_B_DQ21 VSS VSS
113 45 40 196
[6] M_B_CLK0 [6] M_B_DQ25 BG1 DQ21 58 M_B_DQ22 062.10011.M003 43 VSS VSS 197
[6] M_B_CLK#0 [6] M_B_DQ31 DQ22 M_B_DQ19 VSS VSS
92 59 44 201
[6] M_B_CLK1 [6] M_B_DQ26 CB0/NC DQ23 M_B_DQ24 VSS VSS
91 70 47 202
[6] M_B_CLK#1 [6] M_B_DQ28 CB1/NC DQ24 M_B_DQ25 VSS VSS
101 71 48 205
[6] M_B_DQ29 CB2/NC DQ25 M_B_DQ31 VSS VSS
105 83 51 206
[6] M_B_CKE0 [6] M_B_DQ30 CB3/NC DQ26 M_B_DQ26 VSS VSS
88 84 52 209
[6] M_B_CKE1 [6] M_B_DQ27 CB4/NC DQ27 M_B_DQ28 VSS VSS
87 66 56 210
[6] M_B_CS#0 100 67 57 213
[6] M_B_CS#1 104 79 60 214
80 61 217
[6] M_B_DQ35 M_B_CLK0 DQ31 M_B_DQ32 VSS VSS
137 174 64 218
[6] M_B_DQ37 M_B_CLK#0 CK0_T DQ32 M_B_DQ33 VSS VSS
139 173 65 222
[6] M_B_DQ36 M_B_CLK1 CK0_C DQ33 M_B_DQ34 VSS VSS
138 187 DM2B 2 OF 4 68 223
[6] M_B_ODT0 [6] M_B_DQ38 M_B_CLK#1 CK1_T/NF DQ34 M_B_DQ35 VSS VSS
140 186 69 226
[6] M_B_ODT1 [6] M_B_DQ39 CK1_C/NF DQ35 M_B_DQ37 M_B_DQS_DN0 VSS VSS
170 11 72 227
[6] M_B_DQ40 M_B_CKE0 DQ36 M_B_DQ36 DQS0_C M_B_DQS_DP0 VSS VSS
109 169 13 73 230
[6] M_B_DQ41 M_B_CKE1 CKE0 DQ37 M_B_DQ38 DQS0_T M_B_DQS_DN1 VSS VSS
110 183 32 77 231
[12,17] CPU_SMB_SDA_DDR [6] M_B_DQ42 CKE1 DQ38 M_B_DQ39 DQS1_C M_B_DQS_DP1 VSS VSS
182 34 78 234
[12,17] CPU_SMB_SCL_DDR [6] M_B_DQ43 M_B_CS#0 DQ39 M_B_DQ40 DQS1_T M_B_DQS_DN2 VSS VSS
149 195 53 81 235
[6] M_B_DQ44 M_B_CS#1 CS0# DQ40 M_B_DQ41 DQS2_C M_B_DQS_DP2 VSS VSS
157 194 55 82 238
[6] M_B_DQ45 CS1# DQ41 M_B_DQ42 DQS2_T M_B_DQS_DN3 VSS VSS
162 207 74 85 239
[6] SM_DRAMRST#_B [6] M_B_DQ46 C0/CS2#/NC DQ42 M_B_DQ43 DQS3_C M_B_DQS_DP3 VSS VSS
165 208 76 86 243
[6] M_B_ACT_N [6] M_B_DQ47 C1/CS3#/NC DQ43 M_B_DQ44 DQS3_T M_B_DQS_DN4 VSS VSS
191 177 89 244
[6] M_B_ALERT_N [6] M_B_DQ48 M_B_ODT0 DQ44 M_B_DQ45 DQS4_C M_B_DQS_DP4 VSS VSS
155 190 179 90 247
[6] M_B_EVENT# [6] M_B_DQ49 M_B_ODT1 ODT0 DQ45 M_B_DQ46 DQS4_T M_B_DQS_DN5 VSS VSS
161 203 198 93 248
[6] M_B_DQ50 ODT1 DQ46 M_B_DQ47 DQS5_C M_B_DQS_DP5 VSS VSS
204 200 94 251
[6] M_B_PARITY [6] M_B_DQ51 3D3V_S0 DQ47 M_B_DQ48 DQS5_T M_B_DQS_DN6 VSS VSS
256 216 219 98 252
[6] M_B_DQ52 M_B_SA1 260 SA0 DQ48 M_B_DQ49 DQS6_C M_B_DQS_DP6 VSS VSS
C
[6] M_B_DQ53 R1305 1 2 215 221 C
[12] V_SM_VREF_CNTA 166 SA1 DQ49 228 M_B_DQ50 DQS6_T 240 M_B_DQS_DN7
[6] M_B_DQ54 10KR2J-L-GP
SA2 DQ50 229 M_B_DQ51 DQS7_C 242 M_B_DQS_DP7
[6] M_B_DQ55 DDR4-260P-79-GP-U
CPU_SMB_SDA_DDR 254 DQ51 211 M_B_DQ52 DQS7_T 95
[6] M_B_DQ61 CPU_SMB_SCL_DDR 253 SDA DQ52 212 M_B_DQ53 DQS8_C 97 Applicable for ECC 062.10011.M003
[6] M_B_DQ56 SCL DQ53 M_B_DQ54 DQS8_T
224
[6] M_B_DQ63 DQ54 M_B_DQ55 M_B_DM0
225 12
[6] M_B_DQ59 SM_DRAMRST#_B108 DQ55 M_B_DQ61 DM0#/DBI0# M_B_DM1
237 33
[6] M_B_DQ57 M_B_ACT_N 114 RESET# DQ56 M_B_DQ56 DM1#/DBI# M_B_DM2
236 54
[6] M_B_DQ60 M_B_ALERT_N 116 ACT# DQ57 M_B_DQ63 DM2#/DBI2# M_B_DM3
249 75
[6] M_B_DQ58 M_B_EVENT# 134 ALERT# DQ58 M_B_DQ59 DM3#/DBI3# M_B_DM4
250 178
[6] M_B_DQ62 EVENT#/NF DQ59 M_B_DQ57 DM4#/DBI4# M_B_DM5
232 199
M_B_PARITY 143 DQ60 233 M_B_DQ60 DM5#/DBI5# 220 M_B_DM6
PARITY DQ61 245 M_B_DQ58 DM6#/DBI6# 241 M_B_DM7
V_SM_VREF_CNTB 164 DQ62 246 M_B_DQ62 DM7#/DBI7# 96
[6] M_B_DQS_DN0 VREFCA DQ63 DM8#/DBI#/NC
[6] M_B_DQS_DP0
[6] M_B_DQS_DN1
[6] M_B_DQS_DP1 DDR4-260P-79-GP-U DDR4-260P-79-GP-U
SM_DRAMRST#_B
[6] M_B_DQS_DN2 062.10011.M003 062.10011.M003
[6] M_B_DQS_DP2
[6] M_B_DQS_DN3
[6] M_B_DQS_DP3
[6] M_B_DQS_DN4
1
[6] M_B_DQS_DP4
[6] M_B_DQS_DN5 ED1301
[6] M_B_DQS_DP5 AZ5123-01F-R7G-GP-U
[6] M_B_DQS_DN6 83.05123.AA0
[6] M_B_DQS_DP6
[6] M_B_DQS_DN7
2
[6] M_B_DQS_DP7
1D2V_S3
[6] M_B_DM0
1 2 M_B_EVENT#
[6] M_B_DM1
[6] M_B_DM2 R1306 1KR2J-L2-GP
1 2 M_B_ALERT_N
[6] M_B_DM3 Layout note: closed to Dimm
[6] M_B_DM4 R1302 DY 1KR2J-L2-GP Layout Note : 10uF x8
[6] M_B_DM5
Layout Note : Place these Caps near DIMM2
B
[6]
[6]
M_B_DM6
M_B_DM7 DIMM_VREFCA VREFCA traces should
1uF x8
B
2D5V_S3 0D6V_S0 0D6V_S0
DB_170406_2 have width=20 mil; 1D2V_S3
1 2 M_B_PARITY
Follow AMD CRB
DB_170407
spacing=20 mil
DY Follow Sky Lin request
R1301 0R2J-2-GP C1309 C1310 C1314 C1315 C1304
C1303
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
1
1
1D2V_S3 C1305 C1311 C1306 C1307 C1312 C1313 C1326 C1327
DY
1
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC4D7U6D3V3KX-DLGP
DY
2
2
2
1 R1303 21KR2F-L1-GP
V_SM_VREF_CNTB
SPD Address of DIMMB
1 2
R1304 1KR2F-L1-GP
1
C1316 C1317
SPD SA2 0 SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP

2
DY C1318 C1319 C1320 C1321 C1322 C1323 C1324 C1325 modify follow CRB 20170914
1
Will change to 0603 type at DVT1
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SPD SA1 1
2
SPD SA0 0
V_SM_VREF_CNTA 1 2 V_SM_VREF_CNTB
DY
R1307 0R2J-2-GP
A A
<Core Design>
Wistron Corporation
Title
Title
DDR (DDR4-SODIMM2_CHB)
Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bensolo AMD A00
Date: Sheet
Sheet 13 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A
Wistron Corporation A
Title
DDR (RSVD)
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A
Title
DDR (RSVD)
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
CLK/SATA/USB/SPI/LPC LPCCLK1/EGPIO75
GFX & GPP CLK, 85Ω
SATA & USB, 90Ω
P_GPP CLK port Device CLK_REQ5_L
0 SSD If unused, CPU1E 5 OF 13 3D3V_S0
1 WLAN enable internal pull up or pull down by software. CLK/LPC/EMMC/SD/SPI/eSPI/UART https://vinafix.com
2 NC
3 GPU
4 LAN SSD_CLKREQ_CPU_N AV18 ECSMI#_KBC 1 2
5 NC W LAN_CLKREQ_CPU_N AN19 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 R1606 10KR2J-L-GP
6 NC VRAM_ID2 AP19 CLK_REQ1_L/AGPIO115
PEG_CLKREQ0_CPU_N AT19 CLK_REQ2_L/AGPIO116
LAN_CLKREQ_CPU_N AU19 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
AW18 CLK_REQ4_L/OSCIN/EGPIO132
AW19 CLK_REQ5_L/EGPIO120
D D
CLK_REQ6_L/EGPIO121
3D3V_S0 BD13 By AMD check 20180627
[66] LAN_CLKREQ_CPU_N EGPIO70/SD_CLK BB14 EC_SMI_APU 1 R1602 2 0R2J-L-GP ECSMI#_KBC
1 R1631 2 LAN_CLKREQ_CPU_N SSD_CLK_CPU_P AK1 LPC_PD_L/SD_CMD/AGPIO21 BB12 LPC_AD_CPU_P0_R 1 R1626 2 0R2J-L-GP LPC_AD_CPU_P0
10KR2J-L-GP SSD_CLK_CPU_N AK3 GPP_CLK0P LAD0/SD_DATA0/EGPIO104 BC11 LPC_AD_CPU_P1_R 1 R1627 2 0R2J-L-GP LPC_AD_CPU_P1
[61] W LAN_CLKREQ_CPU_N SSD GPP_CLK0N LAD1/SD_DATA1/EGPIO105 BB15 LPC_AD_CPU_P2_R 1 R1628 2 0R2J-L-GP LPC_AD_CPU_P2
[79] PEG_CLKREQ0_CPU_N R1630 W LAN_CLK_CPU_P AM2 LAD2/SD_DATA2/EGPIO106 BC15 LPC_AD_CPU_P3_R 1 R1629 2 0R2J-L-GP LPC_AD_CPU_P3
1 PEG_CLKREQ0_CPU_N
WLAN W LAN_CLK_CPU_N GPP_CLK1P LAD3/SD_DATA3/EGPIO107 BA15 LPC_CLK_CPU_P0 1 R1608 2 LPC_CLK_KBC
DY 2
10KR2J-L-GP
AM4
GPP_CLK1N LPCCLK0/EGPIO74 BC13
22R2J-2-GP
LPC_CLKRUN#_CPU
AM1 LPC_CLKRUN_L/AGPIO88 BB13 LPC_CLK_CPU_P1 1 R1609 2 33R2J-L1-GP LPC_CLK_DBG
[63] SSD_CLKREQ_CPU_N 1 2 LPC_CLKRUN#_CPU AM3 GPP_CLK2P LPCCLK1/EGPIO75 BC12 LPC_SERIRQ_CPU
R1604 10KR2J-L-GP GPP_CLK2N SERIRQ/AGPIO87 BA12 LPC_FRAME#_CPU
GFX_CLK_CPU_P AL2 LFRAME_L/EGPIO109 X01 By EMI check 20180925
1 2 SSD_CLKREQ_CPU_N GFX_CLK_CPU_N AL4 GPP_CLK3P BD11 A_RST#_APU 1 R1612 2 33R2J-L1-GP LPC_RST#
[61] W LAN_CLK_CPU_P
R1634 10KR2J-L-GP
GPU GPP_CLK3N LPC_RST_L/SD_WP_L/AGPIO32 BA11 DBC_PANEL_EN
[61] W LAN_CLK_CPU_N AGPIO68/SD_CD
1 2 W LAN_CLKREQ_CPU_N LAN_CLK_CPU_P AN2 BA13 EC_SCI#_R 1 R1616 2 0R0402-PAD ECSCI#_KBC
[76] GFX_CLK_CPU_P R1633 10KR2J-L-GP LAN LAN_CLK_CPU_N AN4 GPP_CLK4P LPC_PME_L/SD_PWR_CTRL/AGPIO22 to KBC
GPP_CLK4N
[76] GFX_CLK_CPU_N
AN3
AP2 GPP_CLK5P BC8 1
[66] LAN_CLK_CPU_P 1D8V_S5 GPP_CLK5N SPI_ROM_REQ/EGPIO67
EGPIO67 TPAD14-OP-GP TP1605 DB_170410
[66] LAN_CLK_CPU_N BB8 AGPIO76 1 TPAD14-OP-GP TP1606 Follow BIOS request for AMD
AJ2 SPI_ROM_GNT/AGPIO76
AJ4 GPP_CLK6P BB11 KBRST#
LPC interface debug
1 2 SUS_CLK_CPU GPP_CLK6N ESPI_RESET_L/KBRST_L/AGPIO129 BC6 LDRQ0# 1 TP1611
[63] SSD_CLK_CPU_P
R1605
DY 10KR2J-L-GP 48M_OSC AJ3 ESPI_ALERT_L/LDRQ0_L/EGPIO108 TPAD14-OP-GP
[63] SSD_CLK_CPU_N X48M_OSC BB7 SPI_CLK_CPU R1611 1 2 0R2J-2-GP SPI_CLK_ROM
SPI_CLK/ESPI_CLK BA9 SPI_SO_CPU R1613 1 2 0R0402-PAD SPI_SO_ROM
XTL_48M_X1_CPU BB3 SPI_DI/ESPI_DAT1 BB10 SPI_SI_CPU R1614 1 2 0R0402-PAD SPI_SI_ROM
[17,24] ECSMI#_KBC X48M_X1 SPI_DO/ESPI_DAT0
1 2 SPI_SI_ROM BA10 SPI_W P_CPU R1621 1 2 0R0402-PAD SPI_W P_ROM
C
[24,68] LPC_AD_CPU_P0
R1632
DY 10KR2J-L-GP SPI_WP_L/ESPI_DAT2 BC10 SPI_HOLD_CPU R1622 1 2 0R0402-PAD SPI_HOLD_ROM
C
[24,68] LPC_AD_CPU_P1 SPI_HOLD_L/ESPI_DAT3 BC9 SPI_CS_CPU_N0 R1607 1 2 0R0402-PAD SPI_CS_ROM_N0

[24,68] LPC_AD_CPU_P2 SPI_CS1_L/EGPIO118
XTL_48M_X2_CPU BA5 BA8 AGPIO30
[24,68] LPC_AD_CPU_P3 X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30
[24] LPC_CLK_KBC BA6
RN1602 SPI_CS3_L/AGPIO31 BD8 AGPIO29
[24] LPC_CLKRUN#_CPU A00 Change 0 ohm to short pad 20181203
1 4 AGPIO30 SPI_TPM_CS_L/AGPIO29
[68] LPC_CLK_DBG 2 3 AGPIO29
[24] LPC_SERIRQ_CPU DY AF8
RSVD_76
[24,68] LPC_FRAME#_CPU AF9 BA16
SRN10KJ-L-GP RSVD_77 UART0_RXD/EGPIO136 BB18
UART0_TXD/EGPIO138 BC17
[24,68] LPC_RST# C1603 1 2 SC150P50V2KX-1-GP LPC_RST# UART0_RTS_L/UART2_RXD/EGPIO137 BA18
[17,55] DBC_PANEL_EN SUS_CLK_CPU AW14 UART0_CTS_L/UART2_TXD/EGPIO135 BD18
[24] ECSCI#_KBC RTCCLK UART0_INTR/AGPIO139
EC1614 1 SC10P50V2JN-4DLGPLPC_CLK_KBC
DY 2
XTL_32K_X1_CPU AY1 BC18 PE_GPIO1
X32K_X1 EGPIO141/UART1_RXD BA17 VDDC_PW RGD
[24] KBRST# EC1615 1 2 SC33P50V2JN-3DLGP LPC_CLK_DBG EGPIO143/UART1_TXD BC16 EGPIO142 1 TP1617 TPAD14-OP-GP
EGPIO142/UART1_RTS_L/UART3_RXD BB19 DGPU_HOLD_RST#
[20,24,25] SPI_CLK_ROM EGPIO140/UART1_CTS_L/UART3_TXD
[24,25] SPI_SO_ROM X01 By EMI check 20180925 XTL_32K_X2_CPU AY4
X32K_X2 AGPIO144/UART1_INTR
BB16 KB_DET# 1 R1620 2 3D3V_S0
10KR2J-L-GP
[24,25] SPI_SI_ROM
[25] SPI_W P_ROM
1 48M_OSC_C 1 R1625 2 33R2F-L-GP 48M_OSC
DY 2SC15P50V2JN-2-GP
[25] SPI_HOLD_ROM FP5 REV 0.90
PART 5 OF 13
[24,25] SPI_CS_ROM_N0 C1614 DY RAVEN-BRIDGE-GP
CPU
LPC_SERIRQ_CPU
1
C1616
DY 2SC10P50V2JN-4DLGP
B B
[65] KB_DET#
XTL_48M_X1_CPU 1 R1623 2 XTL_48M_X1 C1612 1 2 SC12P50V2JN-DL-GP
XTL_32K_X1_CPU
0R1J-GP
1
XTL_32K_X2_CPU
1st = 82.30026.371
[17] VRAM_ID2 1 R1615 2 2 3
20MR2J-GP R1618 2nd = 082.30028.0091
1MR2F-GP X1601
X1602 XTAL-48MHZ-36-GP
2
[79,86] PE_GPIO1 1 4
[24,85] VDDC_PW RGD 2 1
R1624
[76,85] DGPU_HOLD_RST# XTAL-32D768KHZ-98-GP XTL_48M_X2_CPU 1 2 XTL_48M_X2 C1613 1 2 SC12P50V2JN-DL-GP
0R1J-GP
1
C1601
082.30003.0301 C1602
SC18P50V2JN-1DLGP Note:
SC15P50V2JN-DL-GP 2nd = 082.30003.0191 20180918
C1612 and C1613 values determine CL value of the oscillation circuit.
2
0402->0201
If Negative Resistance is too low, that may cause crystal resonator stop oscillation or not easy to
20170928 oscillate.
18pF change to 15pF If Drive Level is too high, that may cause crystal resonator abnormal oscillation or damaged the
by vendor review main body of quartz.
A <Core Design> A
Wistron Corporation
Title
Title
CPU (CLK/LPC/SPI/UART)
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date:
5 4 3 2 1
5 4 3 2 1
SSID = PCH 3D3V_S5

CPU1D
ACPI/AUDIO/I2C/GPIO/MISC
4 OF 13 Straps
LFRAME_L
LPCCLK0/EGPIO74
CLK/SATA/USB/SPI/LPC R1788 1 210KR2J-L-GP AC_PRES_KBC 2018/11/13 DVT2 AW12 ISH_GP0 LPCCLK1/EGPIO75
EGPIO41/SFI_S5_EGPIO41 AU12 KEYBOARD_DISABLE_R R1706 1
R1783 1 2 1KR2J-1-GP WLAN_APU_RST PLT_RST# 1 R1718 2 33R2J-L1-GP PCIE_RST#_APU BD5
Sensor INT AGPIO39/SFI_S5_AGPIO39 ISH 2 0R0402-PADKB_DISABLE
RTCCLK
SYS_RESET_L/AGPIO1
DY to PCIE
SO-DIMM R1789 1 2 10KR2J-L-GP PM_PWRBTN#
PLT_RST1# 1 R1724 2 33R2J-L1-GP PCIE_RST1#_APU
RSMRST#_CPU
BB6
AT16
PCIE_RST0_L/EGPIO26
PCIE_RST1_L/EGPIO27
RSMRST_L
I2C0_SCL/SFI0_I2C_SCL/EGPIO151
I2C0_SDA/SFI0_I2C_SDA/EGPIO152
AR13
AT13
CPU_I2C_SCL_P0
CPU_I2C_SDA_P0 to G-sensor/Sensor HUB/KBC https://vinafix.com BLINK/USB_OC7_L/AGPIO11
AGPIO3
R1790 1 2 10KR2J-L-GP RTC_DET# 1D8V_S5
[12,13] CPU_SMB_SCL_DDR PM_PWRBTN# AR15 AN8
SYS_PWRGD AV6 PWR_BTN_L/AGPIO0 I2C1_SCL/SFI1_I2C_SCL/EGPIO149 AN9
[12,13] CPU_SMB_SDA_DDR ISH_GP0 SYS_RST#_CPU PWR_GOOD I2C1_SDA/SFI1_I2C_SDA/EGPIO150
R1715 1 ISH 2 10KR2J-L-GP AP10 S5 PWR Rail AGPIO0 - EGPIO42
WAKE_L AV11 SYS_RESET_L/AGPIO1 BC20 CPU_SMB_SCL_DDR SMB0 PU S0 PWR Rail
WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SCL0
1 2 KEYBOARD_DISABLE_R 3D3V_S0 I2C2_SDA/EGPIO114/SDA0
BA20 CPU_SMB_SDA_DDR (to SO-DIMM) S0 PWR Rail AGPIO64 - EGPIO148
APU_SLP_S3#_APU AV13
Panel R1713 10KR2J-L-GP
APU_SLP_S5# AT14 SLP_S3_L AM9 CPU_I2C_SCL_P3 SMB1 PU S5 PWR Rail
SLP_S5_L I2C3_SCL/AGPIO19/SCL1
[55] CPU_I2C_SCL_TS_R
R1716 1 2 10KR2J-L-GP WAKE_L 3D3V_S5 I2C3_SDA/AGPIO20/SDA1
AM10 CPU_I2C_SDA_P3 (to Touch PAD)
AR8 SMB0, 3D3V_S0 DIMM
[55] CPU_I2C_SDA_TS_R PCIE_SSD_EN_CPU S0A3_GPIO/AGPIO10
R1779 1 2 1KR2J-1-GP 2018/11/13 DVT2 L16
DY AC_PRES_KBC AT10 1D8V_S0 PSA_I2C_SCL M16 SMB1, 3D3V_S5 KBC 3D3V_S5
D
2 10KR2J-L-GP BLUETOOTH_EN PSP_2 AC_PRES/AGPIO23 PSA_I2C_SDA 2018/11/13 DVT2 D
R1785 1 AN6 Thermal 3D3V_S0
Touch Pad LLB_L/AGPIO12 K
D1704
DY A PLT_RST#_LAN GSENSOR for HDD Protect
R1786 1 DY 2 10KR2J-L-GP PCIE_SSD_RST AT15 RTC_DET#
83.R2003.A8M
[65,66] CPU_I2C_SCL_P3 AGPIO3
BLUETOOTH_EN AW8
EGPIO42
3D3V_S5 AGPIO4/SATAE_IFDET
AW10 WLAN_APU_RST RB520S30-GP
[65,66] CPU_I2C_SDA_P3 AP9 BOARD_ID2 R1707
3D3V_S0 AGPIO5/DEVSLP0 AU10 PCIE_SSD_EN_CPU 2 1 0R2J-L-GP PCIE_SSD_EN
AGPIO6/DEVSLP1 AV15 SATA_ACT# DY
[27] HDA_SDIN0_CPU SATA_ACT_L/AGPIO130
R1782 1 2 10KR2J-L-GP GSEN_INT1 AU7 TP_INT#_R R1773 1 2 0R0402-PAD TP_WAKE_CPU# APU Type I only AGPIO8 AGPIO40
[27] HDA_BITCLK_CODEC_R DY AGPIO9
3D3V_S5 AGPIO40
AU6 PCIE_SSD_RST A00 Change 0 ohm to short pad 20181219
R1774 1 2 10KR2J-L-GP FFS_INT2_R AW13 FFS_INT2_R R1769 1 2 0R2J-2-GP FFS_INT2 APU type II only
[27] HDA_SYNC_CODEC AGPIO69 AW15 ECSMI#_KBC_R DY 2 0R2J-2-GP ECSMI#_KBC
R1771 1
R1705 1 2 1KR2J-1-GP DBC_PANEL_EN HDA_BITCLK_CPU AR2 3D3V_S0 AGPIO86 DY
[27] HDA_SDOUT_CODEC DY HDA_SDIN0_CPU AP7 AZ_BITCLK/TDM_BCLK_MIC PCIE_RST1_L/EGPIO27
AZ_SDIN0/CODEC_GPI
HDA_SDIN1_CPU AP1
AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT
AU14 AGPIO40
R1704 1 2 10KR2J-L-GP SATA_ACT# HDA_SDIN2_CPU AP4 AU16 SPKR
[24,69] KB_DISABLE HDA_RST_N_CPU AP3 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK SPKR/AGPIO91 AV8 PSP_1 LPC_PD_L/SD_CMD/AGPIO21
HDA_SYNC_CPU AR4 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11
A00 Change 0 ohm to short pad 20181219 If unused,
[45,54] 3V_5V_PWRGD AZ_SYNC/TDM_FRM_MIC
RN1708 HDA_SDOUT_CPU AR3
AZ_SDOUT/TDM_FRM_PLAYBACK GENINT1_L/AGPIO89
AW16TOUCH_PANEL_INTR#_R 1 R1712 20R0402-PAD TOUCH_PANEL_INTR# enable internal pull up or pull down by software.
1 4 CPU_SMB_SCL_DDR BD15 TOUCH_PANEL_PD# 1 R1709 210KR2J-L-GP
CPU_SMB_SDA_DDR GENINT2_L/AGPIO90 3D3V_S0
2 3 AT2 3D3V_S0
[24,61] WAKE_L SW_MCLK/TDM_BCLK_BT
AT4
SRN2K2J-1-GP AR6 SW_DATA0/TDM_DOUT_BT AR18 R1708 1 2 1KR2J-1-GP
AP6 AGPIO7/FCH_ACP_I2S_SDIN_BT FANIN0/AGPIO84 AT18 DY 3D3V_S0
[24,51,66] APU_SLP_S5# AGPIO8/FCH_ACP_I2S_LRCLK_BT FANOUT0/AGPIO85 KB_LED_BL_DET
FP5 REV 0.90
3D3V_S0 PART 4 OF 13
[24,40,51,60] APU_SLP_S3#
RAVEN-BRIDGE-GP
TOUCH_PANEL_INTR#_R
2 R1711 1
[55] PLT_RST1# 10KR2J-L-GP
[24,61,63,68,76,85] PLT_RST#
RN1706
[24] PM_PWRBTN# 1 8 HDA_SDOUT_CPU
2 7 HDA_SYNC_CPU
[24,40] SYS_PWRGD 3 6 HDA_BITCLK_CPU
4
DY 5 HDA_RST_N_CPU
[20] SYS_RST#_CPU SRN1KJ-4-GP

C C
A00 change R1778,C1714,R1780 Remove 20181220

[24] AC_PRES_KBC
RN1701 SMB0 to Panel 3D3V_S0 3D3V_S5
[16,24] ECSMI#_KBC 1 8 HDA_RST_N_CPU
HDA_BITCLK_CODEC_R 2 7 HDA_BITCLK_CPU
HDA_SYNC_CODEC 3 6 HDA_SYNC_CPU
[24] PSP_2 HDA_SDOUT_CODEC 4 5 HDA_SDOUT_CPU
1
CPU_SMB_SCL_DDR R1721 1 2 0R0402-PADCPU_I2C_SCL_TS_R SMB0 PU S0 PWR Rail R1717 R1776
CPU_SMB_SDA_DDR R1714 1 2 0R0402-PADCPU_I2C_SDA_TS_R (to Panel)
10KR2J-L-GP
10KR2J-L-GP
[24] PSP_1 SRN33J-7-GP-U
APU_SLP_S3#_APU APU_SLP_S3# UMA 2IN1
R1772 1 20R0402-PAD
[65] TP_WAKE_CPU# A00 Change 0 ohm to short pad 20181219
2
1
C1713 VRAM_ID2 BOARD_ID2
[18,70] FFS_INT2
DY
2
3D3V_S0
1
R1775 R1777
10KR2J-L-GP
10KR2J-L-GP
[64] SATA_ACT# Q1705 R1781
G Q1705_G 1 2
DY DY PX CLAM
SCD1U16V2KX-3GP
D 10KR2J-L-GP
[25] RTC_DET#
2
RN1705
1 4 HDA_SDIN2_CPU S
[27] SPKR
2 DY 3 HDA_SDIN1_CPU
2N7002K-2-GP
SRN10KJ-L-GP 84.2N702.J31
RSMRST#_CPU
[65] KB_LED_BL_DET 2ND = 84.2N702.031

3rd = 84.07002.I31
PLT_RST#
C1704 1 2 SC150P50V2KX-1-GP PLT_RST# D1703 ISH

ISH_GP0 A K
GSEN_INT1 [66,69]
[61] WLAN_APU_RST
RB551V30-GP
2018/11/13 DVT2
1
HDA_BITCLK_CODEC_R
[55] TOUCH_PANEL_PD# ED1708 ED1707
AZ5123-01F-R7G-GP-U AZ5123-01F-R7G-GP-U
DY DY
1
B [55] TOUCH_PANEL_INTR# EC1713 83.05123.AA0 83.05123.AA0 B

DY 3D3V_S0
2
SC10P50V2JN-4DLGP 1 R1722 2 0R0402-PAD RN1710

2
SRN2K2J-5-GP
SENSOR_I2C_SDA 3 2
[63] PCIE_SSD_RST SENSOR_I2C_SCL 4 DY 1
[63] PCIE_SSD_EN Q1704
CPU_I2C_SDA_P0 6 1
Note:ZZ.27002.F7C01
SENSOR_I2C_SDA [66,69,70]
X00 By EMI check 20180723 3D3V_S0
5 DY 2
3D3V_S0
3D3V_S5
X00 By EMI check 20180806 4 3 CPU_I2C_SCL_P0
RN1704
SRN2K2J-5-GP
[16,55] DBC_PANEL_EN [66,69,70] SENSOR_I2C_SCL CPU_I2C_SDA_P0 3 2
75.27002.F7C 2N7002KDW-1-GP CPU_I2C_SCL_P0 4 ISH 1
2nd = 075.67002.007C
[16] VRAM_ID2 3rd = 075.063D1.007C
1 R1723 2 0R0402-PAD
4th = 075.07002.0A7C APU I2C port 0 RR=3.3V
[61] BLUETOOTH_EN
1D8V_S5 3D3V_S5 3D3V_AUX_S5

[55] PLT_RST#_LAN
1
2018/11/13 DVT2 R1763
1
10KR2F-L1-GP
R1764 R1767
Q1701 100KR2J-4-GP 100KR2J-4-GP
2
RSMRST#_CPU 6 1
Note:ZZ.27002.F7C01
2
5 2 Q603_2
1
4 3
C1711
SC1U10V2KX-L1-GP
DY 4
Q1702
3 APU_RSMRST#1 R1702 2
2N7002KDW-1-GP
RSMRST#_KBC [24]
2
1KR2J-1-GP
A 3V_5V_PWRGD_R 5 3V_5V_PWRGD A
Note:ZZ.27002.F7C01
75.27002.F7C 2
2nd = 075.67002.007C
3rd = 075.063D1.007C 6 1
4th = 075.07002.0A7C
2N7002KDW-1-GP
APU_RSMRST# 75.27002.F7C <Core Design>
2nd = 075.67002.007C
3rd = 075.063D1.007C
4th = 075.07002.0A7C
1
R1765 Wistron Corporation

100KR2J-4-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
Title
Title
CPU (I2C/GPIO/RTC/SMBS/HDA)
Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bensolo AMD A00
Date: Sheet
Sheet 17 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = USB

https://vinafix.com
USB3.0 Port1
[35] USB1_USB30_RX_N CPU1J 10 OF 13
[35] USB1_USB30_RX_P USB
[35] USB1_USB30_TX_N
[35] USB1_USB30_TX_P TYPEC_USB20_P AE7 AD2 USB3_USB30_TX_P0 20180416
TYPEC_USB20_N AE6 USB_0_DP0 USBC0_A2/USB_0_TXP0/DP3_TXP2 AD4 USB3_USB30_TX_N0
Type-C USB_0_DM0 USBC0_A3/USB_0_TXN0/DP3_TXN2
D [36] USB1_USB20_N USB1_USB20_P AG10 AC2 USB3_USB30_RX_P0 D
[36] USB1_USB20_P USB1_USB20_N AG9 USB_0_DP1 USBC0_B11/USB_0_RXP0/DP3_TXP3 AC4 USB3_USB30_RX_N0
USB3.0 Port1 USB_0_DM1 USBC0_B10/USB_0_RXN0/DP3_TXN3 DP Type-C
USB2_USB20_P AF12 AF4 USB3_USB30_TX_P1
USB3.0 Port2 USB2_USB20_N AF11 USB_0_DP2
USB_0_DM2
USB2 USBC0_B2/DP3_TXP1
USBC0_B3/DP3_TXN1
AF2 USB3_USB30_TX_N1
USB3.0 Port2 FP_USB20_P AE10 Controller 0 AE3 USB3_USB30_RX_P1

FP_USB20_N AE9 USB_0_DP3 USBC0_A11/DP3_TXP0 AE1 USB3_USB30_RX_N1
Finger Printer USB_0_DM3 USBC0_A10/DP3_TXN0
[35] USB2_USB30_RX_N
[35] USB2_USB30_RX_P USB_OC# CCD_USB20_P AJ12
USB_1_DP0 USB_0_TXP1
AG3 USB1_USB30_TX_P
CCD_USB20_N AJ11 AG1 USB1_USB30_TX_N 20180403
USB2
[35] USB2_USB30_TX_N IR Camera
[35] USB2_USB30_TX_P USB_1_DM0 USB_0_TXN1
USB3.0 Port1
Controller 1
USB_OC0# Type C HUB_USB20_P AD9 AJ9 USB1_USB30_RX_P
[35] USB2_USB20_N USB_OC1# Power share HUB_USB20_N AD8 USB_1_DP1 USB_0_RXP1 AJ8 USB1_USB30_RX_N
[35] USB2_USB20_P USB_OC2# USB3.0 Power Hub USB20 USB_1_DM1 USB_0_RXN1
USB_OC3# USB2.0 Power AG4 USB2_USB30_TX_P
USB_0_TXP2 AG2 USB2_USB30_TX_N
Finger Printer USB_0_TXN2
AG7 USB2_USB30_RX_P
USB3.0 Port2
[66] FP_USB20_N 3D3V_S5 USBC_I2C_SCL AM6 USB_0_RXP2 AG6 USB2_USB30_RX_N
[66] FP_USB20_P USBC_I2C_SCL USB_0_RXN2
USBC_I2C_SDA AM7 AA2
USBC_I2C_SDA USBC1_A2/USB_0_TXP3/DP2_TXP2 AA4
USBC1_A3/USB_0_TXN3/DP2_TXN2
1
IR Camera R1801 R1804
USBC1_B11/USB_0_RXP3/DP2_TXP3
Y1
10KR2J-L-GP 10KR2J-L-GP Y3
[55] CCD_USB20_N USBC1_B10/USB_0_RXN3/DP2_TXN3
[55] CCD_USB20_P AC1
USBC1_B2/DP2_TXP1
2
AC3
C
USB_OC0# AK10 USBC1_B3/DP2_TXN1 C
USB_OC1# AK9 USB_OC0_L/AGPIO16 AB2
Hub USB20 USB_OC2# AL9 USB_OC1_L/AGPIO17 USBC1_A11/DP2_TXP0 AB4
3D3V_S5 USB_OC2_L/AGPIO18 USBC1_A10/DP2_TXN0
USB_OC3# AL8
[38] HUB_USB20_N R1806 1 2 10KR2J-3-GP AGPIO14 AW7 USB_OC3_L/AGPIO24 AH4
R1805 1 2 10KR2J-3-GP FFS_INT2_S5 AT12 AGPIO14/USB_OC4_L USB_1_TXP0 AH2
USB3
[38] HUB_USB20_P
AGPIO13/USB_OC5_L USB_1_TXN0
FFS_INT2 R1807 1 2 0R0402-PAD
Type C USB20
A00 Change 0 ohm to short pad 20181219 Gen 1 USB_1_RXP0
AK7
AK6
[73] TYPEC_USB20_N USB_1_RXN0
FP5 REV 0.90
[73] TYPEC_USB20_P PART 10 OF 13
RAVEN-BRIDGE-GP
CPU
20180416 1st = 071.RAVEN.000U
DP Type-C
AGPIO13/USB_OC5_L
If unused,
[73] USB3_USB30_TX_P0 enable internal pull up or pull down by software.
[73] USB3_USB30_TX_N0
[73] USB3_USB30_RX_P0
[73] USB3_USB30_RX_N0
[73] USB3_USB30_TX_P1
[73] USB3_USB30_TX_N1
20180418
B B
[74] USB_OC0#
[36] USB_OC1#
[35] USB_OC2#
[34] USB_OC3#
1D8V_S5
3D3V_S5
[72] CCG4_APU_USBC_SCL
[72] CCG4_APU_USBC_SDA Q1801
R1808 1 2 10KR2J-L-GP USB_OC3#
R1809 1 2 10KR2J-L-GP USB_OC2#
CCG4_APU_USBC_SCL 6 D1 S1 1 USBC_I2C_SCL 1D8V_S5
5 G2 G1 2 RN1803
USBC_I2C_SCL 2 3
[61,70] AGPIO14 4 S2 D2 3 075.00138.0A7C USBC_I2C_SDA 1 4
SRN4K7J-8-GP
PJT138KA-GP
Swap 20180814 CCG4_APU_USBC_SDA
[17,70] FFS_INT2 VDDD USBC_I2C_SDA
RN1802
3 2 CCG4_APU_USBC_SCL
4 1 CCG4_APU_USBC_SDA
A <Core Design> A
SRN2K2J-5-GP
Wistron Corporation
Title
Title
CPU (USB)
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date:
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
CPU (RSVD)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
STRAP PINS https://vinafix.com
Tambourine
1D8V_S5 3D3V_S5
D D
1
R2005
1
20171012 AMD SPEC change 10KR2F-L1-GP
R2002
10KR2F-L1-GP
2
[16,24,25] SPI_CLK_ROM SPI_CLK_ROM
[17] SYS_RST#_CPU SYS_RESET_L/AGPIO1
1
C
DY R2003 DY R2004 C
2K2R2J-L1-GP 2K2R2J-L1-GP
2
PIN SPI_CLK PIN SYS_RESET_L//AGPIO1
NET SPI_CLK_ROM NET SYS_RST#_CPU
PULL Normal powerup / reset timing

Configured for internal clock-generator
B HIGH 10kΩ(± 5%) pull-up resistor to VDD_18 10KΩ(± 5%) pull-up resistor to VDD_33_S5 B
(DEFAULT) (DEFAULT)
PULL
Reserved Reserved
LOW
<Core Design>
A
Title
CPU (Strap)
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
CPU (RSVD)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
CPU (RSVD)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
CPU (RSVD)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
SSID = KBC 3D3V_S5 PCB Version

1 2 3D3V_AUX_KBC
R2491
DY GPIO94
10KR2J-3-GP
3D3V_AUX_KBC
MODEL_ID_DET(GPIO153) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
1 2 GPU_AC_BATT#
DY Bensolo S3 100.0K 10.0K(64.10025.6DL) 3.0V
1
R2488 10KR2J-3-GP Bensolo MS 100.0K 17.8K(64.17825.6DL) 2.801V X00 100.0K 10.0K 3.000V
TP_ON# R2471
1 2 Reserve 100.0K 27.0K 2.598V R2428
1
R2476 10KR2J-3-GP
64K9R2F-1-GP
Reserve 100.0K 37.4K(064.37425.06DS) 2.402V PCB_VERSION_A00 X01 100.0K 20.0K 2.750V
https://vinafix.com
WLAN_RST 47KR2F-GP
1 2 Reserve 100.0K 49.9K 2.201V
R2474 10KR2J-3-GP EC_AVCC 3D3V_AUX_KBC Bucky S3 100.0K 64.9K(64.64925.6DL) 2.001V X02 100.0K 33.0K 2.481V
MODEL_ID
2
Bucky MS 100.0K 82.5K (64.82525.6DL) 1.808V
1 2 PM_LAN_ENABLE Reserve 100.0K 107K 1.594V PCB_VER_AD A00 100.0K 47.0K 2.245V
DY R2411
2
R2484 10KR2J-3-GP 1 2 MODEL_ID Reserve 100.0K 154K 1.299V
0R0603-PAD
Reserve 100.0K 200K (64.20035.6DL) 1.1V C2416 EVB 100.0K 64.9K 2.001V
1
Reserve 100.0K TBD 0.9V
1
LID_CL_SIO#
1
1 2 Reserve R2429
SCD1U16V2KX-3DLGP
C2405 C2406 R2470 100.0K TBD 0.7V Reserved 100.0K 76.8K 1.867V
2
R2405 10KR2J-3-GP R2412
100KR2F-L1-GP Reserve 100.0K TBD 0.5V 100KR2F-L1-GP
1
2D2R3-1-U-GP C2424 Reserve
SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
100.0K TBD 0.3V Reserved 100.0K 100.0K 1.650V
2
1 2
DY
TBD
GPIO05
2
R2406 10KR2J-3-GP SCD1U25V2KX-1-DL-GP Reserved 100.0K 143.0K 1.358V
2
2
2
1 2 USB_PWR_EN#
R2407 10KR2J-3-GP KBC_VCC Reserved 100.0K 174.0K 1.204V
1 2 USBCHARGER_CB0
R2417 10KR2J-3-GP Reserved 100.0K 215.0K 1.048V
C2407 C2408 C2409 C2410 C2411
RN2403 C2412 EC_AGND EC_AGND
[16,17] ECSMI#_KBC SML1_SMBCLK
1
1 4
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
[16,68] LPC_RST# 2 3 SML1_SMBDATA
SC10U6D3V3MX-DL-GP
D D
[16] LPC_CLK_KBC EC_AGND
[16,68] LPC_FRAME#_CPU
2
[16,68] LPC_AD_CPU_P3 SRN2K2J-1-GP
[16,68] LPC_AD_CPU_P1 3D3V_S0
[24,36] USBCHARGER_CB0 [16,68] LPC_AD_CPU_P0
Swap 20180814 3D3V_S5 3D3V_S5
[16] LPC_CLKRUN#_CPU
3D3V_AUX_KBC
[24,61] AUX_EN_WOWL [16] ECSCI#_KBC FAN_TACH1_KBC LPC strap pin
1
1 2
[55] LCD_TST R2401 10KR2J-3-GP R2460 R2462
10KR2J-3-GP 10KR2J-3-GP
[17] PSP_2 1 2 KBRST# 1D8V_S0 3D3V_S0 RTC_AUX_S5 3D3V_AUX_S5 RTC_AUX_S5
[16] KBRST# RN2407
R2404 10KR2J-3-GP
2
PWR_0D9V_EN 2 3
EC_STRAP 1 4
[60] SATA_HDD_EN [55] BLON_OUT
1
C2421
[43,44] HW_ACAVIN_NB C2417
[43,44] AC_DIS R2442 SCD1U16V2KX-3DLGP R2415 R2416 R2420 R2419 SC2D2U6D3V2MX-DL-GP
SRN10KJ-5-GP
20180813
PURE_HW_SHUTDOWN#_R 1 2 10KR2J-3-GP PURE_HW_SHUTDOWN# DY 0R0402-PAD 0R0402-PAD 0R0402-PAD
0R2J-2-GP
[8,26,46] VCORE_PWRGD 2 1
2
3D3V_AUX_KBC 1 2 AUX_EN_WOWL SATA_HDD_EN 1 R2463 2 1 R2461 2
[65] DAT_TP_SIO 3D3V_AUX_S5
Swap 20180814 R2453 10KR2J-3-GP DY DY
[65] CLK_TP_SIO
2
RN2402 3D3V_S0 0R2J-2-GP 0R2J-2-GP
2 3 PBAT_CHG_SMBCLK 20171214 cancle 4P2R C2414
[17,61,63,68,76,85] PLT_RST# PBAT_CHG_SMBDAT SYS_PWRGD
1 4 SC10U6D3V3MX-DL-GP A00 Change 0 ohm to short pad 20181219 1 2 D2406
[43,44] PBAT_CHG_SMBCLK 2 EC_STRAP SATA_HDD_EN
[43,44] PBAT_CHG_SMBDAT DY1 0603/10V->0402/6.3V 20180815 R2449 10KR2J-3-GP
PWR_0D9V_EN K
D2405
A AUX_EN_WOWL
K A
[8,79] SML1_SMBCLK SRN2K2J-1-GP
1 2 PBAT_PRES# KBC_VBKUP
[44] AD_IA
modify for vendor review 20180730 RB551V30-GP
[8,79] SML1_SMBDATA R2448 10KR2J-3-GP RB551V30-GP
EC_VCC1V8 EC_AVCC KBC_VSBY 20180510 Change to 1D8V_S0 1D8V_S0
KBC_VDD1D8
[43] PS_ID 1D8V_AUX_S5
eDP_BLON 1 2
1D8V_AUX_S5 EC_VCC1V8 R2451 DY 10KR2J-3-GP
[26] TYPEC_SMBCLK_EC 1 2 KBC_EXT_RST#
[36] USB_CHG_EN R2414 22KR2J-GP 3D3V_S5
[26] TYPEC_SMBDA_EC
R2479
1 R2413 2 0R0402-PAD
[55] LCD_TST_EN KB_CLOSE#_2 1 2
[17,69] KB_DISABLE [17,51,66] APU_SLP_S5#
115
102
114
19
46
76
75
88
[64] SATA_LED#
1
4
U2401A 1 OF 2 100KR2F-L1-GP
[66] KB_CLOSE#_2 C2425 C2413
DY
VCC
VCC
VCC
VCC
VSBY
AVCC
VCCSPI
VBKUP
VDD/VESPI
SC10U6D3V3MX-DL-GP SCD1U16V2KX-3DLGP
[55] EC_BRIGHTNESS [16,25] SPI_CS_ROM_N0
2
EC_AGND C2403 1 2 SC2200P50V2KX-2DLGP

[16,20,25] SPI_CLK_ROM
[64] LID_CL_SIO# [16,25] SPI_SI_ROM ECSMI#_KBC
6
[34,35] USB_PWR_EN#
[16,25] SPI_SO_ROM
[8] eDP_BLON
[17,40] SYS_PWRGD
DY modify by EA 20180912
TOUCH_REPORT_SW A
D2404
K LID_CL_SIO#
AD_IA 1 R2446
Bucky MS+
2 330R2J-3-GP AD_IA_EC
PCB_VER_AD
97
98 GPIO90/AD0
GPIO91/AD1
GPIO24/ESPI_ALERT#
LRESET#/GPIOF7/PLTRST#
LCLK/GPIOF5/ESPI_CLK
7
2
LPC_RST#
LPC_CLK_KBC Start up 3D3V_AUX_S5
LAN_RST R2489 1 2 0R2J-2-GP PS_ID 99 3 LPC_FRAME#_CPU C2418 3D3V_AUX_S5
[17] PM_PWRBTN# 3D3V_S5
2018/11/02 DVT2 PROCHOT_GPU MODEL_ID GPIO92/AD2 LFRAME#/GPIOF6/ESPI_CS# LPC_AD_CPU_P3
R2487 1
RB551V30-GP USB_CHG_EN DY 22 0R2J-2-GP 100
GPIO93/AD3 LAD3/GPIOF4/ESPI_IO3
1
LPC_AD_CPU_P2
SCD1U16V2KX-3DLGP
1
[55] TOUCH_REPORT_SW R2467 R2486 1 0R2J-2-GP GPIO05 108 128 R2432 1 2
1
DY 2 FPR_SCAN# 83.R5003.H8H BENSOLO2
WLAN_RST 96 GPIO05/AD4 LAD2/GPIOF3/ESPI_IO2 127 LPC_AD_CPU_P1 3D3V_S5
10KR2J-3-GP RTCRST_ON R2458 1 0R2J-2-GP RTCRST_ON_EC 95 GPIO04/AD5 LAD1/GPIOF2/ESPI_IO1 126 LPC_AD_CPU_P0 330KR2J-L1-GP
[26] VD_IN1 GPIO03/EXT_PURST#/AD6 LAD0/GPIOF1/ESPI_IO0 INT_SERIRQ
1
125 20170925 Add PH R
[60] MODEL_ID SERIRQ/GPIOF0/ESPI_RST#
S
1 R2441 2 ECSCI#_KBC VDDC_PWRGD R2465 1 2 0R2J-2-GP 8 LPC_CLKRUN#_CPU R2433 R2434
DY GPIO11/CLKRUN#/ESPI_CS2# 10KR2J-3-GP
2
10KR2J-L-GP KB_DISABLE R2464 1 2 0R2J-2-GP GPIO94 101 9 PWR_0D9V_EN PSL_OUT# 1 2KBC_ON#_GATE_L 1 2 KBC_ON#_GATE G Q2401
[72] CCG4_I2C_INT#_EC GPIO94/DA0 GPIO65/SMI#/LPC_ESPI_STRAP0#
KB_CLOSE#_2 105 29 ECSCI#_KBC R2403
[26] VD_OUT1# 1 R2431 2 ECSMI#_KBC BENSOLO EC_BRIGHTNESS 106 GPIO95/DA1 ECSCI#/GPIO54 124 LCD_TST R2456 1KR2J-1-GP 20KR2J-L2-GP
PJA3415-GP
[24,36] USBCHARGER_CB0 [66] PLT_RST#_LAN GPIO96/DA2 GPIO10/LPCPD# 084.03415.0031
2
10KR2J-L-GP LAN_RST R2490 1 2 0R2J-2-GP LID_CL_SIO# 107 121 PSP_2_EC 1 2 PSP_2
DY GPIO97/DA3 GPIO85/GA20/N2TCK 122 KBRST# 0R0402-PAD 20170911 Add for AMD PSP function
[43,44] PBAT_PRES# [16,85] VDDC_PWRGD DY KBRST#/GPIO86/N2TMS
D
C C
USB_PWR_EN# 26 A00 Change 0 ohm to short pad 20181219 3D3V_AUX_KBC
[54] PSL_OUT# PM_PWRBTN# 117 GPIO51/TA3 27 BLON_OUT 3D3V_AUX_S5
[17,61] WAKE_L 1 2 VD1_EN# GPIO20/TA2 GPIO52/PSDAT3 25 HW_ACAVIN_NB
R2409 1KR2J-1-GP GPIO50/PSCLK3 11 AC_DIS 3D3V_AUX_KBC
VD_IN1 GPIO27/PSDAT2 VCORE_PWRGD
1
104 10 R2435
[17] PSP_1 1 2 NB_MUTE# CCG4_I2C_INT#_EC 94 GPIO80/VD_IN1 GPIO26/PSCLK2 71 DAT_TP_SIO
[61] WLAN_RST DY VD_OUT1# GPIO07/AD7/VD_IN2 GPIO35/PSDAT1 CLK_TP_SIO
1
110 72
[17] AC_PRES_KBC
R2410 10KR2J-3-GP
USBCHARGER_CB0 112 GPIO82/VD_OUT1 GPIO37/PSCLK1 Touch Pad 330KR2J-L1-GP R2436
GPIO84/VD_OUT2 R2422 Q2402 100KR2J-1-GP

[74] TYPEC_DCIN_EN#
2
3D3V_S5 70 PBAT_CHG_SMBCLK KBC_PWRBTN# 1 2 PSL_IN2# G
GPIO17/SCL1/N2TCK 69 PBAT_CHG_SMBDAT Battery/Charger 0R0402-PAD
GPIO22/SDA1/N2TMS
2
1 2 PURE_HW_SHUTDOWN# 67 SML1_SMBCLK D S5_ENABLE
[24,61] AUX_EN_WOWL EC2401
DY PBAT_PRES# GPIO73/SCL2/N2TCK SML1_SMBDATA APU/GPU A00 Change 0 ohm to short pad 20181219
1
SC22P50V2JN-4DLGP 80 68
PSL_OUT# 74 GPIO41/F_WP#/PSL_GPIO41 GPIO74/SDA2/N2TMS 119 TYPEC_SMBCLK_EC S
[79] GPU_AC_BATT# R2430
10KR2J-3-GP PSL_IN1# 73 PSL_OUT#/GPIO71 GPIO23/SCL3/N2TCK 120 TYPEC_SMBDA_EC Type-C/Thermal 3D3V_AUX_S5
20171002 Change for waveform step
[66] LANWAKE#_IC PSL_IN2# 93 PSL_IN1#/GPI70 GPIO31/SDA3/N2TMS 24 PROCHOT_EC 2N7002K-2-GP

R2457 PM_LAN_ENABLE 17 PSL_IN2#/GPI06/EXT_PURST# GPIO47/SCL4A/N2TCK/DPWROK 28 LCD_TST_EN 84.2N702.J31
GPIO42/PSL_IN3#/GPI42 GPIO53/SDA4A/N2TMS/RSMRST# 2ND = 84.2N702.031
2
PSP_1 PSP_1_EC APU_SLP_S5#
1
[66] PM_LAN_ENABLE 1 2 20 21 R2438
0R0402-PAD GPIO43/PSL_IN4/GPI43 GPIO44/SCL4B 23 SATA_LED# 100KR2J-1-GP
GPIO46/SDA4B/CIRRXM
PLT_RST#_LAN WAKE_L Q2405
R2418 1 2 0R2J-2-GP 83
DY A00 Change 0 ohm to short pad 20181219
TYPEC_DCIN_EN# 79 GPIO76/SPI_MOSI 90
SPI_CS_EC_N0 R2426 1 2 0R0402-PAD SPI_CS_ROM_N0 HW_ACAV_IN G
GPIO02/SPI_MISO F_CS0#/GPIOC6
2
LANWAKE#_IC 82 92 SPI_CLK_EC R2427 1 2 0R0402-PAD SPI_CLK_ROM
[65] TP_WAKE_KBC# GPIO75/SPI_SCK F_SCK/GPIOC7
GPU_AC_BATT# 77 87 SPI_SI_EC R2437 1 2 0R0402-PAD SPI_SI_ROM D PSL_IN1#
[17,40,51,60] APU_SLP_S3# GPIO00/32KCLKIN/SPI_CS# F_SDIO/F_SDIO0/GPIOC5 SPI_SO_EC
D2408 86 R2443 1 2 0R0402-PAD SPI_SO_ROM
PLT_RST# K A RB551V30-GP F_SDI/F_SDIO1/GPIOC4 91 eDP_BLON S
[27] BEEP KBC_VCORF 44 GPIO81/F_WP#/F_SDIO2 84 SYS_PWRGD
VCORF GPIO77/F_SDIO3
[65] TP_LOCK# 2N7002K-2-GP
D2409
[66] FPR_SCAN# C2415
LAN_RST A RB551V30-GP
AGND
[65] KB_LED_PWM K 84.2N702.J31
GND
GND
GND
GND
GND
GND
SC1U10V2KX-1DLGP
Bucky MS+
2
NPCE385PA0DX-GP
18
45
78
89
116
5
103
[17] RSMRST#_KBC
[40] S5_ENABLE 071.00385.000G
[26] FAN1_PWM
R2421
1 2
0R0402-PAD
[25] RTCRST_ON
[27] NB_MUTE#
[65] TP_ON# 3D3V_S0

EC_AGND
1
R2440
[72] CCG4_I2C_SDA DY
10KR2J-3-GP U2401B 2 OF 2
[72] CCG4_I2C_SCL
2
FAN_TACH1_KBC 31 53 KSO0
LPC_SERIRQ_CPU 1 R2445 2 INT_SERIRQ TP_WAKE_KBC# 63 GPIO56/TA1 KBSOUT0/GPOB0/SOUT_CR/JENK# 52 KSO1
0R0402-PAD APU_SLP_S3# 1 R2468 2 APU_SLP_S3#_EC 64 GPIO14/TB1 KBSOUT1/GPIOB1/TCK 51 KSO2
[16] LPC_SERIRQ_CPU GPIO01/TB2 KBSOUT2/GPIOB2/TMS
B A00 Change 0 ohm to short pad 20181219 0R0402-PAD 50 KSO3 B
BEEP 32 KBSOUT3/GPIOB3/TDI 49 KSO4
BATT_WHITE_LED#_KBC 118 GPIO15/A_PWM KBSOUT4/GPOB4 48 KSO5
[26] FAN_TACH1 TP_LOCK# GPIO21/B_PWM KBSOUT5/GPIOB5/TDO
62 47 KSO6
FPR_SCAN# 65 GPIO13/C_PWM KBSOUT6/GPIOB6/RDY# 43
OE logical level reference VCCA KB_LED_PWM GPIO32/D_PWM KBSOUT7/GPIOB7
KSO7
[64] BATT_WHITE_LED# 81 42 KSO8
1 2 VD1_EN# 66 GPIO66/G_PWM/PSL_GPIO66 KBSOUT8/GPIOC0 41 KSO9
R2459
DY 0R2J-2-GP GPO33/H_PWM/VD1_EN# KBSOUT9/GPOC1/SDP_VIS# 40 KSO10
CAP_LED# 109 KBSOUT10/P80_CLK/GPIOC2 39 KSO11
[64] CHG_AMBER_LED# RSMRST#_KBC GPIO30/F_WP#/RTS1# KBSOUT11/P80_DAT/GPIOC3
R2478 15 38 KSO12
D2403 PWR_0D9V_PG S5_ENABLE GPIO36/TB3/CTS1# KBSOUT12/GPO64/TEST#
1 2 14 37 KSO13
FAN_TACH1_KBC A K FAN_TACH1 DY EC_STRAP 123 GPIO34/SIN1/CIRRXL KBSOUT13/GP(I)O63/TRIST# 36 KSO14
0R2J-2-GP FAN1_PWM 22 GPIO67/SOUT1/LPC_ESPI_STRAP1#KBSOUT14/GP(I)O62/XORTR# 35 KSO15
[8,44,46] H_PROCHOT# CHG_AMBER_LED#_KBC 16 GPIO45/E_PWM/DTR1#_BOUT1 KBSOUT15/GPIO61/XOR_OUT 34 KSO16
RB551V30-GP GPIO40/F_PWM/1_WIRE/RI1# GPIO60/KBSOUT16/DSR1# 33 TP_ON#
1 111 GPIO57/KBSOUT17/DCD1#
[65] CAP_LED#_D 83.R5003.H8H TPAD14-OP-GP TP2402 GPIO83
AC_PRES_KBC 113 GPIO83/SOUT_CR 54 KSI0
GPIO87/CIRRXM/SIN_CR KBSIN0/GPIOA0/N2TCK 55 KSI1
NB_MUTE# 30 KBSIN1/GPIOA1/N2TMS 56 KSI2
[26,40] PURE_HW_SHUTDOWN# GPIO55/CLKOUT KBSIN2/GPIOA2 57
X01 remove ED2407 ED2408 20180927 KBC_EXT_RST# 85 KBSIN3/GPIOA3 58
KSI3
KSI4
EXT_RST# KBSIN4/GPIOA4 59 KSI5
[64] KBC_PWRBTN# KBC_PECI KBSIN5/GPIOA5
1 13 60 KSI6
TPAD14-OP-GP TP2401 12 PECI KBSIN6/GPIOA6 61 KSI7
VTT KBSIN7/GPIOA7
[44] HW_ACAV_IN
NPCE385PA0DX-GP
[52] PWR_0D9V_PG
071.00385.000G
[44,79,85] VGA_PROCHOT#
3D3V_S5
3D3V_S5
High Active KBC RESET
1
[65] KSO[0..16]
R2423
20180807
1
KSO0 100KR2J-1-GP
KSO1 Q2410 Q2403 R2472 R2444
KSO2 PROCHOT_GPU G PROCHOT_EC G
2
2K2R2J-2-GP
2K2R2J-2-GP
KSO3
VGA_PROCHOT# H_PROCHOT# KBC_EXT_RST# Q2407
KSO4 D D
2
BATT_WHITE_LED#_KBC BATT_WHITE_LED#
1
KSO5 1 6
Note:ZZ.27002.F7C01
KSO6 S R2439 S
Q2409
R2485 2 5
KSO7
KSO8 100KR2J-1-GP DY 2N7002K-2-GP DY 100KR2J-1-GP 2N7002K-2-GP
C2422 CCG4_I2C_SDA 3 4 TYPEC_SMBDA_EC 3D3V_S5 3D3V_S5
84.2N702.J31 CHG_AMBER_LED# CHG_AMBER_LED#_KBC 3D3V_S5
1
3 4
SCD1U16V2KX-3DLGP
KSO9 84.2N702.J31
2ND = 84.2N702.031
2
KSO10 2ND = 84.2N702.031 3D3V_S5 2 5 3D3V_S5

PURE_HW_SHUTDOWN#_R TypeC
Note:ZZ.27002.F7C01
KSO11 B Q2404
2N7002KDW-1-GP
2
1
KSO12 MMBT3906-3-GP 1 6
KSO13 84.03906.R11 75.27002.F7C R2424
C
KSO14 CCG4_I2C_SCL 2N7002KDW-1-GP 100KR2J-1-GP

2nd = 075.67002.007C
KSO15
KSO16 3D3V_S0 TYPEC_SMBCLK_EC 3rd = 075.063D1.007C
2
3D3V_S0
75.27002.F7C 4th = 075.07002.0A7C
1
Q2408
A R2425 G A
2nd = 075.67002.007C
100KR2J-1-GP
[65] KSI[0..7]
D CAP_LED#_D 3rd = 075.063D1.007C
KSI0
4th = 075.07002.0A7C
2
KSI1 CAP_LED# S
KSI2 Notice:ZZ.2N702.J3101
KSI3 2N7002K-2-GP
KSI4
KSI5 84.2N702.J31
KSI6
KSI7
<Core Design>
Wistron Corporation
Title
KBC_Nuvoton_NPCE385
Custom
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
SSID = Flash.ROM 1D8V_VCCSPI
R2501 1 2 10KR2J-L-GP SPI_SO_ROM

R2502 1 2 10KR2J-L-GP SPI_CS_ROM_N0 https://vinafix.com
R2503 1 2 10KR2J-L-GP SPI_W P_ROM
R2504 1 2 10KR2J-L-GP SPI_HOLD_ROM
[16,24] SPI_CS_ROM_N0
[16,24] SPI_SO_ROM 1D8V_VCCSPI
[16] SPI_W P_ROM
[16] SPI_HOLD_ROM C2502
1
[16,20,24] SPI_CLK_ROM
SC1U10V2KX-1DLGP
D [16,24] SPI_SI_ROM
BIOS1 BIOS1 16MByte D
2
Notice:ZZ.25128.0I0101
SPI_CS_ROM_N0 1 8
SPI_SO_ROM 2 CS# VCC 7 SPI_HOLD_ROM
SPI_W P_ROM 3 DO/IO1 HOLD#/RESET#/IO3 6 SPI_CLK_ROM
4 WP#/IO2 CLK 5 SPI_SI_ROM
GND DI/IO0
W 25Q128FW SIQ-GP
1D8V_VCCSPI 1D8V_S5
072.25128.0I01
C2501 C2503
1
C2509
DY
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
SCD1U16V2KX-3DLGP
2
2
1D8V_VCCSPI
SKT251
SPI_CS_ROM_N0 1 8
SPI_SO_ROM 2 7 SPI_HOLD_ROM
SPI_W P_ROM 3 EVT 6 SPI_CLK_ROM
SPI_SI_ROM
4 5
SKT-G6179HT0321-001-GP
62.10089.011
C C
SSID = RBAT
+RTC_VCC 3D3V_AUX_S5 RTC_AUX_S5 1D8V_S5 1D8V_VCCSPI
R2508
D2502
1 2
[24] RTCRST_ON 1 0R0402-PAD
[17] RTC_DET#
3
1 2 RTC_PW R 2
1
R2507 1KR2J-1-GP BAT54C-12-GP C2505
SCD47U6D3V2KX-DL-GP
75.00054.A7D
2
+RTC_VCC
RTC1
3
1
AFTP2501
0603/25V->0402/6.3V 20180815 2
4 1
B Q2505 B
ETY-CON2-22-GP-U
G
20.F1841.002
1
D RTC_DET#
R2509
10MR2J-L-GP S
2N7002K-2-GP
2
+RTC_VCC 1 AFTP2502
84.2N702.J31
2ND = 84.2N702.031
U2501
RTC_AUX_S5
1 R2511 1D5V_VDDBT_RTC
3 GND 1KR2F-L1-GP
VIN 2 VBAT_SB_N 2 1 R2512 1
DY 2 0R2J-L-GP
VOUT
1
C2513
1
AP2138N-1D5TRG1-GP G2501 Q2511

C2511 C2512
1
1st = 74.02138.03B SC1U10V2KX-1DLGP GAP-OPEN G RTCRST_ON

SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP
2
D
2
A
Q701_S <Core Design> A
S
1
1
2N7002K-2-GP
1st = 84.2N702.J31 R2513 R2515 Wistron Corporation
2nd = 84.2N702.031 100R2J-L-GP 10KR2F-L1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
2
Title
Title
FLASH / RTC
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date: Sheet
Sheet 25 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = Thermal Sensor

PWM FAN1
https://vinafix.com
Layout Note:
Signal Routing Guideline:
[24] TYPEC_SMBDA_EC Trace width = 15mil
5V_S0
[24] TYPEC_SMBCLK_EC FAN_VCC_1
D 1 R2612 2 D
0R0603-PAD
K
C2605
SCD1U16V2KX-3DLGP
1
1
3D3V_S0 3D3V_S0
C2604
SC4D7U6D3V3KX-DLGP
D2601
RB551V30-GP
C2603
SC2200P50V2KX-2DLGP
[24,40] PURE_HW _SHUTDOW N# DY DY
2
Swap 20180814
A
2
1
[8,24,46] VCORE_PW RGD
RN2602
SRN2K2J-1-GP
[8] THERMTRIP#_CPU 7718
FAN1
Q2601
3
4
[24] VD_OUT1# 5
TYPEC_SMBDA_EC 1 7718 2 TYPEC_SMBDA_EC_R 6 1 THM_SML1_DATA FAN_VCC_1 1
Note:ZZ.27002.F7C01
R2618 0R0402-PAD
[24] VD_IN1 5 2 A00 Change 0 ohm to short pad 20181219 2
3D3V_S0 75.27002.F7C 7718 FAN_TACH1 0R0402-PAD 1 R2613 2 FAN_TACH1_C 3
[24] FAN_TACH1
2nd = 075.67002.007C 4 3 FAN1_PW M 0R0402-PAD 1 R2614 2 FAN_PW M1_C 4
[24] FAN1_PW M 3rd = 075.063D1.007C 6
2N7002KDW-1-GP
4th = 075.07002.0A7C AFTP2604 1 ACES-CON4-29-GP
1
THM_SML1_CLK EC2615 EC2614 20.F1639.004
A00 Change 0 ohm to short pad 20181219 DY DY
1
SC10P50V2JN-4DLGP
SC10P50V2JN-4DLGP
C2602
2
TYPEC_SMBCLK_EC 1 7718 2 TYPEC_SMBCLK_EC_R
7718 SCD1U16V2KX-3DLGP R2619 0R0402-PAD
2
C FAN_TACH1_C 1 AFTP2601 C
change to combine with CCG4 FAN_PW M1_C 1
84.03904.T11 AFTP2602
NCT7718_DXP FAN_VCC_1 1 AFTP2603

THM261
Q2603
C
MMBT3904-3-GP C2606 1 8 THM_SML1_CLK X00 By EMI check 20180612

B 2 VDD SCL 7 THM_SML1_DATA
DY 7718
SC470P50V2KX-3DLGP C2607
SC2200P50V2KX-2DLGP 3 D+ 7718 SDA 6 ALERT#
D- ALERT#
2
T_CRIT# 4 5
7718 T_CRIT# GND C2608 C2609
E
1
NCT7718_DXN
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
DY DY
2.System Sensor, Put on palm rest NCT7718W -GP
2
74.07718.0B9
1
DY 0R2J-2-GP
Q2602
R2601
Layout Note: VCORE_PW RGD G
2
C2607 close THM2601

D PURE_HW _SHUTDOW N#
THERM_SYS_SHDN# S A00 Change 0 ohm to short pad 20181219

R2615
C2610
1
1 2 VD_OUT1#
Layout Note: 2N7002K-2-GP
SCD1U16V2KX-3DLGP
DY 0R0402-PAD 20170919 stuff
Both DXN and DXP routing 10 mil trace width and 10 mil spacing. 84.2N702.J31
2
B B
2ND = 84.2N702.031
3D3V_S0
3D3V_S0 A00 Change 0 ohm to short pad 20181219
R2603 1 7718 2 7K5R2F-1-GP ALERT#
KBC T8 1 R2607 2 1 R2605 2 0R0402-PAD THERMTRIP#_CPU
1KR2J-1-GP
R2604 1 7718 2 7K5R2F-1-GP T_CRIT#
1 R2602 2 0R2J-2-GP VD_OUT1#
DY
Close to KBC
Close to Thermal sensor VD_IN1 for system thermal sensor
3D3V_AUX_KBC
1
R2608
27KR2F-L-GP
DVT1 0210, for T8 function

2
A <Core Design> A
VD_IN1
Wistron Corporation
1

1
R2610 C2612 C2613 Taipei Hsien 221, Taiwan, R.O.C.

NTC-100K-8-GP SC100P50V2JN-3DLGP
SCD1U16V2KX-3DLGP Title
Title
2
THERMAL NCT7718W/Fan
2
VD_IN1_C Size
Document Number Rev
Rev
A3
Bensolo AMD A00
Date:
Date: Friday, December 28, 2018 Sheet
Sheet 26 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = Audio

[17] HDA_SDIN0_CPU https://vinafix.com
[17] HDA_SDOUT_CODEC
[17] HDA_SYNC_CODEC AUD_HP1_JACK_L

5V_S0
moat
Audio Codec Chip ALC3204
[17] HDA_BITCLK_CODEC_R AUD_HP1_JACK_R +5V_AVDD
AUD_AGND R2703 1
Non MS
2 0R3J-L1-GP 5V_S5
[24] NB_MUTE#
SCD1U16V2KX-3DLGP
C2706
LDO1_CAP R2745
C2708
C2709
[17] SPKR
C2702
SC10U6D3V3MX-DL-GP
C2707
1
1
D 1 2 0R3J-L1-GP D
1
[24] BEEP MS+
1
R2702
100KR2J-1-GP
1D8V_CPVDD
2
SC2D2U10V3KX-1DLGP-U
C2705
C2703
[29] AUD_SPK_R+
2
SCD1U16V2KX-3DLGP
1
1
C2704
Layout Note:
LINE1_VREFO
2
MIC2_VREFO
[29] AUD_SPK_R-
AUD_VREF
Place close to Pin 20
LDO1_CAP
2
2
1D8V_CPVDD
[29] AUD_SPK_L+ Analog 0.1u ->1KP By EMI check 20180913
CPVEE
1D8V_S0
AUD_AGND
moat
CBN
CBP
[29] AUD_SPK_L- AUD_AGND EC2701 1 2 SC1KP50V2KX-1DLGP
1D8V_S5 R2709 1
0R2J-2-GP
Non2MS Digital 1.8V power rail should be supplied by
EC2702
EC2703
1
1
2
2
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
24
23
26
25
21
29
27
30
28
22
linear regulator, not awitching U2701 EC2704 1 2 SC1KP50V2KX-1DLGP
R2746 1 2 regulator.if switch regulator is EC2705 1 2 SC1KP50V2KX-1DLGP
LINE1-VREFO-L
MIC2-VREFO
LDO1-CAP
HP-OUT-L
CBP
CPVEE
CPVDD
HP-OUT-R
CBN
VREF
[55] DMIC_DATA unavilable, please make sure that switch
0R2J-2-GP MS+ frequency operates at out-band(over 20KHz)
[55] DMIC_CLK R2719 1
Non MS2
1D8V_S0 +5V_AVDD
0R2J-L-GP C2710 AUD_AGND
1
1D8V_S5 R2749 1 2 31
[29] AUD_SENSE SC10U6D3V3MX-DL-GP AUD_AGND AVSS2 20
MS+
0R2J-L-GP
C2711 2 1 LDO2_CAP 32 AVDD1
AUD_AGND LDO2-CAP
2
[29] LINE1_VREFO 19 A00 Change 0 ohm to short pad 20181219
SC10U6D3V3MX-DL-GP +3V_1D8V_AVDD 33 AVSS1 AUD_AGND
R2704 1 2 0R0603-PAD
>2A moat AUD_AGND
AVDD2 18 LINE1_L R2705 1 2 0R0603-PAD
[29] MIC2_VREFO R2713 1
Non MS
2 0R5J-L1-GP +5V_PVDD1 34 LINE1-L R2706 1 2 0R0603-PAD
5V_S0 PVDD1 LINE1_R
17
ALC3204
SC10U6D3V3MX-DL-GP
LINE1-R
1
AUD_SPK_L+ 35
C2713
C2714
SCD1U16V2KX-3DLGP
[29] AUD_HP1_JACK_L SPK-L+ QFN40 (5X5) 16 V3D3_STB
5V_S5 R2748 1 MS+ 2 0R5J-L1-GP AUD_SPK_L- 36 VD33STB AUD_AGND Layout Note:
[29] AUD_HP1_JACK_R SPK-L-
2
15 MIC_CAP C2715 1 2 Tied at point only under
AUD_SPK_R- MIC2-CAP AUD_AGND
37 SC10U6D3V3MX-DL-GP Codec or near the Codec
SPK-R- 14 AUD_SLEEVE
[29] LINE1_L AUD_SPK_R+ 38 SLEEV/MIC2-R
SPK-R+ 13 AUD_RING
DVDD must >= DVDD_IO
GPIO0/DMIC-DATA12
[29] LINE1_R +5V_PVDD1 39 RING2/MIC2-L
3D3V_S5 PVDD2 12 AUD_HPJD_N
GPIO1/DMIC-CLK
Layout Note: HP/LINE1-JD_JD1
1
R2743 C2717 C2718 PDB_R 40
[29] AUD_SLEEVE 1 2 PDB 11 AUD_PC_BEEP
MS+ Speaker trace
SCD1U16V2KX-3DLGP
SDATA-OUT
SC10U6D3V3MX-DL-GP
PCBEEP
LDO3-CAP
width >40mil @ 41
SDATA-IN
DVDD-IO
GND
DC_DET
[29] AUD_RING
BIT-CLK
C 0R3J-L1-GP C
3D3V_S0 +3V_1D8V_DVDD 2W4ohm speaker
DVDD
SYNC
R2715 power
1 2
Non MS
ALC3204-CG-GP-U Analog
C2740
10
1D8V_DVDD-IO
0R3J-L1-GP 1
071.03204.0003 moat
1
SCD1U16V2KX-3DLGP
C2741
+3V_1D8V_DVDD Digital
HDA_SDOUT_CODEC
HDA_BITCLK_CODEC
HDA_SDIN0_CODEC
place close to pin8
HDA_SYNC_CODEC
DMIC_SDA_CODEC
DMIC_SCL_CODEC
2
SC4D7U6D3V3KX-DLGP
C2723
1
1D8V_S5 +3V_1D8V_DVDD
C2721
SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
1
1
C2720
確認是否是否high
LDO3_CAP
2
1
R2744
1 2 DY R2717
MS+
DVSS
2
2
100KR2J-1-GP Open drain output.
1D8V_S0 0R3J-L1-GP pull up to DVDD or
1D8V_DVDD-IO max. 5V A00 Change 0 ohm to short pad 20181219
2
R2742 R2712
1 NB_MUTE# PDB_R V3D3_STB
Non2MS 1 2 place close to pin1 RTC_AUX_S5 R2708 1 2 0R0402-PAD
1
C2722
0R0402-PAD
C2742
0R3J-L1-GP SC10U6D3V3MX-DL-GP R2716 1 DY 2 100KR2J-1-GP DVSS

3D3V_S0
1
1
SCD1U16V2KX-3DLGP
C2743
2
A00 Change 0 ohm to short pad 20181219 For RTC Gen9 reset circuit change power rail.
2
20170921
DMIC_DATA 1 R2718 2 DMIC_SDA_CODEC AUD_SENSE R2711 1 2 AUD_HPJD_N
0R0402-PAD 200KR2F-L-GP
DMIC_CLK 1 R2720 2 DMIC_SCL_CODEC
0R0402-PAD +3V_1D8V_DVDD R2710 1 2
1
0602 DY
DY C2725 X00 By EMI check 20180612 100KR2J-1-GP
SC10P50V2JN-L1-GP
Close pin3
2
Azalia I/F EMI
HDA_SDOUT_CODEC
HDA_BITCLK_CODEC D2703
DMIC_SDA_CODEC HDA_SDIN0_CPU R2724 1 2 22R2J-2-GP HDA_SDIN0_CODEC SPKR 1 R2741 2 HDA_SPKR_R 1 C2735
B SCD1U16V2KX-3DLGP B
1
3 AUD_PC_BEEP_C 1 2 AUD_PC_BEEP
DY EC2709 EC2710 DY EC2711 0R0402-PAD
SC22P50V2JN-4GP
SC22P50V2JN-4GP
HDA_BITCLK_CODEC_R 1 R2721 2 0R0402-PAD HDA_BITCLK_CODEC BEEP 1 R2734 2 KBC_BEEP_R 2

SC10P50V2JN-4DLGP
2
C2739
SC100P50V3JN-2GP
0R0402-PAD BAT54C-12-GP
1
R2735
1KR2J-1-GP
75.00054.A7D DY
2
2
X00 By EMI check 20180612
A A
<Core Design>
Wistron Corporation
Title
Title
Audio Codec ALC3204

Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bucky AMD A00
Date:
Date:Friday, December 28, 2018 Sheet
Sheet 27 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A
Title
Audio
A4
Bucky AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = Audio

https://vinafix.com
Layout Note: Speaker
Speaker trace width >40mil @ 2W4ohm speaker power
SPK1
5
AUD_SPK_R+ R2904 1 2 0R0603-PAD AUD_SPK_R+_C 1 CONN Pin Net name
[27] AUD_SPK_R+
[27] AUD_SPK_R- AUD_SPK_R- R2903 1 2 0R0603-PAD AUD_SPK_R-_C 2
[27] AUD_SPK_L- AUD_SPK_L- AUD_SPK_L-_C
Pin1 SPK_R+
R2901 1 2 0R0603-PAD 3
[27] AUD_SPK_L+ AUD_SPK_L+ R2902 1 2 0R0603-PAD AUD_SPK_L+_C 4
D Pin2 SPK_R- D
6
Pin3 SPK_L-
A00 Change 0 ohm to short pad 20181219 ACES-CON4-29-GP
20.F1639.004 Pin4 SPK_L+
2nd = 020.F0700.0004
3rd = 20.F1804.004
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
EC2902
EC2901
EC2903
EC2904
1
1
2
2
AUD_SPK_L-_C 1 AFTP2901
AUD_SPK_L+_C 1 AFTP2902
AUD_SPK_R-_C 1 AFTP2903
AUD_SPK_R+_C 1 AFTP2904
Universal Jack (Moved to I/O Board)

C C
RN2901
MIC2_VREFO 2 3
1 4
[27] MIC2_VREFO
[27] AUD_RING SRN2K2J-1-GP A00 Change 0 ohm to short pad 20181219 AUD1
AUD_RING R2906 1 2 0R0603-PAD RING2_HPMIC1 3
AUD_HP1_JACK_L R2908 1 2 10R2F-L1-GP AUD_HP1_JACK_L1 R2907 1 2 0R0603-PAD AUD_PORTA_L_HPMIC1 1
[27] AUD_HP1_JACK_L LINE1_L C2907 1 2 LINE1-L_C R2922 1 2 1KR2J-1-GP
SC10U6D3V3MX-DL-GP JACK_PLUG 5
[27] LINE1_L LINE1_R C2908 1 2 LINE1-L_R R2921 1 2 1KR2J-1-GP JACK_PLUG_DET 6
[27] LINE1_R AUD_HP1_JACK_R SC10U6D3V3MX-DL-GP R2910 1 2 10R2F-L1-GP AUD_HP1_JACK_R1 R2909 1 2 0R0603-PAD AUD_PORTA_R_HPMIC1 2
AUD_SLEEVE R2911 1 2 0R0603-PAD SLEEVE_R 4
MS
[27] AUD_HP1_JACK_R
1
D2901 Audio(IP/NK comb)
SC680P50V2KX-2DLGP
EC2908
SC680P50V2KX-2DLGP
EC2907
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
EC2905
1
1
EC2906
1 LINE1_VREFO_D1 R2912 1 2
R2920
10KR2J-L-GP
R2919
10KR2J-L-GP
[27] AUD_SLEEVE 4K7R2J-2-GP
DY DY AUDIO-JK668-GP
LINE1_VREFO 3 022.10002.0D01
[27] LINE1_VREFO
2
2
2
2 LINE1_VREFO_D2 R2913 1 2
4K7R2J-2-GP AUD_AGND
BAT54AW -2-GP
AUD_AGND AUD_AGND AUD_AGND
B Delay circuit X00 By EMI check 20180612 B
(JACK_PLUG_DET: on IO Board)
R2923 10 mils AUD_PORTA_R_HPMIC1
JACK_PLUG 10 mils 1 2 AUD_PORTA_L_HPMIC1
AUD_SENSE [27] RING2_HPMIC1
0R0603-PAD JACK_PLUG
1
JACK_PLUG_DET
DY C2902
SC10U6D3V3MX-GP SLEEVE_R
2
CLOSS TO HPMIC1
AUD_AGND
ED2910
ED2911
ED2908
ED2909
ED2907
ED2912
1
1
AZ5123-01F-R7G-GP-U
AZ5123-01F-R7G-GP-U
AZ5123-01F-R7G-GP-U
AZ5123-01F-R7G-GP-U
AZ5123-01F-R7G-GP-U
AZ5123-01F-R7G-GP-U
JACK_PLUG_DET
10 mils
1
2
R2914
0R0402-PAD
2
A <Core Design> A
AUD_AGND
X00 Follow Bucky By EMI Check 20180716 Wistron Corporation
Title
Title
Audio IO
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bucky AMD A00
Date:
Sheet 29 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = Audio

https://vinafix.com
D D
(Blanking)
C C
B B
<Core Design>
A
Title
(Reserved)
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = LAN

https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
LAN (Reserved)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = LAN

https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
XFOM&RJ45 (Reserved)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = Card Reader
https://vinafix.com
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
Size
Card Reader-RTS5170
Document Number Rev
A2
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = USB2.0

https://vinafix.com
2017.10.25
D Modify netname D
follow STD
5V_USB2_S0
5V_S5 2A U3403
5 1
IN OUT R3432
2
USB_PWR_EN# 4 GND 3 USB_OC3#_R 1 2 USB_OC3#
EN# OC#
1
C3422 Active Low 0R0402-PAD
SC1U10V2KX-1DLGP
SY6288DAAC-GP
074.06288.009B A00 Change 0 ohm to short pad 20181219
2
[18] USB_OC3#
USB2.0 Port2 (IO Board)

C C
[24,35] USB_PWR_EN#
2017.10.25 Layout Note: Close IO2

Modify netname
follow STD
5V_USB2_S0
2A
C3401 C3402 C3403 C3404
1
SCD1U16V2KX-3DLGP
2
2
B B
SC1U10V2KX-1DLGP
EVT1 20170622 0805-->0603
<Core Design>
A
Title
USB Charger
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = USB3.0 Port1 X00 By EMI check 20180612

5V_USB30_VCCB USB1_USB30_TX_P 1 2 USB1_USB30_TX_CMC_P 1 R3501 2 USB1_USB30_TX_CON_P
5V_USB30_VCCA
USB3.0 Port1
C3512 SCD22U10V2KX-2-GP
5V_USB30_VCCB
5V_S5
2A 0R0402-PAD
U3502 R3510 1 2 0R5J-5-GP
https://vinafix.com
USB3
5 1 R3509 1 2 0R5J-5-GP A00 remove EL3502 20181225 1 10

IN OUT 2 VBUS CHASSIS#10 11
A00 Change always install 20181221
GND CHASSIS#11
1
C3507 USB_PWR_EN# 4 3 USB1_USB20_CON_N 2 12
SC1U10V2KX-1DLGP EN# OC# USB_OC2#_R 1 R3512 2 USB_OC2# USB1_USB20_CON_P 3 D- CHASSIS#12 13
[18] USB1_USB30_TX_N D+ CHASSIS#13
Active Low
[18] USB1_USB30_TX_P
2
SY6288DAAC-GP 0R0402-PAD
USB1_USB30_RX_CON_N 5
[18] USB1_USB30_RX_N 074.06288.009B USB1_USB30_RX_CON_P 6 SSRX-
[18] USB1_USB30_RX_P A00 Change 0 ohm to short pad 20181219
SSRX+ 4
USB1_USB30_TX_CON_N 8 PGND
USB1_USB30_TX_N 1 2 USB1_USB30_TX_CMC_N 1 R3502 2 USB1_USB30_TX_CON_N USB1_USB30_TX_CON_P 9 SSTX- 7
C3511 SCD22U10V2KX-2-GP SSTX+ GND
D D
0R0402-PAD USB3.0
SKT-USB13-428-GP-U
[36] USB1_USB20_R_N 022.10005.0EY1
USB1_USB30_RX_P 1 2 USB1_USB30_RX_CMC_P 1 R3503 2 USB1_USB30_RX_CON_P
[36] USB1_USB20_R_P USB3.0 Port 1 Layout Note: Close USB3
C3535 SCD33U6D3V2KX-1-GP
0R0402-PAD 2018.5.28
Change P/N
Follow Connector list V23
5V_USB30_VCCB A00 remove EL3503 20181225
2A
5V_USB30_VCCB 1 AFTP3501
C3508 C3510 C3509 C3506
1
1
1
[18] USB_OC2# DY TC3502
SCD1U16V2KX-3DLGP
SC100U6D3V6MX-DL-GP
2
USB1_USB30_RX_N1 2 USB1_USB30_RX_CMC_N 1 R3504 2 USB1_USB30_RX_CON_N
2
78.10710.52LDL
SC1U10V2KX-1DLGP
0R0402-PAD
[24,34] USB_PWR_EN#
EVT1 20170622 0805-->0603

X00 By AMD Check Add RC 20180725
A00 remove R3505 R3506 20181225
Stuff for ESD R2 spec 11/24 Follow ESD common part list
Stuff for ESD R2 spec R3535 1 2 15R2F-2-GP

ED3501
11/24 Follow ESD common part list CH1 1 USB1_USB30_RX_CON_N EL3501
C USB1_USB20_R_N C3539 1 2 USB1_USB20_RC_N 1 2 USB1_USB20_CON_N C
CH2 2 USB1_USB30_RX_CON_P SC470P50V2KX-3DLGP
ED3502 3 GND USB1_USB20_R_P C3538 1 2 USB1_USB20_RC_P 4 3 USB1_USB20_CON_P
8 SC470P50V2KX-3DLGP
USB1_USB20_CON_N 1 6 USB1_USB20_CON_P 5V_USB30_VCCB GND DLM0NSN900HY2D-GP
I/O1 I/O4 CH3 4 USB1_USB30_TX_CON_N R3534 1 2 15R2F-2-GP
2 5 EC3513
068.09002.2001
GND VDD CH4 5 USB1_USB30_TX_CON_P
SC1KP50V2KX-1DLGP
1
USB2_USB20_CON_N 3 4 USB2_USB20_CON_P
I/O2 I/O3 DY USB1_USB30_TX_CON_P 6
NC NC 9 USB1_USB30_RX_CON_P
USB1_USB30_TX_CON_N 7 10 USB1_USB30_RX_CON_N
NC NC
2
AZC099-04S-2-GP
PUSB3F96-GP
2nd = 075.01256.007C
2nd = 075.08809.0073
075.09904.0A7C
075.PUSB3.0073
0.1u->1KP By EMI check 20180808
Main Func = USB3.0 Port2

11/24 Follow ESD common part list
USB2_USB30_TX_P 1 2 USB2_USB30_TX_CMC_P 1 R3524 2 USB2_USB30_TX_CON_P
USB3.0 Port 2 C3520 SCD22U10V2KX-2-GP Stuff for ESD R2 spec 5V_USB30_VCCA USB3.0 Port2
0R0402-PAD
Layout Note: Close USB4 USB4
ED3504
5V_USB30_VCCA CH1 1 USB2_USB30_RX_CON_N 1 10
VBUS CHASSIS#10 11
[18] USB2_USB30_TX_N
[18] USB2_USB30_TX_P
2A A00 remove EL3504 20181225
CH2 2 USB2_USB30_RX_CON_P USB2_USB20_CON_N 2 CHASSIS#11 12
3 GND USB2_USB20_CON_P 3 D- CHASSIS#12 13
8 D+ CHASSIS#13
[18] USB2_USB30_RX_N
SC1U10V2KX-1DLGP
SCD1U16V2KX-3DLGP
[18] USB2_USB30_RX_P GND

C3518 C3519 CH3 4 USB2_USB30_TX_CON_N USB2_USB30_RX_CON_N 5
SSRX-
1
USB2_USB30_RX_CON_P 6
C3516
C3513
CH4 5 USB2_USB30_TX_CON_P SSRX+ 4

USB2_USB30_TX_CON_N 8 PGND
SSTX-
2
[18] USB2_USB20_N USB2_USB30_TX_CON_P 6 9 USB2_USB30_RX_CON_P USB2_USB30_TX_CON_P 9 7

NC NC SSTX+ GND
B USB2_USB30_TX_N 1 2 USB2_USB30_TX_CMC_N 1 R3533 2 USB2_USB30_TX_CON_N USB2_USB30_TX_CON_N 7 10 USB2_USB30_RX_CON_N B
[18] USB2_USB20_P NC NC USB3.0
C3514 SCD22U10V2KX-2-GP
0R0402-PAD PUSB3F96-GP SKT-USB13-428-GP-U
2nd = 075.08809.0073 022.10005.0EY1
USB2_USB30_RX_P 1 2USB2_USB30_RX_CMC_P 1 R3521 2 USB2_USB30_RX_CON_P
075.PUSB3.0073
0R0402-PAD
EVT1 20170622 0805-->0603 2018.5.28
Change P/N
Follow Connector list V23
A00 remove EL3505 20181225
5V_USB30_VCCA 1 AFTP3504
USB2_USB30_RX_N 1 2USB2_USB30_RX_CMC_N 1 R3522 2 USB2_USB30_RX_CON_N

0R0402-PAD
A00 remove R3507 R3508 20181225
R3536 1 2 15R2F-2-GP
EL3506
A USB2_USB20_N C3540 1 2 USB2_USB20_RC_N 1 2 USB2_USB20_CON_N A
SC470P50V2KX-3DLGP
USB2_USB20_P C3541 1 2 USB2_USB20_RC_P 4 3 USB2_USB20_CON_P
SC470P50V2KX-3DLGP
DLM0NSN900HY2D-GP
R3537 1 2 15R2F-2-GP
068.09002.2001 <Core Design>
Wistron Corporation
Title
Title
USB3.0 CONN
Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bensolo AMD A00
Date:
Sheet 35 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = USB Charger USB Charger Port1

https://vinafix.com
5V_USB30_VCCB
5V_S5
USB_OC1#
[18] USB1_USB20_N
[18] USB1_USB20_P
C3602
D C3603 C3601 D
C3604 C3605
1
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
SC1U10V2KX-1DLGP
[35] USB1_USB20_R_N DY
1
[35] USB1_USB20_R_P DY DY DY DY
2
3A
13
12
1
9
U3601
IN
NC#9
FAULT#
OUT
[18] USB_OC1#
USB_CHG_EN 5 3 USB1_USB20_P
EN DP_OUT 2 USB1_USB20_N Follow KR15 20170817
R3605 1
DY 2 0R2J-2-GP ILIM_SEL 4 DM_OUT
5V_S5
R3603 1 2 20KR2F-L-GP ILIM_LO 15 ILIM_SEL DY 10 USB1_USB20_R_P
[24] USBCHARGER_CB0
R3604 1
DY 2 22K1R2F-L-GP ILIM_HI 16 ILIM_LO DP_IN 11 USB1_USB20_R_N
ILIM_HI DM_IN
DY
CTL1
CTL2
CTL3
[24] USB_CHG_EN
GND
GND
C C
TPS2544RTER-GP
6
7
8
14
17
74.02544.073
USBCHARGER_CB0 R3601 1 2 0R2J-2-GP CTL1
DY
5V_S5 R3606 1 DY 2 0R2J-2-GP CTL2
R3602 1 2 0R2J-2-GP CTL3
DY
A00 Change always install 20181221

R3607
USB1_USB20_P 1 2 USB1_USB20_R_P
0R2J-2-GP
B B
R3608
USB1_USB20_N 1 2 USB1_USB20_R_N
0R2J-2-GP
Device Control Pins

CTL1
(EC control) CTL2 CTL3 ILIM_SEL <Core Design>
Wistron Corporation
A
CDP 1 1 1 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A
DCP Auto Title

0 1 1 X USB Charger
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
5V_S5
Main Func = USB HUB AVDD A00 Change 0 ohm to short pad 20181219
R3803 https://vinafix.com
1 2 5V_IN
C3823
SCD1U16V2KX-3DLGP
C3826
SCD1U16V2KX-3DLGP
C3827
SCD1U16V2KX-3DLGP
C3828
SCD1U16V2KX-3DLGP
C3829
SCD1U16V2KX-3DLGP
0R0603-PAD
1
20180411
1
C2832
2
D SCD1U16V2KX-3DLGP D
[66] USB3_USB20_P
2
[66] USB3_USB20_N
AVDD AVDD
Need to close the GL850G chip 1 R3805 2

[61] BT_USB20_P
DVDD
[61] BT_USB20_N
0R0402-PAD
SCD1U16V2KX-3DLGP
C3830
SC10U6D3V3MX-DL-GP
C3825
1
1
5V_IN
C2831
SCD1U16V2KX-3DLGP
2
[66] CARD1_USB20_P
27
28
14
21
[66] CARD1_USB20_N
5
9
U3802
DVDD
V5
AVDD
AVDD
AVDD
V33
C HUB_USB20_CON_P 2 26 SDA 1 TP3801 C
HUB_USB20_CON_N 1 DP0 SDA 18 TEST_SCL 1 TP3802
USB3_USB20_P 4 DM0 TEST/SCL
[69] HUB_USB20_SENSOR_P USB3_USB20_N DP1
3 10 X1
[69] HUB_USB20_SENSOR_N USB 2.0 CARD1_USB20_P 7 DM1 X1 11 X2 TPAD14-OP-GP AVDD
CARD1_USB20_N 6 DP2 X2 TPAD14-OP-GP
Card Reader BT_USB20_P 13 DM2 25 OVCUR1# R3817 1 210KR2J-3-GP
BT_USB20_N 12 DP3 OVCUR1#/SMC 24 OVCUR2# R3819 1
Bluetooth HUB_USB20_SENSOR_P 16 DM3 OVCUR2#/SMD 20
DY 210KR2J-3-GP
HUB_USB20_SENSOR_N 15 DP4 OVCUR3# 19 Vendor feedback:
[18] HUB_USB20_P Sensor Hub DM4 OVCUR4# if not connect type A USB,
RESET#
PGANG
[18] HUB_USB20_N
PSELF
no over current concern,
RREF
GND
you can NC this pin,
GL850G-OHY50-GP
HUB_RREF 8
17
23
22
29
071.0850G.0003 AVDD
HUB_Reset
PGANG
PSELF
5V_S5 R3810
B C3822 B
1 2 X2 PSELF 1 2
1
SC22P50V2JN-4DLGP 10KR2J-3-GP
R3807
10KR2J-3-GP R3809
PGANG 1 2
2
2
2
X3801 HUB_Reset_C 1 R3806 2 100KR2J-1-GP

R3820 XTAL-12MHZ-52-GP-U R3811
1MR2J-1-GP 0R0402-PAD HUB_RREF 1 2
82.30006.491
1
DY
1
C3824 R3808 A00 Change 0 ohm to short pad 20181219 620R2F-GP

2nd = 082.30000.0291
1
47KR2F-GP
SC1U10V2KX-1DLGP
1
C3820 <Core Design>

1 2 X1 A00 Change 0 ohm to short pad 20181219
A
SC22P50V2JN-4DLGP 1 R3821 2
0R0402-PAD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
HUB_USB20_CON_P HUB_USB20_P Taipei Hsien 221, Taiwan, R.O.C.
HUB_USB20_N From CPU Title

HUB_USB20_CON_N
USB HUB
A4
1 R3822 2
0R0402-PAD
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = USB3.0 Port1
https://vinafix.com
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
(Reserved)
A2
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
U4001
Power Sequence 5V_S5

20171214 cancle 0 ohm
4
VBIAS CT1
CT2
12
10
3V5V_CT2
5V_S0
https://vinafix.com
5V_S5 1 13
2 VIN1#1 VOUT1#13 14
VIN1#2 VOUT1#14
A00 Change 0 ohm to short pad 20181219 6 8 D4001
[17,24,51,60] APU_SLP_S3# VIN2#6 VOUT2#8 3V_5V_EN PURE_HW_SHUTDOWN#
7 9 1 3
VIN2#7 VOUT2#9 2
APU_SLP_S3# 1 R4001 2 5V_S0_EN 3 C4001
1 R4013 2 5 ON1 11
D ON2
ON2 GND 20180912 LBAS16LT1G-GP D
1
15
1
SC1KP50V2KX-1DLGP
0R0402-PAD C4013 83.00016.P11
THERMAL_PAD
1
C4093 0R0402-PAD C4003
SC10U10V3MX-1-GP DY
SCD1U16V2KX-3DLGP
DY SCD1U16V2KX-3DLGP
2
S5_ENABLE
2
TPS22976DPUR-GP 1 R4003 2
[45] 3V_5V_EN
2
074.22976.0091 20171011 Change back to Dummy 1KR2J-L2-GP
[24,26] PURE_HW_SHUTDOWN#
Change to 074.22976.0091 for common part 20171011 Change back to 1K
20170913
[24] S5_ENABLE
[17,24] SYS_PWRGD
D4002
U4002 5000mA 3000mA APU_SLP_S3# K
R4004
A RUNPWROK_D 1 2 SYS_PWRGD
[46] GROUPB_PWRGD
5V_S5 4 12 3V5V_CT1 3D3V_S0 1D8V_S0 DY DY
VBIAS CT1 10 VTT_CT_1.8V 0R2J-2-GP
CT2 RB551V30-GP
3D3V_S5 1
VIN1#1 VOUT1#13
13 83.R5003.H8H
2 14
VIN1#2 VOUT1#14
0R modify by EA 20180927 1D8V_S5 6 8
VIN2#6 VOUT2#8 D4003
7 9
VIN2#7 VOUT2#9 APU_SLP_S3# K A
1 R4012 2 3V_S0_EN 3
APU_SLP_S3# 0R0402-PAD 5 ON1 11 C4005 C4090 C4089 C4010 RB551V30-GP
ON2 GND
83.R5003.H8H
1
1 R4008 2 1D8V_S0_EN 15 A00 Change 0 ohm to short pad 20181219
SC1KP50V2KX-1DLGP
THERMAL_PAD
SC1500P50V2KX-2-DL-GP
0R0402-PAD
SC10U6D3V3MX-DL-GP
C SC10U6D3V3MX-DL-GP C
3D3V_S0 1 R4006 2GROUPB_PWRGD_R 1 R4005 2GROUPB_PWRGD
2
C4091 C4092 TPS22976DPUR-GP
1
10KR2J-3-GP 0R0402-PAD
074.22976.0091
1
C4012
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
DY DY
SCD1U16V2KX-3DLGP
2
2
Change to 074.22976.0091 for common part
2
20170913
modify by EA 20180927 1KP->1500P modify by EA 20180927
Delay for S0_PWRGD to VCORE_EN

0D9V_S5
C4006
1
4000mA
SC1U10V2KX-1DLGP
0D9V_S0
2
U4003
1 8
2 VIN VOUT#8 7
3 VIN VOUT#7 6
A00 Change 0 ohm to short pad 20181219 5V_S5
B APU_SLP_S3# 1 R4007 2 0D9V_S0_EN 4 VBIAS VOUT#6 5 B
EN GND modify by 20180920
A00 Change short R4014_20181220
1
0R0402-PAD C4094 9 0D9V_S5
VIN C4007
SCD1U16V2KX-3DLGP
DY
2 SC10U6D3V3MX-DL-GP
2
APE8939GN3-GP
074.08939.0093
2nd = 074.01335.0A93
Change to 074.08939.0093
20180713
A <Core Design> A
Wistron Corporation
Title
Title
Power Plane Enable&Sequence
Size
Document Number Rev
Rev
Custom
Bensolo AMD A00
Date: Sheet
5 4 3 2 1
5 4 3 2 1
Main Func = Power Plane & Sequence

https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A
Title
Connected_Standby(1/2)+DS3
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Connected_Standby(2/2)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = ADT Input +DC_IN_C

5V_S5 PS_ID_R
[24,44] AC_DIS
https://vinafix.com
EC4312 EC4313 EC4311
1
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
DY DY
1
[44] ACOK_IN_M
2
R4302
1
[24] PS_ID 15KR2F-GP 84.T3904.K11
R4303
E
10KR2J-3-GP 3D3V_S5
2
PQ3802_1 B Q4302 3D3V_S5 JGND JGND
[24,44] HW_ACAVIN_NB MMBT3904-5-GP-U
2
C
PSID_DISABLE#_R_C
1
X01 20161230B change
Layout Note: R4309
100KR2J-1-GP
D4302 R4304
2K2R2J-2-GP
0.1u->1KP By EMI check 20180808
D LBAV99LT1G-1-GP +DC_IN_C D
PSID Layout width > 25mil Q4301 AFTP4303 1
PJA138KA-GP 75.00099.O7D AFTP4304 1 PS_ID_R
+DC_IN_C
2
G AFTP4305 1
2nd = 75.00099.K7D
3
A00 Change 0 ohm to short pad 20181219 PS_ID_R 1 R4317 2 PS_ID_R2 D 3rd = 75.00099.Q7D +DC_IN_C
0R0603-PAD R4305 AFTP4316 1
JGND 1 EL4304 2 S PS_ID_R1 1 2 4th = 75.00099.D7D PS_ID
084.00138.0A31 X02 20170314 add
1
0R0805-PAD 33R2J-2-GP
D4303
Pin Definition: TBD AZ4024-02S-R7G-GP
1
R4306
2
1 EL4303 2
DY
DCIN1
9
60ohm@100MHz 75.04024.07D 33R2J-2-GP
3
0R0805-PAD
1 DCR=0.02 ohm
2
3
4
1
1
AFTP4301
AFTP4302
Max current = 6000mA
S1
A00 Change 0 ohm to short pad 20181220 +DC_IN 19V_AD+
5 A00 Change 0 ohm to short pad 20181219 PU4301
6 +DC_IN_C 1 EL4301 2 1 S D 8
7 2 7
240KR3-GP
S D
C4306
8 0R0805-PAD
SC10U25V3MX-3-GP
SC1KP50V2KX-1DLGP
3 6
C4305
SCD01U50V2KX-1DLGP
C4304
SCD01U50V2KX-1DLGP
C4303
SCD01U50V2KX-1DLGP
R4316
20KR2J-L2-GP
S D
1
1
1
EC4301 C4302
EC4302
4 5
SC1U50V3KX-1-GP
C4301
R4307
G D
10 1 EL4302 2 SCD1U50V3KX-DL-GP DY DY
SC10U25V3MX-5-GP
0R0805-PAD AON7403-GP-U TypeC
2
2
2
ETY-CON8-23-GP-U D4301 84.07403.037
2
20.F2120.008 P6AF24A-R1-00001-GP
2
083.00624.00AM
Q4305
47KR2F-GP
2
1
R2
JGND JGND Q4304
C AD_OFF_L 1
0.1u->1KP By EMI 20180808
R4308
AC_DIS B R1
R1
3 AD_OFF_R
E
20180927 0805->0603 R2 LTA024EUB-FS8-GP
2
84.00024.01K
1
LMUN5212T1G-GP
1
R4379 84.05212.B11 R4311
C 1KR2F-3-GP 100KR2F-L1-GP C
NON_TypeC
NON_TypeC
2
D4308
HW_ACAVIN_NB A K ACOK_IN_M
1
RB751V-40-2-GP
NON_TypeC R4315 If=0.3A
18K7R2F-GP
2
Main Func = M-BAT Input Batt Connecter
Barrel Adapter Piug-in Detect
BT+
[24,44] PBAT_CHG_SMBCLK
[24,44] PBAT_CHG_SMBDAT
K
EC4308
1
SC1KP50V2KX-1DLGP EC4307 D4307

[24,44] PBAT_PRES#
DY SC1KP50V2KX-1DLGP DY SMF18A-GP
Change PN 2018/11/02 DVT2
2
BATT1
B 11 3D3V_AUX_KBC B
X01 20161230B change 1
0.1u->1KP By EMI 20180808 RN4302 2 +DC_IN

4 5 3 A00 Change 0 ohm to short pad 20181220
PBAT_CHG_SMBCLK 3 6 PBAT_SMBCLK1 4
R4378
1
PBAT_CHG_SMBDAT 2 7 PBAT_SMBDAT1 5 R4380
PBAT_PRES# 1 8 PBAT_PRES1# 6 0R0402-PAD 100KR2J-1-GP
1
1 R4301 2 SYS_PRES1# 7
TypeC TypeC
8 R4376
SRN100J-4-GP 0R0402-PAD
9
TypeC 470KR2F-GP
TYPEC_VDD 2
2
10
12
2
U4302
ETY-CON10-33-GP AC_IN#_G HW_ACAVIN_NB
5 1
SENSE OUT 2
EC4309 EC4310 020.F0667.0010 VDD
1
1 AFTP4306 IC_DELAY 4 3
1
DY DY 1 CD VSS
SC10P50V2JN-4GP
SC10P50V2JN-4GP
EC4306 AFTP4307 TypeC
1
DY 1 R4377 C4344
SC10P50V2JN-4GP AFTP4308
84K5R2F-GP TypeC SC1KP50V2KX-1DLGP
2
TypeC 074.01004.00BF
2
2
PBAT_PRES1# 1 AFTP4309
PBAT_SMBDAT1 1 AFTP4310
PBAT_SMBCLK1 1 AFTP4311
BT+ 1 AFTP4312
BT+ 1 AFTP4313
BT+ 1 AFTP4314
SYS_PRES1# 1
Placement: Close to Batt Connector AFTP4315
PBAT_CHG_SMBCLK
PBAT_CHG_SMBDAT
PBAT_PRES#
A A
3
D4304 D4305 D4306

LBAV99LT1G-1-GP LBAV99LT1G-1-GP LBAV99LT1G-1-GP
75.00099.O7D 75.00099.O7D 75.00099.O7D
<Core Design>
1
Wistron Corporation
3D3V_AUX_KBC 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2nd = 75.00099.K7D 2nd = 75.00099.K7D 2nd = 75.00099.K7D Title

Title
3rd = 75.00099.Q7D 3rd = 75.00099.Q7D 3rd = 75.00099.Q7D

DCIN Rev
4th = 75.00099.D7D 4th = 75.00099.D7D 4th = 75.00099.D7D A2 A00
Bensolo AMD
Date:
Sheet 43 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = Charger
OFFPAGE
PR4468
PC4469
ISL9538H
100K(63.10434.1DL)
1500p(78.15224.2FLDL)
ISL95522
100K(64.R0005.6DL)
DY
ISL9538H For Charger https://vinafix.com
20180526 check PQ4451 084.02421.0031 DY
19V_AD+
[24,43] PBAT_CHG_SMBDAT
PR4469 DY 0R(64.R0005.6DL)
S2 PWR_AD_A
PR4401
D02R6F-GP
PWR_AD_B
PR4441 DY 0R(64.R0005.6DL)
PU4415
8 D S 1 1 2
[24,43] PBAT_CHG_SMBCLK 7 D S 2
PR4440 0R(64.R0005.6DL) DY
1
6 D S 3
1
5 D G 4 PR4466 PG4401 PG4402
1
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
[24] HW_ACAV_IN PR4471 0R(64.R0005.6DL) DY 100KR2F-L1-GP
PC4402 PC4404 PC4405 PC4406
AON7403-GP-U
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
84.07403.037 PC4469
1
PR4468
2
1
D PR4470 DY 0R(64.R0005.6DL) D
100KR2J-1-GP
G
[43] ACOK_IN_M
PQ4451
PWR_CHG_CSIP_R
PWR_CHG_CSIN_R
2
PJA3415-GP
PR4488
2
0R0402-PAD-1-GP
PBAT_CHG_SMBDAT PWR_CHG_DATA
D
1 2
PR4489
0R0402-PAD-1-GP +SDC_IN_SW 1 2 PQ4451_D 19V_DCBATOUT
PBAT_CHG_SMBCLK 1 2 PWR_CHG_CLK
[24] AD_IA PR4465
PR4490
0R0402-PAD-1-GP
0R0402-PAD-1-GP 2018/11/02 DVT2
HW_ACAV_IN 1 2 ACAV_IN R4401
[24,43] PBAT_PRES# PQ4451_G
1 2
2
PR4491
PR4467 R4402
0R0402-PAD-1-GP
1
10KR2F-2-GP
1 2 PC4465 PC4466
ACOK_IN_M PWR_AC_IN#
1
1 2 PC4401 PC4441 PC4442 PC4443 PC4444 PC4461 PC4462 PC4463 PC4464
SC22U25V5MX-5-GP
SC22U25V5MX-5-GP
DY DY PT4402 DY DY
SCD1U25V2KX-1-DL-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
ST68U25VDM-GP
PR4464 R4403
[74] VCCPD_VBUS_ACK
2
1
100KR2F-L1-GP 1 2
2
PR4493
2
0R0402-PAD-1-GP 0R0805-PAD-1-GP-U
VGA_PROCHOT# 1 2 DGPUHOT#
From NXP ACK PWR_AD_A_SW_R1 0R0805-PAD-1-GP-U
0R0805-PAD-1-GP-U
PR4494
[8,24,46] H_PROCHOT# 0R0402-PAD-1-GP
1
PQ4452
VCCPD_VBUS_ACK 1 2 PQ4417_G
PR4422 PR4482
3 4 1R2F-GP 1R2F-GP
[24,43] HW_ACAVIN_NB PR4495 AC_DIS 2 5 HW_ACAVIN_NB
Note:ZZ.27002.F7C01
2
0R0402-PAD-1-GP
H_PROCHOT# 1 2 PROCHOT#_CPU
1 6 DC_IN_OFF For acoustic noice
[24,43] AC_DIS 1 2
DY by acoustic test 20181108
5
6
7
8
D 8
D 7
D 6
D 5
2N7002KDW-1-GP
D
D
D
D
PR4496 2nd = 75.00601.07C PC4415
SC4D7U25V5KX-DL-GP PU4403 PU4405
1 2 PQ4418_3
75.27002.F7C AON7380-GP AON7380-GP
1
PC4416 PC4417
0R0402-PAD-1-GP USB_ADT 19V_AD+ SC1U25V3KX-1-DLGP SC1U25V3KX-1-DLGP 4 4
G
S
S
S
1 S
2 S
3 S
2
3
2
1
PR4497
1 2 PQ4405_3
1
0R0402-PAD-1-GP
PD4408
PWR_AD_A 10*11.5*4
BAT54C-12-GP TP4401 DCR=6.7~7.0mohm
TPAD14-OP-GP PC4436 Idc=12A, Isat=27A
SCD22U25V3KX-DL-GP
PD4407
3
2 1PWR_CHG_BTST1_A 1 2
USB_ADT
A K PL4401
1
PR4402 COIL-2D2UH-11-GP
PWR_CHG_DCIN_R
RB520S30-GP 2D2R3-1-U-GP
1 2 PWR_CHG_PHASE2
1
C PD4401 C
BAT54C-12-GP DY PR4416
5
6
7
8
D 8
D 7
D 6
D 5
19V_AD+
1 PR4403 2D2R5J-1-GP
PWR_CHG_ASGATE
PWR_CHG_UGATE1
PWR_CHG_PHASE1
D
D
D
D
2D2R5J-1-GP
PWR_CHG_BTST1
2
3 2 1
PWR_CHG_CSIN
PWR_CHG_CSIP
PU4404 PU4406
AON7380-GP AON7380-GP
1PWR_CHG_SNB
PWR_CHG_AIN 2
19V_DCBATOUT PWR_CHG_LGATE1
1
PC4419 4 4
G
SC1U25V3KX-1-DLGP
S
S
S
1 S
2 S
3 S
2
3
2
1
VDD
PR4405
PWR_CHG_VDDP
4D7R2F-GP
1 2
DY PC4435
SC1KP50V2KX-1DLGP
16
15
14
13
12
11
10
2
9
PU4401
1
1
PC4422
ADP
CSIP
CSIN
ASGATE
PHASE1
LGATE1
BOOT1
UGATE1
SC4D7U6D3V3KX-DLGP
PR4404 PC4452
2
402KR2F-GP SC4D7U6D3V3KX-DLGP
PWR_CHG_DCIN 17 8 PWR_CHG_VDDP 1 2
DCIN VDDP
2
18 7 PWR_CHG_LGATE2
VDD LGATE2
PWR_CHG_ACIN 19 6 PWR_CHG_PHASE2
ACIN PHASE2 PR4408 PC4423
PWR_CHG_OTGEN 20 ISL9538HRTZ-GP-U 5 PWR_CHG_UGATE2 2D2R3-1-U-GP SCD22U25V3KX-DL-GP PC4424
CMIN UGATE2
1
SC1U25V3KX-1-DLGP
PWR_CHG_BTST2 PWR_CHG_BTST2_A
2
21 4 2 1 1 2 DCBATOUT_R PWR_CHG_VBATIN
SDA BOOT2
1
PC4420 PR4406 PR4417

SCD1U25V2KX-1-DL-GP 100KR2F-L1-GP 100KR2F-L1-GP 22 3 1 DY2 PR4424 PG4405
SCL VSYS 1R2F-GP GAP-CLOSE-PWR-3-GP
2
23 2 PWR_CHG_CSOP PC4439 1 2PWR_CHG_CSOP_R 2 1

PROCHOT# CSOP
1
PWR_CHG_ACOK PWR_CHG_CSON
SC1U25V3KX-1-DLGP 2018/11/02 DVT2
1
24 1 1 2
AMON/BMON
ACOK CSON
2
PR4407
BATGONE
SC1U25V3KX-1-DLGP D01R3721F-GP-U
CMOUT
BGATE
PC4425
COMP
33
PROG
Current Sense R-
PSYS
VBAT
PGND
1
CH: P8-/+
2
1 2PWR_CHG_CSON_R 2 1 BT+
074.09538.0073
25
26
27
28
29
30
31
32
PWR_CHG_DATA 1 DY2 PR4425
1R2F-GP
PG4406
GAP-CLOSE-PWR-3-GP PWR_CHG_VBATIN 1
PU4412
S D 8
PWR_CHG_CLK PC4451 2 S D 7
PWR_CHG_BATGONE
PWR_CHG_OTGPG
SC1U25V3KX-1-DLGP 3 S D 6
PWR_CHG_BGATE
PWR_CHG_VBAT1
PWR_CHG_COMP
PWR_CHG_AMON
PWR_CHG_PMON
PWR_CHG_PROG
PWR_CHG_PROCHOT# 4 G D 5
1
PC4449 PC4450
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
AON7401-GP
1
PC4429
SC4700P50V2KX-1DLGP
2
VDD VDD
PR4409
PBAT_PRES# 2 1 PC4440
1
SC1U25V3KX-1-DLGP
PR4442 PR4429 100KR2F-L1-GP 2 1
100KR2F-L1-GP 100KR2F-L1-GP TP4402 1
B 1 TPAD14-OP-GP PR4483 B
PC4430 100R2F-L1-GP-U
2
PQ4415 SC10P50V2JN-4DLGP 1 2
ACOK#
PU +VCCSTG = 1.0 V on CPU side

2
4 3 2 1
2
3D3V_S5 3D3V_S5 1 2
ACAV_IN 5 2
Note:ZZ.27002.F7C01
PG4408
GAP-CLOSE-PWR-3-GP PR4410 PR4492 PR4413
PWR_AC_IN#
1
6 1 105KR2F-1-GP 0R0402-PAD-1-GP 6K04R2F-GP

1
PR4472 PR4435
1
100KR2F-L1-GP 100KR2F-L1-GP 2N7002KDW-1-GP PR4426
PQ4416 196KR2F-GP
PROCHOT#_CPU AD_IA
4 3
2
2
5 2 PWR_CHG_PROCHOT#
Note:ZZ.27002.F7C01
1
PC4432
PWR_CHG_PROCHOT#_R 6 1 SC1KP50V2KX-1DLGP
2
2N7002KDW-1-GP
1
PR4411
499R2F-2-GP
PQ4402
G PWR_CHG_PROCHOT#_R
1
PC4433
2
DGPUHOT# D SC1KP50V2KX-1DLGP DY
Barrel Prochot PWR_CHG_COMP_R
2
S
1
PC4431
2N7002K-2-GP
19V_AD+ Follow custormer circuits. SCD01U25V2KX-3DLGP
2
1
PR4437
100KR2F-L1-GP
TypeC Prochot
2
Follow custormer circuits.

1
PR4436
1MR2J-1-GP
DY
E PQ4408_E
3D3V_S5
2
PD4403
1
PR4462 L1SS355T1G-GP
100KR2F-L1-GP
PD4403_K K APD4403_A B PQ4408
MMBT3906-3-GP PQ4405
A PQ4418
2
84.03906.R11 A
C
PQ4405_3
2
PQ4418_3 3 4 3 4
PR4486 PR4485 PR4487
PQ4417_D PQ4418_2 PQ4418_5 0R0402-PAD-1-GP PQ4408_C 2 1 PQ4405_2 2 5 PQ4405_5
Note:ZZ.27002.F7C01
2 1 2 5
Note:ZZ.27002.F7C01
1 6 0R0402-PAD-1-GP 1 6
0R0402-PAD-1-GP
1
PC4468
1
PC4467
1
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
2N7002KDW-1-GP 2N7002KDW-1-GP
1
PR4439
1
2
D
19V_DCBATOUT 680KR2F-GP PR4463

DY
PQ4405_6
0R2J-L-GP
PQ4418_6
PQ4417 PR4459
2N7002K-2-GP 0R2J-L-GP DY
2
84.2N702.J31
2
2
2
PWR_CHG_ACOK
PWR_CHG_ACOK
PR4461 PR4438 <Core Design>

PR4460 100KR2F-L1-GP PR4443 100KR2F-L1-GP
10KR2F-2-GP 10KR2F-2-GP
Wistron Corporation
G
3D3V_S5
1
3D3V_S5
2

PQ4417_G Taipei Hsien 221, Taiwan, R.O.C.
TitleTitle
Power (Charger_ISL9538)
SizeSize Document
Document Number
Number Rev Rev
A1
Bensolo AMD A00
Date:
Sheet 44 of 106
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_5V
OFFPAGE-Signal
20180425
OFFPAGE-GAP SY8288C For 5V 5V_AUX_S5
https://vinafix.com
Place another side , make GND plan bigger

19V_DCBATOUT PWR_DCBATOUT_5V
1
PR4559 DY
1 2 PWR_5V_EN
[40,45] 3V_5V_EN PR4552
0R0402-PAD-1-GP R4502
GAP-CLOSE-PWR-3-GP 100KR2J-1-GP
D D
2
2 1
PH on EE Side
IDC:7.175A
PWR_DCBATOUT_5V PU4551
R4507 9 PWR_5V_PG
PR4560 GAP-CLOSE-PWR-3-GP 2 PG
IN#2 Cyntec. 6.8 x7.3 x 3.0mm
IMAX:10.25A
1 2 PWR_5V_PG
[17,45,54] 3V_5V_PWRGD 2 1
3 1 PWR_5V_BOOT 1 2PWR_5V_BOOT_A 1 2 DCR: 14~15mOhm
0R0402-PAD-1-GP IN#3 BS Idc : 9A , Isat : 18A
1
PC4552 PC4554 PC4555 PR4554
DY 4
SCD1U25V2KX-1-DL-GP
R4508 0R0603-PAD-1-GP-U PC4553
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
GAP-CLOSE-PWR-3-GP IN#4 SCD1U25V2KX-1-DL-GP
PL4551
2
5 PWR_5V
2 1 IN#5
6 PWR_5V_PH 1 2
LX#6
R4509
PWR_5V_PG 10 19
GAP-CLOSE-PWR-3-GP NC#10 LX#19 IND-1D5UH-23-GP-U DY DY DY
5V_S5 PWR_5V 2 1 20 PC4565 PC4556 PC4557 PC4558 PC4559 PC4560 PC4561
LX#20
1
R4504 16
GAP-CLOSE-PWR-3-GP NC#16 Trace used 10 mil
SCD1U25V2KX-1-DL-GP
R4510 PG4562
2 1 GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
2
14 PWR_5V_VOUT 1 2
R4512 PWR_5V_VCC 17 OUT
2 1 VCC
GAP-CLOSE-PWR-3-GP
2 1
1
PC4562 13 PWR_5V_FB 1 2PWR_5V_FB_A 2 1
R4511 SC2D2U10V3KX-1DLGP-U FF PR4555
R4513 GAP-CLOSE-PWR-3-GP PWR_5V_EN 12 PC4563 1KR2F-3-GP
EN1
2
GAP-CLOSE-PWR-3-GP SC1KP50V2KX-1DLGP
2 1 2 1 PWR_5V_EN2 11 15 PWR_5V_LDO
EN2 LDO
R4514
1
GAP-CLOSE-PWR-3-GP For 2cell use
1
PR4556 PC4566 PC4551
GND
GND
GND
GND
2 1
SCD1U16V2KX-3DLGP
1MR2J-1-GP DY SC4D7U6D3V3KX-DLGP
2
R4515 SY8288CRAC-GP
GAP-CLOSE-PWR-3-GP
18
21
2 1
PR4557 074.08288.0B43
499KR2F-1-GP
1 2
R4516 19V_DCBATOUT
GAP-CLOSE-PWR-3-GP
2 1 DY
2
C PR4558 PC4564 C
R4517
GAP-CLOSE-PWR-3-GP 499KR2F-1-GP
1
2 1 SCD1U25V2KX-1-DL-GP
2
R4518
GAP-CLOSE-PWR-3-GP
2 1
Place another side , make GND plan bigger
R4519
GAP-CLOSE-PWR-3-GP 5V_AUX_S5 EN rating 25V
2 1 PG4565
GAP-CLOSE-PWR-3-GP
EN Rising Threshold : 0.8V
R4520
GAP-CLOSE-PWR-3-GP 2 1 PWR_5V_LDO Ilimt : 8A
2 1
SSID = PWR.Plane.Regulator_3D3V
OFFPAGE-Signal
20180425
OFFPAGE-GAP
19V_DCBATOUT PWR_DCBATOUT_3D3V
SY8286B For 3D3V IDC : 3.728A
[40,45] 3V_5V_EN
1
PR4561
2 PWR_3D3V_EN Vin Operating range : 4~23V
Vin_Max : 25V
PR4501 PC4506 Cyntec. 4.85 x4.7 x 3.0 mm
IMAX : 5.327A
0R0603-PAD-1-GP-U SCD1U25V2KX-1-DL-GP
0R0402-PAD-1-GP 1 R4501 2 PWR_3D3V_BOOT 2 1 PWR_3D3V_BOOT_A 2 1 DCR: 20~25mOhm
Ilimt : 8A Idc : 6A , Isat : 10A
B
PH on EE Side 1
R4505
2 PWR_DCBATOUT_3D3V PU4501
PL4501 PWR_3D3V
B
PR4562 2 6 PWR_3D3V_PH 1 2
R4506 IN#2 LX#6
1 2 PWR_3D3V_5V_PG 3 19
[17,45,54] 3V_5V_PWRGD
1 2
4 IN#3 LX#19 20
DY DY
0R0402-PAD-1-GP IN#4 LX#20 COIL-1D5UH-43-GP
1
0R0805-PAD-1-GP-U PC4501 PC4502 1 PC4503 5 PC4513 PC4509 PC4510 PC4511 PC4512

IN#5
DY
1
PWR_3D3V_5V_PG
DY 10
SCD1U25V2KX-1-DL-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
0R0805-PAD-1-GP-U
PWR_3D3V_EN 12 NC#10 15
SCD1U25V2KX-1-DL-GP
0R0805-PAD-1-GP-U EN1 NC#15
2
PC4567 PWR_3D3V_EN2 11 16 PWR_3D3V_LDO

EN2 NC#16
2
1
1
PWR_3D3V_BOOT 1
SCD1U16V2KX-3DLGP
PR4514
PWR_3D3V 1MR2J-1-GP PWR_3D3V_5V_PG 9 BS 7
3D3V_S5 DY PWR_3D3V_FB 13 PG GND 8
FF GND
2
14 18
R4503 17 OUT GND 21
LDO GND
2
GAP-CLOSE-PWR-3-GP
2 1 SY8286BRAC-GP
EN rating 25V PWR_3D3V_LDO 074.08286.0043
R4521
EN Rising Threshold : 0.8V Place another side , make GND plan bigger
GAP-CLOSE-PWR-3-GP
EN Falling Threshold : 0.4V
1
2 1
PC4507
SC4D7U6D3V3KX-DLGP
Close to PC4511
PR4509 Trace used 10 mil
2
499KR2F-1-GP PG4530
R4522 1 2
19V_DCBATOUT GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP PWR_3D3V_VOUT 1 2
DY
2 1
1
PC4508 PC4526 PR4506

SCD1U25V2KX-1-DL-GP
PR4508 SC1KP50V2KX-1DLGP 1KR2F-3-GP

R4523 499KR2F-1-GP 1 2 PWR_3D3V_FB2 2 1
1
GAP-CLOSE-PWR-3-GP
3V_5V_PWRGD
2 1
2
R4524
GAP-CLOSE-PWR-3-GP PR4505
100KR2J-1-GP
2 1 1 2
3D3V_AUX_S5
1
A A
ED4508
DY AZ5725-01FDR7G-GP
83.05725.0A0
3D3V_AUX_S5
2
<Core Design>
PG4532
GAP-CLOSE-PWR-3-GP
2 1 PWR_3D3V_LDO Wistron Corporation
X00 By EMI check 20180801 Title

Title
POWER (SY8288_5V/3D3V)
Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bensolo AMD A00
Date:
Sheet 45 of 106
5 4 3 2 1
5 4 3 2 1
OFFPAGE Main Func = APU VDDCR_VDD & VDDCR_SOC VR

PR4678
0R0402-PAD-1-GP https://vinafix.com 20180418
1 2 PWR_CPU_PROCHOT#
[8,24,44] H_PROCHOT# PR4603
PR4638 10R2F-L-GP
0R0402-PAD-1-GP PWR_VDDNB_VSEN 2 1
PWR_CORE_SVT 1D2V_CPU_SOC
1 2
[8] SVID_ALERT_N_CPU
1
20180918 PC4602
243R->187R SCD01U25V2KX-3DLGP
PR4621
2
0R0402-PAD-1-GP
1 2 PWR_CORE_SVC PR4601
[8] SVID_CLK_CPU PC4603
D 187R2F-GP PR4604 D
3D3V_S5 1 2 PWR_VDDNB_ISUMN 301R2F-GP SC1KP50V2KX-1DLGP
[48] PWR_VDDNB_ISEN1_N_A PWR_VDDNB_FB PWR_VDDNB_FB_C
PR4624 1 2 1 2
1
0R0402-PAD-1-GP PR4607 SC220P50V2KX-3DLGP
PC4604 1
1
1 2 PWR_CORE_SVD PWR_VDDNB_COMP 2
2K61R2F-1-GP
PR4649
[8] SVID_DATA_CPU
10KR2F-2-GP PC4601 PC4605 PR4605
SCD1U25V2KX-1-DL-GP PR4606
DY SC2200P50V2KX-2DLGP 4K99R2F-L-GP
1
PR4610 1 2PWR_VDDNB_FB_A 1 2 1 2
PC4606
11KR2F-L-GP
PR4618 PC4607
698R2F-GP
SCD033U25V2KX-1-GP
2
0R0402-PAD-1-GP PWR_VDDNB_ISUMN_A SCD1U25V2KX-1-DL-GP
2
1 2 PWR_CORE_PGOOD PWR_VDDNB_PG 20151209 PR4609
[8,24,26,46] VCORE_PWRGD
1
change to 25V cap 2KR2F-3-GP
2
1
PR4608
41K2R2F-GP
PR4617
1
0R0402-PAD-1-GP PR4611
2
1 2 PWR_VDDNB_PG NTC-10K-29-GP-U PWR_VDDNB_FB_B
[8,24,26,46] VCORE_PWRGD 3D3V_S5
2
[48] PWR_VDDNB_ISEN1_P_A
1
PR4640 PR4643
0R0402-PAD-1-GP
1 2 PWR_CORE_ENABLE
10KR2F-2-GP Place close to PL4801 PC4608
[40] GROUPB_PWRGD
2
PR4650
2
PWR_VDDNB_PG PWR_VDDNB_PG 2 1 PWR_CORE_PGOOD
PWR_CORE_PGOOD DY
PR4645
0R0402-PAD-1-GP 0R2J-L-GP
1 2 PWR_CORE_PWROK
[8,68] SVID_PWRGD PWR_VDDNB_LG [48]
Place close to PU4801
PWR_VDDNB_PH [48]
PWR_VDDNB_HG [48]
PR4619 PR4613
0R0402-PAD-1-GP PR4612 NTC-470K-17-GP PWR_VDDNB_BOOT [48]
2 1 PWR_CORE_VSEN1_N 1 2 1 2
[8] VSSCORE_SENSE
PWR_VDDNB_NTC_A
8K66R2F-GP PR4614
27K4R2F-GP
PR4620 1 2
0R0402-PAD-1-GP
40
39
35
38
36
34
33
32
31
37
C 2 1 PWR_CORE_VSEN1_P PU4601 5V_S5 C
[8] VCCCORE_SENSE
UGATE_NB
ISUMP_NB
ISUMN_NB
VSEN_NB
PGOOD_NB
LGATE_NB
PHASE_NB
BOOT_NB
COMP_NB
FB_NB
PR4615
133KR2F-GP
PR4602 2 1
1
0R0402-PAD-1-GP PC4609 PR4648
1 2 PWR_VDDNB_VSEN PWR_VDDNB_NTC 1 30
1R5J-2-GP
[8] VDDNB_SENSE PWR_CORE_BOOTB [47]
SC1KP50V2KX-1DLGP NTC_NB BOOT2
PR4616
1 2 PWR_VDDNBE_IMON 2 29
IMON_NB UGATE2 PWR_CORE_HGB [47] 0R0402-PAD-1-GP
2
PWR_CORE_SVC 3 28
SVC PHASE2 PWR_CORE_PHB [47]
PWR_CPU_PROCHOT# 4 27
PWR_CORE_VDDIO VR_HOT# LGATE2 PWR_CORE_LGB [47]
1D8V_S0 PWR_CORE_VDDIO PC4610 1
PWR_CORE_SVD 5 26 PWR_CORE_VDDP 2 SC1U10V2KX-1DLGP
PG4603 SVD VDDP
ISL62771HRTZ-GP-U
GAP-CLOSE-PWR-3-GP PWR_CORE_VDDIO 6 25 PWR_CORE_VDD PC4611 1 2 SC1U10V2KX-1DLGP
VDDIO VDD
1 2 PWR_CORE_VDDIO
PWR_CORE_SVT 7 24
SVT LGATE1 PWR_CORE_LGA [47]
PWR_CORE_ENABLE 8 23
ENABLE PHASE1 PWR_CORE_PHA [47]
PWR_CORE_PWROK 9 22
PWROK UGATE1 PWR_CORE_HGA [47]
2
PR4622 PWR_CORE_IMON 10 21 PWR_CORE_BOOTA [47]

0R2J-L-GP IMON BOOT1
DY 41
GND
2
PR4623
133KR2F-GP
PC4618 PC4612
PGOOD
ISUMN
ISUMP
1
COMP
ISEN2
ISEN1
VSEN
SC1KP50V2KX-1DLGP SC1KP50V2KX-1DLGP
NTC
RTN
1
FB
2
1
11
12
13
14
15
16
17
18
19
20
DY PC4613
SCD1U25V2KX-L-GP
74.62771.033
Place close to PU4702
2
GROUPB_PWRGD
PWR_CORE_VSEN1_N
PWR_CORE_VSEN1_P
PR4625 PR4626
SVID_PWRGD
PWR_CORE_PGOOD
PWR_CORE_ISUMN
9K53R2F-GP NTC-470K-17-GP
1 2 PWR_CORE_NTC_A 1 2 PWR_CORE_NTC
PR4627 PC4614
B 301R2F-GP B
SC1KP50V2KX-1DLGP
PR4629 PWR_CORE_FB 1 2 PWR_CORE_FB_A 1 2 PWR_CORE_VSEN1_P
27K4R2F-GP PC4615
1 2
PC4624 1 2 SCD22U10V2KX-2-GP SC220P50V2KX-3DLGP PR4628
698R2F-GP
2
PWR_CORE_COMP 1 2 2 1
PC4625 1 2 SCD22U10V2KX-2-GP
[46,47] PWR_CORE_ISEN1_N_A PR4630
PC4616 PR4631 PC4617
27KR2F-L-GP
SC390P50V2KX-1-GP 2KR2F-3-GP SC330P50V2KX-3-DL-GP
PWR_CORE_ISEN2 1 2 PWR_CORE_COMP_A
1 2 1 2 PWR_CORE_COMP_B 1 2
DY [47] PWR_CORE_ISEN2
1
PWR_CORE_ISEN1
[47] PWR_CORE_ISEN1
PR4632 DY
3
32K4R2F-1-GP
ED4607
AZ5125-02S-R7G-GP
[47] PWR_CORE_ISEN1_P_A
2
75.05125.07D
1
20180928
1PWR_CORE_ISUMP
PR4633 22n->68n
X00 By EMI check 20180612 2K61R2F-1-GP
PC4619 PR4634
2
1
PR4635 10R2J-2-GP
1 2
11KR2F-L-GP
SCD068U25V2KX-GP
PC4620
SCD1U25V2KX-1-DL-GP
2
2
PC4621
SCD01U25V2KX-3DLGP
2
1 2
PR4636
NTC-10K-29-GP-U PC4622
SC330P50V2KX-3GP
PR4637 2 1
2
340R2F-GP
1 2
DY PR4639
10R2J-2-GP
[46,47] PWR_CORE_ISEN1_N_A 2 1
1V_CPU_CORE
1
Place close to PL4701 PC4623 20180918

SCD1U25V2KX-1-DL-GP 536R->340R
2
A A
<Core Design>
Wistron Corporation
Title
Title
APU VCORE VR (1/3)
Size
Size Document
DocumentNumber
Number Rev
Rev
A2 A00
Bensolo AMD
Date:
Sheet 46 of 105
5 4 3 2 1
5 4 3 2 1
Main Func = APU VDDCR_VDD 2ph H/LS MosFET and Output LC

https://vinafix.com
D D
PWR_DCBATOUT_VCCCORE
PU4702
19V_DCBATOUT 2
PWR_DCBATOUT_VCCCORE 3
PWR_CORE_HGA_A 1 4
R4701 [46] PWR_CORE_HGA
1
10 PC4705
PC4702 PC4703 PC4704
1 2 9 DY SCD1U25V2KX-L-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
7
2
0R1206-PAD PWR_CORE_LGA 8 6
[46] PWR_CORE_LGA 5
1
Current Sense R- TC4701 FDMS3600-02-RJK0215-COLAY-GP
SE33U25VM-11-GP
CH: P6+/- 1st = 075.06994.0037
2
0.15uH 7.6mmX6.8mmX4mm
1V_CPU_CORE
For acoustic noice DCR : 0.66 +/- 7% PL4701
IDC : 36A , ISAT : 45A 1 2
[46] PWR_CORE_PHA
COIL-D15UH-2-GP
PR4701
2D2R3-1-U-GP PT4701 PT4702 PT4703
1
1 2 PWR_CORE_BOOTA_A 1 2
[46] PWR_CORE_BOOTA
2
PR4707
PC4701 2D2R5F-2-GP PG4709 PG4710
DY
2
SCD22U25V3KX-DL-GP
1
GAP-CLOSE-PWR-3-GP
PWR_VCORE_SNBA GAP-CLOSE-PWR-3-GP
SE330U2VDM-4-GP
1
SE330U2VDM-4-GP
DY PC4710 SE330U2VDM-4-GP
SC1KP50V2KX-L-1-GP
2
VCORE :330uF/9m ohm * 5pcs+22uF * 20pcs
C C
PR4713 1 2 10KR2F-L1-GP
[46] PWR_CORE_ISEN1
PR4702
3K65R2F-1-GP
1 2 PWR_CORE_ISEN1_PA
TDC=35A
[46,47] PWR_CORE_ISEN1_P_A
PR4703
10R2F-L-GP
1 2 PWR_CORE_ISEN1_NA
[46,47] PWR_CORE_ISEN1_N_A
EDC=50A
PWR_DCBATOUT_VCCCORE
PU4703
2
3
PWR_CORE_HGB_A 1 4
[46] PWR_CORE_HGB
1
10 PC4714
PC4709 PC4708 PC4707
9 DY
SCD1U25V2KX-L-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
7
2
PWR_CORE_LGB 8 6
[46] PWR_CORE_LGB 5
FDMS3600-02-RJK0215-COLAY-GP
1st = 075.06994.0037
1V_CPU_CORE
DCR : 0.66 +/- 7% PL4702
IDC : 36A , ISAT : 45A 1 2
[46] PWR_CORE_PHB
PR4712
COIL-D15UH-2-GP DY
B 2D2R3-1-U-GP PT4704 PT4705 PT4706 B
1
1 2 PWR_CORE_BOOTB_A 1 2
[46] PWR_CORE_BOOTB
2
PR4710
PC4713 2D2R5F-2-GP PG4712 PG4711
DY
2
SCD22U25V3KX-DL-GP
1
GAP-CLOSE-PWR-3-GP
PWR_VCORE_SNBB GAP-CLOSE-PWR-3-GP
1
DY PC4712 SE330U2VDM-4-GP
SC1KP50V2KX-L-1-GP SE330U2VDM-4-GP
2
SE330U2VDM-4-GP
PR4714 1 2 10KR2F-L1-GP
[46] PWR_CORE_ISEN2
PR4711
3K65R2F-1-GP
1 2 PWR_CORE_ISEN1_PB
[46,47] PWR_CORE_ISEN1_P_A
PR4709
10R2F-L-GP
1 2 PWR_CORE_ISEN1_NB
[46,47] PWR_CORE_ISEN1_N_A
A A
<Core Design>
Wistron Corporation
Title
APU VDDCR_VDD VR MoSFETs (2/3)
Custom
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = APU VDDCR_SOC 1ph H/LS MosFET and Output LC https://vinafix.com
19V_DCBATOUT
PW R_DCBATOUT_VDDNB
1 R4801 2
0R0805-PAD
D D
Current Sense R-
CH: P8-/+
1
TC4801
DY SE33U25VM-11-GP
2
For acoustic noice
PW R_DCBATOUT_VDDNB
PU4801 DY by acoustic test 20181108
2
3
PW R_VDDNB_HG_A 1 4
[46] PW R_VDDNB_HG
1
10
PC4801 PC4802
TDC=12A
9 DY PC4804
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
7 SCD1U25V2KX-L-GP
2
8 6
[46] PW R_VDDNB_LG 5
C FDMS3600-02-RJK0215-COLAY-GP
1st = 075.06994.0037
MAX=17A C
1D2V_CPU_SOC
DCR : 0.66 +/- 7% PL4801
IDC : 36A , ISAT : 45A
1 2
[46] PW R_VDDNB_PH
COIL-D15UH-2-GP
PR4801
1
2D2R3-1-U-GP PT4801 PT4802 PC4806 PC4807 PC4808
1
1 2 PW R_VDDNB_BOOT_A1 2
[46] PW R_VDDNB_BOOT PR4807
2
PC4805 2D2R5F-2-GP
DY
2
SCD22U25V3KX-DL-GP
PG4805 PG4806
2
PW R_VDDNB_SNB GAP-CLOSE-PWR-3-GP
1
GAP-CLOSE-PWR-3-GP SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
1
SE330U2VDM-4-GP
PC4809 SE330U2VDM-4-GP SC10U6D3V3MX-DL-GP
2
DY SC1KP50V2KX-L-1-GP
NB : 330uF /9mohm* 2pcs+22uF * 12pcs
PR4802
B 3K65R2F-1-GP B
1 2 PW R_VDDNB_ISEN1_P
[46] PW R_VDDNB_ISEN1_P_A
PR4803
10R2F-L-GP
1 2 PW R_VDDNB_ISEN1_N
[46] PW R_VDDNB_ISEN1_N_A
A <Core Design> A
Wistron Corporation
Title
Title
APU VDDCR_SOC VR MoSFETs (3/3)
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date: Sheet
Sheet 48 of 105
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A
Title
Reserved
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A
Title
Reserved
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1D2V/0D6V
G5388 For VDDQ/VTT

OFFPAGE-Signal OFFPAGE-GAP https://vinafix.com
19V_DCBATOUT PWR_DCBATOUT_VDDQ
S5 R5101
2 1
17,24,51,66] APU_SLP_S5#
D 0R1206-PAD D
Current Sense R- 5V_S5

S3 CH: P7+/-
PR5101 PWR_DCBATOUT_VDDQ
1 2 PWR_VDDQ_VCC
17,24,40,60] APU_SLP_S3# 20181114 DVT2
1D2V_S3 PWR_VDDQ 10R2J-L-GP PC5104
1
R5102 SC1U10V2KX-1DLGP
K
1
GAP-CLOSE-PWR-3-GP PC5102 DY
1
2 1 SC4D7U6D3V3KX-DLGP PR5102 PC5108 PC5101 PC5105 PD5101
2
6K49R2F-1-GP DY DY
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
AZ4024-01L-R7G-GP
R5108 If 5V has droop 083.04024.0AA1
2
GAP-CLOSE-PWR-3-GP Please mount it
A
PWR_VDDQ_CS
2 1
SCD1U25V2KX-1-DL-GP
R5109
GAP-CLOSE-PWR-3-GP
2 1 3D3V_S5
R5110
1
GAP-CLOSE-PWR-3-GP
2 1 DY PR5104
TDC : 8A
10
34
24
23
22
21
9
PR5108 = 510K 100KR2J-1-GP PU5101
R5111 Fs = 400~550KHz PR5111 PC5110
CS
VCC
V+
V+
V+
V+
V+
GAP-CLOSE-PWR-3-GP 0R0805-PAD-1-GP-U SCD1U25V2KX-1-DL-GP
IMAX : 10.25A
2
2 1 27 PWR_VDDQ_BOOT 1 2PWR_VDDQ_BOOTA 2 1
PR5108 PWR_VDDQ_PG 8 BST
510KR2F-GP PGOOD
R5112 PWR_DCBATOUT_VDDQ
GAP-CLOSE-PWR-3-GP 1 2 PWR_VDDQ_TON 7 25 PWR_VDDQ_BOOTB
2 1 TON LX#25
PWR_VDDQ_EN 6
R5113 S5 17 Cyntec. 7 x 7 x 3.0 mm
GAP-CLOSE-PWR-3-GP APU_SLP_S3# 1
PR5112
2 PWR_VTT_EN 5 LX#17 18 DCR: 9m~10mOhm
2 1
0R0402-PAD-1-GP
S3 LX#18 19 Idc : 11 A , Isat : 22A PWR_VDDQ
28 LX#19 20 PL5101
PWR_VDDQ_VLDOIN VLDOIN LX#20 PWR_VDDQ_PH
R5114 35 1 2
GAP-CLOSE-PWR-3-GP LX#35 COIL-1UH-34-GP-U1
1
2 1 C5147 PC5103
SCD1U16V2KX-3DLGP DY SC1U10V2KX-1DLGP 16
PGND
1
C R5115 15 PC5106 PC5107 PC5109 PC5113 C
GAP-CLOSE-PWR-3-GP PGND
2
30 14
2 1 4 VTTGND PGND 13 PG5104
VTTGND PGND
2
33 12 GAP-CLOSE-PWR-3-GP
R5116 VTTGND PGND 11
PGND
1
GAP-CLOSE-PWR-3-GP
2 1
PWR_VDDQ_VTT PWR_VDDQ_VDDQ
29 2
VTT VDDQSNS
1
31
1D2V_S3 PWR_VDDQ_VLDOIN VTTSNS
1
PWR_VDDQ_FB
VTTREF
3 PR5105
VDDQSET
NC#26
6K2R2F-GP
DY PC5111 PC5112
R1
GND
R5103
2
GAP-CLOSE-PWR-3-GP PWR_VDDQ_PH
2
2 1 G5388K11U-GP
26
32
1
R5117
GAP-CLOSE-PWR-3-GP
SC10U6D3V3MX-DL-GP 074.05388.0043 DY
1
SC10U6D3V3MX-DL-GP
2 1 PWR_VDDQ_VTTREF
2nd:074.08861.0043 PR5106
10K2R2F-GP
PR5110
R5118 R2 2D2R5J-1-GP
2
GAP-CLOSE-PWR-3-GP
2 1
2
1
PC5114 PWR_VDDQ_SNB
SCD1U25V2KX-1-DL-GP
R5119
GAP-CLOSE-PWR-3-GP
2
2 1
DY
Vout= 0.75*(1+R1/R2) = 1.2
1
PC5115
A00 Change 0 ohm to short pad 20181221 SC1500P50V2KX-2-DL-GP
2
0D6V_S0 PWR_VDDQ_VTT
1 R5104 2
0R0805-PAD
APL5934 For 2D5V

B B
OFFPAGE-Signal OFFPAGE-GAP
APU_SLP_S5#
[17,24,51,66] APU_SLP_S5#
5V_S5
PWR_2D5V_VIN
1
3D3V_S5 PWR_2D5V_VIN PC5151
SC1U10V2KX-1DLGP
2
1
R5106 3D3V_S5 PC5155
GAP-CLOSE-PWR-3-GP SC10U6D3V3MX-DL-GP
2 1 Design current=700mA
2
1
PU5151
R5120 PR5152 APL5934KAI-TRG-GP-U PWR_2D5V
GAP-CLOSE-PWR-3-GP 10KR2F-2-GP
PG5151 5
2 1 VIN#5
GAP-CLOSE-PWR-3-GP 6 4
VCNTL VOUT#4
2
PWR_VDDQ_EN 2 1 PWR_2D5V_PG 7 3
APU_SLP_S5# 1 2 PWR_2D5V_EN 8 POK VOUT#3 2 PWR_2D5V_FB
PR5153 9 EN FB 1
VIN#9 GND
1
DY 0R0402-PAD-1-GP DY DY DY DY
1
1
PR5156 PR5151 PC5156 074.05934.003D PR5154 PC5152 PC5153 PC5154
29K4R2F-GP
SC68P50V2JN-1DLGP
SC22U6D3V5MX-2DLGP
SC10U6D3V3MX-DL-GP
1MR2J-1-GP 47KR2J-2-GP SCD1U25V2KX-1-DL-GP
R1
2
2
2
2
A A
1
2D5V_S3 PWR_2D5V
1 R5107 2 R2 PR5155
13K7R2F-GP
Vout=0.8V*(R1+R2)/R2 <Core Design>
0R0805-PAD
2
Wistron Corporation
Title
Title
Power (G5388_VDDQ_VTT_VPP)
Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bensolo AMD A00
Date:
Sheet 51 of 1
5 4 3 2 1
5 4 3 2 1
AOZ2262(10A) https://vinafix.com
AOZ2261(8A) AOZ2260(6A)
OFFPAGE-Signal OFFPAGE-GAP IC 074.02262.0043 074.02261.0A73 074.02260.0043
COM
68.1R01A.20B 68.1R01A.20B 68.1R01A.20B
Chock IDC : 10A IDC : 10A IDC : 10A
D 22uF/6.3V * 5pcs 22uF/6.3V * 4pcs 22uF/6.3V * 4pcs D

Output CAP DY*1 DY*1 DY*1
PH on EE Side
19V_DCBATOUT PW R_DCBATOUT_0D9V
PW R_0D9V_PG
[24] PW R_0D9V_PG
AOZ2260 For 0D9V

1 R5201 2
0R0805-PAD

0D9V_S5 PW R_0D9V
[8] VDDP_RUN_FB_APU
3D3V_S5
R5202
2 1
1
TDC : 3.5A
0R1206-PAD PR5208
100KR2J-1-GP
5V_S5
Cyntec. 6.5mm x 6.9mm x 3.0mm
IMAX : 5A
2
C DCR: 9m~10mOhm C
[54] PW R_1D8V_PG PW R_0D9V_PG Idc : 11 A , Isat : 22A
PL5201
1
PC5202 PU5201 PW R_0D9V
SC4D7U25V5KX-DL-GP
21 18 PW R_0D9V_PH 1 2
VCC LX#18
2
1
17
LX#17
1
PR5209 PW R_DCBATOUT_0D9V 16 COIL-1UH-34-GP-U1
LX#16 11 PC5204
0R0402-PAD-1-GP LX#11
1
2
7 10 SCD1U25V2KX-1-DL-GP PC5201 PC5203 PC5205 PC5207DY PC5206
IN LX#10
2
8 PR5210
IN
2
1
PC5208 PC5209 PC5210 9 20 PW R_0D9V_BT 10R2J-2-GP
DY IN BST
2
PR5201
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
5 PW R_0D9V_VFB
SCD1U25V2KX-1-DL-GP
95K3R2F-GP
FB
2
1
1 2 PW R_0D9V_TON 6
TON
PW R_0D9V_EN_R PW R_0D9V_PG 1
PGOOD AGND
4 for VDDP stardust PW R_0D9V_VFB_A
PW R_0D9V_EN_R 2 19 SC22U6D3V3MX-1-DL-GP
EN PGND 14 SC22U6D3V3MX-1-DL-GP
PW R_0D9V_PFM 3 PGND 13 SC22U6D3V3MX-1-DL-GP
PFM# PGND 12
DY
PGND
1
PW R_0D9V_SS 22 15 PC5212
SS PGND PR5202
R1 SC220P50V2KX-3DLGP
1
2K55R2F-GP
2
1
PC5214 PR5203 AOZ2260QI-10-GP
1
100KR2F-L3-GP
SC1KP50V2KX-1DLGP PC5213 074.02260.0043
2
SCD01U25V2KX-3DLGP
2
2
B B
1
PR5204
20KR2F-L-GP R2 Vo=0.8x(1+R1/R2)
=0.8x(1+2.55/20)
=0.90
Follow Starload 20180430
2
PR5207
VDDP_RUN_FB_APU 2 1PW R_0D9V_VFB_A
0R0402-PAD-1-GP
<Core Design>
A A
Wistron Corporation
Title
Title
POWER (AOZ2262Q_1D0V)
Size
Size DocumentNumber
Document Number Rev
Rev
A3 Bensolo AMD A00
Date: Sheet
Sheet 52 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A
Title
Reserved
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
OFFPAGE-Signal OFFPAGE-GAP https://vinafix.com
PH on EE Side
PWR_1D8V_PG
D [52] PWR_1D8V_PG D
20180430 follow starload

[17,45] 3V_5V_PWRGD
1D8V_S5 PWR_1D8V
1
PR5455
1 R5402 2
TDC=2A
0R0402-PAD-1-GP
0R0805-PAD
Imax= 3A
2
1 R5403 2
0R0805-PAD
PWR_1D8V_EN 3D3V_S5
Chilisin. 2.5mm×2.0mmX1.2mm
PG5401 DCR: 59m Ohm
GAP-CLOSE-PWR-3-GP PU5401 Idc : 3 A , Isat : 4A
1 2 PWR_1D8V
9
Need EE check PG5402 PGND PL5401
GAP-CLOSE-PWR-3-GP 4 5 IND-1UH-300-GP
1 2 PWR_1D8V_VIN 3 PGND NC#5 6 PWR_1D8V_PH 1 2
PWR_1D8V_PG 2 VIN LX 7 PWR_1D8V_EN
PG EN
1
1 8
FB SGND
1
3D3V_S5 PR5402 DY PC5401 PC5402
PC5409
1
100KR2F-L1-GP
SC22U6D3V5MX-2DLGP RT5797ALGQW-GP PC5412
2
1
PR5408
SC22P50V2JN-L-GP
2
2
C C
100KR2F-L1-GP PWR_1D8V_FB
SC22U6D3V5MX-2DLGP
1
SC22U6D3V5MX-2DLGP
2
PR5404
49K9R2F-L-GP
2
PWR_1D8V_EN
DY
1
PC5414
SC1U10V2KX-L1-GP
B B
RT9078-18GJ5 for 1D8V_AUX_S5

PR5453
3D3V_AUX_S5 1 2
PSL_OUT# 0R0402-PAD-1-GP
1
[24] PSL_OUT#
PC5452 2017/08/03 change 074.09078.003F
3D3V_AUX_KBC SC1U10V2KX-1DLGP from 074.01339.0D3F
PR5451
2
0R0402-PAD-1-GP PQ5451
1D8V_PWR PSL_OUT# 1 2 PQ5451_G G PU5451 1D8V_PWR
1D8V_AUX_S5
1 2 D 1D8V_AUX_EN 1 2 1D8V_PWR_VIN 1 5
2 VIN VOUT
PR5452 1D8V_AUX_EN GND
PG5451 S 3 4
1KR2J-L2-GP EN SNS/NC#4
GAP-CLOSE-PWR-3-GP
1
2N7002K-2-GP
1
PC5451 RT9078-18GJ5-GP PC5453
84.2N702.J31 SC1U10V2KX-1GP SC1U10V2KX-1DLGP
074.09078.003F
2
DY
2
A A
<Core Design>
Wistron Corporation
Title
Title
POWER (AOZ2260_1D8V)
Size
Size Document
Document Number
Number Rev
Rev
Custom Bensolo AMD A00
Date:
Sheet 54 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = LCD
[8] eDP_AUX_CPU_N
INVERTER POWER
Swap 20180725
20180716 follow Cinna13 3D3V_LCDVDD_S0
[8] eDP_AUX_CPU_P A00 add R5574 DY 20181220
https://vinafix.com
19V_DCBATOUT DCBATOUT_LCD_R DCBATOUT_LCD DCBATOUT_LCD 2017.10.20
SRN100J-3-GP 3D3V_S5 3D3V_S0
[8] eDP_TX_CPU_N0 800mA R5524 1 DY 2 0R2J-2-GP 2 3 LCD_BRIGHTNESS
Trace width = 80mil Change P/N
Connector list
[8] eDP_TX_CPU_P0 F5503 R5514 BLON_OUT 1 4 BLON_OUT_C
1 2 1 2
1
[8] eDP_TX_CPU_N1 RN5503
0R0603-PAD
Brightness LCD1
1
C5599 C5536 C5538
1
[8] eDP_TX_CPU_P1 POLYSW-1D1A24V-GP-U D5503 RN5504 R5574 R5563 43
C5515 eDP_BKLT_CTRL LCD_TST LCD_TST_C
1
1 1 4
SC4D7U6D3V3KX-DLGP
SC1U10V2KX-1DLGP
SCD1U16V2KX-3DLGP
69.50007.A31 47KR2J-L2-GP DY 47KR2J-L2-GP R5564 20180918
1
C5518 C5514 eDP_HPD_CPU 2 3 EDP_HPD_CONN 41
SC1KP50V2KX-1DLGP
Current Sense R C5535 1KR2F-L1-GP 4.7K->1K
2
SC2D2U25V3KX-1-GP
3
SC2D2U25V3KX-1-GP
SCD1U50V3KX-DL-GP
CH: P4+/-
2
SRN100J-3-GP 1
2
[16,17] DBC_PANEL_EN A00 Change 0 ohm to short pad 20181219 EC_BRIGHTNESS 1 R5508 2 EC_BRIGHTNESS_R 2 eDP_BKLT_CTRL
0R0402-PAD 2
BAT54C-12-GP 3
[24] LCD_TST LCD_TST 1 2 4
75.00054.A7D
D
R5504 DY 0R2J-2-GP 1 R5568 2 100KR2J-1-GP 1st = 84.2N702.J31 5
[24] BLON_OUT 2nd = 084.27002.0L31 6
BLON_OUT_C 1 2 7
EC (BIST MODE) BKLT_CTRL 1
R5569
R5570 2
100KR2J-1-GP
100KR2J-1-GP
3rd = 084.27002.0N31 EE note: Never change to short
DBC_PANEL_EN R5518 1
pad after MP
DBC_EN_R 2 100R2J-2-GP 8
D EVT1 20180129 4.7uF 0805-->2.2uF 0603 Q5503 9 D
[8] eDP_HPD_CPU 限高限制H=1 eDP_VARY_BL eDP_AUX_CPU_P 1 2 SCD1U16V2KX-3DLGP eDP_AUX_CON_P 10
2N7002K-2-GP C5531
eDP_AUX_CPU_N C5533 1 2 SCD1U16V2KX-3DLGP eDP_AUX_CON_N 11
1
12
S
R5562 eDP_TX_CPU_N1 C5534 1 2 SCD1U16V2KX-3DLGP eDP_TX_CON_N1 13
2K2R2J-L1-GP eDP_TX_CPU_P1 1 2 SCD1U16V2KX-3DLGP eDP_TX_CON_P1 14
LCDVDD 20180424 follow starloard R C5537
Q5503_C 15
3D3V_LCDVDD_S0 3D3V_LCDVDD_R eDP_TX_CPU_N0 C5508 1 2 SCD1U16V2KX-3DLGP eDP_TX_CON_N0 16
[17] CPU_I2C_SCL_TS_R
C
2
3D3V_S0 eDP_TX_CPU_P0 1 2 SCD1U16V2KX-3DLGP eDP_TX_CON_P0 17
[17] CPU_I2C_SDA_TS_R Layout Note: Q5501_B B Q5501 LCD C5532
18
LMBT3904LT1G-GP EC5504 EDP_HPD_CONN 19
Trace width = 80mil LCD_TST_C
1 R5523 2 Hi:2.0V 1st = 84.T3904.H11 SC22P50V2JN-4GP 20
E
0R0805-PAD 2 1 LCD_BRIGHTNESS 21
Lo:0.8V 2nd = 84.03904.I11 BLON_OUT_C
1
3rd = 84.03904.T11 DY 22
R5507 1D8V_S0 23
[24] EC_BRIGHTNESS Current Sense R- LCDVDD Layout 80 mil 3D3V_S5 R5505
24
CH: P3-/+ 4K7R2J-2-GP DY DY 4K7R2J-2-GP A00 add R5574 DY 20181220 25
A00 Change 0 ohm to short pad 20181219 U5501 Q5502 3D3V_S5 3D3V_S0 26
[24] LCD_TST_EN
2
3D3V_CAMERA_S0 DMIC_CLK_EDP 27
1 5 eDP_BKLT_CTRL 3 4 eDP_VARY_BL DMIC_DATA_EDP 28
2 VOUT VIN D2 S2
29
MIC_GND
GND LCDVDD_EN Camera CCD_USB20_CON_N
1
3 4 C5505 2 5 R5567 30
[24] TOUCH_REPORT_SW FLG# EN/EN# G1 G2
CCD_USB20_CON_P 31
Vgs=1.1V R5575 R5566 4K7R2J-L-GP
1
1 6 32
SC4D7U6D3V3KX-DLGP
D5502 47KR2J-L2-GP DY 47KR2J-L2-GP
eDP_PWR_EN 1
S1 D1
33
RT9742CGJ5-GP
DY eDP_DIGON TOUCH_REPORT_SW 34
074.09742.0A9F
2
3 LCDVDD_EN PJT138KA-GP TP_RESET 35
TP_RS 36
[8] eDP_VARY_BL 075.00138.0A7C
LCD_TST_EN 2 eDP_PWR_EN eDP_PWR_EN Touch Panel CPU_I2C_SDA_TS
CPU_I2C_SCL_TS
37
1
20180419 follow Common part 38
[8] eDP_DIGON BAT54C-12-GP R5506 39
100KR2J-1-GP 40
75.00054.A7D 3D3V_TPAN_VDD
D
1st = 84.2N702.J31
2nd = 084.27002.0L31 42
2
3rd = 084.27002.0N31
44
Q5505
eDP_DIGON 2N7002K-2-GP STAR-CON40-8-GP
020.F0847.0040
S
R5571 R5565
10KR2F-2-GP 2K2R2J-L1-GP
Q5505_C
C
2
2
Q5504_B B Q5504
LMBT3904LT1G-GP Layout Note:
1st = 84.T3904.H11 Colse to LCD1.
E
2nd = 84.03904.I11
EC5505
CH1 1 TP_RESET
3rd = 84.03904.T11 A00 Change 0 ohm to short pad 20181220
1 R5531 2
PU/PD FOR AUX CHANNEL
SKL PDG (#543016):
CH2 2 TP_RS 0R0402-PAD Recommends having a pull-up resistor of 100 kΩ for AUXN
3 GND and a pull-down resistor of 100 kΩ for AUXP
8
between the AC capacitor and the connector,
GND
CH3 4 CPU_I2C_SDA_TS MIC_GND to assist source detection by the sink device.
C CH4 5 CPU_I2C_SCL_TS C
A00 add 33R for EMI 20181224 eDP_AUX_CON_P R5528 1 2 100KR2J-1-GP
CPU_I2C_SCL_TS_R 1 R5576 2 33R2J-L1-GP CPU_I2C_SCL_TS 6 9 TP_RS DY
NC NC
CPU_I2C_SDA_TS_R 1 R5577 2 33R2J-L1-GP CPU_I2C_SDA_TS 7 10 TP_RESET eDP_AUX_CON_N R5529 1 2 100KR2J-1-GP
NC NC DY 3D3V_S0
PUSB3F96-GP
075.PUSB3.0073
Main Func = CAMERA
[18] CCD_USB20_N
[18] CCD_USB20_P
CAMERA POWER
A00 remove R5533 R5534 20181225
3D3V_S0 3D3V_CAMERA_S0 X00 By EMI check 20180725
3D3V_S5 CCD_USB20_CON_N
[27] DMIC_DATA
[27] DMIC_CLK
68.00396.001 A00 Change 0 ohm to short pad 20181220
CCD_USB20_CON_P
Non MS F5504
COIL-90OHM-100MHZ-5-GP
DMIC_DATA R5502 1 2 0R0402-PAD DMIC_DATA_EDP
CCD_USB20_N 4 3 CCD_USB20_CON_N
R5572 1 2 3D3V_CAMERA_R 1 2 Codec DMIC_CLK R5503 1 2 33R2J-L1-GP DMIC_CLK_EDP
0R2J-2-GP CCD_USB20_P 1 2 CCD_USB20_CON_P
POLYSW-1D1A6V-9-GP-U
EC5503 C5539
1
1
EL5501 EC5502
69.48001.081
1
R5573 1 2 0R2J-2-GP
SC33P50V2JN-3DLGP
MS+ DY EC5501 ED5501

SC4D7U6D3V3KX-DLGP
SC10P50V2JN-4DLGP
SC10P50V2JN-4DLGP AZ5315-02F-GP
2
2
83.05315.0A0
3
Layout Note: Reduce the stubs.
B B
Layout Note:
Close to LCD1
A00 Change 10P for EMI 20181224
Main Func = Touch panel Touch Panel
TOUCH_PANEL_INTR# 1 R5537 2 TP_RS
0R0402-PAD
1
A00 Change 0 ohm to short pad 20181220 C5541

DYSC10P50V2JN-4DLGP
2
3D3V_TPAN_VDD
[17] TOUCH_PANEL_INTR#
TOUCH PANEL POWER

1
[17] TOUCH_PANEL_PD# D5504

PLT_RST1# K A
DY DY R5561
10KR2F-2-GP
RB551V30-GP
[17] PLT_RST1#
2
3D3V_TPAN_VDD
TOUCH_PANEL_PD# 1 R5538 2 TP_RESET
A Follow Rogue 0R0402-PAD A

1
A00 Change 0 ohm to short pad 20181220 C5540

DYSC10P50V2JN-4DLGP
3D3V_S0
2
20181002
F5505
1 2
3D3V_S0 Touch Panel PH internally.

POLYSW-1D1A6V-9-GP-U
1
R5551 1 2 10KR2J-3-GP TOUCH_PANEL_INTR# 69.48001.081 C5501 C5502 C5503

DY DY
SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
SC10U10V5KX-2GP
<Core Design>
2
R5553 1 DY 2 10KR2J-3-GP
Wistron Corporation
A00 remove R5554 R5555 Taipei Hsien 221, Taiwan, R.O.C.
TitleTitle
LCD&CAM&DMC&Touch
SizeSize Document
Document Number
Number Rev Rev
A1
Bensolo AMD A00
Date:Date: Friday, December 28, 2018 Sheet
Sheet 55 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
CRT
A2
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = HDMI

HDMI_DDI_TX_N3 C5714 1 2 SCD1U16V2KX-3DLGP HDMI_CLK#_R_C Change to 150 ohm by EMI 20180507
HDMI_DDI_TX_P3 C5709 1 2 SCD1U16V2KX-3DLGP HDMI_CLK_R_C HDMI_CLK_R_C
https://vinafix.com
HDMI_DDI_TX_P2 C5707 1 2 SCD1U16V2KX-3DLGP HDMI_DATA2_R_C HDMI CONN
1
HDMI_DDI_TX_N2 C5710 1 2 SCD1U16V2KX-3DLGP HDMI_DATA2#_R_C 5V_HDMI_S5
R5705 HDMI1
150R2F-4-L-GP
18 15 DDC_CLK_HDMI
+5V_POWER SCL 16 DDC_DATA_HDMI
[8] HDMI_DDI_TX_N0 C5713 SDA
1
HDMI_DDI_TX_N1 C5715 1 2 SCD1U16V2KX-3DLGP HDMI_DATA1#_R_C
[8] HDMI_DDI_TX_P0 HDMI_DDI_TX_P1 HDMI_DATA1_R_C HDMI_CLK#_R_C HDMI_DATA0_R_C
1 2 SCD1U16V2KX-3DLGP 7
SCD1U16V2KX-3DLGP
C5712
[8] HDMI_DDI_TX_N1 HDMI_DATA0#_R_C TMDS_DATA0+
D 9 13 D
[8] HDMI_DDI_TX_P1 TMDS_DATA0- CEC
2
HDMI_DDI_TX_P0 C5711 1 2 SCD1U16V2KX-3DLGP HDMI_DATA0_R_C HDMI_DATA1_R_C 4 17
[8] HDMI_DDI_TX_N2 HDMI_DDI_TX_N0 HDMI_DATA0#_R_C HDMI_DATA2#_R_C HDMI_DATA1#_R_C TMDS_DATA1+ DDC/CEC_GROUNG HPD_HDMI_CON
C5708 1 2 SCD1U16V2KX-3DLGP 6 19
[8] HDMI_DDI_TX_P2 HDMI_DATA2_R_C TMDS_DATA1- HOT_PLUG_DETECT
1
[8] HDMI_DDI_TX_N3 HDMI_DATA2#_R_C TMDS_DATA2+
3 14
[8] HDMI_DDI_TX_P3 TMDS_DATA2- RESERVED#14
1
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
R5702 8
TMDS_DATA0_SHIELD
1
150R2F-4-L-GP 5
3D3V_S0 2 TMDS_DATA1_SHIELD
R5717
R5718
R5720
R5732
R5706
R5707
R5713
R5714
TMDS_DATA2_SHIELD 20
Q5701 GND
2
11 21
[8] HDMI_DET_CPU HDMI_DATA2_R_C HDMI_CLK_R_C TMDS_CLOCK_SHIELD GND
G 10 22
TMDS_CLOCK+ GND
2
HDMI_CLK#_R_C 12 HDMI 23
D HDMI_PLL_GND HDMI_DATA0#_R_C TMDS_CLOCK- (A_Type) GND
R5719
1 2 S SKT-HDMI23-209-GP
[8,72] CPU_DP_HPD DY
1
100KR2J-1-GP R5708 R5703 022.10025.0411
2N7002K-2-GP
[8] HDMI_SCL_CPU DY 150R2F-4-L-GP
84.2N702.J31 0R2J-2-GP
[8] HDMI_SDA_CPU 2ND = 84.2N702.031
2
HDMI_DATA0_R_C
HDMI_DATA1_R_C
5V_S0 3D3V_S0
1
C R5704 84.03904.T11 Q5703 C
R5710
C
150R2F-4-L-GP MMBT3904-3-GP
3
B HDMI_HPD_B 1 2 HPD_HDMI_CON
D5702
1
Change symbol part number, LBAW 56LT1G-GP 150KR2F-L-GP
E
HDMI_DATA1#_R_C R5711
because origin symbol is DELL OBS part 83.00056.Y11 HDMI_DET_CPU1 R5712 2 HDMI_HPD_E 200KR2F-L-GP
1
0R0402-PAD
2
A00 Change 0 ohm to short pad 20181220 R5709
Swap 20180725
DDC_DATA_PH2
100KR2J-1-GP
DDC_CLK_PH1
3D3V_S0
2
Swap 20180725
4
3
3
4
RN5704 5V_S0 5V_S5 5V_HDMI_R_S5 5V_HDMI_S5
SRN4K7J-8-GP 3D3V_S0 RN5702 F5701
SRN2K2J-1-GP R5715 POLYSW -1D1A6V-9-GP-U
1 2 1 2
0R0603-PAD
1
2
2
1
Q5702 R5716 1 DY 2
HDMI_SCL_CPU S 0R3J-0-U-GP 69.48001.081
D DDC_CLK_HDMI
B 2nd = 69.50011.081 B
G
2N7002K-2-GP
84.2N702.J31
Vgs=2.5V Q5705
G
2N7002K-2-GP
HDMI_SDA_CPU 84.2N702.J31
DDC_DATA_HDMI
20180727 follow EMI Request:

Swap 20180814 Swap 20180725
ED5701 ED5702 ED5703
CH1 1 HDMI_DATA2_R_C CH1 1 HDMI_CLK#_R_C CH1 1 HPD_HDMI_CON
CH2 2 HDMI_DATA2#_R_C CH2 2 HDMI_CLK_R_C CH2 2 DDC_CLK_HDMI

3 GND 3 GND 3 GND
8 8 8
A <Core Design> A
GND GND GND
CH3 4 CH3 4 CH3 4
CH4 5 CH4 5 CH4 5 Wistron Corporation

6 9 6 9 6 9 Taipei Hsien 221, Taiwan, R.O.C.
7
NC DY NC
10 7
NC DY NC
10 Swap 20180814 7
NC DY NC
10
NC NC NC NC NC NC Title
Title
HDMI_DATA1_R_C HDMI_DATA0#_R_C DDC_DATA_HDMI
PUSB3F96-GP
2nd = 075.08809.0073
PUSB3F96-GP
2nd = 075.08809.0073
PUSB3F96-GP
2nd = 075.08809.0073 Size
HDMI
Document Number Rev
HDMI_DATA1#_R_C HDMI_DATA0_R_C Swap 20180725 Size Document Number Rev
075.PUSB3.0073 075.PUSB3.0073 075.PUSB3.0073 A3
Bensolo AMD A00
Date: Sheet
Sheet 57 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C
(Blanking) C
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = HDD SATA HDD Connector 0124 SWAP pin define
5V_S0
https://vinafix.com HDD1
14
FFS_INT2_Q 1 R6016 2 FFS_INT2_Q_R 12
11
80 mils 0R0402-PAD
A00 Change 0 ohm to short pad 20181220 5V_HDD_S0 10
9
1 HDD_DEVSLP_R 8
C6002
SC10U6D3V3MX-DL-GP
C6001
SCD1U16V2KX-3DLGP
E AFTE14P-GP AFTP6002 E
1
7
HDD_SATA_RX_RE_P 2 SCD01U50V2KX-1DLGP HDD_SATA_RX_CON_P
HDD DY DY HDD_SATA_RX_RE_N
C6003 1
C6004 1 2 SCD01U50V2KX-1DLGP HDD_SATA_RX_CON_N
6
5
2
4
HDD_SATA_TX_RE_N C6006 1 2 SCD01U50V2KX-1DLGP HDD_SATA_TX_CON_N 3
[3] HDD_SATA_TX_P
HDD_SATA_TX_RE_P C6005 1 2 SCD01U50V2KX-1DLGP HDD_SATA_TX_CON_P 2
[3] HDD_SATA_TX_N
[3] HDD_SATA_RX_P 1
[3] HDD_SATA_RX_N 13
STM-CON12-GP-U
[70] FFS_INT2_Q
020.K0190.0012
[24] SATA_HDD_EN
5V_HDD_S0 1
AFTP6001 AFTE14P-GP
5V_S5 5V_HDD_S0_R 5V_HDD_S0

5V_S0
D R6001 D
1 2
0R0805-PAD
[17,24,40,51] APU_SLP_S3#
[24] MODEL_ID
1 R6026 2 0R5J-5-GP
Non MS
1A S D
MS+ Q6007
1
C6016 C6017 C6018 FC6031
1
PJA3415-GP
SCD1U16V2KX-3DLGP
SC10P50V2JN-4DLGP
R6022
084.03415.0031
SCD1U16V2KX-3DLGP
MS 10KR2J-3-GP SCD1U16V2KX-3DLGP
2
MS MS
2
1 R6021
SATA_HDD_EN#2
3D3V_S0 3D3V_DRIVER 2 SATA_HDD_EN_R#
R6029
Non MS2 20KR2J-L2-GP
1 R6023 Q6008 MS
C6009 C6010 C6011 SATA_HDD_EN 1 2 SATA_HDD_EN_G G
3D3V_S5 0R3J-L1-GP
MS
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
C 0R2J-L-GP D C
1
R6030
1 2 S
MS+ MS
2017.10.25
2
0R3J-L1-GP 2N7002K-2-GP
Change Location
84.2N702.J31 Connector list v8
20180709 2ND = 84.2N702.031
3rd = 84.07002.I31
FROM PCH
HDD_SATA_TX_P SC220P50V2JN-3DLGP 1 2 C6012
HDD_SATA_TX_N SC220P50V2JN-3DLGP 1 2 C6013
20180912 HDD Re- driver Layout Note:

U6001 ED6001
Place near HDD1 CH1 1 HDD_SATA_TX_CON_P
10 15 HDD_SATA_TX_RE_P
20 VDD A_OUTP 14 HDD_SATA_TX_RE_N to CONN CH2 HDD_SATA_TX_CON_N
3D3V_DRIVER
VDD A_OUTN 20180912 3 GND
2
5 HDD_SATA_RX_C_P C6014 1 2 SC220P50V2JN-3DLGP HDD_SATA_RX_P FROM PCH 8

HDD_SATA_TX_C_P 1 B_OUTP 4 HDD_SATA_RX_C_N C6015 1 2 SC220P50V2JN-3DLGP HDD_SATA_RX_N GND
A_INP B_OUTN
1
B HDD_SATA_TX_C_N 2 3D3V_DRIVER CH3 4 HDD_SATA_RX_CON_N B

R6007 A_INN 8 HDD_DEW 2
HDD_SATA_RX_RE_P 11 B_DE 19 HDD_EQ1 3D3V_DRIVER CH4 5 HDD_SATA_RX_CON_P
DY 4K7R2J-2-GP
to CONN HDD_SATA_RX_RE_N 12 B_INP B_EQ1 13 HDD_EQ2
B_INN B_EQ2 DY
1
3D3V_DRIVER R6004 HDD_SATA_RX_CON_P 6 NC 9 HDD_SATA_TX_CON_N
NC
2
HDD_DEW 1 9 16 HDD_DEW HDD_SATA_RX_CON_N 7 10 HDD_SATA_TX_CON_P
10KR2J-3-GP
3D3V_DRIVER R6014 NC NC
HDD_DE1 17 A_DE DEW 7 HDD_EN 3D3V_S0 3D3V_S5
A_EQ1 EN DY DY 4K7R2J-2-GP
1
HDD_DE2 18 R6006 PUSB3F96-GP
A_EQ2 3
10KR2J-3-GP
3D3V_DRIVER
GND 075.PUSB3.0073
2
1
3D3V_DRIVER HDD_REXT6 21
REXT GND Non MS R6037 DY 2nd = 075.08809.0073
10KR2J-3-GP
R6009 3D3V_DRIVER R6034

R6028 4K7R2J-2-GP
DY 4K7R2J-2-GP DY DY
2
1
1
PS8527CTQFN20GTR2-A2-GP 1KR2F-L1-GP R6005
10KR2J-3-GP
R6010 R6015
071.08527.0A03
2
2
1
DY 4K7R2J-2-GP R6008 DY 4K7R2J-2-GP

10KR2J-3-GP
2nd = 71.75601.003
1
R6012
DY DY R6036 DY
2
2
1
4K7R2J-2-GP 10KR2F-L1-GP
R6027
20180719
DY R6035
2
100KR2F-L1-GP 4K7R2J-2-GP
DY 3D3V_S5
<Core Design>
2
1
2
1
R6011
1
A DY 4K7R2J-2-GP
R6013 R6033 R6031 5
VCC
U6002
A
1 APU_SLP_S3# Wistron Corporation A
1 APU_SLP_S3# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

4K7R2J-2-GP 10KR2F-L1-GP
DY 2
2
0R2J-L-GP 2 Taipei Hsien 221, Taiwan, R.O.C.

MS+ B
2
Title
2
R6032 HDD_EN 4 3 Title

MODEL_ID Y GND
1
DY 2
Size DocumentNumber
Number
SATA IF_HDD/ODD Rev
0R2J-L-GP SNLVC1G08DCKRG4-GP Size Document Rev
A3
73.01G08.DHG Bensolo AMD A00
Date:
Sheet 60 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = WLAN 3D3V_S5 3D3V_W LAN_R 3D3V_W LAN

3D3V_W LAN 3D3V_S5
R6143
1.1A R6140 1 2 0R3J-0-U-GP https://vinafix.com
1 2
3D3V_S0 DY 0R0603-PAD
1
PCIE C6110 C6106 C6109 R6148 1 2 0R3J-0-U-GP
Current Sense R
CH: P1+/-
Non MS
SCD1U25V2KX-1-DL-GP
[3] W LAN_PCIE_TX_N
2
SCD1U25V2KX-1-DL-GP
SC10U25V5KX-DL-GP
[3] W LAN_PCIE_TX_P
1A
SCD1U16V2KX-3DLGP
[3] W LAN_PCIE_RX_N S D
D [3] W LAN_PCIE_RX_P D
MS+ Q6101
1
C6103 C6104 C6101 FC6101
1
PJA3415-GP
SCD1U16V2KX-3DLGP
SC10P50V2JN-4DLGP
MS R6137 MS
084.03415.0031
PCIE_CLK 10KR2J-3-GP SCD1U16V2KX-3DLGP
2
MS
2
1 R6138
2
20180912 0603->0805 2 W LAN_EN_R#
[16] W LAN_CLK_CPU_N
[16] W LAN_CLK_CPU_P MS
WLAN_EN#
Q6102 20KR2J-L2-GP
[16] W LAN_CLKREQ_CPU_N R6136
AUX_EN_W OWL 1 2 3.3V_W LAN_EN G
3D3V_S5
MS
0R2J-L-GP D
2JIO3_PCIE_W AKE#_R
USB2.0 1
R6101
DY 10KR2J-3-GP
S
2017.10.25
2N7002K-2-GP
[38] BT_USB20_P Change Location
[38] BT_USB20_N 84.2N702.J31 Connector list v8
2ND = 84.2N702.031
3rd = 84.07002.I31
MS
Single end
Note:pin 76 and pin 77 need contact to GND
[17] BLUETOOTH_EN 3D3V_W LAN W LAN1
[17] W LAN_APU_RST
C 76 77 C
74 76 77 75
72 3_3VAUX GND 73
70 3_3VAUX RESERVED#73 71
[17,24] W AKE_L RESERVED#70 RESERVED#71
68 69
66 RESERVED#68 GND 67
[17,24,63,68,76,85] PLT_RST#
64 RESERVED#66 RESERVED#67/2ND_LANE_PERN1 65
20180619
62 GPIO0_NFC_RESET#/MGPIO7 RESERVED#65/2ND_LANE_PERP1 63
[24] W LAN_RST NFC_I2C_IRQ/MGPIO5 GND
60 61
58 NFC_I2C_SM_CLK RESERVED#61/2ND_LANE_PETN1 59 R6149 1 2 0R2J-2-GP AGPIO14
[18,70] AGPIO14 W IFI_RF_EN_R 56 NFC_I2C_SM_DATA RESERVED#59/2ND_LANE_PETP1 57
DY
BLUETOOTH_EN_R 54 W_DISABLE#1 GND 55 JIO3_PCIE_W AKE#_R R6105
1 2 0R2J-2-GP W AKE_L
PLT_RST#_W LAN 52 RESERVED#54/W_DISABLE#2 3.3V PEWAKE0# 53 W LAN_CLKREQ_CPU_N DY
50 PERST0# CLKREQ0# 51
48 SUSCLK_32KHZ GND 49 W LAN_CLK_CPU_N
COEX1 REFCLKN0 W LAN_CLK_CPU_P
Power EN 3D3V_W LAN
46
44 COEX2
COEX3
REFCLKP0
GND
47
45
42 43 W LAN_PCIE_RX_N
40 CLINK_CLK PERN0 41 W LAN_PCIE_RX_P
[24] AUX_EN_W OWL CLINK_DATA PERP0
1
38 39
R6126 36 CLINK_RESET GND 37 W LAN_PCIE_TX_N
10KR2J-3-GP 34 UART_CTS PETN0 35 W LAN_PCIE_TX_P
32 UART_RTS PETP0 33
UART_TX GND
2
R6127 1 2 0R2J-2-GP PLT_RST#_W LAN

DY 22 23
20 UART_RX SDIO_RESET 21
18 UART_WAKE SDIO_WAKE 19
16 GND SDIO_DAT3 17
D6105
B PLT_RST# K A 14 LED#2 SDIO_DAT2 15 B
12 PCM_OUT SDIO_DAT1 13
10 PCM_IN SDIO_DAT0 11
RB551V30-GP
8 PCM_SYNC SDIO_CMD 9
D6106
W LAN_RST K A 6 PCM_CLK SDIO_CLK 7
4 LED#1 GND 5 BT_USB20_CON_N
RB551V30-GP
MS+ 2 3_3VAUX USB_D- 3 BT_USB20_CON_P
3_3VAUX NGFF_KEY_E_75P USB_D+
GND
1 X00 By EMI check 20180612
D6102 RB520S30-GP NP2 NP1 R6111
W LAN_APU_RST K NP2 NP1 BT_USB20_CON_P BT_USB20_P
DY A 1 2
0R0402-PAD
SKT-MINI67P-52-GP
83.R2003.A8M
2ND = 083.52030.008F 062.10003.0F91
A00 remove EL6101 20181225
AFTE14P-GP AFTP6101 1 3D3V_W LAN
AFTE14P-GP AFTP6105 1 W LAN_CLKREQ_CPU_N
AFTE14P-GP AFTP6106 1 W IFI_RF_EN_R
AFTE14P-GP AFTP6107 1 BLUETOOTH_EN_R
AFTE14P-GP AFTP6108 1 PLT_RST#
3D3V_W LAN
3D3V_W LAN
1 W AKE_L
AFTE14P-GP AFTP6608
R6110
1
BT_USB20_CON_N 1 2 BT_USB20_N
1
R6142 0R0402-PAD
DY R6102
10KR2J-3-GP R6113 10KR2J-3-GP
A
2 1
DY <Core Design>
A00 Change 0 ohm to short pad 20181220 A
DY
2
2
W IFI_RF_EN_R 0R2J-L-GP
BLUETOOTH_EN BLUETOOTH_EN_R Wistron Corporation
D6101 RB520S30-GP Taipei Hsien 221, Taiwan, R.O.C.
K DY A Title
Title
83.R2003.A8M NGFF_WLAN CONN
2ND = 083.52030.008F Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date: Sheet
Sheet 61 of 106
5 4 3 2 1
A B C D E
https://vinafix.com
4 4
3
(Blanking) 3
2 2
<Core Design>
1
Wistron Corporation 1
Title
Reserved
A4
Bensolo AMD A00
A B C D E
5 4 3 2 1
SSD = M.2 3D3V_S5 3D3V_S0

3D3V_SSD_R 3D3V_SSD
8
ED6301
3
1 R6325 2 0R0805-PAD 1
R6321
2 SSD_PCIE_RX_N0 1
DY 10 SSD_PCIE_RX_N0
0R0805-PAD
https://vinafix.com
SSD_PCIE_RX_P0 2 9 SSD_PCIE_RX_P0
[3] SSD_PCIE_RX_N0
[3] SSD_PCIE_RX_P0 1 R6324 2 0R0805-PAD R6331
1 2 SSD_PCIE_TX_N0 4 7 SSD_PCIE_TX_N0
[3] SSD_PCIE_TX_N0
[3] SSD_PCIE_TX_P0 0R0805-PAD SSD_PCIE_TX_P0 5 6 SSD_PCIE_TX_P0
[3] SSD_PCIE_RX_N1 2.5A S D
[3] SSD_PCIE_RX_P1 DY Current Sense R-
D
[3] SSD_PCIE_TX_N1 CH: P2+/- AZ1043-04F-R7G-GP D
[3] SSD_PCIE_TX_P1 Q6306
1
C6377 FC6331
DY C6375 C6376 075.01043.0073
1
PJA3415-GP
SCD1U16V2KX-3DLGP
SC10P50V2JN-4DLGP
[3] SSD_PCIE_RX_N2 R6318
DY SCD1U16V2KX-3DLGP
084.03415.0031
2nd = 075.08809.0073
SCD1U16V2KX-3DLGP
[3] SSD_PCIE_RX_P2 DY 10KR2J-3-GP
2
[3] SSD_PCIE_TX_N2
2
[3] SSD_PCIE_TX_P2 ED6302
1 R6317
PCIE_SSD_EN# 2
2 PCIE_SSD_EN_R# 8
3
DY
20KR2J-L2-GP SSD_PCIE_RX_N1 1
[3] SSD_PCIE_RX_N3
[3] SSD_PCIE_RX_P3 R6320 Q6307
PCIE_SSD_EN 1 2 3.3V_PCIE_SSD_EN G SSD_PCIE_RX_P1 2 9 SSD_PCIE_RX_P1
[3] SSD_PCIE_TX_N3 DY
[3] SSD_PCIE_TX_P3 0R2J-L-GP D SSD_PCIE_TX_N1 4 7 SSD_PCIE_TX_N1
S
DY SSD_PCIE_TX_P1 5 6 SSD_PCIE_TX_P1
2017.10.25
2N7002K-2-GP
[16] SSD_CLK_CPU_N Change Location
[16] SSD_CLK_CPU_P 84.2N702.J31 Connector list v8
2ND = 84.2N702.031 AZ1043-04F-R7G-GP
[16] SSD_CLKREQ_CPU_N 3rd = 84.07002.I31 075.01043.0073
2nd = 075.08809.0073
[17,24,61,68,76,85] PLT_RST# 3D3V_SSD
ED6304
8
[64] SSD_LED#
SSD1
SSD M.2 CONN SSD_PCIE_RX_N3
3
1
[17] PCIE_SSD_EN
SSD_PCIE_RX_P3 2 9 SSD_PCIE_RX_P3
100 mils trace width 1
NGFF_KEY_M 75P
C
2.5A 2 GND 3 SSD_PCIE_TX_N3 4 7 SSD_PCIE_TX_N3
C
4 3_3VAUX GND 5 SSD_PCIE_RX_N3

6 3_3VAUX D_PETP3/H_PERN3 7 SSD_PCIE_RX_P3 SSD_PCIE_TX_P3 5 6 SSD_PCIE_TX_P3
8 NC#6 D_PETN3/H_PERP3 9
[17] PCIE_SSD_RST NC#8 GND
1
1
C6373 C6374 SSD_LED# 10 11 SSD_PCIE_TX_N3
C6370 C6371 C6372 C6317 C6318 DAS/DSS# D_PERN3/H_PETN3 SSD_PCIE_TX_P3
12 13
3_3VAUX D_PERP3/H_PETP3
SC33P50V2JN-3DLGP
SC33P50V2JN-3DLGP
14 15 AZ1043-04F-R7G-GP
SCD047U25V2KX-4-GP
SCD047U25V2KX-4-GP
SCD1U16V2KX-3DLGP
3_3VAUX GND
2
2
16 17 SSD_PCIE_RX_N2
18 3_3VAUX D_PETP2/H_PERN2 19 SSD_PCIE_RX_P2
075.01043.0073
20 3_3VAUX D_PETN2/H_PERP2 21
2nd = 075.08809.0073
22 NC#20 GND 23 SSD_PCIE_TX_N2 ED6303
24 NC#22 D_PERN2/H_PETN2 25 SSD_PCIE_TX_P2 8
26 NC#24 D_PERP2/H_PETP2 27 3
28 NC#26 GND 29 SSD_PCIE_RX_N1 SSD_PCIE_RX_N2 1
30 NC#28 D_PETN1/H_PERN1 31 SSD_PCIE_RX_P1
32 NC#30 D_PETP1/H_PERP1 33 SSD_PCIE_RX_P2 2 9 SSD_PCIE_RX_P2
34 NC#32 GND 35 SSD_PCIE_TX_N1
36 NC#34 D_PERN1/H_PETN1 37 SSD_PCIE_TX_P1 SSD_PCIE_TX_N2 4 7 SSD_PCIE_TX_N2
38 NC#36 D_PERP1/H_PETP1 39
40 DEVSLP GND 41 SSD_PCIE_RX_N0 SSD_PCIE_TX_P2 5 6 SSD_PCIE_TX_P2
42 NC#40 D_PETN0/SATA_B+/H_PERN0 43 SSD_PCIE_RX_P0
44 NC#42 D_PETP0/SATA_B-/H_PERP0 45
46 NC#44 GND 47 SSD_PCIE_TX_N0
48 NC#46 D_PERN0/SATA_A-/H_PETN0 49 SSD_PCIE_TX_P0 AZ1043-04F-R7G-GP
PLT_RST#_SSD_D 50 NC#48 D_PERP0/SATA_A+/H_PETP0 51
SSD_CLKREQ_CPU_N 1 R6302 2 SSD_CLKREQ_CON_N 52 PERST#/NC#50 GND 53 SSD_CLK_CPU_N
075.01043.0073
0R0402-PAD 54 CLKREQ#/NC#52 REFCLKN 55 SSD_CLK_CPU_P
2nd = 075.08809.0073
56 PEWAKE#/NC#54 REFCLKP 57
B 58 NC#56 GND 67 B
68 NC#58 NC#67 69 PEDET_PCIE 1 AFTP6305 AFTE14P-GP
SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA)
2
70 71
ED6306 72 3_3VAUX GND 73
74 3_3VAUX GND 75 1 AFTP6301 AFTE14P-GP
AZ5125-02S-R7G-GP 3_3VAUX GND 3D3V_SSD
76 77
NP2 76 77 NP1 PLT_RST#_SSD_D 1 AFTP6303 AFTE14P-GP
75.05125.07D NP2 NP1 SSD_CLKREQ_CON_N 1 AFTP6304 AFTE14P-GP
DY SKT-MINI67P-1-GP-U 62.10043.J01
3
3D3V_SSD
2018/11/02 DVT2
R6329 1 DY 2 10KR2J-3-GP
1
R6322
10KR2J-3-GP
D6302 DY
power supply 3.3V K A RB551V30-GP
DY
2
50mA / 0.165W SAMSUNG R6323 1 2 0R2J-2-GP PLT_RST#_SSD_D
Active Power 45mA/0.15mW Intel DY
R6328 U6301
43mA / 142mW SAMSUNG PLT_RST# 1 2 PLT_RST#_R 1 5
Idle Power 22mA/75mW Intel 0R0402-PAD A VCC
A
PCIE_SSD_RST <Core Design> A
1 R6327 2PCIE_SSD_RST_R 2
B
0R0402-PAD 3
GND Y
4
Wistron Corporation
1
SNLVC1G08DCKRG4-GP Taipei Hsien 221, Taiwan, R.O.C.

R6326 73.01G08.DHG
10KR2J-L-GP Title
Title
INT IO (SSD M.2)
2
R6330 1 2 0R2J-2-GP Size

Size DocumentNumber
Document Number Rev
Rev
DY A3
Bensolo AMD A00
Date: Sheet
Sheet 63 of 106
5 4 3 2 1
5 4 3 2 1
Layout note:
Main Func = Power BTN 0.1u->1KP By EMI check 20180808
Low actived from KBC GPIO

Power button G6401 place to buttom
G6402 place to top
For EMI Reserved RN6401
https://vinafix.com
LID_CL_SIO# 2 3 LID_CLOSE#_C
LID_CLOSE#_C EC6401 1 2 SC1KP50V2KX-L-1-GP KBC_PW RBTN# 1 4 KBC_PW RBTN#_C
[24] LID_CL_SIO#
DY 3D3V_S5
[24] KBC_PW RBTN# SRN100J-3-GP
swap 20180808
G6401
GAP-OPEN
G6402
GAP-OPEN
ED6402 ED6401
1
SC1KP50V2KX-1DLGP
EC6403
C6401
SCD1U16V2KX-3DLGP
1
[66] LID_CLOSE#_C
AZ5123-01F-R7G-GP-U
AZ5123-01F-R7G-GP-U
D D
DY
1
[66] KBC_PW RBTN#_C
DY
2
2
2
2
2
Main Func = Battery LED Low actived from KBC GPIO Q6403
5V_S5
Battery LED1 (AMBER_LED)
E
R2
R6405
CHG_AMBER_LED# CHG_AMBER_LED_R# R6407
1 2 B Follow Bucky 20180816
0R0402-PAD
R1
C AMBER_LED_BAT 1 2 BAT_AMBER
[24] CHG_AMBER_LED# RN2418-GP 499R2F-2-GP

EC6402
1
084.02418.0011
SC1KP50V2KX-1DLGP DY
LED1
2
1 + Yellow
- 3
C
0.1u->1KP By EMI 20180808 2 + White
C
5V_S5
Q6404
E LED-YW -5-GP
R2
R6404
BATT_W HITE_LED# 1 2 BATT_W HITE_LED_R# B R6406
0R0402-PAD
R1
C W HITE_LED_BAT 1 2 BAT_W HITE 083.1212A.0070
[24] BATT_W HITE_LED# 549R2F-GP
Low actived from KBC GPIO RN2418-GP EC6404
1
084.02418.0011
SC1KP50V2KX-1DLGP DY Battery LED2(WHITE_LED)
2
0.1u->1KP By EMI 20180808
B B
Main Func = HDD LED SATA HDD LED 3D3V_S0

LOW actived from PCH GPIO
1
3D3V_S0 R6408 R6401

1 DY 2 HWHDLED10KR2J-3-GP
[17] SATA_ACT#
0R2J-2-GP
[24,64] SATA_LED#
2
1
R6402 Q6401
A 10KR2J-3-GP <Core Design> A
[24,64] SATA_LED# SATA_LED# G
DY
D6401
SATA_ACT# 1 D BATT_W HITE_LED_R#
HWHDLED Wistron Corporation
2
[63] SSD_LED#
3 SATA_LED#_D S 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
HWHDLED Taipei Hsien 221, Taiwan, R.O.C.
SSD_LED# PJA138KA-GP
2
20180510 75.BAT54.07D 084.00138.0A31 Title
Title
BAT54A-11-GP
LED Board&Power Button
Add SSD LED function_20170920 Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date: Sheet
Sheet 64 of 106
5 4 3 2 1
5 4 3 2 1
Main Func = KB
Internal Keyboard Connector
20180402 KB1
Keyboard Backlight (Reserved) https://vinafix.com

31
[24] CAP_LED#_D
5V_S0 +5V_KB_BL 1
CAP_LED
69.48001.081 2
F6502 3
1 2 1 CAP_LED 4
KBBL AFTP6532 1 KSO10 5
AFTP6503
1
[24] KSI[0..7] POLYSW-1D1A6V-9-GP-U 1 KSO11 6
AFTP6506 1 KSO9 7
KBBL C6501
AFTP6516 1 KSO14 8
SCD1U16V2KX-3DLGP AFTP6539
2
[24] KSO[0..16] 1 KSO13 9
AFTP6535 1 KSO15 10
AFTP6515 1 KSO16 11
D D
KB_BL1 AFTP6508 1 KSO12 12
[16] KB_DET# 5 AFTP6538 1 KSO0 13
1 AFTP6520 1 KSO2 14
AFTP6510 1 KSO1 15
R6503
[17] KB_LED_BL_DET KB_LED_BL_DET 1 KB_LED_DET_C AFTP6517
KBBL 2 2
3
KBBL AFTP6518
1
1
KSO3
KSO8
16
17
AFTP6505
1
51KR2J-1-GP KB_BL_CTRL# 4 1 KSO6 18
AFTP6512
1
6 1 KSO7 19
[24] KB_LED_PWM KBBL
R6507 DY C6502 CAP LED Control AFTP6534
AFTP6522
1 KSO4 20
100KR2J-1-GP 1 21
SCD1U16V2KX-3GP
KSO5
ACES-CON4-90-GP-U
LOW actived from KBC GPIO AFTP6536
2
020.K0298.0004 1 KSI0 22
AFTP6507
2
1 5V_S0 1 KSI3 23
Q6502 AFTP6502 1 KSI1 24
R2
E AFTP6540 1 KSI5 25
AFTP6565 R6508
CAP_LED#_D 1 2 CAP_LED#_R B AFTP6513 1 KSI2 26
R6506
AFTP6533
D
0R0402-PAD
R1
C CAP_LED_Q 1 2 CAP_LED 1 KSI4 27
AFTP6521 1 28
KB Backlight Power Consumption: 285mA max. Q6501 A00 Change 0 ohm to short pad 20181220 AFTP6511
KSI6
PJA3402-R1-00001-GP 1KR2J-1-GP 1 KSI7 29
KB_LED_PWM G RN2418-GP AFTP6523 1 KB_DET# 30
AFTP6519
084.03402.0031 084.02418.0011
1
1 32
AFTP6537
1
+5V_KB_BL 1
DY R6505
100KR2J-1-GP
KBBL EC6505
DY
SC10P50V2JN-4DLGP
AFTP6605 ACES-CON30-28-GP
2
020.K0236.0030
2
KB_LED_BL_DET 1
AFTP6606
2017.10.20
Change P/N
KB_BL_CTRL# 1 Connector list
AFTP6607 X00 By EMI check 20180612
C Main Func = TPAD 3D3V_S0 3D3V_TP_VDD

Follow RR C
3D3V_S5
3D3V_S5 3D3V_TP_VDD
3D3V_TP_VDD 3D3V_TP_VDD
R6517
R6509
1
1 2 TP_LOCK# 1 2
R6521
TP_WAKE 0R2J-2-GP 0R3J-0-U-GP
1
1
100KR2J-1-GP
NON TP_WAKE R6511 R6515
10KR2J-3-GP Q6506 10KR2J-3-GP
2
3D3V_TP_S5_R
G
[24] TP_ON#
2
2
TP_WAKE D TP_WAKE_CPU#
[24] TP_WAKE_KBC# TP_WAKE_KBC# S

S D
[24] TP_LOCK# Notice:ZZ.2N702.J3101
TP_WAKE 2N7002K-2-GP
1
C6503 Q6504 84.2N702.J31

[24] CLK_TP_SIO 3D3V_TP_VDD
G
SCD1U16V2KX-3DLGP PJA3415-GP
[24] DAT_TP_SIO
2
1KR2J-1-GP 084.03415.0031 R6523

R6516 1 2
DY
1
TP_ON# 1 2 TP_ON#_GATE
R6522 0R2J-2-GP
TP_WAKE TP_WAKE 100R3J-4-GP
[17,66] CPU_I2C_SCL_P3 Q6505
[17,66] CPU_I2C_SDA_P3
TP_ON#_GATE G Need to check if it is Active High or Active Low
and check if there is PH on TPAD side.
2
D Q6205_Q
TP_WAKE
S
TP_VDD Discharge Circuit
[17] TP_WAKE_CPU# 2N7002K-2-GP Precision Touch Pad Connector
84.2N702.J31
2ND = 84.2N702.031 修改PIN DEFINE
3rd = 84.07002.I31 3D3V_TP_VDD
AFTP6531
C6504
2 1
Follow RR
1
3D3V_TP_VDD
3D3V_TP_VDD
SCD1U16V2KX-3DLGP 020.K0255.0008
B 2NON 1
TP_WAKE B
PTWO-CON8-16-GP
R6513 10
4K7R2J-2-GP 8
A00 Change 0 ohm to short pad 20181220 CPU_I2C_SDA_TP 7
2
1
3D3V_TP_VDD CPU_I2C_SCL_TP 6
RN6504
1
3D3V_S5 5
SRN10KJ-5-GP TP_WAKE_KBC# 4
Support PTP
R6512
0R0402-PAD TP_LOCK# 3
RN6503 TPDATA_C 2
SRN33J-5-GP-U
3
4
1
2
CLK_TP_SIO 1 4 TPCLK_C TPCLK_C 1
PS2
1
2
DAT_TP_SIO 2 3 TPDATA_C RN6505 9

RN6502 SRN2K2J-1-GP
TPAD1
SRN2K2J-1-GP
Q6204_G TP_WAKE
Need to check with SW. TP_WAKE
4
3
Q6503
4
3
CPU_I2C_SCL_P3 6 1 CPU_I2C_SCL_TP
Note:ZZ.27002.F7C01
EC6503
EC6501
1
5 2 75.27002.F7C
DY DY I2C CPU_I2C_SDA_P3 TP_WAKE4 3
2nd = 075.67002.007C
2
2N7002KDW-1-GP 3D3V_TP_VDD 1 AFTP6529

APU CPU_I2C_SDA_TP
TPCLK_C 1 AFTP6530
TPDATA_C 1 AFTP6524
SC33P50V2JN-3GP
1
EC6504 EC6502 CPU_I2C_SCL_TP 1 AFTP6528

SC33P50V2JN-3GP
DY DY device CPU_I2C_SDA_TP 1 AFTP6527
SC33P50V2JN-3DLGP
SC33P50V2JN-3DLGP
TP_WAKE_KBC# 1 AFTP6525
2
TP_LOCK# 1 AFTP6526
A A
<Core Design>
Wistron Corporation
Title
Title
Key Board&Touch Pad
Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bensolo AMD A00
Date: Sheet
Sheet 65 of 106
5 4 3 2 1
5 4 3 2 1
I/O Board Connector

IOBD1
Main Func = IO Connector Pitch: 1mm 43
Power:6 pins https://vinafix.com
41
USB2.0 FP_USB20_CON_P
GND: 5 pins FPR_SCAN# 1
FP_USB20_P R6664 1 2 FP_USB20_CON_P FP_USB20_CON_N SENSOR_I2C_SCL_2G 2

[38] USB3_USB20_N SENSOR_I2C_SDA_2G
0R0402-PAD 3
[38] USB3_USB20_P GSEN2_INT1 4
A00 remove EL6602 20181225 GSEN2_INT2 5
1
PM_LAN_ENABLE_R 6
D
Card Reder ED6601
AZ5315-02F-GP
LANW AKE#_IC
LAN_CLKREQ_CPU_N
7
8 D
KBC_PW RBTN#_C 9
83.05315.0A0 PLT_RST#_LAN 10
[38] CARD1_USB20_N
LID_CLOSE#_C 11
3
FP_USB20_N R6663 1 2 FP_USB20_CON_N APU_SLP_S5# 12
[38] CARD1_USB20_P
0R0402-PAD 13
Layout Note: FP_USB20_CON_P 14
FP
Close to IOBD1 Wire FP FP_USB20_CON_N 15
16
CARD1_USB20_CON_P CARD1_USB20_CON_P 17
[18] FP_USB20_N
Card Reader CARD1_USB20_CON_N 18
[18] FP_USB20_P CARD1_USB20_CON_N 19
USB3_USB20_CON_P 20
USB2.0 port 3 USB3_USB20_CON_N 21
[24] FPR_SCAN#
KBC 22
1
23
ED6603
2017.10.25 24
A00 remove R6665 R6666 20181225 Modify netname
CARD1_USB20_P CARD1_USB20_CON_P AZ5315-02F-GP 5V_USB2_S0 25
follow STD 26
[24] KB_CLOSE#_2
EL6603 83.05315.0A0 27
28
1 2
FP /Card Reder power 3D3V_S5
3
29
4 3 3D3V_S0 30
31
Free Fall Sensor DLM0NSN900HY2D-GP Layout Note: 32
[17,66,69,70] SENSOR_I2C_SCL Close to IOBD1 33
[17,66,69,70] SENSOR_I2C_SDA 068.09002.2001 LAN_CLK_CPU_P 34
[70] SENSOR_I2C_SCL_2G
CARD1_USB20_N CARD1_USB20_CON_N
X00 By EMI check 20180725 Coaxial LAN_CLK_CPU_N 35
LAN_PCIE_TX_P 36
C
X00 By EMI check 20180612 LAN_PCIE_TX_N 37 C
[70] SENSOR_I2C_SDA_2G USB3_USB20_CON_N 38
LAN_PCIE_RX_P 39
[17,69] GSEN_INT1 USB3_USB20_CON_P LAN_PCIE_RX_N 40
[69] GSEN_INT2 42
[70] GSEN2_INT1 44
1
[70] GSEN2_INT2 ED6602 STAR-CON40-8-GP
A00 remove R6667 R6668 20181225 AZ5315-02F-GP
USB3_USB20_P USB3_USB20_CON_P 83.05315.0A0 Sensor Board Connector 020.F0847.0040
3
EL6604 20181002
1 2 F6601
[17,66,69,70] SENSOR_I2C_SDA 3D3V_S5 1 2
4 3 SBD1
[17,66,69,70] SENSOR_I2C_SCL
Layout Note:
Bensolo
12
DLM0NSN900HY2D-GP Close to IOBD1 POLYSW -1D1A6V-9-GP-U SBD1_3D3V 10
[69] GYRO_INT 068.09002.2001 69.48001.081 9
8
USB3_USB20_N USB3_USB20_CON_N SENSOR_I2C_SDA 7
[69] GYRO_DRDY SENSOR_I2C_SCL 6
R6601 5 Bensolo
[64] LID_CLOSE#_C
KB_CLOSE#_2 1
Bensolo2 PM_LAN_ENABLE_R
GSEN_INT1 4
GSEN_INT2 3
[64] KBC_PW RBTN#_C GYRO_INT 2
0R2J-L-GP
B B
GYRO_DRDY 1
R6602 11
[17,24,51] APU_SLP_S5# PM_LAN_ENABLE 1 2
Bucky ACES-CON10-48-GP
0R2J-L-GP 20.F2191.010
[17,65] CPU_I2C_SDA_P3
[17,65] CPU_I2C_SCL_P3 2018/11/06 DVT2 A00 Change DY 20181221
CN1
3D3V_WLAN input IN1+ R6605 1 2 0R1J-GP E3_W LAN_P 1 2 E3_LCD_P R6615 1 2 0R1J-GP
3D3V_W LAN_R DY DY DCBATOUT_LCD_RIN4+ LCD BACKLIGHT
LAN IN1- 3D3V_W LAN
R6606 1
DY 2 0R1J-GP E3_W LAN_N 3
DY 4 E3_LCD_N R6611 1
DY 2 0R1J-GP DCBATOUT_LCD
IN4-
3D3V_LCDVDD_R IN3+
3D3V_SSD input R6614 1 2 0R1J-GP E3_SSD_P 5 6 E3_LCDVDD_P R6662 1 2 0R1J-GP Panel logic power
IN2+ 3D3V_SSD_R
R6613 1 DY 2 0R1J-GP E3_SSD_N 7 8 E3_LCDVDD_N R6612 1 DY 2 0R1J-GP
[3] LAN_PCIE_RX_N IN2- 3D3V_SSD DY DY 3D3V_LCDVDD_S0 IN3-
CPU_I2C_SCL_P3 9 10 CPU_I2C_SDA_P3
[3] LAN_PCIE_RX_P
[3] LAN_PCIE_TX_N 11 12 3D3V_S5
R6609 1 2 E3_VDDQ_N 13 14 E3_VCOREA_N R6618 1 2
[3] LAN_PCIE_TX_P
VDDQ input
IN7- PW R_DCBATOUT_VDDQ
R6610 DY 0R1J-GP
E3_VDDQ_P E3_VCOREA_P R6619 DY 0R1J-GP PW R_DCBATOUT_VCCCOREIN6- 1V_CPU_CORE input
IN7+ 1 2 15 16 1 2
[16] LAN_CLK_CPU_N
19V_DCBATOUT
R6607 1 DY 2
0R1J-GP
E3_VDDNB_N 17 18 E3_DCBATOUT_N R6616 1 DY 2
0R1J-GP 19V_DCBATOUT IN6+
1D2V_CPU_SOC Input IN8- PW R_DCBATOUT_VDDNB
R6608 1 DY 2
0R1J-GP
E3_VDDNB_P 19 20 E3_DCBATOUT_P R6617 1 DY 2
0R1J-GP DCBATOUT_R
IN5-
[16] LAN_CLK_CPU_P IN8+ 19V_DCBATOUT DY 0R1J-GP
DY 0R1J-GP PW R_CHG_VBATIN
IN5+ System power source
HRS-CONN20A-2-GP
[16] LAN_CLKREQ_CPU_N
20.F1450.020
Wistron Confidential document, Anyone can not
[24] LANW AKE#_IC Duplicate, Modify, Forward or any other purpose
A <Core Design> application without get Wistron permission A
[24] PLT_RST#_LAN
Wistron Corporation
[24] PM_LAN_ENABLE Title

Title
IO Board Connector
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date: Sheet
Sheet 66 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
SSID = DEBUG PORT Swap 20180814

Layout Note: https://vinafix.com
Place near trace separated point. Debug Connector
RN6801 20180525 change to conn
SRN0J-6-GP 3D3V_S0
DB1
LPC_AD_CPU_P0 1 4
12
D
LPC_AD_CPU_P1 2 LPC 3 D
10
LPC_AD_CPU_P0_DEBUG 9
[16,24] LPC_AD_CPU_P2 RN6803 LPC_AD_CPU_P1_DEBUG 8
LPC_AD_CPU_P2 1 4 LPC_AD_CPU_P2_DEBUG 7
LPC_AD_CPU_P3 2 3 LPC_AD_CPU_P3_DEBUG 6
LPC LPC_FRAME#_DEBUG 5
[16,24] LPC_FRAME#_CPU PLT_RST#_DEBUG 4
[16,24] LPC_RST# SRN0J-6-GP 3
DY
[17,24,61,63,76,85] PLT_RST# LPC_FRAME#_CPU R6801 1 LPC_CLK_DBG
LPC_RST# R6802 1
LPC 22 0R2J-2-GP 2
[16] LPC_CLK_DBG LPC 2 0R2J-2-GP EC6801
1
PLT_RST# R6803 1 0R2J-2-GP 1
DY
SC8P50V2DN-1DL-GP
DY 11
[8] APU_TCK
2
[8] APU_TMS
[8] APU_TDI ACES-CON10-14-GP
[8] APU_TDO
[8,46] SVID_PWRGD
[8] RST#_CPU
[9] APU_DBRDY 20.F1180.010
C C
[8] APU_DBREQ#
[9] APU_PLLTEST0
[9] APU_PLLTEST1 RF request 2017/11/08 modify
[8] APU_TRST# 20.D0075.110: Dummy Pad with solder mask is ZZ.00PAD.Y41
DB1 Optional: New one smaller LPC connector is 20.F1180.010.
20.F1180.010: Dummy Pad with solder mask is ZZ.00PAD.GV1
20180525 change to conn
1D8V_S5
HDT+ Connectors
HDT1
Notice：ZZ.F1722.02001
1 2 APU_TCK
3 CPU_VDDIO CPU_TCK 4 APU_TMS
5 GND CPU_TMS 6 APU_TDI
7 GND DY CPU_TDI 8 APU_TDO
APU_TRST#_R 9 GND CPU_TDO 10 SVID_PWRGD
DBRDY3 11 CPU_TRST# CPU_PWROK_BUF 12 RST#_CPU
B B
DBRDY2 13 CPU_DBRDY3 CPU_RST#_BUF 14 APU_DBRDY
DBRDY1 15 CPU_DBRDY2 CPU_DBRDY0 16 APU_DBREQ#
17 CPU_DBRDY1 CPU_DBREQ# 18 APU_PLLTEST0
19 GND CPU_PLLTEST0 20 APU_PLLTEST1
CPU_VDDIO CPU_PLLTEST1
SMC-CONN20A-1-GP-U3
RN6802
8 1 DBRDY1 20.F1722.020
7 2 DBRDY2
6 3 DBRDY3
5 HDT+ 4
20.F1722.020: Dummy Pad with solder mask is ZZ.F1722.02001
SRN10KJ-6-GP
<Core Design>
A
APU_TRST# 1
HDT+ 2 APU_TRST#_R Wistron Corporation A
R6804 33R2J-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
HDT+ C6801 Title

SCD01U50V2KX-1DLGP Dubug connector
2

A4 Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Sensor HUB
[17,66] GSEN_INT1
https://vinafix.com
[66] GSEN_INT2
[66] GYRO_DRDY
[70] GSEN2_INT1_C
[70] GSEN2_INT2_C
[17,66,70] SENSOR_I2C_SCL
[17,66,70] SENSOR_I2C_SDA
D D
[38] HUB_USB20_SENSOR_N
[38] HUB_USB20_SENSOR_P
3D3V_S0 3D3V_MCU
150mA
Sensor Hub
R6901 1 2 0R3J-L1-GP
HUB+ U6901
[17,24] KB_DISABLE C6901 C6903 C6904 C6905 C6906 C6907
1
1 18 GSEN_INT1_HUB
SC1U10V2KX-1DLGP
SCD01U50V2KX-1DLGP
SCD01U50V2KX-1DLGP
SCD01U50V2KX-1DLGP
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
[66] GYRO_INT 3D3V_S5 VLCD PB0 GSEN_INT2_HUB
19
R6927 9 PB1 20 GYRO_INT_C_HUB
VDDA PB2
2
1 2 39 GYRO_DRDY_HUB
DY 24 PB3 40
0R2J-2-GP HUB HUB HUB HUB HUB HUB 36 VDD_1 PB4 41
48 VDD_2 PB5 42 SENSOR_I2C_SCL_HUB
VDD_3 PB6 43 SENSOR_I2C_SDA_HUB
HUB PB7 45
10 PB8 46
HUB_PA1 11 PA0_WKUP1 PB9 21
HUB_PA2 12 PA1 PB10 22
HUB_PA3 13 PA2 PB11 25 20180730
HUB_PA4 14 PA3 PB12 26 R6930
HUB_PA5 15 PA4 PB13 27 GYRO_DRDY_HUB_R 1 2 GYRO_DRDY
HUB_PA6 16 PA5 PB14 28 DY
GSEN2_INT1_C_HUB 17 PA6 PB15 0R2J-2-GP
29 PA7 5 MCU_OSCI
R6904 30 PA8 PH0_OSC_IN 6 MCU_OSCO
HUB+ 1
1K5R2F-2-GP
HUB2 USBDISABLE 31 PA9 PH1_OSC_OUT
HUB_USB20_SENSOR_N 1 R6905 2 0R2J-L-GP USB_8- 32 PA10 7 MCU_RST#
HUB_USB20_SENSOR_P 1 2 USB_8+ 33 PA11 RST# 44 MCU_BOOT0
C R6906 0R2J-L-GP SW DIO 34 PA12 BOOT0 C
PA13
1
SW CLK 37
HUB+ GSEN2_INT2_C_HUB 38 PA14 8
PA15 VSSA HUB R6907
20KR2J-L2-GP
KB_DISABLE R6920 KB_DISABLE_HUB
1 2 2 23
3 PC13_WKUP2 VSS_1 35
HUB+ PC14_OSC32_IN VSS_2
2
0R2J-L-GP 4 47
PC15_OSC32_OUT VSS_3
49
GND
STM32L151CBU6TR-3-GP
071.32151.0D0U From APU

combine G R6902
100KR2J-1-GP
3D3V_MCU
20180730 MCU_RST# 1 HUB 2
GYRO_INT_C_HUB 1 0R2J-2-GP GYRO_INT

R6923 HUB+ 2
1
C6902
GSEN_INT1_HUB R6921 1 HUB+ 22 0R2J-2-GP GSEN_INT1 HUB SCD1U16V2KX-3DLGP
GSEN_INT2_HUB R6922 1 0R2J-2-GP GSEN_INT2
HUB+
2
3D3V_MCU
GSEN2_INT1_C_HUB 1 0R2J-2-GPGSEN2_INT1_C
GSEN2_INT2_C_HUB
R6925
R6926 1
HUB+ 22 0R2J-2-GPGSEN2_INT2_C
RN6901
HUB+ SENSOR_I2C_SCL 4 1
B SENSOR_I2C_SCL_HUB 1 0R2J-2-GPSENSOR_I2C_SCL SENSOR_I2C_SDA B
SENSOR_I2C_SDA_HUB
R6928
R6929 1
HUB+ 22 0R2J-2-GPSENSOR_I2C_SDA
3 HUB+ 2
HUB+
GYRO_DRDY_HUB 1 0R2J-2-GP GYRO_DRDY SRN2K2J-1-GP
R6924 HUB+ 2
X6901
For Sensor Orientation Setting 3D3V_MCU MCU_OSCO 3 4
R6908 1 DY 2 10KR2J-3-GP R6909 1 HUB 2 10KR2J-3-GP HUB
1
2 1 MCU_OSCI
R6910 1 DY 2 10KR2J-3-GP R6911 1 HUB 2 10KR2J-3-GP C6908 HUB
1
SC15P50V2JN-DL-GP
XTAL-12MHZ-52-GP-U
2
R6912 1 DY 2 10KR2J-3-GP R6913 1 HUB 2 10KR2J-3-GP HUB C6909
82.30006.491 SC15P50V2JN-DL-GP
2
R6914 1 DY 2 10KR2J-3-GP R6915 1 HUB 2 10KR2J-3-GP
For MCU debug port
R6916 1 DY 2 10KR2J-3-GP R6917 1 HUB 2 10KR2J-3-GP
R6918 1 2 10KR2J-3-GP R6919 1 2 10KR2J-3-GP 3D3V_MCU

DY HUB
HUB_PA1 SW DIO 1 TP6903 TPAD14-OP-GP
HUB_PA2 SW CLK 1 TP6904 TPAD14-OP-GP
HUB_PA3 1 TP6902 TPAD14-OP-GP
HUB_PA4 1 TP6901 TPAD14-OP-GP
HUB_PA5
HUB_PA6
A <Core Design> A
Wistron Corporation
Title
Title
Size DocumentNumber
Number
Sensor HUB Rev
Size Document Rev
A3
Bensolo AMD A00
Date: Sheet
Sheet 69 of 106
5 4 3 2 1
5 4 3 2 1
SSID = User.interface Free Fall Sensor

https://vinafix.com
D D
[66] GSEN2_INT1
[66] GSEN2_INT2
[69] GSEN2_INT1_C
[69] GSEN2_INT2_C
[17,66,69] SENSOR_I2C_SCL
[17,66,69] SENSOR_I2C_SDA
[66] SENSOR_I2C_SCL_2G
[66] SENSOR_I2C_SDA_2G
C C
[60] FFS_INT2_Q
[17,18] FFS_INT2
[18,61] AGPIO14
3D3V_S5 3D3V_S0 Note:
1
R7021 (1) Keep all signals are the same trace width. (included VDD, GND).
100KR2J-1-GP R7018
100KR2J-1-GP (2) No VIA under IC bottom.
2IN1 DY
2
Reserve on IO BD Note:
2
FALL_INT2
1
- no via, trace, under the sensor (keep out area around 2mm)
Part Reference = Q7001
75.27002.F7C
- stay away from the screw hole or metal shield soldering joints
B 2N7002KDW-1-GP 2IN1
Note:ZZ.27002.F7C01 - design PCB pad based on our sensor LGA pad size (add 0.1mm) B
- solder stencil opening to 90% of the PCB pad size

4
- mount the sensor near the center of mass of the NB as possible as you can
INT2_SELECT FFS_INT2_Q HDD FFS I2C

SENSOR_I2C_SCL R70131 2 0R2J-2-GP SENSOR_I2C_SCL_2G
SENSOR_I2C_SDA R70141
FFS 2 0R2J-2-GP SENSOR_I2C_SDA_2G
FFS
GSEN2_INT1 R7011 0R2J-2-GP

GSEN2_INT1_C R7009 0R2J-2-GP GSEN2_INT1 1 2 AGPIO14
1 2
R7010
HUB 0R2J-2-GP
DY
GSEN2_INT2_C 1 2 GSEN2_INT2
HUB
A
INT2_SELECT <Core Design> A
R7012 1 FFS 2 0R2J-2-GP
FFS_INT2
R7008 1 FFS 2 0R2J-2-GP
Wistron Corporation
FFS 只有在bensolo &2 in1 會上件
Title
Title
Size DocumentNumber
Number
Free Fall Sensor Rev
Size Document Rev
A3
Bensolo AMD A00
Date: Sheet
Sheet 70 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
Type C PD (CCG4)
A2
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = CCG4 VDDIO VDDD
VDDD
1
https://vinafix.com
R7257 DY
5V_S5 For VCONN OCP A00 Change 0 ohm to short pad 20181220 10KR2F-2-GP
[24] CCG4_I2C_INT#_EC
U7208 U7207
R7279 R7274 PL 100K to GND
2
1 6 5V_VCONN_P1 1 TypeC 2 5V_VCONN_P1_CCG4 5 11 CPU_DP_HPD_MUX 1 TypeC 2 CPU_DP_HPD
[24] CCG4_I2C_SCL
2 GND OUT#6 5 0R0603-PAD V5V P2.3 12 PD_VBUS_DISCHG 0R0402-PAD on CPU side
1 2 5V_VCONN_EN 3 IN OUT#5 4 PD_VCCD 22 P2.5 14 PD_VBUS_P_CTRL1
[24] CCG4_I2C_SDA EN FLG VCCD P2.6
1
C7270 C7288 R7250 100KR2F-L1-GP A00 Change 0 ohm to short pad 20181220
TypeCTypeC
1
7 20 13 PD_DP3_MUX_S
[8] CPU_DP_HPD TypeC TypeC GND C7281
VDDD P3.0 15 PD_VBUS_C_CTRL1
SCD1U25V2KX-1-DL-GP
SC10U6D3V3MX-DL-GP
D [74] PD_VBUS_DISCHG TypeC SC1U10V2KX-1DLGP P3.1
R7275 D
2
21 16 CCG4_APU_USBC_SDA_R 1 TypeC 2 0R0402-PADCCG4_APU_USBC_SDA
[74] PD_VBUS_P_CTRL1 VDDIO P3.2
2
AP2151FMG-7-GP 17 CCG4_APU_USBC_SCL_R 1 R7276 2 0R0402-PADCCG4_APU_USBC_SCL
[74] PD_VBUS_C_CTRL1 P3.3 18 PD_DP3_MUX_OE#
074.02151.0A73 CCG4_I2C_SDA 9 P3.4 23 FAST_ON_TP1
TypeC
CCG4_I2C_SCL P0.0 P3.6
[18] CCG4_APU_USBC_SDA 074.02151.0A73 Follow Bolt 20180709 10
P0.1 6 PD_CC1 R7273 1 TypeC 2 0R0402-PADUSBC1_CC1_CONN
[18] CCG4_APU_USBC_SCL CC1
PD_SW D_IO 24 4 PD_CC2 R7212 1 TypeC 2 0R0402-PADUSBC1_CC2_CONN
VCCPD_VBUS X00 By vendor check PD_SW D_CLK 1 P1.1 CC2
CCG4_ID_1 2 P1.2 7 PD_XRES
[73] USBC1_CC1_CONN TypeC PD_VBUS_R P1.3 XRES#
R7255 1 2 10KR2F-2-GP 3
[73] USBC1_CC2_CONN P1.5
R7249 1 TypeC2 1KR2F-L1-GP 8
C7277 1 2 SCD1U25V2KX-1-DL-GP P1.7 19
GND 25
[73] PD_DP3_MUX_S_R TypeC GND C7287
1
1 R7261 2 10KR2J-3-GP INT#_TYPEC_R TypeC C7286
SC390P50V2KX-1-GP
SC390P50V2KX-1-GP
[73] PD_DP3_MUX_OE#_R VDDD
CYPD4126-24LQXIT-GP
TypeC TypeC
DY
2
[74] FAST_ON_TP1
CCG4_I2C_INT#_EC 1 R7277 2 0R0402-PAD 071.04126.0D03
TypeC

Power
VCC3PD VDDD VDDIO
R7232
1 TypeC 2 Platform Detect Pin
0R0603-PAD
C I2C to KBC VDDD C
1 R7278 2 0R0402-PAD VDDD
TypeC
RN7203 VDDD
1
A00 Change 0 ohm to short pad 20181220 2 3 CCG4_I2C_SCL 3D3V_AUX_KBC
1 TypeC 4 CCG4_I2C_SDA R7267
VDDIO 5V_S5 10KR2F-2-GP
DY
1
SRN2K2J-1-GP
1
TypeC
2
R7258
CCG4_ID_1 R7248 2K2R2J-2-GP
TypeC TypeC TypeC TypeC TypeC
4K7R2J-2-GP
TypeC
SC1U10V2KX-1DLGP
C7279 C7278 C7282
2
1
1
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
2
1
1 2 PD_XRES
SC1U10V2KX-1DLGP
C7276 C7274
R7213
DY 10KR2J-3-GP R7266
2
PD_DP3_MUX_S_R 1 TypeC 2 PD_DP3_MUX_S TypeC 30KR2J-4-GP C7272 INT#_TYPEC_R
SCD1U25V2KX-1-DL-GP
R7204 0R0402-PAD
PD_DP3_MUX_OE#_R 1 2 PD_DP3_MUX_OE# TypeC
2
R7205 TypeC 0R0402-PAD
2
1 2
A00 Change 0 ohm to short pad 20181220 R7214
DY 10KR2J-3-GP
X00 By vendor check 20180709

VDDD
B TypeC TypeC TypeC B

1
1
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SC1U10V2KX-1DLGP
C7271 C7273 C7280

2
For Dead Battery modify For Debug

3D3V_S5 From System PD_XRES 1 TP7211
3D3V_S5 VCC3PD PD_SW D_CLK 1 TP7213
PD_SW D_IO 1
083.00520.0F8F TP7214
1
R7256 VCCPD_VBUS D7205 D7204

10KR2J-3-GP
TypeC A K K A
SBA0520Q-R1-00001-GP-U SBA0520Q-R1-00001-GP-U
2
TPS70933_EN_G
R7262 TypeC TypeC
909KR2F-GP VCCPD_VBUS
TypeC U7209
2
C7285
VBUS to 3.3V
2
TypeC Q7207 6 1 VREG3PD

G 5 IN OUT 2
SCD22U10V2KX-2-GP
NC#5 NC#2
1
TPS70933_EN 4 3
C7283 EN GND
1
D TPS70933_EN
SC1U50V3KX-1-GP
TypeC TypeC 7
GND TypeC
S C7284
1
1
Notice:ZZ.2N702.J3101
R7263 C7275
2N7002K-2-GP TPS70933DRVR-GP-U
A 301KR2F-1-GP TypeC TypeC <Core Design> A
SCD1U25V2KX-1-DL-GP
84.2N702.J31 TypeC 074.70933.0033
2
Wistron Corporation
2

Title
Title
Type C PD (CCG4)
Size
Size DocumentNumber
Document Number Rev
Rev
RF A3
Bensolo AMD A00
Date: Sheet
Sheet 72 of 106
5 4 3 2 1
5 4 3 2 1
USB Type-C conn

3D3V_S0 https://vinafix.com
X00 By Vender check Remove I2C and AUX channel 1 R7349 2 0R0402-PAD
[18] USB3_USB30_TX_P1
TypeC C7302
1
[18] USB3_USB30_TX_N1 1 R7306 2100KR2J-4-GP
TypeC
SCD1U16V2KX-3DLGP
TypeC U7302
TypeC
2
D DP3_AUXP C7303 1 2 SCD1U16V2KX-3DLGP DP3_AUXP_C 8 10 AUX_VCC D
[18] USB3_USB30_RX_N0 D+ VCC
DP3_AUXN C7305 1 2 SCD1U16V2KX-3DLGP DP3_AUXN_C 7
[18] USB3_USB30_RX_P0 D-
TypeC
PD_DP3_MUX_OE#_R 6 1 USB3_SBU1
R7307 1 2 100KR2J-4-GP PD_DP3_MUX_S_R 9 OE# 1D+ 2 USB3_SBU2
3D3V_S0 S 1D-
[18] USB3_USB30_TX_P0 TypeC TypeC 3
[18] USB3_USB30_TX_N0 5 2D+ 4
GND 2D-
[8] DP3_AUXP
NX3DV221GM-GP
[8] DP3_AUXN 73.03221.D03
Type-c Connecotr VCCPD_VBUS VCCPD_VBUS

[72] USBC1_CC1_CONN
[72] USBC1_CC2_CONN
USB1
A1 B1 TypeC
VCCPD_VBUS USB3_USB30_TX_P0C7307 1 2 SCD22U10V2KX-2-GP USB3_SSTX_CON_P1 A2 GND GND B2 USB3_SSTX_CON_P2 C7309 1 2 SCD22U10V2KX-2-GP USB3_USB30_TX_P1
USB3_USB30_TX_N0C7304 1 TypeC
2 SCD22U10V2KX-2-GP USB3_SSTX_CON_N1 A3 SSTXP1 SSTXP2 B3 USB3_SSTX_CON_N2 C7306 1 2 SCD22U10V2KX-2-GP USB3_USB30_TX_N1
[18] TYPEC_USB20_P TypeC A4 SSTXN1 SSTXN2 B4
VBUS#A4 VBUS#B4 TypeC
1
USBC1_CC1_CONN A5 B5 USBC1_CC2_CONN
[18] TYPEC_USB20_N USB3_USB20_CON_P1 CC1 CC2 USB3_USB20_CON_P1
TypeC C7321 A6 B6
USB3_USB20_CON_N1 A7 DP1 DP2 B7 USB3_USB20_CON_N1
DN1 DN2
2
USB3_SBU1 A8 B8 USB3_SBU2
SCD1U25V2KX-1-DL-GP
A9 RFU1 RFU2 B9
USB3_USB30_RX_N1 C7310 1TypeC TypeC
C C
[72] PD_DP3_MUX_OE#_R USB3_SSRX_CON_N1 VBUS#A9 VBUS#B9 USB3_SSRX_CON_N0 USB3_USB30_RX_N0
2 SCD33U6D3V2KX-1-GP A10 B10 C7312 1 2 SCD33U6D3V2KX-1-GP
[72] PD_DP3_MUX_S_R USB3_USB30_RX_P1 C7311 1 USB3_SSRX_CON_P1 SSRXN2 SSRXN1 USB3_SSRX_CON_P0 USB3_USB30_RX_P0
2 SCD33U6D3V2KX-1-GP A11 B11 C7313 1 2 SCD33U6D3V2KX-1-GP
A12 SSRXP2 SSRXP1 B12
TypeC GND GND TypeC
TypeC
1
1
1
220KR2F-L-GP
R7311
220KR2F-L-GP
R7313
220KR2F-L-GP
R7318
220KR2F-L-GP
R7319
NP1
2MR2-GP
R7343
2MR2-GP
R7344
NP2 NP1
DY DY DY NP2
13
DY DY DY
16 CHASSIS#13 14
2
GROUND CHASSIS#14
2
17 15
18 GROUND CHASSIS#15 20
19 GROUND CHASSIS#20 21
GROUND CHASSIS#21 22
CHASSIS#22
SKT-USB34-21-GP-U1
022.10005.M021
20171214 Change symbol by ME request

USB3.1 ESD USB2.0 ESD
B Swap 20180725 Swap 20180803 By EMI B
ED7303 USB3_USB20_CON_N1
ED7301 TypeC CH1 1 USB3_SBU2
R7348 1
TypeC 2 15R2F-2-GP A00 remove R7345 R7346 20181225 USB3_SSTX_CON_N2 1 10 USB3_SSTX_CON_N2 CH2 2 USB3_SBU1 USB3_USB20_CON_P1
3 GND
TypeC L7303 USB3_SSTX_CON_P2 2 9 USB3_SSTX_CON_P2 8
TYPEC_USB20_N C7322 1 2 TYPEC_USB20_RC_N 1 2 USB3_USB20_CON_N1 3 8 GND
SC470P50V2KX-3DLGP CH3 4 USBC1_CC1_CONN
TypeC
1
TYPEC_USB20_P C7323 1 2 TYPEC_USB20_RC_P 4 3 USB3_USB20_CON_P1 USB3_SSRX_CON_N1 4 7 USB3_SSRX_CON_N1
SC470P50V2KX-3DLGP CH4 5 USBC1_CC2_CONN ED7305
DLM0NSN900HY2D-GP USB3_SSRX_CON_P1 5 6 USB3_SSRX_CON_P1
1
TypeC2 6 9
AZ5315-02F-GP
R7347 15R2F-2-GP
068.09002.2001 7
NC TypeC NC
10 83.05315.0A0
NC NC
L05ESDL5V0NA-4-GP
TypeC
3
075.00550.0071 PUSB3F96-GP
2nd = 075.08809.0073
075.PUSB3.0073
ED7302 TypeC
USB3_SSRX_CON_N0 1 10 USB3_SSRX_CON_N0
USB3_SSRX_CON_P0 2 9 USB3_SSRX_CON_P0 X00 By EMI check 20180612

3 8
USB3_SSTX_CON_N1 4 7 USB3_SSTX_CON_N1
A
USB3_SSTX_CON_P1 USB3_SSTX_CON_P1 <Core Design> A
5 6
L05ESDL5V0NA-4-GP Wistron Corporation

075.00550.0071 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Title
Title
Type C Re-Driver + Conn
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bensolo AMD A00
Date: Sheet
Sheet 73 of 106
5 4 3 2 1
5 4 3 2 1
USB TYPE C USB_ADT

PWR_AD_A
VCCPD_VBUS
Layout note:
Close to U7419 U7418
8 D S 1
100KR2F-L1-GP
https://vinafix.com
1
7 D S 2
[72] PD_VBUS_C_CTRL1
R7406
6 D S 3
1
5 D G 4 TypeC
100KR2J-1-GP
R7430
S
2
TypeC R7401 AON7403-GP-U TypeC
C7401
2
G 100KR2F-L1-GP
1MR2F-GP 84.07403.037
R7404
[24] TYPEC_DCIN_EN#
TypeC
C2
D2
C1
D1
B2
E1
E2
A1
B1
2
2
2
TypeC Q7412
3D3V_S5 PJA3415-GP
VBUS
VBUS
VBUS
VBUS
VBUS
VINT
VINT
VINT
VINT
1
TypeC 084.03415.0031
D
Follow Bolt 20180808
[44] VCCPD_VBUS_ACK
TypeC R7403 2nd = 84.02130.031
TypeC 1 TypeC 2 LPS_SW_B
1
D R7424 D
LPS_SW
U7419 0R0402-PAD
OVLO
GND
GND
GND
ACK
EN#
100KR2F-L1-GP TypeC NX20P5090UK-GP A00 Change 0 ohm to short pad 20181220
LPS_SW_C
[72] PD_VBUS_P_CTRL1
C3
D3
A2
A3
B3
E3
074.20509.007Z
2
VCCPD_VBUS_ACK
R7402
1
200KR2F-L-GP
VCC3PD 3D3V_S5 TypeC
TypeC R7405
1
100KR2F-L1-GP
[72] FAST_ON_TP1
LPS_SW_A
2
1
20180706
1
R7427
[18] USB_OC0# R7431 DY Q7406
100KR2F-L1-GP 100KR2F-L1-GP
TypeC 3 4
2
D2 S2
2
TYPEC_DCIN_EN# 2 5 PD_VBUS_C_CTRL1
PD_VBUS_C_EN
G1 G2
R7422 1 2 1MR2F-GP
1 6 LPS_SW_D
TypeC S1 D1
Q7407 PJT138KA-GP
Form EC (CY18 add) 3 4
075.00138.0A7C
D2 S2 2nd = 075.00138.0F7C
TYPEC_DCIN_EN# 2 5
G1 G2 TypeC
1 6
1
S1 D1
R7428 TypeC Type C PD discharger

TypeC PJT138KA-GP
VCCPD_VBUS
100KR2F-L1-GP 075.00138.0A7C 1 R7407 2
2nd = 075.00138.0F7C 200KR2F-L-GP
2
TypeC
1
R7413
C
TypeC 100R2512J-1-GP Q7452
C
VCCPD_VBUS
G
PD_VBUS_DISCHG [72]
2
USB_TYPEC_DIS D
1
S
Q7405 R7426
R7425 TypeC TypeC R7412
1 2 PD_VBUS_C_EN_A 3 4 100KR2F-L1-GP 100KR2F-L1-GP
VCCPD_VBUS 2N7002K-2-GP
TypeC TypeC 84.2N702.J31
2
PD_VBUS_C_CTRL1 PD_VBUS_C_CTRL1_R
Note:ZZ.27002.F7C01
2 5
2
100KR2F-L1-GP
1 6
Form PD control PD_VBUS_DISCHG = 1 (VBUS Discharging)
1
2N7002KDW-1-GP
2nd = 075.27002.0E7C R7408 PD_VBUS_DISCHG = 0/Z (VBUS not discharging)
200KR2F-L-GP
75.27002.F7C
TypeC
TypeC
2
PD_VBUS_C_CTRL1_A
VCCPD_VBUS
For PR7450 set for NX5P3363 R-ILim (3.3A) 20170823
1
Q7404 R7423
3 4 100KR2F-L1-GP
TypeC
PD_VBUS_P_CTRL1
Note:ZZ.27002.F7C01
2 5
2
1 6 VBUS_P_CTRL_R
Form PD control
2N7002KDW-1-GP
2nd = 075.27002.0E7C
1
75.27002.F7C R7409
200KR2F-L-GP
TypeC TypeC
B B
2
VCCPD_VBUS Layout Note: Close USB1

3A 5V_S5 VCCPD_VBUS
From CCG4
NX5P3290_EN R7417 1 TypeC 2 0R0402-PAD PD_VBUS_P_CTRL1
1
20181106 DVT2
1
R7419 C7490 C7494 C7491 C7492 U7403 To CPU
1
DY TypeC TypeC TypeC TypeC 083.03040.008H A00 Change 0 ohm to short pad 20181220
SCD1U25V2KX-1-DL-GP
SC22U25V5MX-GP
SC22U25V5MX-GP
SC1U25V2KX-4-GP
A1 C2 NX5P3290_ILIM
100KR2J-1-GP
R7418
VIN#A1 VBUS#C2
2
A2 D1 K A USB_C0_5V_OUT_D TypeC 100KR2F-L1-GP

VIN#A2 VBUS#D1
2
D2
B1 VBUS#D2 TypeCSS3040HE-GP
D7408
VCP#B1
2
1
USB_C0_5V_OUT_D B2
C1 VCP#B2 D4 USB_C0_CAP R7420
VCP#C1 CAP
TypeC 14K3R2F-GP
1
NX5P3290_ILIM A3
NX5P3290_EN B4 ILIM B3
TypeC C7409
EN GND
2
FAST_ON_TP1 C4 C3
20181105 10U->22U FO GND
SC1KP50V2KX-1DLGP
2
USB_OC0# A4 D3
FLT# GND
TypeC
Fast turn on Detect Pin X00 By vendor check 20180709 A00 Remove R7416 20181226 NX5P3363UKZ-1-GP
VDDIO 5V_S5 074.53363.M001
PD_VBUS_P_CTRL1 = 1 (Provider Path ON)
PD_VBUS_P_CTRL1 = 0/Z (Provider Path OFF)
2
A A
R7432 DY DY R7410
1KR2J-1-GP 1KR2J-1-GP
1
FAST_ON_TP1
<Core Design>
2
R7411
0R2J-2-GP DY Wistron Corporation
1
Title
Title
GPU(2/5)DIGITALOUT
Size
Size Document
DocumentNumber
Number Rev
Rev
A2
Bensolo AMD A00
Date: Sheet
Sheet 74 of 105
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = dGPU

https://vinafix.com
[3] GFX_PCIE_TX_P0
[3] GFX_PCIE_TX_N0
D D
[3] GFX_PCIE_TX_P1
[3] GFX_PCIE_TX_N1
[3] GFX_PCIE_TX_P2
[3] GFX_PCIE_TX_N2
[3] GFX_PCIE_TX_P3
[3] GFX_PCIE_TX_N3
GPU1B 2 OF 15
[3] GFX_PCIE_RX_P0
GFX_PCIE_TX_P0 AT41
symbol2
AV35 GFX_PCIE_RX_C_P0 PX
C7601 1 2 SCD22U10V2KX-2-GP GFX_PCIE_RX_P0
[3] GFX_PCIE_RX_N0 PCIE_RX0P PCIE_TX0P
GFX_PCIE_TX_N0 AT40 AU35 GFX_PCIE_RX_C_N0 C7602 1 2 SCD22U10V2KX-2-GP GFX_PCIE_RX_N0
PCIE_RX0N PCIE_TX0N PX
[3] GFX_PCIE_RX_P1
GFX_PCIE_TX_P1 AR41 AU38 GFX_PCIE_RX_C_P1 C7603 1 2 SCD22U10V2KX-2-GP GFX_PCIE_RX_P1
[3] GFX_PCIE_RX_N1
GFX_PCIE_TX_N1 AR40 PCIE_RX1P PCIE_TX1P AU39 GFX_PCIE_RX_C_N1 PX
C7604 1 2 SCD22U10V2KX-2-GP GFX_PCIE_RX_N1
[3] GFX_PCIE_RX_P2
GFX_PCIE_TX_P2 AP41 AR37 GFX_PCIE_RX_C_P2 C7605 1 2 SCD22U10V2KX-2-GP GFX_PCIE_RX_P2
[3] GFX_PCIE_RX_N2
GFX_PCIE_TX_N2 AP40 PCIE_RX2P PCIE_TX2P AR38 GFX_PCIE_RX_C_N2 PX
[3] GFX_PCIE_RX_P3
GFX_PCIE_TX_P3 AM41 AN37 GFX_PCIE_RX_C_P3 C7607 1 2 SCD22U10V2KX-2-GP GFX_PCIE_RX_P3
[3] GFX_PCIE_RX_N3
GFX_PCIE_TX_N3 AM40 PCIE_RX3P PCIE_TX3P AN38 GFX_PCIE_RX_C_N3 PX
AL41 AL37
AL40 PCIE_RX4P PCIE_TX4P AL38
PCIE_RX4N PCIE_TX4N
[16] GFX_CLK_CPU_P AK41 AJ37
[16] GFX_CLK_CPU_N AK40 PCIE_RX5P PCIE_TX5P AJ38
C PCIE_RX5N PCIE_TX5N C
AJ41 AG37
AJ40 PCIE_RX6P PCIE_TX6P AG38
[16,85] DGPU_HOLD_RST# PCIE_RX6N PCIE_TX6N
AH41 AE37
[17,24,61,63,68,85] PLT_RST# PCIE_RX7P PCIE_TX7P
AH40 AE38
PCIE_RX7N PCIE_TX7N
3D3V_VGA_S0
GFX_CLK_CPU_P AV33 AV41 VGA_RST#
PCIE_REFCLKP PERST#
1
GFX_CLK_CPU_N AU33
PCIE_REFCLKN AC41 PX_EN 1 TP7601 R7625
PX_EN 10KR2J-L-GP
DY
1
C7609
SC47P50V2JN-3GP DY
2
2
AU41 PCIE_ZVSS
PCIE_ZVSS
1
REV 0.91
A K
R7603 D7601 3D3V_S0
DY
1
R16M-G1-70-GP
R7605
PX 0R2J-2-GP RB551V30-GP
PX 83.R5003.H8H
1
PX 200R2F-L-GP
2
3D3V_S0 R7626
DY 10KR2J-L-GP
2
U7601
5 1 DGPU_HOLD_RST#
B VCC A B
2 U7601_B 2 1 PLT_RST#
DY B DY
1
C7610 R7624
VGA_RST# 4 3 0R2J-2-GP
DY Y GND
SCD1U16V2KX-3DLGP
1
SNLVC1G08DCKRG4-GP R7613
10KR2J-L-GP
73.01G08.DHG PX
2
A <Core Design> A
Wistron Corporation
Title
Title
GPU (1/5) PEG
Size
Size DocumentNumber
Document Number Rev
Rev
A3
Bucky AMD A00
Date: Sheet
Sheet 76 of 106
5 4 3 2 1
5 4 3 2 1
4*1uF 0D875V_VGA_S0
https://vinafix.com
VGA_CORE 7*1uF 2*22uF
8*22uF GPU1I 9 OF 15
N13 symbol9 L13 GPU1L 12 OF 15
N15 VDDC#0 VDDCI#0 L17 GPU1M 13 OF 15 symbol12
N21 VDDC#1 VDDCI#1 L21 C7706 C7707 A2 J39
symbol13
N23 VDDC#2 VDDCI#2 L25 AA5 AN40 A5 VSS#0 VSS#58 J40
VDDC#3 VDDCI#3 VSS#115 VSS#171 VSS#1 VSS#59
1
N29 L29 AA10 AN41 A9 J41
C7743 C7702 C7703 C7704 C7708 C7705 C7709
1
N31 N11 AA17 AP13 A13 K21
R13 VDDC#5 VDDCI#5 U11 AA19 VSS#117 VSS#173 AP17 A17 VSS#3 VSS#61 K25
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
2
R15 AA11 AA25 AR3 A21 K29
2
R21 AE11 AA27 AR7 A25 K40
D PX PX PX PX PX PX PX R23 VDDC#8 VDDCI#8 AA32 VSS#120 VSS#176 AR11 A29 VSS#6 VSS#64 L3
D
R29 VDDC#9 PX PX AA39 VSS#121 VSS#177 AR19 A33 VSS#7 VSS#65 L7

R31 VDDC#10 AC3 VSS#122 VSS#178 AR21 A37 VSS#8 VSS#66 L11
U13 VDDC#11 AC7 VSS#123 VSS#179 AR25 A40 VSS#9 VSS#67 L15
U15 VDDC#12 AC11 VSS#124 VSS#180 AR27 B1 VSS#10 VSS#68 L19
U29 VDDC#15 AC25 VSS#127 VSS#183 AR39 C5 VSS#13 VSS#71 L31
U31 VDDC#16 AC27 VSS#128 VSS#184 AU1 C7 VSS#14 VSS#72 L35
W13 VDDC#17 AC39 VSS#129 VSS#185 AU3 C9 VSS#15 VSS#73 L39
W15 VDDC#18 AE1 VSS#130 VSS#186 AU9 C11 VSS#16 VSS#74 N1
VDDC#19 VSS#131 VSS#187 VSS#17 VSS#75
1
1
W21 C7744 C7718 C7719 C7720 AE3 AU23 C13 N3
C7710 C7711 C7712 C7713 C7714 C7715 C7716 C7717 W23 VDDC#20 AE5 VSS#132 VSS#188 AU29 C15 VSS#18 VSS#76 N5
W29 VDDC#21 PX PX PX PX AE10 VSS#133 VSS#189 AW3 C17 VSS#19 VSS#77 N17
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
VDDC#22 VSS#134 VSS#190 VSS#20 VSS#78
2
2
W31 AE17 AW5 C19 N19
AA13 VDDC#23 AE19 VSS#135 VSS#191 AW7 C21 VSS#21 VSS#79 N25
PX PX PX PX PX PX PX PX AA15 VDDC#24 AE25 VSS#136 VSS#192 AW9 C23 VSS#22 VSS#80 N27
AA31 VDDC#28 AE39 VSS#140 VSS#196 AW17 C31 VSS#26 VSS#84 R3
AC13 VDDC#29 AG3 VSS#141 VSS#197 AW19 C33 VSS#27 VSS#85 R7
AC29 VDDC#33 AG19 VSS#145 VSS#201 AW27 E1 VSS#31 VSS#89 R25
AC31 VDDC#34 AG25 VSS#146 VSS#202 AW29 E3 VSS#32 VSS#90 R27
AE13 VDDC#35 AG27 VSS#147 VSS#203 AW31 E4 VSS#33 VSS#91 R32
AE23 VDDC#38 AG41 VSS#150 VSS#206 AW37 E17 VSS#36 VSS#94 U1
AE29 VDDC#39 AJ1 VSS#151 VSS#207 AW39 E21 VSS#37 VSS#95 U3
AE31 VDDC#40 AJ3 VSS#152 VSS#208 AY1 E25 VSS#38 VSS#96 U5
AG13 VDDC#41 AJ5 VSS#153 VSS#209 AY2 E29 VSS#39 VSS#97 U17
AG23 VDDC#44 AJ35 VSS#156 VSS#212 AY17 G3 VSS#42 VSS#100 U27
AG29 VDDC#45 AJ39 VSS#157 VSS#213 AY23 G7 VSS#43 VSS#101 U32
AG31 VDDC#46 AL3 VSS#158 VSS#214 AY29 G11 VSS#44 VSS#102 U37
C C
AJ13 VDDC#47 AL7 VSS#159 VSS#215 AY37 G15 VSS#45 VSS#103 U39
AJ15 VDDC#48 AL10 VSS#160 VSS#216 AY40 G19 VSS#46 VSS#104 W3
AJ17 VDDC#49 AL11 VSS#161 VSS#217 AY41 G23 VSS#47 VSS#105 W7
AJ19 VDDC#50 AL32 VSS#162 VSS#218 BA2 G27 VSS#48 VSS#106 W11
AJ25 VDDC#53 AN1 VSS#165 VSS#221 BA17 G39 VSS#51 VSS#109 W25
AJ27 VDDC#54 AN3 VSS#166 VSS#222 BA23 J1 VSS#52 VSS#110 W27
AJ29 VDDC#55 AN7 VSS#167 VSS#223 BA29 J3 VSS#53 VSS#111 W39
AJ31 VDDC#56 AN35 VSS#168 VSS#224 BA37 J5 VSS#54 VSS#112 AA1
AL13 VDDC#57 AN39 VSS#169 VSS#225 BA40 J34 VSS#55 VSS#113 AA3
AL15 VDDC#58 VSS#170 VSS#226 J37 VSS#56 VSS#114
AL17 VDDC#59 VSS#57
AL19 VDDC#60 REV 0.91 REV 0.91
AL21 VDDC#61
VDDC#62 AFTP7701 R16M-G1-70-GP R16M-G1-70-GP
AL23
AL25 VDDC#63 C3 FB_VMEMIO 1 PX PX
AL27 VDDC#64 FB_VMEMIO AV13
VDDC#65 FB_VDDCI VDDCI_SENSE_P [86]
AL29 AR13
VDDC#66 FB_VDDC FB_VDDC [85]
AL31 AU13
VDDC#67 REV 0.91 FB_VSS FB_VSS [85]
R16M-G1-70-GP
PX
1D35V_VGA_S0
10*1uF 1D8V_VGA_S0
2*22uF GPU1N 14 OF 15
3*1uF
symbol14
K11 AM15
K13 VMEMIO#0 VDD_18#0 AP15
K19 VMEMIO#1 VDD_18#1 AR15 C7726 C7727 C7728
K23 VMEMIO#2 VDD_18#2
K27 VMEMIO#3
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
B B
VMEMIO#4
1
1
C7722 C7723 C7721 C7724 C7725 K31
L10 VMEMIO#5
PX PX PX PX PX N10 VMEMIO#6 PX PX PX
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
VMEMIO#7
2
2
W10
AC10 VMEMIO#8
AG10 VMEMIO#9
VMEMIO#10 AC32 0D875V_VGA_S0
VDD_08#0 AG32
VDD_08#1 AG35
7*1uF
VDD_08#2 AJ32
VDD_08#3 AJ34
VDD_08#4 AL34
VDD_08#5
W32
VDD_08
1
1
C7729 C7730 C7731 C7732 C7733 C7734 C7735
AM23
PX PX PX PX PX PX PX
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
VSS
2
2
1
C7736 C7737 C7738 C7739 C7740 AM17

VSS
PX PX PX PX PX REV 0.91
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
2
R16M-G1-70-GP
PX
C7741 C7742
1
1
2
A PX PX A
<Core Design>
Wistron Corporation
Title
Title
GPU (2/5) DIGITALOUT
Size
Size Document
Document Number
Number Rev
Rev
Custom
Bucky AMD A00
Date: Sheet
Sheet 77 of 106
5 4 3 2 1
5 4 3 2 1
[81] DQA0_[0:31] DQA1_[0:31] [81]

GPU1C 3 OF 15
symbol3 GPU1D 4 OF 15
https://vinafix.com
DQA0_0 L34 B27 DQA1_0 symbol4
DQA0_1 L37 DQA0_0 DQA1_0 A27 DQA1_1 C2 AH1
DQA0_2 L38 DQA0_1 DQA1_1 B26 DQA1_2 C1 DQB0_0 DQB1_0 AH2
DQA0_3 J35 DQA0_2 DQA1_2 A26 DQA1_3 D2 DQB0_1 DQB1_1 AJ2
DQA0_4 G37 DQA0_3 DQA1_3 A24 DQA1_4 D1 DQB0_2 DQB1_2 AK1
DQA0_5 E38 DQA0_4 DQA1_4 B23 DQA1_5 F1 DQB0_3 DQB1_3 AL2
DQA0_6 E35 DQA0_5 DQA1_5 A23 DQA1_6 G2 DQB0_4 DQB1_4 AM1
DQA0_7 D35 DQA0_6 DQA1_6 B22 DQA1_7 G1 DQB0_5 DQB1_5 AM2
DQA0_8 H41 DQA0_7 DQA1_7 B20 DQA1_8 H2 DQB0_6 DQB1_6 AN2
DQA0_9 H40 DQA0_8 DQA1_8 A20 DQA1_9 K2 DQB0_7 DQB1_7 AR1
D DQA0_9 DQA1_9 DQB0_8 DQB1_8 D
DQA0_10 G41 B19 DQA1_10 K1 AR2
DQA0_11 G40 DQA0_10 DQA1_10 A19 DQA1_11 L2 DQB0_9 DQB1_9 AT1
DQA0_12 E40 DQA0_11 DQA1_11 B17 DQA1_12 L1 DQB0_10 DQB1_10 AT2
DQA0_13 D41 DQA0_12 DQA1_12 A16 DQA1_13 N2 DQB0_11 DQB1_11 AV2
DQA0_14 D40 DQA0_13 DQA1_13 B16 DQA1_14 P2 DQB0_12 DQB1_12 AW1
DQA0_15 C41 DQA0_14 DQA1_14 A15 DQA1_15 P1 DQB0_13 DQB1_13 AW2
DQA0_16 C40 DQA0_15 DQA1_15 B15 DQA1_16 R2 DQB0_14 DQB1_14 AY3
DQA0_17 B39 DQA0_16 DQA1_16 A14 DQA1_17 R1 DQB0_15 DQB1_15 BA3
DQA0_18 A39 DQA0_17 DQA1_17 B14 DQA1_18 T2 DQB0_16 DQB1_16 AY4
DQA0_19 B38 DQA0_18 DQA1_18 B13 DQA1_19 T1 DQB0_17 DQB1_17 BA4
DQA0_20 B36 DQA0_19 DQA1_19 A11 DQA1_20 U2 DQB0_18 DQB1_18 AY5
DQA0_21 A36 DQA0_20 DQA1_20 B11 DQA1_21 W1 DQB0_19 DQB1_19 BA7
DQA0_22 B35 DQA0_21 DQA1_21 A10 DQA1_22 W2 DQB0_20 DQB1_20 AY7
DQA0_23 A35 DQA0_22 DQA1_22 B10 DQA1_23 Y1 DQB0_21 DQB1_21 AY8
DQA0_24 B33 DQA0_23 DQA1_23 B8 DQA1_24 Y2 DQB0_22 DQB1_22 BA8
DQA0_25 B32 DQA0_24 DQA1_24 A7 DQA1_25 AB2 DQB0_23 DQB1_23 AR4
DQA0_26 A32 DQA0_25 DQA1_25 B7 DQA1_26 AC1 DQB0_24 DQB1_24 AR5
DQA0_27 B31 DQA0_26 DQA1_26 A6 DQA1_27 AC2 DQB0_25 DQB1_25 AU4
DQA0_28 A30 DQA0_27 DQA1_27 A4 DQA1_28 AD1 DQB0_26 DQB1_26 AU7
DQA0_29 B29 DQA0_28 DQA1_28 B4 DQA1_29 AF1 DQB0_27 DQB1_27 AN8
DQA0_30 B28 DQA0_29 DQA1_29 A3 DQA1_30 AF2 DQB0_28 DQB1_28 AV11
DQA0_31 A28 DQA0_30 DQA1_30 B3 DQA1_31 AG1 DQB0_29 DQB1_29 AU11
[81] MAA0_[0:8] DQA0_31 DQA1_31 MAA1_[0:8] [81] DQB0_30 DQB1_30
AG2 AP11
DQB0_31 DQB1_31
MAA0_0 G25 E15 MAA1_0
MAA0_1 H25 MAA0_0 MAA1_0 H15 MAA1_1 R5 AE7
MAA0_2 E27 MAA0_1 MAA1_1 G13 MAA1_2 R8 MAB0_0 MAB1_0 AE8
MAA0_3 D27 MAA0_2 MAA1_2 D13 MAA1_3 N7 MAB0_1 MAB1_1 AG5
MAA0_4 D29 MAA0_3 MAA1_3 H11 MAA1_4 N4 MAB0_2 MAB1_2 AG4
MAA0_5 H27 MAA0_4 MAA1_4 H13 MAA1_5 L8 MAB0_3 MAB1_3 AJ4
MAA0_6 H23 MAA0_5 MAA1_5 H17 MAA1_6 N8 MAB0_4 MAB1_4 AG8
C C
MAA0_7 E23 MAA0_6 MAA1_6 G17 MAA1_7 U8 MAB0_5 MAB1_5 AC8
MAA0_8 D25 MAA0_7 MAA1_7 D15 MAA1_8 U7 MAB0_6 MAB1_6 AC5
H29 MAA0_8 MAA1_8 E11 R4 MAB0_7 MAB1_7 AE4
MAA0_9 MAA1_9 L5 MAB0_8 MAB1_8 AJ8
MAB0_9 MAB1_9
WCKA0_0 D33 A22 WCKA1_0
[81] WCKA0_0 WCKA0B_0 WCKA0_0 WCKA1_0 WCKA1B_0 WCKA1_0 [81]
[81] WCKA0B_0 E33 B21 H1 AP1
WCKA0B_0 WCKA1B_0 WCKA1B_0 [81] WCKB0_0 WCKB1_0
J2 AP2
WCKB0B_0 WCKB1B_0
WCKA0_1 A34 A8 WCKA1_1
[81] WCKA0_1 WCKA0B_1 WCKA0_1 WCKA1_1 WCKA1B_1 WCKA1_1 [81]
B34 B9 AB1 AN4
[81] WCKA0B_1 WCKA0B_1 WCKA1B_1 WCKA1B_1 [81] WCKB0_1 WCKB1_1
AA2 AN5
WCKB0B_1 WCKB1B_1
EDCA0_0 G38 B24 EDCA1_0
[81] EDCA0_0 EDCA0_1 EDCA0_0 EDCA1_0 EDCA1_1 EDCA1_0 [81]
F41 A18 EDCA1_1 [81] F2 AL1
[81] EDCA0_1 EDCA0_2 B37 EDCA0_1 EDCA1_1 B12 EDCA1_2 M2 EDCB0_0 EDCB1_0 AU2
[81] EDCA0_2 EDCA0_3 EDCA0_2 EDCA1_2 EDCA1_3 EDCA1_2 [81] EDCB0_1 EDCB1_1
A31 B6 EDCA1_3 [81] V1 BA6
[81] EDCA0_3 EDCA0_3 EDCA1_3 AD2 EDCB0_2 EDCB1_2 AV7
EDCB0_3 EDCB1_3
DDBIA0_0 J38 B25 DDBIA1_0
[81] DDBIA0_0 DDBIA0_1 DDBIA0_0 DDBIA1_0 DDBIA1_1 DDBIA1_0 [81]
F40 B18 E2 AK2
[81] DDBIA0_1 DDBIA0_2 DDBIA0_1 DDBIA1_1 DDBIA1_2 DDBIA1_1 [81] DDBIB0_0 DDBIB1_0
[81] DDBIA0_2 A38 A12 M1 AV1
DDBIA0_3 DDBIA0_2 DDBIA1_2 DDBIA1_3 DDBIA1_2 [81] DDBIB0_1 DDBIB1_1
B30 B5 V2 AY6
[81] DDBIA0_3 DDBIA0_3 DDBIA1_3 DDBIA1_3 [81] DDBIB0_2 DDBIB1_2
AE2 AV9
DDBIB0_3 DDBIB1_3
ADBIA0 H21 H19 ADBIA1
[81] ADBIA0 ADBIA0 ADBIA1 ADBIA1 [81]
W8 AA8
ADBIB0 ADBIB1
CSA0B_0 H31 E7 CSA1B_0
[81] CSA0B_0 CSA0B_0 CSA1B_0 CSA1B_0 [81]
G5 AL8
CSB0B_0 CSB1B_0
B B
CASA0B D23 D17 CASA1B CASA1B [81] 1D35V_VGA_S0

[81] CASA0B RASA0B D21 CASA0B CASA1B D19 RASA1B U4 AC4
[81] RASA0B RASA0B RASA1B RASA1B [81] CASB0B CASB1B
WEA0B G29 D11 WEA1B WEA1B [81] W4 AA4
[81] WEA0B WEA0B WEA1B L4 RASB0B RASB1B AJ7
WEB0B WEB1B
1
CKEA0 G21 E19 CKEA1 CKEA1 [81]
[81] CKEA0 CKEA0 CKEA1 R7802 W5 AA7
CLKA0 E31 D7 CLKA1 40D2R2F-GP CKEB0 CKEB1
[81] CLKA0 CLKA0 CLKA1 CLKA1 [81]
CLKA0B D31 D9 CLKA1B PX G4 AL5
[81] CLKA0B CLKA0B CLKA1B CLKA1B [81] CLKB0 CLKB1
J4 AL4
CLKB0B CLKB1B
2
R7804 1 2 120R2F-GP MEM_CALRA K15 K17 MVREFDA
PX MEM_CALRA MVREFDA TP7805 1MEM_CALRB R10 U10 MVREFDB 1 TP7807
MEM_CALRB MVREFDB
R7805 R7806
1
1
1 2 DEAM_RSTA#_R 1 2 DRAM_RST_A# L32 C7802 R7807

[81] DRAM_RST_A PX PX DRAM_RSTA# SC1U10V2KX-1DLGP 100R2F-L1-GP-U TP7806 1DRAM_RSTB# AM11
10R2F-L-GP R16M-G1-70-GP
REV 0.91
PX PX DRAM_RSTB#
REV 0.91
49D9R2F-GP
2
1
R16M-G1-70-GP
PX
2
1
C7804 R7812
PX
PX SC120P50V2JN-1GP PX 5K1R2F-2-GP
2
A A
<Core Design>
Wistron Corporation
Title
GPU (3/5) VRAM I/F
Custom
Bucky AMD A00
5 4 3 2 1
5 4 3 2 1
3D3V_VGA_S0
https://vinafix.com
R7998 DY1 2
0R2J-L-GP
Q7903
G GPU_AC_BATT#
1
GPU_AC_BATT#_R D
R7910
47KR2F-GP
R7909 3D3V_VGA_S0
1*1uF
PX PX47KR2F-GP GPU1E 5 OF 15 S
AM31 symbol5 W40 GPU_GPIO_0
VDD_33 GPIO_0
2
Q7901 AA40 GPU_GPIO_1
PX GPIO_1 2N7002K-2-GP
1
AA35 GPU_GPIO_2
SML1_SMBCLK 6 1 GPU_CLK C7903 GPIO_2
change to short pad. 84.2N702.J31 PX
D D
SC1U10V2KX-1DLGP R7938
Q1
[8,24] SML1_SMBCLK
2
5 2 AA34 GPU_GPIO_5 1 2 0R2J-L-GP GPU_AC_BATT#_R
PX GPIO_5_REG_HOT_AC_BATT U35 GPU_GPIO_6 1
PX 2 0R2J-L-GP VGA_PROCHOT#
4 3 GPIO_6_TACH PX
Q2
R7930
[8,24] SML1_SMBDATA GPU_ROMSO
AP25 1
3D3V_VGA_S0 GPIO_8_ROMSO AM25 GPU_ROMSI TP7918
SML1_SMBDATA SSM6N7002KFU-GP GPIO_9_ROMSI AM27 GPU_ROMSCK 1 3D3V_VGA_S0
GPIO_10_ROMSCK W41 GPU_GPIO_11 TP7905
[85] VGA_SVC GPU_DAT GPIO_11 Y40 GPU_GPIO_12
[85] VGA_SVD GPIO_12 GPU_GPIO_13
Y41
[85] VGA_SVT GPIO_13 AU21
GPIO_14_HPD2
1
AA41 GPU_GPIO_15
[24,44,85] VGA_PROCHOT# For Pre-PWROK Output Voltage R7941 R7943 GPIO_15 U34 GPU_GPIO_16 1 TP7901 R7983 1 2 5K1R2-GP
GPIO_16_8P_DETECT R37 GPU_GPIO_17 1 TP7906
DY
[24] GPU_AC_BATT# 4K7R2J-2-GP PX PX 4K7R2J-2-GP GPIO_17_THERMAL_INT AV25 GPU_GPIO_0 R7959 1 2 5K1R2-GP
GPIO_18_HPD3 R38 GPU_GPIO_19
PX
GPIO_19_CTF
2
1D8V_VGA_S0 AB40 GPU_GPIO_20 GPU_GPIO_1 R7984 1 2 5K1R2-GP
GPU_SCL AC35 GPIO_20 AB41 GPU_GPIO_21
DY
GPU_SDA AC34 SCL GPIO_21 AP27 GPU_ROMCSB 1 R7985 1 2 5K1R2-GP
[16] PEG_CLKREQ0_CPU_N SDA GPIO_22_ROMCSB W37 GPU_GPIO_29 TP7919 DY
GPIO_29
1
GPU_CLK AW40 W38 GPU_GPIO_2 R7960 1 2 5K1R2-GP
R7918 R7919 GPU_DAT AW41 SMBCLK GPIO_30 BA38
PX
10KR2J-L-GP SMBDAT GENERICA AV29 R7914 1 2 10KR2J-L-GP
[16,86] PE_GPIO1 10KR2J-L-GP GENERICB AU31
DY
PX DY GENERICC
20180730
AV31 GPU_GPIO_5 R7916 1 2 10KR2J-L-GP
GENERICD PX
2
2
VGA_SVC VGA_SVD AU25 3D3V_VGA_S0
VGA_SVC AU17 GENERICE_HPD4 AV23 GPU_GPIO_6 R7915 1 2 10KR2J-L-GP
1 GPIO_SVC GENERICF_HPD5 Q7904 PX
1
1D8V_VGA_S0 VGA_SVD AV17 AM29
R7923 R7924 VGA_SVT AR17 GPIO_SVD GENERICG G GPU_ROMSO R7961 1 2 5K1R2-GP
10KR2J-L-GP GPIO_SVT AV21
DY
10KR2J-L-GP HPD1
DY PX AN34 D R7936 1 PX 2 5K1R2-GP
AP31 DDCVGACLK
DDCVGADATA
2
1
S GPU_GPIO_11 R7964 1 2 5K1R2-GP
R7925 R7926
DY PX
1KR2J-1-GP PX PX 1KR2J-1-GP R7986 1 DY 2 5K1R2-GP
2N7002K-2-GP
84.2N702.J31 R7987 1 2 5K1R2-GP
DY
2
AV40 GPU_CLKREQ# R7995 1 PEG_CLKREQ0_CPU_N
C
TEST_PG AY13 CLKREQB AU40 GPU_WAKE# 1
DY 2 0R2J-L-GP GPU_GPIO_12 R7962 1 2 5K1R2-GP
C
TEST_PG_BACO BA13 TEST_PG WAKEB TP7916

PX
TEST_PG_BACO R7988 1 2 5K1R2-GP
DY
1
C7905 AC40 GPU_GPIO_13 R7963 1 2 5K1R2-GP
C7902 SC1U10V2KX-1DLGP DIGON PX
SC1U10V2KX-1DLGP AC37
PX BL_ENABLE
2
K41 AC38 R7996 1 DY 2 5K1R2-GP
PX R34 RSVD#K41 BL_PWM_DIM
RSVD#R34 GPU_HSYNC
W34 GPIO_9 GPIO_15 Must be set to 0 GPU_GPIO_15 R7997 1 PX 2 5K1R2-GP
HSYNC W35 GPU_VSYNC
VSYNC
for production
GPU_ROMSI R7913 1 2 5K1R2-GP
AG34
PX
SWAPLOCKA AE34
SWAPLOCKB AR29 GPU_GPIO_19 R7927 1 2 10KR2J-L-GP
GENLK_CLK AP29
PX
1D8V_VGA_S0 GENLK_VSYNC GPU_GPIO_20 R7965 1 2 5K1R2-GP
PX
Check address REV 0.91 R7921 1 2 10KR2J-L-GP
R16M-G1-70-GP
DY
GPU_GPIO_21 R7917 1 2 10KR2J-L-GP
PX DY
071.R16MG.0D0U R7958 1 DY 2 10KR2J-L-GP
1
GPU_ROMCSB R7932 1 2 1KR2J-1-GP

PX
R7949
PX
R7950
PX
R7951
DY
R7980
DY
R7979
DY
R7978
PX
R7955
DY
R7982 DY
R7966 1 PX 2 5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
PEG_CLKREQ0_CPU_N
GPU1K 11 OF 15 GPU_GPIO_29 R7967 1 2 5K1R2-GP
PX
2
symbol11
L40 DBGDATA0 Please set 00 pull down R7989 1 DY 2 5K1R2-GP
D
DBGDATA_0 L41 DBGDATA1
DBGDATA_1
If dGPU not display output
1
M40 DBGDATA2 84.2N702.J31
DBGDATA_2 M41 DBGDATA3 R7920 2N7002K-2-GP GPU_HSYNC R7957 1 2 10KR2J-L-GP
DBGDATA_3 N40 DBGDATA4
PX Q7902 DY
DBGDATA_4 10KR2J-L-GP
N41 DBGDATA5 R7929 1 PX 2 5K1R2-GP
B DBGDATA_5 P40 DBGDATA6 DY B
DBGDATA_6
2
P41 DBGDATA7
DBGDATA_7 R40 GPU_VSYNC 1 2 10KR2J-L-GP
DBGDATA_8 BOM Ctrl : R7920 ASM R7969 DY
G
S
R41 R7968 DY
DBGDATA_9 DY Q7902.C7907.R7968
1
T40 DY DY DY PX PX PX DY PX 30KR2F-GP R7928 1 PX 2 5K1R2-GP

DBGDATA_10 T41 R7972 R7973 R7971 R7952 R7953 R7954 R7981 R7956 Q7902_G 1 2 PE_GPIO1
DBGDATA_11 U40
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
5K1R2-GP
DBGDATA_12 U41 GPU_TESTEN R7942 1 2 1KR2J-1-GP

DBGDATA_13 DY
1
V40
DBGDATA_14 -1 C7907
2
V41 SCD47U6D3V2KX-GP R7901 1 2 1KR2J-1-GP

DBGDATA_15 DY: Q7902.C7907.R7968 PX
ASM: R7920
2
REV 0.91
R16M-G1-70-GP
DY GPU_JTAG_TRST# R7940 1 2 10KR2J-L-GP
PX
PX R7939 1 2 10KR2J-L-GP
DY
1D8V_VGA_S0 1D8V_VGA_S0
GPU_ROMSI R7935 1 2 1KR2J-1-GP
DY
1
DY R7912
R7908 1 2 GPU_XTALIN_R R7990 1 2 10KR2J-L-GP
DY DY
100MHz 4K99R2F-L-GP
0R2J-L-GP
GPU_CLKREQ# 1 2 10KR2J-L-GP
27MHz XTAL
U7902 PX R7922 PX
2
GPU1F 6 OF 15
1
PX 2MMZ1005D220CT-GP U7902_VDD 1 6 BA39 GPU_XTALIN 1
R7931
2 U7902_GPU_XTALIN
L7901 GPU_XTALIN_R 2 VDD VSS 5 U7902_SSON#
symbol6
XTALIN PX GPU_JTAG_TDO R7991 1 2 10KR2J-L-GP
GPU_XTALOUT_R 3 X1 SSON# 4 U7902_GPU_XTALIN 0R2J-L-GP
PX
1D8V_VGA_S0 X2 CLKOUT GPU_XTALIN_R GPU_JTAG_TDI R7992 1 2 10KR2J-L-GP
PX
1
C7909 C7908 change to short pad.

6P40089NTGI8-GP GPU_JTAG_TMS R7993 1 2 10KR2J-L-GP
PX PX PX
SCD1U25V2KX-1-DL-GP
SC10U6D3V3MX-DL-GP
071.40089.0003 X7901
2
GPU_JTAG_TCK R7994 1 2 10KR2J-L-GP

PX
R7999 GPU_XTALOUT_R 3 2 20180619 follow AMD design
AY39 GPU_XTALOUT 1 2 GPU_XTALOUT_R
XTALOUT DY
1
PX PX 0R2J-L-GP
PX
A A
10KR2J-L-GP 10KR2J-L-GP 4 1
R7903 R7902
AV15 PLLCHARZ_L 1 TP7902
PX PLLCHARZ_L
2
1 GPU1A 1 OF 15 AU15 PLLCHARZ_H 1 TP7903 XTAL-27MHZ-192-GP

PLLCHARZ_H <Core Design>
PX TP7914 symbol1 082.30008.0421
BP_0_R 1 R7905 2 33R2J-2-GP BP_0 AA38 AF41 GPU_JTAG_TDO 1 TP7904
BP_1_R 1 R7904 2 33R2J-2-GP BP_1 AA37 BP_0 JTAG_TDO AD40 GPU_JTAG_TDI 1 TP7910 1 2
BP_1 JTAG_TDI AD41 GPU_JTAG_TMS 1 TP7909 AY38 ANALOGIO R7970
PX 1MR2J-1-GP Wistron Corporation
PX TP7915 1 JTAG_TMS AE41 GPU_JTAG_TCK 1 TP7911
REV 0.91 ANALOGIO 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JTAG_TCK
1
1
R16M-G1-70-GP C7904 C7901 Taipei Hsien 221, Taiwan, R.O.C.
R7906 1 2 GPU_TEST6 B2 AE40 GPU_TESTEN 1 TP7912 R7911
TEST6 TESTEN AF40 GPU_JTAG_TRST# 1 TP7913 PX 16K2R2F-GP PX SC18P50V2JN-1DLGP PX SC18P50V2JN-1DLGP
Title
PX DY Title
JTAG_TRST#
GPU (4/5) GPIO/STRAP
2
2
10KR2J-3-GP
2
REV 0.91 Size

Size DocumentNumber
Document Number Rev
Rev
R16M-G1-70-GP C
Bucky AMD A00
Date: Sheet
Sheet 79 of 106
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
GPU1H 8 OF 15 GPU1G 7 OF 15
symbol8 GPU1O 15 OF 15 symbol7 1D8V_VGA_S0
AY22 symbol15 AY32
TX2P_DPD0P AY18 TX2P_DPB0P
BA22 TX2P_DPE0P BA32 1*1uF
TX2M_DPD0N BA18 TX2M_DPB0N
D AY21 TX2M_DPE0N AY31 D
TX1P_DPD1P AY16 TX1P_DPB1P
TX1P_DPE1P
1
BA21 BA31 C8001
TX1M_DPD1N BA16 TX1M_DPB1N
AY20 TX1M_DPE1N AY30
PX
SC1U10V2KX-1DLGP
TX0P_DPD2P TX0P_DPB2P
2
AY15 GPU1J 10 OF 15
BA20 TX0P_DPE2P BA30 symbol10
TX0M_DPD2N BA15 TX0M_DPB2N TSVDD AM13 N35 GPU_DPLUS 1 TP8002
AY19 TX0M_DPE2N AY28 TSVDD DPLUS
TXCDP_DPD3P AY14 TXCBP_DPB3P
BA19 TXCEP_DPE3P BA28 J8
TXCDM_DPD3N BA14 TXCBM_DPB3N TEMPIN0 N34 GPU_DMINUS 1 TP8001
AY11 TXCEM_DPE3N DMINUS
AUX1P J7
BA11 TEMPINRETURN
AUX1N U38 GPIO_FDO 1 TP8003
TP8004 1 TS_A N38 GPIO_28_FDO
TS_A
REV 0.91
AY10 AM21 R16M-G1-70-GP
C
DDC1CLK AU27 DDCAUX3P C
BA10 DDCAUX5P AP21 PX
DDC1DATA AV27 DDCAUX3N
DDCAUX5N
REV 0.91
R16M-G1-70-GP
PX
AY27 AY36
TX5P_DPC0P TX5P_DPA0P
BA27 BA36
TX5M_DPC0N TX5M_DPA0N
AY26 AY35
BA26 BA35
B B
AY25 AY34
BA25 BA34
AY24 AY33
TXCCP_DPC3P TXCAP_DPA3P
BA24 BA33
TXCCM_DPC3N TXCAM_DPA3N
AP19
AUX2P
AM19 PX
AUX2N 1 2AUX_ZVSS BA12
R8002 150R2F-4-L-GP AUX_ZVSS
AV19 AR23 <Core Design>

DDC2CLK DDCAUX4P
AU19 REV 0.91 AP23
DDC2DATA DDCAUX4N
A
REV 0.91
R16M-G1-70-GP R16M-G1-70-GP
PX PX Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU (5/5) PWR/GND

A4
Bucky AMD A00
5 4 3 2 1
5 4 3 2 1
[78] MAA1_[0:8] DQA1_[0:31] [78]

VRAM1B 2 OF 2
[78] MAA0_[0:8] DQA0_[0:31] [78]
VRAM2B 2 OF 2
https://vinafix.com
MAA1_7 K4 A4 DQA1_5
MAA0_7 K4 A4 DQA0_0 MAA1_1 H5 A8/A7 DQ0 A2 DQA1_3
MAA0_1 H5 A8/A7 DQ0 A2 DQA0_1 MAA1_0 H4 A9/A1 DQ1 B4 DQA1_4
MAA0_0 H4 A9/A1 DQ1 B4 DQA0_2 MAA1_6 K5 A10/A0 DQ2 B2 DQA1_2
MAA0_6 K5 A10/A0 DQ2 B2 DQA0_3 MAA1_8 J5 A11/A6 DQ3 E4 DQA1_7 Byte0
MAA0_8 J5 A11/A6 DQ3 E4 DQA0_4 Byte0 A12/A13 DQ4 E2 DQA1_1
A12/A13 DQ4 E2 DQA0_5 1D35V_VGA_S0 MAA1_2 H11 DQ5 F4 DQA1_6
1D35V_VGA_S0 MAA0_2 H11 DQ5 F4 DQA0_6 MAA1_5 K10 BA0/A2 DQ6 F2 DQA1_0
MAA0_5 K10 BA0/A2 DQ6 F2 DQA0_7 MAA1_4 K11 BA1/A5 DQ7 A11 DQA1_8
MAA0_4 K11 BA1/A5 DQ7 A11 DQA0_8 MAA1_3 H10 BA2/A4 DQ8 A13 DQA1_9
MAA0_3 H10 BA2/A4 DQ8 A13 DQA0_9 BA3/A3 DQ9 B11 DQA1_10
BA3/A3 DQ9 DQ10
2
B11 DQA0_10 ADBIA1 J4 B13 DQA1_11
DQ10 [78] ADBIA1 ABI# DQ11
2
ADBIA0 J4 B13 DQA0_11 R8102 R8104 RASA1B G3 E11 DQA1_12 Byte1
D [78] ADBIA0 ABI# DQ11 DQA0_12 [78] RASA1B CSA1B_0 RAS# DQ12 DQA1_13 D
R8103 R8105 RASA0B G3 E11 Byte1 60D4R2F-GP 60D4R2F-GP G12 E13
[78] RASA0B CSA0B_0 G12 RAS# DQ12 E13 DQA0_13 [78] CSA1B_0 L3 CS# DQ13 F11 DQA1_14
60D4R2F-GP 60D4R2F-GP PX PX CASA1B
[78] CSA0B_0 CS# DQ13 DQA0_14 [78] CASA1B CAS# DQ14 DQA1_15
PX PX CASA0B L3 F11 WEA1B L12 F13
[78] CASA0B CAS# DQ14 [78] WEA1B WE# DQ15
1
WEA0B L12 F13 DQA0_15 U11 DQA1_21
[78] WEA0B WE# DQ15 DQ16
1
1
U11 DQA0_23 CLKA1 J12 U13 DQA1_23
DQ16 DQA0_21 [78] CLKA1 CK DQ17 DQA1_20
CLKA0 J12 U13 CLKA1B J11 T11
[78] CLKA0 J11 CK DQ17 T11 DQA0_22 [78] CLKA1B J3 CK# DQ18 T13 DQA1_22
CLKA0B Swap 201800804 CKEA1
[78] CLKA0B CK# DQ18 DQA0_20 [78] CKEA1 CKE# DQ19 DQA1_16 Byte2
CKEA0 J3 T13 N11
[78] CKEA0 CKE# DQ19 N11 DQA0_19 Byte2 DDBIA1_0 D2 DQ20 N13 DQA1_19
DDBIA0_0 DQ20 DQA0_18 [78] DDBIA1_0 DDBIA1_1 DBI0# DQ21 DQA1_17
[78] DDBIA0_0 D2 N13 [78] DDBIA1_1 D13 M11
DDBIA0_1 D13 DBI0# DQ21 M11 DQA0_16 DDBIA1_2 P13 DBI1# DQ22 M13 DQA1_18
[78] DDBIA0_1 DDBIA0_2 DBI1# DQ22 DQA0_17 [78] DDBIA1_2 DDBIA1_3 DBI2# DQ23 DQA1_30
P13 M13 P2 U4
[78] DDBIA0_2 DDBIA0_3 DBI2# DQ23 DQA0_26 [78] DDBIA1_3 DBI3# DQ24 DQA1_29
[78] DDBIA0_3 P2 U4 U2
DBI3# DQ24 U2 DQA0_28 DRAM_RST_A J2 DQ25 T4 DQA1_28
DRAM_RST_A DQ25 DQA0_27 [78,81] DRAM_RST_A RESET# DQ26 DQA1_31
J2 T4 T2
[78,81] DRAM_RST_A RESET# DQ26 DQA0_29 SEN_A1 DQ27 DQA1_24 Byte3
T2 R8106 1 PX 2 1KR2J-1-GP J10 N4
1 2 1KR2J-1-GP SEN_A0 J10 DQ27 N4 DQA0_25 Byte3 1 2 120R2F-GP ZQ_A1 J13 SEN DQ28 N2 DQA1_27
MF = 0
R8107 PX R8108 PX
ZQ_A0 SEN DQ28 DQA0_30 MF_A1 ZQ DQ29 DQA1_25
MF = 0
R8109 1 PX 2 120R2F-GP J13 N2 R8110 1 PX 2 1KR2J-1-GP J1 M4
R8111 1 2 1KR2J-1-GP MF_A0 J1 ZQ DQ29 M4 DQA0_24 MF DQ30 M2 DQA1_26
PX MF DQ30 M2 DQA0_31 WCKA1_0 D4 DQ31
WCKA0_0 DQ31 [78] WCKA1_0 WCKA1B_0 WCK01 EDCA1_0
D4 D5 C2
[78] WCKA0_0 WCKA0B_0 WCK01 EDCA0_0 [78] WCKA1B_0 WCK01# EDC0 EDCA1_1 EDCA1_0 [78]
D5 C2 C13
[78] WCKA0B_0 WCK01# EDC0 EDCA0_1 EDCA0_0 [78] WCKA1_1 EDC1 EDCA1_2 EDCA1_1 [78]
C13 EDCA0_1 [78] P4 R13 EDCA1_2 [78]
WCKA0_1 P4 EDC1 R13 EDCA0_2 [78] WCKA1_1 WCKA1B_1 P5 WCK23 EDC2 R2 EDCA1_3
[78] WCKA0_1 WCKA0B_1 WCK23 EDC2 EDCA0_3 EDCA0_2 [78] [78] WCKA1B_1 WCK23# EDC3 EDCA1_3 [78]
P5 R2 EDCA0_3 [78]
[78] WCKA0B_1 WCK23# EDC3
H5GC4H24AJR-T2C-GP
H5GC4H24AJR-T2C-GP
PX
PX
1D35V_VGA_S0 1D35V_VGA_S0
VRAM2A 1 OF 2 VRAM1A 1 OF 2
1D35V_VGA_S0
C5 B5 1D35V_VGA_S0 C5 B5
C10 VDD VSS B10 C10 VDD VSS B10
D11 VDD VSS D10 D11 VDD VSS D10
VDD VSS VDD VSS
1
C G1 G5 G1 G5 C
VDD VSS VDD VSS
1
R8112 G4 G10 G4 G10
2K37R2F-GP G11 VDD VSS H1 R8114 G11 VDD VSS H1
G14 VDD VSS H14 2K37R2F-GP G14 VDD VSS H14
PX L1 VDD VSS K1 L1 VDD VSS K1
VDD VSS PX VDD VSS
2
L4 K14 L4 K14
VDD VSS VDD VSS
2
VREFC_A0 L11 L5 L11 L5
L14 VDD VSS L10 VREFC_A1 L14 VDD VSS L10
P11 VDD VSS P10 P11 VDD VSS P10
VDD VSS VDD VSS
1
R5 T5 R5 T5
VDD VSS VDD VSS
1
1
R8118 C8103 R10 T10 R10 T10
VDD VSS VDD VSS
1
5K49R2F-GP R8117 C8102
PX SC1U10V2KX-1DLGP B1 A1 5K49R2F-GP B1 A1
PX VDDQ VSSQ VDDQ VSSQ
2
B3 A3 PX SC1U10V2KX-1DLGP B3 A3
VDDQ VSSQ PX VDDQ VSSQ
2
2
B12 A12 B12 A12
VDDQ VSSQ VDDQ VSSQ
2
B14 A14 B14 A14
D1 VDDQ VSSQ C1 D1 VDDQ VSSQ C1
E5 VDDQ VSSQ C12 E5 VDDQ VSSQ C12
E10 VDDQ VSSQ C14 E10 VDDQ VSSQ C14
F1 VDDQ VSSQ E1 F1 VDDQ VSSQ E1
1D35V_VGA_S0 1D35V_VGA_S0 F3 VDDQ VSSQ E3 1D35V_VGA_S0 1D35V_VGA_S0 F3 VDDQ VSSQ E3
G2 VDDQ VSSQ F5 G2 VDDQ VSSQ F5
VDDQ VSSQ VDDQ VSSQ
1
1
G13 F10 G13 F10
R8113 R8115 H3 VDDQ VSSQ H2 R8116 R8122 H3 VDDQ VSSQ H2
2K37R2F-GP 2K37R2F-GP H12 VDDQ VSSQ H13 2K37R2F-GP 2K37R2F-GP H12 VDDQ VSSQ H13
K3 VDDQ VSSQ K2 K3 VDDQ VSSQ K2
PX PX K12 VDDQ VSSQ K13
PX PX K12 VDDQ VSSQ K13
VDDQ VSSQ VDDQ VSSQ
2
2
L2 M5 L2 M5
VREFD1_A0 VREFD2_A0 L13 VDDQ VSSQ M10 VREFD1_A1 VREFD2_A1 L13 VDDQ VSSQ M10
M1 VDDQ VSSQ N1 M1 VDDQ VSSQ N1
M3 VDDQ VSSQ N3 M3 VDDQ VSSQ N3
VDDQ VSSQ VDDQ VSSQ
1
1
M12 N12 M12 N12
VDDQ VSSQ VDDQ VSSQ
1
1
R8119 C8104 R8120 C8105 M14 N14 R8121 C8106 R8123 C8107 M14 N14
B
5K49R2F-GP 5K49R2F-GP N5 VDDQ VSSQ R1 5K49R2F-GP 5K49R2F-GP N5 VDDQ VSSQ R1 B
SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP N10 VDDQ VSSQ R3 SC1U10V2KX-1DLGP SC1U10V2KX-1DLGP N10 VDDQ VSSQ R3
PX PX PX PX VDDQ VSSQ PX PX PX PX VDDQ VSSQ
2
2
P1 R4 P1 R4
VDDQ VSSQ VDDQ VSSQ
2
2
P3 R11 P3 R11
P12 VDDQ VSSQ R12 P12 VDDQ VSSQ R12
P14 VDDQ VSSQ R14 P14 VDDQ VSSQ R14
T1 VDDQ VSSQ U1 T1 VDDQ VSSQ U1
VDDQ VSSQ VDDQ VSSQ
VREFC_A0 J14 A5 VREFC_A1 J14 A5
VREFC VPP/NC#A5 U5 VREFC VPP/NC#A5 U5
VREFD1_A0 A10 VPP/NC#U5 VREFD1_A1 A10 VPP/NC#U5
VREFD2_A0 U10 VREFD VREFD2_A1 U10 VREFD
VREFD VREFD
8*0.1uF 8*0.1uF
8*1uF H5GC4H24AJR-T2C-GP 8*1uF H5GC4H24AJR-T2C-GP
1*10uF PX 1*10uF PX
20180530 20180530
1D35V_VGA_S0 FOR VRAM1 1D35V_VGA_S0 FOR VRAM2

1
1
C8108 C8109 C8110 C8111 C8112 C8113 C8114 C8115 C8116 C8117 C8118 C8119 C8120 C8121 C8122 C8123 C8124 C8125
PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX
SC10U6D3V3MX-DL-GP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
2
2
A A
<Core Design>
FC8101 FC8102 C8101 C8126 C8127 C8128 C8146 C8129 C8130 C8132 FC8103 FC8104 C8134 C8135 C8136 C8137 C8138 C8139 C8140 C8141
1
1
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX Wistron Corporation
2
2
Title
GPU VRAM1,2 (1/4)
C
3/9 RF request Bucky AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
GPU VRAM3,4 (2/4)
C
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = dGPU

https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
GPU-VRAM5,6 (3/4)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = dGPU

https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A A
Wistron Corporation
Title
GPU-VRAM7,8 (4/4)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
OFFPAGE Main Func = GPU VDDC VR Main Func = GPU VDDC 2ph H/LS MosFET and Output LC
PR8578
0R0402-PAD-1-GP 19V_DCBATOUT
1 2 PWR_GPU_VRHOT#
PU8552
3D3V_VGA_S0 2
https://vinafix.com
PR8538 3
1 2 PWR_VDDC_SVT PWR_VDDC_HGA PWR_VDDC_HGA_A 1 4
[79] VGA_SVT PX
1
1
1
PR8543 10
PC8552 PC8553 PC8554 PC8556
0R0402-PAD-1-GP 10KR2F-2-GP 9
PX PX PX PX PX DY PC8555
10KR2F-2-GP PWR_VDDC_LGATENB
PR8579
10KR2F-2-GP PWR_VDDC_UGATENB
PR8580
1
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
7 SCD1U25V2KX-L-GP
PX 待確認
2
PWR_VDDC_LGA
2
8 6
5
PR8521 PX PX
2
1 2 PWR_VDDC_SVC
D [79] VGA_SVC PX PWR_VDDC_PGOOD
D
1
0R0402-PAD-1-GP FDMS3600-02-RJK0215-COLAY-GP
PWR_VDDC_ISUMNB
PWR_VDDC_VSENNB
PR8524
PWR_VDDC_SVD
PR8555
10KR2J-3-GP 1st = 075.06994.0037 20180417
1 2
[79] VGA_SVD PX DY 0.15uH 7.6mmX6.8mmX4mm
VGA_CORE
2
0R0402-PAD-1-GP DCR : 0.66 +/- 7% PL8551
PWR_VDDC_PHA IDC : 36A , ISAT : 45A 1 2
PR8583 PX
0R0402-PAD-1-GP COIL-D15UH-2-GP
1 PR8518 2 PWR_VDDC_PGOOD PWR_VDDC_BOOTNB 1 2 PR8551
[16,24] VDDC_PWRGD 0R0402-PAD-1-GP
5V_S5
2D2R3-1-U-GP
PX
PWR_VDDC_BOOTA PWR_VDDC_BOOTA_A PT8551 PT8552 PT8553
1
1 2 1 2
2
3D3V_VGA_S0
20180619 PR8557
ST560U2VM-GP
ST560U2VM-GP
ST560U2VM-GP
PC8551 DY 2D2R5F-2-GP PG8559 PG8560
PX
40
39
38
37
36
35
34
33
32
31
2
PU8501 5V_S5 SCD22U25V3KX-GP
PR8591 20151209
PX PX PX
VSEN_NB
FB_NB
COMP_NB
ISUMP_NB
ISUMN_NB
PGOOD_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
1
1 DY 2 change to 25V cap GAP-CLOSE-PWR-3-GP
PWR_VDDC_SNBA GAP-CLOSE-PWR-3-GP
10KR2F-2-GP
1
PR8581 100KR2J-1-GP PR8516 PR8548
PR8540 1 2 PWR_VDDC_NTCNB 1 30 PWR_VDDC_BOOTB
1 2 PWR_VDDC_ENABLE PX NTC_NB BOOT2
0R0402-PAD-1-GP 1R5J-2-GP DY PC8560
SC1KP50V2KX-L-1-GP
[86] VDD1D8V_PG PX PX
2
1 2 PWR_VDDC_IMONNB 2 29 PWR_VDDC_HGB
0R2J-L-GP
PX IMON_NB UGATE2 VCORE :330uF/9m ohm * 5pcs+22uF * 20pcs
2
PR8582 100KR2J-1-GP PWR_VDDC_SVC 3 28 PWR_VDDC_PHB
[86] PWR_VDDC_ENABLE SVC PHASE2
PWR_GPU_VRHOT# 4 27 PWR_VDDC_LGB
PWR_VDDC_VDDIO VR_HOT# LGATE2 PR8563
PWR_VDDC_SVD 5 26 PWR_VDDC_VDDP PC8510 1
PX 2 SC1U10V2KX-L1-GP PWR_VDDC_ISEN1 1 2 10KR2F-L1-GP
SVD ISL62771HRTZ-GP-U VDDP PX
PWR_VDDC_VDDIO 6 25 PWR_VDDC_VDD PC8511 1 2 SC1U10V2KX-L1-GP PR8552
VDDIO VDD 3K65R2F-1-GP
PR8519 PWR_VDDC_SVT 7 24 PWR_VDDC_LGA PWR_VDDC_ISEN1_P_A 1 2 PWR_VDDC_ISEN1_PA
0R0402-PAD-1-GP SVT PX LGATE1 PX PX
2 1 PWR_VDDC_VSEN1_N PWR_VDDC_ENABLE 8 23 PWR_VDDC_PHA
20180619 follow AMD design PR8553
[77] FB_VSS ENABLE PHASE1 10R2F-L-GP
TDC=20A
PWR_VDDC_PWROK 9 22 PWR_VDDC_HGA PWR_VDDC_ISEN1_N_A 1 2 PWR_VDDC_ISEN1_NA
PWROK UGATE1 3D3V_S5 PX
PWR_VDDC_IMON PWR_VDDC_BOOTA
2
PR8520 PR8522 10 21 U8503

IMON BOOT1 5 1 PWR_VDDC_PGOOD_R 2 1PWR_VDDC_PGOOD
C 0R0402-PAD-1-GP
2 1 PWR_VDDC_VSEN1_P
0R2J-L-GP
41 VCC A DY C
DY PR8523 R8522 0R2J-2-GP
EDC=50A
[77] FB_VDDC GND DGPU_HOLD_RST#_R 1DGPU_HOLD_RST#
2
DY 2 2 DY
B
133KR2F-GP
PC8518
PX PC8512 R8521 0R2J-2-GP
PGOOD
PX PX
ISUMN
ISUMP
1
COMP
PWR_VDDC_PWROK 1PLT_RST#
ISEN2
ISEN1
VSEN
SC1KP50V2KX-L-1-GP SC1KP50V2KX-L-1-GP 4 3 2 DY
NTC
RTN
Y GND
1
R8523 0R2J-2-GP
FB
1
2
SNLVC1G08DCKRG4-GP
11
12
13
14
15
16
17
18
19
20
PX PC8513
SCD1U25V2KX-L-GP 74.62771.033 73.01G08.DHG 19V_DCBATOUT
Place close to PU8552 20180525 follow Vegas
2
PU8553
2
20180525 PR8525 PR8526
PR8592 3
PWR_VDDC_PGOOD 1 2PWR_VDDC_PWROK PWR_VDDC_HGB PWR_VDDC_HGB_A
PWR_VDDC_VSEN1_N
PWR_VDDC_VSEN1_P
15K4R2F-GP NTC-470K-17-GP PX 1 4
PWR_VDDC_NTC_A PWR_VDDC_NTC
1
1 2 1 2 10
PWR_VDDC_ISUMN
1D8V_VGA_S0 PWR_VDDC_VDDIO PC8514 PC8559 PC8558 PC8561 PC8557
0R2J-L-GP PR8527 SC1KP50V2KX-L-1-GP 9 PX PX PX PX PC8564
PX PX PX DY
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
PG8503 301R2F-GP 7 SCD1U25V2KX-L-GP
PWR_VDDC_FB PX PWR_VDDC_FB_A 1 PX 2 PWR_VDDC_VSEN1_P PWR_VDDC_LGB PWR_VDDC_LGB
2
GAP-CLOSE-PWR-3-GP PR8529 1 2 8 6
PWR_VDDC_VDDIO 27K4R2F-GP 5
1 2 PC8515 20180808
1 2
PC8524 1
PX 2 SCD22U10V2KX-L1-GP SC220P50V2JN-3DLGP PX PR8528 change to 1.13Kohm for 0.6mm LL
PX PWR_VDDC_COMP 768R2F-1-GP By Intersil review
1
1 2 1 2 FDMS3600-02-RJK0215-COLAY-GP
PWR_VDDC_ISEN1_N_A PC8525 1 2 SCD22U10V2KX-L1-GP PR8558
PR8530 1st = 075.06994.0037
20180619 PWR_VDDC_ISEN2
PX
PWR_VDDC_ISEN2
PC8516
SC390P50V2KX-GP-UPX
27KR2F-L-GP
PR8531
2KR2F-3-GP
PC8517
SC330P50V2KX-3GP
DY 10KR2J-3-GP
20180417
1 2 PWR_VDDC_COMP_A 1 2 1 2 PWR_VDDC_COMP_B 1 2
DCR : 0.66 +/- 7% VGA_CORE
2
PX PX PX PL8552
1
[17,24,61,63,68,76] PLT_RST# PWR_VDDC_ISEN1 PWR_VDDC_ISEN1 PX PWR_VDDC_PHB
IDC : 36A , ISAT : 45A
PR8532 DY 1 PX 2
[16,76] DGPU_HOLD_RST# 32K4R2F-1-GP COIL-D15UH-2-GP
PR8562
PWR_VDDC_ISEN1_P_A 2D2R3-1-U-GP
PWR_VDDC_BOOTB PWR_VDDC_BOOTB_A
1
1 2 1 2
PX
1
2
PR8560
PX 2D2R5F-2-GP
PC8563 DY PG8562 PG8561
PR8533
1PWR_VDDC_ISUMP
SCD22U25V3KX-GP
2K61R2F-1-GP
PX 20151209
1
PR8534 change to 25V cap GAP-CLOSE-PWR-3-GP
2
PWR_VDDC_SNBB
1
1
PR8535 PC8519 PC8520 10R2J-2-GP GAP-CLOSE-PWR-3-GP
1 2
11KR2F-L-GP
SCD1U25V2KX-L-GP
PX PX
1
PX DY
2
2
B B
PC8521 DY PC8562
SCD1U25V2KX-L-GP
SCD01U50V2KX-L-GP SC1KP50V2KX-L-1-GP
2
2
1 2
PR8536
PX
PX
NTC-10K-29-GP-U PC8522
SC330P50V2KX-3GP PWR_VDDC_ISEN2 1 PR8564 2 10KR2F-L1-GP
PR8537 2 1
20180417 PX
2
402R2F-GP
PWR_VDDC_ISEN1_N_A 1 PX 2
DY PR8539 PR8561
10R2J-2-GP 3K65R2F-1-GP
2 1 PWR_VDDC_ISEN1_P_A 1 2 PWR_VDDC_ISEN1_PB
20180814 VGA_CORE PX
1
Place close to PL8551 change to 499ohm DY

PC8523 PR8559
PX SCD1U25V2KX-L-GP By Intersil review 10R2F-L-GP
PWR_VDDC_ISEN1_N_A PWR_VDDC_ISEN1_NB
2
1 2
PX
A A
<Core Design>
Wistron Corporation
Title Title
dGPU_VDDC
Size Size Document Number
Document Number Rev Rev
Custom A00
Bucky AMD
Date:Date:
Friday, December 28, 2018 Sheet
Sheet 85 of 105
5 4 3 2 1
5 4 3 2 1
AOZ2260 For 1D35V

OFFPAGE-Signal Main Func = 0D875V VR Main Func = 1D35V VR
OFFPAGE-GAP OFFPAGE-GAP
PWR_DCBATOUT_0D875V PWR_DCBATOUT_1D35V
https://vinafix.com
AOZ2262 For 0D875V

19V_DCBATOUT 19V_DCBATOUT
3D3V_VGA_S0
PG8601 PG8641
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1
1 2 1 2
PR8648
D
PG8602
GAP-CLOSE-PWR-3-GP
PG8642
GAP-CLOSE-PWR-3-GP
100KR2J-1-GP
DY 5V_S5 TDC : 3.78A D
IMAX : 5.4A
2
1 2 1 2 Cyntec. 4.7 x5.2 x 3.0mm
PR8691
3D3V_S5
PWR_1D35V_PG DCR: 13~14mOhm
1 DY 2 Idc : 7A , Isat : 11A
3D3V_VGA_S0
1
PWR_1D35V
TDC : 5.6A
PC8642 PU8641
1
PL8641
0R2F-1-GP SC4D7U25V5KX-DL-GP PX PX 1
PR8608 21 18 PWR_1D35V_PH 2
PX 100KR2J-1-GP VCC LX#18
2
PR8690 17
PWR_0D875V_EN
IMAX : 8A LX#17 COIL-1UH-73-GP
1
1 2 PWR_DCBATOUT_1D35V 16
[85,86] VDD1D8V_PG PX 5V_S5 LX#16 11
0R2J-L-GP PX PC8644
2
CHILISIN. 4.7 x4.85 x 2.8mm LX#11
1
PR8696 7 10 SCD1U25V2KX-1-DL-GP PC8641 PC8643 PC8645 PC8647 PC8646
DCR: 11~12mOhm IN LX#10
2
PWR_1D35V_EN
2
1 2 0D875V_VGA_S0 PWR_0D875V 1D35V_VGA_S0 PWR_1D35V 8
PX PWR_0D875V_PG PC8648
IN PWR_1D35V_BT PX PX PX PX DY
1
0R2J-L-GP Idc : 8.5A , Isat : 11A PC8649 PC8650 9
IN BST
20 PG8650
2
DY
SCD1U25V2KX-1-DL-GP
PG8604 PG8644 PX PX PR8641 GAP-CLOSE-PWR-3-GP
1
PC8602 PU8601 PWR_0D875V
PWR_1D35V_VFB
SC10U25V3MX-5-GP
5
SC10U25V3MX-5-GP
20180619 GAP-CLOSE-PWR-3-GP
SC4D7U25V5KX-DL-GP PX PL8601 GAP-CLOSE-PWR-3-GP 95K3R2F-GP
FB
1
2 1 2 1 1 2 PWR_1D35V_TON 6
21 18 PWR_0D875V_PH 1 2
VCC LX#18 PX PX
TON
2
17 PWR_1D35V_PG
LX#17 1 4 SC22U6D3V3MX-1-DL-GP
1
PWR_DCBATOUT_0D875V 16 PGOOD AGND PWR_1D35V_VFB_A SC22U6D3V3MX-1-DL-GP
[77] VDDCI_SENSE_P
PG8605 LX#16 11 PX PC8604 IND-D68UH-148-GP
PG8645
PWR_1D35V_EN 2 19 SC22U6D3V3MX-1-DL-GP
GAP-CLOSE-PWR-3-GP LX#11 GAP-CLOSE-PWR-3-GP
1
7 10 SCD1U25V2KX-1-DL-GP PC8601 PC8603 PC8605 PC8607 PC8606 PE_GPIO1 EN PGND
2 1 2 1 1 2 14 SC22U6D3V3MX-1-DL-GP
IN#7 LX#10 DY
2
8 PWR_1D35V_PFM PGND
IN#8 PWR_0D875V_BT PX PX PX PX DY PR8689 0R2J-L-GP 3 13 SC22U6D3V3MX-1-DL-GP
1
PC8608 PC8609 PC8610 9 20 PG8610 PWR_0D875V_PG 1 PFM# PGND
DY DY 2 12
IN#9 BST PX
2
PR8601
PX PX GAP-CLOSE-PWR-3-GP PWR_1D35V_SS PGND
1
PG8606 PWR_0D875V_VFB PG8646 PR8694 0R2J-L-GP 22 PX 15 PC8652
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
PX 68KR2F-GP 5
SCD1U25V2KX-1-DL-GP
SS PGND
GAP-CLOSE-PWR-3-GP FB GAP-CLOSE-PWR-3-GP PR8642
R1 DY SC220P50V2KX-3DLGP
1
1 2 PWR_0D875V_TON 6
1
2 1 2 1 3K16R2F-GP
TON 20180619
2
1
PWR_0D875V_PG PC8654 PR8643 AOZ2260QI-10-GP
1 4 SC22U6D3V3MX-1-DL-GP
1
SC1KP50V2KX-1DLGP
100KR2F-L3-GP
PGOOD AGND PWR_0D875V_VFB_A SC22U6D3V3MX-1-DL-GP PX PX PC8653 074.02260.0043
2
PG8607 PWR_0D875V_EN 2 19 SC22U6D3V3MX-1-DL-GP
PG8647 PX SCD01U50V2KX-1DLGP
2
GAP-CLOSE-PWR-3-GP EN PGND 14 GAP-CLOSE-PWR-3-GP
2
2 1 PWR_0D875V_PFM 3 PGND 2 1
13 SC22U6D3V3MX-1-DL-GP
PFM# PX PGND 12
PWR_0D875V_SS 22 PGND PX
1
15 PC8612
1
PG8608 SS PGND DY PG8648
GAP-CLOSE-PWR-3-GP
PR8602
R1 SC1KP50V2KX-1DLGP GAP-CLOSE-PWR-3-GP PR8644
R2
1
11K5R2F-GP
2 1 2 1 4K53R2F-1-GP Vo=0.8x(1+R1/R2)
2
PX
1
C PC8614 PR8603 AOZ2262QI-10-GP-U C
1
=0.8x(1+3.16/4.53)
OFFPAGE-Signal
100KR2F-L3-GP
SC1KP50V2KX-1DLGP PC8613
PX PX PX 074.02262.0043
2
SCD01U50V2KX-1DLGP
2
PG8609 PG8649 =1.35V
2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
2
2 1 2 1
1
PG8611
GAP-CLOSE-PWR-3-GP
2 1
PR8604
PX R2 Vo=0.8x(1+R1/R2)
=0.8x(1+11.5/121) D8601
121KR2F-L-GP
PWR_1D35V_EN
=0.8760 2
2
3 3.3V_RUN_VGA_1
PG8612 PX
GAP-CLOSE-PWR-3-GP
2 1 PWR_VDDC_ENABLE 1
BAT54C-12-GP
PR8692 75.00054.A7D
0R2F-1-GP
VDDCI_SENSE_P 1 2 PWR_0D875V_VFB_A
DY
[16,79,86] PE_GPIO1
[85] PWR_VDDC_ENABLE
Main Func = dGPU GPU PWR Sequencing
SSID = PWR.Plane.Regulator_VDD1D8V
201805025 follow Vegas/turis
3D3V_VGA_S0
B
3D3V_S0 to 3D3V_VGA_S0 Transfer =>1D8V_VGA_S0 B
APL5934 For 1D8V

=> 1D35V_VGA_S0/0D875V_VGA_S0/ VGA_CORE
3D3V_S0 3D3V_VGA_S0
3D3V_S5 PR8693 1 2 0R2J-2-GP

DY
OFFPAGE-Signal 3D3V_VGA_S0
S D
084.03415.0031 PX
1
PC8693
PC8694
PC8691
SCD1U16V2KX-3GP
PQ8609
1
PR8606
100KR2J-1-GP
DY DY
G
PJA3415-GP
PR8619
100KR2J-1-GP
DY PX 3D3V_VGA discharge
5V_S5
1
3D3V_S5 DY DY PC8692
1
VDD1D8V_PG SCD1U16V2KX-3GP
2
[85,86] VDD1D8V_PG DY PR8609
2
75R2F-2-GP
1
PC8684 3.3V_ALW_1
SC1U10V2KX-1DLGP PX
PH on EE Side
2
2
1
3D3V_VGA_S0 PC8689
PX Design current=700mA
3.3V_RUN_VGA_1
SC10U6D3V3MX-DL-GP
4
IMAX = 1.013A PQ8604
1
OFFPAGE-GAP
Note:ZZ.27002.F7C01
2 2N7002KDW-1-GP
PU8672
PR8681
APL5934KAI-TRG-GP-U PWR_VDD1D8V 75.27002.F7C PX
PX 10KR2F-2-GP 2nd = 075.67002.007C
PG8681 5 3rd = 075.063D1.007C
3
GAP-CLOSE-PWR-3-GP 6 VIN#5 4 4th = 075.07002.0A7C
2
VDD1D8V_PG 2 1 PWR_VDD1D8V_PG 7 VCNTL VOUT#4 3

PWR_VDD1D8V_EN 8 POK VOUT#3 2 PWR_VDD1D8V_FB
1D8V_VGA_S0 PG8682 PWR_VDD1D8V PE_GPIO1 1 2 EN FB
9 1
D01R5F-GP PR8682 DY VIN#9 GND
1
1 2 3D3V_VGA_S0 0R2J-L-GP PR8661 1PX 2 DGPU_PWR_EN_R

[16,79,86] PE_GPIO1
10KR2J-L-GP High Active
1
1
PR8683 PX PC8686 PC8685 PC8687
1
PX DY PR8695 1 PX 2 0R2J-L-GP DY DY PX PX PC8690
SC68P50V2JN-1DLGP
SC22U6D3V5MX-2DLGP
SC10U6D3V3MX-DL-GP
1MR2J-1-GP PR8685
R1PX 20KR2F-L-GP
SCD47U25V3KX-1GP
074.05934.003D
2
2
1
20180525
1
PR8684 PC8688
2
A A
47KR2J-2-GP DY DY SCD1U25V2KX-1-DL-GP
2
2
<Core Design>
R2 PX PR8686
16KR2F-GP
D8602
Vout=0.8V*(R1+R2)/R2 Wistron Corporation
PWR_VDD1D8V_EN 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

3 3.3V_RUN_VGA_1
PX Title
Title
PWR_0D875V_EN 1
0D875V/VDD1D8V/1D35V
BAT54C-12-GP Size Document
Number RevRev
75.00054.A7D Custom
Bucky AMD A00
Date: Sheet 86
Sheet of 14
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A
Title
GPU DISCHARGE
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = UnusedParts
https://vinafix.com
H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H17
HOLE276R150-GP HOLE276R150-GP HOLE276R150-GP HOLE276R150-GP HOLE276R150-GP
HOLE276R150-GP HOLE276R150-GP HOLE335R115-GP HOLE335R178-GP HOLE237R170-GP HOLE256R126-1-GP HOLE256R126-1-GP HOLE256R126-1-GP HOLE256R126-1-GP HOLE256R126-1-GP HOLE237R103-GP
1
1
1
ZZ.00PAD.H91 ZZ.00PAD.H91 ZZ.00PAD.H91 ZZ.00PAD.H91 ZZ.00PAD.H91
ZZ.00PAD.H91
ZZ.00PAD.H91 ZZ.00PAD.7F1 ZZ.00PAD.00K ZZ.00PAD.Z61 ZZ.00PAD.Z61 ZZ.00PAD.Z61 ZZ.00PAD.Z61
ZZ.00PAD.Z61 ZZ.00PAD.EJ1
ZZ.00PAD.D01
D D
Remove SPR1 by EMI 20180815 follow EMN
STF237R113H62-4-GP
BS2 HS1 19V_DCBATOUT
STF237R113H86-GP
SPR2
SPRING-12-GP-U1
1
DY OPS TC8901
ST100U25VDM-1-GP
077.C1071.0071
2
1
1
34.4SE26.001 434.07K0E.0001
34.41Y19.001 For acoustic noice
Main Func = EMI Capacitors 0.1u->1KP by EMI 20180928

by EMI 20180928
1D2V_S3
3D3V_S0
0.1u->1KP by EMI 20180928
0.1u->1KP by EMI 20180808
5V_S5
Mind the voltage rating of the caps. EMI 20181002
EC8952 EC8950 EC8951 EC8953 VGA_CORE
1
19V_DCBATOUT EC8949 EC8947 EC8948 EC8959 EC8960 EC8969 EC8970 EC8971
1
EC8902 EC8903 EC8904 EC8905 EC8906 EC8907 EC8908 EC8909 EC8910
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
EC8901
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC100P50V2JN-3DLGP
SC1KP50V2KX-1DLGP
SC100P50V2JN-3DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC100P50V2JN-3DLGP
SC1KP50V2KX-1DLGP
EC8917 EC8919 EC8925 DY DY DY DY DY DY EC8961 EC8965 EC8966 EC8967 EC8968
2
1
1
2
2
DY DY DY DY DY
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
C C
2
2
0.1u->1KP by EMI 20180928
EC8911 EC8912 EC8913 EC8914 EC8915 5V_S0
1
1
EC8962
EC8928 EC8929
1
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
DY DY DY EC8935 EC8934 EC8933 EC8938 EC8936 EC8937 EC8939
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
1
2
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
DY
SC1U10V2KX-1GP
2
2
EMI 20180817
PWR_AD_A
19V_DCBATOUT
EMI 20181002
EC8973 EC8972 EC8975 EC8974 EC8976 EC8977
1
EC8957 EC8963 EC8954 EC8958
1
1
1
DY DY DY DY DY DY
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
2
2
2
B
Main Func = RF Capacitors B
Mind the voltage rating of the caps.
19V_DCBATOUT 0.1uF 0402 x 15

3D3V_S5 0.1uF 0402 x 5 5V_S5
0.1uF 0402 x 5
1
1
FC8916 FC8917 FC8918 FC8919 FC8920 FC8921 FC8922 FC8923 FC8924 FC8925 FC8926 FC8927 FC8928 FC8929 FC8930
1
FC8901 FC8902 FC8903 FC8904 FC8905 FC8906 FC8907 FC8908 FC8909 FC8910
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
2
2
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
SCD1U10V2KX-4DLGP
2
20180912
A A
<Core Design>
Wistron Corporation
Title
UNUSED PARTS/EMI Capacitors

A2
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
SSID = TPM
https://vinafix.com
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
TPM2.0
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C (Blanking) C
B B
<Core Design>
A
Title
(Reserved)Finger Print
A4
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A A
Wistron Corporation
Title
LVDS_Switch
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
(Blanking)
B B
<Core Design>
A A
Wistron Corporation
Title
CRT_Switch
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Main Func = Debug

https://vinafix.com
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
CPU_XDP;PCH_XDP
A3
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
https://vinafix.com
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
CLK Block Diagram
A2
Bensolo AMD A00
5 4 3 2 1
5 4 3 2 1
Change notes -
DATE VERSON DATE Page Modify List OWNER https://vinafix.com
D D
C C
B B
<Core Design>
A A
Wistron Corporation
Title
Change History
A3
Bensolo AMD A00
5 4 3 2 1
A B C D E
https://vinafix.com
AC mode
+DC_IN
4 +3D3V_VDD_DCIN 4
DC_IN_OK
AD+ / DCBATOUT
5V_AUX_S5
3D3V_AUX_S5
ACOK_IN
PSL_IN1#
PSL_OUT#
3D3V_AUX_KBC
1D8V_AUX_S5
S5_ENABLE
5V_S5
3D3V_S5
3 3V_5V_PWRGD / PWR_1D8V_EN 3
1D8V_S5
1D8V_S5_PWRGD / PWR_0D95V_EN
0D95V_S5
0D95V_S5_PWRGD
RSMRST#_KBC
RSMRST#_CPU
KBC_PWRBTN#
PM_PWRBTN#
APU_SLP_S5#
2D5V_S3
2D5V_PWROK / PWR_VTT_EN
2 2
1D2V_S3
APU_SLP_S3#
3D3V_S0 / 5V_S0
3 ms
1D8V_S0 / 0D95_S0
0D6V_S0
GROUPB_PWRGD / Vcore enable
1D2V_CPU_SOC
1V_CPU_CORE
VCORE_PWRGD
T5 > 1 ms
SYS_PWRGD
T8 = 15 ~17 ms
PLT_RST#
1 1
<Core Design>
Wistron Corporation
Title
Power Sequence
A2
Bensolo AMD A00
A B C D E
5 4 3 2 1
DCBATOUT
Adapter
PWR_CORE_ENABLE
PWR_0D9V_EN PWR_1D8V_EN
GROUPB_PWRGD https://vinafix.com
PWR_1D35V_EN PWR_0D875V_EN
PWR_VDDQ_EN EN EN EN EN
EN EN(S5) AOZ2262QI AOZ2260QI EN AOZ2260QI AOZ2262QI
TypeC Adapter ISL62771HRTZ G5388K11U ISL62771HRTZ
EN(S3) PWR_VTT_EN
Charger
ISL9538 (default)
ISL95522HRZ 1V_CPU_CORE 1D2V_CPU_SOC 0D9V_S5 1D8V_S5 0D8V_GPU_VDDC 1D35V_S0 0D875V_S0
Battery Co-lay
BT+ 1D2V_S3 0D6V_VREF_S0
D D
Starlord RR Starlord RR Starlord RR
Power Shape
Regulator LDO Switch
PWR_3D3V_EN
PWR_5V_EN
EN
SY8286BRAC
EN
SY8288CRAC
3D3V_AUX_S5
5V_AUX_S5
5V_S5
3D3V_S5
Starlord RR Starlord RR
C C
PM_SLP_S4# VDD1D8V_EN 1D8V_AUX_EN
EN EN EN
APL5934KAI APL5934KAI RT9078-18GJ5
2D5V_S3 VDD1D8V 1D8V_AUX_S5
Starlord RR
B B
A A
<Core Design>
Wistron Corporation
Title
Power Block Diagram
Custom
Bucky AMD A00
5 4 3 2 1
A B C D E
Type-C Adapter sequence

Type-C ADP IN after Barrel ADP in https://vinafix.com
Type-C ADP OUT after Barrel ADP in
Type-C ADP IN without Barrel ADP (DC mode)
DC_IN_OK 0V
DC_IN_OK 3.3V DC_IN_OK 3.3V
+3D3V_VDD_DCIN 0V
+3D3V_VDD_DCIN 3.3V
+3D3V_VDD_DCIN 3.3V
AC_DIS 0V AC_DIS 0V
1 AC_DIS 1
0V
PD_VBUS_C_CTRL1_A 0V
VCCPD_VBUS (5V)
PD_VBUS_C_CTRL1_A 0V
TBTA_VBUS_L 0V
TPS70933_EN
TBTA_VBUS_L 0V
VCC3PD
1.65V VCCPD_VBUS (5V)
140ms 3.3V TPS70933_EN_G 3.3V
PD_CC1/2
TPS70933_EN_G
110ms
3.3V VCC3PD 3.3V
CCG4_OVP_TRIP_P1
VCC3PD
115ms 1.65V VCCPD_VBUS
VCCPD_VBUS (5V -> 20V)
150ms PD_CC1/2 3.3V
110ms 40ms
PD_CC1/2 1.65V
PD_VBUS_C_CTRL1
CCG4_OVP_TRIP_P1
PD_VBUS_C_CTRL1_R 8ms 115ms PD_VBUS_C_CTRL1

20ms
TBTA_VBUS_L 150ms
CCG4_OVP_TRIP_P1
PD_VBUS_C_CTRL1
USB_ADT
PD_VBUS_C_CTRL1_R 15ms
PD_VBUS_C_CTRL1_R
+SDC_IN
8ms
3D3V_AUX_S5
2 2
350ms
ACOK_IN
PSL_IN1#
PSL_OUT#
3D3V_AUX_KBC 1ms
Type-C ADP IN without battery (Dead Battery)
S5_ENABLE 1ms
DC_IN_OK 0V
+3D3V_VDD_DCIN 0V
Type-C ADP OUT without Barrel ADP (DC mode) AC_DIS 0V
VCCPD_VBUS (5V)
DC_IN_OK 0V
TPS70933_EN
+3D3V_VDD_DCIN 0V 8ms
VCC3PD
1.65V
AC_DIS 0V PD_CC1/2
110ms
3 CCG4_OVP_TRIP_P1 3
VCCPD_VBUS
115ms
TPS70933_EN 150ms
PD_VBUS_C_CTRL1
TBTA_VBUS_L PD_VBUS_C_CTRL1_R
TBTA_VBUS_L 20ms
USB_ADT
50ms 3.3 V USB_ADT
PD_CC1/2 1.65V 0 V
+SDC_IN
PD_VBUS_C_CTRL1
DCBATOUT
CHARGER_SRC
CCG4_OVP_TRIP_P1
3D3V_AUX_S5
PD_VBUS_C_CTRL1_R 358ms
ACOK_IN
ACOK_IN
15ms PSL_IN1#
PSL_IN1#
PSL_OUT#
PSL_OUT#
4 4
25ms 3D3V_AUX_KBC
3D3V_AUX_KBC 1ms
S5_ENABLE
S5_ENABLE
1ms <Core Design>
3D3V_S5
5ms Wistron Corporation
Title
SMBUS Block Diagram

A2 Bensolo AMD A00
A B C D E
A B C D E
https://vinafix.com
Thermal Block Diagram Audio Block Diagram

1 1
3D3V_S5 3D3V_S0
PAGE28 D+ NCT7718_DXP SPKR_L+
SPKR_L-
SC2200P50V2KX-2GP
MMBT3904-3-GP SPKR_R-
SPKR_R+ SPEAKER
D-
Thermal NCT7718_DXN Place near CPU
NCT7718 PWM CORE
Codec
‧ ‧ ‧ SDA
2N7002
THM_SML1_DATA
‧‧ ‧ SCL ALC3204
THM_SML1_CLK MMBT3904-3-GP
HP MIC
TYPEC_SMBDA_EC
TYPEC_SMBCLK_EC
T8 Put under CPU(T8 HW shutdown) AUD_HP1_JACK_L
PURE_HW_SHUTDOWN# AUD_HP1_JACK_R
T_CRIT#
THERM_SYS_SHDN#
‧
2N7002
S
D
G VCORE_PWRGD EN
3V/5V SLEEVE COMBO
RING2
2 2
PAGE24 3D3V_S5_KBC
GPIO031
KBC GPIO023 R2718
Digital
NPCE385 KBC T8 HW shutdown
GPIO0/DMIC_DATA DMIC_SDA_CODEC DMIC_DATA
MIC
VD_OUT1# GPIO1/DMIC_CLK
DMIC_SCL_CODEC
R2720
DMIC_CLK
GPIO82 27K
VD_IN1
GPIO80
SCD1U16V2KX-3GP
SC100P50V2JN-3GP
GPIO45 GPIO56
NTC100K
FAN_TACH1_KBC
FAN1_PWM
GND GND GND
3 3
TACH
FAN
FAN_VCC1
VIN
5V
4 4
<Core Design>
Wistron Corporation
Title
Size
Thermal/Audio Block Diagram
Document Number Rev
Custom
Bensolo AMD A00
A B C D E
5 4 3 2 1
CLK Block Diagram https://vinafix.com
AMD APU
D
Picasso SSD_CLK_CPU
D
GPP_CLK0P REFCLKP
CK0
M_A_CLK0
MA_CLK_H0
M.2 SSD
CK0#
M_A_CLK#0
MA_CLK_L0
GPP_CLK0N
SSD_CLK_CPU_N
REFCLKN NGFF
DDR4 DIMMA
M_A_CLK1
CK1 MA_CLK_H1
M_A_CLK#1
CK1# MA_CLK_L1
WLAN_CLK_CPU
GPP_CLK1P REFCLKP
WLAN
GPP_CLK1N
WLAN_CLK_CPU_N
REFCLKN NGFF
M_B_CLK0
CK0 MB_CLK_H0
M_B_CLK#0
CK0# MB_CLK_L0
DDR4 DIMMB
M_B_CLK1 LAN_CLK_CPU_P
CK1 GPP_CLK4P REFCLK_P
MB_CLK_H1
M_B_CLK#1 GPP_CLK4N LAN_CLK_CPU_N
C CK1# MB_CLK_L1 REFCLK_N C
CK
CLKA0 LAN
VRAM1 CK#
CLKA0B GPU LANXIN
CKXTAL1 Realtek
RTL8106E
AMD R19M-M18-70 X3101
25MHz
CLKA1 PEG_CLK0_CPU
CK ‧ CLKA0 PCIE_REFCLKP
CLKA1B GPP_CLK3P LANXOUT
VRAM2 CK# ‧ CLKA0B
CKXTAL2
PEG_CLK0_CPU_N
PCIE_REFCLKN GPP_CLK3N
GPU_XTALIN_R
X1
X7901
Audio
27MHz
RN1701
Realtek
AZ_BITCLK/TDM_BCLK_MIC
HDA_BITCLK_CPU HDA_CODEC_BITCLK
BITCLK ALC3204
GPU_XTALOUT_R X2
SRN33J-5-GP-U
XTL_32K_X1_CPU
B X32K_X1 B
MCU_OSCI
PH0_OSC_IN
X1602
32.768KHz KBC
NPCE385P
Sensor Hub X32K_X2 LPC_CLK_CPU_P0 R1608 LPC_CLK_KBC
LPCCLK0/EGPIO74 LCLK/GPIOF5/ESPI_CLK
STM32L151CBU6TR XTL_32K_X2_CPU 22R2J-2-GP
LCLK/GPIOF5/ESPI_CLK
PH1_OSC_OUT
MCU_OSCO XTL_48M_X1_CPU
X48M_X1
X1
X1 X1601
48MHz
USB HUB LPC_CLK_DBG
GL850G-OHY50 X48M_X2 LPCCLK1/EGPIO75
LPC_CLK_CPU_P1 R1609
22R2J-2-GP
LPC
XTL_48M_X2_CPU
X2
X2
A A
<Core Design>
Wistron Corporation
Title
CLK Block Diagram
A2
Bucky AMD A00
5 4 3 2 1

Wistron 18796-SC Rev A00

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Wistron 18796-SC Rev A00

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5 4 3 2 1

Ben solo AMD Schematics

A DY : None Installed <Core Design> A

UMA: UMA only installed Wistron Corporation

OPS: DISCRTE OPTIMUS installed Title

Project code: 4PD0GP010001 SENSOR Bucky IO IO MB

USB3.1 Type-C R3 / Athlon(TYPE2) I2C Sensor Board

SATA Re-driver Audio Codec (2CH 2W/4ohm)

IO Board Free Fall Sensor I2C

LPC debug port

Quad Read PS2

USB2.0 Fan Control Int. <Core Design>

RJ45 Conn. FAN Title

[76] GFX_PCIE_RX_N3 K11 K2

SSID = CPU APU Type 2 does not support Channel A

eDP APU Type II(CZ-L): 3D3V DISPLAY/SVI2/JTAG/TEST

[57] HDMI_DDI_TX_P3 1D8V_S0

C821 1 SC27P50V2JN-2-GP RST#_CPU

SIC_CPU H14 AW11 CORETYPE R813 1 2 10KR2J-L-GP

B DP_STEREOSYNC_APU K18 VCCCORE_SENSE_APU 1 R807 2 0R0402-PAD VCCCORE_SENSE B

SVID_DATA_CPU H16 J18 VSS_SENSE_APU 1 R809 2 0R0402-PAD VSSCORE_SENSE

APU Caps AMD

PC1058 PC1059 PC1062

C1002 C1003 C1068 C1072

C1005 C1004 C1007 C1006 C1009 C1008 C1011 C1010

Size Document Number Rev

A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A

Taipei Hsien 221, Taiwan, R.O.C.

Main Func = DDR4 SODIMM

1 DY 2 M_A_PARITY DIMM_VREFCA VREFCA traces should

SPD SA2 0 C1229 C1233

Will change to 0603 type at DVT1

Main Func = DDR4 SODIMM

SPD SA2 0 SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP

[24,68] LPC_AD_CPU_P1 SPI_HOLD_L/ESPI_DAT3 BC9 SPI_CS_CPU_N0 R1607 1 2 0R0402-PAD SPI_CS_ROM_N0

SSID = PCH 3D3V_S5

[20] SYS_RST#_CPU SRN1KJ-4-GP

A00 change R1778,C1714,R1780 Remove 20181220

[65] KB_LED_BL_DET 2ND = 84.2N702.031

C1704 1 2 SC150P50V2KX-1-GP PLT_RST# D1703 ISH

B [55] TOUCH_PANEL_INTR# EC1713 83.05123.AA0 83.05123.AA0 B

SC10P50V2JN-4DLGP 1 R1722 2 0R0402-PAD RN1710

1D8V_S5 3D3V_S5 3D3V_AUX_S5

2018/11/13 DVT2 R1763

R1765 Wistron Corporation

Main Func = USB

USB3.0 Port2 FP_USB20_P AE10 Controller 0 AE3 USB3_USB30_RX_P1

STRAP PINS https://vinafix.com

[17] SYS_RST#_CPU SYS_RESET_L/AGPIO1

PULL Normal powerup / reset timing

SSID = KBC 3D3V_S5 PCB Version

EC_AGND C2403 1 2 SC2200P50V2KX-2DLGP

GPIO84/VD_OUT2 R2422 Q2402 100KR2J-1-GP

[66] LANWAKE#_IC PSL_IN2# 93 PSL_IN1#/GPI70 GPIO31/SDA3/N2TMS 24 PROCHOT_EC 2N7002K-2-GP

[65] TP_ON# 3D3V_S0

High Active KBC RESET

KSO10 2ND = 84.2N702.031 3D3V_S5 2 5 3D3V_S5

KSO14 CCG4_I2C_SCL 2N7002KDW-1-GP 100KR2J-1-GP

SSID = Flash.ROM 1D8V_VCCSPI

R2501 1 2 10KR2J-L-GP SPI_SO_ROM

[16] SPI_HOLD_ROM C2502

AP2138N-1D5TRG1-GP G2501 Q2511

1st = 74.02138.03B SC1U10V2KX-1DLGP GAP-OPEN G RTCRST_ON