FACULTY OF COMPUTER ENGINEERING, INFORMATICS AND COMMUNICATION

STUDENT NAME SALMA J J PELESI

REG NUMBER R176740M
COURSE CODE HHE311
COURSE NAME PARALLEL COMPUTING AND DISTRIBUTION
PROGRAM BSc. HONOURS HARDWARE ENGINEERING(HHE)
PRESENTED TOPIC:SIMD VECTORIZATION
SIMD VECTORIZATION OVERVIEW

A vector is an instruction operand containing a set of data elements packed into a one-
dimensional array. The elements can be integer or floating-point values. Most Vector/SIMD
Multimedia Extension and SPU instructions operate on vector operands. Vectors are also
called SIMD operands or packed operands.

SIMD processing exploits data-level parallelism. Data-level parallelism means that the
operations required to transform a set of vector elements can be performed on all elements
of the vector at the same time. That is, a single instruction can be applied to multiple data
elements in parallel. Vectorization is the process of transforming a scalar operation acting
on individual data elements (Single Instruction Single Data—SISD) to an operation where a
single instruction operates concurrently on multiple data elements (SIMD). Modern Intel
processor cores have dedicated vector units supporting SIMD parallel data processing. An
example of an SIMD-enabled operation is shown below.

User-mandated or SIMD vectorization supplements automatic vectorization just like

OpenMP parallelization supplements automatic parallelization. The following figure
illustrates this relationship. User-mandated vectorization is implemented as a single-
instruction-multiple-data (SIMD) feature and is referred to as SIMD vectorization.
The SIMD vectorization feature is available for both Intel® microprocessors and non-Intel
microprocessors. Vectorization may call library routines that can result in additional
performance gain on Intel microprocessors than on non-Intel microprocessors. The
vectorization can also be affected by certain options, such as /arch or /Qx (Windows) or -
m or -x (Linux and Mac OS X).
The following figure illustrates how SIMD vectorization is positioned among various
approaches that you can take to generate vector code that exploits vector hardware
capabilities. The programs written with SIMD vectorization are very similar to those written
using auto-vectorization hints. You can use SIMD vectorization to minimize the amount of
code changes that you may have to go through in order to obtain vectorized code.

RESTRICTIONS FOR USING VECTOR DECLARATION

Vectorization depends on two major factors: hardware and the style of source code. For the
current implementation of the vector declaration, there are certain restrictions that apply
when using the vector declaration. The following features are not allowed:

 Thread creation and joining through _Cilk_spawn, _Cilk_for,

OpenMP* parallel/for/sections/task, and explicit threading API calls

 Using setjmp, longjmp, EH, SEH

 Inline ASM code and VML

 Calling non-vector functions (note that all SVML functions are considered vector
functions)

 Locks, barriers, atomic construct, critical sections (presumably this is a special case of
the previous one).

 Goto statements

 Intrinsics (for example, SVML intrinsics)

 Function call through function pointer and virtual function

 Any loop/array notation constructs

 Struct access

 The computed GOTO statement is not supported