Viettel High Technology Industries Corporation is the key research and production unit of Viettel specialized in

military and civilian sectors, who has successfully internalized a complete process from researching, designing to
manufacturing and selling cutting edge technology solutions. Armed with a team of talented and experienced
professionals; a culture that values collaboration and forward thinking, we envision ourselves as a modern,
intellectually abundant technology company whose brand is recognized across the globe.
Viettel High Technology Industries Corporation, designs the most leading edge RFIC and Digital Baseband chipset
using the most advanced process nodes in the Cellular and IoT business units. We are looking for Verification
Engineers to work on 5G Digital chipset with prior experience in cellular modem standard 3G, 4G, 5G.

Physical Design Engineer

 
Benifits
 

- Income: from 700 – 1.200$++ with Junior;

from 1.200 – 2.500$++ with Senior;
from 2.500 – 5.000$++ with Expert;
(Based on the candidate's ability and work experience).
- Enjoy gifts, holiday bonuses, lunch support, phone calls of at least $2,000/year and bonus regimes according
to the project, the level of success of the research products.

 
Responsibility
 

As a Physical Design engineer, you will be involved with all phases of physical design of high performance PHY design
from RTL to delivery of our final GDSII. Your responsibilities include but are not limited to: Synthesizes, P&R, Sign-off...

Qualifications

- Graduate from a regular university with Good or better major: Information Technology, Computer Science,
Mathematics - Information, Electricity/Electronics and Telecommunications,...or other related technical
majors.
- English proficiency equivalent to at least 550 TOEIC score.
- Knowledge and experience in (Advanced) Digital Physical Implementation Flow (power aware design,
floor planning, low-power flow, libraries, IPs, Place&Route, Clock Tree Synthesis, Design for Test, IR-drop
Analysis, Timing Analysis, Power Analysis, Sign-off).
- Solid understanding of aspects of Physical construction, Integration and Physical Verification.
- Experience in scripting languages such as Perl/Tcl/shell-scripting. Preferred qualifications.
- Working knowledge of Basic SoC Architecture and HDL languages like VHDL/Verilog to be able with logic
design team for timing fixes.
- Power user of industry standard Physical Design & Synthesis tools.
- Working knowledge of Extraction and STA methodology and tools.
- Good understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block
level.
- Understanding CMOS technology nodes.
  
Contact
 

- Human Resources Department - Ms. Vũ Thu Hường, email: huongvt62.viettel@gmail.com, Mobile phone
number: 0363904039.