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Erickson, Robert W.(Author). Fundamentals of Power Electronics. Second Edition.
Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p (1).

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wFundainentals of
ww Electronics
Power
.Ea
SECOND EDITION
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Robert W. Erickson
Dragan Maksimovic
University of Colorado ine
Boulder, Colorado
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Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p iii.
KLUWERACADEMICPUBLISHERS
NEW YORK, BOSTON , DORDRECHT , LONDON, MOSCOW

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eBook ISBN:
Print ISBN:
0-306-48048 -4
0-7923-7270-0
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©2004 Kluwer Academ ic Publishers
New York , Boston , Dordrecht. London , Moscow
.ne
Print © 2001 Kluwer Academ ic/Plenum Publishers
New York
All rights reserved
No part of this eBook may be reproduced or transm itted in any form or by any means , electronic ,
mechanical , recording , or otherwise , without written consent from the Publisher
t
Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p iv.
Created in the United States of America
V isit Kluwer Online at: http://kluweronline .com

and Kluwer's eBookstore at: http://ebooks .kluweronline.com

Contents
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Preface
En xix
1 Introduction
I. I
1.2
Introd uction to Power Processing
Severa l App lica tions of Power Elec tron ics gin 1
7
1.3 Elements of Power Electron.ics
Refe rences eer 9
I
2
Converters in Equilibrium
Principles of Steady State Converter Analysis ing 11
13
.ne
2 .1 Introduction 13
2.2 Inductor Volt-Second Balanc e, Capac itor Charge Balance, and the Small -Ripple
2.3
2.4
Approximation
Boost Conver ter Exampl e
Cu k Converter Example
15
22
27
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2.5 Estimat ing the Output Volta ge Ripple in Converter s Conta ining Two -Pole
Low-Pass Filters 31
2.6 Summar y of Key Points 34
Refere nces 34
Problem s 35
3 Steady-State Equivalent Circuit Modeling, Losses, and Ellicienc y 39
3.1 The DC Transformer Model 39
3.2 In clusio n oflnductor Co pper Loss 42
3.3 Construct ion of Equival ent Circuit Model 45

viii Contents
3.3. 1 Inductor Voltag e Equation 46

3.3.2 Capa c itor Current Equation 46
3.3.3 Comp lete Circu it Model 47
3.3.4 Efficiency 48
3.4 How to Obt ai n the Input Port of the Model so
3.5 Example: Inclusion of Semiconductor Cond uction Losses in the Boost
Conv er ter Model 52
3.6 Summary of Key Point s 56
Refere nces 56
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4
Problem s
Switch Realization
57
63
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4.1 Switch Applica tions
4.1. 1
4.1.2
Single -Quadrant Switc hes
Current -Bidirection al Two -Quadrant Switches
65
65
67
71
asy
4 . 1.3 Voltage -Bid irectional Two -Quadra nt Switc hes
4.1.4 Four -Quadra nt Sw itc hes 72
4.1.5 Synchronous Rectifiers 73
En
4.2 A Brie f Survey of Power Semiconductor Dev ices 74
4.2.1 Power Diod es 75
4.2.2 Metal -Oxide -Sem ico nductor Field -Effec t Tra nsistor (MOSFET ) 78
4.2.3
4 .2.4
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Bipolar Junct io n Transistor (BJT)
Insul a ted Gate Bipolar Tran sis tor (IGB T)
81
86
eer
4.2.5 Thyri stor s (SCR , GTO, MCT) 88
4.3 Swit c hing Loss 92
4.3. 1 Transistor Switch ing with Clamped In ductive Load 93
4.3.2
4.3.3
4.3.4
Diode Recovered Charge
ing
Device Capacitances, and Leakage, Package , and Stray Inductan ces
Efficiency vs. Switching Frequency
96
98
100
.ne
4.4 Summary of Key Points 101

Refe rences 102
5
Problems
The Discontinuous Conduction Mode

5.1 Origin of the Discontinuous Conduction Mode, and Mode Boundary
103
107
108
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5.2 An alys is of the Conversion Ra tio M (D,K) 112

5.3 Boost Conve1ter Examp le 117
5.4 Summ ary of Re sult s and Key Poin ts 124
Pro blems 126
6 Converter Circuits 131
6.1 Cir cui t Manipulation s 132
6. 1. 1 Inversion of Source and Load 132
6. 1.2 Cascade Connection of Converters 134
6. 1.3 Rotation of Three-Termi nal Cell 137

Come11
1s ix
6.1.4 Diff ere nti al Con nection of the Load 138

6.2 A Short Lis t of Converters 143
6.3 Transfo rmer Isolation 146
6.3.1 Fu ll-Bridge and Ha lf- Brid ge Isolated Buck Conve rters 149
6.3.2 Forw,u-d Converter 154
6.3.3 Pu sh -Pull Isolate d Buc k Converter 159
6.3.4 Flybac k Converter 161
6.3.5 Boost -Deriv ed Isolated Converters 165
6.3.6 Isolated Versions of the SEPIC an d the Cuk Co nverter 168
ww 6.4 Converter Evaluation and Design

6.4.1
6.4.2
Switch Stress and Util ization
Desig n Using Compute r Spreads heet
171
171
174
6.5
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Summa ry of Key Poin ts
Refe rences
Problems
177
177
179
Il
7 asy
Converter Dynamics and Control
AC EquivaJent Circuit Modeling
185
187
7. 1 Introd uction
En 187
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7.2 The Basic AC Modeling Approach 192
7.2.1 Averag ing the Inductor Waveforms 193
7.2.2 Discussion of the Averaging Approximation 194
7.2.3
7.2.4
7.2.5
Averaging the Capacitor Waveforms
The Average Input Cur rent
Perturbat ion and Line arizat ion eer 196
197
197
7.2.6
7.2.7
7.2.8
Construction of the Small -Signal Equivalent Circuit Model
Discuss ion of the Perturb ation and Lineariz ation Step
Res ults for Several Basic Converters ing 201
202
204
.ne
7.2.9 Exa mpl e : A Nonid eal Flyback Converter 204

7.3 State-Space Averag ing 2 13
7.3.1
7.3.2
7.3.3
7.3.4
TI1e State Equat ions of a Network
The Basic State -Space Averaged Model
Discussio n of the State -Space Avera ging Re sult
Example: State-Space Averaging of a Non ideal Buck - Boos t Conver ter
2 13
216
217
221
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7.4 Circuit Averaging and Averaged Switch Modeling

7.4.1 Obtaining a Time -Inv ar iant Circu it 228
7.4.2 Circuit Averagi ng 229
7.4.3 Perturbatio n and Linearizati on 232
7.4.4 Swi tch Networks 235
7.4.5 Example: Averaged Swit ch Mode ling of Conduction Losses 242
7.4.6 Example : Averaged Switch Mode lin g of Switching Losses 244
7.5 The Canoni ca l C ircuit Model 247
7.5.1 Development of the Canonical Circuit Model 248

x Contents
7.5.2 Example: Manipulat ion of the Buck- Boost Converter Model

into Canonical Frnm 250
7.5.3 Canonical Circuit Parameter Values for Some Common Converters 252
7.6 Modeling the Pulse-Width Modulator 2S3
7.7 Summary of Key Points 2S6
References 257
Problems 258
8 Converter Transfer Functions 265
ww 8.1 Review of Bode Plots

8.1.1
8.1.2
Single Pole Response
Single Zero Response
267
269
275
w.E 8.1.3
8. 1.4
8. 1.5
Right Half- Plane Zero
Frequency Inversion
Combinations
276
277
278
asy
8.1.6 Quadratic Pole Response: Resonance 282
8. 1.7 The Low-Q Approximation 287
8.1.8 Approximate Roots of an Arbitra ry-Degree Polynomial 289
En
8.2 Analysis of Converter Transfer Functions 293
8.2.1 Example: Transfer Functions of the Buck- Boost Converter 294
8.2.2 Transfer Functions of Some Basic CCM Converters
gin
300
8.2.3 Physical Origins of the RHP Zero in Converters 300
8.3 Graphical Construction of Impedances and Transfer Funct ions 302
8.3.1
8.3.2
8.3.3
Series Impedances: Addition of Asymptotes
Series Resonant Circuit Example
eer
Parallel Impedances: Inverse Addition of Asymptotes
303
305
308
8.4
8.3.4
8.3.5
Pa.rallel Resonant Circuit Example
Voltage Divider Transfer Functions: Division of Asymptotes
ing 309
311
.ne
Graphica l Construction of Converter Transfer Functions 3 13
8.S Measurement of AC Transfer Functions and Impedances 3 17

9
References
Problem s
Controller Design
322
322
331
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9. 1 Introduction 331
9.2 Effect of Negative Feedback on the Network Transfer Functions 334
9.2.1 Feedback Reduces the Transfer Functions
from Disturbances to the Output 33S
9.2.2 Feedback Causes the Transfer Function from the Reference Input
to the Outp ut to be Insensitive to Variations in the Gains in the
Forward Path of the Loop 337
9.3 Construc tion of the Important Quantities 1/(1 + T) and Tl( I + T)
and the Closed-Loop Transfer Functions 337
9.4 Stabilit y 340

Co111
e111
.1 xi
9.4.1 The Phase Margin Test 341

9.4.2 The Relationship Between Phase Margin
and Closed-Loop Damping Factor 342
9.4.3 Transient Response vs. Damping Factor 346
9.5 Regulator Design 347
9.5. 1 Lead (PD) Compensator 348
9.5.2 Lag (Pf) Compensator 351
9.5.3 Combined (PJD) Compensator 353
9.5.4 Design Example 354
ww 9.6 Measurement of Loop Gains

9.6.1
9.6.2
Voltage Injection
Current Injection
362
364
367
9.7
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9.6.3 Measurement of Unstab le Systems
Summary of Key Points
References
368
369
369
10
Problems
Input Filter Design
asy 369
377
10.1 Introduct ion
10.1.1 Conducted EMI
En 377
377
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10.1.2 The Input Filter Design Problem 379
10.2 Effect of an Input Filter on Converter Tran sfer Function s 381
10.2.1 Discussion 382
103
10.2.2 Impedance Inequa lities
Buck Converter Examp le
eer 384
385
ing
10.3.l Effect of Undamped Input Filter 385
10.3.2 Damping the Input Filter 391
10.4 Design of a Damped Input Filter 392
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10.4.1 RrCb Parallel Damping 395

10.4.2 RrLb P,u-allel Dampin g 396
I0.4.3 Rrlb Ser ies Damping
10.4.4 Cascading Filter Sections
10.4.5 Example: Two Stage Input Filter
10.5 Summary of Key Points
398
398
400
403
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References 405
Problems 406
11 AC and DC Equivalent Circuit Modeling of the Discont.inuous Conduction Mode 409
11.1 DCM Averaged Switch Model 410
11.2 Small -Signal AC Modeling of the DCM Switch Network 420
11.2.l Example : Contro l-to-Output Frequency Response
of a DCM Boost Converter 428
l l.2.2 Example: Control-to-output Frequency Responses
of a CCM/DCM SEPIC 429

xil Contents
11.3 High -Fre quency Dynam ics of Conve rters in DCM 43 1

References 434
Problems 435
12 Current Programmed Control 439

12.1 Osci llat ion for D > 0.5 44 1
12.2 A Simpl e First -Order Model 449
12.2. 1 Simple Model via Algebraic Approach : Buck - Boost Example 450
ww 12.3
12.2.2 Averaged Sw itch Modeling
A More Accurate Model
12.3. 1 Curren t-Programmed Con tro ller Model
454
459
459
w.E 12.3.2
12.3.3
12.3.4
Solution of the CPM Tra nsfer Functions
Discussion
Current -Prog rammed Transfer Functions of the CCM Buck Converte r
462
465
466
12.3.5
12.3.6
asy
Results for Basic Converte rs
Quant itative Effects of Cunen t-Programmed Control
on the Converte r Transfer Fun ct ions
469
47 1
12.4
12.5
En
Discon tinu ous Conduction Mode
Summary of Key Points
473
480
References
Problems
gin 48 1
482
ill Magnetics
eer
489
13 Basic Magnetics Theory 491
13.1 Review of Basic Magnetics
13. 1.1
13. 1.2
B asic Rel ationships
M agne tic Circuits ing 491
491
498
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13.2 Transfo rmer Modeling 501

13.2. 1 The Id eal Transfo rm er 502
13.3
13.2.2
13.2.3
13.3. 1
The Mag netizin g Inductance
Leakage Indu cta nces
Loss Mecha nisms in Magnetic Devices
Core Loss
502
504
506
506
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13.3.2 Low-Frequency Coppe r Loss 508

13.4 Eddy Cu rrents in Winding Conducto rs 508
13.4.1 Int roduct ion to the Skin and Proxim ity Effects 508
13.4.2 Leakage Flux in Windings 5 12
13.4.3 Foil Windings and Layers 5 14
13.4.4 Power Loss in a Layer 515
13.4 .5 Examp le: Power Loss in a Transforme r Winding 518
13.4.6 Interleaving the Windings 520
13.4.7 PWM Waveform Ha rmonics 522

Conte/1/s xiii
13.5 Several Types of Magnet ic Devices, The ir B- H Loops,

and Core vs. Copper Loss 525
13.5.1 Filter Inductor 525
13.5.2 AC Ind uctor 527
13.5.3 Transformer 528
13.5.4 Coupled Inductor 529
135. 5 Flyback Transfo rmer 530
13.6 Summary of Key Points 53 1
References 532
ww
14
Problems
Inductor Design
533
539
14.1
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F ilter Indu ctor Design Co nstraints
14.1.1
14.1.2
Max imum Flu x Dens ity
Inductance
539
541
542
asy
14.1.3 Win d ingA rea 542
14. l.4 Wi nd ing Resistance 543
14. l.5 The Core Geome trica l Co nst ant K8 543
14.2
14.3
A Step-by-Step Procedure
En
Multip le-Windin g Magnetics Design via the Kg Metho d
544
545
14.3. l
14.3.2
14.3.3
Window Area Allocat ion
Coupled Inducto r Design Co nstrai nts
Design Proced ure gin 545
550
552
14,4 Examples
14.4. l
eer
Coupled Inductor for a Two-Output Forward Converter
554
554
ing
14.4.2 CCM Flyback Transfo rmer 557
14.5 Summ ary of Key Poin ts 562
Refere nces 562
.ne
Probl ems 563

15 Transformer Design 565
15.l Transfor mer Des ign: Basic Co nstra ints
l 5.1.1
15.1.2
Co re Loss
Fl ux Dens ity
565
566
566
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15.l.3 Copper Loss 567

l 5. 1.4 Total Power Loss vs. t:..B 568
15. 1.5 Optimum Flux De nsity 569
15.2 A Step-by-Step Transfor mer Design Procedure 570
15.3 Examples 573
15.3.1 Example l : Single-Output Isolated Cuk Converter 573
15.3.2 Examp le 2: Mu ltiple -Outpu t Full -Bri dge Buck Converter 576
15.4 AC Inductor Design 580
15.4.1 Outline of Derivation 580
15.4.2 Step -by-Step AC Indu cto r Design Procedure 582

xiv Coments
15.5 Summary 583

References 583
Problems 584
IV Modern Rectifiers and Power System Harmonics 587
16 Power and Harmonics in Nonsinusoidal Systems 589
16.1 Average Power 590
16.2 Root-Mean-Square (RMS ) Value of a Waveform 593
ww 16.3 Power Factor 594

16.3.1 Linear Resistive Load, Nonsin uso idal Voltage 594
16.3.2 Nonl inear Dynamic Load, Sinu soida l Voltage 595
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16.4
16.5
Power Phasors in Sinusoidal Systems
Harmonic Currents in Three-Phase Systems
16.5.1 Harmonic Currents in Three-Phase Four-Wire Networks
598
599
599
asy
16.5.2 Harmonic Currents in Three-Phase Three-Wire Networks 60 1
16.5.3 Harmonic Current Flow in Power Factor Correction Capacitors 602
16.6 AC Line Current Harmonic Standards 603
16.6.1
16.6.2
En
International Electrotech nical Commission Standard 1000
IEEE/ANSI Standard 5 19
603
604-
gin
Bibliography 605
Proble ms 605
17 Line-Commutated Rectifiers 60')
17.1 The Single- Phase Full-Wave Rec tifier

17.1.1
Conti nuous Condu ction Mode eer 609
6 10
17.1.2 Disco ntinuous Conduction Mode
17.1.3 Behavior when C is Large
17.1.4 Mini miz ing THD when C is Small ing 6 11
6 12
613
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17.2 l11eThree-Phase Bridge Rec tifier 6 15

17.2.1 Continuous Conduction Mode 615
17.2.2 Discontinu ous Conduction Mode
17.3 Phase Control
17.3.1 Inverter Mode
17.3.2 Harmonics and Power Factor
6 16
6 17
6 19
6 19
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17.3.3 Commutation 620

17.4 Harmonic Trap Filters 622
17.5 Transforme r Connections 628
17.6 Summar y 630
References 631
Problems 632
18 Pulse-Width Modulated Rectifiers 637
18.1 Properties of the Ideal Rectifier 638

Conte/1/s XI'
18.2 Realizat ion of a Nea r-Ideal Rectifier 640

18.2.1 CCM Boost Converter 64-2
18.2.2 DCM Flyback Converte r 64-6
18.3 Co ntro l of the Current Waveform 64-8
18.3. 1 Ave rage Current Contro l 648
18.3.2 Current Programmed Control 654
18.3.3 Critical Cond uctio n Mode and Hysteretic Con tro l 657
18.3.4 Nonli near Carrie r Control 659
18.4 Sing le-Phase Converter Systems Incorporat ing Ideal Rectifiers 663
ww 18.5
18.4.1
18.4 .2
Energy Storage
Modeling the Outer Low -Bandw idt h Contro l System
RMS Values of Rectifier Waveforms
663
668
673
18.6
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18.5.1
18.5.2
Boost Rect ifie r Example
Compa rison of Single -Phase Rectifier Topo logies
Modeling Losses and Efficiency in CCM High -Qualit y Rectifiers
674
676
678
18.6.1
18.6.2
18.6.3 asy
Expression for Controller Duty Cyc le d(t)
Exp ression for the DC Load Current
Solution for Converter Efficiency T]
679
68 1
683
18.7
18.6.4 Design Examp le
Ideal Three -Phase Rectifiers
En 684
685
18.8 Su mmary of Key Points
References
gin 691
692
eer
Prob lems 696
V Resonant Converte rs 703

19 Resonant Conversion
19.1 Sinusoida l Analysis of Resonant Converters
ing 705
709
19.1.1 Controlled Switch etwork Mode l
.ne
7 10
19.1.2 Mode ling the Rec tifier and Capacitive Filter Netwo rks 7 11
19.1.3 Reso nant Tank Network 7 13
19.2
19. 1.4
Examp les
19.2. 1
Solution of Converter Voltage Conve rsion Ratio M = VI~~
Series Resonant DC- DC Converter Examp le

7 14
7 15
7 15
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19.2.2 Subharmonic Modes of the Series Resonant Conve rter 7 17

Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p xv.
19.2.3 Para llel Resonant DC- DC Conve11er Example 718

19.3 Soft Switching 721
19.3.1 Operation of the Full Bridge Below Resommce :
Zero -Current Switch ing 722
19.3.2 Opera tion of the Full Br id ge Above Resona nce:
Zero -Voltage Sw itching 723
19.4 Load -Dependent Properties of Reso nant Converters 726
19.4.1 In verter Output Characterist ics 727
19.4.2 Dependence of Transistor Current on Load 729
19.4.3 Dependence of the ZVS!ZCS Boundary on Load Res istance 734

xvi Co11tet11s
19.4.4 Another Example 737

19.5 Exact Charac terist ics of the Series and Parallel Resona nt Converters 740
19.5. l Series Resona nt Converte r 740
19.5.2 Parallel Resonant Converter 748
References 752
Problems 755
20 Soft Swit.ching 761
ww 20. 1 Soft -Switching Mechanisms

20.1.l
20. 1.2
DiodeSwitch ing
MOSFET Switching
of Sem ico nd uctor Devices 762
763
765
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20.2
20.1.3 IGBT Switching
The Zero -Current -Switching Quasi -Resonant Switch Cell
20 .2.1 Waveform s of the Ha lf -Wave ZCS Quasi -Re so nant Switch Cell
768
768
770
20.3
20 .2.2
20.2.3
asy
The Average Termina l Waveforms
The Full -Wave ZCS Quasi - Resonant Switch Cell
Resonant Switch Topologies
774
779
78 1
20.3. 1
20.3.2
En
The Zero -Voltage -Switching Quasi -Resonant Switch
The Zero -Voltage -Switchi ng Multi - Resonant Switch
783
784
20.4
20 .3.3
Soft Swi tc hing in PWM Conve r ters
20 .4 .1 gin
Quasi -Square -Wave Resonant Switches
The Zero -Vo ltage Transition Full - Br id ge Converte r

787
790
791
20.4.2
20 .4.3
The Auxiliary Switch Approac h
Auxiliary Resonant Commutated Pole
eer 794
796
20.5
References
Problems
Summary of Key Po ints
ing 797
798
800
.ne
Appendices 803
Appendix A
A.I
A.2
RMS Values of Commonly-Observed Converter Waveforms
Some Common Waveforms
General Piecewise Waveform
805
805
809
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Appendix B Simulation ot· Converters 813

B. l Avera ged Switch Mod els for Cont i nuous Co ndu ction Mode 815
B.1.1 Basic CCM Averaged Switch Mode l 8 15
B. 1.2 CCM Subcircuit Model that Include s Switch Conduction Losses 816
B.1.3 Example: SEPlC DC Convers ion Ratio and Effic iency 8 18
B.1.4 Example: Transient Response of a Buck - Boo st Converter 819
8.2 Combined CCM/DCM Avera ged Switch Model 822
B.2.1 Exampl e: SEPIC Freq uency Responses 825
B.2.2 Example : Loop Gain and Closed-Loop Responses
of a Buck Voltage Re gu lator 827

Co11te11tI xvii
B.2.3 Example : DCM Boost Rectif ier 832

B.3 Cun-ent Programmed Control 834
B.3.1 Current Progra mmed Mode Model for Simulat ion 834
B.3.2 Example: Frequency Respo nses of a Buck Converter with
CmTent Programmed Con tro l 837
References 840
Appendix C Middlebrook'sExtra Element Theorem 843

C. I Basic Result 843
ww C.2
C.3
C.4
Derivation
Discussio n
Example s
846
849
850
w.EC.4. 1
C.4.2
C.4.3
A Simp le Transfer Funct ion
An Unmodeled Element
Add iti on of an Input Filter to a Converter
850
855
857
asy
C.4.4 Dep endence of Tra nsistor CwTent on Load in a Reso nant Inve1ter 859
References 861
Appendix D Magnetics Design Tables 863
D .I
D.2
Pot Core Data
EE Core Data En 864
865
D.3
D.4
EC Core Data
ETD Core Data gin 866
866
D.5
D.6
PQ Core Data
Amer ica n Wire Gauge Data
eer 867
868
ing
References 869
Index 871
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Preface
ww
w.E
asy
1l1e objective of the Firs t Edition was to serve as a textbook for introductory powe r elecu·onics courses
where the fundament als of powe r electronics are defined , rigoro usly presented , and treated in suff icient
En
depth so that stude nts acquire the knowled ge and ski lls needed to design practical power electronic sys-
tems. The First Edition has indeed been adopted for use in power elec tronics co urses at a number of
gin
schools. An additional goal was to contribute as a reference book for engineer s who pract ice power elec-
tronics design, and for students who want to develop their knowledge of the area beyond the level of
introduc tory courses. In the Second Edition , the basic objectives and ph ilosophy of the First Edition ha ve
eer
not been changed. The modifications include add ition of a numb er of new topics aimed at better serv ing
the expanded audience that includes students of introductory and more advanced courses, as well as
pract icing engineers loo king for a reference book and a source for further profe ssio nal development.
ing
Most of the chapte rs have been signifi ca nt ly rev ised and updated . Major addition s includ e a new Chapter
IO on input filter design , a new Append ix B covering si mu lat ion ofconver ters, and a new Appendix Co n
Middlebrook's Extra Element Theorem. In add ition to the introdu ct ion of new top ics, we have made
.ne
major revisions of the material to improve the flow and clarity of explanat ions and to provide additional
specific results, in chapters cover ing averaged sw itch modelin g, dynami cs of converters operating in dis-
t
continuous conduction mode, current mode contro l, magnet ics des ign , pulse -width modulated rectifiers ,
and resonant and soft-switching converters.
A complete ly new Chapter 10 covering input filter design has been added to the second addi -
tion. The prob lem of how the input filter affects the dynamic s of the converter , often in a manne r that
Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p xix.
degrades st abi lity and performance of the converte r syste m, is expla ined us ing Midd lebro ok' s Extra Ele-
ment Theorem. This desi gn-or iented app roach is exp lain ed in detai l in the new Appendix C. Simp le co n-
ditions are derived to allow filter damping so that converter tra nsfer func tions are not chan ged. Comp lete
resul ts for opti mum filter damp ing are presented. The chapter con cludes with a discussion abo ut the
design of multiple -secti on filters, illustrated by a desig n exa mple.
Computer simulation based on the averaged switch modeling approach is presented in Appen-
dix B, includin g PSpice models for continuou s and discont inuo us cond uction mode, and current-mode
control. Extensive simu latio n examples incl ude : finding the de conversio n ratio and efficiency of a
SEP IC, plotting the transient response of a buck -boost conve rter, co mparing the con trol-to -output trans -
fer functions of a SEPIC operat ing in CCM and DCM, determi ning the loop gai n, line -to -output transfer
funct ion, and load tra nsie nt response of a closed-loop buck volta ge regulator, finding the inp ut current

X.'( Preface
wavefom1 and THD of a DCM boost rec tifier, an d compar ing the transfer fu nctio ns and o utpu t imped -
ances of buck co nverters operat ing wi th current pro gra mmed contro l and wit h duty cyc le control. The
major purp ose of Ap pendi x B is to suppleme nt the text dis cuss io ns , and to enable the reader to effec -
tively use averaged mode ls and simul at io n tools in the desig n process. The role of simu lat ion as a des ign
ver ifi ca ti on tool is emphasized. In our expe rience of teach in g introductory and more advanced power
electronics cotirses, we have found th at the use of s imul ation too ls wo rks best with stude nts who have
mastered basic co ncep ts and des ign -or iented analytical tec hni ques , so that they are able to make cor rect
interp retat ions of sim u latio n results and mode l limi tat ions . Thi s is why we do not emphasize s im u lation
in introd ucto ry cha pte rs. Neve rtheless, Appendix B is organ ized so that simulat ion examples can be
introduced togethe r with covera ge of the theore tical concep ts of Chapte rs 3, 7, 9, 10, 11, 12, and 18.
ww Middlebrook's Extra Element Theorem is pre sented in Appendix C, toge ther wit h four tutorial
exam ples. This valua b le design -oriented ana lytica l tool all ows one to exam ine effects of adding an extra
element to a lin ear system, wit ho ut solv ing the modified system all ove r aga in. The theo rem has many
w.E
pra ct ica l application s in the des ign of electro nic ci rcu it s, from solvi ng c ir cu it s by inspectio n, to qui ckly
finding effects of unmodeled paras it ic elements. In par ti cula r, in the Second Edition , Middl ebrook ' s
Extra Eleme nt T heorem is app lied to the input fi lter des ign of Chapter I 0 , and to resonant inve rter design
asy
in Chapter 19.
In Chap ter 7, we hav e rev ised the section on c ir cu it aver agin g and averaged swi tch mode lin g.
The process of circu it ave ra ging and de riving averaged switch models has been explained to allow read-
En
ers not only to use the basic models , but also to co nstru ct averaged models for other app licat ions of inter-
est. Examples of extens ions of the averaged switch modeling approach incl ud e modeling of sw it c h
con duct ion and switc hin g losses. Related to the rev ision of Chapte r 7 , in Appendix B we have inc lud ed
gin
new material on si mulat ion of co nverters based on the ave raged switc h modeling approach .
Chapte r 8 con tains a new substantia l int roduction that ex p la ins the engi neeri ng des ign process
and the need for des ign-oriented analysis. The discuss ions of design-o riented met hods for const ruction
eer
of frequ e ncy response have been revised and ex panded. A new ex ample has been added, involv in g
ap pro xi mate analysis of a dam ped inp ut fil ter.
ing
Chapter 11 on dynamic s of DCM (discontinuou s conductio n mode) conve rters, and Chap ter 12
on cu rrent-mode con tro l, ha ve been thoroughly rev ised and upda ted. Chapter 11 inclu des a sim pli fied
deri vation of DCM averaged sw itch mode ls, as well as an updated djsc ussion of high -fr eq uency DCM
.ne
dy namics. Chapter 12 includes a new , more straightforward expl anation and dis cussio n of current -mode
dynam ics , as well as new complete resu lts for tran sfer func ti ons a nd model parame ters of all basic con -
verters.
The cha pters on magnetics des ign have been s ign i ficantly revised and reorganized. Basic mag -
netics theory nece ssary for in fo rm ed desig n of magnetic componen ts in sw it ching power conve rters is
presented in Chapter 13. The descr iptio n of the prox imit y effect ha s been com ple tely rev ised , to exp lain
th is imp ortant bu t co mplex subject in a more intu iti ve man ner. Th e des ign of magnetic compo nents based
t
Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p xx.
on the copper loss co nstraint is desc ribed in Chapter 14. A new step-by-step design proce dur e is given
for multiple -windi ng ind uctors , and prac tical design examp les are inc luded for the des ign of filter induc -
tors , co upled indu ctors and flyback transfo rmers. The desig n of mag neti c compo nents (transfo rmers and
ac inductor s) based on copper and core loss cons iderations is desc ribed in Chapter 15.
To improve their log ica l flow, the chapte rs cove rin g pu lse-wi dth modulat ed rec tifiers have been
combined into a single Cha pter 18, and have been com plete ly reorgan ized . New sections on c ur rent con -
trol based on the critica l co ndu ctio n mode , as we ll as on operation of the CCM boost and DCM flyback
as PWM rec tifi ers, have been added.
Part V consis ts of Chapter 19 on reso nant conve rters and Chapter 20 on soft -switc hin g conve rt -
ers. l11e disc ussion of resonant inverter desig n, a topi c of imp ort ance in the field of h igh - freq uency elec -
tronic balla sts, has been expanded and expla ined in a more in t uitiv e manner. A new resonant in verte r

xxi
des ign exam ple has also bee n added to Chapter 19. Ch apter 20 conta ins an expa nded tu to ri al expl an atio n
of switching loss mechan isms, new charts illustrat ing the characteristics of quasi-square-wave and multi -
reso nant converters, and new up-to-da te sect ions about soft -sw itch ing converte rs, inc lud in g the zero-
voltage tran sition full -br idge converte r, th e aux ili ary switch approach , and the auxiliary resona nt com-
mut ated pole approach for de- de converters and dc- ac inverter s.
The materia l o f !he Second Edit ion is organized so th at chapters or sections of the book ca n be
selected lo offer an in troducto ry one-semester course, but yet enough material is prov ided for a sequence
of more advanced co urses, or for in d ividu al profess iona l deve lop ment. At the Unive rsi ty of Colorado , we
cove r the mater ial from the Second Edit io n in a sequence of three semes ter-long power electro nics
ww
courses . The first course, inten ded for se ni ors and first-year gradu ate stud ents, covers Chapters I to 6,
Sect ions 7.1, 7.2, 7.5, and 7 .6 from Chap ter 7, Chapters 8 and 9, and Cha pters 13 to 15. A projec t-or i-
en ted power electron ics des ign labora tory is offere d in paralle l with th is course. Thi s co urse serves as a
prere qui site for two follow -up courses. The second course starts wit h Section 7.4, proceeds to Append i-
w.E
ces B and C, Chapters IO, 11 and 12, and co nclud es wit h the mate ria l of Chapters 16 lo 18. In th e th ird
cour se we cover reso nan t and soft -sw itc hin g tec hniques of Chapte rs 19 and 20.
T11e websi te for the Seco nd Edit ion con tain s co mprehe nsive s upportin g mater ials for the tex t,
asy
inc lu ding solved problems and slides for in stru ctors. Comp uter s imu lat io n files can be dow nloade d from
thi s site, inclu d ing a PSp ice librar y of average d sw itc h model s, and si mu lation examp les.
Thi s tex t has evolve d fro m courses developed over seve nteen years of leac h ing power e lectron -
En
ics at the Univer sity of Colorado . The se cou rses, in turn, were heav ily influenc ed by our previou s expe ri-
ences as gradu ate studen ts at the Califo rn ia In st itu te of Techno logy, under the di rection of Profs.
Slobod an Cuk and R. D. Middlebrook , lo whom we are gratefu l. We app reci ate the he l pful sugg estions
gin
of Prof. Arthur Wi tul ski of the Uni ve rsity of Ar izona. We wou ld also like to th ank the many readers of
the Firs! Edition , stud e nts, and instru ctors who offe red their comm ents and sugges tions , or who po int ed
out errata. We have attempt ed to incorporate these suggest ions whereve r possible.
eer
ing
ROBERTW. ERICKSON
DRAGA N MAKS IMOVI C
.ne
Boulder, Colorado
t
Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p xxi.

1
Introduction
ww
w.E
asy
En
1.1 INTROD UCTION TO POWER PROCESSING gin
eer
The field of power electronics is concerned with the processing of electrical power using electron ic
devices [ 1- 7]. Th e key element is the switchin g convene r, illu strated in Fig. I. I. In ge neral , a swit chin g
ing
converter contains power input and control input ports, and a power output port. The raw in put power is
processed as specified by the co ntro l inpu t, yie ldi ng the co ndition ed outp ut power. One of several basic
fun c tions can be performed [2]. [n a de- de con ven er, the de inpu t voltage is converted to a de output
.ne
voltage having a larger or smaller mag nitude , possibly with opposite polarity or with isolation of the
input and output gro und references. In an ac-dc rectifier, an ac inpu t voltage is rectified, produ cing a de
o utput voltage. The de output voltage and/or ae input current waveform may be co ntro lled. Th e inverse
process, dc- ac inversion , inv olves tran sfo rmin g a de input voltage int o an ac output voltage of co ntrolla -
ble magnitude and frequency. Ac- ac cycloconversio n involves converting an ac input voltage to a given
ac output voltage of controllab le magnitude and frequency.
t
Control is in varia bly required. It is nearly always desire d to produ ce a we ll-regul ated output
Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p 1.
Po we r Switching Po wer
Fig. 1.1 The switching convener, :i ba.~ic inpu I con11erter out put
power processing block.
Control
inp ut

2 lntrod11
ctio11
Power Switchi11g Power

input converter output
Fig. 1.2 A c;ontroller is genernlly required.

Control
inp ut
ww
Feedforward Feedback
Controller
w.E Reference
voltage, in the prese nce of va ri ati ons in the input voltage and load curre nt. As illustrated in Fig . 1.2 , a
contro ller block is an int egra l part of any powe r processing syste m.
asy
High efficie ncy is essen tial in any power processing app lica tion. The pr i mary reaso n for thi s is
usu ally not the de sire to save money on one's elec tric bill s, nor to conserve e nergy , in spite of th e nobili ty
of such pur suit s. Rat her, high eff iciency converte rs are necessa ry because cons t ruct ion of low -efficie ncy
En
co nvert ers, produ cin g su bstan ti al output power , is imp ract ical. The efficiency of a conve rter having out-
put power P0 " 1 and input powe r P1n is
gin ( l.l)
The powe r Jost in the converter is
eer
Pi,,.,.,= P,i;-P ,,., = P'".,
(i-1) (1 .2)
Equation ( 1.2) is plotted in Fig. 1.3. ln a con- Tl ing

.ne
verie r that has an efficie ncy of 50%, power

P 10,., is diss ipate d by the converte r ele ments 0_8
and th is is equal to the output power, Pour-
Thi s powe r is converted into heat , whi ch
mu st be removed from the conve rter. If the
ou tput power is su bstant ia l, then so is the 0.6
t
Joss power. Thi s leads to a large and expen -

sive coolin g syste m, it causes the electronic

elements with in the converter to opern te at
high temp era tur e, and it reduces the sys tem 0.4
reliab ility. Indeed, at high output powers, it
ma y be impossi ble to adequate ly cool the
conver ter elements using cur rent tech nology .
0.2
Increasing the efficie ncy is the key
0 0.5 1.5
to obtainin g higher output powers. For exa m-
ple , if the converter efficiency is 90%, the n
the converter loss power is equal to only 11% fig. 1.3 Converter power loss vs, efficiency.

I.I Introduction lo Power Processing 3
Converter ~ out
J,'ig. 1.4 A goal of c1.11Ten1converter technology is to construct converters of small size and weight , which proce.~~
substantial power at high efficiency .
ww
o f the output power. Effic iency is a good mea sure of the success of a given convert er tec hno logy. Figure
I .4 illustrates a converte r that proces ses a large amount of power , with very high effic ienc y. Since very
lit tl e power is lost, the converter e lemen ts can be packaged wit h hi gh dens ity, leadin g to a co nve rter of
w.E
sma ll size and weight , and of low temperature rise.
How can we bu ild a circuit that c han ges the voltage , yet d issipates negligible powe r? The vari-
ous conven tiona l ci rcu it e lements are illus trated in Fig . l.5. The ava ilable circui t e le men ts fa ll broad ly
asy
into the classes of resi stive element s, capacit ive element s, magne tic devices inclu d in g indu ctors and
tr ansformers , semiconductor devices opera ted in the lin ear mode (for example , as cl as s A or class B
ampli fiers) , and semico nduc tor dev ices operated in the switched mode (suc h as in logic de vices where
En
tran sis tor s operate in either saturat ion or cutoff ). In convent ional sign a l processing appl ic ations , whe re
effi c iency is not the primary concern , magnet ic devices are usually avoided wherever po ss ible , because
of their large size and the d ifficulty of incorpora ti ng them into integrated ci rcuits. In contr ast , capacitors
gin
and ma gnetic devices are important eleme nts of s wi tching converter s, because ideally the y do not con -
sume power. It is the resi stive element , as well as the lin ea r-mode sem ic onductor dev ice , that is avoided
eer
[2]. Switched -mode sem iconducto r device s are also employed . Wh e n a sem iconductor de vice opera tes in
the off state , its curre nt is zero and hence its power dissipation is zero . When lhe se mi condu ct or device
operates in the on (satura ted) state , its voltage drop is s mal l and hence its power dissipation is also sma ll.
ing
ln ei th er event , the power dissi pated by the sem iconductor dev ice is low . So capacit ive and indu c tive ele -
ments, as well as switched - mode sem iconducto r devices , are ava ilable for synthes is of hi gh-efficiency
converters .
Let us now cons ider how to construct the simp le de-de conv erter examp le illu strated in Fig . 1.6.
.ne
The input vo ltage V8 is 100 V. It is des ired to supply 50 V to an e ffectiv e 5 Q load, suc h that the de load
current is 10 A
Introductory circuits textbooks descr ibe a low-efficiency method to perform the requ ired func -
tion : the voltage di vider c ircui t illust rated in Fig . l.7 (a). The de- de converte r then con s ists s imp ly of a
t
Vhe
>
1 ~
~
T -~11~· Linear- 5DT5 T
mode Switched-mode
Resistors Capacitors Magnetics Semiconductor devices
Fig, 1.5 Devices available to the circuit desig ner (21.

4 lntrod11
ctio11
I
lOA
+
Dc-tk
converter R V
5Q 5OV
ww
Fig. 1.6' A simple power processing e)(ample : w nstrnction of a 500 W tk - dc converter.
(a) :
i
. .
I
lOA
w.E + 50V
P1= =500W
-
R
+
asy 5.Q 50V
(b)
P;. = 1000W
E ng . ...
------ -----~-------
! +
...
..
H•••-ooOO.OOOO
SOY -
.OHOOU aO OO O ... UOHO H OH OOH 0 000 0- 0 0 000 -0 0H-HOO\
P0 ut = 500W
I
lOA
ine
i Linear amplifier
+
!.._
eri
\ a.ndbase driver_.
_____
! p"= ...soow
R
5.Q sov
V
•·• •n• ~••• n• • .... ••·••• ••-•• • oa-•• ·• .. ·•••• • ••-----· •• n ..

ng
.ne
P,n"' IOOOW p
Fig. 1.7 Chan g ing the de voltage via dissipative mean~: (a) voltage divider, (h) series pass rcg1ilator.
t
variable resistor, whose value is adju sted such that the requ ired output vo ltage is ob tained. l11e load cur-
rent flows thro ugh the var iable res istor. For the spec ifi ed voltage and curre nt leve ls, the power f't,,,, dissi-
pated in the variable resistor equals the load power P0 .., = 500 W. The source V8 supp lies power
P;,. = HJ()() W. Figure l.7(b) illustrates a more pract ical impleme ntation kn ow n as the linea r series-pass
regulator. The variable resistor of Fig. l. 7(a) is replaced by a linear -mode power trans istor , whose base
current is co ntro lled by a feedback sys tem such that the desired output voltage is obtaine d. The power
dissipated by the linear-mode transistor of Fig. I .7(b) is app rox imate ly the same as the 500 W lost by the
var iable resistor in Fig. l.7(a). Series-pass linea r regulators genera lly find modern app lica tion only at
low power levels of a few watts.
Figure 1.8 ill ustrates anoth er appro ach. A single-pole double -th row (SPDn sw itc h is co nnected
as shown . The sw itch out put voltage v, (t) is equal to the conve rter inp ut voltage Vg whe n the sw itch is in
pos ition I, and is equa l to zero whe n the sw itch is in posi tion 2. The switch posi tion is var ied periodi -
ca lly, as illustrate d in Fig. 1.9, such th at v,(t) is a recta ngu lar wavefo rm h av in g frequency f,, and period
T, = 1/f_.,
. l11e duty cycle D is defi ned as the fract ion of time in wh ich the sw itch occupies pos ition I .
Hence, 0 :'>D :$ I . In pract ice, the SPOT sw itch is realize d usi ng sw itched-mode semicond ucto r devices ,

I. I hitrodr1crio
11to Power Processing 5
--~
I
[ . j lOA
+
v, 2
v,(t) R v(t)
lOOV 50 V
!....... ............... ....................... ....... ............. ............ ..... J
ww
flg, 1.8 I11scrtionof SPOT switch which changc.5the de component of the voltage.
w.E •,(~
l-- v, +-.-+-v,
~nv
,
asy
switch !
position: !
j- DT., -:
1
!
!
-(l - D) T., -+j
2
j
!
t
Fig. 1.9 Switch output volmgc: wavcfo.-m11

,(1).
En l i
which are controlled such that the SPOT swi tchin g function is attained .
gin
The swi tch cha nges the de co mpone nt of the voltage. Recall fro m Fourier ana l ysis that the de
co mponen t of a periodic wavefor m is equal to it s average va lue . Hence, the de compone nt of v,(t) is
V, =-1l, ir., v,(t)d t =DV 8 eer (1.3)
ing
' 0
Thus, the switch changes the de voltage, by a factor equal to the duty cycle D. To convert the input volt-
age V8 = 100 V int o the des ired out pu t voltage of V = 50 V, a duty cycle of D =0.5 is required .
.ne
Again, t he power diss ipated by the sw itch is ideally zero . Whe n the sw itch contacts are closed,
then their voltage is zero and hence the power diss ipa tion is zero. When the switc h con tacts are open,
t he n the curre nt is zero and aga in the powe r dissipa tio n is zero. So we have succeeded in changi ng the de
voltage co mpo nent , us ing a device that is ideally lossless.
In addi tion to the desired de co mpone nt V,, the switch ou tpu t vo ltage wavefo rm v,.(t ) also con-
tains undes irab le har monics of the switc hing frequency. In most app licat ions, these har monics mu st be
t
removed, such that the ou tpu t voltage v(t) is essentia lly equal to the de co mponent V = V,. A low-pass fil -
ter can be employe d for this purpose . Figure 1.10 illustra tes t he introductio n of a sing le-section L-C low-
pass filter. If the filter corner frequency / 0 is sufficien tly less than the switc hing frequency J,. then the fil-
ter essent ially passes o nly the de co mpone nt of v..(t). To the exten t that the sw itch, ind uctor, and capacitor
ele ments are ideal , the effic iency of t his de- de conve rter can approach 100%.
In Fig. I.I I, a contro l sys tem is introduced for reg ulatio n of the ou tput voltage . Since the output
vo ltage is a fu nctio n of the switch d uty cycle, a co ntro l system ca n be co nstructed that varies the dut y
cycle to cause the output voltage to follow a give n refe rence. Figure 1. 11 also illustra tes a typ ical way in
whi ch the SPOT sw itch is realize d using switche d -mode se mico nductor dev ices . The converter power
slage developed in Figs. 1.8 to I . 11 is ca lled the buck convert er, because it reduces the de voltage.
Converters ca n be cons tructed that pe rform other power process ing func ti o ns. For example, Fig.

6 /ntrodut tfrm
.... _..... _.... .. ......... ._u ...

! i(t)
!
+ L +
v, 2
C v(t)
IOOV
P1n .. 500W '··············----- ·-··-························-·--1P = 500 W

P loss smalJ DUI
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Fig. 1.10 Addition of L-C low-pass filter, for removal of switching harmonics.
Power Switchingconvener Load
w.E input
.----!-
.-······-·-·-····-·-·-····························-·····-···
' --, .........--....... -J '- ........- ....' ----.---,
+
v,
asy V
H(s)
Sensor
gain
En L- -·--· ---··-··-· ...............

Transistor
.......................
;
g
gate driver
lill_ inee
6 Pulse-width Gc(s)
modulator
Compensator
Reference
Fig, 1.1I
,rr, T,
Addition of control system to regulare the output voltage .

input v,.,f
rin
(a) 2
g.n
et
L
Fig. 1.12 The boost converier:
(a) ideal converter circuit, (b) output v, C R V
voltage V vs. transistor duty cycle D.
(b) sv,
4V1
JV,
V
2v,,
v,
0
0 0.2 0.4 0.6 0.8
D

1.2 Several Applicatiomof PowerElectro11i

cs 7
(a)
2
v, + v(r)
2
load
(b) v,(I)
- - - ..
.---. ---.-
... ......
--
ww ,·
,-"
.,;···
/ ····· ...•
....
'·
w.E
......
.......
•'"'
-------- - .... - - --
'""10 .. ,
asy
Fig. 1,13 A bridge-type dc-h1ac inverter: (a) ideal inverter circuit, (b) typical pulse-wid th-modula ted switch volt-
age waveform v,(t), and its low-frequency component.
1.12 illustrates a circuit known as the boost converter, in which the positions of the inductor and SPDT
En
witch are interchanged. Thi converter i capable of producing output voltage that are greater in magni -
tude than the input voltage. In general, any given input voltage can be converted into any desired output
gin
voltage, u. ing a converter containing witching device. embedded within a network of reactive e lemen~ .
Figu re I.J 3(a) illustrate a simp le dc - l (ilac inverter circuit. As illustrated in Fig. I. lJ(b ), the
switch duty cycle is modulated sinusoidally. This causes the switch output voltage vp) to contain a low -
frequency sinusoidal component. The l-C filter cutoff frequency fo is selected to pass the desired low-
frequency components of v_,(t), but to attenuate the high-frequency switching harmonics . The controller
modulates the duty cycle such that the desired output frequency and voltage magnitude are obtained. eer
1.2 SEVERALAPPLICATIONS OF POWER ELECTRONICS ing
.ne
The power levels encountered in high -efficiency swi tching converters range from (l) less than one watt,
in de-de converters wiihin battery-operated portable equ ipment , to (2) ten . , hundreds , or thou and of
watt in power supplies for computers and office equipment, to (3) kiJowatts to Megawatts in var iable-
speed motor drives , to (4) roughly l(XX) Megawatts in the rectifiers and inverters that interface de trans-
mi sion line to the ac utility power ystem . The converter y tern of evera l application are illu crated
t
in th i ection .
A power supp ly system for a laptop computer is illustrated in Fig. l.l4. A lithium batte ry pow-
er the y tern and seve ra l de-de converters change the battery voltage into the voltage . req uired by the
loads. A buck converter produces the low -vo ltage de required by the microprocessor. A boost converter
increases the battery voltage to the level needed by the disk drive . An inverter produces high-voltage
high-frequency ac to drive lamps that Light the display. A charger with transformer isolation converts the
ac l ine vo ltage into de to charge the battery . The converter wit c hin g frequencie are typically in the
vicinity of severa l hundred kilohertz ; this leads to sub stantial reductions in the size and weight of the
react ive elements. Power 111a11a ge111e111
is us ed. to control sleep modes in which power consumption is
reduced and battery life i extended. ln a distribwedpower :rysr em, an intermed iate de vo ltage appear at
the computer backp lane. Each printed circuit card contains high -densi ty de-de converters that produc e

8 /111md11c1ion
Inverter Display
backlightlng
Chaf8U
Buck Microprocesso
v.,.(1) PWM converter
Rectifier Power
managemelll
ac lint inpuJ Dislc

Uthium
ww
85-265 Vnns drive
battery
Fig, 1,14 A laptop computer power supply system.
w.E
locally-regulated low voltages. Commercial appli ca tion of power electro nic include off-line power sys-
tem for co mputers, office and laboratory eq uipment, uninterruptable ac power upplies, and electro nic
asy
balla t for gas di charge lighting.
Figure 1.15 illustrates a power system of an earth-orbiting spacecraft. A solar array produces
the main power bu voltage Vb11.,. DC- DC converter convert V11.,. to the regulated voltages required by
En
the pacecraft payloads . Battery charge/di charge contro ller interface the main power bus to batterie ;
these controllers may also contain dc--<lcconverters. Aerospace applications of power electronics include
the power systems of aircraf t, spacecraft, and other aerospace vehicles.
gin
Figure 1.16 illu trates an electric vehicl e power and drive . y tern. Batteries are charged by a
converter that draws high power-factor sinusoidal current from a single-p hase or three-phase ac line. The
batteries supply power to variable-speed ac motors to propel the vehicle. The speeds of the ac motors are
eer
controlle d by variation of the electrical input frequency. Inverters produce three-phase ac output voltages
of variable frequency and variab le magnitude , to control the speed of the ac motors and the vehicle. A
ing
dc--<lcconverter rep down the battery voltage to the lower de level. required by the electronic of the
system. Applications of motor drives include speed control of industr ial processes, such as control of
compres or , fan . and pump : tran portation appl ication such a electric vehicles, ubway , and loco-
.ne
motives; and motion control applications in areas such as computer peripherals and industrial robots.
Power electro nic al o find application in other diver e industr ie , including de power upplie ,
+
Dissipative
shunt regulato
t
Solar
array
Battery De-de De-de

chargddisclUJrgt converter convenu
conlrolle.rs
Balleries I I I I Payload Payload

Fig. 1.15 Power system of an eanh-orbiting spacecraft.

/.3 Elemellfsof Power Electronic.,· 9
Sr Sr
acmachine acmachine
/nvernr lnvener conuvlbu.r
l
I
btuttry ! µP I
Jt1t1cline Ba11ery ·1 l
~ system
controller
__J
ww50/60Hi
chargu
~f r
oc.oc
convener
,. Vehicle
Low•w,ltage electronics
w.E T
lnvener lnvener
de bus
asy
Variable..{rrquency
Varlable-t!Oltage
oc
acmachine acmachine
En 2S 2S
Fig. 1.16 All electric vehicle power and drive system .
gin
uninterruptable power supplies and batrery chargers for the telecommunications indu try; inverter sys·
eer
tern for renewable energy generation application such as wind and photovoltaic power; and utility
power sy ·terns application inc ludin g high -vo ltage de tran mis ion and static VAR (reactive volt-ampere)
ing
compensator .
1.3 ELEMENTS OF POWER ELECTRONICS
.ne
One of the things that makes the power electronics field interesting is its incorporation of concepts from
a diver e et of field ·, including :
analogcircuit
electronic devices
control ys1ems
t
power sy 1ems
magnetic
• electric machine
numericalsimulation
Thu the practice of power electronic require a broad electrica.1engineering background. In addition,
there are fundamental concepts that are unique to the power electronics field, and that require specialized
study.
1l1e pre ence of high-freq uency switching make the under tanding of witched-mode convert-
ers not strai ghtforward . Renee, converter modelin g is central to the study of power electronics. As intro-
duced in Eq. ( l.3) the de component ofa periodi c waveform is eq ual to its average value. This ideal can

10 l111rod11e1
io11
be generalized, to predict the de componentsof all converter waveforms via averaging. Io Part I of thi
book, averagedequivalent circuit model of converter operating in steady tate are derived. These mod-
el nor only predict the ba. ic ideal behavior of witched-modeconverter , but also model efficiency and
losses. Realization of the switching elements, using power semiconductor devices, is also discussed.
De ign of the convertercontrol sy tern require model of the converter dynamic . In Part LIof
thi book, the averaging technique i extended to describe low-frequency variations in the converter
waveform . Small- ignal equivalent circuit model are d veloped, which predict the control-to-output
and line-to-transfer functions, as well as other ac quantities of interest. These models are then employed
to design convertercontrol systems and to lend an understanding of the well-known current-programmed
controltechnique.
ww The magnetic element are key component of any witching converter. The de ign of high-
power high-frequency magnetic device having high efficiency and mall ize and weight i central to
most converter technologies.High-frequency power magnetics design is discussed in Part ill.
w.E Pollution of the ac power y tern by rectifier harmonic i a growing problem. A a re ult, many
converter y tern. now incorporatelow-harmonic rectifiers which draw . inu oidal currents from the util-
ity system. These modern rectifiers are considerably more sophisticated than the conventional diode
bridge: they may contain high-frequency witched-modeconverters, with control system that regulate
asy
the ac line current waveform. Modem rectifier technology i treated in .PartlV.
Resonant converters employ qua i-sinusoidal waveforms, as opposedto the rectangular wave-
form ofihe buck converter illustrated in Fig. 1.9.The.ere onant converter find application where high-
En
frequency inverters and converters are needed. Resonant converters are modeled in Part V. Their loss
mechanism , includtng the processes of zero-voltage witching and zero-current switching, are dt -
cussed.
gin
REFERE CES
[I] eer
W. E. NEWELL, "Power Electronics- Emerging from Limbo," IEEE Power Electro11icsSpecialists Co11f
er-
[2]
, 1973 Record, pp. 6- 12.
e11ce
R. D. MJDDLEl3ROOK ing
, "Power Electronics: An Emerging Discipline," IEEE l111
ematio11a/Symposium 011
Circuits and Systems, 1981 Proceedi ng, April 1981.
.ne
[3] R. D. MJDDLEBROOK."Power Electronics: Topologies, Modeling. and Measurement," IEEE l111

ematio11a
/
[4)
Symposium 011 Circuits and Systems, 1981 Proceedings , April 1981.
S. CUK. "Basics of Switched-Mode Power Conversion: Topologies. Magnetics. and Control," in Advances
in Switched-Mode Power Conversion, vol. 2, pp. 279-310, lrvine : Teslaco. 1981.
t
(5) N. MOHAN,"Power Electronics Circuits: An Overview," IEEE /ECON, 1988 Proceedings, pp. 522-527.
[6] B. K. BOSE. "Power Electronic - A Technology Review: · Pmceedi11gsof the IEEE, vol. 80, no. 8, Augu. t
I 992, pp. I 303-1334.
[7] M. ISHIHARA , ''Power Electronic Diversity," /111

ematio11a/Power Electro11ic.rCo11/
ere11
ce (Tokyo), 1990
Proceedin gs. pp . 21-28.

ww
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asy
En
Part I
gin
Converters in Equilibrium
eer
ing
.ne
t

ww
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asy
En
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This page intentionall y left blank
eer
ing
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t

2
Principles of Steady-State
Converter Analysis
ww
w.E
asy
En
2.1 INTRODUCTION
gin
eer
In the previous chap ter , the buck converter was in troduced as a mean s of reduc in g the de voltage, us ing
only nondissipative sw itches , inducto rs, and capac itors . The switch produces a recta ngular wavefo rm
ing
v,(t) as illus trate d in Fig . 2. 1. The voltage v,(I) is eq ual to the de inpu t vo ltage V,, when the swi tch is in
pos ition I, and is equa l to zero when the switch is in position 2. In practice, the sw itch is rea lized usi ng
.ne
(a)
+
2
R V(l)
t
(b) v,(t)
0
0 DT,
SwiJch
posi tion: 2 l
Fig. 2.1 !deal switch, (a), used to reduce the 1•ol1a

ge de component, and (bl its output voltage wavefor m v,.(I) .

14 Pri11ciples
of Steady-StateCo11vert
er A11al
ysis
v,(t)
v,
Fig. 2.2 Detenninatio11of lhe ~witch output voltage
de c,1mpo11ent, hy integrating and dividing hy the _ (v ) = DV 1
-·----,area - ...... ~- .............................................
..
switching periud . DTJV,
0
0
power semicon ducto r devices, such as transistors and diodes, which are co ntro lled to turn on and off as
requir ed to perform the function of the idea l switch. The sw itc hing frequen cy /,, equal to the inverse of
the swi tch ing period T,. generally lies in the range of I kH z to I MHz, dependin g on the sw itch in g speed
ww
of the semiconduc tor devices. The dut y ra tio Dis the fract ion oftime that the swi tch spends in posit ion I ,
and is a number betwee n zero and one. The complement of the duty ratio, D', is define d as (I - D).
The switch reduces the de component of the voltage: the swi tch ou tput voltage v,(t) has a de
w.E
componen t that is less than the conve rter de input voltage V,. From Fourie r ana lysis, we know that the de
component of v.,(t) is given by its average val ue ( v), or
asy (v,)= TI LT_,v,(t)dt

' 0
(2 . 1)
En
As illustrated in Fig. 2.2, the integral is given by the area under the curve, or DT , Vx. The average value is
therefore
gin (2 .2)
The switch reduces the de voltage by a factor of D.

eer
So the average value, or de component, of v,(t) is equal to the duty cyc le tim es the de input voltage V,.
What remains is to insert a low-pass filter as shown in Fig. 2.3. The filter is designed to pass the
de component of v..(t), but to reject the components of v,(I) at the switching frequency and its harmon ics.
The outpu t voltage v(t) is then essentia lly equal to the de component of v..(t):
ing
.ne (2.3)
V"'
~·1 = DVg
(~ \
t
The converte r of Fig. 2.3 has been realized using lossless e lements. To the extent that the y are ideal, the
inductor, ca pacitor, and sw itch do not diss ipate power. For example, when the switch is closed, its volt-
age drop is zero, and the current is zero when the switch is open. In e ith er case, the power dissipated by
the switc h is zero. Hence, efficiencies ap proaching 100% can be obtained . So to the extent that the com -
ponents are idea l, we can realize our object ive of chang ing de voltage leve ls usin g a lossless network .
L
+ +
2
v 1(t) C R v(t)
Fi~. 2.3 Im en iori of low -pass filtea:r,to ren1Qvc the switching harmo nics and pa~\ on Jy Ille de ~omponcnl of v_,.(t) to
th e outpul.

2.2 Inductor Volt-SecondBalance, Capacitor Charge Balance, a11dthe Sma/1-Ri/J/JleAp/Jroxi111ario11 15
Fig. 2.4 Buck convener de output vollage V vs. duly cycle D.
The networ k of Fig . 2.3 also allows co ntrol of the out put. Fig ure 2.4 is the co ntro l charac teri st ic
ww
of the converter. The o utput voltage, give n by Eq. (2.3), is plotte d vs. dut y cycl e. The buck co nverter has
a lin ea r co ntrol ch aracter isti c. Also, the out put voltage is less than or equa l to the inpu t voltage, since
0 ::;D :5 I. Feedback syste ms are often constructed that adj ust the duty cycle D to regulate the converter
w.E
out put voltage. Inverters or power ampli fie rs can also be built , in whic h the dut y cycle varies slow ly with
time and the output voltage follows.
The buck co nverter is j ust one of many possible swi tc hing converters. Two other com monly
used converters , whic h perform d iffe rent voltage convers ion fun ctio ns, are illu stra ted in Fig. 2.5. [n the
asy
boost converter, the pos itions of the indu ctor and sw itch are reversed . [t is show n later in this chap ter that
the boost converter steps the voltage up: V ~ V, . Ano ther converter, the buck-boost converte r, can eit her
increase or decrease the mag ni tude of th e voltage , but the polarit y is invert ed. So with a pos itive in pu t
En
voltage, the ideal bu ck-boos t converte r can prod uce a nega tive out pu t voltage of an y mag nitude . [t ma y at
first be surpri si ng that de ou tput volt ages can be produced th at are greater in mag nitude tha n the input , or
gin
that have opposi te polarity. Bu t it is indeed possi ble to produ ce any desired de out put voltage us ing a pas-
sive networ k of only indu cto rs, capacitors, and embedded sw itc hes .
In the above discuss ion, it was poss ible to de rive an expressio n for the outp ut voltage of the
eer
buck converter, Eq. (2.3), using some simple arg uments based on Fourier analys is. However, it may not
be imm ed iat e ly obv ious how to di rec tly appl y these arg uments to find the de out put vo ltage of the boost,
buck- boost , or other conve rters. The obj ective of thi s chapter is the develo pment of a more genera l
sw itches [ 1-8].
ing
method for an alyz ing any sw itch ing conver ter compri sed of a network of induc tors, capac itors, and
The prin c iples of inductor volt-second balance and capacitor charge balance are deri ved; these
.ne
ca n be used to solve for the in ductor c urre nts and cap ac itor voltages of sw itc hi ng con ver ters . A use fu l
approx imation, the small- rippl e or linear- ripple approximation, greatly fac ilita tes the analys is. Some
t
si mpl e methods for selectin g the filte r elem ent val ues are also dj scussed.
2.2 IND CTOR VOLT-SECOND BALANCE , CAPACITOR CHARGE BALANCE, AND

THE SMALL-RIPPLE APPROXIMATION

Let us more closely exa m ine the inductor and capaci tor wavefor ms in the buck converter of Fig. 2.6. It is
imposs ible to bui ld a perfect low-pass filter that allows the de co mponent to pass but comp lete ly removes
the componen ts at the switch ing freq uency and its har monics . So the low-pass fil ter mu st allow at least
some sma ll am ount of the high -frequ ency harmonics generated by the switc h to reach the outp ut. Hence,
in practice the output voltage wavefo rm v(t) appears as illu strated in Fig. 2.7, and can be expressed as
v(t) = V + v,wt ,(I) (2.4)
So the ac tual outp ut voltage v(I) co nsists of the desired de co mpo nent V, pl us a sma ll undes ired ac com-

16 Princif}les of Steady-Stare Converter Analysis
(a)
0.8
~ 0.6
~
._. 0.4
0.2
0.2 0.4 0.6 0.8

D
ww
w.E
M (D) =~
4
asy 0 -1---0----t,-----t----+----;
0 0.2 0.4 0.6 0.8
En
D
(c)
gin 0
0 D.2 0.4
0
0.6 o.s
eer
2 + -1
i, (t) iS -2
L
C R • ~ -3
-4
-5
M(D)= -_'b
1
ing
.ne
Fig. 2.S Thrne basic conve rte rs :md their de convers ion ratios M(D) = VIV/ (a) buck, (b) boost, (c) buck -b nnst .
1•1g. 2.6 Buck COIIVCrte r dr-

cuit, with the inductor voltage
v1_(1) and capacitor current iG{I)
2
ic<,
t)
+ t
waveforms specirknlly identi-

\Ig C R v(I)
fied.
pone nt Vri 1,1,1,(t) arising from the incomplete atten uation of the sw itchi ng harmonics by the low-pass filter.
The magnitude of v,,1,pi.,(t)h as been exaggerate d in Fig. 2.7.
The output voltage sw itching ripple should be sma ll in any well -designed converter, since the
object is to produce a de outp ut. For example, in a computer power supp ly havin g a 3.3 V output , the
switchin g ripple is normally required to be less than a few tens of mill ivolts , or less than 1% of the de
compon ent V. So it is nearly alway s a good approx imation to assume that the ma gnitude of the swi tchin g

2.2 /11d11
ctor Volt-Second Balance, Capacitor Charge Balance, and the Small-Ripple Approxi11
w1io11 17
v(l)
Fig. 2.7 Output volmge wavefor m v(I), V

1:ons isting of de com ponent V ~nd switching
rippk v,lf'l'l, (1).
rippl e is m uch sm al ler than the de co mp onen t :
ww II v,,
,,,,1,,j -..-
;V (2 .5)
1·,11'1
w.E
Th erefore , the output volta ge v(t) is well ap prox imated by its de com po nen t V, w ith the sma ll ripp le ter m
••·(1) neg lected:
(2.6)
asy
v(I)"" V
Thi s ap proxim ati on, know n as the sm all -ripp le approxi ma tion, or the lin ear -ri ppl e appro xi ma tion,
En
gre at ly simpli fies the anal ys is of the conve rter wavefo rm s and is use d throu g ho ut thi s book .
Next let us a nal yze th e in d ucto r curr ent wavefo rm. We ca n fi nd the indu ctor cu rrent by in tegrat -
ing th e ind uctor vo lt age wave form. With th e sw it ch in pos ition I , the left side o f the inducto r is co n-
gin
nec ted to the input voltage VM,and the cir cu it reduces to Fig. 2 .8(a ). The indu ctor vo lt age v1_(1) is then
g i ven b y
1•1 = V~ v(I)
eer
As describe d abo ve , th e o utpu t voltage v(t ) co nsists of the de co mp one nt V, plu s a sm al l ac r ip ple ter m
(2. 7)
ing
v,,pp1/t ), We can m ake the sm all ripple appro x im a tio n here, Eq. (2.6), to rep lace v(t) w i th it s de co mpo-
nent V:
.ne
v,.,, V" - V (2.8)
t
So w it h the swit ch in po si ti on I, the in ducto r voltage is esse ntia ll y co n sta nt a nd equa l to V~ - V, as show n
in Fig . 2.9. By kno wledge of the indu c tor voltage wave form , the inducto r curr en t can be fou nd by use of
the de fi ni t ion
di (I )
(2 .9)
,•,_(r) = L 1ft
(a) i,_(t) L (b) L
+ vL(t) + + vi( t) - +
iJ t) icf.t)
1'i(t)
v8 C R v(t) v& C R 11(
t)
Fig. 2.8 Ruck conven e r t:in:uic: (a) while tilt switch is in pos it ion 1, (h) w!li lc the swi tc h is ifl positio11 2 .

18 Pri11
ci11lesof Steady-State Converter Analysis
- -
V8 - V
Fig. 2.9 Sle~dy-Nliilcimluctor vol1ugc wuvcfom1, DTS -D'T ,-
buc·k conwrter.
t
- V
Switch
position : 2
Thus, duri ng the first interva l, when 111 (1) is approxim ately ( V
1, - V), the slope of the inductor current
ww
waveform is
r!/ (1)
dt1
1·1 (r)
=-,_-~ -V-"L-- V ( 2. Ill)
w.E
which follows by divid ing Eq. (2.9) by L, and substitut ing Eq. (2.8). Since the inductor voltage 111_(1) is
essentia lly consta nt while the switch is in position I, the inductor current slope is also esse ntially con-
asy
stant and the inductor current increases linearl y.
Similar arguments apply dur ing the second subinterva l, when the switch is in position 2. The
left side of the inductor is then connected to ground, leading to the circuit of Fig. 2.&(b). It is importa nt to
En
consistently define the polarities of the inductor current and voltage; in particu lar, the polar ity of v1_(t) is
defined consi stent ly in Figs. 2.7, 2.8(a), and 2.8(b). So the inductor voltage dur ing the second subinterv al
is given by
gin
V1(rJ = - V(I ) (2. 11)
Use of the small rippl e approx imation, Eq. (2.6), leads to
v 1(1) ~ - V eer (2.12)
ing
So the inductor voltage is also essentially consta nt while the switch is in position 2, as ill ustrated in Fig.
2.9. Substi tutio n of Eq. (2.12) into Eq. (2.9) and solution for the slope of the inductor curre nt yields
.ne
(2 .1 3)
Hence, during the second subinterval the inducto r current changes with a negative and essentially con-
stant slope.
We can now sketch the inductor current waveform (Fig. 2.10). The inductor current begins at
t
some initia l value i1_(0). During the first subinter val, with the switch in position I, the inductor current
increases with the slope given in Eq. (2.10). At tim e t = DT , , the sw itch changes to positio n 2. The cur-
rent then decreases with the constant slope given by Eq. (2.13). At time t = 7~. the switch changes back to
Fi1;:. 2. 10 Stea dy-slaw indU(;Lor wr ret1t wav e form .

bud COllvt:l'tCI' .

2.2 /11du
ctor Volt-Seco11dBalance, CapacitorChargeBalance, and the Small-Ripple Approximation 19
pos1t1on 1, and the process repeats.

It is of interes t to calculate the inductor current ripple ti.it.· As illustrated in Fig. 2.10, the peak
inductor current is equal to the de component / plus the peak-to-average ripple ti.i1_. This peak current
flows through not only the inductor, but also through the semicond uctor devices that comprise the switch.
Knowledge of the peak curren t is necessary when speci fyin g the ratings of these devices .
Since we know the slope of the inductor current during the first subinte rval , and we also know
the length of the first subinterva l, we can calculate the ripp le magni tude. The i, _(t) waveform is sy mmet ri-
cal about/, and hence during the first sub inte rval the current increases by 2!ii1_ (since ti.i1 is the peak rip-
ple, the peak-to-peak ripp le is 2!iiJ. So the change in curre nt , 2!ii1_, is eq ual to the slope (the appl ied
inductor voltage divided by L) times the length of the first subinter val (DT.):
ww (ch,rngt:in i 1) = (slope)(k11glh of subin terval)
(2Llt,.·)= (V
- ,-V)(
DT,)
(2.14 )
w.E
Solution for tJ.ityields
L-
asy .1iL =
V -V
"2L DT,
(2.15 )
En
Typical values of tJ.it_lie in the range of 10% to 20% of the full -load value of the de compo nent /. It is
unde sirable to allow t:,./1 to become too large; doing so would increase the peak currents of the inductor
gin
and of the semiconductor switc hin g devices, and would increase the ir size and cost. So by design the
inductor current ripple is also usually small compared to the de component/ . The small -ripple approxi-
mation i,(I) "' l is usuall y j usti fied for the inductor current.
eer
The inducto r value can be chosen such that a desired curre nt ripple l::.i1_ is att ained . Solu ti on of
Eq. (2.15) for the indu ctance L yields
V - V
L= - k- - DT
2.ai,. '
ing (2.16)
This equ ation is com monly used to select the value of inductance in the buc k converter.
.ne
It is entire ly possible to solve converters exactly, wit hou t use of the small-ripp le approximation.
For example, one could use the Laplace transform to write expressions for the wavefo rms of the circuits
of Figs. 2.8(a) and 2.8(b). One could then invert lhe transfor ms, malch boundary condilions , and find the
periodic steady-state solution of the circuit. Having done so, one could then find the de components of
the waveforms and the peak values. But this is a great deal of work, and the results are nearly always
intractable. Besides, the exlra work involved in writing equat ions lhat exactly describe lhe ripp le is a
t
waste of time, since lhe ripple is small and is undesired. The small -ripple approxi mation is easy to apply,
and quickly yields simple expressions for the de components of the converter wavefo rms.
The inductor currenl wavefo rm of Fig. 2. 10 is drawn under steady-state condit ions , with the
converter operating in equil ibri um. Let' s consider next what happens to lhe inducto r current when the
converter is first turned on. Suppose that lhe inductor current and output voltage are in itiall y zero, and an
inpu t voltage V, is then applied. As shown in Fig. 2.11, i1 (O) is zero. During the first subinterval , with the
switch in positio n 1, we know that the inductor curren t will increase, with a slope of (V 11- v)/L and with
v initial ly zero. Next, with the switch in position 2, the inductor current will change with a slope of - v/L ;
since v is initia lly zero, this slope is essen tially zero. It can be seen that there is a net increase in inductor
currenl over the first switch ing period, because i1,Cl) is greater lhan i1_(O). Since the inductor curre nl

20 Principles of Steady-Stare Converter Analysis
- v(t)
- L-
iL(T,) ··-··
il O) = Oo DT, T, 2T, nT, (n + l )T,
wwFig. 2.11 Inductor current waveform during converter turn-on cransient.
flows to the output, the outp ut capacitor will charge slightly, and v will increase slightly. Th e process
w.E
repeats duri ng the seco nd and succee ding switch ing periods, wi th the indu ctor curren t incre asin g dur ing
each subinterval 1 and decreas ing d ur ing each subint erv al 2 .
As the output capaci tor con tinu es to charge and v increases, the slope dur ing subin terval 1
asy
decreases wh ile the slope d ur in g su b inter val 2 becomes more nega tive . Eventually , the poi nt is reac hed
where the increase in indu ctor curren t du ring subinte rval I is equal to the decrease in indu ctor curr en t
durin g sub int e rval 2. Th ere is then no net change in ind uc tor curre nt ove r a complete switc h ing period ,
and the converter operates in steady state. The co nverter waveforms are period ic : i1_(11TJ = iL((11+ l)T,).
En
From thi s po int on, the indu ctor c urr ent wavefo rm appears as in Fig. 2. 10.
The req ui reme nt that, in equili br ium , the net cha nge in indu ctor c urr ent over one sw itchi ng
gin
period be zero leads us to a way to find steady-state con d it ions in any switc hing converter: the princ ipl e
of inductor volt-second balance. Give n the de fin ing rela tio n of an indu cto r :
eer (2.17)
Integrat ion over one co mplete sw itc h ing perio d, say fro m t = 0 to 7'., yield s
. . l (T ,. ing (2 . 18)
.ne
11 (T.) -1 1,(0) = i Jo v1(1)d1
This eq ua tion states that the net c hange in ind uct or curren t over one sw itchi ng period, give n by the lef t-
han d side of Eq. (2. 18), is proport ional to the int egral of the applied in duc tor vo ltage ove r the interval. In
steady state, the in itial and fina l values o f the ind uctor curr ent are eq ual, and hence th e left -ha nd side of
Eq . (2. 18) is zero. The refore, in steady state the integ ral of the applied in duc tor voltage must be zero : t
(2 . 19)
The rig ht-hand side of Eq. (2. 19) has th e unit s of volt-secon ds or flux-linkages . Eq uatio n (2. 19) sta tes
tha t the total area, or net volt-seco nds, under the v1_(t) waveform mus t be zero.
An eq uivalen t form is obtained by di v id ing both sides of Eq . (2. 19) by the switch in g perio d T,:
(2. 20 )
Th e ri g h t- hand side of Eq. (2.20) is recog n ized as the average value, or de co m po nent , of vL(t) . Eq ua tio n

2.2 Inductor \lolr-Seco11dBalance, Capacitor Charge Balance, and the Small-RippleApproximation 21
v, -v Tora/ area 1..

Fig. 2.12 The principle of inductor volt-second
balance: in steady state, the 11etvolHeconds applied
to an inductor (i.e ., the total area A) must be zero.
\
1
- V
(2.20) states th at, in eq ui libr ium , the app lied ind uc tor vol tage must have zero de compo nen t.
The induct or voltage wavefo rm of Fig . 2.9 is reproduced in Fig. 2. 12, w ith the area under the
ww
A is g ive n by the area~ of th e two recta ngles , or
vL(t) cur ve spec ifically id en tifi ed. The total area
(2.21)
w.E
The average va lue is therefore
asy (vL)=#, =D(V

s-V)+D'(- v)
By eq uatin g ( v1) to zero, and notin g tha t D + D' = 1,one obta ins
(2.22)
0
En
=UV~ -(D+ D')V =DV~ - V (2.23)
So lut io n for Vy iel d s

gin
V=DV~
eer
w hich co incides with the result obt aine d pr ev io usly, Eq. (2.3). So the pr incip le of induc tor volt -seco nd
(2.24)
bal ance allows us to der ive an expression for the de component of the conve rter o utput vo ltage. An
ing
ad van tage of thi s approach is its ge nerality - it can be appli ed to an y con verter. One si mp ly sketches the
applied inducto r voltage wavefo rm , an d equ ates the avera ge val ue to zero . Thi s metho d is used later in
.ne
this c ha pter , to so lve several more compli ca ted co nverters .

Simi lar argumen ts ca n be applied to capaci tors. The de fin in g equation of a ca paci tor is
id-,t) = Cdv:ii')
In tegra tion of thi s equ ation over one switc hin g period yie ld s
(2.25)
t
(2.26)
In steady state, the net c hange over one switc hing period of th e capaci tor voltage mu st be zero, so that
the le ft-hand side of Eq. (2.2 6) is equ al to zero. Therefo re, in eq uilibrium the in tegral of the capacit or
curre nt over one switc h ing period (ha vin g the dimensions of amp -seco nds , or charge ) should be zero.
There is no net cha nge in capaci tor cha rge in stead y state. An equi va len t sta temen t is

22 Principles of Steady-State Converter Analysis
O= f j·r•ic{t )dt = (ic)

• 0
(2.27)
The avera ge va lue , or de com po nen t, of the ca pac itor cu rre nt mu st be zero in e qu ilib ri um .
Th is should be an in tu it ive res ult. If a de c urr ent is applied to a ca pac itor, then the capa cito r w i ll
charge co nt inuall y and its voltage will increase w ithou t boun d . Likewise, if a de voltage is applie d to an
induct or , then the flux will increas e co n ti nu a lly and the in ducto r curre nt w i ll increase w itho ut bound.
Equa ti on (2.27) , ca lled th e pr inc ip le of capacitor amp-second balance or capaci tor charge balance, can
be used to fin d the stea dy-state curre nts in a swi tc h ing co nverte r.
ww
2.3 BOOST CONVERTER EXAMPLE
w.E
The boos t co nverter, Fig. 2 .13(a), is ano ther we ll - kn ow n switched - mode conve rt er that is ca pa ble of pro-
d uc ing a de o ut put vo lta ge greater in magn itud e than the de inp ut vo ltage. A pract ical rea liza ti on of the
switc h , using a MO SFET and diode, is show n in Fig. 2. 13(b). Let us apply th e small -r ippl e approx ima -
asy
tio n an d the princip les of indu ctor volt -secon d balance and capac itor charge bala nce to fi n d th e steady -
sta te outpu t vol ta ge an d inductor c urr e nt for th is co nverter.
W ith the switc h in posi tion 1, the rig ht -ha nd side of the indu c to r is co nn ecte d to gro und , res u lt-
En
ing in the netwo rk of Fig. 2.1 4(a). Th e ind uct or voltage a nd ca pac itor c u rre nt for th is sub inte r val are
give n by
gin (2.28 )
Use of the li nea r ripp le appro ximation , v ~ V, leads to

eer
ing
.ne
(a) L 2
v, R V
t
(b)
R V
Fii;, 2. 13 Bou~! co nvcrta : {a) with idea l sw ild1, (b ) pradil:a l rea lizat ion using MOS FET and diod e.

2.3 Boost Converter Examp le 23
(a) L
+
ic!,.t)
C R V
(b) L
ww v,
+ v/t)-
id,.t)
C R
+
w.E
V
asy
Jiig, 2.14 Boos! conv e rt.::r circ uit, (a ) whil e the sw itch is in position I, (b) wl1ile th e swi tc h is in pnsit io11l.
En (2.29)
With the sw itch in po s1t10n 2, the in duc to r is co nnecte d to the output,

2.14( b). The in d ucto r vo ltage and ca pac itor current are then
gin leadin g to th e circuit of Fig.
vl=
•
ic= il
V,-v
•
- RV eer (2.30)
Use of the s ma ll-ripp le approxima tio n , v "' V and i1,"' 1, lead s to

ing
Ve.=Vg- V
.ne
(2.31)
ice; t-¾
Equ atio ns (2.29) an d (2.3 1) are used to ske tch the indu cto r voltage and capaci tor curr e nt waveforms of
Fig . 2.15.
(a) v1,(t)
vg
t
- -
F iK, 2.15° Boost converter vo ltage DT-.f D 'T,-

and current waveforms .
I
(b)
ic!,.t) l
:- DT - 1-D
'T
,~L 1- VIR
- V/R

24 Principles of Steady -State Converter Analysis
Fi~. 2.16 De co,wersion ratio M((J) of 4

M(D)= h•= 12v
rile boost convel'ler.
3
0
0 0.2 0.4 0.6 0.8
ww D
It can be inferred from the inductor voltage waveform of Fig. 2. 15(a) that the de output voltage
w.E
Vis greater than the inp ut voltage V8 . During the first subinter val, v1.(1) is equal to the de input voltage V, ,
and positive volt-seconds are applied to the inductor. Since, in steady-state, the total volt-seconds applied
over one switc hing period must be zero, negative volt-seconds must be appl ied during the second sub-
interval. Therefore, the induc tor voltage du ri ng the second subi nterv al, ( Vg _ V ), must be negati ve.
Hence, Vis greater than v,.
asy
The total volt-seconds applied to the inducto r over one switc hing period are:
En (2.32)
gin
By equatin g this expression to zero and collect ing terms, one obtai ns
(2 .33)
eer
Vg(D+ D')- VD'=O
Solut ion for V, and by noting that (D + D') = 1, yields the expression for the output voltage,
V
v.,-!
D' ing {2.34)
.ne
The voltage convers ion ratio M (D) is the ratio of the output to the input voltage of a de-de converter.
Equation (2.34) predicts that the voltage convers ion ratio is given by
M (D)"' j,'_=_l_ =- 1-
Vg I.Y I -D
(2.35)
t
This equation is plotted in Fig. 2.16. At D = 0, V = Va. The output voltage increases as D increases, and in
the ideal case tends to infinity as D tends to l. So the ideal boost converter is capable of producing any
output voltage greater than the input voltage. There are, of course, lim its to the output voltage that can be
produced by a pract ical boost converter. In the next chapter, componen t nonidealit ies are modeled , and it
is found that the max imum outp ut voltage of a pract ical boost converter is indeed limited . Nonetheless ,
very large output voltages can be produced if the nonidealities are suffi cient ly smal l.
The de component of the inductor curre nt is derived by use of the princi ple of capacitor charge
balance. During the firs t subinterva l, the capacitor supplies the load current, and the capacitor is partially
discharged. Duri ng the second sub interva l, the inducto r curre nt supplies the load and, add itionally,
recharges the capacitor. The net change in capacitor charge over one switc hi ng period is found by inte-
grating the ic(I) waveform of Fig. 2.IS( b),

2.3 BoostCo11ve11
er Example 25
l
V/ R
8
Fig, 2.17 Variatio11or inductor current de
component / with duty cycle, boost converter. 6
4
0 0.2 0.4 0.6 0.8
ww r· -i )o'T
D
w.E
(2.36)
id,t)di =( -ii)DT, + (I ,
Co lle ct in g terms , and equat in g the result to zero, lea ds the steady -sta te resu lt
asy --¾-
(D+D')+ID' =0 (2.37)
En
By noting that (D + D' ) = I, and by so lvin g for the indu c to r c urre nt de co mpon e nt/, one obta ins
gin
(2.38)
So the indu ctor curre nt de compo nent/ is equal to the load curr e nt, VIR, divided by D'. Subst itution of
Eq. (2.34) to el iminate \/yie ld s
eer (2.39)
Thi s eq uation is plotted in Fig. 2.17. It ca n be seen that th e inducto r curren t becomes large as Ding
appro aches I.
.ne
Thi s inductor current, wh ich coincides with the de inpu t curren t in the boos t co nverter, is greater
th an th e load current. Ph ysic ally , this mu st be the case : to the extent th at th e con verter eleme nts are ideal ,
the co nvert er inpu t and out put powe rs are e qu a l. Since the conver ter output vo ltage is greater tha n th e
in pu t vo ltage , the input cur rent must likewise be grea ter than the out put curre nt. In prac tice, the indu ctor
current flows th rough the sem ico nductor forwar d volta ge dro ps, the ind uctor win d in g res istance, an d
other sources of pow er loss . As the duty cycle approaches one, the in duc tor current become s ve ry large
t
and these componen t non idea litie s lead to large power losses . In conseque nce, the effic iency of the boost
co nve1ter decreases rap id ly at hig h d uty cycle.
Nex t, let us sketch the ind uc tor c urre nt i1_,(t) waveform and derive an ex press io n for the inductor
c urr ent ripp le Ai,,. The inductor voltage wavefo rm vL(t) ha s been a lready fo und (Fig . 2.15), '° we ca n
ske tch the inductor curren t wavefo rm di rectly . Dur ing th e first su bin te r val, wit h the swi tch in posit ion I,
the slope of th e induc to r c urr ent is given by
(2.40)
Likew ise, when the sw it ch is in pos itio n 2, the slope of the indu ct or c urre nt waveform is

26 Pri11cipl
es of Steady-StareConve11erA11al
ysis
Fig. 2.18 800s 1 convener indt1ctor cur rrn l

waveform i1_(1).
0 DT, T,
(2.41 )
ww
The inductor current waveform is sketched in Fig. 2.18. Durin g the first subinterva l, the change in induc-
tor current, 2l:,ii, is equal to the slope mul tip lied by the length of the subi nterva l, or
w.E (2.42)
Solution for t:,.jl
asy
leads to
. _= v., '. (2 .43)
En
.11 1 L DI ,
2
This expression can be used to select the inductor value L such that a give n value of l:i.i1_ is obtained.
gin
Likew ise, the capacitor voltage v(r) waveform can be sketc hed, and an expressio n der ived for
the output voltage ripple peak magnitud e l\.v. The capacitor current waveform iJ.t) is given in Fig. 2.15.
During the first subinterval, the slope of the capacitor voltage waveform v(t) is
eer (2.44)
During the second subinterv al, the slope is

ing
.ne
(2.45)
The capacitor voltage waveform is sketched in Fig. 2.19. During the first subinterval, the change in
capacitor voltage, - 2t,,.v,is equal to the slope mult iplied by the length of the subinte rval :
- 2t\v = R~DT,. (2.46)

t
Solution for J',,.

v yields
Fig. 2.19 Boost conveiter Oll!pul vollage

wavefonn v(r).
0 DT, T,

2.4 O,k Converter fa ample 27
.6v -- 2RC
V OT, (2.47 )
Th is express ion can be used to selec t the capaci tor va lue C to obt ain a give n ou tpu t vo ltage rip p le pea k
magnit ude A v.
2.4 CUK CONVERTE R EXAMPLE
As a seco nd exam p le , cons ider the Cuk co nverter of Fig. 2.20(a). T h is co nverter performs a de conver -
ww
sio n fun ct io n similar to the buck-boost co nverter : it can ei ther increase or decrease the magnitude of the
de vo ltage, and it inver ts the pola rity. A prac tica l re aliza ti on usi ng a trans istor and diode is illustra ted in
Fig. 2.20(b) .
w.E
Thi s co nverter operates vi a cap acitive energy transfer. As ill ustra ted in Fig. 2.2 1, capac itor C 1 is
con nected throu gh L1 to the inp u t so urce wh ile the sw itch is in pos it ion 2, and source energy is stored in
C1• W hen the sw itch is in pos ition l , this e nergy is release d throug h Li_to the load .
asy
The indu cto r curr ent s and ca pacitor voltages are de fin ed, with polariti es ass igne d somewhat
arbit rari ly, in Fig . 2.20 (a). In this sec tion , the princ iples of ind uctor volt-second ba lance an d capaci tor
charge bala nce are app lied to find the de co mponents of the ind uctor curre nt s and ca pac itor vo ltages. The
En
vo ltage and c urr ent ripp le mag nitudes are also fo un d.
Dur ing the first subi nterval , whi le the switch is in posit ion I , the conve rter c ircu it redu ces to
Fig. 2 .2 1 (a). The indu ctor voltages and ca pac ito r cur re nt s are:
Vi1 "'V,
gin
eer
Vi 2 aa - V1 - Vi
(2.4 8)
ic , =i2
. . V2
' " "' 12-7[
{a) ing
.ne
R
t
(b)
Fig. 2.20 Cuk co nvene:r : (a) with ideal switch, (b) prnclkal realization u~ing MOS PET un<ldiotle.

28 Pri11
ciples of Steady-State Co11verter A11
alysis
(a) L, Li i2
i, + vi , +
ia
v, v, c, C2 V2 R
ww
(b) L, Li
i, i2
ic,
+ vl2 - +
+ ia
w.E v, c, v, C2 V2 R
Fig. 2.21
asy
Cuk converter circu it: (:i) while switch is in pos ition I. (b) while switd1 is in po., itio n 2.
En
We next assume that the swit ching ripple magnit udes in i 1(1), i2 (r), v 1(1), and vit) are small compared to
their respective de components 11, 12, V1, and V2. We can therefore make the small -ripple approximat ion,
an d Eq. (2.48) bec omes
Vu = Vg
gin
eer
vu = -Vi -Vz
(2.49)
' c1= l z
. I
·V2
ir
ing
l e, = 2-
During the second subinterval, with the switch in positio n 2, the converter circu it elem ents are connected
.ne
as in Fig. 2.2l( b). The inductor voltages and capacitor currents are:
vL, = V~- \),

VL2.= - V2
in=i
. 12 -
'c,= '
1
",
7[
(2.50 )
t
We again make the small-rippl e approxi matio n, and hence Eq. (2.50) becomes
vu = \lM- Vl
Vu = - \1•
(2.51)
ic1 =f1
, I Vz
t o = , -1[
Equations (2.49) and (2.51) are used to sketch the inductor voltage and capacitor curren t waveforms m
Fig. 2.22.
The next step is to equate the de components, or average values, of the wavefo rms of Fig. 2.22

2.4 Cuk Converter Example 29
(a)
,"(
,)I- ~1- vr
(b)
D T, D'T,
Vg - VI
F
vu(t) - V2
ww
Fig. 2.22 Cuk convener waveforms:
(a) inductor voltage v,.1(1), (b) iriductor
-DT
- Vi - V2
,-
- D'Ts
w.E
voltage v1.2{t),(c) cupm.:itnrcurrent i,jt),
(d) capacit or current in(I) .
(c) ic 1(t)
1.
asy - -- DT, D'T, -

12
-
En
(d)
ia(t)
g-in 12 - V2 /R (= 0)
D T,
eer 1--- D'T, --+ I
ing
to ze ro , to find the steady -sta te co nditi o ns in th e converter. Th e re sults are:
(vi1) =D V8 + D' (Vg- vi)=0

(v,J= D( - V1 - V2) + D'(- V2 ) =0
.ne
(2.52)
( icr) = Dl 2+ D'l1=0
(ici)=i2- ~=0
Solution of this sys tem of eq uation s fo r the de components of the capac itor voltages and inductor cur -
rents leads to
t
(2.53)
The de pe ndence of th e de out put vo ltage V2 on the dut y cyc le D is ske tche d in Fig . 2.23 .
The in ducto r c urr ent wavefo rm s are ske tched in Fig. 2 .24(a) and 2.24 (b) , and th e capaci tor C 1

30 Principles of Steady-State Converter Analysis
D
0 0.2 0.4 0.6 0.8
0
-1
Fig. 2.23 De conversion ratio
M(D) = - V/Vg of the Cuk converter. Q -2
~ -3 M (D) = Vz =-_IL_
Vg 1- D
-4
ww
-5
vo ltage waveform v 1(r) is sketched in Fig. 2.24(c) . Du ri ng the firs t subinte r val , the slopes of the wave -
w.E
forms are g iven by
asy (2.54)
En
Equa tion (2.49) has been used here to substitute for the va lues of v,.1, v,.2, and ic1dur ing the first sub inter -
gin
val. During the second interval , the slope s of the waveforms are given by
eer
ing V~- V,
.ne
-L-,-
Fig. 2.24 Cuk convener waveforms:

(a) inductor current 11(1). (b) intlU<;tor
current ii( t) , (c) capacitor voltage v1(1) .
(b)
DT,
DT_<
i - Vz
T,
T., t
i L2---~
.~...~
·~-;;;;.;.;;~:,;;.; ..........................i!,.
iz
...................................*.~ ~.I....
v1
DT, r:.

2.5 Estimating the 0 11

tf)11
I Voltage Ripple in ConvertersConlai11i11g
Two-Pole low- Pass Filters 31
(2.55)
Equ ation (2.5 1) wa s used to sub st itu te for the val ues of v111 v12, and ict d u ring the seco nd sub inte rval.
Durin g the first subinterv al, the qu ant ities i 1(t), ii t), and v1(1) ch ange by 26.i 1, - 2~i 2, and
- 2flv 1, re spec tive ly. TI1ese chan ges are equ al to th e slopes g ive n in Eq . (2.5 4), m u lti pli ed by the s ub -
ww
int erval length DT_,,y ie ldi n g
w.E (2.56)
asy
The de relat ionships, Eq. (2.53), c an now be used to s imp li fy these express ions and e lim ina te V1, V2, and
! 1, le adin g to
En
gin (2.57)
eer
The se ex press io ns ca n be used to select va lues of L 1,
ripp le ma gnitu des are obtai ned .
Lz,
ing
and Ci, such th at desi red va lues of sw itc h ing
.ne
Simil ar argum en ts can not be used to est ima te the sw it c h ing ripple m ag n it ude in the outpu t
ca pac itor voltage v2(t) . Accor ding to Fig. 2.22(d), the c urr e nt iL,(t) is co ntinu ous: un li ke " 1,1, VLz• and ic t·
th e capac itor curre nt ic2(t) is nonp ulsat in g. lf the sw itc hin g ripp le of ii(t) is neglecte d , then the capaci tor
c urrent ic 2(1) does not co nt ain an ac co mpo nent . Th e sm all-ri pp le approxima tion th e n leads to the co nclu-
sion tha t the o ut p ut swit chin g rip ple d v2 is zero.
Of course, the outpu t vo lta ge swi tc hin g ripple is not zero . To est imate the ma g n itude of the out -
put voltage ri pp le in thi s co nverter, we mu st not neglect th e sw itc hi ng rip p le prese nt in the inductor cur-
t
ren t i/t) , since th is c urre nt ripple is the o nly source of ac curr en t driv ing the output capaci tor C 2 • A
simple way of doing thi s in the Cuk co nverter and in ot her simi lar converters is discussed in the next sec-
tion.
2.5 ESTIMATING THEO TPUT VOLTAGE RIPPLE IN CONVERTERS CONTAINING

TWO-POLE LOW-PASS FILTERS
A case where the s m all rippl e approxi m atio n is not use ful is in conve rters co n ta inin g two-po le low -pass
filt e rs, such as in the o ut put of the Cuk co nverter (Fig . 2.20) o r the buck co nverter (Fig. 2.25). For these

32 Principles of Stead y -State Co11ve11er Anal ysis
L
+
i<f_t)
2
C
Fig. 2.25 The buck wnverter conw.in~a two-pole output filler.
ww
converte rs, the small -ripple approximat io n pred icts zero o utput voltage ripp le, regar dless of the va lue of
the out put filter capac itance. Th e prob le m is that the only compo nent of ou tpu t capac itor current in these
cases is th at arising from the inductor current ripple. Hence, inductor current ripp le cannot be neg lected
w.E
when ca lcu lat in g th e output capac itor voltage ripp le, a nd a more accurate appro xim ation is needed .
An improve d approach that is usefu l for thi s case is to estimate the capacitor curre nt waveform
i,Jt) more accurate ly , accounting for the inductor curr ent ripp le . The capaci tor voltage ripple can then be
related to the total charge con tained in the positive portion of the ic(I) waveform .
asy
Cons ider the buc k conve rter o f Fig . 2.25. The induc tor current waveform iJI) contains a de
compo nen t / an d linear ripp le of peak magn itude D.i0 as show n in Fig. 2.10. The de component I must
flow ent irely throu gh the load res ista nce R (why?) , wh ile the ac sw itch in g ripp le di vides between th e
En
load resistance R an d the filter capacitor C. In a we ll-designed co nverter , in wh ich the cap ac itor provides
significant filter in g of the switch in g ripp le , the capacitance C is chosen large eno ugh that its impe dance
gin
at the swi tching frequency is much sma ller than the load impedance R. Hence nearly all of the inductor
current ripp le flows thro ugh the capacitor , and very litt le flows through the load . As shown in Fig. 2 .26 ,
the capacitor curre nt waveform ic(t) is then equa l to the indu ctor cu rr en t wavefo rm with the de co mpo-
nent removed. The c urren t ripp le is lin ea r, w ith pea k value /J.il'
eer
Wh en the capac itor c urr en t ic;(t) is pos itive, charge is deposited on the capac itor plates an d the
capacitor voltage v(lt) increases. Therefore , be tween the two zero -cross ings of th e capac itor current
ing
waveform , th e ca pa citor voltage chan ges between its minimum and maximum ex trema . The wavefo rm is
symmetr ica l, an d the tota l chan ge in Ve is the peak -to-peak ou tp ut voltage rippl e, or 21'!.
v.
This change in capaci tor volta ge can be related to the total charge q con tained in the pos itive
.ne
id,.t)
Fig, 2.26 Output capucitnr voltage

and current wnvefonns , for the buck
converter in Fig. 2.25.
Total charge
q
t
--+i •----- D'Ts---- -

1 !
l
I
I
i
V It) ,i.
C' i,
;

2.5 Estimaringrhe 011rpur Voltage Ripple in Conveners Conrai11i11gTwo-Pole Low-Pass Filrers 33
Total
flux linkage
A
l<'ig. 2,27 Es1i1nating indu (;tOr current
ripp le when the inducmr voltage wave- 1-rn-1
: J ?
fo1m is continuous.
1----- D'T1 ---- -i
i
'
~j
ww l1
;
w.E I
asy
portion of the capacitor current waveform. By the capacito r re lation Q = CV,
En (2.58)
gin
As illustrated in Fig . 2.26, the charge q is the integra l of the curren t waveform between its zero crossi ngs.
For thi s example, the integra l can be expressed as the area of the shaded triangle, ha vi ng a heig ht 6.i,,.
Owin g to the symmet ry of the curren t waveform, the zero cros sings occur at the ce nterpoints of the DT,
eer
and D'T, subintervals. Hence, the base dimens ion of the triang le is T,f2. So the total charge q is gi ven by
(2.59)
Substitution ing
of Eq. (2.58) into Eq. (2.59), and so lution for the voltage ripple peak magn itude 6.v yields
.ne
fl.i1_T,. (2.60)
6.v= gc
Th is ex pression can be used to select a value for the capacitance C such that a given voltage ripple 6.v is
obtained. In prac tice, the additiona l voltage ripp le caused by the capac itor equ ivale nt serie s resistance
(esr) must also be inclu ded .
t
Sim ilar argumen ts can be app lied to inductors. An example is considered in Problem 2.9, in
wh ich a two-pole inpu t filter is added to a buck converte r as in Fig. 2.32. The capac itor voltage ripple
cannot be neglected; doin g so wou ld lead to the conclus ion that no ac voltage is applied across the inp ut
filter inductor, re sulti ng in zero input current ripple . The actual indu ctor voltage waveform is iden tical to
the ac portion of the inpu t filter capacitor voltage, with linear rip ple and w ith peak va lue, fl.v as illustrated
in Fig. 2.27. By use of the inductor rela tion A= Li, a resu lt similar to Eq. (2.60) can be derived. The der-
ivation is left as a problem for the student.

34 Prin cipl es of Steady -Srate Converter A nalysis
2.6 SUMMARYOF KEY POINTS
I. Th e de co mp onent of a converte r wavefo rm is g ive n by its average value, o r the int egral over one sw itch -
ing pe rio d , di vi ded by t he switc h ing per iod . Solu t io n of a de -de conve rter to find its de, or s tea dy -state ,
voltages and curr e nts t herefore involves averagi ng the wavefor ms.
2. The lin ear- (or small- ) ripple approximatio n g rea tl y s im plifi es the analys is. In a well -designed co nverter,
the sw it c hin g ripples in the indu ctor cu rr e nt s and capac ito r voltages are small com pared to the respec ti ve
de co mpo nents, and ca n be neg lec ted .
3. T he pri nc iple of indu c to r vo lt-seco nd bala nce al lows determ inatio n of the de vo lt age com pone nt s in any
ww
sw it c hi ng con verter. In steady state, the average voltage a pp lied to an in duc tor must be zero.
4. The pr incip le of capac ito r charge balance allows de te rm ina t ion of the de componen ts of the in d ucto r cur -
re nts in a swi tc h ing co nve 1te r. In steady state , the average c u rrent a ppl ied to a capac ito r m ust be zero.
5.
w.E
By kn owle d ge of the slopes of the ind ucto r cu rr e nt and capac itor vo ltage wavefor ms, the ac swi tc hin g rip -
ple magn itudes may be compu ted. Induc ta nce and capac itance va lues can then be chosen to obt a in de sired
ripp le m ag nitu des.
6.
asy
In conve rters co nt aini ng multipl e -po le fi lt er s, co nt inu o us ( non p u l sat i ng) vo ltages and cu rren ts are applied
to one or mor e of the inductors or capac itors . Comp ut atio n of t he ac sw it chi ng r ipp le in these e le ments ca n
be done us ing capac itor c harge and/or ind uctor fl ux - l inkage arg um e nts , w ith o u t use of the sma ll- ripp le
En
approx im at ion.
7. Co nvert er s capab le of increas ing (boost) , dec reas ing (b uck} , and i 1wert in g the vo lta ge po lari t y (bu ck- boost
gin
a nd Cuk ) ha ve been described. Conve rt er circ u its are explore d more ful l y in t he problems and in a later
chap ter.
REFERENCES
eer
ing
[I J S. Ct:K, " Basics of Sw itc hed-M ode Power Convers ion: Topolo gies, Mag ne tic s, a nd Contro l," in Ad vances
i11Swirched-Mode Power Co11version , Vol. 2, pp. 279-310, Irvine , CA: Teslaco , 1981.
. Mo l-lAN, T. UNDELAND, a nd \ V . R OBBINS, Power El ectronics: Con verters , Appli carion s, and Design ,
.ne
[2]
2 nd edit., New York: John Wiley & Sons, 1995

.
t
[3] T, and G. YERGESE, Principles of Power E lec tron ics , Reading , MA: Ad d iso n-
J_ KASSAKIAN, M. SCHLECII
Wesley, 1991.
[4] R. SEVERNS and G. E. BLOOM, Modem De-to-de Swit ch Mod e Power Converter Cir cuits , New York : Va n
Nostran d Rei nh ol d, 1985.
[SJ D. HART, lmrod uction ro Power Electronics. ew York: Prentice Ha ll , 1997.
[6] M . RASHID, Power E/ectro11ics: Circuits, Devices, and App/icarion.<, 2 11J ed it. , ew York : Prentice Ha ll ,
1993.
[7] P. KREIN, Eleme nt.r of Power El ectro11ics, New York: Oxford Universi ty Press , 1998.
[8] K. KIT S UM, Switch Mode Power Co11versio11-Basic Theory and Desig11. ew York : Marcel Dekker ,
1984.

Problems 35
PROBLEMS
2.1 Analysis and design of a buck-boost converter: A buck-boost converter is illust rated in Fig. 2.28(a), and
a practical implementation using a transistor and diode is shown in Fig. 2.28(b).
(a)
2 +
Flg. 2.2!1 Uuck-boosl conve11er v, C R V

of Problem 2. 1: (a} ideal converter L
circuit. (b) implementation using
ww MOSJ-'ET.ind diode.
(b)
w.E T L
i(t )
R
+
asy
(a)
En
Find the dependenceof the equi librium output voltage Vand inductor current / on the duty ratio
n, input voltage VR. and load resistance R. You may assume that the inductor current ripple and
capacitor voltage ripple are small.
(b)
(c) DC design: for the specifications
gin
Plot your results of part (a) over the range O5 {) 5 I.
eer
V, = 30 V V = - 20V
R=4.U ( = 40 kH7.
(0 Find D and /
(ii )
/iiij
cent of the average inductor current /.
Choose C such that the peak output voltage ripple l'w is 0.1 V. ing
Calculate the value ofL that will make the peak indL1ctorc urrent ripple il,.iequal to ten per-
.ne
(d) Sketch the transistor drain current wa\•eform 1)1) for your design of part (c). Include the effects
of inductor current ripple. Whal is the peak value of ir? Also sketch i/1) for the case when Li s
decreased such that ii,.;is 50% of/. Whal happens to the peak va1L1e of ir in this case?
2.2
(e) Sketch the diode current waveform iD(t) for the two cases of part (d).
In a certain application, an unregulated de input voltage can vary between 18 and 36 V. It is desired to
produce a regulated Olltput of 28 V to supply a 2 A load. Hence, a converter is needed that is capable of
t
both increasing and decreasing the voltage. Since the input and output voltages are both positive, con-
verters that invert the voltage polarity (such as the basic buck-boost converter) are not suited for this
application.
One converter that is capable of performing the required function is the nonisolated SEPIC (sin-
gle-ended primary inductance converter) shown in Fig. 2.29. This converter has a conversion ratio M(Dl
that can both buck and boost the voltage, bur the voltage polarity is not inverted. In the normal converter
operating mode, the transistor conducts during the first subinterval (0 < t < DT). and the diode conducts
dllring the secondsubinterval (DT, < t < T). You may assume that all elements are ideal.
(a) Derive expressions for the de components of each capacitor voltage and inductor current, as
funct ions of the duty cycle D, the input voltage V¥, and the load resistance R .

36 Pri11c iples of Steady-State Converter Ana lys is
V
Load
R
Fig. 2.29 SEPICof Problems 2.2 a11d2.3.
ww (b) A control circui t automatically adjusts the conve11er du ty cycle D, to ma intain a constant output
vo ltage of V = 28 V. The in pu t vo ltage slow ly varies over the range 18 Y =:;V, =:;36 V, The load
curr ent is co nstant and equ al to 2 A. Over what range w ill the du ty cycle D vary'/ Over what
2.3
w.E range will the inp ut ind uctor curr ent de co mponent 11 vary'/
For the SEP IC of Problem 2.2,

(a) Der ive expressions for each ind uctor curr ent ripple and capacitor voltage ripple. Express these
(b) asy
qu ant ities as fu ncti o ns of th e sw itc hi ng period T,.: the co mponent val ues L1, L 1. C 1• C 2 ; the duty
cycle D; Lhe in p ut voltage V,; and Lhe load res istance R.
Sketch the waveform s of the transis tor voltage \'"/1) and tra nsisto r current i 1i(r), and g ive
2.4
En
ex press ions for their peak va lues .
The sw itches in the conve rter of Fig. 2.30 opera te sync hron ous ly: eac h is in position I for O <I< DT,.
1>
gin
and in position 2 for DT , <I< Deri ve an expression for the voltage co nversion ratio M(D) = VIV~,
Sketc h M(D) vs. D.
eer
ing
Fig. 2.30 H -hridg e converter o f Problems 2.4 and 2.6 .
.ne
2.5 The swi tches in the co nve 1ter of Fig. 2.31 operate sy nchro nously: each is in position I fo r O < I< DT,.
and in posit ion 2 for DT,.<I< T, . De1ive an expression for the voltage conversio n ratio M(I)) = VIV, .
Sketch M(D ) vs. D.
L
t
C
2
Fig. 2.31 Current-fed briclgc co11verler of Problems 2.5, 2.7, and 2.R.
2.6 For the conver ter of Fig. 2.30, deri ve express ions for the ind uctor curre nt ri pple tli 1_and the capac itor
voltage ripple Dil'(_,
2. 7 For the conve1te r of Fig. 2.3 1, derive an analy tica l expression for the de com pon ent of the indu ctor cur -

Problems 37
rent, / , as a func t ion of D, Vx, and R. Ske tch yo ur resul t vs. D.
2.8 For the conve rter of Fig. 2.3 I, derive expressions for the ind uctor current ripp le ili l and the capacito r
voltage ripp le nvc.
2.9 To reduce the switch ing harmonics prese nt in the in p ut curr ent of a certain buck convener, an inp ut filter
co nsis ting of ind uctor L 1 and capac itor C 1 is added as shown in Fig. 2.32. Such filters are comm on ly
used to meet regula tions lim itin g co ndu cted elec tromagne tic interference (EM!). For this problem, yo u
may assu me that all ind uctance and capacitance va lues are su fficient ly large , such tha t all ripple magni-
tudes are small.
L1 ir QI ~
ww vs
it
c.
+
v,. T R
+
w.E
D1 C2 V
asy
Fig_ 2.32 Addit ion of l.r-C input filter to buck converter, Prob lem 2 .9 .
(a) Sketc h the transisto r c urrent waveform i 1 (t )

(b)
En
Derive analy tical express ions for the de co mpone nts of the capaci tor voltages and induc tor cur-
rents.
gin
(c) Der ive analy tica l expressions for the peak ripp le mag nit udes of the inpu t filter inductor cu rrent
and capacitor volta ge.
(d) Given the foll owing val ues:
Inp ut voltage
O utp ut voltage
eer
/, = l0OkH z
ing
Swi tc hin g frequency
Load resis tance R=6 Q
Select values for L 1 and C 1 s uch tha t (i) the peak vol tage ripp le on C 1, 6.vcl' is two perce nt of the de
.ne
compon ent Vet • and (ii) the inp ut peak cu rrent rippl e 6.i 1 is 20mA.
Extra cre dit prob lem: Derive exac t an alyt ical express ions for (i) the de compone nt of the out pu t vol t-
t
age, and (ii) the peak- to-peak inductor curren t ripp le , of the ideal buck -boos t conver ter operating in
steady state. Do not make the smal l-rippl e approxi mation.

ww
w.E
asy
En
gin
This page intentionally left blank
eer
ing
.ne
t

3
Steady-State Equivalent Circuit Modeling,
Losses, and Efficiency
ww
w.E
asy
En
gin
Let us now cons ider the basic functions performed by a switc hin g converter, and attemp t to represe nt
these functions by a simp le equ ivalen t circu it. The des igner of a converter power stage must calculate the
network voltages and currents , and spec ify the power components accordi ngly. Losses and effic iency are
eer
of prime importance . The use of equ ivalent circuits is a physical and intuitive approac h which allows the
we ll-known techni qu es of circuit analys is to be employe d. As noted in the prev ious chapter, it is desir-
able to ignore the small bu t co mplicated switc h in g ripp le, and model only the imp orta nt de compo nents
of the wavefonn s,
ing
The de tran sfo rmer is used to model the ideal functions performed by a de-de converter [1-4] .
This simple model correc tly represents the relationshi ps between the de voltages and curren ts of the con-
.ne
verter. l11e model can be refined by includin g losses, such as sem iconduc tor forward voltage drops and
on-resis tances, inductor core and copper losses, etc. The resu lt ing model can be direct ly solved, to find
t
the voltages, current s, losses, and efficie ncy in the actua l nonidea l converter.
3.1 THE DC TRANSFORMER MODEL

As illu strated in Fig. 3.1, any switc hing conve rter contains three ports: a power input, a power outpu t,
and a control input. The input power is processed as spec ified by the control input, and then is output to
the load. Ideally, these functions are perfom1ed with 100% effic iency, and hence
(3. l)
or,
V/ H= \II (3.2 )

40 Steady-State Eq11i1
,alem Circ11il Modeli11
g, Losses, a11dEfficie11cy
I g I
- . Switching
Power + + Pow er
input vs de-de V
output
- converter -
-
D
ww
Fig. 3.1 Switching convener terminal quantitic~.
l
Control input
w.E
l
1, I
a ~ .I
Power
input
sy I M(D)I M(D)V,I { ,' ;
Power
output
} 'ig. 3.2
En
A swi1chi1ig co11verrer equivale,Jtcircuit using dependem soul'Ces,correspnnding 10 Eqs. (3.3) and (3.4 }.
gin
These re lationships are valid on ly under equi lib rium (de) condi tio ns : dur ing transie nts , th e net stored
ene rgy in the converter inductors and capacito rs may cha nge, causi ng Eqs. (3 . 1) a nd (3.2) to be violate d .
eer
ln the previous chapter, we fo un d that we co uld exp ress the converter o utput voltage in an eq ua-
tio n of the form
V "" M (D)V~
ing
whe re M(D) is the eq ui libri um conversion rat io of the conve rter. For ex amp le, M(D) = D for the buck
(3 .3)
.ne
converte r, and M(D) = 1/(1 - D) for the boost co nverter. In genera l, fo r idea l PWM converters operat ing
in the continuous conduct ion mode and con tain in g an equal num ber of ind epe nden t induc tors and capac -
t
itors, it ca n be shown tha t the equili brium conversi on rat io M is a func tion of th e duty cycle D and is
independen t of load.
Sub stitu tion of Eq. (3.3) into Eq. (3.2) yie lds
(3.4)
l . =M(D )f
Hence, the conver ter terminal cu rrent s are related by the same co nversion rat io.
Equations (3.3) and (3.4) sugges t that the converte r could be model ed u sin g dependent source,,,
as in Fig. 3.2. An equivalent bu t more phys icall y mea n ingful mode l (Fig . 3.3) can be obtai ned throu gh
the realizat ion that Eqs. (3.1) to (3.4) coi nc ide wi th the equ ati ons of an idea l transformer. In an ideal
transformer, the inp ut and output powe rs are equal, as sta ted in Eqs. (3.1) an d (3.2). Also, the output volt -
age is equa l to the turns ratio times the in put voltage. Th is is consiste nt with Eq. (3.3), wit h the turn s ratio
take n to be the equ ili b rium co nversion rat io M(D). Fi na ll y, the in p ut and out put cu rre nts sho uld be
re lated by the same tu rn s ratio, as in Eq. (3.4).
Thus, we can model the ideal de-de converte r usin g the ideal de tra nsforme r mode l of Fig. 3.3.

3./ The DC Tra11sfor111

er Model 41
1 : M(D) I
+ +
Fig. 3.3 ]deal de transformer
model of a de-de convert er
Power Power
operating in co11tinuous con- input V outp ut
duction mode. corresponding
to Eqs. (3 . 1) to (3.4 ).
ww Control input
w.E
Thi s sy mb ol represe nts the fi rst-or de r de pro pe rt ies of any s witc h ing de-de co nverte r : tr ansforma tion of
de vol tage and c urr ent leve ls, ide al ly w ith 100% eff icie ncy, co nt ro llable by the d uty cy cl e D. The solid
hor izo nta l line ind ica tes that the e lem ent is idea l an d capa ble of passi ng de volta ges and curre nt s. It
asy
shoul d be note d that, a lth oug h stand ard ma gnetic-co re tran sfo rm ers c ann ot tran sform de signa ls (t hey
sa turate whe n a de vo ltage is app lie d), we are no net heless free to de fin e the idea lized model o f Fig. 3.3
fo r th e purp ose of modeli ng de-de co nverte rs. Ind eed, th e abse nce of a phys ic al de tra nsfor me r is one of
En
the reas on s for buil d in g a de-de s wit c h ing converte r. So the propert ies of th e de-de co nverter of Fig. 3. 1
ca n be mo deled us in g the equi valent c ircu it of F ig . 3.3. A n ad va nt age of this eq ui vale nt cir cuit is th at, fo r
the im po rt ant de co mp one nts o f th e wavefo rm s are mode led .

gin
co nstant dut y cyc le, it is tim e inv ari an t: there is no sw itc h ing or switch in g rippl e to dea l with , and on ly
TI1e rul es for manipul ati ng and si m pl ifyi ng c ircu it s conta in ing tr an sfor mers apply eq ually we ll
eer
to ci rc uit s co ntai n ing de-de co nvert ers . For e xample, co nside r the netwo rk of Fig. 3.4(a ), in w h ic h a
res istive load is co nnec ted to the co nve rter o utput , and the power so urce is modele d by a T heve ni n-e qui v-
ale nt vol tage so urce V1 and res istance R 1• Th e co nverte r is replaced by th e de tra nsform e r model in Fig.
(a) R1
ing
3.4(b) . Th e ele ment s V1 and R 1 can now be pus hed thro ugh th e de transfor m er as in Fig. 3.4(c); th e volt -
+
.ne
Fig. 3.4 Exam ple of use of the de +

transformer model: (a) original circuit; Switching
(b) substitution of switching converter de
transformer model; (c) simplification by
referring all elements to secondary side.
de-de
converter
V R
t
(b)
1 : M (D)
.-----''\Ar----+---. .---+---
+ + +
V R V R

42 Steady-StateEq11iva/e111
Circuit Modeling, Losses, and Efficiency
age source V1 is mul tipl ied by the co nversion rat io M(D), and the resistor R I is mul ti plied by M 2 (D). This
circu it can now be solved using the voltage divider fo rmul a to find the ou tput voltage :
('.\.5)
It sho u ld be appa rent th at the de tr ansformer/e qui vale nt circui t approach is a powerful tool for unde r-
sta nd ing networks co nt ai ni ng converte rs.
ww
3.2 INCLUSION OF INDUCTOR COPPER LOSS
The de transfo rmer model of Fig. 3.3 ca n be extended , to model other prope rties of the converte r. Non-
w.E
idea lities, suc h as sources of powe r loss, can be mode led by adding res istors as appropriate. In later chap-
ters , we will see tha t co nverter dynami cs can be mode led as well , by add ing in duc tors and capacitors to
th e equiva lent circuit.
Let us co nsider th e inductor copper loss in a boost conve rter.
L Rl
asy
Practical inducto rs exhibit power loss of two types: (I) copper loss, origi-
nati ng in the res istance of the wire, and (2) core loss, due to hysteres is and
ed dy curr e nt losses in the mag netic core . A suitab le model that desc ribes
~
Fig. 3.5 Modeling indu<.:-
En
the inductor copper loss is given in Fig. 3.5, in which a resistor RL is placed tor copper loss via s.:rie~
in series with the inductor. The actual inductor the n cons ists of an idea l rc~istor R1 .
gin
inductor, L , in series with the copper loss resistor RL.
The inducto r model of Fig. 3.5 is inserted in to the boost converter c ircui t in Fig. 3.6. The c ir cu it
can now be ana lyzed in the same ma nner as used for the ideal lossless conve rter, usi ng the pr inc ip les of
eer
inductor volt-second ba lance , capacitor char ge balance, and the sma ll -ripp le app roximation. First , we
draw the conver ter circu its during the two subinte rva ls, as in Fig. 3.7.
For O < / < DT,, the switc h is in position I and the c ircuit reduces to Fig. 3.7(a). The ind uctor
voltage vi(t), across the idea l ind uctor L , is given by
ing (3.6)
.ne
and the capac itor current ({r) is
. .I _)
In t =- y, ·(/) (3 .7)
Next, we simp l ify these equations by ass um ing tha t the swi tch ing ripp les in i(t) and v(t) are small com -
t
pared to their respecti ve de compo nents I and V. Hence , i(t) "" f and v(t) ~ V, and Eqs. (3.6) and (3.7)
2
+
C R V
1-'ig.3.6 Boost convener circuit, including imJuctur copper resislan~e Rf:

3.2 lllclusion of /11d1c1tor Copper Loss 43
(a)
+
C R V
(b)
ww C R
+
w.E
V
asy
.Fig. 3.7 Boo st con ver ter c ircuit s durin g 1he two subint ervals, incl udi ng indu<.:tor co ppe r loss res ista nce R1_:
(a) with the switch in position I, (b) with the switch in position 2.
beco me
En*
vi(t ) :: V1 - JR,
gin
(3.R)
i c(t ) ,,,_
For IJT, < t < T,,the sw itc h is in posi tio n 2 and the circ uit reduces to Fig. 3.7(b) . The induc tor cur re nt and
capacitor voltage are then given by
eer
vL(r)
.
= v. - i (t )Rr - v(l)"'
. v(t )
,JI) = ,(I) - R "' 1 - R
V
v~- IR L - V
ing (3.9)
.ne
We aga in make the small -ripple app roximation.

The prin cip le of inductor volt-second balance ca n now be invoked. Equat io ns (3.8) and (3.9) are
used to co nstru ct the inductor voltage waveform vL(I) in Fig. 3.8. The de co mp onent, or average value, of
the ind uc tor vo ltage vL(t) is
(3.10)
t
By set ting (vL ) to zero and co llect ing terms, one obta ins
CU I)
(reca ll that [) + D' ::::I). It can be seen th at the inducto r wind in g res istance R, adds an other term to the
ind uctor volt-seco nd balan ce eq uation . In the ideal boos t co nverter (RL = 0) example of Cha pter 2, we
were ab le to solve t hi s equ ation directly for the voltage co nversi on ratio VIV8 . Equ atio n (3 .11) cann ot be
imm ed iate ly solve d in th is mann e r, beca use the ind uc tor curren t / is u nkn ow n. A second eq uat ion is
needed, to elimin ate /.

44 Steady-Srare Equivalent Cirrnit Modeling, Losses, w1d Efficiency
Vg -lR 1..
Fig. 3.8 Inductor voltage anclcapacitor

current waveforms, for the nonideal boost
- DTS
- - D'Ts - t
Va - IR1..- V
converter ol"Fig. 3.6.
1-V/R
ww t
w.E
- VIR
The seco nd equa tio n is obtained using capa ci tor charge bala nce. The capacitor cu rr e nt ic(t)
asy
waveform is g ive n in Fig. 3.8. The de co mp onen t, or average va lue, of the ca paci tor current wavefo rm is
(icUl) = + 0·(1
o(--;';) -f) (3. 12)
En
By sett ing Uc } to zero a nd collect ing terms , one obt ain s
O=D 'l-*
gin (3 . 13)
eer
We now have two equati ons, Eqs . (3. 11) and (3. 13), and two u nknow ns, V and / . Elim ina ti on of/ and
solu tion for Vyields
ing (3. 14)
.ne
This is the desi red sol utio n for the co nverter outp ut vo ltage V. It is plo tted in Fig. 3.9 for severa l values of
t
RJR. It can be seen tha t Eq. (3.14) con ta in s two tem 1s. The first , 1//J', is th e ideal co nve rsio n ratio, wi th
R1 = 0. The second term, 1/(1 + H,.flJ' 2 R), descr ibes the effec t of the indu ctor w ind i ng resis tan ce. If R,, is
m~1c h less than D' 2 R, the n the seco nd term is approx im ate ly eq ual to u ni ty and the convers io n ratio is
app roxi ma tely eq ual to the ideal va lue IIV '. Howeve r, as Rl is increased in re lat ion to D' 2R, the n the sec-
ond tem1 is reduced in value, and VIV8 is reduce d as wel l.
As the d uty cyc le D approac hes one, the ind ucto r wi nd in g res ista nce RL causes a majo r q uali ta-
tive change in the VIV8 curve. Rathe r tha n approach ing in fin ity at D = 1, the curve te nds to zero . Of
co urse, it is unreasona ble to ex pect that the converte r can prod uce infi n i te vo ltage, and it shoul d be com -
fort ing to the enginee r that the pr edi c ti on of the mode l is now more re ali s ti c. W hat happe ns at D = I is
tha t the sw itch is a lways in pos itio n I. The in ducto r is neve r con necte d to the o utp ut , so no ene rgy is
transferre d to the output and the ou tp ut vol tage tend s to zero. The in du ctor current tends to a large va lue,
li mite d onl y by the indu ctor resis tan ce RL A large am ou nt of power is lost in th e induc tor w in d in g res is-
tance, eq ua l to v/! Rv w h ile no powe r is delivered to the load ; he nce, we ca n ex pect that the conve rte r
effic iency tends to zero at D = 1.
A not her imp lica tio n of Fig. 3.9 is th at the induc tor w i nd i ng resis tance RL lim its the max imu m

3.3 C011
s/ructio11of Equivalent CircuitModel 45
4.5
J.5
ww -;;,.
~
""
2.5
w.E l.5
0.5
a syE
0--------------------------- .....
ng
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
D
ine
Fig. 3 .9 O mpu l voltage vs. du ty cyd e. bot>sl conve n er wi th ind uc1or nipper loss.
volt age that the co n ve rter ca n produce . For example, with RLIR"" 0 .02, it ca n be see n that the maximum
eri
V/Vs is app roxi mat ely 3.5. If it is desired to obta in VIV~==5 , then acco rd ing to Fig. 3.9 the indu ctor w ind-
ing resis tance R, mu st be reduced to less than I % of th e load resis tance R. The only prob lem is that
ng
de creas ing the inductor winding res istance requi res bui ld in g a larger, heavier, more expensi ve ind uctor.
So it is usually imp orta nt to optimi ze the desig n, by co rrectly mod el in g the effec t s of loss elemen ts such
as Rv and choosi ng the small est inductor that w ill do the job. We now have the ana lytica l too ls needed to
.n
do th is.
3.3 CONSTRUCTION OF EQUIVALENT CIRCUIT MODEL
ext, let us refine the de trans for mer mo de l, to acco unt for conve rter losses. Thi s wi II allow us to deter-
et
min e the co nve rter vo ltages , curr ents, and efficie ncy using well -known techniques of ci rcuit analys is.
In the previous sectio n, we used the principles of indu ctor volt-second ba lance and capacitor
charge bala nce to wr it e Eqs . (3 .1 1) an d (3.13), repeated here :
1.) = 0 = vs-t RL- o·v

(11
(3.15)
(ic)= O= D'f-*
These eq ua tions state th at the de components of the induc to r voltage and ca paci tor current ,U"eequa l to
zem. Rather than algebraica lly solv ing the equat ions as in the prev ious sect ion, we can recons truct a cir-
c uit mode l based on these equat ions, w hich descr ibes the de beh av ior of the boos t co nverter w ith induc -
tor copper loss. This is do ne by co nstru cti ng a circu it whose Kirchoff loop and node eq ua tio ns are

46 Steady-State Equivalent Circuit Modeling, Losses, and Efficiency
Fig. 3.10 Circuit whose loop equation i, iclentical to

Eq. (3. l 6), obtained by equating the average inductnr vohage + (v,) -
( v1_) to zero. =0
0
D'V
ide ntica l to Eqs . (3.15).
ww
3.3.1 Inductor Voltage Equation
w.E (3.16)
asy
Th is eq uat ion was der ived by use of Kirchoff's voltage law to fin d the in d uc tor vo ltage d urin g eac h sub -
in te rval. The res ult s were ave raged and set to zero . Eq uat ion (3. 16) states tha t the sum of thr ee te rms hav -
in g the dim e nsions of voltage are equ al to ( v1_/ , or zero. He nce, Eq. (3 . 16) is of the sa me fo rm as a loop
En
equ ation; in part icula r, it describes the de com pone nts of the vo ltages aro un d a loop co nt ainin g the
indu cto r , with loop cu rr en t equal to the de ind uctor c urr en t/ .
So le t us co nstru ct a ci rc uit co nt ain ing a loop w ith curre nt / , co rrespond ing to Eq. (3. 16) . The
gin
fir st term in Eq. (3.16) is the de in put voltage V~, so we shoul d inclu de a voltage source of val ue V, as
shown in Fig. 3.10. The second ter m is a voltage drop of val ue !Ru whi ch is prop o rtional to th e curr e nt/
eer
in the loop. T his term corresponds to a res ista nce of value R 1_. The thir d te rm is a voltage D'V, depende nt
on the conve rter o utput voltage. For now , we ca n model thi s te rm us ing a de penden t voltage source, with
po lari ty c hose n to sa ti s fy Eq. (3. 16).
3.3.2 Capacitor Current Equation

ing
.ne
(ic)=O=D '/- ~ (:l.1 7)
Th is equ ation was derived usi ng Kirchoff 's cu rre nt law to fi nd the ca paci tor c urrent du ri n g each sub in ter-
val. The results were ave raged, and th e average capaci tor cur rent was set to zero .
Eq uat io n (3 .17) states tha t the sum of two de c urrents are equ al to (ic ), or zero. Hence, Eq.
t
(3. 17) is of th e same form as a node eq uation; in part icu lar , it descr ibes the de components of curre nts
Node
Fig . 3_11 Circu it whose node e:,qualiun is identical to Eq. (3. 17).
obrnined by equating lhe average capacitor current (i c ) to 7.ero. Uc>
> ' +
V/R
=O ~ ~ ..
D'I C V R

3.J Co11
stmctio11of Eq11i
m /e111
Circuit Model 47
D'V D'/ V R
Fig. 3.12 The circuits or Figs . 3. lO and 3.11, drawn toge1her.
ww 1
D': I
+
w.E V R
asy
Fig. 3.13 Equivulenl circuit mudel of the boost converter, including a D':l de transformer a11dthe inductor wind-
ir1gresistimcc R,:
En
flow ing into a node connected to the ca pacito r. The de capacitor voltage is V.
gin
So now let us constr uct a circ u it conta ini ng a node connected to the capac itor , as in Fig. 3.11,
whose node eq uation satisfies Eq. (3. 17). The seco nd term in Eq. (3.17) is a current of ma g nit ude VIR,
proportional to the de capaci tor vo ltage V. This term corresponds to a resisto r of va lue R, connected in
eer
parallel with the capaci tor so that its voltage is V and hence its current is VIR. The fir st term is a current
D'l, dependent on the de indu c tor current/. For now , we can model th is term usi ng a depen dent current
ing
source as show n. The po lar it y of the source is chosen to satis fy Eq. (3. 17).
3.3.3 Complete Circuit Model
.ne
The next step is to combine the circuit s of Figs . 3.10 and 3 .1 1 in to a s ingle circu it, as in Fig. 3. 12. Th is
circui t can be further si mpl ified by recogniz in g that the dependent voltage and current sou rces constitu te
an ideal de transformer , as discussed in Section 3. 1. The D'V dependent volt age source depe nds on V, the
voltage across the dep en dent current sou rce. Lik ewise, the D'l dep en den t curren t source depe nd s on / ,
the current flowing through the depen de nt voltage source. In each case, the coeffic ient is D' . Hence, the
t
dependen t sources form a c ir cuit si mi lar to Fig . 3.2; the fac t that the voltage source appears on the pri -
ma ry rather than the secondary side is irre leva nt, ow ing to the sym metry of the tran sformer. They are
therefore equivalent to the de transformer model of Fig. 3.3, with turns ratio O' :l. Substitution of the
ideal de trans form er mode l for the dependent sources yie lds the equiva lent circuit of Fig. 3. 13.
The equiva len t cir cuit model can now be man ipulated and solved to find the conver ter voltages
and curren ts. For example , we can e limin ate the transformer by referring the Vg vo ltage source and RL
resistance to the secondary side. As shown in Fig. 3.14, the voltage source value is di vided by the effec-
tive turns ratio D', and the res istance Rl is divided by the square of the turns ratio , 1) ' 2 • Th is circu it can be
solved directly for the output vo ltage V, us ing the voltage divider formula:

48 Steady-StateEquivtile11t
D 'l +
Fig. 3.14 Simplification of the equivalent circuit or
F'ig. 3. 13, by reterring all elements to lhc secondary
side of the tran s forme r. V/ D' V R
ww V = V• _I_? --
D' R + 1\
D' -
aa v•.__
D' 1+
I__
H!-
V'"R
(3 .18)
w.E
This result is identical to Eq. (3. 14). The circuit can also be solved directly for the inductor current /, by
referring all elements to the transformer primary side. The result 1s:
asy (3 . 19)
3.3.4 Ell'iciency
En
gin
The equivale nt circuit model also allows us to co mpute the co nverter effic iency 1']. Figure 3. 13 predicts
that the converter input power is
I',,.aa ( V,) (/) eer (3.2 0)
ing
The load current is equal to the current in the secondary of the ideal de transformer, or D'I. Hence, the
model predicts that the converter output power is
.ne
I',,,,,=( V) (D'I) (3.2 1}
Therefore, the converter efficiency 1s
(3.22)
t
Substitution of Eq. (3.18) into Eq. (3.22) to eli minate Vyie lds
11aa- _lR (3.23)

I+_,_ .
D''R
This equation is plotted in Fig. 3.15, for several values of R/ K It can be seen from Eq. (3.23) that, to
obtain high efficiency, the induc tor winding resistance R,_ should be much smaller that D'2R, the load
resistance referred to the primary side of the ideal de transformer. This is easier to do at low duty cycle,
where D ' is close to unity, than at high duty cycle where /)' approaches zero. It can be seen from Fig.

3.3 Co11s
tructio11of Eq1ti1
1a/e111
Circuit Model 49
100%
90%
80%
70%
60%
ww 'I') 50%
40%
w.E
30%
20%
10%
0% asy
0 0.1 0.2
En
0 .3 0.4 0.5 0.6 0.7 0.8 0.9
gin
D
Fig. 3.15 Effic iency vs. duty tyclc, boost co nvene r with inductor copper loss.
eer
3. 15 th at the efficie ncy is ty p ic all y hi gh at low du ty cyc les , but dec reases rap idl y to zero near D = I.
Th us, the bas ic de tra nsfor mer model can be refined to include ot her e ffec ts , such as the indu c -
ing
tor co pper loss . Th e model desc ribes the bas ic properties of the co nver ter, inc ludi ng (a) tra nsformat ion of
de vo ltage and curr ent leve ls, (b) seco nd-order effects such as power losses , an d (c) the conversio n rat io
M. The model can be solved to find not only the o ut p ut vo ltage V, bu t also the inducto r curre nt I and the
.ne
efficiency 1]. A ll of the well -know n tech niq ues of c ircuit ana lys is can be empl oyed to solve the mode l,
mak in g thi s a powerfu l and ve rsati le approach.
t
The ex amp le co nsidered so fa r is a relative ly simp le one, in w hic h the re is only a single loss ele -
ment, RL Of course , real conve rters are co nsiderab ly more co mpli cated , a nd co nt ain a large nu mbe r of
loss eleme nts. Wh en so lving a co mpli ca ted c ir cui t to find the o u tpu t voltage and effic ie ncy , it be hooves
the e ngi neer to use the si mp les t and most ph ysica ll y me anin gful met hod poss ible. Wr iti ng a large nu m -
ber o f sim ult an eous loop or node eq uati ons is not the bes t app roac h, beca use its solut ion typica ll y
req ui res severa l pages of algebra, and the eng inee r us ua ll y makes algeb ra mi sta kes alo ng the way. The
pract ic in g engi neer of ten gives up befo re findi ng the correct solution. The eq ui va le nt c ircuit app roac h
avoid s this situ ati on, because one can s imp lify the ci rc ui t vi a we ll -k now n ci rcu it man ip u latio ns suc h as
pushin g the c ircu it elemen ts to the seco ndary side of the tran sfor mer. Ofte n the answe r ca n the n be writ-
ten by inspect ion, usin g the vo ltage di vi de r rule or other fo rmu las . The engi nee r deve lops co n fide nce that
the res ul t is co rrect, and does not co ntai n algebra mista kes.

50 Steady-State Eq11i
1,a/e111
Circuit Modeling, Losses,a11dEfficie11
cy
i,_ L Rl
Fig , 3.16 Buck converter example. + vl - +
2
v, C Ve R
ww
3.4 HOW TO OBTAIN THE INPUT PORT OF THE MODEL
w.E
Let's try to der ive th e model of the buck co nverter of Fig. 3. 16, us ing th e procedure of Section 3.3. Th e
indu cto r winding resistance is again mode led by a series res isto r R1 .
l11e average inductor voltage can be shown to be
asy
Thi s equ ation describes a loop with the de indu ctor curr ent 11,. The de components of the voltages aro und
(3 .24)
En
thi s loop are: (i) the DV11term, modeled as a de pende nt voltage source , (ii) a voltage drop l1 R1 , mode led
as res istor Ru and (ii i) th e de out pu t vo lt age V,..
TI1e average c apa c itor cu rrent is
gin
( l.e ) "' 0 "' t,.- ·Ve
R
(3.25)
eer
Thi s equa tion desc ribes the de cu rre nts flowing int o the node connec ted to th e capaci tor. The de co mp o-
ing
nent of induc to r cur ren t, Ii, flows into th is node. The de load cur rent VclR (i.e., the c urrent flow in g
thro ugh the load resistor R) flows ou t of this node . An equ iva lent circ u it that mode ls Eq s. (3.24) and
(3.25) is given in Fig . 3.17. This c ir cu it can be solved to determine th e de ou tput voltage Ve
.ne
What happ ene d to the de tra nsformer in Fig. 3.17? We expect th e buc k co nverter model to con -
tain a de transfo rm er, wi th tu rn s ratio equal to the de conversion ratio , o r 1:D. Accor di ng to Fig . 3.2, the
seco ndary of thi s tra nsfor mer is equi va lent to a dep ende nt voltage source, of value DV;-. Such a source
does indeed appear in Fig. 3.17. Bu t where is the pr im a ry? From Fig. 3.2, we ex pec t the prim ary o f the
de transfo rme r to be equi valent to a de pend e nt cu rren t source . In ge neral, to der ive thi s source , it is nec-
essary to fin d the de compone nt of the co nverter in p ut curre nt i,(t).
The co nver ter input current wavefor m i8 (1) is sketched in Fig. 3.18. Wh en the switc h is in po si-
t
t ion l , ii r) is equ al to th e indu c tor c urr e nt. Ne glec tin g th e in d uc to r c urr e nt r ipp le , we hav e i/ t)"' IL.
\Vhen the swi tch is in position 2, i/f) is zero. TI1e de co mpon ent, or average value, of i_..( t) is
RL
~ , - • - C ...
Fig. 3. 17 Egui vnlcnt cil'cui r der ived from
F.qs. (3.24) a11d(3.25). + (vJ- + VclR
=0 (ic) !
=0 . ---
i
G
D V8 - Ve R
'

3.4 How to Obtain the fnp lll Port of the Model Sl
Fig. 3. 18 Converter input current

waveform i/1).
area=
DT, IL
0
0 DT,
ww
Fig. 3.19 Converter input port de equivalent circuit.
w.E
I<'ig. 3.20 asy
The circuit~ of Figs. 3. 17 and +
En
3. 19, drawn together.
R
gin
Fig. J.21 Equivukm circuit of the buck
l :D
eer +
ud ing a I : D de trans ro rrner
converter, i11cl
and the inductor winding resistance RL.
v, ing R
.ne
l, = -1I.
• s ll
LT
' 1,.(l )c/t aa DI L {3.26)
t
The int egra l of i..(t) is equal to the area under the ii t) cur ve, or DTJLaccording to Fig. 3. 18. The de co m-
po nent lg is therefore (DT/J IT, = DIL' Eq uation (3.26) states that l,, the de com ponen t of curren t drawn
by the converter out of the V, source, is equal to Dl i. An equivalent ci rcuit is given in Fig. 3.19.
A complete mode l for th e buc k conve rter can now be obtained by comb in ing Figs. 3.17 and
3. 19 to obtain Fig. 3.20. Th e dependent curr ent and voltage sources can be co mbined into a de trans-
former , since the DVx dependent voltage source has val ue D times the voltage V8 across the dependent
curre nt source, and the current source is the same constant D times the current 11. through the dependent
voltage source . So, according to Fig. 3.2, the sources are equ ivalent to a de transformer with turns rntio
I :D, as shown in Fig. 3.21.
In genera l, to obtain a comp lete de equ ivale nt circuit that mode ls the co nver ter inp ut port, it is
neces sary to w rite an equa tion for the de co mp onen t of the conver ter inpu t curre nt. An equi valen t c ircu it

52 Steady-State Equivale/11Circuit Modeli11

g, Losses, and Efficiency
corresponding to thi s eq uation is then constructed. In the case of the buck conve rter, as we ll as in other
converters ha ving puls ating input curr ents, thi s equi vale nt circu it contai ns a dependen t current source
which becomes the prima ry of a de transformer model. In th e boost co nverte r example of Section 3.3, it
was unn ecessa ry to explicitly write thi s equat ion, because th e in put curre nt ig(t) coinc ided with the
inductor current i(I), and henc e a complete e qui va le nt c ir cuit cou ld be deri ved usi ng only the indu ctor
voltage and ca pacitor curre nt equations .
3.5 EXAMPLE: INCLUSION OF SEMICONDUCTOR CONDUCTION LOSSES IN THE

BOOST CONVERTER MODEL
ww
As a fina l exam pl e, let us co ns ider mod e li ng semiconductor conduction losses in the boost conve rter of
Fig. 3.22. Another major source of power loss is the co ndu ction loss due to semico ndu cto r device for-
w.E
ward vol tage drop s. The forward voltage of a me ta l oxide sem icond ucto r fie ld -effect tra nsisto r (MOS -
FET) or bipolar j un ction transistor (BJT) can be modeled wi th reasonable accuracy as an on -re sista nce
R011• In the case of a diode , in sulate d-ga te b ip olar tran sisto r (IGBT ), or thyristor, a voltage source plu s an
asy
on-resistance yiel ds a model of good acc uracy; the on-resistance may be omitted if the conve rte r is being
modeled at a single operating point.
When the gate drive sig na l is high , the MOSFET tu rn s on and the d iode is reverse -biased. Th e
En
ci rcu it then reduces lo Fig. 3.23(a). In the conduct in g state , the MOSFET is modele d by the on -re sista nce
R011• The indu cto r w in di ng resistance is agai n represented as in Fig. 3.5. The ind uctor vo ltage a nd capaci -
tor curre nt are g iven by
gin
v1.(r) = Vt - iR,. - ii(,., "' V_, -IR 1 - I R.,,.
(3.27)
eer
ic~t)= - i" - ·};
The induc tor cur rent and ca pac itor voltage have aga in bee n approximate d by the ir de componen ts.
ing
When the gate dr ive sign al is low , the MOSFET turns off . The dio de becomes forwa rd -biased
by th e ind ucto r cur rent , and the c ircu it reduces to Fig. 3.23(b) . In the con ductin g sta te, the dio de is mod -
eled in th is example by voltage source V/Jand resistance ll 11• The indu ctor winding resis tance is aga in
.ne
mod eled by res istance !?,_.The inductor vo ltage and capaci tor cur re nt for thi s s ub interv al are
t
v1(t )= V,-iR ,_-V"-iR "-v ~ V,-IR 1_- Vv -lR"-V
(3.28 )
• () ' V l V
'c t = I - R " - R
The indu cto r voltage and ca pacito r c urr ent wavefo rms are sketc hed in Fig. 3.24.
L
+
vg
b DT,
C R V
Fig. 3.22 Boost conve 1ter examp le.

3.5 Example: /11clusionof Semico11d11ctor

Co11d1c1tio11Losses i11the Boost Co11verter Model 53
(a)
C R V
ww
(b)
w.E R V
l<'ig.3.23
asy
Boost convert~r circuits: (a) wl1en MOSFET conducts, (b) wh<lrldiode conducts .
En
The de compo nen t of the indu ctor vol tage is give n by
(v,_)"'n(V, - D'(
V, - Ill,.- Vn - lR D - v)"'0 (3.29)
gin
11?
1• - JR,.,,)+-
By co llect ing terms and not in g th at D + D' = l, one obtai ns
V~- IR, -IDR, ,n- D'V 1, - ID'R"- fJV =0

eer (3.30)
ing
T his equa tion des crib es th e de components of the voltages arou nd a loop con tain in g the ind uctor, w ith
loo p current equal to the de inductor cu rrent / . An equiva lent circ uit is give n in Fig. 3.25.
.ne
-Dr
Vg - IR1,- /R 0 n
.- -D'T,
---
t
Fig. 3.24 fmfoctor vollage v1_(t) and

I
capacitor cuncnt ic(I) waveforms, for
the converter of Fig. 3.22. Vg - lRL - V0 - JR0 - V
id,._1)
1- VIR
I
- V/R

54 Steady-State Equivalem Circuit Modeling, lasses , and Efficiency
1•1g. 3.25 Equivalent cirrnit

corre,ponding 10 Eq. (3.30).
D'V
ww
J.<'ig. 3.26 Equivalent circuit
+
VIR
w.E
corresponding to Eq. (3.32).
D'l V R
asy
The de component of the capac itor current is
En (],]l )
Upon co llect ing terms, one obtains

gin
eer (3.32)
ing
This equation describes the de compon ents of the currents flowin g into a node co nnected to the ca pacitor,
with de capaci tor voltage equal to V. An equ ivalent circui t is given in Fig. 3.26.
The two circuits are draw n together in 3.27. The dependent sources are combin ed into an ideal
.ne
D': I transformer in Fig. 3.28, yielding the comp lete de equiva lent circuit mode l.
Solution of Fig. 3.28 for the output voltage V yields
v-(I)(v
- D'
D'v)(D''R + R,.0·
K- D
R
+ DR,,,,+ D'Rn
2
) (3.33)
t
D'V D'l V R
Fig. 3.27 The circuits of Figs. 3.25 and 3.26, drawn togetl1cr.

3.5 Exwnple:lnd11.rio11
of Semiconductor Co11d
11
clio11Losses i11rhe Boosl Converrer Model 55
D'V0
D' : l
+
vg
rJ V R
Fig. 3.28 Equivalent circuit model of the boost converter of Fig. 3.22, i11cludingideal de transformer, inductor
ww
winding re~istance, and MOSFET and diode conduction losies.
Dividing by V, gives lhe vo ltage conve rsio n ral io:
w.E (3.34)
asy
It ca n be see-n that th e effecl of the loss elemen ts Vn, R0 f( ,,,. and Rr, is to decre ase the voltage co n vers io n
ratio below th e idea l va lu e ( 1/D').
En
The eff ic iency is give n by Tj = P"JP ,,,. From Fig. 3.28 , P.,,= Viand P,,,.,= VD'/. Hence ,
D~t))
IJ=D'.J!....= ~--
(I -
-
V~ (i+R r +DR,,,.+D'R 1, )gin (3.35)
eer
D' 2R
For high efficiency , we requ ire
V/ D' ;:_, V1,

D'2 R ~-i<> R, +DR,..,+ D'R0 ing (3.36)
.ne
It ma y seem stran ge that th e eq ui va lent circ uit mode l of Fig. 3 .28 co ntain s effec ti ve resista nces DR ,., an d
D'Rn, whose values vary w ith du ty cy cle. The reason for th is dependence is tha t the semicond uctor on -
res ista nces are co nnected in the c ircui t only when th ei r respect ive sem icon du ctor dev ices con ducl. For
exa mple , al D = 0, th e MOSFET ne ver co nducts , and the effect ive res istance DR0 ,. disappears from the
model. These effec tive res istances co rrect ly model th e ave rage power losses in the eleme nt s. For
in sta nce, the eq u ivale nt c irc u it pr edi cts that the power loss in the MOSFET on -re sistance is !2DR0 ,, . In
t
lhe ac tu al c ircui l, th e MOSFET con du ct ion loss is i2R,,,. whil e th e MOSFET co ndu cts, and zero w hil e th e
MOS FET is off. Since the MOSFET conducts w it h dut y cycle D, the aver age co ndu ction loss is Di2R,.,.,
which co incides wilh lhe pre dict io n of the mode l.
In genera l , to pred ict the power loss in a res istor R, we mu st calcu late the root -mean -square cur -
rent l,,..., throu gh the resis tor, rather than the average curre nl. Th e average power loss is then give n by
!m.}R. No nethe less, the ave rage model of Fig. 3.28 correc tl y pred icts average power loss, prov ided th at
the ind ucto r c urre nt ripp le is sma ll . For exa mp le , co11s ider th e MOSFE T conduc tio n loss in th e buc k con-
verter. The act ual tra ns istor curren t waveform is sketc he d in Fig. 3.29, for several val ues of in duc tor cur -
rent ri ppl e t"J.i.Case (a) corresponds to use of an infi nit e in du c ta nce L, leadi n g to zero in duc tor current
ripple . As shown in Tab le 3. 1, the MOSFET co nduct ion loss is then given by l,,.} R,.. = ot2R, .,, wh ic h

56 S/eady-State Eq11i
valenr Circuit Modeling, Losses, and Efficienl)'
i(t )
Fig. 3.29 Transistor cunenr waveform, for var ious
filter induct or values: (a) wich a very large indu ctoi·,
such t)mt /1i "' O; (b) wilh a typical inductor value,
such timt /J.i=0.11; (c) witl1 a small induccor valu~,
chosen such that /:J.i = I.
0
0 DT, T,
agrees exactly with th e predi c tion of th e average mo de l. Case (b) is a ty pi ca l c hoice of inductan ce L,
lea di ng to an in du c tor curre nt ripple o f ni = O.l/. The ex act MOSFET co ndu c ti o n loss , calc u late d using
ww
the rms value o f MOSFET c urr en t , is the n o nly 0.33 % great er th an th e pre d ict io n of the ave rage mo de l.
In the extreme ca~e (c) w he re Ai= I , th e actu al con du c t io n loss is 33% g reate r th a n tha t pred icte d by the
average mod e l. T hu s, the de (aver ag e) m ode l correct ly pr edic ts losses in the component noni d e a lili es,
w.E
even tho ug h rms curren ts are no t c alcul ate d . T he model is acc urate prov ided th a t th e i nd ucto r c urr e nt ri p-
ple is sm al l.
'ThblcJ. l or i[1ductor cur rent ripple on MOSrET con duct ion loss
Effe1.:1
asy
Inductor current ripple MOSFETrms current Average power loss in R0 11
(a) iii= 0
En 1./fJ
(b} t.i = O.li
(c) iii "" I gin

( 1.00 167)/
( 1.155)I ./fJ
./fJ (1.0033 )D/ 2R,.,
(J.3333) D/ 2R.,.,
eer
ing
3.6 SUMMARY OF KEY POINTS
I. The de transfor mer model rep resen ts the primary functions of any de-de converter : transfo rm ation of de
.ne
voltage and cuITenl levels, ideally with 100% effic iency, and control of the conversion ratio M via the duty
cycle D. T his model can be eas ily manipu lated and so lved using fam ili ar tec hniq ues of convent ional c ir-
cuit analysis.
2. The model can be refined to account for loss ele ments such as ind uc to r w indin g res istance and se micon-
ductor on-resista nces and forward voltage drops. The refi ned mode) pred icts the voltages, cuITe nts , and
effic iency of prac tical no nidea l conveners . t
3. In genera l, the de eq uiva lent circ uit for a co nverter can be derived from the ind uc tor volt-seco nd balance
and capac itor charge balance equa tions . Equi vale nt circuits are co nst ruc ted whose loop and node equ a-
tions coincid e wi th the volt-seco nd and charge bal ance eq uations . In convert ers having a pulsa ti ng in p u t
c urre nt , an addi tional equation is needed to model the convert er inp u[ port ; this eq uation may be obtai ned
by ave raging the conven er inp ut curren t.
REFERE CES
[ I) R. D. MIDDLEBROOK, "A Contin uous Model for the Tap ped- Indu cto r Boost Conve rter ," IEEE Power Elec-
1ronics Specia/isrs Co,rference, 1975 Record, pp . 63-79, June )975.

Problems 57
(2) S. M. CUK, " Mode ling, Analysi s , and Design of Switching Conver ters ," Ph. D. thes is, Ca lifo rn ia Inst itut e
of Technology , November 1976.
[3) G. WESTER and R. D. MIDD LEBROOK, "Low-Frequency Characterizat ion of Switch ed De-De Converters, "
IEEE Transactions on Aerospace and Electronic Systems, Vol. AES-9, pp. 376- 385, May 1973.
(4] R. D. MIDD LEBROOK and S. M. CUK, "Modeling an d Ana lysis Method s for De -to -D e Switchin g Co nvert-
ers ," IEEE International Semicond uctor Pow er Converte r Confe rence, 1977 Record , pp. 90-1 11.
ww
PROBLEMS
3.1 In the buck-boos t conver ter of Fig. 3.30, the ind uc tor has w ind ing resista nce 1/L, All other losses can be
ignored.
(a)
(b)
(c)
w.E De rive an exp ression for the nonidea l voltage co nversion ratio VIV8 •
Plot yo ur res ult of pan (a) over the range O 5 D 5 l, for R./ 1/ = 0, 0.0 l, and 0.05.
Derive an expres sion for the efficiency. Ma ni pula te your exp ression into a form si m ilar to Eq.
(3.35)
asy +
En V
gin
eer
Fig, 3,30 Nonide a l buck- boost converter, Problems 3.1 and 3.2.
3.2 The ind uc to r in the buck-b oos t converter of Fig. 3.30 has wind in g resista nce RL. A ll other losses can be
ing
ignore d. Derive an equivalent c ircui t mode l for thi s co nverter. Your model shou ld explicitly show the
inp ut port of the converter, and sho uld contain two de transfor mers.
.ne
3.3 In the converte r of Fig. 3.31, the induc tor has wind in g resistance RL, All ot her losses can be ignored. The
switches operate sync hrono us ly: each is in position I for O <I < DT,, and in posi tion 2 for DT, <I< T,.
(a) Deriv e an exp ress ion for the no nidea l voltage convers ion ratio VJVG.
(b)
(c)
Plot yo ur res ult of pan (a) over the range O,;; D,;; I, for R/ R = 0, OJ) l, and 0.05.
Derive an expression for the efficiency . Ma nipulate your express ion int o a form simila r to Eq.
(3.35) t
L
C
2
v,
2
Fig. 3.31 Nonideal current-foci bridge con verter. Problems 3.3 and 3.4.
3.4 TI1e indu c tor in the co nverter of Fig . 3.31 has win din g res istance RL. All o ther losses can be ignored .
Derive an equ ivalent c irc uit mode l for th is converter.

58 Steady-State Eq11i
va/e111
C R V
Fig. 3.32 Nonidcal buck converter, Probl~m 3.5 .
ww
3.5 In the buck conve n er of Fig. 3.32, the MOSFET has on-resis tance R.,,.and the diode forwa rd voltage
drop can be modeled by a co nstant voltage source V0 . A 11 othe r losses can be neglected.
(a) Der ive a comp le te equi vale nt c irc uit model for t his conve n er.
w.E
(b)
(c)
Solve your model to find the ou tput voltage V.
Derive an express ion for the effic iency. Ma nipuI.\te you r express ion into a form si milar to Eq.
(3.35).
3.6
asy
To reduce the switching ha rmon ics present in the in p ut current of a ce rt ain buc k converte r, an in p u l filter
is added as shown in Fig . 3.33. Indu ctor s L 1 and L2 contain win di ng resistances R1_1 and R12 , respec -
tive ly. The MOSFET has on -res ista nce U,,.,. and the diode forw ard voltage dro p can be modeled by a
En
co nstant voltage VP plus a resisto r R/J.All other losses ca n be ignored.
Li RL I Lt Ru
;,
c, gTin
+ +
eer
v, vc, D, C2 R V
Fig. 3.33 Buck converter with input filter, Prob lem 3.6 .
ing
.ne
(a) Der ive a co mp le te equivalent ci rcu it mode l for th is circ uit.
(b) Solve you r mode l to find the de ou tpu t volta ge V.

(c) Der ive an express ion for th e effi ciency. Man ipu late yo ur ex press ion into a form sim ila r to Eq.
3.7
(3.35).
A 1.5 V ballery is lo be used to powe r a 5 V, I A load. It has been decided to use a buck-boost conve11er
in this appl ication. A suitable transistor is found with an on-resistance of 3S m.Q, and a Schollky diode is
t
found with a forward drop of 0.5 V. The on-resistance of the Schollky diode may be ignored. The power
stage sc hemat ic is shown in Fig . 3.34.

Q, lA
+
va
lOOµH 5V Load
1.5 V
[
DT, T,
+
f, = 40 kHz
l<'ig
. 3.34 Nonid eal buck-boo st co nverter powerin g ;1 5 V load from a 1.5 V battery, Problem 3.7

Problems 59
(a) Der ive an eq u ivale nt c irc u it tha t mode ls the de pro perties of t h i s conver ter. I nc lude the tra nsistor
and diode cond uc tion losses, as well as the induct or coppe r loss, but igno re all other sources of
loss. Your model sho uld co rrec tly desc r ibe the co nve rter de inp ut por t.
(h) It is des ired that the co n ve rt er opera te w it h at leas t 70% effic iency un der nomi nal co nd iti o ns
(i.e., w hen the inp ut voltage is 1.5 V and the ou tpu t is 5 V at I A) . How large can the ind uctor
winding resista nce be? At wha t du ty cycle wil l the conver ter the n openlle? Note: there is an easy
way and a no t-so-easy way to an aly tica ll y solve th is pitrl.
(c) For yo u r des ign of part (b) , compute the powe r loss in each e lement.
(d) Plo t the conve rter ou tp ut voltage and eff iciency over th e range O $ D ~ l, using the value of
induc tor wi ndin g res ista nce whi ch you se lected in pa rt (b).
ww (e) Disc uss you r p lot of pa rt (d). Does it behave as yo u ex pect? Exp lain.
w.E
For Prob lems 3.8 and 3.9, a tra nsisto r ha v in g an on -res istance of 0.5 !2. is used. To s i mplify the problems, you
m ay neg lect a ll losses other th an the trans isto r cond uction loss . Yo u may a.Iso neglec t the depe nd ence of MOS-
FET on- resis tanc e on rated b loc king vo ltage . These s impli fyi ng assu mpt ions red uce the d iff erences betwee n
co nverte rs, bu t do not change the co nclusio ns rega rding wh ich co n vener perfor ms best in the give n situa tions.
3.8
asy
It is des ired to in terface a 500 V de so urce to a 400 V, 10 A load u sing a de-de conver ter. Two poss ible
app roac hes, us ing buck and buck-b oos t co nve rters, are ill ustra ted in Fig. 3.35. Use the ass u mptions
En
describ ed above to:
(a) Derive equiva lent ci rcu it models fo r both co nverters , which model the co nve r te r input an d out -
pu t por ts as well as the trans isto r con d ucti o n loss.
(b)
(c)
gin
De term ine the d ut y cy cles th at cause th e co nver ters to opera te w ith the specified co ndit ions .
Co mpa re the tra nsi stor co nduc tion losse s and efficie ncies of the two approaches , and co ncl ude
eer
whic h conver ter is be tter s uit ed to the spec ifie d app lica tio n .
(a) JOA
ing
+ +
500V
T 400V
.ne
(b)
500 V
+
400V
t
+
Fig, 3.35 Problem 3.8: interfacing a 500 V suun:e to a 400 V load, usi11g (a) a buck con verter, (b) a
huck·boost converter.
3.9 It is des ired to inte rface a 300 V ba ttery to a 400 V, 10 A load usi ng a de -de co n verter. Two possi ble
appro aches , usin g boost and buck-b oos t co nverters, are ill u stra ted in Fig. 3.36 . Us in g the ass u mptions
described above (befo re Pro bl em 3.8), de termi ne the effic ie ncy and power loss of eac h approach. W hi ch
convene r is be tter for thi s applica tio n?

60 Steady-Stale Eq11ival
e11tCircriil Modeling, Losses, and Efficieru.) •
(a) lOA
+ +
300V
-I 400V
(b)
+
ww 300V 400V
w.E +
Fig. 3.36 Problem 3.9: interfoci ng a 300 V battery lo a 400 V load, using : (a) a boost converter, (b) a
huck-boost convel'ter.
3.10
is asy
A buck converter is operated from the rectified 230 V ac mains, such that the converter de input voltage
En
V~ = 325 V :t: 20%
A control cir cuit automatically adjusts the convener duty cycle D, to maintain a constant de ou tpu t volt-
age of V = 240 V de. The de load current / can vary over a 10: I range:
I0A:5/:5 1A
gin
The MOSFET has an on-resistance of 0.8 Q.The diode conductio n loss can be modeled by a 0.7 V
source in series with a 0.2 Q resistor. All other losses can be neglected.
(a)
elements described above.
eer
Derive an equivalent circuit that models the converter inpu t and output ports, as well as the loss
(b)
(c)
vary?
ing
Given the range of variation of V~ and / described above, over what range will the dut y cycle
At what operati ng point (i.e., at what value of V~ and /) is the converter power loss the largest?
What is the value of the efficie ncy al this operating point~
.ne
3.11 In the Cuk converter of Fig. 3.37, the MOSFET has on-resistance R,,.,and the diode has a constant for-
ward voltage drop V/J.All other losses can be neglected.
+
t
v, R V
Fill. 3.37 Cuk converter, Problem 3.11.
(a) Derive an equivalen t circuit model for this conven er. S11
ggestio11:if you don't know how to han-
dle some of the terms in your de equations, then temporarily leave them as dependent sources. A
more physical representatio n of these terms may become apparent once de transformer s are
incorporated into the model.

Problems 61
(b) De rive an a lyt ica l ex pressi on s for the converter out p ut voltage and for the eff ici ency.
(c) For V0 = 0, p lot V/Vgvs. D ove r the range O :5 D 5: l , for (i) R,,,/fl = O.oJ, and (ii) R,,,,IR = 0 .05 ,
(d) For VO= 0, p lo t th e c onverte r efficie ncy ove r the range O :5 {) :5 I , for (i) R,,,,IR
= 0.()J , and (ii)
R0 / R = 0.05.
ww
w.E
asy
En
gin
eer
ing
.ne
t

ww
w.E
asy
En
gin
eer
ing
.ne
t

4
Switch Realization
ww
w.E
asy
En
gin
We have seen in previo us cha pters that the sw itchi ng e lements of the buck, boost, and several other de-de
eer
co nverters can be imple mente d using a transistor an d diode. One mi gh t wo nder wh y this is so, and how
to realize se mico nduc tor switc hes in ge neral. These are wo rthwh ile questio ns to ask, and switch imple -
mentation can depend on the power processing fu nct io n bei ng perfo rmed. The sw itches of inverte rs and
ing
cycloco nverters requi re more co mplicated im ple me ntatio ns than those of de-de converte rs. Also, the way
in which a semicon du ctor switch is impleme nted can alter the behavio r of a co nverter in ways not pre-
dicted by the ideal-switch analys is of the previous chapters- an example is the discont inuous con duction
.ne
mode treated in the next chapte r. The rea liza tion of swi tches using transisto rs and diodes is the subj ect of
th is chapter.
t
Semico nducto r powe r devices behave as single -pole si ngle -throw
(SPST) switches , represented idea lly in Fig. 4 .1. So, a ltho ugh we o ften draw
converter schem atics us ing idea.I single -pole dou ble -throw (SPon swi tches as
in Fig. 4.2(a), the schematic of Fig. 4.2(b) co nta in in g SPST sw itches is more
realist ic. The realiza tio n of a SPOT switc h usi ng two SPST sw itches is no t as
tr ivia l as it migh t at first seem, beca use Fig . 4.2(a) a nd 4.2(b) are not exac tly
equi valent. It is possi ble for both SPST switches to be simulta neo usly in the on
state or in the off state, leadi ng to behavior not pred icted by the SPOT swi tch
of Fig. 4 .2(a). In ad di tion , it is possi ble for the sw itch state to depe nd on the Fig. 4.1 SPST switch,
appl ied vo ltage or current wa veform s- a fami liar examp le is the diode . Indeed , with defined voltage and
it is co mmon for these phe nomena to occ ur in converters opera tin g at lig ht currelll polarities.
load, or occas ional ly at heavy load, leadi ng to the disco ntinu ous conduc ti on
mode previo usly mentio ned . The converter propert ies are the n sig n ificantly mod ified .
How an ideal switc h can be realized us ing semico nductor devices depen ds on the polar ity of the
voltage tha t the dev ices mu st block in th e off state, and on the polarity of the curren t that the devices

64 Switch Realization
(a) L
+
2
C R V
Fig. 4.2 Buck convener: (a) contammg
SPOT switch, (b) containing two SPST
switches .
ww (b)
i,1 A L jL(t)
w.E vg
+ VA
Vg B
C R
+
asy +
i»
En
must conduct in the on state. For example , in the de-de buck co nve rte r of Fig . 4.2 (b), sw itch A mus t
block pos itive voltage V8 when in the off state , and must co ndu ct pos iti ve curre nt iL when in th e on state.
gin
If, for all intend ed converter operat in g po ints, the curren t and b lock in g vol tage lie in a si ng le quadrant of
the plane as illus trated in Fig. 4.3, the n the switch can be implemented in a simp le manner usin g a tran -
eer
sistor or a diode. Use of single -quadran t switches is common in de-de converters . Their operat ion is dis -
cussed bri e fly here.
In inv e rter ci rcu its , two -qu ad rant sw itc he s are witch
ing
on I le
req uired. The output current is ac, and hence is some - current
times posit ive and someti mes negative . If this current
flows through the sw itch , then its current is ac, and the
sem iconduc tor switch rea lizat ion is more complica ted.
.ne
A two -quad ran t SPST switch can be rea lized us in g a

trans istor and diode. The dual case also somet imes
occurs, in wh ich the sw itch curren t is a lways pos itive,
but the blocking voltage is ac. This type of two -quad ran t
sw itch can be constructed using a d ifferen t arrangement
of a transistor and diode . Cycloconverters generally
witch
off stale voltage
t
require four -quadran t sw itches , which are capable of

b lockin g ac voltages and conduct in g ac cu rrent s. Real -
iza tions of these elements are also d iscussed in th is Fig. 4.3 A single-4uadrnnt switch is c;1p11ble of
chap ter. co nducting current~ of a ~ingle polarity, and of
Next , the sync hron ous re ct ifier is examined . hlocking voltuge.s of a single polari ty.
The reve rse -con du cting capabi lity of the metal oxide
semiconduc tor fie ld-effec t transis tor (MOSFET ) allows it to be used where a diode wou ld normally be
required. If the MOSFET on -resis tance is sufficien t ly sma ll , then its conduct ion loss is less th an tha t
ob tained us ing a diode. Synchronous rectifiers are somet imes used in low -volta ge high-c urrent appl ica-
tion s to obtain im proved e fficiency . Severa l basic refer e nce s tre atin g sin g le -, two -, and four -quadran t

4. J Switch Applications 65
sw itches are liste d at the end of thi s chapter [1- 8].

Several power sem iconducto r device s are briefly discussed in Section 4.2. Major ity-carrier
device s, includin g the MOSFET and Schottky diode, exhibit very fast sw itchin g times, and hence are
prefen-ed when the off sta te voltage levels are not too hi gh. Minority -carrier devices , incl u d in g the bipo -
lar jun c ti on transis tor (BJT), in sulated-gate b ipolar transisto r (IGBT ), and thyristors [gate turn -off (OTO)
and MOS -con tro lled thy ri stor (MCT)] ex h ibit hi gh brea kdown voltage s w ith low fo rward voltage drop s,
at the expense of reduce d sw itch in g speed.
Having realized the switches using sem icon du ctor devices , sw itch in g loss can nex t be di s-
cussed . Th ere are a number of mechanisms th at ca use energy to be lost during the switching tra nsit ions
[ 11]. When a transistor drives a clamped inductive load , it expe riences high in stantan eous power loss
ww
dur in g the switch ing trans itions. Diode stored charge further increases this loss, duri ng the transistor
turn -o n transition . Energy stored in certain parasi tic capacitances and inductance s is lost dur ing switch -
ing. Parasitic rin gin g , wh ich decays befo re the end of the switching per iod , also indicates the presence of
w.E
sw itchin g loss. Switching loss increases directly with sw itchin g frequency, and imposes a m ax imum
limit on the operating frequenc ies of prac tica l con verters.
4.1 SWITCH APPLICATIONS

asy
4.1.1 Single-Quadrant Switches
En
gin
Th e ideal SPST sw itch is illu stra ted in Fig. 4.1. The switch conta in s power term in als I and 0, w ith cur -
rent and vo ltage po lar ities defined as shown. In the on state , the volta ge v is zero , whi le the current i is
eer
zero in th e off state. There is sometimes a third term inal C, where a co ntrol signal is app lied . Distin guish -
ing features of th e SPST switc h includ e the control method (active vs. passive) and the region of the i- v
plan e in wh ich they can operate.
A pass ive switch does not con tain a
co ntrol terminal C. The st ate of the switch is
de termined by the waveforms i(t ) and v(t )
{a) (b)
ing
.ne
applied to termin als O and I. TI1e most com mon on
examp le is the diode , illu stra ted in Fig. 4.4. T he +

ideal diode requires tha t v(t) SO and i(t) ~ 0. The off V
t
V
diode is off (i = 0) when v < 0, and is on (v = 0)
when i > 0. It can block neg ative voltage bu t not
positive voltage . A passive SPST switch can be
0
reali zed using a diode prov ided that the in tended
opera ting points [i.e., the valu es of v(t) and i(t)

when th e switch is in the on an d off states ] lie on
Fig, 4.4 Diode symbol (a), and i1s ideal characteris tic (b).
the diode character istic of Fig. 4.4(b).
The con duc tin g state of an active
sw itch is determined by the signal applied to the contro l termin al C. The sta te does not directly depend
on the waveforms v(t) and i(t) applied to term inals O and 1. The BJT, MOSFET, IGBT, GTO, and MCT
are exam ples of active sw itches . Idealized character istics i(I) vs . v(t ) for the BJT and IGB T are sketched
in Fig . 4.5. When the co ntrol term in al causes the transistor to be in the off state , i = 0 and the device is
capable of blocking pos itive voltage: v e:0. When th e control terminal causes the trans istor to be in the on
state , v = O and the device is capable of condu c tin g pos itive current : i e:0 . The rever se-condu cting and

(a) (b)
+
V on
Fig. 4.5 Bipolar junction trnnsislor (BJT)
and insulated gate hipolur transistor (IGBT) off V
symbol~ (a), and tlu:ir idealized switch 0
charncte1isties (h).
ww ~
+
V
w.E 0
Fii:, 4.6
asy
Power MOSFET symbol (u), ancl
i
on
E~n
its idealized switch charncteristics(b).
+ V
gin V
on
0
eer (reverssconduction)
ing
reverse -blocking characteristics of the BJT and IGBT are poor or nonexiste nt, and have essentiall y no
appli cation in the power converter area. The power MOSFEf (Fig. 4.6) has simi lar characteristics,
.ne
except that it is able to conduct current in the reverse direction . With one notable exception (the synchro -
nous rectifier discussed later), the MOSFET is normall y operated with i 2'.0, in the same mann er as the
t
BJT and IGBT. So an active SPST swi tch can be realized using a BJT , IGBT , or MOSFET , provided that
the intended operating points lie on the trans istor characteristic of Fig. 4.S(b).
To determin e how to imp leme nt an SPST switch using a trans istor or diode, one compares the
switch operating points with the i- 11 characteristics of Figs. 4.4(b), 4.S(b), and 4.6(b). For example, when
it is intended that the SPOT switch of Fig. 4.2(a) be in position 1, SPST switch A of Fig. 4.2(b) is closed,
and SPST switch 8 is opened. Switch A then conducts the positive inductor current , i,, = i1_, and switch 8
must block negative voltage, Vn = - Vx. These switch operating points are illustrate d in Fig. 4.7. Likewise,
when it is intend ed that the SPOT switch of Fig. 4.2(a) be in position 2, then SPST switc h A is opened
and switch B is closed. Switch B then conducts the positive induc tor curren t, i 0 = i u whi le switc h A
blocks posit ive voltage, 1',i = VR.
By comparison of the switch A operating points of Fig. 4.7(a) with Figs. 4.5(b) and 4.6(b), it can
be seen that a transi stor (BJT , IGBT , or MOSFE T) co uld be used, since swi tch A must blo ck positive
voltage and conduct positive current. Likewise, comparison of Fig. 4.7(b) with Fig. 4.4(b) reveals that
switch B can be implemented using a diode, since switc h B must block negative voltage and conduc t pos-
itive current. Hence a vali d switch rea lizati on is given in Fig. 4.8.

4. I Switch ApplicatiotH 67
Switch A Switch B
on on iL
Switch A Switch B
off off
ww
Fig. 4.7
w.E
Operating points of switch A, (a). and switch /l, (h), i11the huck 1:onvc1t cr of Fig. 4.2(h}.
Figure 4.8 is an exa mpl e of a single -q uadra nt switc h re ali zation : the devices are capable of con -
asy
duct in g curre nt o f only one pola rit y, and b lock in g voltage of o nly one pol ari ty. When the co ntro ll er tu rn s
the transisto r on, the diode becomes reve rse-biased since vH = - \I~. It is required that V8 be positive; oth-
erwise, the diode w ill be forwa rd-biased. Th e trans isto r conduc ts curr e nt iL. Thi s c urre nt should also be
En
positi ve, so that the transisto r cond ucts in the fo rward direc tio n .
When the co ntro ller turn s the transisto r off , th e d iode must tu rn o n so that the ind uctor curr ent
ca n co ntin ue to flow. Turni ng the tran sistor off causes the inductor current iL(t) to decrease. Since
gin
vL(t) = Ldil(t)ldt, the in ducto r voltage beco mes sufficie ntl y negat ive to fo rwar d-bias the diode , and the
diode turn s on. Diodes that operate in th is ma nn er are somet imes called fr eewheeling diodes. It is
requir ed tha t i,_be pos itive ; otherwise , th e d io de cann ot be forwar d -b iased since i8 = i,_. The transis tor
eer
bloc ks voltage V8 ; thi s voltage should be positive to avo id oper ating the tra nsisto r in the reverse bloc king
mode.
L
ing
.ne
t
Fig. 4.8 Implementation of the SPST ~witches ol' Fig. 4.2(h) using a transistor and di,1de.
4.1.2 Current-Bidiredional Two-Quadrant Switches
In any nu mber of app lica tions such as dc-ac inverters and servo amplifie rs, it is required that the sw itch -
ing eleme nts co nduct currents of bot h pola rit ies, bu t bloc k on ly pos itive voltages. A curr ent -b id irec ti onal
two -qu adra nt SPST switch of thi s type can be realized using a transistor and diode, connec ted in an anti-
para lle l manne r as in Fig. 4.9 .
The MOSFET of Fig. 4.6 is also a two -quadrant sw itch. However, it shou ld be noted here tha t

68 Switch Realizatio11
(a) (b)
Fig. 4.9 A cu1Tent-bidire ctiona l two - I on

' (transisto r conducts)
quadrant SPST switch : (a) implementation
I;,
usir,g a transistor and antiparallcl diode , +
i:
(b ) idealized ~witch charm:l~ristic~. off V
V 1
on
. ' (diode conducts)
ww (a) (b)
w.E
Fig. 4.10 The powe r MOSFET
inher~ntly con1ains a built-in +
pmvcnt conducti on asy

body di ode: (a) equi vule nt <.:ircuit,
(b) addition uf external dirnk s to
of body
V
!.............. ... ......... u:
i
-H :
..
diode.
En !
i:
!:................ -·····-· ··:l
gin
eer
prac tica l power MOSFETs inh eren tl y con tai n a bu il t- in diode, of ten ca lled the /Jody diode, as ill us trat ed
in Fig. 4.10. The sw itc h ing speed of the bod y di ode is mu ch slowe r than that of the MOSFET. lft he body
ing
diode is allowed to co nd uct, the n h ig h peak curr ents can occ ur dur in g the diode turn -off tra ns iti o n . Most
1OSFETs are not rat ed to handl e these cu rrents, and dev ice fai lur e ca n occur. To avoid thi s s ituat io n,
externa l series and an ti paralle l diodes ca n be added as in Fig. 4 . 10( b). Power MOSFETs can be spec ifi-
cally desig ned to have a fast -recove ry body dio de, and to operate re liab ly w hen the body diode is allowed
.ne
to conduc t the rate d MOSFET cu rren t. Howeve r, the sw it chi ng speed of such body diodes is still some -
what slow, and s ignificant sw it c hi ng loss due to dio de store d charge (d iscussed late r in this chapt e r) can
occur.
A SPOT cur rent -bi dir ec ti onal two -quadrant sw itch ca n ag ain be de ri ved us in g two SPST
switches as in Fig . 4.2(b). An ex amp le is given in Fig . 4. 11. This conve rte r ope rates fro m pos it ive and
nega tiv e de s uppli es, and can produ ce an ac outpu t volta ge v(t) h aving eit her polar ity . Tran sistor Q 2 is
t
dri ven wit h the co mp lemen t of the Q 1 drive signal , so tha t Q 1 conduc ts du ri ng the first sub in te rval
0 < t < DT_,., and Q2 co ndu cts dur ing the second sub in terva l DT, < t < T,.
It ca n be seen from Fig. 4.11 that the sw itches mu st block volta ge 2 V8 • It is requi red that V~ be
pos itive ; othe rwise, diodes D 1 and D 2 wi ll cond uct si mult aneo usly , sho rtin g out the source.
It can be show n via indu cto r volt -seco nd balance that
(4 .1)
This equa tion is plot ted in Fig. 4.12 . The co nverter output volt ag e v0 is positi ve fo r D > 0.5, and ne ga tiv e
for D < 0.5. By si nu soid al va riatio n of the duty cycle ,

4.1 Switch Applications 69
jA
DI VA
Vig. 4.11 Inverter circuit
using two-quadr ant switches. L il
+ +
ww D2 VB
C R VO
w.E io
-
asy D{I) ee0 .5 + D.. sin (WI) (4.2)
En
wi th D,,.being a constant less that 0.5, the o utpu t vol tage beco mes sinusoida l. Hence th is converte r co uld
be used as a dc- ac in verter.
rent il'
gin
The load curre nt is given by vJR; in equ ilib r ium, this current coi ncides wi th the inductor cur -
1.1
·
lR
= -Vo aa ( 2D - l -V,
R
eer (4 .3)
ing
The switches mu st co nduc t th is current. So the sw itch current is also positive when D > 0.5, a nd negative
when D < 0.5. With high -frequency dut y cyc le va riations , th e L- C fil ter may intro du ce a phase lag into
th e induc tor curren t waveform, but it is nonetheless true th at swi tc h currents of both polar ities occur. So
.ne
the swi tch must operate in two quadrants of the plane, as illustrated in Fig. 4. 13. W hen it. is posit ive, Q 1
and D 2 a lternately co nduct. When i 1. is ne ga ti ve, Q2 and D 1 alternately co nduct.
t
A well-kn ow n dc -3¢ac inverter ci rcuit , the voltage-source inverter (VS[), opera tes in a simi lar
manner. As illustra ted in Fig. 4. 14 , th e VSI co ntai ns three two -quadrant SPOT sw itches, one per phase.
The se switches block the de in pu t vo ltage V8 , a nd must conduct the output ac phase currents i,,. ib, and i,..
Fig. 4.12 Outplll voltage vs. duty cycle, for the

inverter of Fig. 4. 11. This converte r can prod uce Vg
both positive and negative output voltuge s.
D

70 Switch Realizalion
Switch
on SL:lt
e
current
Fig. 4..13 The swi tches i n the inverter of Fig. 4.11 musl be
capable of conducting bot l1 positive and 11c
gativc c.:urrcnt, but
need block only posi rive voltage .
· Switch
orr state
voltage
ww
w.E
asy
+
En
gin
Fig. 4.14 The dc-3121
eer
ac voltage-source inve,t er requires two-quadrant switclie s.
res pec tively .
ing
Another curre nt-b id irect io nal two -qua dran t swi tc h exa mp le is the b id irec ti onal batte ry
.ne
char ger/ di sc harger illustrated in Fig. 4. 15. Th is co nverter can be used, for exa mp le , to interface a batter y
to the main powe r bus of a spacec raft. Both the de bu s voltage v 1m., and the batt ery vol tage vbm t are always
positive. The sem iconductor sw itch elements bloc k positive voltage v1,,,-". Wh en the batte ry is bein g
cha rged , iL is posi tive, and Q 1 and LJ2 a lte rn ately con duct current. When the bat tery is be ing d ischar ged ,
i1.,is nega tive, and Q2 and D 1 alterna te ly co nd uc t. A lthough this is a de- de co nverter , it req ui res two -
q uadra nt sw itc hes beca use the powe r can flow in either di rectio n. t
Spacecraft
main power bus
Fig. 4.15 Bidirectional battery charger/disch aq;er, based on the de-de buck converter .

4. 1 Switch Applications 71
wi1 h
on late
current
Fig. 4.16 Voltage-bidi rection al two -quadrant switch
prope11ies.
Swhch
off I IC
ww
,oh ge
w.E (a) (b)
asy
flg. 4.17 A voltage.bidirectinnal 1wo-qumJ.
ram SPST switch: (a) implementation using a
+ on
En
transi., tor and series diode, (b) i<l<!alizedswitch
V V
charac teri stics.
off off
gin (diode
blocksvoltage)
(transistor
blocksvoltage)
eer
4.1.3 Voltage-Bid.irectionaJ Two-Qu adrant Switches
ing
.ne
A not her type of two -quadrant sw itc h , having the vo ltage -bi d irect ional pro perties ill ustra ted in Fig. 4 .16,
is sometimes req uire d . In app lications where the sw itches must block both posi tive and negat ive vol t-
t
ages, bu t condu ct o nly pos itive curre nt, an SPST switch can be co nstruc ted usin g a series -co nnected tran -
sistor and diode as in Fig. 4. 17. W hen it is int ende d that th e sw itch be in the off sta te, the controller turns
th e tra nsisto r off . Th e dio de th en b locks negat ive voltage, and the tra n sistor bloc ks pos itive vol tage. The
series co nnec tion ca n block nega tive voltages up to the d.iode vol tage ra ting, and posi tive vo ltages up to
the transis tor vo ltage ra ti ng . TI1e silicon -co ntro lled rectifier is anot her exa m ple of a voltage -bid irect iona l
t wo -q uadrant switc h .
A converte r tha t req uires th is type of two -qu adran t swit ch is the dc-3~ac buck -boost inverter
show n in Fig. 4.18 [4]. If the converte r funct ions in inverter mode, so th at the induc tor curre nt i1_(1) is
always pos itive, then all sw itches co ndu ct o nl y positi ve curre nt. Bu t the sw itches mus t block the outp ut
ac li ne -to -li ne vol tages, wh ich are somet imes pos itive an d somet imes negative. Hence vo ltage -bidi rec -
tio nal two- q ua dra nt sw itches are require d .

il li>a
+
v 0 i t)
$,,
+
\ibc(I)
ww
4>
<
Fig. 4.18 Dc-3.iac bud-boos t inv~t'lcr.
4.1.4
w.E
Four-Quadrant Switches
asy
The most genera l type of sw itch is the four -quadrant swi tch, wiich
En
Oil S IC
capa ble of cond ucti ng curr ents of either polar ity and block - curren t
ing voltages of eith er polarity, as in Fig. 4.19. There are sev -
eral ways of co nstructing a four -quad rant sw itch. As
quadrant sw itches desc ribed in Section 4 .1.2 can be con -

nected back -to -back . The trans istors are dr iven on and off gin
illus tra ted in Fig . 4.20( b), two curren t-bidirec tiona l two -
simu ltaneously. Another approach is th e anti parall e l connec -

tio n of two voltage -bidirectio na l two -quad ran t sw itches
eer heh
ofT$llll .C
voltage
ing
described in Section 4.1.3, as in Fig . 4.20(a). A th ird
approach , using only one tran sistor but addi tiona l diodes, is
given in Fig. 4.20(c) .
Cycloconve rt ers are a class of converters requiring
.ne
four -quadran t sw itches. For example, a 3~ac-to-3!')aCmatrix

conver ter is illu strated in Fig. 4.21. Each of the nine SPST Fig. 4. 19 A fou r-qu adrant swi tc h can co n-
switc hes is rea lized using one of the semicon ductor networks du ct e ithe r polur ity of c urrelll , a nd c an hlo ck
of Fig. 4.20. With proper control of the switches , th is con - either po la rity of vo ltage.
verter can produce a three -phase output of variable fre - t
(a) (b) (c)

Fig. 4,20 Three ways of

imp lementing a four-q uadran t + + +
SPST switch.
\I V V
0 0

4. J SwitchApplicatiom 73
3~ac input 3¢ac output
ww
w.E
Fig. 4.21 A 310a<:-3i,!ac
1T1at
rix converter, whit:h requires nine SPST four-4uadn.mt switches.
qu ency and voltage , from a give n thr ee -ph ase ac input. Note tha t there are no de sig nals in this converter :
all of the inp u t and output voltages and currents are ac, and hence four -quadra nt switches are necessary.
4.1.5 asy
Synchronous Rectifiers
En
The ab ilit y of the MOSFET ch ann e l to conduc t curren t in the reverse directio n makes it poss ible to
gin
empl oy a MOSFET where a diode wou ld otherwise be requ ired . When the MOSFET is connec ted as in
Fig. 4.22(a) [note that the sou rce and d rain con nect ions are reve rsed from the connect ions of Fig. 4.6(a) ],
the characteris tics of Fig. 4.22(b) are ob tained . The dev ice can now block negat ive vol tage and cond uct
eer
pos itive curren t, wit h proper ties simil ar to those of the d iode in Fig . 4.4. The MOS FET mus t be co n-
trolled such that it operates in the on state when the diode would norm all y conduc t, and in the off state
when the diode would be reverse -biased.
ing
Thu s, we could replace the diode in the buc k co nver ter of Fig. 4.8 with a MOSFET, as in Fig.
4 .23. The BJT has also been replaced wi th a MOSFET in the figure . MOSFET Q1 is driven wi th the com -
pleme nt of the Q 1 con tro l sig nal .
.ne
The trend in compute r power supplies is reduction of ou tput voltage levels, from 5 V to 3.3 V
and lower. As the out put voltage is red uced, the diode cond ucti on loss increase s; in conse q uence , the
diode co ndu ction loss is eas ily the larges t source of power loss in a 3.3 V power supp ly. Unfo rt unat e ly,
the diod e ju nctio n con tact potential lim its w hat can be don e to redu ce the forwar d voltage drop of diodes .
Schott ky diodes hav in g reduced jun ction pote ntial can be employed; noneth e less, low -vo ltage power t
(n) (b)
Fig. 4.22 Power MOSr~T connet:te<lilS on

(reverse conductioo)
a synchronou., rectifier, (a), and ils ideal-
+
ized switch characte ristics, (b). V
V
0 on

74 Switch Ret1liwtion
;,. VA L il(t)
+
QI
vg ;r~ VB
+
Q2 io
Fig. 4.23 13uckconv~ncr, imp lcrnc1Hcd using n ,yncl11·011ou

.~ rcc1ific r.
ww
suppli es co nta inin g diodes that co nduct the o ut pu t cu rr ent mus t ha ve low efficie n cy .
A solution is to replace the diodes with MOSFETs opera ted as synchronous rectifie r s. The con -
w.E
duction loss of a MOSFET havi ng on -resi stance R""an d operated with rms curren t is l,m,• is 1,,,./R,,,
The on-res istance can be decreased by use of a large r MOSFET. So the co ndu ct ion loss can be reduced
,.
as low as desired, if one is willing to pay for a suffic ie nt ly large device. Synchronou s rect ifie rs find wide -
asy
spread use in low -vo ltage power suppli es .
4.2 A BRIEF SURVEY OF POWER SEMICONDUCTOR DEVICES
En
The most fundamen tal cha llenge in power sem ico nd uctor des ign is ob ta in ing a h igh brea kdown vo lta ge ,
gin
while maintaining low forwa rd voltage drop and on-resistance . A close ly related issue is the lo nger
switching times of high-voltage low-o n-res istance devices . The tradeoff between brea kdown voltage,
on -resi stance , and switch ing times is a key d is ting ui shi ng fea tur e of the vario us power de vices.
eer
The brea kdow n voltage of a reverse -biased p- n ju nc ti on and its associated deple tio n reg ion is a
fun ctio n of do pin g level: ob ta in ing a high breakdown vo ltage requ ires low dopin g conce nt ra tion , and
ing
hence hi gh resis ti vity , in the material on at least one side of the junction. Th is hi gh-re sist ivity reg ion is
usually the dominant cont ributo r to th e on-resistance of the device , and hence hi gh-vo ltage dev ices mus t
have higher on-resistance th an low -voltage devices. In majority carrier devices , inclu din g the MOSFET
.ne
a nd Schottky d iode, this accounts for the first -or der depe ndence of on-resistance on rated voltage. How -
ever, minority carrier devices , in c lud in g the diffused -j un ction p- 11diode , the bipo la r junc t io n transistor
(BJT) , the insulated -gate bip olar tra nsistor (IGBT) , and the thyr isto r fami ly (SCR, GTO, MCT), exh ibit
a nothe r phenomenon known as conductivity 11wd11larion. When a minority -carrie r device operates in the
on state, minority carrie rs are injected into the li ghtly doped h igh -resistiv it y regio n by the forward -biased
p- 11ju nction. The res ulti ng high concentration of minority ca rr iers effectively reduces the ap parent resis-
tivit y of the region , red ucin g the on -resista nce of the device. Hence , minority -carrier dev ices ex hi bit
t
lowe r on-resistances than comparable majorit y- carrier devices .

However , the advantage of decreased on-resistance in minority -carrier devices comes with the
disadvanta ge of decreased sw itchi ng speed. The con du ctin g stat e of any semicondu ctor device is con -
troll ed by the presence or abse nce of key charge quantitie s wi t hin the device , and the turn - on and turn -off
switchi ng times are eq ual to the times req uired to insert or remove this controlling charge. Devices oper -
ating with conductivity modulation are control led by their injected minority carr iers. The total amount of
controlli ng min ori ty charge in minority -ca rr ier dev ices is much grea ter than the cha rge required to co n-
trol an eq u ivale nt majori ty-ca rri er dev ice. Altho u g h the mechani sms for inserting and rem o ving the co n-
trolling cha rge of the various device s can differ, it is nonethele ss tru e tha t, becau se of their large a mounts
o f minority char ge, minorit y-carrier devices exh ibit switchin g times that are si g nifica nt ly longer than
th ose of major ity -ca rrier devices . In con seq uence, majority -ca rrier dev ices find appli cation at lower vo lt-

4.2 A Brief Survey of Power Semico11d11

ctor De1•ices 75
age leve ls an d higher sw itch in g frequenc ies , while the reverse is true of m ino rit y -ca rri er dev ices.
Mode rn powe r dev ices are fabr icated u sin g up -to -da te process ing tech ni ques. The resulting
sma ll fea ture size allows const ru ction of h ighly in terdig ita ted de vices, whose unwan ted parasit ic ele -
me nts are less significant. The resulti ng devices are more rug ge d and well-be have d th an their predeces -
sors.
A detailed descri ption of power se mico nduc tor device ph ys ics and sw itc hin g mechanis m s is
beyond th e scope of thi s boo k. Selected refere nces on power se mi conduc tor devices are listed in the ref -
erence sec tion [9- 19].
ww
4.2.1 Power Diodes
w.E
As di scussed above, th e d iffused -j unc tion p- 11di ode co n ta in s a li gh t Iy doped or i ntri ns ic h igh- res istiv it y
regio n, which a llows a high breakdown voltage to be obt ain ed. As illu strated in Fig. 4.24(a ), this reg ion
comp rises one side of the p-11-j unction (denote d 1i-); under reve rse-biased co ndi ti ons, essentia lly all of
the app lied voltage appears across the dep leti o n region ins ide the n- reg ion. On -state con di tio ns are illus -
asy
trated in Fi~. 4.24 (b). Ho les are injecte d across th e forward -b iase d ju nc tio n , and become m inority ca rr i-
ers in the n region. These m in orit y carr iers effectively redu ce th e apparent resis ti vi ty of the ,c regio n via
conductivity modu latio n . Esse nti ally all of the forwa rd current i(t) is com prised of ho les tha t diffuse
En
across the p- n region , and then recom bine with electrons fro m th en regio n.
T yp ical swi tch in g waveforms are illustrated in Fig. 4.25. The fami li ar ex po nent ia l i- vc harac ter-
(a)
~-----------C gin V
l +- -----------
eer
low dopingcone ntralion
0
p
0
11-
ing 0
II
0
.ne
E
0
V + 0
Fig. 4.24 Power diode: (a) under
reverse-bia., cuncti1ions, (b) under
forwa rd-bias condilions. (b)
Depletion r gio11,revtrse -biased
V
t
~-----------+ 1-- -----------.

ondu tivity modula1io11
p n
0 0 0
0 0 0
0 0
0
Minority carrier injection

76 Switch Realimt ion
11(1)
Fig. 4.25 Diode voltage and

current wnvcforms. Interval (l ):
off state. Interval (2): turn-on
ww
transit.ion. Interval (3): on state. i(t)
Intervals (4) and (5): turn-off
transition. Interval (6): off state. 0
w.E
asy ( t) (2) (3) (6)
En
ist ic of the p - 11 diode is an equ il ibri um re lat ion. Durin g tran sie nts , s ig n ifica nt dev iat ions from th e expo -
gin
nential character istic are obse rved ; these deviations are associated w ith changes in the stored m inor ity
cha rge. As illu stra ted in Fig. 4.25 , the diode operates in the off state duri ng interval (1), wi th zero c urre nt
and nega tive vo ltage . At the beginni ng of interva l (2), th e curre nt increases to some posi tive value . T hi s
eer
cu rr ent charges the effect ive capac ita nce of the reve rse-bia sed diode , su pply in g charge to th e dep letio n
region and increasing the vo ltage v(t). Eventua lly, the voltage beco mes pos itive, and the diode j un ct ion
becomes fo rwar d-b iased. The voltage may rise to a peak value of seve ral vo lts, or even seve ral tens of
ing
vol ts, re flect in g the so mewhat large resis tance of the li gh tl y doped 11- reg ion . The forward -bi ase d p-11
jun ction con ti nues to inject m in orit y charge into the n- reg ion. As th e total m inority charge in the n-
regio n increases, co ndu ct iv it y modulat ion of the n- regio n causes its effect ive resista nce to decrease , and
he nce the forward vol tage dro p v(t) also decrea~es. Eve ntually , the d iode reaches e q ui lib r ium, in wh ic h
.ne
the minori ty carr ier injec tion rate and reco mbin at ion rate are equa l. Du ring interva l (3), the d.io de oper -
ates in th e o n sta te, w it h forward vo ltage dro p given by th e diode stat ic i- v cha rac ter ist ic.
Th e turn -off trans ie nt is ini tia ted at the beginning of int erva l (4) . Th e dio de remai ns fo rward-
biased wh ile m inor it y cha rge is prese nt in the vic init y o f the d iode p-n· j unc tio n. Redu ction of the stored
min ority cha rge can be accomp lished eit he r by active means, via nega ti ve te rmin al current, or by pa ssive
means, via reco mb inat ion. Normally, both mec hani sms occur simultaneo usly. The charge Q, con tai ned
t
in the negat ive portion of the di ode turn -off curr e nt wavefo rm is ca lle d th e recovered charge. The portion
of Q, occurring du ri ng int erval (4) is ac tively -remove d m inority charge. At the end of interv al (4), the
store d minority c harge in the vic ini ty ofthe p - n- jun c ti on has been removed, suc h tha t thed .iodejun c t io n
becomes reverse -bi ased and is ab le to block negat ive vo ltage . The dep let ion reg io n effect ive ca pac it ance
is then charg ed du ri ng int erva l (5) to th e negat ive off -sta te voltage. Th e port ion of Q, occurri ng d ur ing
interva l (5) is charge supp lied to the dep letion reg ion, as well as minority charge tha t is act ive ly removed
from remote areas of the d.iode. At the e nd of inte rval (5), the diode is able to block the enti re app lied
reverse vol tage. The le ngth of inte rvals (4) an d (5) is called th e reverse recovery time t, . Dur in g interval
(6), the diode opera tes in the off state. The diode turn -off transit ion, and its influence on sw itching loss in
a PWM converter, is discussed furth er in Sec tion 4 .3.2.

4.2 A Brief Survey of Power Semicot1d11

ctor Devices 77
Table4 .I Characteristics orseveral commerd al power rectifier diodes
Rated maximum Rated average

Part number VF(typical) t, (max)
voltage current
Fast recovery rectifiers
1N3913 400 V 30 A 1.1 V 400 ns
SD453N25S20PC 2500 V 400 A 2.2 V 3 µs
Ultra-fast recovery rectifiers
MUR815 150 V SA 0.975 V 35 ns
ww
MUR1560 600 V 15A 1.2 V 60 ns
RHRUIOOJ20 1200V JOOA 2.6 V 60 ns
Schonky rectifiers
w.E
MBR6030L 30 V 60A 0.48 V
444CNQ045 45 V 440 A 0.69 V
30CPQJ50 150V 30A 1.19V
asy
Diodes are rated according to the length of the ir reverse recovery time t,.. Standard recovery rec-
tifiers are intended for 50 Hz or 60 Hz ope ration; reverse recovery tim es of these devices are usually not
specified. Fast recovery rectifiers and ultrafast recove1y rectifiers are intended for use in converte r appli-
En
cations. The reverse recovery time r,, and sometimes al.so the recovered charge Qr, are specified by man-
ufact ure rs of these devices. Rati ngs of severa l com merc ial dev ices are listed in Table 4.1.
gin
Schottky diodes are esse ntia lly majority -car rier devices whose operat ion is based on the rectify -
ing charac teristic of a me tal-semicond uctor j un ctio n . These dev ices exhibi t negl igible minor ity stored
charge, and their sw itching behav ior can be adequately modeled simp ly by their deple tion -reg ion capac -
eer
itance and eq uili b ri um expone ntial i- v characteris tic. Hence, an advantage of the Scho ttky diode is its
fast sw itch ing speed. An even more important advantage of Schottky diodes is their low forward voltage
drops, especiall y in dev ices rated 45 V or less. Schot tky diodes are restricted to low brea kdown voltages;
ing
very few commercial devices are rated to block 100 V or more. The ir off -state reverse curre nts are co n-
siderably higher than those of p- n ju nction diodes . Characteristics of several commercia l Schottky recti-
.ne
fiers are al.so listed in T able 4. 1.
Anothe r impor tant characterist ic of a powe r sem ico nducto r dev ice is whether its on-res istance
and forwar d voltage drop ex hib it a pos itive tempera ture coeffic ient. Such devices, includi ng the MOS-
FET and IGBT, are advantageo us beca use multiple chips can be eas ily para lleled, to obtai n high-c urr ent
modules. These devices also tend to be more rugged and less susce ptible to hot-spot forma tion and sec-
ond-breakdown problems. Diodes can not be eas ily connected in paralle l, beca use of their negative tem-
pera ture coeffic ients: an imba lance in device characteris tics may cause one diode to conduc t more
t
curr ent than the others. Th is diode beco mes hotter, whic h causes it to conduct eve n more of the total cw·-
rent. In consequence, the current does not div ide even ly betwee n the paralle led devices, and the c urre nt
rating of one of the devices may be exceeded . Since BJTs and thyris tor s are co ntrolled by a diode ju nc-
tion, these devices a.lso exhibit negat ive tem perature coef ficien ts and have simi lar problems when oper-
ated in paralle l. Of course, it is possi ble to parallel any type of semicond uctor dev ice; however, use of
matched devices, a commo n thermal substrate, and/or exte rnal circuitry may be required to cause the on-
state currents of the dev ices to be equ al.

78 Switch Realiwtio 11
l<'ig. 4.26 Cross-section of DMOS 11-channel

power MOSFET structure. Crn~shatched regions
are metallized contacts. Shaded regions are insu-
lating silicon dioxide layers.
ww .,,,,,,,,,,,,,,r:~:,,,,,,,,,,,n
w.E
4.2.2
asy
Metal Oxide Semiconductor Field-Effect Transistor (MOSFE1)
En
The power MOSFET is a modern power sem iconductor devi ce hav in g gate le ngt hs close to one micron .
TI1e power device is comprised of many sm all paralle l-conne cted enhancement -mod e MOSFET cells ,
gin
which cover th e surface of the si licon di e. A cross -section of one cell is illustrated in Fig. 4.26. Current
flow s vertica lly throu gh the sili co n wa fer : the metalliz ed drai n co nnec tion is made on the bottom of the
chip, wh ile the met all ized source connect io n and po lysi lico n gate are on the top surface. Under norm a l
eer
operating condit ion s, in which v,1,. ;;: 0, both the p- n and p-1Cj un ct ion s are reverse -bia sed. Figure 4.27(a)
illu strates operation of the device in the off state. The applied drain -to-source volta ge then appears across
ing
the depletion region of thep -n- j un c tion . The ,,- region is lig ht ly doped , such that the des ired bre akdow n
voltage ratin g is attained. Figure 4.27(b) illu strat es operation in the on state , with a sufficie ntly large pos-
itive gate-to -source voltage. A channel then form s at the surface of thep region, und ern eath the gate. The
.ne
drain current flows thro ugh the 11- region, channel, n region, and out throu gh the source contact. The on-
res istance of the dev ice is the sum of th e res istances of the tr region , the cha nnel , the source and drain
contacts, etc. As the breakdown vo ltage is increa sed, the on-resista nce becomes d omi nat ed by the res is-
tance of the 11- region. Since the re are no mino rit y c arrie rs to ca use co nduc tiv it y modulation , th e on-
res istance increases rapidly as the breakdown voltage is increased to severa l hundre d volts and beyon d.
The p-n- j unction is called the /Jody diode; as illu strated in Fig. 4.27 (c) , this ju nct ion forms an
effective diode in para llel with the MOSFET channel. The body diode can become forward -biase d when
t
the drain-to -source voltage v,1.,(1) is negat ive . This diode is capab le of conduc tin g the full rated curren t of
the MOSFET. However, most MOSFETs are not optimized with respect to the speed of th e ir body
diod es, and the large pea k curr ent s that flow durin g the reverse recovery transit ion of the body diode can
ca use device fa ilure. Several manufacturers produce MOSFETs that conta in fas t recovery body diodes ;
these dev ices are rated to with stand the peak curr ents durin g the body diode rever se recovery tran s iti on.
Typic al 11-channe l MOSFET stat ic switch character istics are illust rated in Fig. 4.28. The dra in
cun-ent is plotted as a function of the gate-to-source voltage, for var ious values of drain-to-source volt -
age. When the gate-to-source volt age is less than the threshold voltage V,Jr• the dev ice operates in the off
state. A typ ical va lue of V11, is 3 V. When the gate-to-source vol tage is greater t han 6 or 7 V, the de vice
operates in the on state; typi ca lly, th e gate is driv en to 12 or 15 V to ensure minimi za t ion of the forward
voltage drop. In the on state, the drain-to-source voltage V05 is roughly proportio nal to the drai n c urr en t

4.2 A Brief Survey of Power Semico11d11ctor

De1,ices 79
(a)
Deple1io11
region
ww II
'222222222222221222222222222222
Drain
Fig, 4.27w.EOperation of the power

(b)
asy
MOSFF.T: {a) in lite off st:1te, v.,_,
appears across the deple tio n reg ion in
rhe 11- region; (b) current /low thmu_gh
En
the conducting chanucl in the un srntt;
(c) bndy diode due tu the p - 11-ju1Ktion. Chamrel
,,-
gin
(c)
eer
ing
.ne
,,-
t
"
'77777277777771fZZZZ27277722722
Drait1
I0 . The MOSFET is able to conduct peak currents well in excess of its average curre nt rating, and the
nature of the static charac teristics is unchanged at high current levels . Logic-leve l power MOSFETs are
also available , which operate in the on state with a gate- to-source voltage of 5 V. A few p-channel devices
can be obtained , but their properties are inferior to those of equi valent n-cha nne l devices.
The on-resis tance and forward voltage drop of the MOSFET have a positive temp erature coeffi -
c ient. This prope rty makes it re lati vely easy to parallel devices . High current MOSFET mod ules are
a vai !able, contain in g several paralle l-co nnect chips .
The major capacitances of th e MOSFET are illu strated in Fig. 4.29. This model is sufficie nt for

80 Switch Realizat ion
IOA
Fig. 4.28 Typical stut ic characteristics

o f a power MOSFE T, Drain current / u is
plotted vs. gute-to -source voltage V,;s, 5A
fo r various values of drain-to-source
ww
voltugc V05 .
off
state
w.E OA -1--A----' """":.-,:::

ov
...c...-------~-----~
5V IOV
+
15 V
asy
qua lita tive und ers tan d ing o f th e MOSFET swi tc hin g be hav ior ; more accurate mode ls account for th e
pa ras itic jun c ti o n fie ld -e ffec t trans istor inh eren t in the DMOS geo metry. Sw it c h ing times of the MOS -
En
FET are dete rmin ed essentially by the ti mes re qui red for th e gate driver to charge these c apacitances.
Sin ce the dra in current is a function of th e gate -to-somce vol tage, th e ra te at w hi ch the dr ain c u rre nt
gin
changes is depende nt on the rate at which th e ga te-to-somce ca pac ita nce is charged by the gate d rive cir -
cuit. Likew ise , th e rate at whic h th e dra in vo ltage changes is a fu nc t ion of the ra te at whi c h the ga te -to-
dra in capac itance is ch arg ed. The drain -to -source capacita nce leads d ir ectly to sw it ching loss in PWM
eer
conve11ers, since the energy stored in this c apac itance is lost durin g th e trans istor turn - on trans ition.
Switching loss is discussed in Section 4.3.
The gate -to-so urce ca pa c itance is essentially linear. Howe ver , th e dra in -to -so urce and ga te -to-
ing
d ra in ca pac itances are stro ng ly no nl inear : these inc re menta l capacita nces vary as th e inverse squa re root
of the appli ed ca pac itor voltage . For exa mp le, the dep en den ce of the incremental dra i n-to-so ur ce capac i-
tance ca n be wr itt e n in th e form
.ne
(4,4 )
where C0 an d V0 are co nsta nts that depe nd on the construction of the device. Th ese capac itances can eas -
ily vary by severa l orders of ma g nitude as v,1.,, var ies over its norm al operating range . For vd ,· ;;,,- V0 , Eq.
t
Fig. 4.29 MOSPET equivalent (;ircui1 which accounts for the body
diode and effective termi11a\capacitances. eds

4.2 A Brief Swvey of Power Se111ico11ductor

De,•ices 81
Table 4.2 Characteristics of several commercial 11-channel power MOSFETs
Ratedmaximum Ratedaverage
Partnumber R,,,. Q1 (typical)
voltage current
IRFZ48 60V 50A 0.oJ8Q ll0nC
IRF510 l 00 V 5.6A 0.54Q 8.3 nC
IRF.540 lOOY 28A 0.077!l 72nC
APTIOM25BNR lOOY 15A 0.025!l 171 nC
IRF740 400V IOA 0.55Q 63 nC
ww MTM15N40E
APT5025BN
APT1001RBNR
400V
SOOY
IOOOV
15A
23A
llA
0.30
0.25Q
l.0O
l!0nC
83nC
150nC
w.E
(4.4) can be approximated as
asy (4.5)
En
These expressio ns are used in Section 4.3.3 to de termin e the switc hin g loss due to energy stored in Cd,·'
Characteristics of several commercially avai lable power MOSFETs are listed in Table 4.2. The
gin
gate char ge Qg is the charge that the gate dri ve c ircuit mu st supply to the MOSFET to raise the gate volt-
age from zero to some specifie d value (typic ally 10 V), with a specifie d value of off state drain -to-source
voltage (typica lly 80% of the rated Vvs) - The tota l gate charge is the sum of the charges on the gate-to-
a nd sw itching speed of the MOSFET.

eer
drain and the gate-to-source cap acitance . The total gate char ge is to some ex te nt a measure of the size
Unli ke other power devices, MOSFET s are us ua lly not selected on the basis of their rated aver-
FETs typically operate at average c urrent s some what less than the rated val ue .
ing
age cu1Tent. Rath er , on-res ista nce and its influ e nce on co nduc tion loss are the limiting factors , and MOS-
MOSFETs are usually the device of choice at voltages less than or equa l to approxi mate ly 400
.ne
to 500 V. At these voltages, the forward vol tage drop is co mpetiti ve or super ior to the forward voltage
drops ofminority -ca rrierd evices, and th e switchi ng speed is sig nifica ntly faster. Typi ca l switch ing times
t
are in the range 50 ns to 200 ns. At voltages greater than 400 to 500 V, minor ity -car rier devices havin g
lowe r for ward voltage drops , suc h as the JGBT, are usua ll y preferred . The only exception is in applica-
tio ns where the high sw itch ing speed overr ides the increased cost of silico n required to obtain acceptably
low conduction loss.
4.2.3 Bipolar Junction Transistor (BJT)
A cross -section of an NP power BJT is illustrated in Fig. 4.30. As with other power dev ices,
current flow s vertically through th e sil ico n wafer. A lightly doped n- region is inserted in the collector , to
obtain the desired voltage breakdown rat ing. The transistor operates in the off state (cutoff ) when thep - n
base -emitter j unction and the p- n- base-collector ju ncti on are reverse -biased; the applied collecto r-to-
emitt er voltage the n appears essentia lly across the dep let ion region of the p - 1Cjunc tion. l11e trans istor
operates in the on stale (satura tion) when both j unc tion s are forward -biased ; substantial minority char ge
is then presen t in the p and n- regions. Th is min ori ty char ge causes the n- region to exhibit a low on-

l n
Fig. 4.30 Power BJT structure. Crosshatched

regionsnre mcrallizcdcontaccs.
ww '22222222222222/222222222222222
I
w.E
Collector
resistance via the co nduct ivity mo dul ation effect. Between the off state and the on state is the famil iar
act ive region , in wh ich the p- 11ba se-em itter ju nct ion is forwar d-biased an d the p-n - base-co llec tor j unc -
asy
tion is reverse-biased. Wh en the BJT operates in the act ive reg ion , the collec tor cu rrent is propor tional to
the base region m inor it y charge, which in turn is pro port iona l (in eq u ilibr ium) to the base current. There
is in addi tion a four th region of operatio n known as quasi -saturati on, occurr ing between the act ive and
En
sat uration reg ions. Qua si-sat ura tion occurs when the base curren t is insuffic ien t to fu lly satur ate th e
device; hence , the minority cha rge present in th e 11- regio n is insuff icie nt to fu ll y reduce the 11- regio n
gin
res istance , and high trans istor on-resistance is observed.
Cons ider the simpl e switchi ng circuit of Fig . 4.3 1. Fig- Vcc
ure 4.32 conta ins waveforms illu strating the BJT turn -on and
eer
turn -off transi ti ons. The transis tor operates in the off state du r-
ing interval (I ), with the base -emi tter ju nc ti on reve rse-biased by
the source voltage v,.(t) = - V, 1• The turn -on transition is init iated
at the beg inning of interval (2), whe n the source vo ltage changes
to v_,.(t) = + V,2. Pos itive current is then supp lied by source v_,to
the ba~e of the BJT. Thi s current first charges the capac itances of ing +
the dep letion reg ions of the reve rse-biased base -emitter and +
.ne
base -collector Jtm c ti ons. At the end o f interval (2), th e base-

em itter voltage exceeds zero suff icien tly for the base -emi tter v,(t)
jun ction to beco me forwar d-biase d. The length of interva l (2) is
ca lled the tum -on delay time. Dur ing inte rval (3), m inorit y
charge is injected across the base -emi tter j uncti on from the
t
em itter into the base reg ion; the collector current is proport io nal Fig. 4.31 Circu it for BJT switch ing
to this minority base charge . Hence du ring in te rval (3) , the co l- time example.
lector current increases. Since the trans istor dri ves a resistive
load R1_, the co llec tor voltage also decreases durin g interva l (3). Th is ca uses the volta ge to reduce across
the reverse -biased base -coLlector deple tion reg ion (Miller ) capac itan ce. Increasing the base curr ent / 8 t
(by red uci ng R8 or inc reasi ng V:,!) increases the rate of change of bo th the base reg ion minority charge
an d the charge in the M iller ca paci tance . Hence, increased lm leads to a decreased turn -o n switch in g
tim e.
Nea r or at the end of interva l (3), the base -co llector p-n - jun ction becomes forwa rd-biase d .
Minority ca rr iers are then injected into the n reg ion, reduc ing its effec ti ve res isti vity. Dep endin g on the
device ge ometry and the magn itude of the base curr en t, a voltage tail [interval (4)) may be observe d as

4.2 A Brie/S urvey of PowerSe111ico11d

11
clor Devices 83
v,(t}
-V,.,
ww 0.7 V
si ;'
w.E
asy J I
0
En
gin
eer
d i ing.
n
0
Io,.
™
ill !I
! e t
'
b>i (3) i cs)
( 1) (4) (5) i(6) : (7) (9)
Fig. 4.32 BIT turn-on and turn-off transiti on waveforms.
the appa rent res istance of the n- reg ion decre,L~es via conduct ivity modulatio n. The BJT reaches on-state
equil ibr ium at the beginn ing of inte rva l (5), with low on -resistance and with substant ial minority charge
pre sent in bot h the '1- and p regions. Th is min or ity charge signific an tly exceeds the amount necessary to
support the activ e reg ion co nduction of the collec tor curren t / 0 ,,,; its magnitude is a function of
lm - le,,,/~ . where 0 is the active -reg ion current gain .
The turn -off process is ini ti ate d at the beginn ing of int erval (6), when the source voltage
cha nges to v_,(I) = - V,.1• The base-em itter j unct ion re mains forw ard -biased as long as minority carriers
are prese nt in its vic in ity . Also , the co llector current co ntinues to be ic(l) = l c01, as long as the minority

Fig. 4.33 Ideal base current waveform for minimi-
:u
zation of switching lime~. 0
ww
charge exceeds the amou nt necessary to support the act ive regio n co nd uc ti on of l e,,,.• that is, as lo ng as
excess charge is prese nt. So dur in g inte rva .l (6), a negative base curr ent flows equ al to
-! 112 = (- V_,1 - v/j/Jt) )!Rn- Th is neg ative base curre nt active ly re moves the tota l stored m inori t y charge .
Reco mbi nati on fur ther red uces th e stored m in ori ty cha rge . Int erva l (6) e nds when all o f th e excess
w.E
m inorit y char ge has bee n remove d . Th e le ngth o f interva l (6) is calle d the storage time. Duri ng int erva l
(7), the tran sistor operates in the active region. Th e collector cu rr e nt ic,{f) is now propo rt io nal to the
stored m inority charge. Reco mb in atio n and the negat ive base curre nt co ntin ue to reduce the m ino rit y
asy
base charge, and hence th e collecto r decre ases . In additio n , the co llecto r voltage increases, and he nce the
base curren t must charge the M iller ca p aci tance. At th e end of interval (7), the mi nor it y stored charge is
equal to zero, and the base -e mitt er j unct ion can become reverse-biased. Th e length of in terval (7) is
En
called the turn -off time or fa ll rime. During interval (8), the reverse -bi ased base -em itter ju nction capaci-
tance is discharged to vo ltage - V,1• Duri ng inte rva l (9), the trans istor opera tes in equ il ibr iu m , in th e off
state.
gin
It is possi ble to turn th e tra nsistor off us ing Iu2 = O; for exa mp le , we cou ld let V,1 be app rox i-
mate ly zero. However, thi s leads to ve ry lon g storage and turn -off sw it ch i ng times . If Im = 0, th e n a ll of
eer
the stored minori ty charge mu st be re move d pass ively, via recombinatio n. Fro m th e standpoint of min i-
m izing sw itchi ng times, the base curre nt wavefo rm of Fig. 4.33 is ide al. The in it ia l base c urre nt lm is
large in m agn itud e, such tha t char ge is in serted qui c kly into the base, and th e tu rn -on switchi ng tim es are
short. A co mpro m ise va lue of e qu ilibriu m on sta te curr e nt IJJ
ing
011 is chose n, to yie ld a reasonab ly low col-
lecto r-to-e mitter fo rward vo ltage drop , whi le m ai nt a in in g modera te amount s of excess stored m inori ty
charge and hence kee ping the sto rage time reaso nab ly short. The current - / 82 is large in mag nitud e, such
.ne
th at cha rge is removed qu ick ly from the base and hence th e storage and turn -off switch ing times are mi n -
imized.
Unfor tun ate ly , in most BJTs, th e magni tudes of lu 1 and / 8 2 must be limi te d beca use excess ive
val ues lea d to dev ice fai lu re. As ill ustrate d in Fig. 4.34, the base curre n t flows laterally thro ugh th e p
t
Fig. 4.34 A large 182 leads to focusin g of the

emitter current nwuy fmm the base con tm:ts, due
to the voltage induced by the lnlt:rul base region
current.
Collector

4.2 A Brief Survey of Power Semico11du

ctor Device.1 85
regio n. This cu rr ent leads to a voltage dro p in the res ista nce of the p material, which influe nces the vo lt-
age across the base -em itter junction . Durin g the turn -off trans iti on , the base current -Im causes the base-
e mitter jun c ti on voltage to be greate r in the cente r of the base region, and smaller at the edges near th e
ba se contac ts. This causes the co llector cuJTent to focus near the center of the base region. In a sim ila r
fashio n , a large 1111ca uses the co llector curren t to crowd near the edges of the base region durin g the
turn -on transi ti on. Since the co llec tor -to-emitter voltage and collector curren t are si mult ane ously large
during th e sw itchi ng trans itions, sub sta n tia l power loss can be associate d wit h curren t focus ing. Hence
hot spots are ind uced at the ce nter or edge of the base region. The pos itive tem pera tur e coefficie nt of th e
base -em itter junction cur rent (correspon ding to a negative tempe ratur e coefficie nt o f the junct ion volt-
age ) can then lead to therm al run away and dev ice failure. Thus, to obtain reliab le operat ion, it may be
ww
necessary to limi t the m agn itudes of /~ 1 and 182 • It may also be nece.ssary to add ex terna l snubber net -
works which the reduce the in stan ta neous trans isto r power diss ipat ion dur in g the switch ing trans it io ns.
Steady -sta le characte ristics of th e BJT are illustrate d in Fig. 4.35. ln Fig. 4.35(a ), the collec tor
w.E
c urre nt le is plo tted as a function of the base curren t 18 , for var ious values of collector -to-emitte r volta ge
Ver · Th e cutoff , active , quas i-satu ra ti on, and saturatio n reg ions are ident ifi ed. At a give n collec tor cur -
(a)
JOA
asy
En
SA gin
Sarurarionregion
~-- - ---- Ya:=O.SV
eer
------ -- - -- - Ya;=0.2 V
ing
.ne
OA SA IOA ISA
lg
(b)
IncreasingI8
t
BV,.., BVao
Fig. 4.35 BJT static charncteristics: (a) le vs. /0 , illustrn.tingtile regions of operation; (b) le vs. Yu ,, illustrating
vo [lage breakdown character i.~tics.

86 Switch Realiw tion
re nt l e, to opera te in the sat ura tion region wi t h minimum forwar d vo ltage drop , the base curre n t f11mu st
be suffic ientl y large . The slope dl (,Jd18 in the active regio n is the curre nt gain ~- It can be see n that 0
decreases at high curren t- near the rated current of the BIT, the current ga in decreases rapid ly an d hence
it is ditticult to fully sa tura te the device . Collecto r cwrent le is plo tted as a funct ion of collector -to -e mit-
ter voltage V0 : in Fig. 4 .35(b) , for various values of lw Th e breakdown voltages BV_,., _,, BVao • an d
BVC/w are illu strated. BVC/JOis the ava lanche br ea.kdown voltage o f the base -collector junc ti o n , with the
e mitte r ope n-ci rcui ted or with suffic iently nega tive basecu rr ent . B Vct:o is the somewhat sma ller collec -
tor -em itte r breakdown voltage observe d when the base curre nt is zero; as avalanche break dow n is
approac hed , free carr iers are create d th at have the same effect as a positive base current and that cause
th e break down voltage to be reduced. BVw,· is the break dow n volt age observed with positive base cur-
ww
rent. Because of the hig h instantaneous powe r diss ip a tion , breakdown usually resu lts in destruct ion of
th e BJT. In most app lications , the off state tra nsisto r voltage must not excee d BV<-t.O·
High -vo ltage BJTs ty pi cally h ave low current gam , and
w.E
hence Da rli ngton -co n nec ted devices (F ig. 4.36) are com mon. If tran -
sisto rs Q 1 and Q2 have curre nt ga ins 13 1 and 02, respec tive ly , th en the
Darli ngto n-connecte d device has the substantia lly increased current
gain l\ + /31 + /311:\
asy
2 • In a monol ith ic Da rli ngton dev ice , tra nsistor s Q 1
and Q2 are integra ted on the same si licon wa fer. Diode D 1 speeds up
the turn -off pro cess , by allowing the b,L~ed river to actively remo ve
En
the stored char ge of both Q1 and Q2 duri n g the turn -off transition.
At vo ltage levels below 500 V, the BJT has been almost
e nt irely replaced by the MOSFET in power applications. It is also Fig. 4.36 Darlington-conn ect!ld
utili ze faster IGBTs or ot her devices .

gin
being displaced in hi gher voltage appl icat ions, where new desig ns BJTs, induding diode fur improve,
mcnt of turn-off times.
4.2.4 Insulated Gate Bipolar Transistor (IGBT)

eer
ing
A cross -section of th e IGBT is illust ra ted in Fig. 4.37. Comparison with Fig. 4.26 reveals th at the IGBT
an d power MOSFET are very si mi la r in cons tru ction. Th e key difference is the p region co nnecte d to the
.ne
co llec tor of the IGBT . So the IGBT is a mode rn fo ur - layer power se mi co ndu ctor device havi ng a MOS
gate .
t
Fig, 4.37 fGllT structure. Crosshatched

regions are me ta llized co ntacts. Shad ed regions
are in,ufoting .silicon dioxi de ]aye rn.
Minority carrier
injection
p
'77772222272222/277222222222222
I Collector

4.2 A Brief Survey of Power Semiconductor Devices 87
(a) (b)
C
Collector
Fig. 4.38 Tl,~ IGBT : (a) st:hematic
symbol. {b) equivalelll circuit.
G -1
Emitter
ww The function of the added p region is to inject minorit y charges into the ,c region while the
E
dev ice operates in the on state, as illu stra ted in Fig. 4.37. When the IGBT conducts , the p-l C ju nction is
w.E
forwar d-biased, and the minor ity cha rges injected into the ,c region cause conduc ti vity mo dulation. Thi s
reduces the on-resistance of the n- regio n, and allows high -voltage JGBTs to be constructed wh ich have
low forward voltage drops. As of 1999, IGBTs rated as low as 600 V and as high as 3300 V are read ily
asy
avai lab le. The forwar d voltage drops of these devices are t ypically 2 to 4 V, mu ch lower than wo uld be
obta ined in equ ivalen t MOSFETs of the same sili con area.
Several schemat ic symbo ls for the IGBT are in current use; the sym bol ill ust rated in Fig.
En
4.38(a) is the most popular . A two -transis tor equi valent circu it for the IGBT is illustra ted in Fig. 4.38(b ).
The IGBT function s effectively as an n-channel power MOSFET, cascaded by a PNP emitte r-fo llowe r
gin
BIT. The phys ical locat ions of the two effect ive dev ices are illu strate d in Fig. 4.39. It can be seen that
there are two effective currents: the effec tive MOSFET c hannel cu rrent i I' and the effec tive PNP collec-
tor current i2 •
eer
The price pai d for the reduced voltage drop of the IGBT is its increased switchi ng times, espe-
cially durin g the turn -off tra nsition . In par ticula r, the IGBT turn -off transition ex h ibits a phenomeno n
known as current tailing. The effec tive MOSFET ca n be turn ed off quick ly, by remov ing the gate charge
ing
such that the gate-to-emi tter voltage is negat ive. Thi s causes the cha nnel current / 1 to quickly become
zero. However, the PNP collec tor curr ent i2 cont inues to flow as long as minori ty charge is present in the
n- reg ion. Since there is no way to ac tively remove the stored min ority charge , it slow ly decays via
reco mbination . So i2 slowly decays in proport ion to the minority charge, and a current tai l is observed .
.ne
The length of the curre nt tail can be reduced by introduct ion of reco mb inat ion centers in the ,,- region, at
t
J1ig, 4.39 Physical locmions of the effective

MOSFET and !'NI' componenls of the IGHT.
,r
p
'7777777777777717:::::77777772

88 Switcl, Realizatio11
Tobie 4.3 Characteristics of several commercial IGBTs

Rated maximum Rated average r1 (typical)
Part number VF(typical)
voltage current
Single-chip devices
HGTP12N60A4 600V 23A 2.0V 70 ns
HGTG32N60E2 600V 32A 2.4 V 0.62 µ,s
11GTG30N120D2 1200V 30A 3.2V 0.58 µ,s
Multiple-chip modules
ww
CM400HA-12E 600V 400A 2.7V 0.3 µ.s
CM300HA-24E 1200V 300A 2.7 V 0.3 µ.s
CM800HA-34H 1700V 800A 3.3V 0.6 µ.s
w.E
High voltage modules
CM 800HB-50H 2500V 800A 3.lSV l.Oµs
CM 600HB-90H 4500 V 900A 3.3V 1.2 µ.s
asy
the expe nse of a somewhat increased on-res istance. The current gain of the effec tive PNP tran sistor ca n
also be minimized , causing / 1 to be greater than 12 . Nonet heless , the turn -off switchi ng time of the IGBT
En
is significantly longer than that of the MOSFET , with typical turn-off time s in the ran ge 0.5 µ.s to 5 µs.
Switchin g loss induced by IGBT current tail ing is discussed in Section 4.3. 1. Th e switchi ng frequencies
of PWM converters containing IGBTs are typically in the range I to 30 kHz .
gin
The added p-n- diode junc tion of the IGBT is not no rmally designed to block significan t vo lt-
age. Hence , the IGBT has negligible reverse voltage-blocki ng capab ility.
Since the IGBT is a four-layer device, ther e is the possibility of SCR -type latchup , in which the
eer
IGBT cannot be turned off by gate voltage contro l. Recen t devices are not susceptible to this problem .
These device s are quite robust, hot-spot and current crow ding problems are nonexistent , and the need for
ing
externa l snub ber circ uits is minima l.
The on-state forward voltage drop of the IGBT can be mode led by a forw ard-biased diode j unc-
tion, in series with an effective on -resistance. The temperatu re coeffic ient of the IGBT forward voltage
.ne
drop is comp licated by the fact that the diode jun ction voltage has a nega tive temperature coefficient,
while the on -resistance has a pos itive tempera ture coeffic ient. Fo rtunat ely, near rate d curre nt the on-
resis tance dom inates, leadi ng to an overall positive temperature coefficie nt. In consequence, IGBT s can
be eas ily connected in paralle l, with a modest current derat ing. Large modules are com mercially ava il-
able, containing multi ple para llel-co nnected chips.
Characteris tics of several commercially availa ble single-c hip IGBT s and multiple-c hip IGB T
modu les are listed in Table 4.3.
t
4.2.5 Thyristors (SCR, GTO, MCT)
Of all conventio nal semiconductor pow er dev ices, the si licon -controlled rectifier (SCR) is the oldest, has
the lowes t cost per rated kV A , and is capable of contro lling the greatest amount of power. Devi ces having
voltage ratings of 5000 to 70{){)V and current ratin gs of several thousand amperes are ava ilable. In utility
de transm ission line applicat ions, series-co nnected light-tri ggered SCR s are employed in inverters and
rectifiers that interface the ac utility system to de trans mission lines which carry roughly I kA and 1 MV .
A single large SC R fills a silico n wafer that is several inch es in di ameter , and is mounted in a hockey -
puck -style case .

4.2 A Brief Survey of Power Semiconductor Devices 89
(a) (b) Ano de

Anode (A)
Fig. 4.40 The SCR: (a) schematic symbol ,

(b) equivalenl circuit. Gate (G)
-----o Gate
ww
Cathode (K)
The schematic sy mb ol o f th e SCR is illu stra ted in Fig. 4.40(a), and an equ ivale nt c ircui t co n-
w.E
ta mm g P an d PNP BJT dev ices is il lustrated in Fig. 4.40{b). A cross -sect ion of the silicon ch ip is
ill ustrated in Fig. 4.41. Effec tive tra nsis tor Q1 is composed of the n, p, and n- regio ns, while effect ive
tra nsisto r Q2 is composed of the p, n-, and p regions as ill ustrate d .
asy
The dev ice is capab le of bloc king both pos itive a nd negat ive anode -to-cathode vol tages.
Dependin g on the po larity of the applied vol tage, one of the p- 11-j unc tions is reve rse-biased. In either
case , th e depletion regio n ex tends in to the ligh tl y doped 11- reg io n. As w it h othe r dev ices, the desi red
En
vo ltage breakd ow n rating is obtained by proper design of the 11- region thickness and dopin g co ncent ra-
tion.
The SC R can e nter the on state w hen the ap pl ied anode -to -cat hode voltage vAK is pos itive. Posi -
gin
tive gate cu rrent ic; then causes effect ive tra nsist or Q 1 to turn o n; th is in turn supp lies base cur ren t to
effec ti ve tra nsis tor Q2 , a nd causes it to tu rn on as well. The effec ti ve co nnec tions of the base and collec -
tor reg ions of tra ns isto rs Q 1 and Q2 cons titute a po sitive feed back loop. Prov ide d th at the product of the
eer
c urre nt gai ns of the two tra nsistors is greate r tha n one, then th e c urre nts o f th e transis to rs wi ll increase
rege nerative ly. In the on s tate, the anode cu rr e nt is limit ed by the exte rn al c irc ui t, an d bot h effect ive tra n-
ing
sisto rs operate fully saturate d . Mino rity ca rri ers are injecte d into a ll four regio ns, and the resulting con -
ductivity modulation leads to very low forward vo ltage drop. In the on state, the SCR can be mode led as
a forward -biased diode ju nct ion in series w ith a low-val ue on -res istance. Regardless of the gate curre nt ,
the SCR is latched in the on state: it can not be turned off excep t by app licat ion of nega tive anode curren t
.ne
or neg at ive anode -to-cathode vol tage. In phase contro lle d conve rters, the SCR turns off at the zero cross -
ing of the converte r ac inpu t or outpu t waveform . In forced com mutat io n converters, external commuta -
t
Fig. 4.41 Physical loca1ions of the effective

NPN und PNP compone111sof the SCR.
p
·22222,22,zzzzz
r : 2,,,,,, ,,2222

Forwa rd
conduc ting
increasingi0
Fig. 4.42 Static i,cvAK chnmcteristics of the SCR,
Reverse Forwa rd
blocki ng blocking
ww Reverse
breakdow n
w.E
tion circ uits force the contro lled turn -off of the SCR , by rever sing either the anode curre nt or the anode -
to-cathode voltage ,
Static iA- v AK characte ristics of the co nve ntional SCR are illu stra ted in Fig . 4.42. It can be seen
asy
tha t the SCR is a vo ltage -bid.irectional two -qua drant switc h . The turn -on transitio n is contro lled acti vely
via the gate current. The turn -off trans itio n is pass ive ,
Du ring the turn -off tra nsiti on , the rate at which forwar d anode-to-catho de voltage is reap plied
En
must be limited, to avo id ret rigger ing the SCR. The turn -off tim e 1,1 is the tim e required for minority
stored charge to be actively removed via negative anode current, and for reco mbination of any remaining
gin
min orit y charge . Durin g the turn -off tra nsit ion, negative anode curr ent actively rem oves stored m inori ty
charge, wit h wavefo rms simi lar to diode turn -off tra ns itio n wavefo rms of Fig. 4 .25. Thus , after the first
zero cross ing of the anode curr e nt, it is necessary to wait for ti me I " before rea p plying pos itive anode-to-
eer
cathode voltage. It is then necessa ry to l im it the rate at wh ich the anode-to-ca thode voltage increases, to
avoid retri gge ring the device. Inverte r-grade SCRs are opt imized for fa ster switch in g times , and ex h ibit
smalle r values of t,,.
ing
Conventi onal SCR wafe rs have large feature size, w ith coarse or nonex iste nt inter di gitatio n of
the gate and catho de cont acts. The paras itic eleme nts aris ing from thi s large featu re size lead to several
limitations. During the turn-on transi tion, the rate of increase of the anode current must be limited to a
.ne
safe value. Otherwise, cathode curre nt focusin g can occ ur, which leads to form ation of hot spots and
dev ice fai lur e .
t
Th e coarse feature size of the gate and cathode structure is also what preve nts the con ve ntional
SCR from being turn ed off by active gate co ntro l. One mi ght ap ply a negative gate cu rrent, in an attempt
to active ly remove all of the minorit y stored cha rge and to reverse-bias the p- 11gate-cathode jun ctio n.
The reason that this atte mpt fa ils is illu strated in Fig, 4.43. The large nega tive gate curre nt flows laterally
thro ugh the adjoi nin g the p region, indu cing a voltage drop as show n. Th is causes the gate-cathode j un c-
tion voltage to be smaller ne.ar the gate co ntact, and relative ly larger away from the gate co ntact. The
nega tive gate current is able to reve rse-bias only the por tion of the gate-cat hode j unction in the vicinit y of
the gate con tact; the remainder of the gate-cathode ju nctio n co ntinues to be forwa rd-biased, and cat hode
curr ent co ntinues to flow. In effe ct, the gate contact is able to infl uence onl y the nearby port ions of the
cathode.
The gate turn off th yristor , or GTO, is a modern power device hav in g small fea tu re size. The
gate and cathode co ntacts hig hl y interdig itated , such th at the ent ire ga te-cathode p- 11ju nct ion can be
reverse -biased via nega tive gate curr e nt duri ng the turn -off tra nsiti on. Like the SCR, a sing le large GTO
ca n fill an ent ire sil icon wafe r. Maxi mum voltage and curr ent ra tings of co mmerc ial GTOs are lowe r than
those of SCRs.

4.2 A Brief Survey of Power Se111ico

11
d11ctorDevices 91
J<'ig. 4.43 Negative gate currerll is unable to

completely reverse-bias tlu: gate-cathode junc tion.
The anode current focuses awny from the gate
contact.
ww
w.E
The turn -off gain of a GTO is the ratio of on-st ate cur rent to the negat ive gate c urr ent mag ni tud e
required to switc h the device off. Typica l value s of this gain are 2 to 5, mea ning that severa l hundred
asy
amp eres of negative gate curr e nt m ay be re.quired to n,rn off a GTO conduc tin g lCXXJ A. Also of intere st
is the maximum co ntrollab le on-state curre nt. The GTO is able to co nduct peak currents sig nifi ca ntly
greater tha n the rated average curren t; howeve r, it may not be po ss ib le to switc h the dev ice off unde r gate
En
co ntro l whi le these h igh peak curre nts are pr esent.
The MOS -co ntro lled thyr istor, or MCT, is a recent power dev ice in which MOSFETs are inte-
grated onto a high ly interd igi tated SCR , to control the turn -on an d turn -o ff processes . Like the MOSFET
gin
and IGBT, the MCT is a single- qua drant dev ice whose turn -on and turn -off transi ti ons are con trolle d by
a MOS gate term inal. Co mm erc ial MCTs arep -type dev ices. Vo lt age -bidirec tio nal two -qu adra nt MCTs,
and 1l-lype MCTs, are also possible.
eer
A cross -sec tion of an MCT co nta inin g MOSFET s for co ntrol of the turn -o n and turn-off tra nsi -
tions is ill ustrat ed in Fig. 4.44 . An e qu ivale nt ci rcui t wh ich ex p l ai ns the operation of th is stru ctur e is
ing
give n in Fig. 4 .45. To tu rn the device on, the gate-to-anode voltage is dri ven negative. This forward -
bi ases p -chann el MOS FET Q3, forward -biasi ng the base-emitte r jun ction o f BJT Q 1• Tran sistors Q1 and
Q2 the n latch in the on -state. To tu rn the dev ice off, the gate -to-ano de voltage is dr ive n positive. Thi s for-
.ne
ward -bia ses n-channe l MOSFE T Q4 , wh i ch in turn reverse- bi ases th e base -e mitt er juncti on of BJT Q2 •
The BJTs then tu rn off . It is important tha t the on-res istance of th e n-c hannel MOSFET be small enoug h
t
Fig. 4.44 MCT stro ctul' e. Crosshatd1cd

regions arc 1m::tall iled contac ls. Lightly
shaded regions are i11sulai ing silicon dioxide
lnyers .
Q. channel
n
'22222222222222/222222222222222
I Cathode

92 Switch Ret1/izatio11
Fig, 4.45 Eq uivalc111circuit for the MC'T.
Gate 0- - --1
ww
w.E Anod e
tha t su fficie nt in flue nc e on the cathode curre nt is exert ed- thi s lim its the max i m um con tro llab le on state
curr e nt (i.e ., the maxi mu m c urr ent that can be inte rrupt ed via gate co nt rol) .
asy
High-vo lt age MCTs ex h ibit lower for ward vo ltage drops and h ig her cu rren t de nsities tha n
IGBTs o f simila r voltag e ra tings and silico n area . However, the sw itc h ing time s are lo nger. Like th e
GTO, the MCT ca n co nduct considerab le surge c urr ents; b ut aga in , the ma x imu m cu rr e nt tha t can be
En
interrup ted vi a gate control is limited . To ob tain a re li able turn -off tran sitio n , exte rnal snubbe rs are
req uired to l imit the peak anode-t o-cathode voltage. A su ffic ie n tl y fas t gate-vo ltage rise time is also
gin
requ ired. To some extent, the MCT is still an emerging dev ice- future generations of MCTs may exhibit
co nsider able improve ment s in per fo rmance and ra tin gs .
4.3 SWITCHING LOSS

eer
ing
Hav ing imp lemen ted the swit che s usi ng semicon ductor devices , we ca n now discuss anoth er majo r
source of loss and ine ffi ciency in co nverters: switch ing loss . As discusse d in th e previo us sec tion, the
turn -on and turn -o ff tran sitio ns of se miconduc tor devices require times of tens of nanoseco nds to micro -
.ne
seconds. Dur ing these swit c hi ng tra nsit ions, very large insta nta ne ous power loss can occu r in th e semi-
cond ucto r devices. Even th ough the semico ndu ctor switc hing ti mes are short, the resu lting average
t
pow er loss can be signi fican t.
Semico nducto r dev ices are charge co ntro lled. For exa mple , th e co ndu cting slate of a MOSFET
is deter mined by the charge on its gate and in its chann e l, and the co nd ucting state of a silico n d iode or a
BJT is deter mined by the pres ence or absence of stored minorit y charge in the vicinity of the se micon -
duc tor jun ctions in side the device. To sw itch a semiconduct or device be twee n th e on and off states, th e
co ntro lling cha rge mus t be inser ted or removed ; hence, the amoun t of co nt ro ll ing char ge infl ue nces both
the switc hin g times and the sw itc h ing loss. Cha rge, and energy, are also stored in the output ca pacitances
of semico nduct or devices , and energy is stored in the leaka ge and stra y indu ctances in the c ircui t. In
most co nverte r c ircu it s, these stored energ ies are also lost d urin g the sw itch ing tran sitions.
ln thi s section the major sources of sw itching loss are describe d, and a simp le method fo r est i-
mation of th eir magni tudes is give n. For c lar ity, co ndu ct ion losses and semi condu ctor forwar d vo ltage
drop s are neg lecte d thro ugho ut th is disc ussio n .

4.3 Switching Loss 93
iA L
il_(t)
vg VB
Ideal
diode
DT, io
Fig. 4.46 MOSFET driving a clamped inductive load, huck converter example.
ww
4.3.1 Transistor Sw itching with Clamped Inductive Load
w.E
Let's cons ider first the switc hin g waveforms in the buck converter of Fig. 4.46. Let us treat the diode as
ideal, and investigate only the switchi ng loss due to the MOSFET sw itch ing times . The MOSFET drai n-
asy
to-source capacitance is also neglected.
The diode and inductor present a clamped induct ive load to the transistor. With such a load, the
transistor voltage vA(I) and curren t i/t) do not change s imulta neously. For exam ple, a magnifie d view of
En
the trans istor turn -off -tra nsitio n waveforms is give n in Fig. 4.47. For sim pl icity, the wavefom1s are
gin
Transistor
waveforms
eer
jl..
ing 0
.ne
Diode
wavefonns
t
fig. 4.47 Magnified view of transistor
turn-off transition w:iveform~ for the circuit
of Fig. 4.46,
P1,(1)
=v;J,.,

approximated as piecewise -linear. The switching times are short, such that the inductor curren t ii(t ) is
esse ntially constan t du ring the entire switchi ng transition t0 < t < 12 . No cunent flows through the diode
whi le the diode is reverse-biased, and the diode cannot become forward-biased while its voltage vo(l) is
negative. So first, the voltage vit) across the transistor must rise from zero to V8 • The interv al length
(I 1 - 10 ) is esse ntially the time required for the gate driver to charge the MOSFET gate-to-drain capaci -
tance. The transistor current i,1(1) is consta nt and equal to iL durin g this in terval.
The djode voltage vit) and current i1i(I) are given by
~'y(/) = \Ii t) - v, (4.6)
ww
i,1(/) + iii) -;a iL
At time t = 11, when vA = V.,, the diode becomes forward-biased. The cur rent iL now begins to commute
from the trans istor to the diode. The inte rval length (r 2 - / 1) is the time required for the gate driver to dis-
w.E
charge the MOSFET gate-to-source capacita nce down to the thresho ld voltage which causes the MOS-
FET to be in the off state.
The instantaneous power Pi t) dissipated by the tran sistor is equa l to v,i(t)i,1(1). Th is quan tity is
asy
also sketched in Fig. 4.47. The energy iv,,0 lost durin g the transistor turn-off transi tion is the area under
this waveform. With the simplifying assumption that the waveforms are piecewise-linear, then the energy
lost is the area of the shaded triang le:
En (4.7)
gin
This is the energy lost dur ing each transistor turn -off transition in the simplified circuit of Fig. 4.46.
The transistor turn -on waveforms of the simpl ified circuit of Fig. 4.46 are qualitative ly similar
eer
to those of Fig. 4.47, wit h the time ax is reversed. The transistor curre nt must first rise from O to iL. The
diode then becomes reverse-biased, and the transistor voltage can fall from Vg to zero. The insta ntaneous
transistor power dissipa tion agai n has peak value V~/L,and if the wavefo rms are piecewise linear, then the
w;,,.
energy lost durin g the tum-on transition
ing
is given by 0 .5 V.,iL multi plied by the transisto r turn-o n time.
Thus, dur ing one complete swi tch ing period , the total energy lost durin g the turn -on and turn -
off transitions is (it;,, ,. + W"ff) . If the switching frequency is/ ,. then the average power loss incurred due to
switching is
.ne
f:J )t,
t
P.,, = pit)dt = ( W,,,,+ W011 (48)
i.w 11,·h111
g
t1~clS. l ll tlr'l!C.
So the swi tch ing loss Pm,is direc tly proportional to the sw it ch ing frequency,
An examp le where the loss clue to transi stor swi tchin g times is particu larly sign ificant is the cur-
rent tailing phenomenon observed during the turn -off tr ansi ti on of the IGBT. As discussed in Section
4.2.4, current taili ng occurs due to the slow recomb ination of stored minor ity char ge in the 11 · region of
the IGBT. This causes the collector curre nt to slowly decay afte r the gate voltage has been removed .
A buck converter ci rcu it containi ng an ideal diode and nonideal (phy sical ) IGBT is illustrated in
Fig. 4.48. Turn -off tra nsition wavefo rms are illustrate d in Fig. 4.49; these wavefo rms are simi lar to the
MOSFET waveforms of Fig, 4.47. The diode is in iti ally reverse-biased, and the voltage vA(t) rises from
approximately zero to V8 • The interva l leng th (I 1 - t 0 ) is the time requir ed for the gate drive c ir cuit to
charge the IGBT gate-to-collector capaci tance. At time r ; t 1, the diode becomes forward-biased, and
cur rent begins to commute from the IGBT to the diode. The interval (t 2 - t 1) is the time required for the
gate drive circuit to discharge the IGBT gate-to-emitter capacitance to the threshold value which causes

4.3 Swirchi11
s Loss 95
Ideal
diode
Fig. 4.48 IGBT swi1ching loss exnmple.
ww
the effec t ive MOSFET in Fig. 4.38(b) to be in th e off state. This ti me can be min imiz ed by use of a h igh-
curre nt gate dr ive circui t whic h discharges the gate capaci tance quick ly. Howeve r, switching off the
effect ive MOSFET does no t co mp lete ly interrupt the IGBT curr e nt i,\(t ): c urren t ii i ) con ti nues to flow
w.E
thro ugh the effective PNP b ipo larjunction tra nsistor of Fig. 4 .38( b) as long as m inori ty carriers con tinu e
to exis t within its base region. Duri ng the interva l t2 < t < t3 , the current is prop ortio nal to this stored
m inor it y charge , and th e current tai I in te rval le ng th (13 - t 2) is equ al to the time requ ired for this remai n-
The energy W,(lf

asy
in g sto red m ino rity char ge to reco mb ine .
lost du ring th e turn -off transit ion of the IGBT is again the area under the in stan -
ta neous power wavefor m , as illust rated in Fig. 4.49. The switc hin g loss can agai n be eva lu ated us in g Eq.
(4.8).
En
The swi tch in g times of th e IGBT are typ ically in the vic ini ty of 0.2 to 2 µ s, or several tim es
IGBT
waveforms
gin
iL
eer
0
ing 0
.ne
Diode
wavef ormJ
Fig. 4.49 !GOT 1urn-off transition

waveforms for the circuit o f Fig. 4.48 .
0
t

96 Switch Realizatio11
longer tha n those of the powe r MOSFET. The res ult ing switc hing loss limi ts the maxi mum switc hing
freq uencies of conven tional PWM converters emp loy ing IGBTs lo rou g hl y I lo 30 kHz.
4.3.2 Diode Recovered Charge
As discussed previously, the familiar exponentia l i- v characteri stic of the diffused-j unction p- n diode is
an equili br ium rel atio nship. Dur ing sw it ch ing tran sients, signi fica nt devia ti ons from th is characteristic
are observed, whi ch can induce tran sistor switchin g loss. In p artic ular , du ri ng the diode turn -off tra n-
ww
sient, its stored mino rit y char ge mu st be remove d, eith er act ive ly via nega tive curre nt ia(t), or passive ly
via reco mbi nation inside the devic e. The diode re mains for war d-biase d wh i le minority char ge is prese nt
in the vic ini ty of the diode sem icondu ctor jun ct ion . The ini tial amount of minor it y charge is a fun cti on of
w.E
the forwa rd current , and its rate of chan ge, unde r forward-biased co ndi ti ons. The turn -o ff sw it chin g tim e
is the time req uired to remove all of th is charge , and lo esta blish a new reve rse-biased operat ing po in t.
Thi s process of swi tch ing the diode from the forwar d-biased lo reve rse-biase d states is call ed reverse
recovery.
asy
Again, most di ffused -j unct ion power diodes are actually p - 11-- n+ or p - i-n dev ices . The lightly
doped or intr ins ic region (of the diode and other power semic o nd uctor de vices as we ll) allows large
brea kdo wn vollages to be ob tained . Under steady -stale forward-biase d co nditi ons , a subs tan tial amount
En
of stored charge is present in this regio n, inc reas ing its co nd uc li vi ty and leading to a low d iode on-resis -
tan ce. II takes lime to insert and remove this charge, however , so there is a tradeoff betwee n hig h break -
gin
d own vollage, low on -resis tance , and fast sw itchin g tim es .
To unde rstand how the diode stored charge indu ces transistor sw it chi ng loss, Jet us co nsider the
buck converter of Fig. 4.50. Ass ume for this discussion that the trans istor switc hin g tim es are mu ch fas ter
eer
than the switc h ing times of the diode, such that the diode reverse recove ry mec h anism is the o nly sign if -
icant source of sw it chin g loss. A mag ni fied view of the tran sistor-turn -on tran sitio n wav eform s und er
these co nditions is give n in Fig. 4 .51.
ing
Initi a lly , the d iode co nducts the indu ctor curr ent, and he nce some amou nt of stored m inori ty
ch,ll'ge is prese nt in the diode . The tran sistor is initia l ly in the off state . Wh en the transis tor turn s on , a
nega tive curr ent flows thro ugh the diode ; th is curr en t ac ti vely removes some or most of the diode stored
.ne
min ority charge, whil e the remainde r of the min orit y cha rge reco mbi nes with in the diode. The rate of
change of the curre nt is typ ica lly limit ed by the package in duct ance and other stray indu ct an ces prese nt
t
in the external c irc u it; hence , th e peak magnitud e of the reve rse current depe nds on the ex ternal ci rcu it ,
and can be ma ny times larger than the forwa rd cur re nt i1_. The area wi th in the nega tive port ion of the
diode cu rrent wavefo rm is the recovered stored charge Q,., wh ile the in ter va l lengt h (t 2 - fu) is the reverse
recovery time t,. The magnitude of Q, is a function of the on state forwar d c urrent iL at the initi atio n of
the turn -off process , as well as the cir cuit -li mite d rate-of-change of the diode curr ent, dia(t)ldt. Du ri ng
S ilicon
d iode
Fig. 4.50 Example, switching loss induced by diode stored charge .

the interva l !0 < J < I l' the diode remains forward -biased, and hence the transistor voltage is Vg. At tim e
I= t 1, the stored charge in the vici nity of the p-1l- or p- i j unct ion is exhausted. This junc tion becomes
reverse-biased, and begins to block voltage. During the interva l 11 < t < t2 , the diode voltage decreases to
-VK . Some negative diode current continues to flow, removing any remaining stored minorit y charge as
well as charging the deplet ion layer capacitance. At time t = 12 , this current is essent ially zero, and the
diode operates in steady state under reverse-bia sed conditions.
Diodes in which the interva l length (t 2 - t 1)
is short compared to (1 1 - 10) are ca lled abrupt -recov -
ery or "s nappy" diodes. Soft recovery diodes exhibit Transistor
ww
larger values of (t 2 - r 1)/(t 1 - / 0 ). When sig nifican t wavefonns
package and/or stray inductance is present in series
with the diode , ringing of the dep letion region capac -
v,
itance with the package and stray inductances may
w.E
be observed. If severe, thi s ringing can cause excess
reverse voltage that leads to device fa ilur e . Ext erna l
R- C snubber circuits are sometimes nece ssary for
0 0
asy
reliab le operation . The reverse -recovery character is-
tics of soft recove ry diodes are intended to exh ibit Di ode
less ringing ,md voltage overshoot. Snubb ing of wavefom1s 1--.;;_-jL ...
these diodes can be reduced or eliminated.
The instantaneous power Pit) dissipated in
the tran sistor is also sketc hed in Fig. 4.51. The En 0 0
energy lost during the turn-on transition is
f gin
Area
- Q,
W0 = vA(l)iA(f)dl
.sw1i..:hing
!1"
;~risi1\or1
(4 .9)
eer
For an
(12 - 11)=
abrupt -recovery djode in which
(t 1 -1 0 ), th is integral can be eva luated in a
ing
.ne
simple manner. The trans istor voltage v1/1) is then
equal to V8 for essentially the entire diode recovery

interval. In addi tion , iA = iL - iw Equat ion (4 .9) then Area
-Q, V,
becomes
WI).., I v:~h-
iJI) )dt
t
~WILChlnj
(4. 10)
ho1n.1,
itio11
Fiic, 4.51 Transis tor-turn -on transition wavefo rms

for the circuit of Fig. 4.50.
where the recovered charge Qr is defined as the inte-

gral of the diode curren t - io(I) over the int erval 10 < t < Ii- Hence , the diode reverse recovery process
leads direct ly to swi tchin g loss W rJ.,.
This is often the largest single component of switching loss in a
co nvent ional swi tching converter. It can be reduced by use of faster diodes, des igned for minimi zation of
stored minorit y charge.

98 Switch Realizatia11
eds
Hg. 4.52 The ene rgy swrcd in tile scmicon-

dt1ctor output capacitances is lost during the
transistor turn -on transi tion.
ww
4.3.3 Device Capacitances, and Leakage, Package, and Stray Inductances
w.E
React ive eleme nts can also lea d to sw i tc h ing loss. Capacitances that are effect ively in parallel w ith
sw itch ing elements are shorted ou t when the switc h turns on , and any ene rgy stored in the capacita nce is
asy
lost. The capaci tance s are cha rged wi thout energy loss when the sw it c h ing eleme nts turn off , and the
transistor turn - off loss ~! ll com put ed in Eq . (4.7) may be red uced. Lik ewise , ind uct ances that are effec -
tive ly in series wi th a switc hing e leme nt lose their stor ed energy whe n the switc h turns off. Hence , se r ies
En
inductances lead to addit ion al sw it ch ing loss at turn - off , b ut ca n reduce the tra nsistor turn -o n loss .
The store d energ ies of the re act ive e lemen ts can be summed to fin d the total energ y loss pe r
We:=C~1[).:E gin
sw itc h ing period d ue to these mec han isms . For lin ear capacitors an d ind ucto rs , th e stored ene rgy is
}cv( 2
eer
li:.!l tivc .., I
ci ~m~nls. (4 . 11)
w, = :E - 1. J,~1
• 1nili1t:ll\ '~
1
2
elc:mc-nl
s
ing
A commo n source of this ty pe of sw i tc h ing loss is th e out put capacitan ces of th e sem iconductor swi tch -
ing dev ices. The deplet ion laye rs o f reve rse-biase d sem iconduc tor devices ex hib it c apacitance which
.ne
stores energy . Whe n the trans isto r turn s on , this stored energy is di ssip a ted by th e tramistor. For exam ple ,
in the buck converter of Fig . 4.5 2, th e MOS FET ex hibi ts drai n-to -source capaci tance Cd., ' and the
t
reverse -biase d d iode exh ibi ts ju nc t io n capac itance C1. Dur ing the swi tchi n g tran s itio n s these two capaci -
tances are e ff ec ti vely in para lle l, si nce th e de source V// is effectively a s hor t-c ir cu it at high fre qu ency. T o
th e extent that the capac itances are lin ear, th e e ner gy lost w he n the MOSFET turn s on is
(4. 12)
Typically , this type o f sw itc h ing loss is s ig ni fica nt at voltage levels above 100 V. The MOSFET gate
drive c ir c ui t, w hi c h must cha rge and discha rge the MOSFET gate capacitan ces, also exhibi t s thi s type of
loss.
As noted in Sect ion 4.2.2 , the incremen ta l dra in-to -source capac itan ce C,1_, of the power MOS -
FET is a strong fu nct ion of the dra in -to -source vo ltage l'c1.,. Ctl., (v,,__)follows an approx im ate inverse -
squa re-root dependence of vd.,·• as given by Eq. (4.5) . Th e ener gy stored in C,1,at vd., ::::Vvs is
(4 . 13)

where ic = Cc1
_,(v,1.)dvc1.Jdtis the curre nt inc. :,.,. Substitution of Eq. (4.5) into (4.13) yields
(4. 14)
Th is energy is lost each time the MOSFET swi tches on. From the stan dpoi nt of switc hin g loss, the drain -
to-source capacitance is equ i valent to a linear ca pacita nce hav ing the va lue ~C,1_,( Vvs ) .
The Schottky diode is essent ia lly a major ity-carrier device, wh ich does not exh ibit a reverse -
recovery tran sie nt such as in Fig. 4.51. Reverse -biased Schottky diodes do ex hibit significan tjunct io n
ww
capacitance, however, wh ich can be modeled with a p,u-allel capacitor C., i as in Fig. 4.52, and whi ch leads
to energy loss at the tran sisto r turn-on tran s ition.
Common sources of series inductance are transfo r mer leakage induc tan ces in isolated convert -
w.E
ers (discussed in Chapter 6), as well as the inductances of interconnect ions and of semiconductor device
pac kages. [n add iti on to generat ing switching loss, these ele ments can lead to excess ive peak voltage
stress du ring the trans istor tu rn -off transition . in terconnection and package indu ctances can lead to sig-
nifi can t switchi ng loss in high -cur rent app l icat ions, and leakage inductance is an important source of
asy
switching loss in many transformer-isolated conve11ers.
Diode stored minority charge can ind uce switc h-
in g loss in the (nonidea l) co nverter reactive elements. As
l.,
En
an exam ple, cons ider the circu it of Fig. 4.53, con ta in in g
an idea l voltage source V;(I), an inductor L , a ca pac itor C
Silicon
gin
(which may represent the diode jun ction capac itance, or v;(t) diode vo<t) C
the jun c ti on capacitance in parallel with an external
capacito r), and a silico n diode. The diode switching pro-
eer
cesses of many converters can be modeled by a ci rcu it of
this form . Many rectifier circu its conta ining SCR s exhib it Fii:, 4.53 A circuit in which the diooe siorcd
si mi lar waveforms. The voltage source produces the rect - charge induce., ringing, uncl 11l1imatd y switch-
ang ular waveform v;(I) illus trate d in Fig. 4.54. This vo lt-
age is in it ially pos iti ve, caus ing the diode to become
ing
ing Joss, in {nonidcal) rea ctive eleme nts.
forwar d-biased and the inductor current iL(t) to increase linea rl y wi th slope V 1/L. Sinc e the current is
.ne
increasi ng, the stored minori ty charge inside the diode also increa~es. At time t = 1., the source voltage
v1(t) becomes negat ive, and the inductor curre nt decreases with slope ,/i1/dt"" - Vif L. The diode stored
charge also decreases, but at a slower rate that depends not on ly on iL but also on the minority carr ier
recombi nation li fet ime of the sili co n mater ial in the diode . Hence , at ti me 1 = 12 , whe n i,.(t) reaches zero,
some stored minority charge rema ins in the diode . So the diode co ntin ues to be forwa rd-b iased , and the
inducto r current continues to decrease with the same slope. The nega tive curre nt for I> t2 co nstitutes a
t
reverse diode c urre nt , whi ch acti ve ly removes diode stored cha rge . At some time later , r = t 3, the diode
stored charge in the vic init y of the diode ju nc tio n becomes zero, and the diode j unction beco mes reverse -
biased. The inductor curre nt is now negative , and must flow through the ca pac itor. The inducto r and
capacitor then form a series resonant circui t, which rings with decay ing sinu so ida l waveforms as shown .
This ringing is even tually damped out by the parasitic loss ele ments of the circuit, such as the inductor
wi ndin g res istance, indu ctor core loss, and ca pac itor equ iva lent ser ies resis tan ce.
Th e diode recovered charge induces loss in th is circuit. Durin g the interva l t 2 < t < 13 , the min or-
ity stored charge Q,.recovered from th e diode is
(4.15)

100 Switch Realiw tion
v,-(t) This charge is di rec tly rela ted to the energy stored in the
inductor du ring this interval. The energy Wl stored in
the ind uc tor is the integral of the power flow ing into the
Ot---- -+--------- - inductor:
=J
''J
WL v, _(t)i 1,(J)dt (4.16)
'2
During this interva l, th e applied ind uctor voltage is
ww (4 .17)
w.E
Sub sti tutio n of Eq. (4.17) into Eq . (4. 16) lea ds to
(4. 18)
vs(t)
o---------...-----asy Eval uatio n of the int egral on the left side yie lds the
stored indu ctor energy at I= t3 , or Ui 2(t 3 )!2. The right-
1
j i i En side integ ral is eva lu ated by notin g that V2 is consta nt

and by sub stitu tion of Eq. (4. 15), yielding V2 Q,. Hence ,
Fig. 4.54 Wuvefonns of the circ:uit of ri g. gin

the energy stored in the inducto r at t = t~ is
(4.19)
4.53.
eer
or, the recove red charge m ult ip lied by the source volt -
age. For t> t3 , the ri ngi ng of the resona nt ci rcui t formed
ing
by the inductor and capac itor c auses this en ergy to be circu late d back and fort h between the indu ctor and
ca pacitor. If paras itic loss e lements in the circuit cause the ringing amp litude to eventuall y decay to zero,
then the ene rgy becomes lost as heat in the paras itic eleme nts.
.ne
So diode stored minority charge can lead to loss in ci rcu its that do not con tain an act ive sw itch -
ing element. Also , ring in g wavefor ms that decay before the end of the swi tching per iod ind icate the pres-
t
ence of switching loss,
4.3.4 Efficiency vs. Switching Frequency

Suppose next tha t we add up all of the energies lost due to sw itc hi ng, as discussed above:
w,,,,= we,+ Woll+ W J) + wC + wt. + ... (4.20)
This is the e nergy lost in the swi tc hi ng trans iti on s of one switch ing period. To obtai n the average switch-
ing power loss, we mu st multipl y by the switc hin g freque ncy:
P,,.,= W,,,,J;.,, (4.2 1)
Othe r losses in the converter in clude the co nd uct ion losses P,,,md' mode led and solv ed as in Chapter 3,

4.4 Summa,y of Key Points IOI
100%
.................de asy mptote .... ·······-· ······

i.:--.
90% :; ~.
Fig, 4.SS Efficiency vs. switching 80%

frequency. based on Eq. (4.22). using
arbitrary choices for the values of loss
ww
and load power. Switching loss cau~es
the efficiency to decrease rapidly at
high frequency.
70%
w.E 60%
asy 50%
IO kHz 100 kHz I MHz
En fsw
and other freq uency -inde pendent fixed losses Pfixed • such as the powe r require d to operate the contro l c ir-
cuit. Th e total loss is therefore
gin (4.22)
whi ch increases lin ea rl y w it h freq uency. At the c ritical freq uency

eer
J, . ;;;;p 1.·,md + pfi x~d
cn t Wru1
ing (4.23)
.ne
the sw itch ing losses are equal to the other co nver ter losses. Below this crit ica l freque ncy , the total loss is
dom inated by the co nduc tion and fixed loss, and hence the to tal loss and co nverter efficiency are not
stro ng fu nctions of sw itch in g freq uency. Above the critica l freq ue ncy, the swi tch ing loss domi n ates the
total loss, and th e converte r effic iency decreases rap idly with increas ing sw itching frequenc y. Typical
depe ndence of the fu ll-load converter efficie ncy on swi tchin g freq ue ncy is p lotte d in Fig. 4 .55, fo r an
arb itrary choice of parameter values. The critical frequency f cn't can be taken as a rough upper limit on the
t
switc hin g freque ncy of a pract ical converter.
I. How an SPST ideal sw itch can be realized using semico nducto r devices depends on the polarity of the
voltage that the devices must block in the off slate, and on the polarity of the curre nt which the devices
must co nduct in the on state .
2. Single-quadran t SPST switches can be realized using a single transistor or a single diode, depen ding on
the relative pola rit ies of the off state volt age and on state curre nt.

3. Two-quadrant SPST witches can be realized using a transistor and diode, connected in series (bidirec-
tional-voltage) or in antiparallel (bidirectional-current). Several four-quadrant schemes are also listed here.
4. A "synchronous rectifier" is a MOSFETconnected to conduct reverse current, with gate drive control as
necessary. This device can be u. ed where a diode would otherwise be required . If a MOSFETwith suffi-
ciently low R,,,,is used, reduced conduc1ion loss is obtained.
5. Majority carrier devices, includ ing the MOSFETand Schottky diode, exhibit very fast switching times,
controlled essentially by the chargi ng of the device capacitances. However, the forward vol rage drops of
these devices increases quick ly with increasing breakdown voltage.
6. Minority carrier devices, including the BJT, IGBT, and thyristor family, can exhibit high breakdown volt-
ww 7.
ages with relatively low forward voltage drop. However, the switching times of these devices are longer,
and are controlled by the times needed to insert or remove stored minor ity charge.
Energy is lost during switching tra nsitions, owing to a variety of mechanisms. The resulting average power
w.E
8.
loss, or switching loss, is equal to this energy loss mu hi plied by the swi1ching frequency. Switching loss
imposes an upper limit on the witching frequencies of practical converter.
The diode and inductor present a "clamped inductive load" to the transistor. When a transistor drives such
asy
a load, it experiences high instantaneous power lo s dur ing the switching transition . An example where
this leads to significant switching loss is the IGBT and the "current tail" observed during its turn-off cran-
sition.
9.
En
Other significa nt sources of switching loss include diode stored charge and energy stored in certain para-
sitic capacitances and inducta nces. Parasitic rin ging also indicates the presence of switching loss.
REFERENCFS
gin
[I] R. D. MIDDLEBROOK
eer
, S. CuK, and W. BEHEN, "A ew Battery Charger/Discharger Converter," IEEE
Specia lists Conference, I978 Record, pp. 25 I-255, June 1978.
Power Ele ctro11ic.1·
(2) H. MATSUOand F. KUROKAWA
ing
, " ew Solar Cell Power Supply System Using a Boost Type Bidirectional
De-De Converter," IEEE Powe r Elect ro11ics Specia lists Conf erence. 1982 Record, pp. 14-19, June 1982.
.ne
(3) M. VENTU RINI, "A ew Sine-Wave-In Sine-Wave-Out Conversion Technique Eliminates Reactive Ele-
ment.," Proceedings Se venth lnt emar ional Solid-Stal e Pow er Conversion Co11fere11ce (Powercon 7), pp.
E3.I-E3. !3, 1980.
(4] K. D. T. NGO, S. (\iK, and R. D. MIDDLEBROOK, "A New Flyback De-to-Three-Phase Convener with
Sinusoidal Outputs," IEEE Power Elecrronics Special is ts Conference, 1983 Record, pp. 377-388. t
[5] S. CIJK, "Basic of Switched-Mode Power Conversion: Topologies, Magnetics, and Control," Advcwces in
, Vol. 11, Irvine CA: Teslaco, pp. 279-310, 1983.
Switched-Mode Power Co11versio11
[6] L. GYUGIand B. PELLY, Static Power Frequency Changers: Theory , Perfornum ce, and Applica tions , New
York: Wiley-Interscience, 1976.
[7J R. S. KAGA N and M. CHI, "Improving Power Supply Efficiency with MOSFET Synchronous Rectifiers,"
gs Nint/1 International Solid-State Power Conversion Conferen ce (Powercon 9), pp. D4. l-D4.9,
Proceedi11
July 1982.
[8] R. BLA CHARD and P. E. THlBODEA U, "The Design of a High Efficiency, Low Voltage Power Supply
Using MOSFET Synchronous Rectification and Current Mode Control," IEEE Power Electro11ics Special-

Problems 103
ists Conferen ce, 1985 Record, pp. 355-36 1, June 1985.
[9] N. MOHAN, T. UNDELAND,and W. ROBBINS,Power Elec tronics : Conver ters, Applications, and De.,ign,
2nd edit., New York: John Wiley & Sons, 1995, Chapters 19-26 .
[!OJ C. L. MA and P. 0. LAURJTZEN,"A Simple Powe r Diode Mod el with Forward and Reve rse Recovery, "
IEEE Power Electron ics Specia lists Conference, 1991 Record , pp. 4 11-415, June 1991.
[I I) M. SCHLECHTand L. CASEY,"A Compariso n of the Square Wave and Quasi-Resonant Topol ogies," IEEE
Applied Power Electronics Conference , 1987 Record, pp. 124- 134, March 1987.
ww
[12]
[13)
B. J. BALIGA, Modern Powe r Devices , New York: John W iley & Sons , 1987.
P. GRAY, D. DEWITT, A. BOOTHROYD, and J. GIBBONS,Physical Electro nics and Circuit Models of Tran -
[14) w.E
sistors, Semicondu ctor Electronics Education Commiuee , Vol. 2, ew York: John Wiley & Sons, 1964.
E. OXNER,Pow er FETs and Their Applicatio ns, Englewood , New Jersey: Prentice-Ha ll, 1982.
[15)
asy
M . RASHID, Po wer Electronics : Cirrni ts, Devices, and Appli cations, 2nd edil., Englewood , New Jersey:
Premice Hall, 1993, Chapters 3, 4, and 8.
En
[16) B. J. BALIGA, M. S. ADLER, R. P. LoVE, P. V . GRAY, and N. D. ZAMMER, "The Insulated Gate Transistor
-A ew Thr ee Term inal MOS-Controlled Bipolar Power Device ," IEEE Transa ctions 011 Electron
Devil-es, Vol. 3 1, No. 6, pp. 821-828, June 1984.
[17)
gin
V . TEMPLE,"MOS-Co ntrolled T hyristo rs- A New C lass of Power Devices, " IEEE Transaction s 011Elec-
tron Devices, Vol. 33, No . IO, pp . 1609- 16 18, October 1986.
[18)
eer
S. SUL, F. PROFUMO, G. CHO, and T . LJPO, "MCTs and IGBTs: A Comparison of Performance in Power
Electro nics Circuits," IEEE Power Electro11ics Specialists Co11
f ere11ce, 1989 Record , pp . 163-169 , June
[19)
1989.
V. TEMPLE, S. ARTHUR, D. WATROUS, R. DE DONCKER, and H . METHA, "Megawa tt MOS Contro lled ing
Thyri stor for High Voltage Power Circuits, " IEEE Power Electron ics Spedalists Conferenc e, 1992 Record,
.ne
pp. 1018-1025, Jun e 1992.
PROBL EMS
In Problems 4.1 lO 4.6, the input voltage V~ is de and positive with Switch
t
the polarity shown. Spec ify how to implemen t the switches using a position
mini ma l number of diode. and transistors , such that the conven er
2
operat es over the e ntir e ran ge of dut y cycles O S D $ I , The switch
slates sho uld vary as shown in Fig. 4.56. You may ass ume that the
induc tor curren t ripples and capacitor voltage ripples are small . I
For each pro blem , do the fo llow ing:
0 DT, T,
(a) Rea lize the swi tches using SPST ideal
switches, and exp li cit ly defin e the vo lta ge and Fig. 4.56 Switch wntrol method for Prob-
curren t of each swi tch. lems 4. l to 4 .6,
(b) Express the on-slate current and off -state volt-
age of eac h SPST swi tch in te rm s o f the co nvener in ducw r c urrems, capa citor voltages , and/or

104 SwitchRealizario11
input source voltage.

(c) Solve the convener to determine the inductor currents and capac itor voltages, as in Chapter 2.
(d) De term ine the pola1i1ies of the switch on-stale currents and off -state voltages. Do the polarities
vary with duty cycle "
(e) Stale how each switch can be realized using trans istors and/or d iodes , and whether the real iza-
tion requ ires single-quadrant , curren t-bidir ectio nal two-quadrant , volta ge-bidire ctiona l two-
quadranl , or four-q uadrant switches.
4.1
ww +
w.E 2
asy
En
4.2
2 gin
eer
4.3
ing
.ne
t
4.4
v,

Problems 105
4.5
ww
4.6
w.E
2
asy T
~
2
En
4.7
g ine
An IGBT and a sil ico n diode operate in a bLtck conve rter , w ith the IGBT wavefo rms ill ustrated in Fig.
4.57. The con verter operates wi th in pu t voltage V8 = 400 V. o utp ut vol tage V= 200 V, an ti load curr ent/
lOA.
"CE ic
vcJ. t)
eri
ng
400V 40 A
300 V 30A
.ne
200V 20A
IOOV IOA
OV OA
0
ic( t)
2 t, µs
t
Fig, 4.57 IGBT voltage and curre nt waveforms, Problem 4.7 .
(a) Estimate the total energy lost dur ing the switchi ng transitions .
(b) The forward voltage drop of the IGBT is 2.5 V, and the diode has forward vo ltage drop 1.5 V. All
other sources of conduc tion loss and fixed loss can be neglec ted. Estimate the semicond uctor
co ndu c tio n loss.
(c) Sketch the converter e fficie ncy over the range of switchi ng fre<1uencies I kHz ::!,J
;~ 100 kHl.
and label nu me ri cal values.
4.8 Two MOSFETs are employed as current- bidirec tiona l two-qua drant swi tches in a bid irec tional batt ery
charger/ di schar ger based on the de-de buc k conver ter. This converte r inte rfa ces a 16 V ballery to a 28 V
mai n power bu s. The max imum batter y cur rent is 40 A. The MOSFETs have o n-res istances of 35 mil .

106 Switc h Realization
Their body diodes have forward voltage drops of 1.0 V, and exhibit recovered charge Q, of 25 µ.C and
reverse recovery times 1, of 200 ns in the given circuit. You may assume that all diodes in this problem
have "snappy" reverse recove ry characteristics, and also assume that diode stored charge is the domina nt
cause of switching loss in this circuit. You may neglect all losses other than the semiconducto r conduc -
tion losse,~ and the switching loss induced by diode stored charge.
The curre nt-bidirectional two-quadrant switches are realized as in Fig . 4.10(a), utili zing the
MOSFET body diodes.
(a) Estimate the switc hing energy loss, conduction loss, and converter efficie ncy, when the baner y is
being charged at the maxim um rate. The switching frequency is JOOkHz .
Externa l diodes arc now added as illustrated in Fig. 4. I0(b). These diode . have forward voltage drops of
ww l .0 V, and exhibit recovered charge Q, of 5 µC and reverse recovery times, , of 40 ns in the given circuit.
(b)
(c)
Repeat the ana lysis of Pan (a), for this case.
Over what range of switchi ng frequenci es does the addit ion of the external diodes improv e the
4.9
w.E conve rter efficiency ?
A switchi ng converter operates with a switching frequency of 100 kHz. The con verter waveform. exhib it
damped sinusoidal ringing , initiated by the transistor turn-off transition, which decays slowly but even -
asy
tually reac hes zero before the end of the switching period . This ringing occurs in a series resonant circuit
formed by parasitic inductances and capacita nces in the circuit. The freque ncy of the ringing is 5 MHz.
During the first period of sinusoida l ringing, the ac inductor current reaches a peak magni mde of 0.5 A,
En
and the ac capacitor voltage reaches a peak magnitude of 200 V. Determine the following qua ntities :
(a) the value of the total parasitic inductance,
gin
(b) tl1e value of the total para~itic capacitance,
(c) the energy lost per switch ing period, associated with this ringing , and
(d) the switching loss a~sociated with this ringing.
(e)
eer
Derive a general express ion for the switch ing loss, as a function of the switching frequency ,
ringing frequency, and the ringing voltage and current peak magnitudes during the first period of
ringing.
ing
.ne
t

5
The Discontinuous Conduction Mode
ww
w.E
asy
En
gin
When the idea l sw itches of a de-de conve rter are implemented usin g current -unidir ectio na l and/o r volt-
ous co11ductio11
eer
age -unidirectional semico ndu cto r sw itches, one or more new modes of opera tion known as discontinu-
modes (DCM ) can occur. Th e di scon tinu ous cond uction mode arises when the sw itch.ing
ripp le in an inductor curr ent or capac itor voltage is large enough to cause the polari ty of the applied
ing
switch curr ent or voltage to reverse, suc h that the current- or voltage -unid irectiona l assumpt ions made in
realiz ing the switc h wit h sem icond uctor dev ices are vio lated. The DCM is com monl y observed in dc-<lc
converters and rectifier s, and can also sometimes occur in in verters or in other co nverte rs conta.ining two -
.ne
quadra nt sw itches .
The disco ntinuou s co nduction mode typ ically occurs wit h large inductor current ripple in a co n-
verter opera ting at light load and contai ning current -un idirect ional switches. Since it is usua lly required
that conve rters operate with th eir loads remove d, DCM is frequent ly encou ntere d. Indeed , some convert-
ers are purpose ly designed to operate in DCM for all loads.
The properties of conve rters change radi cally in the di scont inuous conduction mode. The con-
t
vers ion ratio M becomes load-dependen t, and the output impedance is increase d. Control of the output
may be lost when the load is removed. We will see in a later chapter that the conver ter dynamics are also
sign ificant ly altered .
In th is chap ter, the origin s of the disconti nuous conduction mode are expl ai ned, and the mode
bou nda ry is derived. Tech niques for solution of the converter waveforms and outp ut voltage are also
descr ibed. The pr inci ples of inducto r volt-second balance and capac itor charge balance must always be
true in steady state, regard less of the operatin g mode. However , application of the sma ll ripple approxi-
mation req uires some care , since the inductor curren t ri pple (or one of the inductor current or capaci tor
voltage ripples) is not small.
Bu ck and boost converters are solved as examples. Chara cter istics of the basic bu ck, boos t, and
buck-boos t conve rters are summar ized in tabul ar form.

108 The Di.sco11ti111w11s

Co11d11ctio11
Mode
5.1 ORIGlN OF THE DlSCONTINUOUS CONDUCTION MODE,

AND MODE BOUNDARY
Let us conside r how the indu ctor and switch cu rre nt wavefo rm s chan ge as the load power is re duce d .
Let's use the buck converter (Fig. 5. 1) as a simp le exam ple . The inductor cur ren t il (t ) and diode current
i0 (t) wavefo rm s are sketched in Fig. 5.2 for the continuou s co nduc tion mode. As descr ibed in Chapter 2,
the inductor curre nt waveform co nt ains a de co m po nen t/ , p lus sw itch in g ripple of peak amp litude t:i.iL.
Durin g th e secon d sub interva l, the d iode curre nt is identical to the indu ctor cu rrent. Th e minimum di ode
cu rrent durin g the second sub inte rval is eq ual to (J - M 1) : sin ce th e di ode is a sin gle-quadrant sw itch ,
op eration in the co nti nu ous co ndu ction mode requires th at this curren t rem ain positive . As shown in
ww
Ch apter 2, the inductor curr ent de com ponent / is equa l to the load curr ent :
f - J,'_ (5. l )
w.E
-R
since no de current flows through capaci tor C. It can be seen that / depe nds on the load resis tance R. TI1e
Fig . S. l asy
Ruck converter
T
QI
iL(t)
L
+
example.
En D, C R V
gin i0 (t)
(a)
eer
ing
.ne
ilig. S.2 Buck converter wave-

forms in the continuous conduc-
tion n1ode: (a) induc tor current
i L(t). (b) diode cun-ent i0 (t). Conducting
0 DT, r. t
devices:
l
·- ····- ················J . ill 1,
0 DT, T,

5./ Origin of the Disco111i

111
to11sCo11
d11
ctio11Mode, and Mode Boundary 109
(a)
ww
Fig.
waveforms
5.3 Buck convert er
111 the houndary
betwee11the con1i11uous and
Conducting
devices :
w.E
discontinuous conduction (b)
modes: (u) inductor current
i 1_(t ), (b) diod e cu1Tent i0 (1).
asy
En
sw itc hin g ripple peak amp litude is:
0
gin DT, T,
ti . - -~
V _DD'T
( V ---V ) DT - _K _ _ .,
eer (5.2)
ing
1L - 2L .- 2L
The ripple magn itude depe nds on the app lied voltage (Vx - V), on the inductance L, and on the trans isto r
conduc tio n time DT,. But it does not depend on the load resistance R. The indu ctor current ripple magni -
.ne
tude varies with the applied voltages rathe r than the applied cuITents.
Suppose now that the load resistance R is increased, so that the de load curr e nt is decreased . The
t
de componen t of inductor current / wi ll then decrease , but the ripp le magnit ude l!i.i1• will remain
unch anged. If we cont inue to increase R, eve ntually the point is reached where / ==l'i.i1,,illustrated in Fig.
5.3. It nm be seen that the indu cto r c urren t ir,(t) and the diode curren t i0 (t ) are both zero at the end of the
sw itch in g per iod. Yet the load cuITent is positive and nonzero.
What happen s if we co ntinue to increase the load resista nce R? Th e diode cu rrent ca nnot be
neg ative; therefore , the diode mu st beco me reverse -biased before the end of the sw itc hing perio d. As
ill ustrated in Fig. 5.4, there are now three sub intervals dur ing each switch ing period T,. Dur ing the fir st
sub interva l of len gth D 1T, the tra nsis tor con du cts, and the diod e conducts durin g the seco nd subinterv al
of length D27, .. At the end of the second sub inter val the diode current reache s zero, and for the remainder
of the switching perio d neith er the tra nsistor nor the dio de conduct. The converter operate s in the discon-
tinuous co ndu ction mod e .
Figure 5.3 suggests a way to find the boundary betwee n the cont inuous and di sco nt inuo us con-
duct ion modes. It c an be seen that, for this buck converter exa mp le, the diode curr e nt is positive over the
entire interval DT_,< t < T, provided tha t l > ML. Hence, the cond itions for operation in the con tinuo us
and disco ntinu ous conduc ti on modes are:

110 The Disc011fim1m1s Cond11cfio11Mod e
(a) ii(t)
ww
Fig. 5.4 Buck (:<mvertcr
wnveforrm in the discontin uou, Conducting
devices:
0
j-
I
D1T,-
Q,
DT,
\- D2Ts j- D3Ts.. l
! D, l X j
Ts
w.E
conduction mode: (a) inductor
current i1_(r), (!}) diod e current (b) io(t)
ii}(/),
asy
En 0
gin D T, \
~ D2Ts----.j
I > Aii for CCM

eer ( 5,3)
I< Ail rorDCM
ing
where I and Aii are found assu m ing that the conver ter operates in the co n ti nuous cond uctio n mode .
.ne
In sertion of Eqs. (S. l ) and (5.2) into Eq. (5.3) yields the fo llow ing cond ition for operat ion in the discon-
tinu ous co nductio n mode:
Simp lifica ti on leads to

(5.4)
t
( 5.5)
This can also be expressed
K < K " ;,(D) for DCM (5 .6 )
where
and Kc,;,(D) "'D'

5.1 Origin of the DiscontimwllsCo11d11

ction Mode, and Mode Bor111da1
}' 111
Fig. S.5 Bul,k converter Kc,,, (D) vs. D. T he converter oper-

2
-
ate~ in CCM when K > K,..,.,, and in DCM when K < K,,.11•
ww
The dim e nsionless para meter K is a meas ure of the ten dency of a conver ter to opera te in the d isco nti nu -
ous conduction mode. Large values of K lead to continuous mode operation, while small values lead to
w.E
the disco nt inu ou s mode for some va lues of duty cycle. The critical va lue of Ka t th e boun dary betw ee n
modes, K,.,.;1(D), is a fu nc ti on of du ty cycle , and is eq ua l to D' fo r the buck co nverte r.
The critica l val ue K,,,-;1(D) is plotted vs. du ty cycle Din Fig. 5.5. An arbitr ary choice of K is also
illustrated. For the values shown, it can be seen that the converter operates in DCM at low duty cycle, and
asy
in CCM at hig h du ty cycle . Figure 5.6 illu st ra tes what ha ppe ns wit h heav ier loadi ng. The load res istance
R is reduced in va lue, such th at K is larger. If K is greater than one, then the co nverter operates in the co n-
tinuo us cond uc tion mode for all duty cycles.
En
It is na tural to express the mode boundary in terms of the load resistance R, rathe r th an the
dim e nsionless param eter K. Equati o n (5.6) can be re arranged to dir ectly expose the dependence of the
mode bou nda ry on the load resista nce:
R < Rc,.;, (D}

gin
for CCM (5 .7)
eer
R > R,, ,-,(D) for DCM
wher e
ing
.ne
So the converter enters the disco nti nu ous co nduc tion mode whe n the load res istance R exceeds the crit i-
cal value R ai r' This critical value depends on the inducta nce , the sw itch ing period, and the duty cycle .
ote th at, since If $ I, the m in i mu m va lue of Ra ;, is 2UT, .. Th erefore, i f R < 2UT,, then the converter
wi ll operate in the co nti nu o us co ndu c tio n mode for all duty cycles.
These res ult s can be applied to loads that are not pure linear resistors. An effect ive load res is- t
K > Keri,:
2 CCM
Fig. S.6 Comparison of K with K,.,.,(/J), for n larger
value of K. Si11ceK > l. the converter operates in CCM ···················-····-·
··········-·······
K= 2URT, ..
for a11D .

112 The Disco11tin11o

us Co11d11ctio11
Mode
Table5.1 CCM-DCM mode boundaries for the buck, boost, and buck-boo~t converters
Converter R,, ;,(D) o~~' (Rcri,)
Buck ( 1- D) 2L 2.L...
(1-D)T, T,
Boost 4 2L 271,_
D(1-D )2 2 T, 2 T,
27 D(l-D)
2L
ww
2L
Buck - boost (l - D) 2
(l-D) 2T, r,
w.E
tance R is defined as the ratio of the de outpu t vol tage to the de load current: R = VII. Th is effec ti ve loa d
resis tance is then used in the abo ve equation s.
A si milar mode boundary analysis can be per for med for ot her converters . The boost converter is
anal yze d in Section 5.3, whi le analys is of the buck -bo os t co nverter is left as a homework probl em . Th e
asy
res ults are liste d in Table 5.1, for the three bas ic de- de co nverters. In eac h case, the dim e nsion less
parameter K is defi ned as K = 2UR1:,. and the mode boundary is give n by
K En
K> K,, 1,(D)
< Kc,;,(D)
or
or
R < R0 rl,(D)
R > R 0 ,;,(V)
for CCM
for DCM
(5.8)
gin
5.2 ANALYSIS OF THE CONVERS ION RATIO M(D, K)
eer
W ith a few mod ifica tions, the same techn ique s and approximat ions deve loped in Chap ter 2 for the
ing
steady -state analys is of the cont inu ous co nd uctio n mode ma y be app lied to th e dis co ntinuous co nduc tio n
mode.
.ne
(a) Inductor volr-seco11dbalance. The de compo nent of the vo ltage applied to an inductor must be zero:
(5.'J )
(b) Capacitor charge balance. The de component of current applie d to a capacitor must be zero:
fr.,
.
t
. ) l (5.IO J
(re =r rc(l )dt=O
' n
These princip les must be true for any cir cuit that operates in steady state, regardless of the operatin g
mode.
(c) The linear ripple approximation Care must be used when emp loy ing the lin ear r ipp le approx im atio n in the
discont inu ous conduction mode.
(i) 0111p111capacitor voltage ripple. Regardless of the operati ng mode, it is req uired that the outpu t volt-
age ripple be sma ll. Hence , for a well-designed co nverter opera tin g in the discontinuo us cond uction
mode, the peak output vo ltage ripple i'\.vs ho uld be much smaller in ma gn itu de th an the outp ut volt -
age de co mponent V. So the linea r ripple approx imatio n app lies to the ou tput voltage wavefor m:

5.2 Anal ys is of the Conversio n Rati o M(D, K) 113
v(r)"" V (5.11)
(i,) or rnrr ent ripple. By defi nition , the induc tor current ripple is not small in the disco nti nuous
/11d11ct
cond uct-ion mode. Indeed , Eq. (5.3) states that the inducto r cu1Tent ripple /'J.iLis greater in magn itude
than the de co mponent /. So neg lecting the inducto r current ripple leads to inaccurate re.suits. ln
other co nverte rs, severa l induc tor currents, or a capacitor voltage , may conta in large switch ing ripple
which shou ld not be neglected.
The equ ations neces sary for solution of the vol tage convers ion rat io can be obtained by invo king vo lt-
ww
second ba lance for eac h induc tor voltage, and charge ba lance for each cap acitor c wTe nt , in the network .
The swi tchin g ripple is ignored in the output ca pac itor voltage, but the inductor current switchi ng ripple
m ust be accoun ted for in this buc k converter example.
Let us analyze the conversion rat io M = V/Vg of th e buck converter o f Eq . (5 .1 ). When the tra n-
w.E
sist or con du cts , for O < I < D 1Ts, the convert er circ uit re du ces to the network of Fig . 5.7(a) . Th e inductor
vo lt age and c apaci to r cur rent are given by
asy VL(f): v.- ~{t)

id,t) = ii.(t) - v~)
(5 .12)
By m akin g th e linear ripple ap proximation
En
, to ignor e the o utput capaci tor voltage ripple , one obta in s
(a)
gin L
eer
+
iJt)
C R v(t)
ing
.ne
(b)
Fig. 5.7 Buck converter circuits for operation in

the discontinuous conduction mode: (a) during
sub interval 1, (h) during subi nterval 2, (c) during
~ubinterval 3.
+ V1.(t)
C
iJ t)
R
+
v(t)
t
(c)
+
iJ t)
C R v(t)

114 T/,e Discontimwu.,Conduction Mode
v, -
-*
,, 1_(1) z V
(5 . 13)
1({r} ~ i 1(r)
Note tha t the inductor curr ent ripp le has not been ignored.
The diod e co ndu cts d urin g su bint erv al 2, D 1T0 < ! < (D 1 + D 2 )T,. The c ircu it the n red uces to
Fig. 5.7(b). The indu cto r voltage and ca pacitor c ur re nt are give n by
v1,(1) = - v( t)
(5 .14)
ww
. ( ) . ( )
le i =11.I -Rv(t)
By neglec tin g the ripple in the output ca pacitor vo ltage , one obtains
w.E V1_(t) z- V
i c(I) z i 1,(t)- ·}
(5. 15)
asy
The diode beco mes reverse -biased at tim e t = (D 1 + D 2 )T,. The c ircu it is the n as shown in Fig . S.7(c),
with both tra nsistor and d.iode in th e off state. Th e indu ctor vo lta ge an d ind uctor c urren t are both zero for
the remai nde r of the sw it ch in g per iod (D i + D2)? ~ < t < T,.The net work equ atio ns for the th ird subi nt e r -
val are give n by
Env 1_ = 0, i 1_ = 0
. r ) . ( l v!t)
lcJ = !l I - /(
gin (5 .16)
eer
Note that the indu c to r cu rre nt is co nsta nt and equal to zero d ur in g th e th ir d su bi nterval, and therefore the
inductor voltage mu st also be zero in accordance wi th the relations hip v1,U)= Ldi, _(f)ldt . In prac tice , pa r-
ing
as itic rin g in g is observed d uri ng th is subinte rva l. This rin gi ng occ urs owing to the reso nant circuit
forme d by the indu ctor and the sem ico nducto r device ca pac itances , and typically has l ittle influence on
the converter steady -state pro pert ies. Aga in ignorin g the out put capacito r voltage ripp le, one obta ins
.ne
v1_(r) = 0
(5 . 17 )
t
ic{l) = - 1
Equation s (5. 13), (5.15) , and (5.17) can now be used to plo t th e ind uctor vo ltage waveform as in Fig. 5.8.
Accord.ing to th e prin c iple of in d ucto r vol t-seco nd bala nce , the de com po nent o f th is wavefor m must be
zero . Since the wavefo rm is recta ng ular , its de compo ne nt (or average va lue ) is easi ly eval uated:
(5 . 18)
Sol uti on fo r the o utput voltage yie ld s
(5 . 19)
The transistor duty cycle D (which coi ncides with the sub interval I duty cycle /J 1) is the control input to
the converter , and can be considered know n . Bu t th e sub in terval 2 duty cyc le D 2 is unknown , and hence

5.2 Analysis of the Conversion Ratio M(D, K) 115
Fig. 5.8 fnductor voltage waveform vi(I), buck - D2Ts1 - D3T,

cn11verler operating in discontinuous conduction [ 0
mode.
-V
another equatio n is nee ded to e limin ate 0 2 and solve for the o utput vol tage V.
ww Th e seco nd equa tion is obt ain ed by use of capacitor charge ba lan ce. The co nn ec tion o f the
ca pa ci tor to its adjacent com pon ents is de tailed in Fig. 5.9. Th e node equ atio n of thi s network is
w.E
By capacito r char ge bala nce, th e de co mp o ne nt of capac itor curre nt m ust be zero:
asy (ic-)=O (5.21)
En
The refore, the de loa d cu rr en t mus t be s uppl ied entirely by the othe r elements con nected to the node . In
part icul ar, for the case of the buck co nverter, the de component of ind uc tor current mu st be equa l to the
de load curre nt :
(/I ) = JI:.
R gin (5.22)
So we need to co mpute th e de com pone nt of th e ind uctor cu rrent.

eer
Since the inductor current rippl e is not sma ll , dete rmina t io n of the in ductor curre n t de com po-
ing
nen t requi res th at we exa m ine the curre nt wa ve form in deta il. The indu cto r curren t waveform is sketc hed
in Fig. 5.10. Th e c urr ent begi ns the switc h ing period at zero, and incr eases durin g th e first sub in terva l
w ith a co nstant slope, give n by the app li ed volt age div ided by th e in d uctance. Th e peak ind uc to r c urr e nt
1> is eq ual to the co nsta nt slope, multipli ed by the length of th e fir st subinterva l :
.ne
V -V
= ip•"' T (5.23)
t
iL(D,T,) D,T,
The de compone n t of the ind uctor current is agai n the average va lu e:

(5.24)
L i,.(t) v(t)IR
ic( I)
+
Fig. 5.9 Connec tion of the Olatput capacitor to adj acent com ponent s.
C R v(t)

116 77,e Discon tinuous Co11du ction M ode
Fig. 5.10 Induct or current waveform

i 1_(1},buck convener npcratir1g in dis-
continuous cond uction mode .
ww 0
!+-- D1T, --+f-D
D~
2T, -.j
The integr a l, or area un de r the iL(t) curve, is the area of the triang le ha ving he igh t
~
.- D3T, ~
i,,, and base di me nsio n
w.E
(0 1 + D 2 )T, . Use o f the tr ian gle area fo rmu la y ields
(5.25)
asy
Substi tuti o n of Eqs. (5.23) and (5 .25) int o Eq . (5.2 4 ) lea d s to
En (5 .26)
gin
Fina lly, by e qu ating th is res ult to the de load curre nt , accor ding to Eq. (5 .22), we obta in
eer (5.27)
ing
Thu s, we have two unkn ow ns, V an d D 2 , and we ha ve two eq ua tio ns . TI1e fir st eq uation , Eq. (5. 19), was
obtain ed by indu cto r volt-sec ond bala nce, wh ile the second equa tio n, Eq. (5.27), was obtai ned usi ng
cap acitor charge balance . Elimina tion o f D 2 from the two eq uat ions, and sol utio n fo r the vo ltage con ve r-
sion ra tio M(D 1, K) = V/Vg, yields
.ne
where
l +. / l
V
+ 4K
D;
K = 2URT,
(5.28)
t
valid for K < K,.,;,

Th is is the so lutio n of th e b uck co nverter operat ing in disco nti nuous co nduct io n mode .
TI1e co mp lete b uc k co n verter characteris tics, in cl ud ing both con ti nuou s and d isco nt inuou s con-
d uc tion modes, are therefor e

5.3 BoostConverter Exam/J/e ll7
1.0
M(D,K)
0 .8
0.6
Fig. 5.11 Voltage conver sion ratio
ww
M(l), K) , buck converter. 0.4
w.E 0.2
asy 0.0
0.0 0.2 0.4
D
0.6 0.8 1.0
En
gin
t D
for K> Kc,;,
( (5.29)
M= 2
l +[t4~1,1
for K < K, ,;,
eer
ing
where the transistor duty cycle D is identical to the sub interval l duty cycle D 1 of the above derivation.
These characteristics are plotted in Fig. 5.11, for several values of K. It can be seen that the effect of the
.ne
discontinuous conduction mode is to cause the output voltage to increase. As K tends to zero (the
unloaded case), M tends to unity for all nonzero D. The characteristic s are con tinuous, and Eq. (5.28 )
intersects the CCM characteristic M = D at the mode boundary.
5.3 BOOST CONVERTER EXAMPLE

t
As a econd example, consider the boost converter of Fig. 5.12. Let's determine the boundary between
modes, and solve for the conversion ratio in the discontinuous conduction mode. Behavior of the boost
converter operating in the continuous conduction mode was analyzed previously, in Section 2.3, and
expressions for the inductor current de component/ and ripple peak magnitude Ai 1_ were found.
When the diode conducts, its current is identical to the inductor current ii(I ). As can be seen
from Fig. 2.18, the min imum value of the inductor curre nt during the diode conducti on subinterva l
DT < t < T is (l - 6.il ). If this minimum current is positive, then the diode is forward-biased for the
entire subin'terval zn:,
-< t < 1~, and the converter operates in the continuou s conduction mode. So the
conditions for operation of the boost converter in the continu ous and discontinuous conduction modes
are:

118 The Disco11tin11

ous Conduction Mode
i(t ) L D, i0 (t)
+ vlt) - +
Fig. 5.12 Boos! converter example.

~ Q, C R v(t)
ww I> Ji. for CCM

1 < oiL for DCM
(5.30 )
w.E
wh ic h is ide nti ca l to the re sults for the buck converter. Sub stit uti on of the CCM solutions for / and t',.i1,,
Eqs. (2-39) and (2-43), yields
(5 .31)
asy
forCCM
Th is eq uat ion can be rearra nged to obta in
En
.14-
H7,
> DD"2 for CCM (5.32 }
wh ich is in the standard form

gin
K > K,.,,JD)
K < K ,,,,(D)
for CCM
for DCM
eer (5.J3)
0. 15 . .......
....
ing
.K,ri,b)= 2j
.ne
0.1
t
Fig. 5.13 Boost convc11cr K,_.,;,(D) vs. D.
0.05
0
0 0.2 0.4 0.6 0.8
D

5.3 Boost Converter Ernmple 119
0.15
::; CCM
uu
K > Kcr11
0. 1
Fig. 5.14 Compari~on of K with K,., ,1(0).
ww 0.05
w.E
asy 0
0 0.2 0.4 0.6 0.8
En
D
where
K = .J,L..
RT,
and
gin
K";,(D) = DD' 2
eer
The conditions for operat ion in the continuous or discontinuous co ndu ction modes are of sim ilar form to
those for the buck converte r ; however , the critica l va lue K.,,;,(D) is a d iffe rent function of the duty cyc le
D. The dependence of K 0 ,; 1(D) on the dut y cycle Dis plotted in Fig. 5. 13. K,.,,-1 (D) is zero at D = 0 and at
ing
D = I , and has a maxim um va lue of 4/27 at D = 1/3. Hence, if K is gre ater than 4/27 , then the converter
operates in the continuous conduc tion mode for all D. Figure 5. 14 illustrates what happens when K is
less than 4/27. The converter then operates in the discontinuous conduct ion mode for some intenn ediate
.ne
range of values of D near D = 1/3. But the co nve1ter operates in the con tinu ous conduct io n mode ne.u·
D = 0 and D = I. Un like the buck converter, the boost conve rter must opera te in the continuous conduc -
tion mode neiu-D = 0 because the ripple magnitude approaches zero while the de component I does not.
Next, let us analyze the conversion ratio M = VIV8 of the boost converter. When the transis tor
conducts, for the sub inter val O < t < D iT, , the convener circuit reduces to the circuit of 5.15(a). The t
inductor voltage and capac itor current are given by

{5.34)
Use of the linear ripp le ap proximation, to ignore the output capacitor volt age ripple, leads to
(5.35)
Dur ing the second sub int erva l Dt T, < t < (D 1 + D 2 )T_,. the diode conducts. The circu it then reduces to

120 TireDiscontim101
1s C01u/r1ctio11Mode
i (t) L
ic(.t) +
C R v(t)
i (t) L
ww
Fig. 5.15 Boost cor,verter circuits; (a) <luring
subintcl'val 1, 0 < t < D,T,. (b) during subinterval 2.
D 1T, < t < (D 1 + D 2)1~. (c) during subinterval 3,
iJ.t)
+
w.E
(D1 + Di)r, < r < '/~. vc C R v(t)
asy i(t) L
+
En C
ic(t )
R v(t)
gin
Fig. 5. 15(b). Th e ind ucto r voltage and ca pac itor c urre nt are give n by
eer
VL(t) = V.,,.
- v{t)
. ( ) = 1'(t ) - v{t)
le t -R ing {5.36)
.ne
Neg lect of the out put ca pac itor vol tag e ripp le y ields
v1,(r)
i( (r)
= v~- v
~ i(I) -* (5.37 )
t
Th e inductor curr e nt ripp le has not bee n neg lected.

Durin g the thi rd sub interv al, (D 1 + D2 )T,. <I< T,, both tra nsistor and diode are in the off sta te,
and Fig . 5. 15(c) is ob tained . The network equa tio ns are :
vl =O , i=O
(5.38)
. ( J-
l e.· t --
v(/)
R
Use of the sma ll-ripple approx ima tio n yields

5.3 Boost Co111

1erter Example 121
Fig. 5,16 Inductor voltage waveform v 1,(t), boost v,

converter opera1ing in disco11tinuous conduction -0 1r, +- D2T, - j+ D3T,
mode.
! 0
T, t
ww VL(I) =0
il{I) = -i (5.39)
Equations
w.E
(5.35) , (5.37) , and (5.39) are now u sed to sketch the inductor voltage waveform as in Fig.
5.16. By vo lt-second balan ce, this waveform must have zero de compo nent when the converter operates
in steady state. By equat in g the average value of th is v1.(t) waveform to zero, one ob tain s
asy (5.40i
En
Solution for the ou tpu t vo ltage Vy iel d s
{5.41)
gin
The diode duty cyc le D2 is aga in an unknown , and so a second equ ation is needed for el imin at ion of D 2
befor e the output vo ltag e V can be fou nd .
eer
We can again use capacito r charge ba lance to obtain the second equatio n. The connecti on of the
output capac ito r to its adjace nt components is deta iled in Fig. 5. 17. Unlike the buck co nverter , the diode
in th e boost converter is connected to the output node. The node equat ion of Fig. 5. 17 is
. ( ) ,J ) v(I) ing (5.42)
.ne
tnl = 10 1 +--y
where jfJ(t) is the d iode cu rrent. By capacito r cha rge bal ance, the capacito r curre nt ic;(t)mu st ha ve zero
de com ponent in stea dy state. Therefore , the diode curre nt de component (i 0 ) mu st be equal to th e de
compone nt of the load curre nt:
(5.43)
t
So we need to sketc h the d iode current waveform , and fin d its de co mp onent.
Fig. 5.17 Connection of the output capacitor to ndjacent components id,t) +

in the boost converter.
C R v(t)

122 The Disco11tin11om

Conduction Mode
(a) i(t)
Fig. 5.18 Boo st convener waveform s

~
ww
in the discontin uous w ndoction mode: 0 D~
(a) indnctor currem i(t), (b) diode Gum:nt )--D 1T1 -j----D 2T.-- +[
j•D 3T_,
i/)(1).
(b)
w.E
asy
En
( j D ) ......... ..................... ............ ... ······-··· ··········· .. ········- ·· ·········-
0 DT, T,
)--D
gin 1T, -j----D 2Ts-j+D 3T,~
eer
The wa ve forms of the inductor curre nt i(I) and diode curre nt iv(/ ) are ill ustrated in Fig. 5.18.
The ind uctor cur ren t beg ins at zero, and rises to a peak va lu e if'k d urin g the first subinterv al. Thi s peak
va lue ip, is eq ual to the slope V/L, mult ipli ed by the length of the first subi nte rval, D 1T,:
ing (5.44)
.ne
The diode conducts during the second subin terva l, and the indu ctor curr ent then decreases to zero, whe re
it remains dur in g the third su bi nterva l. The diode c urrent i 0 (1) is identica l to the induc tor current i(I) dur-
ing the second su bin terval.
iD(r) is zero.
The de componen
During the fir st and th ird subi ntervals, the diode is reve rse•biase d and he nce
t of the d iode cu rrent, (i 0 ), is: t

{5.45)
The integ ral is the area under the io(t) waveform . As illu st rated in Fig. 5. l 8(b), thi s area is the area of the
tr iang le hav in g peak value i1,, and base dim ension D 2 T, :
(5.46}
Substitu tio n of Eqs. (5.44) and (5.46) into Eq. (5.45) leads to the following exp ression for the de co mpo-
ne nt of the diode cu rr ent :

5.3 Boost Converter Example 123
(5.47)
By e q uati ng this exp ress ion to the de load cu rr ent as in Eq. (5.43), one obtai ns the final res ult
VgD1D 27~ V (5.48)

- 2L =R
So now we have two unknown s, V and D 2 • We h ave two equat ion s: Eq. (5.41) ob tai ned via inductor vo lt-
seco nd balance , and Eq. (5.48) obta in ed usi ng capacitor char ge bal ance. Let us now e li minate D2 from
ww
this system of eq uat io ns , and solv e for the output voltage V. So lut ion of Eq . (5 .41) fo r D 2 yields
(5.49)
tion :
w.E
By inse rting thi s res ult int o Eq. (5.48), an d rearranging terms , one obtains th e fo ll owing qu adratic equa -
asy v2 - vvK - -"-'

K -
y2
- o
02 {5.50)
se of the qua drati c for mu la yiel ds

EJ n
y
VK =
l ±
z
4D
I +-i/
gin
2
(5.51)
eer
Th e quad ra tic e quati on ha s two roots: one of the roots of Eq. (5.5 1) is posit ive , w h ile the othe r is nega-
ti ve. We alr ead y know th at the output vo ltag e o f the boost conve rter shoul d be posit ive, and indee d, from
ing
Eq . (5.41), it can be seen th at V/Vi mu s t be pos itive sinc e the dut y cyc les D 1 and D 2 are pos itive. So we
shou ld se lec t the pos itive root:
.ne
(5,52)
where
valid for
}( = 21./RT,
K< K"' 1(D)
t
T hi s is the so lut io n of the boost converte r operatin g in the disco ntinuo us condu ctio n mode.
Th e complete boost co nverter charac teri stics, incl ud ing both co ntinuou s and disco nti nuous con -
du ctio n modes , are
_l_
1- D for K > K" "
M= (5.53)
1 +y.--1 + 4D2
K for K < K,, 1,
2

124 The Discominuom Co11d

11
clio11Mode
5
M(D,K)
3
Fig, 5,19 Voltage conversion ratio M([),
K) of the boost cunve11er, including both
conti nuous and discontin uous conduction
ww
modes 2
w.E
asy 0
0 0.25 0.5 0.75
En
D
These charact eristics are plotte d in Fig . 5.19, for severa l val ues of K. As in the buck conve rter , the effect
gin
of the discontinuous co ndu ct ion mode is to cause the outpu t voltage to increase. The DCM portions of
the character ist ics are near ly lin ea r, and can be approximate d as
M~ -I + - D
2 .ff(
eer (5.54)
5.4 SUMMARY OF RESULTS AND KEY POINTS ing

.ne
Th e characteris tics of the b as ic bu ck, boost , and buck -boost are su mm ar ized in Table 5.2. Exp re ss ion s
for K,.,;,(D), as we ll as for the so lutio ns of the de convers ion rati os in CCM an d DCM, and for th e DCM
diode cond uct ion d uty cyc le D 2 , are g iven.
Table 5.2
The de co nversion ratios of the DCM b uck, boost , and buck-boost converters are co mpare d in
Summar y of CCM -DCM clrnracter istics for the buc k, boos t, an d bw.:k-boost conv erters
t
Converter Kcr,-
,(D) DCM M(D, K) DCMD 2(D, K) CCMM(D)
Buck (1-D) 2 K D
I +JI +4K/ D 2 0 M(D,K )
Boost D (l - D) 2 I + Jt +4D 2/K !M( D,K) _ I_

2 1-D
Buck-boot D .fK _ _Q_

(I - D) 2 - IT( 1-D
with K=2URT,, DCM occur s for K< K .(: f' I ~

5.4 Sw1111WT}'of Re.mils and Key Poillls 125
DCM
M(D,K)
Fig. 5.20 Comparison of de co11version

ratios of the buck-boost, buck, and boost
ww
converters operated in the discontinuous
conductio11 mode.
w.E
asy 0
0 0.2 0.4 0.6 0.8
En
D
gin
Fig. 5.20 . The bu ck-bo os t cha ra cte ri stic is a li ne wi th s lope I / Ji. T he c harac te ristic s o f the buck a nd
the boost co nverter s are bo th asy mpto tic to thi s li ne, as we ll as to the l ine M = I. Hence , when ope rated
eer
d eep ly into th e disco nt i nuous co ndu ction mo de, th e boos t co n ve rt er characte r is ti c becom es nea rly lin ea r
wi th slope l/ JK, es p ecially at h ig h duty cyc le. Lik ewise , th e buc k co nverte r charac te rist ic becomes
nearly lin ear with th e same slope, wh en opera ted deep ly into di sco nt in uous con du ct ion mode at low duty
cycle.
The fo ll owing are the key po in ts of thi s chapte r:
ing
.ne
I. The d isco ntinuous co nd uct ion mode occurs in converters con tain ing curren t- or voltage -unidirec tional
switches, when the induc tor curren t or capacitor voltage ripple is large enough to cause the switch current
t
or voltage to reverse polarity.
2. Co ndi tions for operatio n in the disco ntinuous co ndu ction mode can be fo und by deter mining whe n the
induc tor current or capac itor voltage ripples and de co mpone nts cause the switch on stale current or off
state voltage to reverse polar ity.
3. The de conversio n ratio M of conve rters operating in the discon tinuous cond uction mode can be fo und by
app licat ion of the principles of induc tor volt-second and capac itor charge balance.
4. Extra care is required when app lying the sma ll-ripple approxima tion . Some waveforms , such as the outp ut
voltage, should have small ripp le whic h can be neglected. Other waveforms , such as one or more induc tor
curren ts, may have large ripple that ca nnot be ignored.
5. The characte ristics of a converter changes sig ni fica nt ly when the converter enters DCM. The outp ut volt-
age becomes loatl-dependent, res ulting in an increase in the conver ter ou tpu t impeda nce .

126 TheDiscomim1011.1
Co11duclio11Mode
PROBL EMS
5.1 The elements or the buck-boost com•erter of Fig. 5.21 are ideal: all losses may be ignored. Your results
for parts (a) and (b) should agree with Table 5.2.
+
i(I)
T L C R V
ww
w.E Fig. 5.21
(a)
Buck-bo ost rnnverter of Prnblems 5. I :md 5. 13.
Show that the converter operates in discontinuous conduction mode when K < K,.,., and derive
(b)
asy
expressions for K and K.,.,.
Derive an expression for the de conversion ratio VIV~ or the buck-boost conven er operating m
discontinuous conduction mode.
(c)
(d)
En
For K = 0.1, plot VIVKover the entire range OS D S I.
Sketch the inductor voltage and current waveforms for K = 0.1 and D = OJ. Label salient fea-
(e)
tures.
gin
What happens to Vat no load (R • 00 )? Explain why, physically.
eer
5.2 A certain buck converter contain. a . ynchronous rectifier, a. described in Section 4.1.5.
(a) Does this converter operate in the discont inuous conduction mode at light load? Explain.
(b) The load resistance is disconnected (R -, "" ), and the converter is operated with dury cycle 0.5.
5.3
Sketch the inductor current waveform.
ing
An unregulated de input voltage V¥ varies over the range 35 VS V1, S 70 V. A buck converter reduces this
voltage to 28 V; a feedback loop varies the duty cycle as necessary such that the converter output voltage
.ne
is always equal to 28 V. The load power varies over the range JOW S P 1,,.,,1 S IOOOW. The element values
are:
L= 22 µIf
Losses may be ignored.
(a)
(h)
C =470µ F f.. = 75 kHz
Over what range of \/~ and load current does the converter operate in CCM?
Determine the maximum and minimum values of the steady-state transistor duty cycle.
t
5.4 The transistors in the com•erter of

Fig. 5.22 are driven by the same
gate drive signal, so that they turn
+
on and off in synchronism with
duty cycle D.
(a) Determine the conditions v~ R V
under which this con-
verter operates in the dis-
cont inuous conduction
mode, as a function of the Fig. 5.22 Watkins-Jolmsnn converter of Problem 5 .4.
steady-state duty ratio D

Problems 127
and the dim ensionless pm·ameter K = 2URT_..

(b) What happens to your answer to Part (a) for D < 0.5?
(c) Derive an expression for the de conversion ratio M(D, K). Sketch M vs. D for K = 10 and for
K = 0. 1, over the range O :-:;D :-:;I.
5.5 DCM mode boundary analysis of the Cuk converter of Fig. 5.23. The capacitor voltage ripples are small.
ww R V
w.E
Fig. 5.23 c':uk con vc1ter, Problems 5.5, 5,6, 5.1 I, and 5.12
(a)
asy
Sketch the diode curre nt waveform for CCM operation. Find its peak value, in tem,s of the rip-
ple magnitudes C.iLI , il iL,, and the de componen ts / 1 and / 2 , of the two inductor currents i1_1(t)
and iL2 (l) . respectively.
(b)
En
Derive an expression for the conditions under which the Cuk converter operates in the discontin-
uous conductio n mode. Express your resu lt in the form K < Kcr,,(D ), and give formul as for Kand
gin
K0 ; 1(D ).
5.6 DCM conversion ratio analysis of the Cuk converter of Fig. 5.23.
(a) Suppose that the conver ter operates at the boundary between CCM and DCM, with the follow-
ing e lemelll and parame ter values :
f) "' 0.4 /, =J OOkH,,
eer
ing
V, = 120V R=IOQ
L 1 = 54 µH L 2 = 27 µ H
c l= 47 µr C2;;; lOOµF
.ne
Sketch the diode current waveform i0 (1), and the ind uctor current wavefo rms i 1(r} a11d/2{().
Label the magnitudes of the ripples and de components of these waveforms.
t
(b) Suppose next that the converter operates in the discontinuous co nduction mode, with a different
choice of paramete r and element values. Derive an analy tical expression for the de conve rsion
ratio M(D, K).
(c) Sketch the diode cmrent waveform iD(I), and the inductor curren t waveforms i 1(1) and ii( t), for
ope ration in the disco ntinuous conduction mode.

5.7 DCM mode boundar y analysis of the SEPIC of Fig. 5.24
(a) Sketch the diode current waveform for CCM operatio n. Find its peak value , in terms of the rip-
ple magnitudes ~iLI, 6.iu, and the de components / 1and / 2, of the two indu ctor currents i1..1(1)
and iu( t), respectively.
(b) Derive an expression for the conditions under which the SEPIC operates in the discon tinuous
conductio n mode. Express you r resu lt in the form K < 1<" 11(0) , and give formu las for K and
K,.,;,(D).
5.8 DCM conversion ratio analysis of the SEPIC of Fig. 5.24.
(a) Suppose that the converter operates at the boundary between CCM and DCM, with the follow-

128 The Discontimiom ConductionMode
R V
Fig. 5.24 SEPIC, Problems 5.7 and 5.B.
ww ing element and para me ter va lues :

D ,_ 0.225
V6 = 120V
f, = 100 kH1.
R,_ 10.Q
w.E LI =50 µH
C 1 =4 7 µf
l2 =75 µH
C2 = 200 µP
Sketch the diode curre nt wavefo rm iD(I), and the inducto r c urren t waveform s i 1(r) and i2(1)
asy
Label the magn itudes of the ripples and de componen ts of these wavefo rms.
(b) Suppose next tha t the converter operates in the d isco ntinu ous conduction mode, with a d iffer e nt
choice of parame ler and eleme nt values. Derive an ana lyt ical expression fo r the de conver sion
En
ratio M(D, K).
(c) Sketch the diode curren t wavefor m i/J(t), and the ind ucto r current wavefo rms i 1(r) and i2(1), for
opera tion in the discon tinuo us cond uction mode.
5.9
gin
An L-C input filter is added to a buck converter as illustrated in Fig. 5.25. Indu ctors L 1 and L, and capac-
itor C 2 are large in value, such that their sw itch ing ripples are small. A ll losses can be neglec ted.
ii
L,
+
Q,
eer ~
+
v, Ci VI
T DI C2
ing R y2
.ne
Fig. 5.25
(a)
Buck.converter with inpU!filter, Problems 5.9 and 5. 10.
Sketch the capac itor C 1 voltage wavefor m v 1(1), and derive express ions for it s de compo nent V1 t
and peak ripple mag nitud e L'i.v 1.

O>) The load curren t is increased (R is decreased in value ) such tha t L'i.v 1 is greater than V1.
(i) Sketch the capa citor voltage wavefor m v 1(/) .
(ii) For each sub inte rval, determi ne wh ich semico nductor devices co nduc t.
(iii) De termine the conditions un der wh ich the discon tinuo us conduc tion mode occ urs.
Expre ss yo ur resu lt in the form K < Kc,j, (D ), and give for m ulas for K and K,.,1,(D).
5.10 Der ive an expression for the convers ion ra tio M (D, K) of the DCM converter desc ribed in the previous
problem . Note: D is the transistor d uty cycle.
5.11 In the Cuk convener of Fig . 5.23, ind uctors L, and L 2 and capac itor C 2 are large in value, such that th eir
switc hin g ripp les are small. All losses can be neglected .

Problems 129
(a) Assuming that the converter operates in CCM, sketch the capacitor C 1 voltage wa\•eform •·c (1).
1
and derive expressions for its de component V, and peak ripple magnitude 6."<-
·i·
(b) The load current is increased (R is decreasedin value) such that t. vci is greater than V1•
(i) Sketch the capacitor voltage waveform vc1(r).
(ii) For each subinterval, determine which semiconductor devices conduct.
(iii) Determine the conditions under which the discontinuous conduction mode occurs.
Express your result in the form K <: Kc,;,-{D}, and give formulas for Kand K,,;,( D).
5.12 Derive an expression for the conversion ratio M(D, K) of the DCM Cuk converter described in the previ-
ous problem. Note: D is the transistor duty cycle.
ww
5.13 A DCM buck-boost converter as in Fig. 5.2 1 is to be designed to operate under the following conditions:
136 V ,;; V, ,;;204 V
w.E 5W$P
V=-150V
1,.11,1S
f. = 100 kl-11-
lOOW
asy
You may assume that a feedback loop will vary to transistor duty cycle as necessary to maintain a con-
stant output voltage of - 150 V.
Design the converter, subject to the following considerations:
En
The converter should operate in the discontinuous conduction mode at all times
Given the above requirements, choose the element values to minimize the peak inductor current
The output voltage peak ripple should be less than l V.
Specify:
(a) The inductor value L gin
(h)
(c)
The output capacitor value C
The worst-ca. e peak inductor current i1,,
eer
5.14
(d) The maximum and minimum values of the transistor duty cycle D
ing
A DCM boost converter as in Fig. 5. 12 is to be designed to operate under the followi ng conditions:
.ne
18V<;;V,~36V
S W $ P1'"" ' ,;; 100 W

V==48 V
.t; =: 150kHz
You may assume that a feedback loop will vary to transistor duty cycle as necessary to maintain a con-
stant ou1put voltage of 48 V.
t
Design the converter, subject to the follow ing considerations:

The converter should operate in the discontinuous conduction mode at all times. To ensure an
adequate design margin, the inductance L should be chosen such that K is no greater than 75% of
K,,;, at all operating points.
Given the above requirements, choose the element values to minimize the peak inductor current.
The output voltage peak ripple should be less than IV.
Specify:
(a) The inductor value L
(h) The output capacitor value C
(c) The worst-case peak inductor current ip,

130 The DiscontinuousCo11d11

ctio11Mode
(d) The maxim um and m in imum va lues of the tran sisto r duty cycle D.
(e) The va lues of D, Ka nd Ker,, at the fo ll owing o perating poi nts: ( i) V~= IH V and P1,,,,,1 = 5 W ; (ii)
I\= 36 V and P10,.,1 "' -~ W ; iii) V_i = 18 V and P1,,,,,1 = 100 W ; (i v) VR= 36 V andP 1,,,,.1 = 100 W.
5.15 In de-de co nverter s used in battery -powered portab le equ ipment , it is somet ime s re q uire d th at the con-
verte r co nt inue to reg ulate its load voltage wi th hi g h effic ie ncy w hil e the load is in a low -power "s leep"
mode . The power req uired by the tr ans istor gate drive circuitr y, as well as much of the s wi tc hi ng loss, is
dependent on the swi tc h ing fre que ncy bu t not on the load curren t. So to obta in high eff ic ie ncy at very
low load powe rs, a va ri ab le-frequency con tro l scheme is used , in w h ic h the swit ch ing freque ncy is
reduc ed in prop ortion to th e load c ur ren t.
Co nside r the boos t co nverter syste m of Fi g. 5.26(a). The battery pack con sists of two nickel-ca d·
ww m ium cell s, w hi c h produce a voltage of V, = 2 .4 V :!: 0.4 V. The conve n er boos ts thi s voltage to a reg u·
lated 5 V. As illustrated in Fig. 5.26(b), the converter operate s in the discontinuou s conductio n mode,
with cons ta nt transistoron ·t ime 1.,11• The t rans istoroff - time l,~1 is varied by the controlle r to regu la te th e
w.E
o utpu t voltage.
(a) r,, .... .. ... .. . .. ... .... ... _ .. , ;...
· --_r
M
L l1oad,......................
! •:.:
,.
!
asy !V
8
___
---1
________......!_..,
C i
!
R v(I) i
i
En
!,_!
.
.._....... .._ .._ i

:
Fig. 5.26 Boml COt\- i._•••••-••••• .. •·•.. ••l : n •••• -H• • .. ••• • n •j
vencr emp loyed in purrnhlc Batterypack Effectiveload

battery.p owered equipment
with s leep rnude, Prnbl'"m
'i . 15: (a) co nverter c ircuit ,
(b) i(t)
gin
{b ) inducto r c urrent wave-
form.
eer
ing
.ne
(a) Writ e the equations for the CCM · DCM boundary and co nversion ra tio M = VIV!/. in term s of 1,,,.,
r,11, L,and the effective load resista nce R_ t
For par ts (b) and (c), the load cu rr en t ca n va ry be twe en 100 µA and l A. The tran sistor o n tim e is fixed:
1,,.,== 10 µs.
(b) Select values for L and C such th at:
The ou t pu t voltage peak ri pp le is no gre ater th an 50 mV,
The converter a lways opera tes in DCM , and
The peak indu cto r cur re nt is as s ma ll as possible_
(c) For yo ur des ign of pa rt (b), w ha t are the m ax i m um and m i nimum val ues of t he switc hin g fre.
que ncy 'I

6
Converter Circuits
ww
w.E
asy
En
gin
We have already analyzed the operation of a nu mber of d iffere nt types of converte rs: buck, boost,
eer
buck- boost, Cuk, voltage -source inverter, etc. Wit h these conver ters, a numberof differe nt functions can
be performed: step-dow n of voltage, step-up, inversion of polarity, and convers ion of de to ac or vice-
versa .
ing
It is natu ra l to ask, Where do these converters come fro m? Wha t other co nverters occur, and
wh at other fu nct ions ca n be obtaine d? Wha t are the basic relat ions betwee n co nverters? In this chapter,
several differe nt circuit manip ulations are explored, which exp lain the origins of the basic converte rs.
.ne
Inversion of source and load tra nsfo rms the buck converter into the boost converter. Cascade connect ion
of conve11ers, and simplificatio n of the resulting circuit, shows how the buck- boost and C uk converters
t
are based on the buck and the boost converters. Different ial connec tion of the load betwee n the outpu ts
of two or more converters leads to a single-phase or polyphase inverter. A short list of some of the better
know n converter circu its follows this disc ussion.
Tr ansfo rmer-isolated de-de conv erters are also covered in this chapter. Use of a transfo rm er
allows isola tion and multip le outpu ts to be obta ined in a de-de converter, and can lead to better converter
optimization when a very large or very small co nvers ion ratio is req uired . The tra nsfor mer is modeled as
a magnet izi ng inducta nce in paralle l wit h an ideal transfor mer; thi s allows the analys is tec hniques of the
previo us chapters to be exte nded to cover converters conta in ing tra nsfor mers. A num ber of well-kn own
isolated converters, based on the buck, boost , buck- boos t, single-e nded pr ima ry ind uctance converter
(SEPIC), and Ctik, are listed and discussed .
Finall y, the evalua tion, selection, and design of converters to meet given requi rements are con-
sidered. Importa nt perfo rmance -related attributes of transfor mer -iso lated conve rters incl ude: whet her the
tra nsformer reset process imposes excessive voltage stress on the trans istors, whether the conver ter can
supp ly a high -cur rent o utput w itho ut impos ing excess ive current stresses on the seco ndary -side compo-
nents, and whether the conve11er can be well-optimized to operate wit h a wide range of operating points,

132 Converter Circu its
L
+
Fig. 6. I The basic buck t:onverter. 2
C R V
tha t is, with lctrge tolera nces in V8 and P 1,H,d' Swi tch ut ilizatio n is a s impl ified figure -of-me rit th at mea -
ww
sures the ratio of the converter outp ut power to th e total tr ansistor vol tage and current stress. As the
sw itch uti lizat ion increases, the converte r eff icie ncy increases whil e its cost decreases. Isolated convert -
ers with large variat ion s in opera ting point tend to uti lize their power devices more poorly than noniso-
w.E
lated converters whic h function at a sing le operat ing point. Comp uter spreads heets are a good tool for
op tim iza tio n of power stage desig ns and for tra de studies to select a converter topology for a given appli-
catio n.
6.1
asy
CIRCUIT MANIPULATIO NS
En
The buck converter (Fig. 6.1) was develope d in Ch apter 1 usin g bas ic prin ciple s . The sw itc h red uces the
voltage de co mpone nt, and the low-pass filter removes the sw itchi ng har monics. ln the co ntin uou s co n-
gin
duction mode, the buc k converter has a conversion ratio of M = D. The buck converte r is the simplest and
most basic circuit , from which we will derive other converters.
6.1.1 Inversio n of Source and Loa d

eer
ing
Let us co nsider first what happens when we interc ha nge the power input and power output ports of a con-
verter. In the buck conve rter of Fig. 6.2(a), voltage V1 is app lied at port I , and voltage V2 appears at port
2. We know that
.ne
(6 . 1)
Thi s equa tio n c,m be derived usi ng the pr incip le of induc to r volt-seco nd balance , with the ass um ption
that the converter operates in the co ntinuous co nd ucti on mode . Provided th at the swi tch is realize d such
that this assu mptio n holds, then Eq. (6. 1) is true regar dless of the d irec tion of powe r flow.
t
So let us int erc han ge the powe r source and load, as in Fig. 6.2(b). The load, bypasse d by the
capacitor, is connecte d to converter port 1, whi le the power source is connected to co nverter port 2.
Power now flows in the opposi te d irectio n through the converte r. Eq uation (6 . 1) mu st still hold ; by solv-
ing for the load voltage V1, one obtains
(6 .2)
So the load voltage is greater tha n the source voltage. Figure 6.2(b) is a boost converter , draw n back-
wards. Equation 6.2 nearly coincides wit h the famil iar boost converte r result, M (D ) =1/!Y, except that D'
is replaced by D.
Since power flows in the opposite directio n, the sta ndard buck converter unidirectio na l swit ch

6.1 Cirrnit Ma11ip11

/ations 133
(a) Port I Port 2

L
I
+ +
2
ww
Power fl ow
(b) Port I Port2

L
w.E
I<'ig. 6.2 Inversion or source and
load transforms a buck conven er
into a boost co nve11er: (a) buck con -
+
2
+
asy
vene r, (b) inversion of .~ource and
load, (c) realization of ~witch.
v. Vz
En Power flow
(c)
gin
Port I
L
Port2
+
eer +
vi
ing
V2
.ne
t
Powerflow
rea li zatio n can not be used w ith the ci rc uit of Fig. 6.2(b). By follow ing th e dis c us sio n of Chapter 4, one
finds tha t the sw itch ca n be rea lized by co nne cting a trans istor betwee n th e in ductor and ground, and a
diode from the indu ctor to the load , as shown in Fig. 6.2(c). In consequence, th e transistor duty cycle D
beco mes the fraction o f time w hic h the single -pole do uble -throw (SPDD switch of Fig . 6.2(b) spe nds in
po siti on 2, rath er th a n in po sition I. So we shou ld interch ange D w ith its co mplement D ' in Eq. (6.2), and
the conve rsion rat io of the converter of Fig. 6 .2(c) is
(6.3)
Thu s, the boost converter can be viewed as a buck converter havi ng the source and load connect ions
exc hanged, and in which the swi tch is realized in a mann er tha t allows reversa l of the direct ion of powe r
flow .

134 Converter Cirrnits
Converter 1 + Converter2 +
V
ti = M z(D)
ww
flg. 6.3 Cascade connection of converters.
D
6.1.2
w.E Cascade Connection of Converters
asy
Converters can also be co nnected in cascade , as illust rate d in F ig. 6.3 [ 1,2]. Co nverter I has co nvers ion
ratio M 1(D), such that its o ut put vo ltage V1 is
En (6 .4)
gin
T hi s vo lt age is appl ied to the input of the seco nd co nverter. Let us ass um e th at co nve rter 2 is dri ve n w ith
the same duty cycle D applied to converter I. lf converter 2 has conversion ratio Mi( D), then the out put
vo ltage Vis
eer (6.5 }
Sub stituti on of Eq . (6.4) into Eq. (6.5) y ield s
t..=M(D) = M , (l))M 1 (D) ing (6.6)
.ne
Hence, the conve rsio n ra tio M(D ) of the co mpos ite co nve rter is the pro du ct of the ind i v ictua l conve rsion
ratios M 1(0) and M 2 (D).
Let us co nside r the case where co n verter I is a bu ck conve rter, and co nverte r 2 is a boos t con -
verter. The res ultin g c ircuit is illu str ated in Fig. 6.4. The bu ck co nve rter ha s co nver sion ratio t
Vt -D (6.7 )
V -
•
The boost converte r has co nversion ratio
(6 .8)
So the co mpos ite con version ratio is

6. I Cirrnif Manipulations 135
+ +
2
R V
ww
Fig. 6.4
Buck converter Boost converter
Cascm.lcconnection or buck converter and \Joosl <.:onvertcr.
w.E 2
+
2
asy R V
En
gin
eer
+
ing
.ne
Fig. 6.5 Simrlification of the ca~cad ed buck and \Joos 1 con verter circ uit of Fig. 6.4 : (a) renw val of cu pacitol' C 1.
(b)combining of in d uctors L 1 and L?.
(6,9)
t
The composite conve rter has a no nin ver tin g buck- boost co nver sion ratio . The voltage is reduced when
D < 0.5, and increased when D > 0.5.
The circu it of Fig. 6.4 can be sim plified considerably. ote that inductors L 1 and Li,alon g with
capaci tor C 1, form a three-po le low-pass filter. The conve rsio n ratio does not depen d on the numbe r of
poles prese nt in the low-pass filter, and so the same steady-sta te ou tput voltage shou ld be obtain ed when
a si mpl er low-pa ss filter is used. In Fig. 6.S(a), ca pac itor C 1 is removed . Inducto rs L 1 and L2 are now in
series, and can be co mb ined into a si ngle inducto r as shown in Fig. 6.S(b). Th is converter, the non invert -
ing buc k- boost co nverter, co ntinues to ex hibit the convers ion rat io given in Eq. (6.9).
The switches of the converter of Fig . 6.S(b) can also be s implifi ed, lea din g to a negat ive out pu t
voltage. When the sw itches are in pos ition I, the converte r red uces to Fig. 6.6(a). The inductor is con-
nected to the input source VR, and energy is tra nsferre d fro m the source to the indu ctor. When the

136 Convener Circuits
(a) (b ) +
+
V v, V
Fig. 6.6 Connections ot the circuit of Fig. 6.5 (1i): (a) while th~ switd1cs arc in position 1, (h) while the switclie;
are in position 2.
ww (a) +
V
(b) +
w.E
asy
Fig. 6.7 Rcv<.:rsu]of the output vol tage polarity, by reversing the imha :tor cnnnc,ctio11s while the ~witches arc in
position 2: (a) connect ions with th~ switches i11position l, {b) connectio11swith lhc switche s itl positio112.
En
switches are in po siti on 2, the co nverte r reduces to Fig. 6.6(b). The indu ctor is then con nected to the
load , and e nergy is transferred fro m the inductor to th e load. To obt ain a nega tive ou tpu t , we can s impl y
gin
reve rse the pol a rit y of th e inductor du rin g one of the sub in te rvals (say, whi le the switches are in positio n
2). The in d ividual c ircuits of Fig. 6.7 are the n obtai ned , and the co nver sion rat io becomes
eer
V _ D (6.10)
v;- - 1...D
ing
Note that one side of the inductor is now always connected to ground, while the other side is switc hed
between the inp ut source and the load. Hence on ly one SPOT sw itch is needed , and the con verte r c ircu it
of Fig. 6.8 is obtained . Figure 6.8 is recog nized as the convention al buck- boost conver ter.
Th us, the buck- boost converter can be viewed as a cascade con nection of buck and boost con-
.ne
verters. The prope rties of the buc k- boost co nverter are co nsisten t with thi s vi ewpo int. Indeed , the equ iv-
a lent circ uit model of th e buck -boost converte r cont ain s a 1:D (buck) de tra nsforme r, follo wed by a O' : I
(boost ) de transfo rmer. The buck - boost converte r inher its the pu lsa tin g input curr ent of the buck con-
verter , and the pul sat ing output current of th e boost converte r.
Other converte rs can be der ive d by casca de connections. Th e Cttk co nverter Fi g . 2.20 ) was t
ori gi na ll y derived [1,2] by cascad ing a boos t converter (co nvert er I), fo llowed by a buck (converter 2). A
negative output volt age is obtained by reve rsing the polarity of the int e rn a l capacitor connect ion dur ing
one of the s ub interv a ls; as in the buck - boos t converter, thi s opera tion has the add itio nal bene fit of redu c -
in g the n umb e r of swi tches . The equ iva lent c ir c ui t model of the Cuk conve rter co ntain s a !) ': I (boost )
2 +
Fig, 6.8 Convertel' circuit oht:iincd from the
suhcin :uits of Fig. 6.7 . V

6.1 Circuit Ma11ip11/

atio11s 137
ideal de transfonner, followe d by a 1:D (buc k) idea l de transformer. The Cuk co nverter inh er its th e no n-
pu lsa tin g input c urre nt prope rty of the boost converte r, a nd the non pul sat in g o utp ut curre nt pro perty of
the buck co nverte r.
6.1.3 Rotation of Three-Terminal Cell
The buck , boost, and buck - boost converters each con tain an inductor that is co nnected to a SPOT swi tch.
As illustrated in Fig. 6.9(a), the inductor -sw it ch network ca n be viewed as a basic cell having the three
ww
terminals labeled a, b, and c. lt was fir st pointed ou t in [1,2], and late r in [3], that th ere are three dis tin c t
ways to connec t th is cell betwee n the source and load. The co nn ections a- A b- B c- C lead to the bu ck
co nverte r. The con nect io ns a- C b-A c- B amount to in versio n of the source an d load, and lea d to the
w.E
boost converter. The co nn ec ti ons a- A b-C c- B lead to the buck -boost converter. So the buck , boost, and
buck- boost converters could be viewe d as being based on the same inducto r- swi tch cell , with d iffe ren t
sow-ce and load connectio ns.
A dual th ree -term ina l network , cons istin g of a capac itor -sw it ch cel l, is illustra ted in Fig. 6 .9(b).
asy
Filte r in ductors are con nec te d in ser ies with the source and load, suc h that th e co nverter in pu t and output
currents are nonpu lsa tin g . There are aga in three possible ways to co nnect thi s cell be twee n the sou rce
and load. The connect ion s a- A b- B c- C lea d to a buck converter with L-C inpu t low-pass filter. The con -
En
nections a- B b- A c- C co incide with in ve rsio n of source and load, and lead to a boost co nverter with an
added output L-C filter sect ion. The connection s a- A b- C c- B lead to the Cuk converter.
gin
Rotation of more comp licated three -term inal ce lls is ex plored in [4].
(a) eer
ing
+
.ne
t
V
(b)
v, V
Fig. 6.9 Rotation of thl'ec-terminal swi tch cells: (a) switch/inductor cd l, (b) swilchlcapac itor ct:IJ.

138 Co11
ve11er Circuits
de source load
Converter 1
+
v.
V1 =M (D) Vg +
V
-. .
ww vs
w.E -. Converter 2
+
V2
asy V2 =M (D') V8
E- n D'
-.
gin
Fig. 6.10 Obcaining ,1bipo lar otupuc by diffore ntial conncc cion of load.
6.1.4 Differentia l Connection of the Load

eer
ing
[n in verte r app licat ions , where an ac out put is re qui re d, a conver ter is needed th at is cap ab le of pro du c in g
an out pu t vo ltage of eit her pola rity. By varia tio n of the dut y cycle in th e com x t manne r, a s inu so idal o ut-
.ne
put voltage hav ing no de bi as can then be obtained. Of the converters studied so far in th is chapter, th e
buc k and the boost ca n produce o nl y a pos itive unipo lar out put volt age, while the buck - boost and Cuk
co nverter pro duce only a negative un ipolar output voltage . How ca n we derive conve rters th at ca n pro-
duce bip olar o ut put vo ltages?
A we ll -kn ow n tec hniqu e for ob ta in ing a bip o lar outp ut is the differen ti al co nnectio n of th e load
across the outp uts of two kn ow n converters , as ill ust rat ed in Fig. 6. 10. If converter I produces voltage V1,
and converte r 2 prod uces voltage V2 , th en the load vol tage Vis given by
t
(6 . 11)
Alt h oug h V 1 and V2 may both indiv idually be pos itive, the loa d voltage V c an be e ither pos itive or nega-
tive. Typica lly, if conve rter I is d ri ven wi th duty cyc le D, th en co nve rter 2 is dri ve n wi th its co mpl ement ,
D'. so tha t when V 1 incre ases , V2 dec reases , and vice versa.
Severa l well -kn own in verter circ uits ca n be de rive d using the di fferen tial connec tion. Let's rea l-
ize co nverters I and 2 of Fig. 6. 10 using buck co nverte rs. Fi gure 6. 11 (a) is o bt ained. Co nverter 1 is
d rive n w ith dut y cycle D, whi le converter 2 is dr iven wi th du t y cycle D'. So whe n the SPOT sw itc h o f
converter I is in the up per posit ion, then the SPOT sw itch of co nverter 2 is in the lower posit ion, and
vice -versa . Conve rter I then prod uces output voltage V1 = DVs , wh il e conve rter 2 produces o utpu t volt -

6. I Circuit Mani pulations 139
(a) Buckconverter l
+
2
v,
+
V
ww vg
-.
w.-E 2
asy V2
-. En
gin
Buck converter 2
(b)
eer
ing
l .ne
+
V
vg
. t
-.
Fig. 6.11
I .
Der ivation of br idge inve1t cr (H-brid ge) : (a) diffe rential conrie c1ion o f load acros s outputs of buck con -
verte rs, (b) bypas s irtg loat.l by capacitor, (c) co mbining se ries inductors, (<l) ci rcuit (c) red rawn in its usua l for m .

140 Converter Circuits
(c)
l .
+
ww -.
2
w.E
asy 1 .
(d)
En C
gin + V -
2
eer
R
Fig. 6.11 Continu ed

ing
.ne
M(D)
l
t
I D
- 1
Fig. 6.12 Conversion ratio of the H-bri dge invener cir cuit.

6. 1 Circuit Manipulations 141
age V2 = D'Vi:. The di ffe rent ial load voltage is
V =D V,- D'V, (6. 12)
Simp lific ation leads to
V = (2D- l ) V, (6. 13)
Thi s equ ation is plotte d in Fig. 6. 12. It can be seen the out put voltage is pos itive for D > 0.5, and neg ative
for D < 0.5. If the duty cycle is varied sinusoidally about a quiesce nt operating point of 0.5, then the out-
ww
pu t voltage will be s inu soi da l, wi th no de bias.
TI1e c irc uit ofF ig. 6.1 1(a) ca n be si mp li fie d. It is u suall y desi red to bypass the load direct ly wit h
a cap acitor , as in Fig. 6. ll (b ). The two ind uctors are now effective ly in serie s, and ca n be combine d int o
w.E
a single indu ctor as in Fig . 6. 1l(c). Fig ure 6. 11(d) is iden tica l to Fig. 6. 1l(c), but is redra wn fo r clar ity.
This circ uit is co mmonly ca lled the H-brid ge, or brid ge inverte r ci rcuit , Its use is wides pread in servo
am pl ifie rs and single-ph ase inverte rs. Its pro perties are sim i lar to those of the bu ck co nverter, from whi c h
asy
it is de rived .
Polypha se inve rter ci rcuits can be derived in a si milar manner. A th ree -phase load can be co n-
nected differe nti all y across the output s of three de-de converters, as ill ustrate d in Fig. 6. 12. If the three -
En
phase load is bala nced, the n the neutra l voltage V,, wi II be equal to the average of the three co nverter out -
put voltages:
V.,=t(V1 + V2 + V1 )
gin (6. 14}
de source
Converter 1 + eer 3 1pac /.oad
V1 : M (D 1) V, v,
ing
.ne
vs - Di
-
-.
Converter2
V2 = M(DJ V,
+
V2
t
- --
Converter3 +
V3 : M (D 3) V, Y3
Fig. 6.1? Generation of tlc- 3<!)aci11vertcrby differential C(1nnection of 3¢ load.

(a) 3q>a
c load
de source +
l I
vi
v, ~ +
+
-
ww ~
l T
~
V2
w.E +
asy+ l I
-f
V3
(b)
de source
En 3<1>a
c load
gin
+ eer
ing
.ne
t
(c)
de source Jq>acload
ill
Fig. 6. 13 Dc- 3(j)ac inverter topo logies : (a) differential rnnne clion o f 31))load :1cro ss ou tputs of huck co nvcrtc:r, :
(b) , implilica tion o f low-pa~s filters to ohtain the dc- 1¢ac voltage-so urce inverter; (c) the clc- 3iflac c urrcm-soun;c
inverter.

6.2 A Short List of Converters 143
If the converter ou tpu t voltages V1, V2 , and V3 cont ain the same de bias, the n thi s de bias wi ll also appear
at the neutral poi nt V,,.The phase voltages Van • Vb"'and Ve,,are give n by
v.,,""v v,.
1-
v,i,t==vz - v1, (fi. 15)

V°' ==VJ~ VJJ
It ca n be seen that the de biases ca ncel out , and do not appear in V,,,.,Vb", and Vrn.
Let us realize converters I, 2, and 3 of Fig. 6. 12 usi ng buck converters . Fig ure 6.13(a ) is then
obt ained. The circu it is re-dra wn in Fig. 6. 13(b) for cl arity . This converte r is kn ow n by several names,
ww
inclu d ing the voltage-source inverter and the buck -derived three -phase br idge.
In verter circ uits based on de- de co nverters other th an the buck converter can be derived in a
s imila r manner. Figur e 6. 13(c) co ntai ns a three-p hase cu rrent-fed bridge co nver ter hav ing a boost -type
w.E
vo ltage co nversio n ratio, also know n as the rnrren1-source inverter . Since most inverter applicat ions
requ ire the ca pab ility to reduce the vo ltage m agn itude , a de-de buck co nverter is us uall y cascaded at the
de inpu t port of th is inverter. Several other exa mples of three -phase inverters are give n in [5- 7], in which
asy
th e co nverte rs are capa ble of both increasi ng and dec reasing the voltage magnitu de.
6.2 A SHORT LIST OF CONVERTERS
En
An infin ite number of co nverters are possible, and hence it is not feasible to list them al l. A short list is
give n here .
gin
Let' s co nside r first the cl ass of s in gle -inpu t si ng le-out pu t converte rs, co nt ai nin g a sing le ind uc-
tor. The re are a limited num ber of ways in wh ich the ind uctor ca n be con necte d betwee n the so urce and
eer
load. If we assum e th at the sw itch ing per iod is d ivided int o two subint ervals, the n the ind uctor sho uld be
connec ted to the source and load in one mann er duri ng the fir st subi nte rva l, and in a di ffere nt mann e r
ing
d uri n g the second subin te r val. One can exa mine all of the poss ible co mbi nat ions, to der ive the co mplete
set of conve rters in this class [8- 10]. By el imin ation of red unda nt and degenerate circ uits , one finds that
there are e igh t converte rs, listed in Fig. 6. 14. How the converte rs are coun ted can act uall y be a matter of
sema nt ics and personal pr eference; for examp le , many people in the field wo uld not co nsider the nonin-
.ne
verti ng buck- boos t conve rter as d isti nct fro m the inver ti ng buck- boos t. No netheless, it can be said th at a
conve rter is defined by the connect ions between its react ive e lements, switches, source, and load; by how
th e switches are re al ized ; and by the num erical range of re active element v,tlues.
TI1e first four converters of Fig. 6. 14, the buc k, boos t, buck -boost, and the noninverting buc k-
boos t, ha ve been previ o us ly discussed. These co nverte rs produ ce a un ipola r de output voltage. Wit h these t
co nvert ers, it is possi ble to increase , decrease , and/or invert a de voltage.

Converters 5 and 6 are capa ble of pro duci ng a bi po lar outp ut voltage . Converter 5, the
H- bridge, has previo usly bee n discusse d. Converter 6 is a noniso lated vers ion of a p us h- pull curre nt- fed
converter [ 11- 15]. T his conve rter can also produce a bipolar out put vo ltage; however , its conversio n r atio
M(D) is a non line ar function of dut y cycle. The number of switch elements can be reduced by using a
two -w ind ing indu ctor as show n. The fun ction of the ind uctor is si m ilar to that of the fly back co nverter ,
disc ussed in the next section . Wh en switc h I is closed the upper w ind ing is used, wh ile when sw itch 2 is
closed , c urre nt flows throug h the lowe r wind ing . The curr e nt flo ws thro ugh o nly one w ind ing at any
given instant, and the total ampere -turns of the two wind ings are a continuous funct ion of time . Advan-
tages of this co nverter are its gro und -refe re nced load and its ab ilit y to prod uce a bi pola r output voltage
usi ng onl y two SPST c urr en t-bidirec ti onal sw itches. The isolated version and its variants have fo und

I. Buck M(D) = D
M(D)
v,[Cf f +
V 0.5
0.5
ww 2. Boost M(D) = l ~D M(D)
v,o·
2 4
w.E 3
a fr
2
syE D
0 0.5
0 0.5 D
3. Buck-boost M(D)= - 1 ~D 0
,,9 l I
• 0
2
ng
+
-1
ff ine
-2
V -3
-4
M(D)
eri
4. Noninverting buck-boost !!D ng
.ne
M(D)= I
t
0 0.5 D
Flg. 6.14 Eight memher~ of the basic class of sing le-input single-output conveners conta ining a single inductor .
app lication in high -vol tage de power sup pli es.

Converters 7 and 8 can be derived as the inverses of co nverters S and 6. These co nverters are
capable of interfac in g an ac inpu t to a de outp ut. The ac input current waveform ca n ha ve ar b itra ry wave -
shape and powe r factor.
The class of si ngle-inpu t singl e-ou tput converters co nt a in ing two indu ctors is much larger. Sev-
eral of its members are listed in Fig. 6. 15. The Cuk converter has been previo usly discussed and ana -

6.2 A Short list 0JC011verters 145
5. Bridge M(D) = W - 1
M(D)
,,{:~: -1
0
D
6. Watkins-Johnson M{D)= .2..%=-1 M(D)
ww + or +
-1
0
D
w.E
V V
2 -l
-J
asy
M (D)
ut::-f
~
1. Current-fed bridge M (D) =
,,[ :~:
o.s D
En
0
-1
-2
gin
eer ~
8. ln•er se a/Walkins-Johnson M {D)= uf-1
M (D)
+ or
+
Vg V V
0
_,
ing o.s D
.n
-2
Fig. 6.14 Continued et

lyzed . It has an in ver ting buck -boost character istic , and ex hibits nonpulsating input and output term in al
currents . The SEPIC (single-ended primary inductance converter) [ 16], and its inverse, have noninve rtin g
buck - boost charac teristics . The Cuk and SEPIC also exh ib it the desirab le featu re that the MOSFET
source term ina l is connected to groun d; this simplifies the construc tion of the gate dri ve circuitry. Two-
inductor conve rters hav ing convers ion ratios M(D ) that are bi quadratic funct ions of the duty cycle Da re
also numerous . An example is conve rter 4 of Fig. 6.15 [I 7]. This converte r can be realized us ing a single
transis tor and three diodes. Its conversion ratio is M(V) =0 2• This converter may find use in nonisolated
applications that require a large step-down of the de voltage, or in applications having wide variations in
operating point.

146 Co11
ve11er Ci rc11i1J
M( D) = - _j2__ 0 05 D
1. Cuk 1- D 0
-I
-2
-3
-4
M(D)
ww 2. SEP IC M(D )= l ~ D
w.E
asy 0 0..5 D
3. Inve rse of SEP IC M(D )

En
= l ~D
g
1
,. ( ~
1
TII in eer
ing
0 o.s D
M(D ) =D
.ne
2
4. Buck 2
M(D)
05
---=-
----------- ·
t
0
0 05 D
e bask cla, s of sing le-inpu ! single -output conven ers co nt'.lining two inductors.
Fig. 6.15 Sen :ral members of 1l1
6.3 TRANSFO RMER ISOLATION
In a large numb er of ap plications, it is des ired to inco rp orat e a tr ansfo r mer into a switchi n g conve rter, to
obta in de isola tion between the conv erte r in pu t and out put. For exa mp le, in o ff - li ne app licat io ns (w here
the conve rter inpu t is co nnec ted to the ac ut ili ty sys tem), iso lation is us u all y requ ired by regul at ory agen-

6.3 Tramfon11er l.solatio11 147
~-
I;,,)~:,)
(a) (b) ,.......
..........
.,
+ i....
,:·c,)
____
___ .._
!
.....,
j
i
I
l
1
-
! ([ : i/ t) +
i
ww ! :: V3~t)
w.E 1........:."3.)
Ideal
transtonner
asy
Fig, 6,16 Simplified model of n multiple-winding transformer: (a) s~hcmatic symbol, (b) equivalent circuit con-
tainin g a magne tizing indudanc e and ideal transformer .
cies. Isol ation could be obt ained in these cases by s imp ly co nnecting a 50 Hz or 60 Hz transforme r al the
En
co nverter ac in pu t. Howeve r, since tra nsfo rmer size and weig ht vary inve rsely with fre que ncy, sign ifica nt
im proveme nts ca n be made by incorporat ing the tra nsformer into the converter, so t ha t the transfo rm er
gin
operates at the co nverter sw itc hin g fr equency of tens or hund reds of k ilohe rtz .
When a large step-up or step-down co nversio n ratio is requ ired, the use of a transfor mer can
allow bette r converter op timizat ion. By proper choice of the transformer turn s ra tio, the voltage or cur-
lowe r cost.
eer
re nt stresses impose d on the tra nsistors and diodes can be minimize d, leadi ng to imp rove d effic iency and
Mult iple de output s can also be obtai ned in an inex pens ive ma nne r, by adding mult iple seco nd-
ing
ary win din gs and co nverter seco ndary-side circui ts. The seco ndary turns rat ios are chose n to obta in the
desi red out put vo ltages . Usua lly on ly one output voltage can be regulated via contro l of the converter
.ne
duty cyc le, so wider tolera nces must be allowe d for the au xi liary outp ut voltages. Cross reg11la tio11is a
measure of the variation in an auxi liary ou tput voltage, given that the ma in out pu t voltage is perfectly
reg ulat ed [ 18- 20 ].
A phys ical mu lt iple - wind ing t ra nsfo rm er ha vin g tu rns ratio n 1:n i :113 : .. . is ill ustra ted in Fig.
6.16(a). A simp le equ iva le nt c ircuit is illu stra ted in Fig. 6. l 6(b), wh ic h is suff ic ie nt for unders tan din g the
opera tion of most transfor mer-isolated co nverters . The mode l assu mes perfec t co upl ing between wi nd -
ings and neglect s losses; more accurate model s are discussed in a later chapter. The idea l transformer
t
obeys the relationsh ips
vl(t) V,(I ) V3(/)

= "2 = """nj"""
- ,-, l- = (6.16 )
0 = II iit'(t) + nii,(I) + ll1i,(I ) + ...
In para lle l wit h the ideal transforme r is an inducta nce LM, ca lled the magnetizing inductance, referred to
the transfo rmer pr imary in the figure.
Phys ica l tra nsforme rs mus t co nt ain a magnet izing induc tance . For example, suppose we disco n-
nect all windi ngs exce pt for the pri mary wi ndi ng . We are then left with a single win di ng on a magnetic
core- an ind uctor. Indeed, the equ ivalent circu it of Fig. 6. 16(b) predic ts this behav ior , via the ma gnet iz-
ing inducta nce.

148 Co11
1e1rter Circuits
B(t) oc I 11,
(t) dt
saturarion
llig. 6.17 B- H charncredsti cs of mms former core.
ww
w.E The magne tizi ng current iM(l) is proportiona l to the mag ne tic field H(t) inside the tran sfor mer
asy
core. The physical B- H charac ter istics of the tran sfo rm er core material, illu strate d in Fig. 6. 17, govern
the magne tizi ng curr ent behavior. For exa mp le , if the magnet izing current iM(t ) becomes too large, then
the mag nitud e of the magnetic fie ld H(t) causes the core to satur ate . Th e mag net izi ng indu cta nce the n
En
becomes very small in value, effect ively shorting out the tra nsfo rmer.
The presence o f the mag net iz ing indu cta nce ex plai ns why tran sfor mers do not work in de ci r-
cu its: at de, the mag netizing indu cta nce has zero imped ance , and shorts out the windings. In a we ll -
gin
desig ned tra nsfo rmer, the imped ance of the magnet izin g ind ucta nce is large in magnit ude over the
intended ran ge of ope ra ting frequencies, suc h that the ma gnetizi ng c urr ent iM(I) has m uch sma ller mag-
nit ude than i 1(t). Then / 1' (1)"' / 1(1), and the tra nsfo rmer behaves nea rly as an ideal transforme r. It shoul d
eer
be e mphasized that the magne tizing curren t ( 11 (!) and the pr ima ry windi ng curre nt i 1(t) are indepe nd ent
qu antities.
ing
The mag netizing ind uc tance must obey all of the usua l rules for indu ctors. In th e model of Fig.
6.16(b), the pr imary winding voltage v 1(1) is applied across Lw and hence
.ne
Integration lead s to
(6. 18)
t
So the magne tizing cu rrent is dete rmi ned by the integ ral of the applie d wi ndi ng voltage . The pr inc ip le of
inductor volt-seco nd balance also appli es: whe n th e co nverter operates in steady -state , the de co mpo nent
of voltage app lied to the mag net iz ing induc tance mu st be zero:
0 ==Tl
:i·
rr,V1(t )dt
Jo
(6.19)
Since the mag netiz in g current is proporti onal to th e integral o f the applie d win d ing volt age, it is impor -
tant tha t the de co mponen t of this voltage be zero. Otherwise, dur ing each sw itc hi ng period there w ill be
a ne t increase in magnetizi ng cune nt , eve ntuall y lead ing to excessive ly large currents and transfor mer
sa turat ion.

6.3 Transformer Isolation 149
The operation of co nverte rs con tain ing transforme rs may be unde rstood by inser tin g the model
of Fig. 6.16(b) in place of the transfo rmer in the co nverter circ ui t. Ana lysis the n proceeds as desc ribed in
the previo us chap ters, trea ting the magnetiz ing inducta nce as any ot her ind uctor of the converter.
Practical tra nsfor mers must also co ntain leakage inductance. A small part of the flux link in g a
wind in g may not lin k the othe r win dings. In the two -wind ing tra nsforme r, th is phenomenon may be
mode led with small indu c tors in series with the wind in gs. In mo st isolated conver ter s, leakage indu c-
tance is a noni dea lity that leads to swi tch ing loss, increase d peak trans isto r voltage, and th at degrades
cross -regulation , but otherw ise has no influ ence o n basic co nverter operat ion.
There are severa l ways of incorpora ting tra nsforme r isola tion into a dc-<lc converter. The ful l-
ww
br idge, half -bridge , forwar d , and pu sh -pull converte rs are commo nly used isolated vers ions of the buc k
co nverter . Simi lar iso lated va ri ants of the boost conve rter are know n . The flyback conve rter is an isolated
versio n of the buck - boos t co nverter. These iso lated conve rters, as well as isolated versions of th e SEPIC
and the Cuk converter , are discusse d in thi s sec tion.
6.3.1 w.E
Full-Bridge and Half-Bridge Isolated
Buck Converters
asy
The fu ll -brid ge transfor mer-iso lated buck co nverte r is sketc hed in Fig. 6 .18(a). A vers ion conta in in g a
En
center -tapped seco ndary windin g is show n; th is circ uit is co mm on ly used in converters produc ing low
outpu t voltages. Th e two halves o f th e cen ter -tap pe d secondary w ind ing may be viewed as separat e
gin
w ind in gs, and hence we ca n trea t thi s circu it e lem ent as a t hree -wind ing tran sforme r h av ing turns ratio
I :n:n. W hen the transfor mer is replaced by the equivalent circu it mode l of Fig. 6. 16(b), the circu it of Fig.
(a)
D,
eer i(I)
+
v, +
ing
C R
.ne
(b) t
L
v, + v,(r) C R
l iD6(t)
i...Ideal _Ji D6
[Tranef...o
rmer mod~Jj
Fig. 6.IR Full-bridge transformcr -isola ccd huck converter: (a) schematic diagram, (b) replacement of trunsformet
with equivalent circuil mode l.

150 Conve rter Circu its
ww
w.E
Fig, 6.19 Waveform s of the
full -br idge transformer-isolated
buck converter.
asy
En
0 gin
DT, T, T,+DT, 2r,
conducting
devices: \
!
i QI
Q4
Ds
D6 eer Q2
Q3
Ds
D6
~ Ds D6
ing
6. l 8(b) is obta ined . Typ ical waveforms are illu stra te d in Fig. 6.19. The o utp ut port ion of the co nverter is
.ne
simi lar to the noniso lated buck conver ter - compare the v,.(t) and i(I) waveforms of Fig. 6.19 with Figs.
2.l( b) and 2.10 .
t
Duri ng the first subinte rval O < t < IY(,., tra nsistors Q 1 and Q4 cond uct, and the transfo rm er pr i-
mary voltage is vr = Vg. This posit ive voltage causes the magneti zi ng curre nt i~/1) to increase with a
slope of VJLw The voltage appea rin g across eac h ha lf of the ce nter-tap ped seco ndary wi nd in g is 11Vx,
with the polar ity mark at pos iti ve poten tia l. Diode D 5 is the refore forward -biase d , and D(, is reverse -
bi ase d. The vol tage v.(t) is th en eq ual to ll V11, and th e output filter inducto r current i(t) flows th roug h
di ode D5 .
Seve ral transisto r control schemes are poss ib le for the secon d sub in terva l DT, < t < T_, .• In the
most common sche me , a ll fou r tran sis tors are sw itched off , and hence the tran sfo rmer voltage is Vr = 0,
Alte rna tively, tra nsis tors Q2 and Q 4 co uld cond uct, or transis tors Q1 and Q 3 coul d conduct. In any event,
diodes D 5 and /J 11 are bot h forward-biased durin g thi s sub in te rval ; eac h diode conducts approx imately
one -half of the ou tpu t fil ter inductor current.
Actua ll y, the di ode curre nts im and i0 (, du ring the second sub interval are fu nctio ns of both the
output inductor current and the transformer magnetizin g curre nt. In the ideal case (no ma gnetizing cur -
rent), the tra nsfo rmer causes i 0 ~(/} and i06 (1) to be equ al in mag ni tud e since, if i 1' (t ) = 0, th en
niv~(I) = niwU) . But the sum of the two dio de cu rren ts is equ al to the o utp ut ind uc tor cur re nt:

6.3 Tramform er Isolation 151
(6.20)
Therefore , it mu st be true that im = i06 = 0.5/ during the second sub interv al. In practice , the diode cur -
rent s differ sl ightly from this re sult, because of the nonzero magnet izing cu rrent.
The idea l tra nsformer current s in Fig. 6. 18(b) obey
I :(I) - 11i0_,{I) + 11ilX,(t)=0 (6.21)
The nod e equation at the prima ry of the ideal transfo rmer is
ww (6.22)
w.E
Elimin ation of i 1'(t) from Eqs. (6.21) and (6.22) leads to
i 1(1) - 11/05 (() + 11/06(1) = i,.,,(t) (6.23)
asy
Equat ions (6.23) and (6.20) describe, in the genera l case, the tran sformer windin g currents d urin g the
second subinterval. According to Eq. (6.23), the magnetizing current iM(I) may flow through the prima r y
winding , through one of the seconda ry wind ings , or it may div ide betwee n all three of these winding s.
En
How the division occurs depends on the i- v characte ristics of the condu cting transistors and diodes, and
on the tran sformer leakage inductance s. In the case where i 1 :::: 0, the sol ution to Eqs. (6.20) and (6.23) is
im(I) = ½j(I)
gin
- 2~- /M(I)
½i(t) + i,,iM(I)
(6.24)
eer
i [)(,(r)=
Prov ided that iM -< ni, then i 05 and im, are eac h approxima tely O.Si.
TI1e next swi tching period , T, < t < 2T,, proceeds in a simi la r manner , excep t that the trans -
former is exc ited with voltage of th e opposite polarity. Dur ing T, <I< (Ts + D7), tran sistors Q2 and Q 3
and diode D6 con duc t. The applied transfor mer primar y volta ge is Vr = - Vir.which causes the magnetiz - ing
.ne
in g current to decrease wit h slope - V/LM. The voltag e v,(t) is equ al to nV8 , and the ou tpu t indu ctor cur -
rent i(I) flows th ro ugh diode D 6. Diodes D 5 and D6 again both co ndu ct durin g (T , + 01 :,.) < t < 2T,., with
t
operat ion simila r to sub inte r val 2 described prev iously. It can be seen that the switching ripple in the out -
put filte r element s has frequency J;= 1/T,. However , the transforme r waveforms have freque ncy 0.5/,.
By application of the principle of inductor volt-second balance to the magnetizi ng inductance ,
the average value of the tran sfo rmer voltage v1(1) must be zero whe n the conver ter operates in steady
state. Durin g the first switch ing period , positive volt-seconds are appl ied to the tran sfor mer, approx i-
mat ely equal to
IV,-( Q 1 and Q 4 forward voltage drops) j(Q and Q

1 4 conduction time) (6.25)
During the next sw itching period, negativ e volt-sec onds are applied to the transformer, give n by
- [ V, - ( Q1 and Q_, forward voltage dmps) J(Q2 and Q,1 conduction time) (6.26)

The net volt-seconds, that is, the sum of Eqs. (6.25) and (6.26), sho uld equ al zero . While the fu ll bridge
sc hem e ca uses th is to be appro xim ate ly tru e, in practice there exist imbal ances suc h as sm all di ffe re nces
in the tra nsisto r forwar d voltage drops or in the transistor sw itch ing tim es, so th at ( vr ) is small bu t non-
zero. In co nsequence, dur ing every two switc hin g per iods there is a ne t incre ase in the mag ni tud e of the
mag ne tiz ing curre nt . This increase ca n cause the tran sistor fo rward voltage drops to chang e such that
small imbalan ces are co mpensated. However, if the imba lan ces are too large, then the mag net iz in g cur-
rent beco mes large enoug h to sat urat e the transfor me r.
Tran sform er sa tura tion unde r steady-sta te co nd ition s ca n be avoided by plac ing a ca pac itor in
series with the transfo rmer primar y. Im bala nces the n indu ce a de vo ltage co mponent across the capacito r,
ra ther th an across the tra nsfor mer primary . Anot her solu tion is the use of curren t-progra mme d co ntro l,
ww
discussed in a late r chapter. The series ca paci tor is omitt ed when cu rrent-progra mm ed con trol is used.
By applica tion of the prin c ipl e of volt-seco nd balance to the o utput filter ind uctor L, the de load
voltage mu st be equ al to the de co mpo nent of v_,(r);
w.E V = (v,} (6.27)
asy
By inspec tion of the v_..(t) wavefor m in Fig. 6.19, (v ,) = HDVR. Hence,
(6.28)
En
So as in the buck con ver ter, the o ut put voltage can be co ntro lled by va riat io n of the transis tor du ty cyc le
D. An addit ional increase or decrease of the voltage ca n be obt ained via the ph ysica l transfo rmer turns
gin
ratio n. Eq uat ion (6.28) is vali d for opera tion in the co nt inuous condu c tion mode; as in the non iso lated
bu ck co nve11er, the fu ll-brid ge and ha l f-bri dge co nverters can o perate in d iscon ti nu ous con duc tion mode
at lig ht load. The co nverte r can operate ove r esse ntially the en tir e ra nge of dut y cycles O $ D < I.
eer
T ransisto rs Q 1 and Q 2 mu st not co ndu ct sim ult aneo usly ; do in g so wo uld short ou t the de source
V11, causing a shoo t-through c urr e nt spik e. Thi s tran sis tor cross-conduc tion co ndit ion can lead to low
ing
effic iency and transis tor fa ilur e. Cross co nduction can be preve nted by int ro du ct ion of delay betwee n the
turn -off of one tra nsistor and the turn -o n of the next trans istor. Diodes D 1 to D4 ens ure that the peak tran -
sistor vol tage is lim ited to the de inpu t vol tage v.., and also pro vide a cond uct ion path fo r the transfo rmer
.ne
m agnet iz ing cu rrent at light load. Details of th e switc hin g transitio ns of the fu ll -brid ge circuit are dis -
cussed fur th er in a later chapt er , in con j unc tion w ith zero -voltage swi tc h ing phenome na.
The fu ll-br idge co nfig ur at ion is typ ica lly used in switchi ng powe r sup plies at power leve ls of
appro ximate ly 750 W a nd greater. It is usua lly not used at lower power leve ls because of its high parts
co unt - fou r transistors and the ir assoc iated drive circ uits are re qui re d . Th e utiliz a ti on of the transfo rmer
is good, leadin g to small tr ansfo rm er size. In part ic ular, the uti liza tion of the tra nsformer core is very
good, since th e transfo rm er ma g ne ti zi ng c urre nt ca n be both posi tive and nega tive. Hence, the e nt ire core
t
B- H loop can be used . However, in practice, the flux sw in g is usua lly limi ted by core Joss. The trans -
forme r pr imary wi ndi ng is e ffec ti vely uti lize d . But th e ce nter-tapped seco ndary wi ndi ng is not , since
each ha lf o f the cen ter -tapped wi nd ing tra nsm its powe r on ly d ur in g a ltern ate sw itchi ng periods. Also, the
secondary w in d ing curre nts du ri ng sub int erval 2 lead to wi nd ing power loss , but not to tra n smit t al of
energy to the load. Desig n of the transfo rmer of the fu ll -br idge co nfi gura tio n is disc ussed in deta il in a
late r chapt er.
The half-br idge transform er -isolate d buc k co nverter is ill u strate d in Fig. 6.20. T ypical wave -
form s are illu strat ed in Fig. 6.2 1. T his circuit is si mil a r to th e fu ll-b rid ge of Fig. 6.18 (a), except tr ansis -
tors Q3 and Q4 , and their anti para llel diodes, ha ve been replaced with large-value capac itors Ca and C1,,
By volt-second bala nce of the transfor mer mag net izi ng indu c tance , the de vo ltage across ca pac itor Cb is
equ al to the de co mpo nent o f the voltage across transistor Q2 , or 0 .5 V~. The transfo rmer pr imary vol tage

6.3 Tra11.~fonner Isolation 153
c. i(t)
+
V
. +
- C R V
ww
Fig, 6,20 Half-bridge transformer-isolated buck convcr1cr.
w.E
asy o.svai
lM !
;
: _ 0.5~,-'
1----r;- !
-- - --r~
!
En
0.5V8 ! j
:
l
g
0 0
--0.5v,
Fig. 6.21 Waveforms of the

~ ine !
half-br idge transfonn er-isolated
buck co,1vertcr.
,1,i,
eri
, ,(t) I i ng
05nV, tI
. O I 05nV, O
n
i03(t) l I
et
0.5 ; 0 · __ O._S
... _i_ ____,
..
- ~t
0 DT, T, T,+DT, 2T1
coriducting
devit;e$:
v.,-(t) is the n 0.5 V8 when transistor Qt conducts , and - 0 .5 V8 when tran sist or Q2 conducts. The magn itude
of v 7 (t) is half as large as in the fu ll-br idge configura tion , wit h the resu lt that the ou tput voltage is
reduced by a factor of 0.5:
V ,. 0.511DV, {6.29)

The factor of 0.5 can be compensated for by doubling the transformer turns ratio n. However, this causes
the transistor currents to double.
So the half-bridge configuration needs only two transistors rather than four, but these two tran-
sistors must handle currents that are twice as large as those of the full-brid ge circuit . In consequence, the
half-bridge configuration finds application at lower power levels, for which transistors with sufficie nt
current rating are readily available, and where low parts count is importa nt. Uti lizat ion of the transfo rmer
core and windin gs is essentially the same as in the full -brid ge, and the peak transistor voltage is clamped
to the de inpu t voltage Vx by diodes D 1 and D2 • It is possible to omit capacitor C" if desired. The current -
programmed mode generally does not work with half -bridge converters.
ww
6.3.2 Forward Converter
w.E
The forward converter is illustrated in Fig. 6.22. This transformer-isolated converter is based on the buck
converter. It requires a single transistor, and hence finds application at power levels lower than those
commonly encountered in the full -bridge and half-br idge configurations. Its nonpu lsating output curren t,
asy
shared with other buck-derived converters, makes the forward converter well suited for appl ications
invo lving high output currents. The max imum transistor duty cycle is limi ted in value; for the common
choice n 1 = f½.,the duty cycle is limited to the range O :SD< 0.5.
En
The transformer magnetizing current is reset to zero while the transistor is in the off-state. How
this occurs can be understood by replacing the three-windin g transformer in Fig. 6.22 with the equivalen t
circuit of Fig. 6.16(b). The resulting circuit is illustra ted in Fig. 6.23, and typical waveforms are given in
gin
Fig. 6.24. The magnetizing inductance LM, in conjunction with diode D 1, must operate in the discontinu -
ous conduction mode. The outpu t inductor L, in conjunction with diode D 3 , may operate in either contin-
eer
uous or discontinuous conduction mode. The waveforms of Fig. 6.24 are sketched for continuous mode
operation of inductor L. During each switching period, three subintervals then occur as illustrated in Fig.
6.25.
ing
During subinterval 1, transistorQ 1 conducts and the cir cuit of Fig. 6.25(a) is obtained. Diode D 2
becomes forward-biased, while diodes D 1 and D.1are reverse-biased. Voltage Vg is applied to the trans-
former primary wind ing, and hence the transformer magnet izing current i,11(/) increases with a slope of
.ne
V/LM as illustrated in Fig. 6.24. The voltage across diode D 3 is equal to V~, multipli ed by the turns ratio
n_i'n1 •
The second subinterva l begins when transistor Q 1 is switched off. The circuit of Fig. 6.25(b) is
t
C R V
v, +
Fig. 6.Z2 Single-transi~torforward convener.

n 1 : n i : n3
Dz L
+
+
L,., D3 \/DJ
C R V
vg +
ww D1
w.E
Fig. 6.23 Forwnrd converter, with cransforrner equiva lem circuit model.
asy D
En
gin
Fig. 6.24 W.ivcforrns of the forward
eer
ing
conv er ter.
I
.ne
IIJ V
11, • I._
I
t
D 0
.,__ DT, - 1- D 2Ts -- !• D3T, • \

- -----~'-- T 3·
' i
:
Co11
ducri11g
devices: ~; D3 I
th en obtai ned . The transformer magne tizing current iM(r) at thi s i nstan t is pos itive, and must continue to
flow . Since transistor Q 1 is off, the eq uiva lent circu it model predicts that the magne tizing curre nt must
flow int o the primary of the ideal transforme r. It ca n be seen th at n ,iM ampe re-turns flow out of the polar -
ity mark of the primary w indin g . Hence, accord ing to Eq. (6. 16), an equ al num ber of total ampere -turn s
mus t flow into th e polar ity marks of the other wind ings . Diode D2 pr eve nts curren t from flowi ng into the

156 Converter Circu itJ
(a) L
+ +
C R V
D 1 off
ww(b) L
w.E + +
+
asy C R V
En
gin
(c)
+ eer
L
+
C
ing R V
+
.ne
t
l<'ig.6.25 fc,rward converter circuit: (a) during subinterval I, (h) during subinterval 2, (c) during subinterval 3.
polarit y mark of winding 3. Hence, the current: /Mn/112 must flow into the polar ity ma rk of windin g 2. So
diode D 1 becomes forwa rd-bias ed, while diode D 2 is reverse -biased. Volta ge Vx is ap plied to winding 2,
and hence the voltage across the mag net izing ind uctance is - Y1/! 1/112, referred to wi ndi ng I. This nega -
ti ve voltage causes the magnet iz ing current to decrease , with a slope of - V8 n 1ln.2LM. Since diode D2 is
reverse -biased, diod e D 3 must turn on to co nduct the output inducto r current i(t).
Wh en the magnetizing current reac hes zero, diode D 1 beco mes reverse -biased. Subinter va l 3
then beg ins, and the circ uit of Fig . 6.25(c) is obta ined. Element s Q., D., and D 2 opera te in the off state,
and the ma gnetizin g curr ent remai ns at zero for the balance of the switching period.
By applicat ion of the pr inc ip le o f indu c to r vo lt-seco nd ba lance to the tra nsformer mag neti z ing

6. 3 Transformer fsolation 157
Fig. 6.26 Magnetizing current

waveform, forward wnverter:
(a) DCM, D < 0.5; (b) CCM, D > 0.5.
ww
w.E
asy
inductance, the primary windin g voltage v 1(t) mu st have zero average . Referrin g to Fig. 6.24, the average
of v 1(t) is given by
En (6.30)
Solution for the du ty cycle D2 yields

gin
eer
(6.31)
Note that the duty cycle DJ cannot be negative . Bu t since D + D 2 + D 3 = 1, we can write
D3 = 1-D-V, "2:0
ing (6.32)
.ne
Substitution of Eq. (6.3 1) into Eq. (6.32) leads to
ti,)2: 0
( n;
Solution for D th en yie lds
DJ= I - D I+ (6.33)
t
(6.34)
So th e maximum duty cycle is limite d. For the common choice n 1 ::: n 2 , the lim it become s
{6.35)
If th is lim it is violated, then the transis tor off -tim e is in sufficien t to reset the tran sformer magnetizing
cu rren t to zero before the end of the switch ing period. Transformer sat uration may then occ ur.
The transformer magnetizing curre nt wavefor m iM(I) is illustrated in Fig. 6.26, for the typica l

case whe re 111 = n 2 . Fig ur e 6.26(a) ill ustrates ope ra tion with J) :::>:0.5. T he mag netizing indu cta nce, in
con j unct io n w ith diode Di, operates in the d isco ntinu ous cond uct io n mode, and iM( I) is rese t to zero
befo re th e end of eac h sw it ch in g perio d . Fig ur e 6.26(b) ill ustrates w ha t h app ens whe n the tran sisto r dut y
cycle D is /,'Teater tha n 0.5. Th ere is then no thi rd subin te rval , and the magnetizi ng inducta n ce opera tes in
co nt inuous co ndu ct ion mode. Furt hermore, sub interval 2 is not long en ough to reset the magne ti zing cu r-
re nt to zero. Hence, the re is a net increase of iM(r) ove r each switc hin g per iod . Eventually , the mag ne tiz-
ing curr en t w ill beco me large enough th e sat ura te the transfo rm er.
T h e co nver ter out put voltage can be fou nd by a ppl icat ion of the pr incip le of ind ucto r vo lt -sec -
ond balan ce to indu ctor l. T he vo ltage across induc tor L m ust have zero de compone nt, and therefore the
de outp ut voltage V is eq ual to the de co m pone nt of d iode D 1 voltage vm(I ) . T he waveform vu 1(t) is ill us-
ww
tra ted in Fig. 6.24 . It has an average va lue of
(6.36 )
w.E
This is th e so lu tion of the fo rwa rd converter in t he co ntinu ous co nduct io n mode. The so lut ion is su bject
to the constrai nt given in Eq. (6.34),
asy
It can be seen fro m Eq. (6.34) t hat the maxim um d uty cycle cou ld be increased by decreasin g
the turn s ratio 1i-_/n 1. T hi s wo uld cause iM(t ) to dec rease more qu ick l y dur i ng sub inte r va l 2, rese tt in g the
tr ansfom 1e r fas ter. Un fort una tely , t h is also increases t he vol tage stress appli ed to tr ansistor Q 1• Th e max -
En
imum vo ltage ap plied to transistor Q 1 occu rs durin g sub int erval 2; sol ut ion of the circuit of Fig. 6. 25(b)
for thi s vo ltage yie lds
gin (6.37)
eer
For th e commo n choice n 1 = 112 , the voltage app li ed to the tra nsis tor du r i ng subinterval 2 is 2 V~. ln prac -
tice , a so mew hat hi gher vo ltage is observed, due to r ing ing associ ate d wi t h the transfo rme r lea kage
ing
inductance. So dec reasi ng the turn s ra t io n/ 111 all ows inc rease of the max im u m transistor duty cycle, at
the expense of increase d tra nsisto r b lock in g volt age.
A two-transis tor version of the forwa rd conve rt er is i llustrate d in Fig. 6.27 . Tr ansistors Q 1 and
.ne
Q2 are contro lled by the same gate dr ive signa l , s uch th at they both co nduct d ur in g sub inte r va l I, and are
off dur in g su bi nte r va ls 2 and 3. The seco ndary side of the co nverter is iden ti ca l to the sing le -tra nsistor
forwa rd co nvert er; diode /J3 co ndu cts duri ng sub in te rval 1, wh ile dio de D4 co nducts du r ing sub int e r va ls
2 and 3. During subi nterval 2, the magnet izing current iM(t) forwa rd -biases dio des D 1and D 2 • Th e trans-
t
+
C R V
Fig. 6.27 Two-tran sisto r fo1wanl convcrt el'.

6.3 Trmrsfo1111er
l.wlation 159
forme r p rim ary w indin g is the n connec ted to V...,,wit h po la rity opposite tha t of subin terval I. The magne-
tiz ing cu rrent the n decreases , with slope - V /L,w When the ma g netiz in g current reaches zero, d iodes D1
and D 2 become reve rse-biased. The magnefizing cur rent th en rema ins at zero for the balance of the
switc hing pe1iod. So operation of the two -trans isto r forwa rd converte r is s imil ar to the single-trans isto r
forwa rd converter, in whic h 111 =n 2 . The du ty cyc le is limi ted to D < 0 .5. This converter has the advan -
tage that the tran sistor pea k b locking vo ltage is limi ted to V11, and is clamped by diode s D 1 a nd D 2 . Typi -
ca l power leve ls of the two -transisto r forward conve rter are simi lar to those of the half -bridge
co nfi gura tion.
The utili zat ion of the tran sforme r of the fo rwar d converter is q uite good. Since the transfo rmer
ww
magnet izi ng cu rrent c annot be negative , only hal f of the core B- H loop can be used. This wou ld seem -
ingl y imply that the tra nsfo rme r cores of forwar d co nverters shou ld be twice as large as those of fu ll - or
ha lf-bri dge conve rters. However, in modern high -fre qu ency conve rters , the flux sw in g is cons trained by
core loss rather tha n by the core mater ial sa tu ra tion flux de nsity. In co nseque nce, the ut ilizat ion of the
w.E
tra nsfo rm er core of the forward co nverter can be as good as in the ful 1- or hal f-br id ge configurations. Ut i-
lization o f the pri mary and seco ndary windings of the transfo rmer is better than in the fu ll -br idge, hal f-
br idge, or pu sh-pull co n figuratio ns, since the fo rward conver ter requires no ce nter-tapped win din gs. Dur-
asy
ing su bint erval I, all of the availab le wi nd in g copper is used to tra nsm it power to the load . Esse ntially no
unnecessa ry curr ent flo ws du ring sub int ervals 2 and 3. Typically, the mag ne ti zing curr ent is small com -
pared to the reflected load current, and has negligi bl e effect on the transformer util ization. So the tran s-
En
form er core and wi nd ings are effective ly ut ilized in modem forward converte rs.
6.3.3 Push- Pull Isolated Buck Converter
gin
eer
The push -pull isolated buc k conve rter is il lustra ted in Fig. 6.28. The secon dar y-side c ircuit is identica l
with the full - and half -brid ge co nverte rs, wit h ident ical wavefo rm s. Th e pr imary -si de ci rc u it co ntain s a
center -tapp ed w indin g . Tran sisto r Q1 cond uct s for time DT, durin g the first sw itchin g period. Tran sistor
ing
Q2 con ducts for an identical leng th of tim e d uring the next switc hi ng period, suc h that volt-secon d bal -
ance is maintained across the tra nsfo rmer primary wind ing. Converter waveforms are ill ustrated in Fig.
6.29. Thi s converte r can operate oven the entire ra nge of duty cycles O :S D < J. It s co nversion ra tio is
.ne
6>iven by
(6.38)
t
V = r1DV1
Thi s co nverter is so metime s used in co nju nction wi th low inp ut voltage s. It tends to exhibi t low prima ry-
_i_Q,
D1 L
n i(I)
+ +
io 1(t)
Fig. 6.28 Push-pull isolated
buck converter. v,(t) C R V

160 Co111
1e11er Circuits
ww
Fig, 6.29 Waveforms of the
* !i ! i
w.E
i(t) ~: : ....... .. tl.i : i
push-pull isolated buck -:onverter. I
asy l I I i t ,,(t) nV, O nV, O
El-n ; Ii iI ~u ;.,(t) 05 ; 05;
gin 0 or, T,
O
T,+DT, 2T,
eerConducring
devices:
ing
side co ndu ct ion losses, since at any given instant only one tra nsistor is co nnected in series w ith the de
.ne
source Vi:. The abi lit y to operate w ith tra nsistor d ut y cyc les ap proachin g un it y also allows the turns ratio
11 to be minimized , red ucing the transistor curre nts.

The push -pu ll co nfigurat ion is prone to tra nsformer saturatio n prob lems . Since it cannot be
t
guarant eed that the forward voltage drops and co nd uc tion times of tran s istors Q 1 ,md Q~ are exact ly
equal, s ma ll imba lances ca n cause the de co mp onent of vollage applied to the transforme r pr imary to be
nonzero. In consequence, durin g ever y two sw itc hin g peri ods there is a net increase in the ma g nitude of
the ma gnet izin g curre nt. If th is im balance co ntinu es , the n the magnetizing c urren t can even tu a ll y
become large enoug h to saturate the tra nsfor mer.

Cur ren t-programmed co ntro l ca n be empl oyed to mitiga te the transforme r satur ation problems.
Operation of the push -pu ll converte r using on ly dut y cycle control is not reco mmended.
Utilization of the transformer core material and secondary wi nding is s im ilar to tha t for the full -
bridge co nverter. The flux and magnetizin g curre nt can be bo th posit ive and nega tive , and the refore the
entire B- H loop can be used, if desired. Since the primary and seco nda ry win din gs are both center -
tapped, their utili za tio n is sub optimal.

6.3 Transformer lsolatio11 161
(a)
QI D1
v8
T L V
+
(b)
QI D1
ww
Fig. 6.30 Derivation of the fly- T
w.E
back co nverter: {a) buck-b oost
converter: (b) inductor l is
wound with two paralle l wire,~;
vg L
+
V
asy
(c) inductor wi11dings are iso-
!aced, leading to the flyback con- (c)
QI D1
verter; (d) with a I :11turns ratio
and pusitive omput.
vg EnT --
gin
LM V
+
(d)
ee D,
rin
+
g.n
C V
vg +
~ et
6.3.4 Flyback Converter
The flyback converter is based on the buck - boost converter. Its der ivat ion is illus trated in Fig. 6.30. Fig -
ure 6.30(a) depicts the bas ic bu ck-boost converter, with the swi tch realized us ing a MOSFET and diode .
[n Fig. 6.30(b), the in ductor w in di11g is cons tru cted using two wires , with a I: I turns ratio. The basic
functio11 of the inductor is unchanged , and the parall el windings are equ ivalent to a single wind ing con -
stru cted of larger wi re. [n Fi g. 6.30(c) , the connections between the two wind in gs are broke n. One wind -
ing is used w hi le the transis tor Q 1 conducts , wh ile the other win d ing is used when diode D 1 cond ucts .
The total current in the two wi ndings is unchan ge d fro m the circu it of Fig . 6.30( b); how eve r, the curren t
is now distributed betwee n the w ind ings d iffe ren tly . The magnet ic fields inside th e indu ctor in both cases

162 ConverterCirc11it.1
(a)
C R V
-I
ww
w.E
(b)
Fig. 6.31 J-'lyback converter circuit: +

(a) with tran~fom1er equivalent circuit
(c) during subinterval 2.

asy
model, (b) during subinterval l,
+ V
En(c)
gin ,......... . ............................,
l Tr011Sf
ormer model ! ifn
,-..----------. +
ig
=O
+i
! -.eer
,.........
!vln
;
l...+ ........ :!I ing C R V
.ne
are identica l. Although the two -win di ng magnet ic dev ice is represe nted us in g the same symbo l as the
tra nsfo rm er, a more desc ripti ve name is " two -wind ing inductor." Thi s dev ice is sometimes also calle d a
flyback transf ormer. Unlike the idea l tran sformer , current does not flow simultaneous ly in both windin gs
t
of the flyback transformer. Figure 6.30 (d) illus tra tes the us ual co n fig uration of the fly bac k converter. Th e
MOSF ET source is connecte d to the primary-side ground , simp lifying the gate drive circuit. Th e trans-
former polarity mark s are reversed, to obtai n a positive output voltage. A I :11 turns ratio is introduced ;
this allow s better converte r opt imiz atio n .
The fly back co nverte r may be ana l yze d by inser tio n of the model of Fig. 6. I 6(b) in place of the
flyback tra nsfo rmer. The c ir cu it of Fig. 6.31 (a) is then ob ta ined. The ma gnet izi ng inductance LM fun c -
tions in the same man ner as in duc tor L of the or igin al buck -boost conve rter of Fig. 6.30(a). When transis-
tor Q 1 co nducts , ene rgy fro m the de smuce Vx is stored in LM. Whe n di ode D 1 con ducts, thi s stored
energy is tra nsfe rred to the load, wi th the inducto r voltage and c urr ent scaled accordi ng to the I :n turn s
ratio.
During subinterval I, whi le trans istor Q 1 co ndu cts , the co nve rter circui t model reduces to Fig.

6.3 l (b). The inductor vo ltage vl, capac itor cu rren t ic, and de source curren t i8 are given by
v,.= v,
, V (6.39)
'c=-R
jR := i
With the ass umption that the co nverter opera tes in the co n ti nuo us co ndu ct ion mode, with small inductor
cur re nt ripp le and small cap ac itor voltage ripple , the magnetizing curre nt i and ou tput capacitor voltage 11
can be approximated by their de co mpone nts, / and V, respective ly . Eq uation (6.39) then becomes
ww vl ==V,
ic=-~ (6.40)
w.E i~ := /
Durin g the second sub interval, the tra nsistor is in the off -sta te, and the diode conducts . Th e equivale nt
asy
c irc uit of Fig. 6.3 l(c) is obta ined. The p rimar y-side magneti zi ng indu c ta nce vo ltage vv the capacito r
current ic, and the de source curren t i8 for th is subinterva l are:
En
v1.==-¼
, j V (6.41)
'c=n-!f
gin
ig = 0
It is important to cons isten tly define 111_(1) on the same side of th e tra nsfor mer for a ll subi ntervals . Upon
eer
mak in g the sma ll-rippl e approx imatio n, one obtains
ing (6.42)
.ne
The vL.(t),ic(I), and i/t) wavefor m s are sketched in Fig. 6.32 for cont inuous con du ction mod e opera ti o n.
App lication o f the pr inc iple of volt -seco nd bala nce to the p rima ry -side m agnetiz ing indu cta nce
yie lds
(6,43) t
Solution for the convers ion ratio then leads to
M(D) = J'.. = II 0 . {6,44)

V,, D
So the conversion ratio of the flyback converter is similar to that of the buck-boost converter , but co ntain s
an added factor of n.
Application of th e pr in c iple of cha rge balance to the output capacito r C leads to
(6 .45)

-
-Vin
fin- VIR
ww
Fig, 6.32 Flyhack co11vcrter Wt1veform s,
continuous condu ction rnodc.
w.E - VIR
asy I
-
En 0
gin
Conducting
Solution for / yie lds

devices:
eer
[ = B..!'.'...
D'R
ing (6.46)
.ne
Th is is the de compo nent of the mag netiz in g curren t, referred to the pr imary. The de co mponen t of the
source current i11 is
An equivalen t circu it tha t mode ls the de components of the flyback converter wavefo rms can
(6.47)
t
now be construc ted. Circ uit s co rres po nding to the in duc tor loop equ at ion (6.43) and to node eq uatio ns
(6.45) and (6.47) are illustrated in Fig . 6.33(a). By rep lacing the dependent sources with idea l de trans -
formers , one obtains Fig. 6.33(b). This is the de eq uiva lent ci rcu it of the flyback converter. It contains a
I :D buck -type conversion rat io, fo llowed by a D': I boost -typ e conversion rat io, and an added factor of
I :n arising from the flyback transfo rmer turns ratio. By use of the method developed in Cha pter 3, the
model can be refined lo acco unt for losses and to pred ict the conve rter eff ic iency . The fly back converte r
ca n also be operated in the di scontinuous con d uct ion mode; analys is is lef t as a home wor k pro bl em. ll1e
resul ts are simi lar to the DCM buc k-boost co nverter res ul ts tabu lated in Chap ter 5, but are ge nera lized to
account for the turns ratio I :n .
The flyba ck co nverter is commo nly used at the 50 to 100 W powe r range, as well as in high-
vol tage power supp lies for te lev isio ns and compute r mon itors. It has the advantage of ve ry low parts

6.3 Transfo rmer Isolati on 165
(a)
I +
lg
D'V llln
vs DI DVg ---;r- R V
(b) l :D D' :n
+
ww
I
R V
w.E
Fig. 6.33 Flyback conveiter equivulent circu it model, CCM: (a) cin :uits corresponding coEqs. (6.43), (6.45), and
asy
(6.47); (b) equivalem circuit cont aining ideal de tra nsformers.
co unt. Mu ltiple o utput s can be obtaine d using a m ini mum numb er of part s: each addit ional output
En
requi res only an ad ditional wind ing, diode , and capac itor. However , in compa rison w i th the full-bri dge,
half -bri dge, or two -transistor forward co nverters , the fly back converter has the di sadvant ages of hi gh
gin
trans istor voltage stress and poor cross -reg ulation. The peak transistor voltage is equal to the de in put
voltage Vg plus the reflec ted load voltage V/11;in practice, additional voltage is observed due to ringing
associated with the transform er leakage inductance . Rigorous compar ison of the utilizat ion of the fl y-
eer
back transformer with th e transformers of buc k-der ived circu its is di ff icult beca use of the different func -
tions performed by these elements. The magnet izing current of the flyback transforme r is unipolar, and
hence no more than hal f of the core materia l B- H loop can be ut ilized . The mag net iz in g current must
ing
contain a signi fican t de componen t. Yet, the size of the flyback transformer is quite sma ll in desi1,JJ1s
intende d to operate in the di scon tinuous conduc tio n mode . However , DCM operat ion leads to increased
peak currents in the transi sto r, diode, and fi lter capac itors. Cont inuou s conduction mode des igns require
larger values of L,.,,,
and hence larger flyback trans for mers , but the peak currents in the power stage ele-
.ne
ment s are lowe.r.
6.3.5 Boost-Derived Isolated Converte rs

t
Tran sfo rmer -isolated boost conve rters can be derived by invers ion of the source and load of buck -de rived
isolated converte rs. A numb er of configura tions are known, and two of these are briefl y discussed here .
TI1ese co nverters find some employment in hi gh-vo ltage power suppl ies, as we ll as in low -har monic rec-
tifier applicat ions.
A full -bridge co nfigura tion is dia gra mm ed in Fig. 6.34, and wavefor ms for the continuous con -
duc tion mode are illu st ra ted in Fig. 6.35. The circu it topologies durin g the first and second sub inte rva ls
are equivalent to tho se of the bas ic nonisol ated boos t converter, and when the turns ratio is I : 1, the induc -
tor current i(t) and output current ijt) wavefo rms are identic al to the inductor curren t and diode current
wavefo rm s of the noni so late d boost co nverter.
Durin g subi nterval 1, all fo ur transistors opera te in the on state. This co nnects the inductor L
across th e de in pu t source VK,and causes diodes D 1 and D 2 to be reverse -biased. The indu ctor c urr ent i(t)

166 Converter Cirrnirs
+ vl (t) -
D1
~
I : n iJI)
+
+
v, +
v~ t) C R V
ww
: n
w.E
Fi~. 6,34 Full-bridg" transfor mer-iso lated llClostconve rter.
Vin
asy 0 0
En - Vin
vg
gin vs !
l
Vg- Vln
eer V8 - Vln
' ' :
ing
.ne
t
Fig. 6.35 Wavefon ns ol' the transform er-isnlak d full -hrid ge boo st convener , CC:M .

6.3 Tra11sf
o1111
er Isolation 167
inc reases with slope V,/L, and energy is tran sferred from the de source Vgto inductor L. Duri ng the sec-
ond su binter val , tran sisto rs Q2 and Q3 operate in the off state, so tha t inductor L is con nected via trans is-
tors Q 1 and Q4 through the tran sfo rm er and dio de D 1 to the de ou tpu t. The next sw itchi ng period is
simil m·, except that durin g sub int erva l 2, transistors Q 1 and Q4 operate in the off state, and induc to r L is
connecte d via transi sto rs Q2 and Q3 throu gh the transformer and diode D2 to the de output. If the transis -
tor off -times and the diode forwa rd drop s are ident ical, then the avera ge transforme r vo ltage is zero, and
the net volt -seco nd s app lied to the trans form er magnetizing indu ctance over two sw it c hin g periods is
zero.
Application of the principle of indu c tor volt -seco nd ba lance to the inductor volta ge waveform
ww
vl(t) yields
(6.48)
w.E
Solut ion for the co nversion rat io M(D ) then lead s to
M (D) = J:..= tl. (6.49)
asy
V D'
'
Th is res ult is simi lar to the boost co nve rte r M (D), w ith an added facto r of 11 due to the transformer turns
ratio .
En
The transistors must block the reflected load voltage V!,1 = V/ D'. In practice , addi tional vo ltage
(a)
~ I
n gin
eer
i/t ) +
ing
C R V
.ne
D2
IQ2
(b)
~ I
D,
t
II
C R V
Fig. 6.36 Pusli-pull isolated converters: (a) based on the boost convertt:r, (b) based 011 the Warkins-Johmo n con-
verter.

is observed due to ringing associated with the transformer leakage inductance. Because the instantaneous
transistor current is limited by inductor L, saturation of the transformer due to small imbalances in the
semiconductor forward voltage drops or conduction times is not catastrophic. Indeed, control schemes
are known in which the transformer is purposely operated in saturation during subinterval 1 [ 13, 15].
A push-pull configuration is depicted in Fig. 6.36(a). This configuration requires only two tran-
sistors, each of which must block voltage 2Vln. Operation is otherwise similar to that of the full-bridge.
During subinterval I, both transistors conduct. During subinterval 2, one of the transistors operates in the
off state, and energy is transferred from the inductor through the transforme r and one of the diodes to the
output. Transistors conduct during subin terval 2 dur ing alterna te switching periods, such that transformer
ww
volt-second balance is maintained . A similar push -pull version of the Watkins-Johnson converter, con-
verter 6 of Fig. 6.14, is illustrated in Fig. 6.36(b).
6.3.6
w.E
Isolated Versions of'the SEPIC and the Cuk Converter
The artifice used to obta in isolation in the flyback converter can also be applied to the SEPIC and
asy
invme -SEPIC. Referring to Fig. 6.37(a), ind uctor L 2 can be realized using two windings, leading to the
isolated SEPIC of Fig. 6.37(b). An equivalent circuit is given in Fig. 6.37(c). It can be seen that the mag-
(a)
En +
gin R V
(b)
eer
ing +
.ne
R V
(c)
t
+
v, R V
. Ide al !i
Transformer i
.'-• • ~u model
•u •.••~ • ••••• • -• • • · -••U•
i'
Fig. 6.37 Obtaining isolation in the SEPIC: (a) basic nonisolated converter, (b) isolated SEPIC, (c) with trans-
form er equival ent circuit model.

i/ 1)
- i2
l t
(i 1 + i2) / n
1 [.
i,(,)
ww 0
w.E
Fig. 6.38 Waveforms of the i 1(t)
isolated SEPIC, continuous
conduction mode. 1,
asy
-~:Et:1:±:::
ng
i
.
Conducting ;
!-
:
nr-s !-n
:
nee
· T, ----:
·r-
J'
ii t
devices:!
:
Q1 D1 !'
rin
netizing inductance performs the energy -storage function of the or igina l inductor f-i. In addit ion, the
ideal tra nsformer prov ides isolation and a turns ratio.
g.n
Typical primary and secondary wi ndin g curre nt waveforms i,,(t) and i,(1) are por trayed in Fig.
6.38, for the co ntinuou s co nduct ion mode. The magnet ic device mu st funct ion as both a flybac k trans -
for mer and also a conv entio nal two-wi ndin g tran sfor mer. Durin g subint erval I, wh ile tran sistor Q 1 con-
ducts, the magnetizing curr ent flows throu gh the pr imary w inding , and the secondary winding cu rrent is
zero . Durin g sub interval 2, whi le diode D 1 conducts , the mag neti zi ng curre nt flows throu gh the second -
ary w inding to the load. In addition , the input indu cto r current i I flows thro ugh the pr ima ry winding. Th is
et
indu ces an additiona l compon ent of secondmy curre nt i 1In, which also flows to the load. So de sign of the
SEPIC tran sforme r is somewhat unu sua l, and the nns winding curre nts are larger th an those of the fly-
back transformer.
By applic ation of the principle of volt -seco nd balance to inductors L, and LM, the conve rsion
ra tio can be shown to be
(6.50)
Ideally, the tran sis tor mu st block voltage V/D ' . In pract ice, addit iona l voltage is observed due to ri ngi ng
assoc iated with the tra nsfo rme r leakage indu ctance.

170 Converter Circuit.>
I :n
+
R V
+
ww
Fli:, 6.39 Isolated invene-SEPIC.
w.E
An isolated version of the inverse- SEPIC is shown in Fig. 6.39. Opera tion and design of the
transforme r is si mi lar to that of the SEPIC.
Isolat ion in the Cuk converte r is obtained in a diffe rent manner [181. The basic nonisolated Cu k
converter is illu strated in Fig. 6.40(a). In Fig. 6.40(b), capaci tor C1 is split int o two series capacitors C 1"
asy
and C 11,. A transform er can now be inserted between these capacitors, as ind icated in Fig. 6.40(c). The
polarity marks have been reversed, so tha t a posit ive out put voltage is obta ined. Having capacitors in
series with the tran sfo rmer primary and seco ndary windin gs ensures that no de voltage is applied to the
En
transformer. The transforme r func tions in a conventional manner, with sma ll magnetizi ng cu rren t and
negligib le energy storage within the ma gnetiz ing induc tance.
gin
Uti li zation of the transfo rmer of the Cuk converter is quite good. The magnetizi ng curr ent can
(a)
eer
vs D1
ing C2 R V
.ne +
Fig. 6.40 Ohtaini ng i,olation (b) LI

in tile Cllk convc11cr: (a) ha~ic
nonislllated Cuk convert~r,
(b) splitting capacitor C 1 into
two series capacitors, (c) inscr- Vg
~
cl n c 1b
D1 C2 R V
t
tion of transformer between

capacitors.
+
(c)
v8 R V
l : 11

6.4 Co11verter Eva/11atio11a11dDesign 171
be both positive and negative , and hence the entir e core B- H loop can be utilized if desired. There are no
center -tapped wi ndin gs, and all of the coppe r is effec tivel y util ized. The transistor must block voltage
V/D', plus some add itio nal voltage due to rin ging associated with the transfo rm er le-akage in duc tance.
The conve rsion ratio is identical to tha t of the isolated SEPIC, Eq. (6.50).
The isolated SEPIC and Cuk converter find app licat ion as switch ing power supp lies, typic all y at
power leve ls of several hundred watts. They are also now find in g use as ac- dc low -harmon ic re cti fiers .
6.4 CONVERTER EVALUATION AND DESIGN
ww
Ther e is no ultim ate conve rter perfectly su ited for all possi ble app lica tions. For a give n app lication, with
given specifications , trade studies should be perfor med to select a converte r topology. Several
approaches that meet the specifications should be considered, and for each approach impo rtant quantit ie s
w.E
such as worst-case tra nsistor voltage , worst-case tra nsistor rms current , tra nsfo rmer size, etc. , sho uld be
co mputed . This type of quantit ativ e co mpari so n can lead to selection of the best approach, wh ile avoid -
in g the personal biases of the engineer.
6.4.1 Switch Stress and

asy
tiJization
En
Often , the larges t si ngle cos t in a converter is the cost of the active semicon du ctor devices. Also, the con -
gin
ducti on and sw itchin g losses associated with the sem icon duct or devices ofte n domi nates the other con-
verter losses. This suggests evaluating ca ndida te converte r approac hes by co mpari ng the voltag e and
current stresses imposed on the active semiconductor devices. Min imi zation of the tot al switch stresses
eer
lead s to minimi za tio n of the total si licon area requi red to realize the power devices of the conve1te r.
So it is usefu l to compare the total active swirch stress and active switch utilization of candidate
converter approaches. In a good des ign, the voltages and current s imposed on the semiconductor devices
ing
is minimized , whi le the load power is maxim ized . If a converter contains k active semiconductor devices,
the total act ive swi tch stress Scan be de fined as
.ne
(6.51)
where Vj is the peak voltage app lied to semico nducto r sw itch j, and Ii is the rms c urr ent applied to
swi tch j. Peak rather than rms current is sometimes used, with qualitatively similar results. If the con-
verter load power is P10 0 d, then the active switch utilization U can be defined as t
U = P1,iwt {6.52)
s
The switch uti lization is less th an one in transform er-iso lated converter,, and is a qua ntit y to be maxi -
mized.
For example , consider the tran s isto r util iza ti on in the CCM tlyback converter of Fig. 6.30(d).
The peak transis tor voltage occu rs during subint e rv al 2, and is equal to the de input voltage V8 plus the
reflected load voltage Vn,:
(6.53)

172 Convener Circ11its
The transistor cu rr e nt waveform coi ncides with the in p ut current waveform i/t), wh ich is sketched in
Fig. 6.32. The rm s value of th is waveform is
_ ,,..-_ P1,..,, (6.54)

JQl ,ri,.,-lvv- V fl5
•
So the total act ive sw itc h stress is
(6.55)
ww
The load powe r /\,,,,1 can be exp res sed in term s of V and / by solu tion of the equiva lent c ircuit model ,
Fig. 6.33(b) . Th e res ul t is
w.E
Use of Eq. (6.44) to eli min a te VK from Eq. (6.55), and eva luatio n of Eq. (6.52), leads to
(6.56)
asy U=Ufl5 (6 .57)
D = 1/3.
En
The transisto r utili zat ion U te nds to zero at D = 0 and at D = I, and reaches a maximum of U = 0.385 at
For given valu es of Vg, V, and the load power , th e de sig ner can arbit rar ily choose the dut y cy cl e
gin
D. The turn s rati o is the n chose n to sat is fy Eq. (6.44), as follows :
eer
(6.58 )
At low dut y cycle, the tra nsistor nn s curren t becomes large because the transfor me r turn s ratio mu st be
ing
large. At a d uty cycle approa ching one, the tran sis tor peak voltage is large . So th e choice D = 1/3 is a
good one , which minimizes the prod uct of peak transistor voltage and rms tra nsistor cu rrent. In practice ,
the conve1te r must be optimized to meet a numbe r of different cr iteria , so a somewhat diff eren t du ty
.ne
cyc le may be chosen. Also, the converte r must usua ll y be desi gned to operate wi th some give n range of
load powe rs and inpu t voltages ; thi s can lea d to a di ffe rent choice of D, as we ll as to redu ced sw itch uti -
lizati on.
For a simple comparison between converters, the switch u tiliza ti o ns of a numb er of isolate d and
noniso lated co nve rters are co llected in Table 6.1. For simpl icit y, the formu las assume tha t the co nverter
is de signed to fun cti o n at a s in gle opera ting po in t, that is, wi th no va ria tio ns in Vi:, V, or P,nm/·
t
lt ca n be seen tha t th e noniso lated buck an d boost co nverters opera te most effi c iently when th eir
co nversion rat ios M(D) are near one , In the case of the boost con verter, th e sw itch utilizatio n is greater
than one for D < 0. 382, and approaches in fi ni ty as D tend s to zero . The reason for thi s is that , at D = 0,
the tra nsistor is always off and hence its rm s cu rr ent is zero. But at D = 0, V = V¥, so the output power is
nonzero. A ll of the load power flows throu gh the d iode rather than the tran s istor. Of course , if it is des ired
th at V = V8 , then it wo uld be best to el im inat e the boost conve rter, and dir ec tly connec t the load to the
input voltage . But it is nonet hel ess true tha t if the output vo ltage V is not too m uc h grea ter than Vg, then a
large amount of powe r can be con trolled by a re lative ly small transistor. Sim ilar ar guments apply to the
buck conve rter: all of the loa d po wer must flow throu gh the trans istor and hence U :oI, yet co nver ter effi -
cie ncy and cost per watt are opt imi ze d when the output vo ltage V is not too much sma ller than the inpu t
voltage.

6.4 Converter Evafoarion and Design 173
Table6. l Active switch utilizations of some common de-de convcr1crs, single operating point
max U(D)
Conve rter U(D) maxU(D) occurs at D =
Buck ff5
D'
Boost 00 0
Jl5
Buck-boost, ftyback, noniso lated SEPIC, 1
D'./TJ ~=0.385
ww
isolated SEP IC, nonisolated Cuk, isolated Cuk 3
l .rt5 m=0.353 1
2 2
w.E
Other isolated buck-derived converters
(full- bridge, half-bridge, push-pull )
Iso lated boost-derived converters D'

21- =0.353
l 0
asy 2
(full-bridge, push-pull) 2Jl+D
En
In co rp oration o f an isolation transformer leads to red uced switch utilization . In general , trans -
former-isolate d buck-der ived conve rters shou ld be des igned to operate at as large a duty cyc le as other
considerations will allow. Even so, the sw itch uti l iza tion is reduced to U 5 0. 353, mean in g that the sw itch
gin
stress is increased by a factor of app roxima tely 2.8 as compare d w it h the nonisolated buck converte r at
D = I . On the oth er hand, th e transformer turn s ratio can be chosen to match the load voltage to the input
vo ltage and bette r optimize the converter. For example, in a full -bridge buck -de rive d co nve11er opera ting
eer
with VR= 500 V an d V= 5 V , th e turn s rat io cou ld be chosen to be near ly 100:I, leading to a dut y cycle
close to one and sw itch utilizat ion of approximate ly 0.35. To ob tain a I kW output power, the total tran -
ing
sisto r stress wou ld be l kW/0.35 = 2.86 kVA. By compariso n, the no niso lated b uck converter would
operate with a dut y cy cle of0.0 1 and a switch ut iliza ti on ofO.I. Its tota l switch stress wou ld be I kW/0.l
= lO kV A; transistors w it h large r rated currents and lower on -resistanc es wo uld be needed . Simi la r argu -
.ne
ments ap pl y to the transformer -iso lated boos t-der ived conve rters: these co nverters are bette r opt imized
when th ey operate at low du ty cycles.

The nonisolated buck -boost, noni solated SEPIC, noniso lated Cuk conver ter, and th e isolated
SEPIC , fly bac k, and Cuk co nverte rs have sim ilar swi tch ut ilizatio ns. In all of th ese co nverters,
U :S0.385, which is approx imately th e same as in the iso late d b uck-derive d conve rters. So the no niso -
lated ve rsions of these converte rs tend to have lowe r sw itch uti liza ti ons tha n the buck or boost conve rt -
ers; however, isolation can be obt ain ed w ith no addi ti onal pena lty in sw itch stress. Swi tch u ti lizat ion of a
t
single -operat ing-point des ign is maximized when the turns ra tio is chosen such tha t D = 1/3.
The cost of the act ive sem icon du ctor dev ices of a conve rter ap proach can be est imate d us ing the
converte r swi tch util iza tion, as follows :
semic,)nductor device cost )

( per rated kVA
( semiconducrorcosr ) _ (6.59}
per kW ou1put pow er -( vo lrnge )( curr~nt )( conv..erler)
deratmg dcraung sw11ch
factor factor utilization
The sem iconductor device cost per rated kV A is equa l to the cos t of a semiconductor dev ice, div ided by

the produ cts of its maximum vo ltage rati n g and its ma x imum rms c u rre nt ca pab ility , expresse d in $/k VA.
Thi s fi gur e depe nd s on a variety of facto rs, inc lud in g th e device type, pa ckag in g, vo ltage and powe r le v-
els, and ma rket vo lum e. A typ ical U.S. va lue in 2!XXJis less than $1 /kV A. Voltage and cune nt dera ting is
required to obt ain re liable oper at ion of the semi co ndu c tor devices . A typ ic a l design guideline is that the
worst-case pea k tra ns istor voltage (in cl udin g tra ns ie nts , vo ltage spikes du e to ri ng ing , and a ll oth er antic-
ipa ted eve nt s) should not exceed 75% o f the rated tran sistor voltage, leadi ng to a voltage dera ting factor
of (0 .75). Hence, the cost of th e act ive sem ico ndu ctor swi tc hes in a 2000 isola ted de-de co nverte r is typ -
ically in the ra nge $ 1 to $ IQ pe r kW ofoutput po wer for mediu m to hi gh -power appl ica tions.
ww
6.4.2 Design Using Computer Spreadsheet
w.E
Co m pute r spreads heets are a use fu l tool for pe r fo r min g converter trade st udies and des igns . G ive n spec i-
fic ations reg ardin g the des ired o utp ut vo lt age V, the ranges of the in pu t vo ltage VR an d the load po wer
P1{)(,d' the des ired outpu t voltage ripple Av, the switc hi ng freq uency J.,etc., vario us des ign op tions can be
ex plored . The tra nsformer turns ratio and the inductor c urrent ripple t!J can be taken as desig n variables,
asy
chosen by the engineer . The range of duty cycle va riatio ns and th e ind uctor and capac itor com pon ent va l-
ues can th en be co mp uted. Worst-case val ue s of th e c urre nts and vo ltages app lie d to the var ious powe r-
st age e leme nts ca n also be ev aluat ed , as we ll as the sizes o f the magnet ic e leme nts . By inves ti gati ng sev-
En
eral cho ices of the des ign va riables , a good co mprom ise be tween the wo rst-case voltage stresses and c ur-
rent stresses can be fo und .
gin
A sho rt spreadsheet ex amp le is give n in Tab le 6.2. The co nve1ter opera tes from a de vo ltage
der ived by recti fyi ng a 230 V ± 20% ac sou rce vo ltage . The co nverter de i np u t voltage V8 is th erefo re
230 ../i V ± 20 % . The load voltage is a regulate d 15 V de, wi th switchin g ripple t. 11no greater th an 0.1 V .
eer
Th e load power ca n va ry over the ran ge 20 W to 200 W. It is des ired to operate wi th a sw itc h ing fre -
qu ency off ,. = 100 kH z . These va lues are entered as specificatio ns, at the top of the spreads hee t. The
des ign of a for ward converter, Fig. 6.22 , and of a fly b ack co nve rter, Fig . 6.30(d), to mee t these spec ifica -
ing
tions is in vest iga ted in the spreads hee t. Con tinuo us co nduct ion mode desig ns are invest igated: the induc -
tor curr e nt ripp le l'ii is chose n sma ll enoug h that the converter opera tes in CCM at full load power.
Dependi ng on the choi ce of Ai , the conve rter may opera te in either CCM or DCM at m i n im um load
.ne
power.
For the single-t ransistor forwa rd conve-rter, the tu rns rat ios nifrr1 and n / n 1, as well as the indu c-
t
tor curre nt ripp le l'ii , can be take n as des ign var iab les . For th is exam p le , the reset -wi nd ing tu rns ratio
n2 /n 1 is chose n to be one , and hence the duty cycle is lim ited to D < 0.5 as given by Eq. (6.35). Th e max-
imum dut y cycle is co mpute d first. The o utpu t vol ta ge of the forwa rd co nverter, in co nti n uo us co nductio n
mode, is g ive n by Eq. (6.36) . Solut io n for the duty cycle D lead s to
(6 .60 )
The maxim um value of D occ urs at m in i mum Vg and at fu ll loa d , and is give n in Table 6.2. The min imum
CCM va lue of D, occ ur ring at m axi m u m Vg, is a lso liste d .
The va lue o f the indu cta nce L is comp uted next. Th e m ag nitu de of th e inductor c urr e nt ripp le o.i
can be com pu ted in a mann er simi lar to th at used for th e no niso late d buck co nver ter to obtai n Eq. (2.15).
The res ult is
D'VT (6.6 l)
~i"' u ,

6.4 Converter Evalua1io11and Design 175
Tobie 6.2 Spreadsheet design example
Specifications
Maximum input voltage V8 390V
Minimum input voltage V8 260V
Output voltage V 15V
Maximum load power Pl oad 200W
Minimum load power P100,1 20W
Switching frequency f. lOOkHz
Maximum output ripple llv 0.1 V
wwForwardconverterdesign, CCM
Design variables
Reset winding turns ratio n/n 1 l
Flybackconverterdesign, CCM
Design variables
Turnsratioflilnt 0.125
Results w.E
Tums ratio n3/n 1
lnducior current ripple ll i
Maximum duty cycle D

0.125
2A ref to sec
0.462
Inductorcurrentripplelli
Results
Maximumdutycycle D
3A ref to sec
0.316
Minimum D, at full load
Minimum D, at minimum load
Inductance l asy 0.308
0.251
26µH
MinimumD, at full load
MinimumD, at minimumload
Inductancel
0.235
0.179
19 µH ref to sec
Capacitance C
Worst-casestresses
25 µF
En CapacitanceC
Worst-casestresses
210µF
gin
Peak transistor voltage v01 780V Peak transistorvoltagevQt 510V
Rms transistor current 1.13A Rms transistorcurrent 1.38A
Transistor utilization U 0.226 TransistorutilizationU 0.284
eer
Peak diode voltage v02 49V Peakdiode voltagev0 1 64V
Rms diode current i02 9.1 A Rms diode currentioi 16.3A
Peak diode voltage vD3 49V Peakdiode currenti01 22.2A
ing
Rms diode current iD3 11.1 A
Rms output capacitor current ic 1.15A Rmsoutputcapacitorcurrentic 9. I A
.ne
The worst -case maximum ripp le occurs in CCM at minimum duty cycle . Solution for L yields
L., _D'VT
_ ,
2M
(6.62)
Th is equation is used to select L such that the wor st-case ripp le is equal to the spec ified va lue of .6./, The
t
requ ired va lue ofL is listed in Table 6.2. The requ ired value of C that leads to the spec ified volt age rippl e
il v is also computed , using Eq. (2.60). Since Eq . (2.60) neglects capac itor esr, a larger value of C may be
requi red in pract ice .
If the converter operates in the discontinuou s conduction mode at ligh t load , then the controller
must reduce the duty cyc le D to maintain the required output vo ltage V. The conve rsion ratio M(D, K) of
the DCM forward converter can be found analy ti cally , using the method deve loped in the prev ious chap -
ter. A lterna ti vely , the non iso lated buck co nverter solution , Eq. (5.29), can be app lied di rectly if all ele-
ment values are refen-ed to the tran ~torme r seconda1y side . Hence, the output vo ltage in DCM is given by

176 Converte r Circuits
(6,63 )
with K = 2URT, ., and R = v2tr,,,na

· Solution for the dut y cycle D yields
D,, 2./k
J(2n3V~-,)-I
n 1V
(6.64)
ww
The actual dut y cycle is the smaller of Eqs. (6.60) and (6.64). The minim um duty cycle occurs at min i-
mum load power and maxi mum V11, and is given in Table 6.2.
Worst-case component stresses can now be evaluated. The peak transistor voltage is given by
w.E
Eq. (6.37). The nus transisto r curren t is calculate d with the help of Appendi x I. With the ass umption that
the transformer magne tizing current can be neglected, the transistor current is equal to the reflected
inductor current i(r)n 3 /n 1 during subinterval I, and is equal to zero during subintervals 2 and 3. The rms
asy
transistor current is therefore
_ 11.1
lw,.,.,.--,0
r
VI /2 (t.1) 2
+-1-
_ 113 rn
-- - vD l
(6.65)
En
. . 111 ' 111
where [,, l\"'j\ ~The worst-case value of / Q1.,,,.,.occurs at maxim um load power and at maxi mu m duty
gin
cycle. Expressions for the worst-case stresses in the diodes and output capacitor , as well as for the fly-
back converter, are found in a similar manner. Their derivation is left as an exercise for the studen t.
The designs of Table 6.2 are good ones which illust rate the tradeoffs inhere nt in selection of an
eer
isolated converter topology, although some additional design optim ization is possible and is left as a
homework problem. Both designs utilize a turns ratio of 8: I. The rms transistor current is 22% higher in
ing
the flyback converter. Th is current could be reduced, at the expense of increased transistor voltage. The
flyback converter imposes only 510 V on the transistor. A transis tor rated at 800 V or 1000V could be
used, with an adequate voltage derating factor and some margin for voltage ringi ng due to transformer
leakage inductance. The 780 V imposed on the transistor of the forward conve11er is 53% higher than in
.ne
the flyback conve1ter. Power MOSFETs with voltage ratings greater than IOOOV are not available in
1997; hence, when voltage rin ging due to transforme r leakage inducta nce is accounted for, this design
will have an inadeq uate voltage design margin. This problem could be overcome by chang ing the reset
winding turns ratio n/11 1, or by using a two-transistor forward converter. It can be concluded that the
transformer reset mecha nism of the fly back converter is better than that of the convent ional forward con-
verter.
t
Because of the pulsating nature of the secondary-side curre nts in the flyback converter, the rms
and peak secondary curren ts are sig nifica ntly higher than in the forward converter. The fly back converter
diode must conduct an rms current that is 47% greater than that of forwa rd converter diode 0 3 , and 80%
greater than the current in forward converter diode D2 . The secondary windi ng of the fly back tra nsformer
must also conduct this current. Furthermore , the output capacitor of the flyback converter must be rated
to conduct an rms current of 9. 1 A. This capacitor will be much more expensive than its counterpar t in
the forward conve1ter. It can be concluded that the nonpulsati ng output current property of the forward
converter is superior to the pulsat ing outpu t current of the flybac k. For these reasons, fly back converters
and other converters having pulsa ting output currents are usually avoided when the applicatio n calls for a
high-current output.

6.5 of Key Points

Sw11111ary 177
6.5 SUMMARYOF KEYPOINTS
I. The boost converler can be viewe d as an inve rse buck converter, whi le 1he buck-boo st and Cuk converle rs
ar ise from casca de con nections of buc k and boos t co nverlers. The pro pert ies of these co nverters ru-eco ns is-
1en1 with lheir origins. Ac outpu ts can be ob1ained by di fferem.ial connecl ion of lhe load. An infinite num -
ber of conve rters are possible, and several are lis ted in th is chapler.
2. For undersla nd.ing lhe openll ion of most conven ers conlaining lransforme rs, the transformer can be mod-
eled as a magneliz ing induc ta nce in paralle l wilh an idea l transform er. The mag net iz ing inducta nce mus t
obey all of the usual rules for indu clors , includ in g lhe p rincip le of voh-seco nd ba lance.
ww 3. The s teady -state be havior of lra nsfo rme r- isolated conver lers may be unders tood by first rep laci ng lhe
transfor mer wi th the mag netizi ng-indu c tance -plus- ideal -tran sfo rm er equ iva lent c ircu it. The tec hnique s
developed in the prev iOLL S chapters can then be applied , incl udi ng use of ind ucto r vo lt-se cond bala nce and
w.E
capacilor charge ba lance to find de curr e nt s and voltages, use of equivalenl c ircuits to model losses and
effic iency, and analysis of the disconlinuous co nduction mode.
4. In the full-br idge , ha l f-bridge , and p us h-pu ll iso lated versio ns of the buck and/o r boost conve rlers, the
tra nsforme r freq uency is twice the output ripple freq ue ncy. The transfor mer is resel while it lransfers
5,
asy
energy: lhe appl ied voltage po lari ty alternates on success ive sw il ching periods .
In the conve nti onal forward converle r, lhe transfo rm er is resel whi le the trans istor is off. The tra ns former
En
magne tizing ind ucta nce operales in the disconlinuo us co nduc t ion mode, and the maximum duty cycle is
limi led.
gin
6. The flyback converte r is based on the buck-boo st conver ter. The flyback transfor mer is actually a two-
wind in g indu ctor, wh ich s1ores an d lransfe rs energy.
7. The transfo rmer tu rns ratio is an extra degree -of-free dom which the des igner can choose lo op timize lhe
eer
converte r design. Use of a co mputer spreadshee t is an effec ti ve way to determine how Lhe choice of Iurn s
rntio affec ts the compa nenl vohage and current stresses.
ing
8. Total active swi tch slress, and aclive swilch utili zat ion , are two si mplif ied figure s -of-meril whi c h ca n be
used to compare lhe va ri ous conve rter c ircu its.
.ne
R EFERENCES
t
[ I) S. CU K, " Mode ling, Analys is, and Design of Swi lching Converters ," Ph.D . Lhesis, Cal ifornia Jnslil ute or
Technology, November 1976.
[2] S. CUK and R. D. MIDDLEBROOK , "A New Optim um Topa logy Swilchi ng De-lo-De Converler," IEEE
Powe r Elec troni cs Specia lists Co nfer ence, 1977 Re<:0rd, pp . 160 -179, Ju ne 1977 .
[3) E. LANDSMAN,;,A Unifying Deriva tion of Swilch ing De-De Conve rler Topologies ," IEEE Power Electron-
ics Spec ialists Conference, 1979 Record , pp . 239-243 , Ju ne 1979,
[4) R. TYMERSKIand V. V0RPERJAN, "Ge nera tion , Class ifica tion , and Ana lysis of Switc hed -Mode De-to-De
Conve rlers by the Use of Conven er Cells ," Proceedinv International Teieco1111mm icatio11s Energy Confer -
ence, pp. 181- 195, Oc 1obe r 1986.
[SJ S. CUK and R. ERICKSON, " A Co nceptually ew High-Freq uency Switc hed-Mode Amp lifier T ec hnique
Elim ina tes Curren l Ripple, " Proceedings Fifrh Nationa l So/id-State Power Conver.fion Conference (Pow-
erco n 5), pp . G3. 1-G3.22, May 1978.

178 Co11verter
Circuils
[6] F. BARZEGARand S.Cuk , "A ew Switched-Mode Amplifier Produce s Clean Three-Phas e Power ," Pro-
cee din gs Ni nth International Solid -State Power Conve rsion Conference (Powercon 9), pp. E3 . l- E3. 15 ,
July 1982.
[7] K. D. T. NGO, S. CUK, and R. D. MIDDLEBROOK , "A New Flyback De- to-T hree-Phase Co nverler with
Sinu soida l Ou tp llls," IEEE Power Electronics Specialists Confe re11ce, 1983 Record, pp. 377-388.
[8] R. W. ERICKSO , "Synlhesis of Switched -Mode Convert ers," IEEE Power Electro11ics Specialists Co11fer-
en ce, 1983 Reco rd , pp. 9-22 , June 1983.
ww
[9] D. MAKSl:\'iOVJC and S. CUK, ''Genera l Propert ies and Synthesis of PWM De- De Conveners,'' IEEE Power
Elec troni cs Specia lists Conference, 1989 Reco rd, pp. 515 -525 , June 1989.
(10] M. S. MAKOWSKI,"On Topological Assump tions on PWM Converters-A Reexamina tion," IEEE Power
[I l] w.E
Electroni cs Specialists Conferen ce, 1993 Record, pp. 141-14 7, June 1993.
B. ISRAELSEN, J. MARTIN, C. REEVE, and V . Scow , "A 2.5 kV High Relia bility TW T Power Supp ly:
Design Techniq ues for Hi gh Effic iency and Low Ripple," IEEE Power Electronics Specialists Conference,
(12] asy
1977 Reco rd , pp. 109-130 , Jun e 1977.
R. SEVERNS, "A New Current-Fed Converter Topo logy," IEEE Powe r Ele ctroni cs Specialis ts Confere nce,
(13] En
1979 Record , pp . 277-283, June 1979.
V . J. THOTTUVELIL,T. G. W ILSON, and H. A. OWE • " Analy sis an d Des ign of a Push-Pu ll Curre nt -Fed
[14] gin
Conve rter," IEEE Power Electroni cs Specia lists Confe rence, 1981 Recor d, pp. 192-203 , June 1981.
R . REDL AND . SOKAL, " Push - Pull Curren1-Fe d Mu ltip le- Ou tp ul De- De Pow e r Conve rte r with On ly
eer
One induct or an d with 0- 100 % Sw itc h Duty Ratio ," IEEE Power Electronics Specia lists Conference,
1980 Record , pp. 341-345, Jun e 1982.
[15]
ary I0, 1976.
ing
P. W. CLARKE,"Converter Reg ulation by Conlrolled Conduction Over lap," U. S. Patent 3,938,024 , Febru-
(16] R. P. MASSEYand E. C. SNYDER
.ne
, "High-Voltage Single-Ended De-De Converter ," IEEE Power Electro11-
ics Sp ecialists Confere11ce, 1977 Reco rd, pp . 156-159, Jun e 1977.
[17]
(18]
D. MAKSIMOV1(: and S. CUK, " Switchi ng Conver ters w ith Wide DC Conversion Range,'' IEEE Tra11.
tio11s 011Powe r Electro nics, Vol. 6, No . 1, pp. 151-15 7, January 199 1.
R. D. MIDDLEBROO K and S. C::uK,

rnc-
"I. olation and l\fohiple Outputs of a ew Optimum Topolog)' Switch-

t
ing De-to-De Con verter," IEEE Power Electronics Specialists Conference, 1978 Record, pp . 256-264, June
13-15, 1978.
(19] T. G. WILSON, "Cross Regulation in an Energy-Storage De-to-De Conve rter wilh Two Regulated Oul-
put s," IEEE Power Electronics Specialists Conference , 1977 Record , pp . 190- 199, Ju ne 1977.
[20] H. MATSUO, "Com parison of Multiple-Output De-De Conve rlers Using Cross Regulation," IEEE Power
El ectronics Sp ecialist.1· C01fe rence, 1979 Recor d, pp. 169- 185 , June 1979.
(2 1] K. HARADA, T. NABESHlMA, and K. HISANAGA, "Sta te- Space Ana lys is of the Cross -Regu lation ," IEEE
Po wer Elect ro11ic.1·Spel'ialists Conference , 1979 Reco rd, pp. 186- 192, Jun e 1979.

Problems 179
[22) J. N. PARK and T . R. ZALOUM, "A Dua l M ode Forward/F lyback Converte r," IEEE Power Electronics Spe-
cialists Cmiference, 1982 Reco rd, pp. 3-13, June 1982 .
[23) S. CIJK, "Genera l Topologica l Properties of Swi tching Struct ures," IEEE Power Electronil'.r Speciali.m
Co1ifere11
ce, 1979 Reco rd, pp. 109- 130 , Ju ne 1979.
(24) R. SEVERNS and G . BLOOM, Modem Dc-t o--Dc Switclwwde Power Converter Circuits, ew Yor k: Van
Nostra nd Reinho ld , 1985.
[25) N . MOHAN, T . UNDELAND, and W. ROBBINS, Power Electroni cs: Converters, Appli cations, and Design,
ww
2 nd edit., New York: John Wiley & Son s, 1995 .
(26 ) J. KASSAKIAN , and G. VERGHESE, Principles of Power Electronics, Readin g, MA: Addi-
, M. SCHLECHT
son-Wesley, 1991.
(27)
(28)
w.E
D. MITCHELL, De-De Switching Regulator Analysis, ew York : McGraw -H ill, 1988.
K. KIT SUM, Switch Mode Power Conversion: Basic Theory and Design, New York : Marce l Dekker, 1984.
(29)
asy
R. E. TARTER, Solid-Swte Power Conversion Handbook, New York: Joh n Wiley & Sons, 1993.
[30)
En
Q. CHEN, F. C. LEE, and M. M. JOVANOVIC, '' DC Ana lysis and Design of Multiple-Outpu t Forward Con-
ve rters with Weighted Vol tage-Mo de Contro l," IEEE Appli ed Power Electronics Conference, 1993 Reco rd,
pp. 449-455 , March 1993.
PROBLEMS gin
6.1 Tappe d-indu cto r boost co nverter. The
boost co nve rter is sometimes mod ified as eer
n,
turns
"2
turn s D1
illus trat ed in F ig. 6.4 1, to obtai n a larger
conver sio n rat io than wou ld o therw ise
occur. The inducto r wind ing con tains a ing +
total of (111 + 112 ) tu rns . The tra nsistor is v, C R
.ne
V
conn ec ted to a tap placed n 1 turn s from the

left side of the inductor, as show n. The
tapp ed inducto r can be vie wed as a two -
wind in g (n 1: 112 ) transfo rm er , in wh ich the
two wind in gs are conn ected in series. The
ind uctanc e of the en tire (111 + 112 ) turn
Fig. 6.41 Tapped-inductor
6.l
boo st conv er ter, Problem
t
winding is L.
(a) Ske tch an eq uivalent circu it model for the tapped induc tor, which includes a magnetiz ing ind uc-
tance and an ideal tran sfo rm er. Label the values of the magne tizi ng indu c tan ce and tu rn s rat io.
(b) Determi ne an analyti ca l expre ssion for the conv ersi on ratio M = V/Vx. You may assu me th at the
transi stor, diode , tapped indu ctor , and capac itor are loss less. You may also assu me that the con-
verter opera tes in co minu ous conduct ion mode.
(c) Sket ch M(D) vs. D for 111 ==112 , and compare to th e nontap ped ( 112 = 0) case .
6.2 Ana lys is of the DCM flyba ck conve 1t er. The flyback conver te r of Fig. 6.30(d) op erates in the discontinu-
ous con du ction mode.
(a) Mod el the flyback tran sfo rmer as a ma gnetizin g inductance in para llel with an ideal transform er,

180 Converter Circ11

its
and sketch the converte r circui ts durin g the three sub interv al s.
(b) Derive the conditions for operation in discont inuous conduction mode.
(c) Solve the converter: deri ve expressions for the stead y-state o utput vo ltage Vand su h inte rva l 2
(diode co nduction interva l) du ty cycle D2.
6.3 Analys is of the isolate d inverse -S EPlC of Fig. 6.39. You may ass ume th at the conve n er ope rates in the
conti nuous conduction mode, and that all inductor current ripples and c apacitor voltage ripples are
small.
(a) Derive expressions fo r the de co mpone nts of the magne ti zing curre nt, indu c tor current , and
capac itor voltages.
ww
6.4
(b) Derive analyt ica l expressions for therm s va lues of the pri mary and secondary winding c urr ents .
Note that these quant ities do not si mply scale by the turns rat io.
l11e two-transistor flyhack converte r. The converter of Fig. 6.42 is sometimes used when the de in put
w.E
voltage is high. Transis tors Q 1 and Q2 are d riv e n wi th the same gating signal , such that they tu rn on and
off si multaneousl y with the same d uty cycle D. Diodes D 1 and D 2 ensure that the off state voltages of the
transis tor s do not exceed Va. The converte r opera tes in d isco nti nu ous conduction mode. TI1e magnetiz-
ing indu ctance, referred to the primar y side, is LM"
asy D1.
Q.
-l
D3
Fig. 6.42 Tua-transistor fly-

En +
back converter,Problem 6.4. vg +
gin-l II
C R V
eer
D2
Q2
(a)
(b)
Determine an a nalyti ca l expression for the steady- state ou tpu t vo ltage V.
Over wha t range of du ty cycles does the transformer reset properly? Exp lain. ing
.ne
6.5 A nonid ea l tlyback converte r. The tlyback converter show n in Fig. 6.30(d) opera tes in the co ntinu ous
co nduc t ion mode. The MOS FET has on-resista nce R0 11 , and the diode has a cons tant forward voltage
t
drop V0 . The flyback transfom1er has primary winding resistance R1, and secondary wind ing resistance
R_,.
(a) Derive a complete steady-state equ iva lent circui t model , wh ich is valid in the co ntinuous con-
du ctio n mode, and wh ich correc tly model s the loss e lements liste d above as well as the converter
inp ut and o ut pu t ports . Sketch yo ur equivale nt c ir cui t.

(b) Derive an analy ti ca l expre ssio n for the converter e fficie ncy.
6.6 A low-vo ltage co mputer powe r sup p ly wit h sync h ro no us rectifica tion. The tre nd in dig i ta( integra ted cir-
cuits is towards lower power supp ly voltages . It is diffic ult to cons tru ct a h igh -effic iency low -voltage
power suppl y, because the cond uction loss ari si ng in the secondary -side diodes becomes very large. l11e
objec tive of this problem is to estimate how the effic iency of a forw ard converter varies as the out pu t
voltage is reduced, and to inves tigate the use of synchro nous rect ifi ers .
The forward conv e rter of Fig. 6.22 opera tes fro m a de in pu t of Vg = 325 V, and supp lies 20 A to
its de load. Co nsider thr ee cases : (i) V = 5 V, (ii) V = 3.3 V, and (iii) V = 1.5V. For each case, the turn s
ratio n/ 111 is chosen such that the conve rter produ ces the requi red ou tput vo ltage at a transistor duty
cycle of D = 0.4. The MOSFET ha s on-res istan ce R0 ,. = 5 n. 111e seco ndary-side schottky diod es have

Problems 181
forward vol tage drop s of Vf. = 0.5 V. All other elements ca n be considered ideal.
(a) Derive an eq uiva lent c ircu it for the forward converter , which mode ls the semiconduc tor cond uc-
tion losses described above.
(b) Solve your model for cases (i), (ii ), and (i ii ) described above. For eac h case, determine numeri -
cal values of the turns ratio n/n1 and for the efficie ncy TJ.
(c) The secondary -side Scho ttk y diodes are replaced by MOSFETs operating as synchro nous recti-
fier s. The MOSFETs each have an on-resista nce of 4 mQ. Determ ine the new nume rica l values
of the turns ra tio 11i/nI and the effic iency Tj, forcases (i), (ii), and (iii).
6.7 Rotatio n of swi tching cells . A netwo rk co ntain ing swi tches and react ive eleme nts has term inals a, b, and
ww c, as ill ustrate d in Fig. 6.43(a) . You are given that the relationship between the term inal voltages is
Vb/Vo,· = µ.([)).
(a) A a b B
w.E v,
..
~=µ(D)
+
V1,c
+
asy
C
(b)
En (c) 1: n
gin +
eer
Fig. 6.43 Rotation of three-terminal switching cells,
Problem 6 .7
ing
.ne
(a) Derive expressions for the source-to-load conversion ratio VIVK = M(D), in ter ms of µ (D) , for the
fo llowi ng three connection schemes:
(i)
(i,)
(ii,)
a-A b-B c-C
a-B b-C c-A
a -Cb -A c-B
t
(b) Consi der the thr ee -terminal netw ork of Fig. 6.43(b). Determine µ(D) for this networ k. Pl ug yo ur
answer into yo ur res ults from part (a), to verif y th at the buck, boost , and buck- boost converters
are generated.
(c) Consi der the three -term inal networ k of Fig. 6.43(c). Determine µ(D) for thi s network. Plu g your
answe r into your results from part (a). What conver ters are generated?
6.8 Transfo rmer-isolated current -sense circuit. It is often req uired that the curr ent flowin g in a po wer tra nsis-
tor be sensed. A no ni nduct ive resistor R placed in series with the trans istor will prod uce a voltage v(t)
that is proporti onal to the transis tor drai n current i0 (t) . Use of a transforrner allows iso lation between the
power transistor and the co ntrol ci rcuit. The transformer turn s ra tio also allows red uction of the curren t
and power loss and increase of the vo ltage of the resistor. This probl em is concerned with desig n of the
transformer -isolated curren t-sense circ uit of Fig. 6.44.

182 Converter Circu it.<
Fig. 6.44 Trnnsformer-isolateJ circuit for sensing v(t)

the transistor switch current, Problem 6.8
ww The tra nsfo rmer has a si ngl e-turn primary and an n-turn seco ndary win d ing. The tra nsisto r
switches on and off wi th duty cycle D and swi tchi ng freq uency fs.
Wh ile the transis tor con du cts , its cur -
rent is esse ntially cons ta nt and is equa l to /. Diode s D 1 and D, are co nventional silicon diodes havi ng
w.E
forward volt age drop V1). Diode Dz is a zener diod e, whic h can be mode led as a voltage source of valu e
V.,,wi th the polarit)• ind icated in the figure. For a prope r design, the circu it elem ents should be chosen
such that the tra nsfo rme r mag neti zing curre nt, in conjun ction wi th diode D2, operates in d isc ontinuo us
conduc tion mode. In a good desig n, the mag netizing current is muc h smaller th an the transi sto r cur rent.
asy
Three su bint ervals occur durin g each swi tchi ng period ; s ubinter va l I , in whi ch Q 1 and D 1 conduct ; sub-
inte rva l 2, in which D 2 and D 7 cond uct ; subin terval 3, in which Q 1, 0 1 and D 2 are off.
(a) Sketch the cu rrent sense c ircuit, re pl acin g the transformer and zener diode by their equi va len t
{b)
circuits.
En
Sket ch the waveforms of the transisto r c urrent i0 (t), the tran sfor mer ma gne tizi ng cu rrent iM(I),
(c)
gin
the pri mary windin g vol tage , and the vol tage v(I). Labe l salie nt feature s.
Determ ine the condi tions on the zener voltage V7 that ensure that the tran sforme r magnetizi ng
curr ent is reset to zero before the end of the sw itchi ng period.
(d) You are give n the follow ing specifi cat io ns:
Sw itchi ng frequency J;=
eer
I 00 kllz
Transi stor dut y cyc le
Tran sis tor peak c urr ent
D:, 0.7'.i
ma.-.:
i"(t) ~ 25 A
ing
The output voltage v(t) sho uld equal 5 V when the transistor current is 25 A . To avo id saturatin g
.ne
the transform er core, the volt-seco nds appl ied to the single-t urn prim ary winding wh ile the tran-
sistor co nducts should be no greater than 2 volt-µ,;.,c. The silico n diode forward voltage drops
t
are V0 "' 0.7 V.
Des ign the circ uit : select va lue s of R, 11, and V2 ,
6.9 Optimal reset of the forward co nverter transfo rmer. As illustra ted in Fig. 6.45, it is poss ible to reset the
tran sform er of the forward convene r usi ng a vo ltage source oth er tha n the de input V1 ; several such
schemes appear in the lite rature. By op tim a ll y choos ing the value of the reset voltage V,, th e peak volt -
age stresses impo sed on tra nsistor Qt and diode D 2 can be reduced . The max imum duty cycle can also be
increased , leading to a lower transfor mer turn s ratio and lower tra nsistor current. TI1e resu lt ing improve-
ment in con ve rter cost and effi ciency can be s ign ifica nt w hen the de in put voltage var ies over a wid e
range.
(a) As a function o f V,,, the tran sisto r duty cycle D, and the tran sfo rmer turns ratios , what is the min-
imu m va lue of V, that causes the transfo rmer magnetizi ng current to be reset to zero by the end
of th e switching pedocJ'l
(b) For your choic e of V, from part (a), what is the peak voltage imposed on transistor Q 1'?
This converter is to be used in a uni versa l- inp ut off -line applicatio n, wit h the followin g spec ifica tions.
The input voltage V,, can va r y between 127 and 380 V. The load vo ltage is regulated by var iatio n of the

Problems 183
R V
v, +
Q~
ww
w.E
Fig, 6.45 Forwardcunvcncr wi1h aulliliary reset winding, Pmb lcm 6.9
duty cycle, and is equal to 12 V. The load power is 480 W.

(c)
(d) asy
Choose the turns ratio 113' 111 such that the total active switch stress is minimized . For you r choice
of 11/111, o,•er what range wi II the duty cycle vary? What is the peak transistor current?
Compare your design of Part (c) with the convemional scheme in which 111 ;;; 112 and V, "' Vt .
(e)
En
Compare the worst-case peak transistor voltage and peak transistor current.
Suggest a way to implement the voltage source V,. Give a schematic of the power-stage compo-
6.10
required by your implementat ion, if any.
gin
nents of your implementa tion. Use a few sentences to describe the control-circuit funct ions
Design of a multiple-output de-de flyback converter. For this problem, you may neglect all losses and
eer
transformer leakage inductances. It is desired that the three-output nyback converter shown in Fig. 6.46
operates in the discontinuous conduction mode, with a switching frequency of f,"" 100 kllz. The nomi-
nal operati ng conditions are given in the diagram, and you may that there are no variations in the inp ut
ing
voltage or the load currents. Select DJ = 0.1 (the duty cycle of subinter val 3, in which all semiconductors
are off). The objective of this problem is to find a good steady-state design, in which the semiconductor
peak blocking voltages and peak currents are reasonably low.
.ne
vs +
+ 15V
IA
t
165 V de
- 15 V
0.5 A
-.
+5 V
4A
Fig. 6.46 Three-output nyback convener design, Prnb lem 6 .IO.

184 Converter Circuit.,
(a) It is poss ib le to find a design in wh ich the transistor peak b lock in g voltage is less th an 300 V, and
the peak diode bloc king voltages are all less tha n 35 V, under s teady -state cond iti ons. Des ign the
co nven er s uc h tha t this is true. Spe ci fy: (i) the trans istor d uty cy cle D, (ii) the mag ne tiz ing
inductance LM, referred to the primary, (iii) the turns ratios 111111,, and 11/11/!.
(b) For your design of par t (a) , de term ine the rm s curre nts of the fo ur win d ings. Note th at they don't
simp ly scale by the tu rns ratios.
6.11 Spreadsheet desig n.

(a) Deve lop the ana lyt ica l expres . ions for the " Res ults" and "Wo rst-case stresses" of the forwa rd
co nverter sprea dsheet design exa mple of Table 6.2.
ww (b)
(c)
Enter the for mu las you developed in pa rt (a) in to a co mp uter . pre ads heet , and veri fy th at yo ur
co mputed values agree w ith those of Tab le 6.2.
It is des ired to reduce the forward conver ter peak tra nsisto r ,,ottage to a val ue no greater than
w.E
650 V. Mod ify the design nu mb ers to acco mp lish this , and bri efly discus s the effec t on the other
component stresses.
(d) For these specificatio ns , what is the largest possible va lue of the trans istor u til ization of the
CCM fo rwa rd co nverter? How should the spreadsheet des ign va riab les be chose n Lo att ain the
6.12
asy
maximum transis tor ut ilization?
Spreads heet desig n of an isol ated Cuk co nverte r. T he isolated Ct1k con ve rter of Fig. 6 .40(c) is to be
des igned to meet the spec ifica tions listed in Table 6.2. The co nver ter is to be desig ned such that it oper-
(a)
En
ates in cont inuo us c ond uc tio n mode at fu II load.
Deve lop an alyt ical exp ress ions for t he fo ll owi ng quant it ies:
gin
• The max imum and m ini mu m dut y cycles, forCCM operatio n
• The peak voltages and rms curre nts of both se mico ndu ctor devices
• The ripp le magn itu des of the capac itor ,,oltages and inducto r currents
• The rm s capac itor c urr en ts
• Thetra nsis tor ut il iza t io n U
eer
(b)
(c)
va ria bles?
ing
En ter the fo rm ulas you develope d in part (a) into a computer spreadsheet. Wha t are the design
For the spe cifi ca tions lis ted in Table 6.2, selec t the des ign vari ables to attain what yo u believe is
.ne
the best design. Co mpa re the perfo rm ance ofyo m design w ith the fly back and forwa rd converte r
des igns ofTa ble 6.2.
t

ww
w.E
asy
En
Part II
gin
ConverterDynamicsand Control
eer
ing
.ne
t

ww
w.E
asy
En
gin
eer
ing
.ne
t

7
AC Equivalent Circuit Modeling
ww
w.E
asy
En
7.1 INTRODUCTION gin
eer
Converter systems invar iably require feedback. For example, in a typical de-de converter applicatio n, the
ou tput voltage v(r) mus t be kept co nstant , regardless of changes in the inp ut voltage vit) or in the effec -
ing
tive load resistance R. This is accom plished by bui lding a circ uit that varies the conve rter contro l input
[i.e ., the d uty cycle d(t)] in such a way tha t the output voltage v(t) is regu lated to be equa l to a desire d ref-
ere nce va lue v,..,J"In inverter systems, a feed back loop causes the outpu t voltage to follow a sinuso idal
.ne
reference voltage . In modem low-harmon ic rect ifier systems, a contro l system causes the conver ter in put
curren t to be proport ional to the input voltage, such that the input port presents a resist ive load to the ac
t
source . So feedback is co mm on ly employed .
A typical de-de system inco rporati ng a buck converter and feedback loop block diagram is
illustrated in Fig. 7.1. It is desired to design this feedback system in such a way that the ou tput voltage is
accurate ly regulated, and is insensit ive to distur bances in v/t) or in the load c urrent. In addition, the
feedback system sho uld be stable, and prope rties such as tra nsient overshoo t, se ttling time, and steady -
state regu lation shou ld meet specificat ions. The ac modelin g and des ign of converte rs and their con tro l
systems such as Fig. 7.1 is the subject of Part II of this book.
To design the system of Fig. 7. 1, we need a dynam ic model of the switch ing conve rter. How do
var iations in the power input voltage, the load curre nt, or the d ut y cyc le affect the outp ut voltage? What
are the small -sig nal transfe r fu nctio ns? To answe r these questions , we will extend the steady-state mod-
els develo ped in Cha pt ers 2 and 3 to include the dy namics intro duce d by the inductors and capacitors of
the converter. Dynamics of converters opera ting in the co ntinu ous conduct ion mode can be modeled
us ing tec hniques qu ite simila r to those of Chapters 2 and 3; the resu lting ac equivalent circuits bear a
strong resemb lance to the de eq uivalent circ uit s derive d in Chapter 3.
Modelin g is the represe ntat ion of phys ical phenomena by mathematical mea ns. In engi neering,

188 AC Eq11ivale11r
Cirwit Modeling
Power Switching converte r Load

input
-------
r____ "--.--.;.
'--------.
+
v(t) R
Feedback
connection
ww Transistor
gate driver Compensator
w.E ~LI~=;2_,
O(t) Pulse-width Ve G (s)
Vo/tag, v,.,
,
~ ~ reference
asy dT, T, t
Controller
Fig, 7.1
En
A simp le <l<.0-dc
regulator system , including u buck converter power stage and u feedback network .
gin
it is desired to mode l the important dominan t behavior of a system , while neg lec ting other in sign ifi ca nt
phenomena . Simp lified terminal equations of the compone nt elements are used, and many aspects of the
eer
system respo nse are neglected altogether , that is, they are "unm odele d." The resul tin g sim pli fied model
yields physical ins ight into the system behavio r, wh ich aids the eng ineer in designing the system to oper-
ate in a given specifie d mann er. Thu s, the modeling process involves use of approximations to neglect
ing
sma ll but com pli cat ing phenome na, in an attem pt to understand wha t is most im portant. Once this bas ic
insight is gained, it may be des irabl e to carefu lly refine the model, by accounting for some of the prev i-
.ne
ously ignored phenome na. It is a fact of life that rea l, physica l sys tems are complex , and their detai led
ana lysis can easily lead to an intractable and useless mathemat ica l mess. Approximate models are an
important tool for gai ni ng understa ndi ng and phys ica l insight.
As disc ussed in Chapte r 2, the switch in g ripple is small in a well -designed conve rter operating
in con tin uous co nd uctio n mode (CCM). Hence, we should ignore the switchi ng rip ple, and model only
the underlyi ng ac var iatio ns in the co nverter wavefo rms. For exam ple , suppose th at some ac variat ion is
introduced into the converter d uty cycle d(t ), such that
t
d(t) = D + D,.cosw,,,t (7. l)
I I
where D and f),,, are co m tants, D,11 ¢'. D, and the modu lation freque ncy (l),,, is much sma ller tha n the
converter sw itchi ng frequency w_,= 2n/,. The resu ltin g tra nsistor gate dr ive signal is illust rated in
Fig. 7.2(a), and a typ ica l converte r output voltage waveform 1!(1) is illu strat ed in Fig. 7.2(b). The spec -
tru m of v(t) is illu strated in Fig. 7.3. Thi s spectrum co nt ain s compo nents at the sw itching frequenc y as
we ll as its harm onics and sidebands; these components are small in magnitude if the sw itching rip ple is
sma ll. In add ition , the spec tru m conta in s a low -frequenc y compo nent at the modu lation frequ ency OJ,,,.
The magnitude and phase of th is component depend not onl y on the duty cyc le va r iation , but also on the
frequency response of the converter. If we neglect the swi tchin g ripple, th en this low -freque ncy compo -

7.1 lnt rod11ctio11 189
(a) Gate
drive
~ ~ ~
- - - ~- - ~
-
ww
(b)
w.E
Fig.
asy
7.2 Ac variution of the convert er signals : (a) transi stor gale dri ve sig nal, in which the du ty cycle varies
slo wly. and (b) the resulti11g converter output voltage waveform. Bo th the actual waveform v(I) (includ ing high fre-
En
quenc y sw itching ripple) and its averaged , low-frequ ency coinponent, (v(t)),,, are illus trated .
Spectrum
of v(t)
Modulation
frequency and its
harmonics
gin Switching
frequency and
sidebands
Switching
harmonics
eer
p .,~ ,a ,.,EE22L1l.\
(0
ing
.ne
Fig. 7.3 Spectrum of the outpu t vohage wa1•eform v(I) of Fig. 7.2 .
ne nt rema in s [also illustrated in Fig. 7.2( b)]. The object ive of our ac mode ling effo rts is to pred ict thi s
low -frequency compone nt.
A simp le meth od for deriv ing the small -signal mode l of CCM co nverter s is exp la.ined in
t
Sect ion 7.2 . The switc h ing ripp les in the indu cto r c urr en t and cap ac itor voltage wavefo rms are remove d
by ave ra gi ng over one switc h ing pe riod. Hence , the low -frequency compo nen t s of the ind uctor and
capac itor waveforms are modeled by equat ions of the form
(7.2)
. denotes t he ave rage ofx(t) over an in te rva l oflengt h T,:

where (x(1))7;,

190 AC Equivalem CircuitModeling
(xU)}r =
s
+Jri+r
,.s
, X('t)dt (7.3)
So we will empl oy the basic appro xi mat io n of re movi ng the h ig h-freq uency sw itch ing ripp le by averag -
ing over one sw itc h ing period. Yet the average value is all owe d to var y fro m one swi tc hing period to the
next, such that low -fre qu ency va ri atio ns are modeled . In effect , the " mov ing average " of Eq. (7.3) co nst i-
tutes low-pass filtering of the wavefo rm . A few of the num ero us refe rences o n average d model in g of
switc h ing converters are listed at the end of th is chap ter [1- 20].
Note that the pr inc ipl es of ind ucto r volt -seco nd balance and c apac itor charge balance predict
ww
th at the rig ht -hand sides of Eqs. (7.2) are zero whe n the co nverte r operates in equ ilib riu m . Eq uations
(7.2) describe how th e inductor c urr ent s and ca pac itor voltages cha nge when nonzero average indu ctor
volta ge and capaci tor curr ent are applied over a sw it c hing period.
Th e average d ind uctor vo ltage and ca pacitor c urrents of Eq. (7.2) are, in gener al , non lin ear
w.E
fun ctio ns o f the sig nals in the co nverter , and hence Eqs. (7.2) co nst itu te a set of non linea r diffe re nt ial
eq ua tio ns. Ind eed , the spect rum in Fig. 7.3 also co nta in s harm o ni cs of the modu la tio n frequ ency W111• In
most conve rte rs, these harm o nics become s ig n ific a nt in mag nitud e as the modul atio n freq ue ncy w,,,
asy
approac hes the swi tc hin g freq uency (J),., or as th e modu lati on ampl itude D,,. approaches the quiesce nt
duty cyc le D. onli nea r eleme nts are not un common in e lec tr ical eng in ee ring; indeed , a ll sem ico ndu ctor
devices ex hibit no nlin e ar beha vior. T o ob tai n a lin ear model th at is eas ier to analyze, we u sua ll y co n-
En
struct a sma ll-sig nal model that has bee n lin ea rize d abo ut a quiesce nt o perat in g poi nt, in whi c h th e har-
monics of the modulati on or e xc itation fre que ncy are neglec ted . As an exa mple , Fig . 7.4 ill ustra tes
linear izat ion of the fam ilia r diode i- v character isti c sho wn in Fig. 7 .4(b). Suppose tha t th e diode curr e nt
gin
i(t) has a quiesce nt (de) valu e / and a s ig n al co mp one nt i(r). As a res u lt , the voltage 11(
1) across th e di ode
has a qui escen t val ue Vand a signal co mpo nent 1i(1). If the signal co mpo nents are small compared to the
eer
qui esce nt va lues,
(7 4 )
ing
then the re lati o nship betwee n v(t) a nd i(t ) is app rox ima tely li near, O(t) = roi(t ). The c o nd ucta nce 1/rll
.ne
(a) (b ) Actual
+
SA
t
i
4A Unea rized
v= v+o Quiescent fu nctio n
3A operating
poim i(t)
:: --! C!Jv
,
(c)
+
0
0 0.5 V : IV
v V
f-vet
>
v
Fig. 7.4 Small-signal equivaler11circuil modeling of the diode: {a) a nonlinear diode c.:nmlu cting currenl i; (b) lin-
earizat ion or the diodecharactel'ist ic urnund a qu iescem ope rating po int; (e) 11line.irized small -signal model.

7.1 /111rod11
ctio11 191
0 ~ D
0 ,-.;;;:-- - -;---- ----
Quiescent
op~rati11g Fig. 7.5 Lineari zatiun of Ille static cuntrol -to-
uutput charactcristiG of tile buck-boos t convener
about the quicsc cm operating point D "' 0,5.
- V,
ww V
w.E
rep resents th e slope of the diode cha rac ter isti c, eva luate d at the quiescent operat ing poi nt. The small -sig-
qui escen t operat ing point.

asy
na l equivalent circ uit model of Fig. 7.4(c) describes the diode beh avior for sma ll variations arou nd the
An exa mpl e of a n onlin ea r converter ch.u-acte1istic is the de pende nce of th e stea d y-state o utpu t
En
voltage Vof the buck -boos t conve rter on the d ut y cycle D, ill ustr ated in Fig. 7.5. Supp ose that the con -
verte r operates with some de o~ttput volta ge, say, V =- Vg, co n-es pond ing to a qu iescent duty cycle of
gin
D = 0.5. Duty cyc le variatio ns d about thi s quie sce nt va lue will exc ite variat ions v in the output vo ltage.
If the ma gn itude of the dut y cycle vari ation is suffic iently small , then we ca n compu te the res ulting out-
put voltage var iat ions by lin ea rizing the cur ve . Th e slope of the linear ized chara cterist ic in Fig . 7.5 is
eer
chosen to be equ al to the slo pe of the actu al non linea r characteris tic at the qu iesce nt operat ing poin t ; th is
slope is the de con trol -to-output ga in of the converte r. Th e line arize d and nonli nea r character istics are
approx ima tely equ al in valu e provided th a t the dut y cycle va riations J ares ufficient ly smal l.
ing
A lth oug h it illustr ates the process of sma ll-signal linea ri zation , the buck -boos t examp le o f Fig.
7.5 is ove rs implifi e d . The ind ucto rs and ca pacitors of the co nverter cause the gai n to exh ib it a freq uency
response . To correc tly pr ed ict the poles an d zeroes of the sma ll-signal transfe r fun ctio ns, we must linea r-
.ne
ize the co nverter ave raged differe ntia l eq ua tions, Eq s. (7.2). Thi s is do ne in Section 7 .2. A small-s ig na l
ac eq uiva lent c irc u it ca n then be co nstruc ted using the metho d s deve loped in Chapter 3 . The res ulti ng
t
small -s ig nal model o f the buck -boos t co nve rte r is illustra ted in Fig . 7.6; this mode l can be solved u sin g
convent iona l ci rcu it a na lysis tec hni ques, to fin d the sma ll- signa l tran sfe r function s, ou tput impe dan ce ,
and othe r frequency -depe nde nt properties. In systems such as Fig . 7. 1, the equ iva len t c ircuit model ca n
be inse rted in place of th e con verter. Wh en sm a ll -sign al mode ls of the other system e le ments (such as the
vg(I) ld(t) I d(t ) C v(I) R
Fig. 7.6 Small-signal ac equivalent circ uit lllOdelof the buck-boo~t converter.

192 AC Equivalent CircuirModeling
puls e-width modu lator) are inserted, then a com plete linearized system model is obtaine d. Th is model
can be analyzed using standard lin ea r techn iques, such as the Lap lace transform, to gain ins ight into the
behavior and properties of the system.
Two wel l-known var iants of the ac modeling method, state-space averag ing and ci rcuit averag -
ing, are ex plain ed in Sections 7.3 and 7.4 . An extension of circu it averag ing, known as averaged switch
modeling, is also discussed in Sect ion 7.4 . Since the switc hes are the only elements that introduce
sw itchi ng ha rmonics , equ ivalent ci rcuit models can be derived by averag ing only the switch waveforms.
The conve rter mode ls suitable for analy sis or simula ti on are obtai ned sim p ly by replac ing the swi tches
with the averaged switch model. The averaged sw itch modeling tec hni que can be extended to other
modes of opera tion such as the disco ntinuous cond uct ion mode, as well as to curren t programmed co n-
ww
trol and to resonan t converters. In Section 7.5, it is shown that the small -s ignal model of any de-de
pulse -width modu lated CCM conve rter can be wri tten in a standar d form. Ca lled the canonical model,
th is equivalent circu it desc1ibe.s the basic physical functions that ,my of these converte rs must perform . A
w.E
simple model of the pu lse-width modu lator circu it is desc ribed in Section 7 .6.
These models are useless if you don't kn ow how to app ly them. So in Chap ter 8, the frequenc y
response of converte rs is explored, in a des ign-or ien ted and detailed manner. Sma ll-signal transfer fun c-
tions of the bas ic conve rters are tabulat ed. Bode plots of conve rter transfer functions and impedances are
asy
derived in a simple, approxim ate manner, whic h allows in sight to be gained into the or ig ins of the fre-
quency respo nse of com plex conve rte r syste ms.
These resu lts are used to des ign co nverter control sys tems in Chapte r 9 and input filters in
En
Chap ter IO. The mode ling tec hn iques are exten ded in Chapte rs 11 and 12 to cover th e disco ntinuous con -
duction mode and the cur rent prog ram med mode.
7.2 THE BASIC AC MODELING APPROACH gin

eer
Let us derive a sma ll-s igna l ac model of the buck -boos t converter of Fig. 7.7. The analys is beg ins as
usual , by deter minin g the voltage and curre nt wavefo rm s of the inductor and capacitor. When the swi tch
ing
is in pos it ion I, the c ircuit of Fig. 7.8(a) is obtai ned. The indu ctor voltage and capacitor current are:
.ne
(7.5)
(7.6)
We now make the sma ll-rippl e approximation. But ra ther than replacing 118 (!) and v(t) wit h their de com -
ponents Ve and Vas in Chapter 2, we now replace them wi th the ir low -frequency averaged values (v/t)\ ,
t
and (v(r)),,. defi ned by Eq. (7.3) . Equa tions (7.5) and (7.6) then become
2 +
i(t)
v/t) C R v(t)
L
Fig, 7.7 Iluck -boosr cnnver ter example .

7.2 The Bmic AC Modeli11

g Approach 193
+ +
v(t) v(t)
Fig. 7.8 Buck-boo.~rconverter circuil: (a) when the switch is in position I, (IJJ when the swirch is in position 2.
ww (7.7)
w.E lv(t)}
ic(t) = cdv(t) ., __\ - ..!.!.
,/J R
(7.8)
asy
Hence , during the first sub interval, the inductor current i(t) and the capacitor voltage v(t) change with the
esse ntially constant slopes given by Eqs. (7 .7) and (7.8). With the sw itch in pos ition 2, the circ uit of
Fig. 7.8(b) is obta.ined. Its in duc tor voltage and cap acitor current are:
En (7,9)
. ( ) _ C ,lv(t ) _ '( ) v(r)

1,. / - -;J°/ - - I I - R gin (7.10)
Use of the small -ripp le approximation,

eer
to replace i (t) and v(t) with their averaged values , yields
di(/) ~ { v(I) ) T
vi (/)= L -d
t s
ing (7.11)
.ne
. dv(t) . {v(l)}i, (7.12)

1c(/)= C - ""-(1( 1)) - --
di ~ R
During the second subinterval , the inducto r current and capac itor voltage change wit h the essentially
cons tant slopes given by Eqs. (7.1 1) and (7.12). t
7.2.1 Averaging the Inductor Waveforms
The induc tor voltage and curren t wavefo rm s are sketched in Fig. 7.9. The low -frequency average of the
inductor voltage is found by eva lu ation of Eq. (7 .3)- the inductor vo ltage during the first and second
subint erv als, given by Eqs. (7.7) and (7.11), are average d:
( v1_(1)) r = -1\
5 I
i"
I
r., vl( t )d t ""d(!) ( vg(t)) + d'(r) ( v(1)) r
T> s
(7.13)
whe re d'(t) = 1- d(t). The right -hand side of Eq. (7. 13) contains no swi tch ing harmoni cs, and models

194 AC Equiva/enr Circuir Modeli11

g
(a)
r---
)),, =d(v,(1)1, +d ' (v(t)}r,
(vL(I
0 --- ~ -----------
--- -------------------------
-----
-------
ar, T, I
L J Fig. 7.9 Buck-boo, 1 conve rter waveforms :
(v(t)):
' (a) indu clor voltage, (b) indu clor CLtrrcnt.
(b) i(I)
ww
w.E
onl y the low -frequency
Eq. (7 .2) leads to
asyco mponents o f lhe in ducto r vo ltage waveform. In se rtion of this equ at ion inlo
tl{i(t))r
l-~d
En
• = d(t) (v/1))+d '(t) (v<t))
~
7
(7 . 14)
gin
l 1
This equa tio n descri bes how th e low -fre q uency co mp one nts of lhe ind uc to r c urren t va ry w ith ti me.
7.2.2 Discussion of the Averaging Approximation

eer
In steady-state, the actua l inducto r curre nt w avefo rm i(t) is period ic wi th period equal to the swi tching
per iod T,: i(t + T) =
i(t). Du rin g tran sie nts, there is a net change in i(t) over one sw itching pe riod . Thi sing
net change in in d uctor c urr enl is correc tly pred icte d by use of lhe average in d uc tor vo lta ge . We c an show
.ne
tha t thi s is true, based on th e in ducto r eq uat ion
Di vide by L, and in tegra te bo th sides from t to I+ T 1 :

L di(r) _
dt -
()
VL f (7.15)
t
( ' +1', . I J,r+T

., (7. 16)
J, i/r-' L I
VL(t)dt
Th e left -hand side of Eq. (7. l 6) is i(t + T.) - i(t), wh ile the rig ht -ha nd side ca n be expresse d in ter m s of
the defi niti o n of(v1.( I)), ,, Eq . (7 .3), by multip ly in g and di vidin g by T, ob tain
i(I + T,) - i(t) = i T, ( vL(I)) r, (7.17)
Th e lef t-hand side of Eq. (7.17) is the ne t change in indu ctor cu rr en t over one co mpl ete sw itch in g per iod.
Eq ua tion (7 .17) states that th is cha nge is exact ly eq ual to the sw itch in g perio d T, m u lt ip li e d by the aver -

age slope (vl(t)}i,IL.

Equation (7 .17) can be rearranged to obtain
L i(I + T,)-
T
i{I) _ I (
-\V~/
l)T (7.18)
$ .,
Let us now find the derivative of (i(t)\:
d(i(1)) 7,
-d-,-=di
d(T;,
1 J,1
+r,. )-i(t+T
i(,)d, -
,)- i(t)
1~
(7.19)
ww
Sub stit ut ion ofEq. (7. 19) into (7.18) leads to
w.E (7.20)
asy
which coincides with Eq. (7.2).
Let us next compu te how the indu ctor current changes over one switching period in our buck-
boost example. The inductor current waveform is sketched in Fig. 7.9(b). Assume that the inductor cur-
En
rent begins at some arbit rary value i(O). During the first subinterval, the inductor current changes with
the esse ntially consta nt value given by Eq. (7.7). The value at the end of the first sub inte rva l is
-
i(O} +
gi--------
(dT,)
------
nee
({v/~)r.
,)
(fina l value) = (initial value)+ (length of interval) (average slope)
(7.21)
r i
Dur ing the second subin terva l, the inductor curre nt changes with the essen tially constant value given by
Eq. (7.11). Hence, the value at the end of the second subinterval is
n
(~v{tT
,) g.n
-
i(T,) + (d'T,)
------ -------------
(fina l value) = (initial value) + (length of interval) (averageslope)
(7.22)
et
By subs titut ion of Eq. (7.21) into Eq. (7.22), we can express i(TJ in terms of i(O),
i(7~) = i(O) + :, (d(t) ( Yx<

/)}T, + d'(t) ( V(I)}r,) (7.23)
~
(v,(t))I
'
Equations (7.21) to (7.23) are illustrated in Fig. 7.10. Equation (7.23) expresses the final value i(T.,)
directly in terms of i (0), without the interm ediate step of calc ulating i(DT,). This equation can be inter-
preted in the same manner as Eqs. (7.21) and (7.22): the final value i( T,) is equa l to the initial value i(O),
plus the length of the interval T, multiplied by the average slope (v1_(r))(/L. But note that the interva l
length is chosen to coincide with the switch ing period, such that the switch ing ripple is effec tively

196 AC Eq11
ivale111
Circuit Modeli11g
Actual wavefomz. Averaged waveform

including ripple
i(t) (i(t) ) 7
Fig, 7.IO Use of the average ~ lope to pre<lict
how 1he inducto r current wave form changes over
one switching period. The acrnal wa veform i(t)
and its low-frequency componenr (i{1))~, arc i(O)..C::::=------=
.........
= =---:::::..=
/ · .....
i(T.)
i IIustrated.
ww 0 T,
w.E (a) iJ,t )

...L~
( v(t) )r,
...
{ic<,t)
)7
asy 0 ....-.................... ·····-·· :---:

dT,
L
...' .........··-· ···-···-
T,
J
t
En -
{v(t)) /
--
R
71 - (i( t)}T,
(b) v(t)
0-+--------------
ar, gin T,
eer
ing
\1(0 )
Fig. 7.11 Duck -boo st converter wavclo rms : (a} capucitor ct1rrent, (b) rn pacilor voltag e.
.ne
removed. Also, the use of the average slo pe leads to co rrect predic tion of the final value i(T,). It can be
easily ver ifie d tha t, when Eq. (7.23) is inserted in to Eq . (7.19), the previo us res ult (7.14 ) is obtained.
t
7.2.3 Averaging the Capacitor Waveforms
A similar proced ure leads to the ca pac itor dy namic equa tion . The ca pac itor voltage and c urre nt wave -
forms are sketc hed in Fig. 7 . 11. The average capac itor curr ent ca n be fo un d by ave rag ing Eqs. (7.8) and
(7. 12); the res ult is
{v(l)J ) ( {v(I)). )
, =d(t) (
(iJ..r))r ---"J!1-
+d'(t) -( i(t)) 7, -~
(7.24)
Upon insert ing this eq uatio n int o Eq. (7.2) and co llec tin g terms, one obta.ins

7.2 The Basic AC Modeii11

g Approach 197
i/ t) (i(t)}r
..../ ~
1"ig. 7.12 Buck-boost converlcr wave-
{ig(t))r
forms: input source current i"(I). ·- ·-·· ·- --·-·-······-· ..•.. ...•...... . _ L ... -· ··· ···· ···
oo..__
___ ...__ __
0 ......._
_ __.
dT, T, t
ww d{v(t))
C __ r, aa - d'(i) {i(r)) - __
(v(t) \
I_T, (7.25)
w.E
dt Ts R
This is the basic averaged equation which describes de and low-frequency ac vari ations in the capacitor
voltage.
7.2.4
asy
The Average Input Current
En
In Chapter 3, it was found to be necessary to writ e an additi onal eq uatio n that models the de component
gin
of the converter input curre nt. This allowed the inp ut port of the converte r to be modeled by the de equi v-
ale nt circuit. A similar procedure must be followed here, so that low-freq uency var iation s at the conver ter
input port are modeled by the ac equivalent circuit.
eer
For the buck-boost converter example, the current i)t) dra wn by the co nverter from the input
source is equal to the inductor current i(t) during the first subinterval, and zero dur ing the second sub-
interval. By neglecting the inducto r current ripple and replaci ng i(t) with its averaged value (i(t)\, we
can express the inpu t current as follows:
ing
.ne
. ( ( i(I.)} J' _ during subinterval J
(7.26)
I (/ )aa '
1 tl dur ing subinterval 2
The input c urrent wavefo rm is illustrat ed in Fig. 7.12. Upon averaging over one sw itching period, one
obtains t
(7.27)
This is the basic averaged equation whic h describes de and low-frequency ac vari ations in the converter
input ctu-rent.
7.2.5 Perturbation and Linearization
The buck-boost converter averaged equations, Eqs. (7. 14), (7.25), and (7.27), are collec ted below:

198 AC Eq11i
vale111CirrnirModeling
d(i(1))1
L ~ = d(z) ( vg(t)) 7 + d'( r) ( v(t)) r,
d (1,(1))
' (v(l))
(7.28)
C--~
di
= - d'(t) (iCtl)
T,
- __R T.,
These equations are nonlinear because they involve the multiplication of time -varying qua ntities . For
ww
example, the capacitor current depends on the product of the control input <((I) and the low-frequency
component of the inductor curre nt, (i(f))7; · Multip lication of time-varyi ng signa ls generates harmonics ,
and is a nonline ar process. Most of the tech niques of ac circuit analysis , such as the Laplace transfor m
w.E
and other freq uency-domain methods, are not use ful for nonlinear systems. So we need to linea riz e
Eqs. (7.28) by cons tructing a small -signa l model.
Suppose that we drive the converte r at some stead y-state, or quiescent, duty ratio d(t) = D, with
quiescent inp ut voltage v11(t) = V>i'We know from our steady-state ana lysi s of Chapters 2 and 3 that , after
asy
any transients have subsided, the inductor curre nt (i(r)) ,, the capacitor voltage (v(r))r,, and the input cur-
rent {i~(tl\ , wi II reach the quiescent values /, V, and / 8, i~spectively, where '
En V ""-£,Vi
l=-JR (7.29)
It = DI
gin
eer
Equations (7.29) are derived as usual via the princip les of induc tor volt-second and capacitor charge bal-
ance. They could also be derived from Eqs. (7.28) by noti ng that, in steady state, the derivative s must
equal zero.
superimposed small ac variat ions v/t) and d(r). Hence, we have ing
To construc t a small -signa l ac model at a quiescent operati ng point (/, V), one assumes that the
input voltage v/t) and the duty cycle d(I) ar~ equal to some given quiesce nt values 1/11 and D, plus some
.ne
(vxCtJ
)T,= Vg+ Vi l) (7.30)
d(t) =D+d(t)
In response to these inputs, and after any transients have subsided, the averaged indu ctor current (i(t) )T,'
the averaged capacitor voltage ( v(l) \ i' and the averaged input cmTent {i~(l)\, wavefo rms will be equal to
t
the correspo nding quiescent values / , V. and '~· plus some super impo sed small ac variations i( 1), v(I), and
((r):
{iU))7 = l +i( r)
.<
(vU)Jr, = V + ii{t) {7.31)
{iiil)7, =/~+Oil)
With the assump tions that the ac variat ions arc small in magnit ude compared to the de quiescent values ,
or

hU>
l<[V~I
<(.:IDI
1,/(1)1
]i(i) l <ll) (7,32)
If,(I) I<;IVI
/ipJ/<[1,1
then the n o nlinear equat io n s (7.28) ca n be linearized . Thi s is done by inse rting Eqs . (7.30) and (7.3 1)
into Eq. (7.28). For the inducto r eq uation , one obtai ns
ww (7.33)
w.E
It should be noted th at th e co mpl e ment of the duty cycle is give n by
asy
d'(l)=(l-d(t)j = t-(D + J(t)) = D' -€1(1) (7,34)
where D' = I - D. The m inu s s ign arises in th e express ion for <((1) because a d(t) va ri a ti on th at ca uses
En
d(t) to incr ease wi ll cause <f(!) to decrea\e.
By mu ltipl yi ng out Eq. (7.33) a nd collect ing terms, one obta ins
gin (7.35)
De terms l " order ac terms

(linear)
eer
2 "" order ac terms
(nonlin~r)
ing
Th e de rivative of 1 is zero, si nc e 1 is by d efi n iti on a de (co nsta nt ) term. For the purposes of de riving a
sma ll -sig nal ac mode l, the de term s can be co nsider ed known co nstant qu antities . On th e r ight -ha nd side
of Eq. (7 .35) , thr ee types of terms ar ise:
.ne
De terms: These terms co ntai n de quan tities on ly.

First-order ac te1mr: Each of these terms contains a single ac quantity, usually multiplied by a constant
coeff icient such as a<lc term. These terms are linear fun c tion s oftheac variat ions.
Second-order ac terms : These terms contain the produc ts of ac qua ntities. Hence they are nonlinear ,
because they involve the multiplicati on of time-vru)' ing signals.
t
It is desired to neg lect the n o nlin ea r ac ter m s . Provided th at th e s m a ll-s ig na l assumption , Eq. (7 .32), is
sat isfied, then each of the seco nd-order nonlinear ter ms is mu ch smaller in magni tu de that one or more of
the linear first -or der ac terms. For examp le, the seco nd-order ac ter m d (t)i!/tl is mu c h sma ller in mag n i-
I
tude than the fir st-order ac term Di\(t) wheneve r d(t) \ -« D. So we can neg lect th e second -order tenn s .
Al so, by definit ion [or by use ofEq. (7.29) ], the de te rm s on the rig h t-h an d side of th e equatio n are equa l
to the de ter ms on the left -han d side , or zero.
We are left w ith the first -order ac tem1s on both sides of the equ atio n. Hence ,
d{(t)
L dt =Dv,lr) + D'v(t) + ( vg- v) J(t) (7.36)

200 AC Equivalent Circuit Modeling
This is the desi red result : the small -sig na l linea rized equation that describes variat ions in the inductor
current.
The capac itor equat ion can be lin ear ized in a sim ilar manner. Inser tion of Eqs. (7.30) and (7.31 )
into the ca pac itor eq uation of Eq. (7.28) yields
d(V+v(r)) • (v+v(1)) (7.37)

C dt - (D'-d{l)j(1+i(l)j - R
Upon mu ltip lying out Eq. (7.37) and co llect ing terms , one obta i ns
ww c(~~
+d;~))= (-0'1-f)(-o'f(t)-v~>+1J(1)) +
---------------
+ d(1)l(1)
------- (7.38)
w.E -------------
De terms I " order ac terms
(linear)
2"J order nc term
(nonlinear)
By neglecting the seco nd-order term s, and not ing that the de term s on both sides of th e equation are
asy
equa l, we agai n obtain a lin ea rized first-order equa tion, co nt a in ing only the first-order ac terms of
Eq. (7.38):
En
dvU)
C dt =-D'[(t)- v;
·c >
+t,l(I) (7.39 )
gin
Th is is the desi red sma ll-signa l linearized eq uatio n that describes variat ions in the capac itor vol tage .
Fin ally, the equat ion of the average input current is also linea rized. Inse rt ion of Eqs. (7.30) and
eer
(7.31) into the input curr ent equat ion of Eq. (7.28) yiel ds
I,, + i .(!) aa ( D + JU)}(/ + i(t)) (7.40)
By collecting terms, we obta in

ing
----- .ne
+ = (DI} + [o:(r) + Jd(r) } +

(7.41)
t
'----.,---'
De term I " order ac term De term l" order ac terms 2"J order ac term
(linear) (nonlinear)
We again neglect the second -order nonlinear ter ms. The de terms on both sides of the equat ion are eq ual.
l11e remain ing first -order linear ac terms are
(7.42 )
This is the linear ized small -signa l equation that describes the low - frequency ac components of the con -
verter in put curre nt.
In summary , the nonlinear averaged equat ions of a switc hing co nverte r can be linea rized abou t a
qu iesce nt operat ing poi nt. The conver ter indepe nden t input s are expressed as constant (de) va lues, plus
sma ll ac variations . In response, the conve rter averaged waveform s assume si milar forms. In sertio n of
Eqs . (7.30) and (7.31) into the converte r averaged non linea r equa tio ns yields de terms, linear ac terms,
and nonlin ea r terms . If the ac variat ions are sufficiently sma ll in magnit ude , then the nonl in ear ter ms are

much sma ller than the linear ac terms , and so can be neglected . The remaining lin ear ac terms comprise
the small -signa l ac model of the converter.
7.2.6 Construction of the Small-Signal Equivalent Circuit Model
Equations (7.36), (7.39), and (7 .42) are the small -signal ac description of the ideal buck -boost converter ,
and are collected be low:
ww d 1(1)
L dt
t10(1)
•
= Dv,(I)
,. v(1)
,
+ D'v(I) + { Vg-
•
C --;,rr =- D 1(1) - - R · + l d(l)
} ,
V d(t)
(7.43)
w.E t ,(1) = Di (I) + l J( 1)
asy
In Chapter 3, we collected the averaged de equat ions of a co nverter, and reco nstructed an equiv alent cir-
cu it that modeled the de properties of the converter. We can use the same procedure here, to cons truct
averaged small - signal ac models of conver ters.
En
The inducto r equat ion of (7.43), or Eq. (7.36), describes the voltages arou nd a loop contain ing
the inductor. Indeed, this equation was derived by findin g the induc tor voltage via loop analysis, then
gin
averaging, perturbing, and linear izing . So the equation represents the voltage s m·ound a loop of the
small -signa l mode l, which con tains the induc tor. The loop curren t is the small -sign al ac inductor curren t
i(t). As illu strated in Fig. 7 .13, the term Ldi (t)/dt represents th e voltage across the inductor L in the
sma ll-signal model. Th is voltage is equal to three other voltage terms. Dvglt) and D' v(t) represent depen -
eer
dent sources as shown . These terms will be combined into ideal transformers. The term (V 11- V)d(t) is
driven by the contro l inpu t d(t), and is repre sented by an independ ent source as shown.
The capacitor equation of (7.43), or Eq. (7.39), describe s the currents flow ing into a node
ing
attache d to the capac itor. Thi s equation was derived by findin g the capaci tor current via node analysis,
then averag ing, perturbin g, and linearizing. Hence, this equat ion describes the currents flowing into a
node of the sma ll-signa l mcxlel, attac hed to the capac itor. As illu strated in Fig. 7.14, the term Cdv(tVdt
.ne
represents the current flow ing throu gh capac itor C in the sma ll- signal mode l. The capacito r voltage is
v(t). According to the equat ion, this current is equal to three other terms . The tem1 - D'r(I) represents a
dependent source, whic h w ill eventually be combined into an ideal transforme r. The term - v(t)/R is rec-
t
L (v,- v)d<1)
DC8(t) D 'C(t)
Fig. 7.13 Circuit equivalent to the small -signal ac inductor loop equation of Eq. (7.43) or (7.36).

202 AC Equivalem Cirw it Modeling
C dv (t) + li(r)
dt T
D' i( t) /a( t) C v(I) R
Fig. 7.14 Circuil e4uivaknl to the small-signal ac c11pacitornode eqllatinn nfE4. (7.43) or (7.39).
ww i ,( I)
w.E ! d (t) D i( t)
asy
En
Fig. 7.15 Cin.:uir equivalent to the small-signal ac input soL1rce current equatio n of Eq. (7 .43) or (7 .42).
gin
ognized as the curre nt fl owing throu gh the load resistor in the small-sig nal model. TI1eresistor is con-
nected in paralle l with the capac itor, such that the ac voltage across the resistor R is v(t) as expected. The
eer
term ld(r) is driven by the control inpuut(t ), and is represented by an independe nt source as shown.
Finally, the input current equ ation of (7.43), or Eq. (7.42), describes the small-sign al ac curre nt
~( t) drawn by the converter out of the inpu t voltage source vi;<t) . This is a node equation whic h states th at
ing
ti t) is equal to the currents in two branches , as illust rated in Fig. 7. 15. The first branch, corresponding to
the Di(t) term is dependent on the ac inducto r current l(t). Hence, we represent this term using a depen-
dent current source; this source wi 11 eve ntuall y be incorporated into an ideal transformer. The second
.ne
branch, corres ponding to the /d(r) term, is driven by the control inp ut d(I), and is represented by an inde-
pendent source as shown.
t
The ci rcu its of Figs. 7.13, 7. 14, and 7.15 ,u e collected in Fig. 7.16(a). As discussed in Chapter
3, the dependent sources can be combined into effective ideal transformers, as illustrate d in Fig. 7.16(b).
The sinusoid superimposed on the transfor mer symbol indicates tha t the transformer is ideal, and is part
of the averaged sma ll-signal ac model. So the effective de transfor mer property of CCM de-de converters
also influences small-signal ac variations in the converter signa ls.

The equi valent circ uit of Fig. 7.16(b) can now be solved using tec hniques of convent ional linear
circ ui t ana lys is, to find the converter tra nsfer funct ions, inpu t and outpu t impedances, etc. This is done in
detail in the next chapter. Also, the model can be refined by inclu sio n of losses and other nonidealit ies-
an example is given in Section 7.2.9.
7.2.7 Discussion of the Perturbation and Linearization Step
In the perturbation and linear izat ion step, it is assumed that an averaged voltage or curre nt consists of a
cons tant (de) component and a small-signal ac var iation around the de component. In Section 7.2.5, the

7.2 The Basic AC ModelingApproach 203
(a)
L
jv,- v)J(1)
+
t d(t) C v(t) R
(b) L jv,-v)J<r>
ww id(t)
+
C v{r) R
:Fig. 7.16
w.E
Buck-bousl conv crccr small -sign.11ac equi valent circuit: (a) the cir~ui1s of 1:igs. 7 .13 to 7, l 5, cullected
asy
toge ther; (b) rn,nbinati o n of dep endent sources into effc.,ctive ideal transformer, Jcud iJ1g to the fina l llJockl .
lineariza tion step was comple ted by neg lecti ng nonlinear terms that correspo nd to prod ucts of the small-
En
signal ac variations. In genera l, the linearizat ion step amounts to taking the Tay lor expa nsion of a nonlin-
ear relation and retainin g only the constant and linear terms . For example, the large -signal average d
equatio n for the inductor current in Eq. (7 .28) can be written as:
d(i (/)) 7 gin

(v/1))Ty + d'(t) (vU))7• = f 1( (vg(
eer
t))1.r., {11(t)} 7s, d(t) )
L -d- ' :a d(t) (7.44)
I
ing
Let us expand this express ion in a three -dimensional Taylor senes, about the quiesce nt operating point
(V8, V.D):
.ne
_ a1.(v v, o)
+ v(t) a 8•
v
I
v=V
.
+ d(t)
il.ti(vR,v, d)
iJd
I
d =D
(7.45)
t
+ hi ghe r-order non linear ter ms
For simpl icity of notation , the angle bracke ts denoting average values are droppe d in the above equation.
The derivative of I is zero , since I is by defi nition a de (consta nt) term . Equating the de terms on both
sides of Eq. (7.45) gives :
0=.fi{V,..V, D) (7.46)
which is the volt -seco nd balance relationship for the inductor. The coeffic ients with the linear terms on
the right-hand side of Eq. (7.45) are found as follows:

204 AC Equivalelll Circuit Modeling
(7.47)
(7.48)
ww (7.49)
w.E
Using (7.47), (7.48) and (7.49), neglect in g hig her-ord er nonli nea r terms , an d equ ating the lin ea r ac terms
on both sides of Eq . (7.45) gives:
~;>
" (7.50)
asy Ld Dv,(t) + D'Nr) + ( v~- v}J U)

which is identica l to Eq. (7.36) derived in Section 7.2.5. In conc lusion, the linea ri zatio n step can a lways
En
be acco mp lished usi ng the Taylo r ex pansio n.
7.2.8 Results for Several Basic Converters
gin
eer
The equiva lent circuit models for the buck, boost, and bu ck -boost co nve rters opera ting in the co nt inu ous
condu ction mode are su mma rize d in Fig. 7. 17. The buck and boost co nverte r models conta in ideal tran s-
formers having turn s ratios equal to the converter co nversion ratio. The buck-boos t co nverte r co ntain s
ing
idea l transformers hav ing buck and boost co nversion ratios; thi s is co nsistent wit h the deriva tion of Sec-
tion 6. 1.2 of the buck-boost converter as a cascade co nnec tion of buck and boost conve rters. These mod-
.ne
els can be solved to find the converter tran sfe r functio ns, inp ut and output impedances, ind ucto r curr ent
variations, etc. By insert ion of appropri ate turns ratios, the eq ui va lent circuits of Fig. 7 . 17 can be adapted
to mode.I the transfo rmer-iso late d vers ions of the bu ck, boost, and buc k-boos t co nverters , i ncl udi ng the
forw ard, flyback, and other co nverters .
7.2.9 Example: A Nonideal Flyback Converter

t
To illustrat e that the tec hniqu es of the previou s section are usefu l for mo de.ling a variety of converter
phenomena, let us nex t derive a s mall-signal ac eq uivale nt circu it o f a co nverter co nta ining transfor mer
isolat ion and resis tive losses. An isolated flyback converter is ill ustrate d in Fig. 7. 18. The fl yb ack tran s-
form er has mag neti zi ng indu ctan ce L, refe rred to the prim ary w inding , and turn s ratio 1 :n. MOS FET Q1
has on-resista nce R,m· Other loss elem ents, as we ll as the tra nsfo rmer lea kage induc tan ces and the
switc hi ng losses, are neg ligible. The ac modeli ng of th is conver ter beg ins in a manner sim il ar to the de
converter analysis of Section 6.3.4. The fl y bac k transformer is replaced by an equivale nt ci rcuit cons ist-
ing of the mag net izing ind uc tance l in para ll el wit h an idea l tra nsfo rmer , as ill us tra ted in Fig. 7. l 9(a ).
Durin g the first subi nterva l, when MOSFET Q1 conducts, diode D 1 is off. The circ uit then

(a)
-t
R v(r)
ww
(b )
i(r} +
w.E ld(t) C R v(t)
(c} asy (v,- v)J<tJ
En
L
ld(t )
gin !d( t} C v(t) R
eer
ing
Fig. 7.17 Averaged small-signal ac model s for -~everal basic conveners opera1ing in continuou s conduction
mode ; (a) buck, (b ) boost, (c) buck-boost
.ne
i/t)
I :n
+ t
C R v(t)
Fig. 7.18 Flyback converte r example .

206 AC Equi valem Cirrnif Modeling
(a)
+
R v(t)
vgCt) +
ww -I
w.E (b)
Transformermodel 1
asy C R
+
En
+ V
gin
(c) Tra11sform
er model i/11 eer
+ =O
ig !
I V:
i
ing
+
.ne
C R V
:
!
l.....
........
. .............
;..,,. -....
..-....
.____.._
___
Fig. 7.19 Flyback convcmerexample: (a) inco1poration of tr.msformi::requivalent circui1,(b) circuit during sub-
t
interl'al l, (c) circuit during subinterval 2.
reduces to Fig. 7. l 9(b). The inductor voltage v/ 1), capaci tor current i J. r), and conver ter input cu rrent
igCt)are:
v,(t) = v,(t) - i(t)R,,,.

.
i cU) = ·«Y(I) (7.51 )
iii} = i(f)
We next make the small ripp le approximation , rep laci ng the voltages and curren ts with the ir average val-

7.2 The Basic AC Modeling Approa ch 207
ues as defin ed by Eq. (7.3), to obtain
(7.52}
D uring the second s ubi nterval , MOSFE T Q1 is off, diode D 1 cond ucts , an d the circu it of Fig. 7. 19(c) is
ww
obta ined. Ana lys is of th is c ircu it shows that the inductor vo ltage, ca pac ito r cu rrent , an d inp ut curr ent are
give n by
v(I)
w.E
V1_(/)"' - -fl .
i (t) _ i(1) _ v(r) (7.53)

C - " R
ig(t)=O
The sma ll-ripple approximation

asy leads to
En
(v<tl)
r
VL(t) = - __ II _.,
(i(t))T (v(/)) 7 (7 .54)
i c(I)
ip ) =O
=: II ' - ~
gin
The ind uctor voltage an d curren t wavefo rms are sketched in Fig. 7.20. The average ind uctor voltage can
now be found by ave raging the waveform of Fig. 7.20(a) over one switchi ng period. The result is
eer
ing
.ne
(a) V - iR
B °''
t
(vi<tJ)r
0 ................
........ ........... , ..... ' ........ ............
al' , T, t
L
-v/ 11
.J
(b) i(t)
l<ig. 7.20 Inductor wuveforms for 1he Hyback examp le: (a) inductor voltage, (h) inductor current.

208 AC Eq11iva/e111
CircuitModeling
(a) icf..t)
(iJ t)}r
0 ........, .....·•.................................... ............
dT, T,
L_
-v /R
__ , __ __.
ww (b) v(t) (i(l)}T (v(r))T
nC RC
w.E
Fig. 7.21 asy 0 dT, T,
Capaciior waveforms for the llyback examplt:: (a) capacitor currenl, (h) capacitor voltage.
En
gin (7.55)
By inserting this result into Eq. (7.20) , we obtain the averaged inductor equati on,
eer
d(iU)).,.
L-d-'=d(t){v
r s<tJ).
r,.-d(l)(i(l)) 7 , R..,,-d'( t)-n-
(vCO),
·'
ing (7 .56)
The capaci tor waveforms are constructed in Fig. 7 .21. The average capacitor current is
.ne
(ic(I)) 7 , "'
This leads to the averaged capacitor eq uation

d(t) (
- {v(t)} ) ( {i(t)}
R r, -+d'(r) ~ - ~
(v(t)} ) (7.57)
t
(7.58)
(igC
t)) 7
The converter input current i/1) is sketched in Fig. 7.22. . .. ...... .. . ........ .. .. . . ... . ... . .. .. . .... .. .. ! . ... . .. .. .. ... .. . .
Its average is
0 ,_ ___ __._
____ 0 __,__ _
(7.59) 0 dT, T,
The averaged converte r equations (7.56), (7.58) and Fig. 7.22 lnpul source current waveform ,
(7 .59) are collected below: flyback example.

7.2 The Basic AC ModelingApproach 209
(7.60)
( ig(t)}T, = d(t) (i(t)} 7 s
Thi s is a nonlinear set of differential equat ions, and hence the next step is to pe1turb and linearize, to con-
ww
struct the converter small-signal ac equations. We assume that the converter inp ut voltage vi t) and duty
cycle d(I) can be expressed as quiescent values plus small ac variations, as follows:
w.E
(v.(r))r, = vg+ vg(t) (7.61)
d(l)=D+d(t)
asy
In response to these inputs, and after all trans ients have decayed, the average conve1ter wavefo rms ca n
also be expressed as quiescen t values plus small ac variations:
En
(i(l)}T :a/+i(I)
' = V + iJ(t)
(v(t)}r (7 .62)
,.
gin
(ig(f))r, =-I g + i g(t)
W ith these substituti ons, the large-signal averaged inductor equation becomes
d(t+i(t))
eer (7.63)
ing
L dt
Upon multi ply ing this expression out and collecting terms, we ob tain
.ne
Determs I" orderac terms(linear) (7.64)

t
~;>
+ ( d(t)v,(t) + d(t) -d(t)i(t)R .,,)

.._______--- - --
--....-
2'u1order ac terms (nonlinear)
As usual, this equatio n co ntains three types of ter ms. Th e de term s co ntain no time-varyi ng qua ntities.
Th e first-order ac terms are linear functio ns of the ac variations in the circuit , while the second-order ac
terms are functions of the products of the ac variatio ns. If the small-signal assumptio ns of Eq . (7 .32) are
satisfied, then the seco nd-order terms are much smaller in magnitude that the first-order terms, and hence
ca n be neg lected . The de term s must satisfy

0 = D\/, - D'*
-DR,.,! (7 .65 )
Th is resu lt cou ld al so be derived by applyin g the principle of indu ctor vo lt-second balan ce to th e steady-
state inductor vo ltage waveform. Th e first-order ac ter m s m ust satis fy
d l(t) _ _
L ~ - Dvit)-
, v(I)
D--,i--+ V~+ n
( V
- IR"") J(t)- ,
DR0 ,.1(t)
(7 .66)
This is the linearized eq uat ion th at descri bes ac va ri a ti ons in the inductor curr e nt .
ww
obtains
Upon substit utio n of Eqs . (7 .6 1) and (7.62) int o the avera ge d ca pa cito r equ at ion (7 .60), one
w.E
By collect ing terms , we obtain
C
d(V+Nrl)
dt
( ,
= D -d ( r)
_ )(1+1(1l)(V+ NrJ)
--,1-- R
(7 .67)
c(dv
dr as---------
+ dv(l
dr n
_v)
))- (D't
R
+ (D'r(ll
yE---------------
n
_ocrJ_ 1JuJ)-
R "
d(t )l(t)
--,.-
---------- (7.68 )
ng
De terms l ,.,order ac terms 2•« order ac term
ine
We neg lect th e seco nd-orde r terms. The de ter ms of Eq. (7 .68) must sat isfy
eri
(7 .69)
ng
This resul t co uld also be obtained by use of the prin ci p le of ca pacit or cha rge ba lan ce on the steady-s tat e
capac itor c urr e nt waveform. The first -order ac term s of Eq . (7.68) lead to the s mal l-sig na l ac capaci tor
.ne
equ ation
(7.70)
Substi tution of Eqs . (7.6 1) and (7.62) in to the averaged input c urre nt eq uat io n (7.60) leads to
t
(7 .7 j)
Upon collecting terms, we obt ain
+ i ,(t) = (DJ) + (Df(l)+!d(r) ) + d(r){(t)
De term
----- De-----I....__...,
I '1 order ac term " order ac
term terms
,._______..
2 ,.J order oc term
(7 .72}
The de tenn s mu st sa tisfy

7.2 The BasicAC Modeling Approach 211
L DR
on
d(t)(v, - IR 011 + *)
Fig. 7.23 Circuit equivalent
10 the ~mall-signa l ac inductor D'v (t )
loop equatinn, Eq. (7.76) or - II-
(7.66) .
ww 1, = DI (7.7 3)
w.E
We neglec t the second-orde r nonlinear terms of Eq. (7.72), leav ing the follow ing linea rize d ac eq uation :
(7.74)
asy
This resul t models the low-freq uency ac variations in the converter input curre nt .
The equ atio ns of the quiesce nt va lues, Eqs. (7.65), (7.69), and (7.73) are collected below :
0= DV~-D'* En -DR ,.J
0=(~;'-*)
I~= DI gin (7.75)
eer
For given qui esce nt va lues of the input voltage V~ and du t y cycle D, this syste m of equ ations can be ev al-
uate d to find the qu iesce nt output voltage V, induc tor curr ent / , and i nput curr e nt de co mponent / ~. The
res ults are then inserted into the small-signa l ac eq uat ions .
The small -signal ac equations, Eqs. (7.66), (7.70), and (7.74), are summa rized below:
ing
.ne
,li( t) •
L -----;J',==lJv, (1) - D -,.--+( v. +,.V - fl<,,,,) d(l)
, v(I) • •
- DR .,,,1(1)
t
c d O(r) _ D'[ U> v(t) , d<n (7.76 )
rft - - ,-,- - R --1-, -
[, (t ) ==Di(t ) + i J (I)
The final step is to co nstru ct an eq uiv alent circuit tha t correspo nds to these eq uatio ns.
The inducto r eq uation wa s derive d by first writing loop equations, to find the appl ied induct or
voltage dur ing each s ubin terva l. These equations were then averaged, perturbed, and linea rized , to obtai n
Eq. (7.66). So thi s eq uation describes the small -sig nal ac voltages around a loop co ntai ning the inductor.
The loop current is the ac indu ctor curr ent i(I). The qu anti ty Ldi(I Ydt is the low -freque ncy ac voltage
across the inducto r. The four terms on the rig ht -hand side of the eq uation are the voltages across the fo ur
other eleme nts in the loop. The terms Dv1p) and - D ' v(t')/11 are depende nt on voltages elsewhere in the
conver ter, and hence are represented as de pende nt sources in Fig. 7.23 . The third term is drive n by the
dut y cycle varia tions d(t ) and hence is represented as an indepen dent source. The fourth term, - DR,,,l(t),
is a voltage that is propo rtional to the loop c urren t r(t). Hence th is term obeys Ohm ' s law, with effect ive
resistance DRm, as show n in the fig ure . So the infl uence o f the MO SFET on-res istan ce on the co nverter

212 AC Eq11i
vale11fCircuit Modeling
C dv( t) + P(t)
Fig. 7.24 Circuit equivalent
to the small-sig oal ac capacitor dt R
D'l(t) !d( t)
node equat ion, Eq. (7 .76) or
(7.70).
-n- -,-,- C P(t) R
ww ; g(t)
w.E
Fig. 7.25 Circui1 equivalcm
to the small-signal ac input
sm1rce current equation, Eq. v,(1) ! d(t) Dt(t)
(7.76) or (7.74) .
asy
En
small-signal transfer functions is mode led by an effec ti ve resist ance of value DR011 •
Small -signal capacitor equation (7.70) leads to the equivalent circuit of Fig . 7.24. The equation
consti tutes a node equat ion of the equiva lent circu it model. It states that the capac itor current Cd v(t)/dt is
gin
equal to three other currents . The current D'{(r)/n depends on a current elsewhere in the model , and hence
is represented by a dependent curr ent source . The term - v(t)/ R is the ac component of the load curr ent,
eer
which we model with a load resis tance R connected in para llel with the capacitor. The last terrn is driven
by the duty cycle var iations d( t), and is modeled by an independent source.
The input port equation, Eq. (7.74 ), also cons titutes a node equation. It describes the sma ll-sig -
nal ac current i,;Ct),
ing
dr awn by the converter out of the input voltage source il,.(t).There are two other terms
in the equation. The term Di(t) is dependent on the inductor current ac variation {(1), and is represented
wit h a depende nt source . The term /J (t) is driven by the control variations , and is modeled by an inde-
pende nt source. The equ ivalent circu it for the input port is illustrated in Fig. 7 .25.
.ne
The circu its of Figs. 7.23, 7.24, and 7.25 are combined in Fig. 7.26. The dependent sources can
be replaced by ideal transformers , lead ing to the equ ivalent circuit of Fig. 7.27. Th is is the desired result:
an equivalent c ircu it that models the low- frequency small -signal variations in the converter waveforms . It
can now be solved, us ing conven tiona l linear circui t ana lysis tech niq ues , to find the conve rter trnnsfer
funct ions , output impedance , and other ac quantities of intere st.
t
D'i(I)
-II-
ld (t)
-,.- c O(t) R
Fig. 7.26 The cquh•alent circuits of Figs. 7.23 to 7.25, collected together.

7.3 State-Space Averaging 213
i,(1 )
/0(1 ) IO(l) C f;(I) R

-n-
l<'ig
. 7.27 Small-signal ac equivalent circuit model of tile flyback converter.
ww
7.3
w.E
STATE-SPACE AVERAGING
A numb er of ac converter modeling techniques have appe,u·ed in the literature , including the current -
asy
i1tjected approach , circu it averaging , and the state-space averaging method . Although the proponents of a
g iven method may prefer to express the end result in a spec ific for m, the end resu lts ofnearly all met hods
are equiva .lent. And everybody will agree that averaging and small -signal linea ri zation are the key steps
En
in modeling PWM converters.
The state -space averagi ng approach [ 1, 2] is described in this sect ion. The state-space descrip -
tion of dynamical systems is a mainstay of modern contro l theory ; the state-space averagin g method
gin
makes use of thi s description to derive the small -signal averaged equations of PWM switchin g convert-
ers. The state-space averag ing method is otherwise identical to the procedure derived in Sectio n 7.2 .
Indeed, the procedure of Section 7.2 amounts to state-space avera ging, but with out the formality of writ -
eer
ing the equations in matrix form. A benefit of the state-space avera ging procedure is the generality of its
resu lt : a sma ll-signal averaged model can a.lways be obtained , provided that the state equations of the
ing
original converte r can be wr itten.
Section 7.3. l summa rizes how to write the state equations of a network. The basic results of
state-space averaging are described in Section 7.3.2, and a short de rivati on is given in Section 7.3.3. Sec-
.ne
tion 7.3.4 con ta.ins an examp le, in which the state-space avera ging method is used to derive the quiescent
de and small -signa l ac eq uations of a buck -boost converter.
7.3.1 The State Equations ofa Netwo rk

t
The state -space description is a canonical form for writing the differenti al equatio ns that desc ribe a sys-
tem. For a linear network, the derivatives of the state \lariables are expressed as linear combinat ions of
the system independent inputs and the state variables themselves. The physical state variable s of a sys-
tem are usuall y associated with the storage of energy, and for a typical conver ter cir cuit, the phys ical
state variables are the indepe nden t induc tor currents and capacitor voltages . Other typica l state vari ables
include the position and velocity of a motor shaft. At a given po int in time, the values of the state vari-
ables depend on the prev ious history of the system , rather than on the prese nt values of the system inputs .
To solve the different ial equa tions of the system, the initi al val ues of the state variables must be spec ified.
So if we know the state of a system , that is, the values of all of the state viu-iables, at a given time t0 , and
if we additionally know the system inpu ts, then we can in principle solve the system state equat ions to
find the system waveforms at any future time.
The state equa tions of a system can be written in the compact matrix form of Eq. (7.77):

K d~~t) = Ax(l ) + Bu(r ) (7 .77 )

y(1) = Cx(t) + F.u(I)
Here , th e state vecto r x(t) is a vector containi ng all of the state varia bl es, that is, the in ductor c urrent s,
capacitor vo ltages , e tc. Th e input vec to r u(I) contains th e indepe ndent inp ut s to the sys te m , such as th e
inp u t voltage so urce vJ t). The de ri vat ive of the state vector is a vector whose e leme nts are equ al to th e
der ivat ives of the co rrespo ndin g elements of the state vector:
ww
cl..-1(1)
..-l (1)
t i/
dx(I) dt i t) (7.78)
X(t) = X2(/) -ii, ·= tit .
w.E
In the standard form of Eq. (7.77), K is a matr ix co ntain ing the value s of capa ci tance, indu ctan ce, and
asy
mutu a l ind uc tance (if any ), suc h th at Kdx(l)/dt is a vec tor conta inin g th e in ductor w indi ng voltages and
c apa citor cu rr ents . In othe r physica l sys tems, K may conta in ot her qu anti ti es such as momen t o f iner tia
or mass. Equ a tion (7 .77) states that the inductor vol tages and capa citor c urren ts of the sys tem can be
En
expressed as linea r co mbina tions of the state vari ab les and the inde pen dent inpu ts. The mat ri ces A an d B
cont ain co nsta nts of propo rt iona lit y.
It may also be des ired to co mpu te other ci rcuit waveforms that do not coincide wi th the ele -
gin
ments of the state vec tor x(t) or th e inpu t vec tor u(t). These ot her s ig nal s are, in ge neral, depe nden t wave -
forms that c an be expressed as linear com b inati ons o f th e elements of th e state vector a nd inpu t vector.
Th e vecto r y(t) is us ually ca lled the outpu t vector. We are free to place a ny depe nd en t s ignal in this vec -
eer
tor, rega rd less of whe th er the si gnal is actu ally a physic a l out put . Th e conve r ter in pu t current i/t) is ofte n
chosen to be an e le ment of y (I). In the state eq uations (7 .77), the elem ents of y (t) are expressed as a lin -
ing
ear co mb in ati on of the e lemen ts of the x (t) and u (t) vecto rs. Th e ma tr ices C an d E co nta in co nsta nts of
propo rtionali ty.
As an examp le, let us wr ite the state eq uations of the c ircu it of Fig. 7.28 . Thi s c irc uit co nta ins
two capac itors and an inductor, and hence the phys ica l st ate va ria bles are the ind epe nden t capa citor vo lt -
.ne
ages v 1(t) and v:i(t), as we ll as the indu c tor cu rr en t i(t). So we can define the state vec tor as
v 1(t)
x(t) = V2(/)
i(I)
(7.79 )
t
i(t) L
+ + VL(t) - icz{t) +
iR 1(t) ici(t)
Rz
i;ll(t) n, c, v 1(t) C2 v2(t)
+
R3 v°'.,(t)
Fig . 7.28 Circuit examp le.

7.3 State-Space Avera ging 215
Sin ce there are no co upl e d indu ctors, the mat ri x K is d iago nal , and s imply co nt ain s the va lues of c ap ac i-
tance and ind ucta nce:
C'i O O
K = [ 0 C2 0
0 0 L
I (7.80)
The circ uit has one indepen dent input , the curre nt source i1,.(f). Hence we sho uld define the inp ut vector
as
ww u (t) = r iu,(t) l
We are free to pl ace any de pendent signal in vec tor y(I). Suppose that we are interes ted in also comp ut ing
(7.81)
w.E
the vo ltage v,,,it) and the cun-ent iR 1(r) . We ca n therefore define y(t) as
(7.82)
asy
To w rit e the state equatio ns in the canon ical form of Eq. (7.77), we need to express the induc tor voltages
En
and capaci tor cun-ents as linea r combi nations o f the elemen ts of x(t) and u(I), th at is, as linear co mbina -
tions ofv 1(t ), vi(!), i (t), an d i;/ t).
gin
The capac itor curre nt ici(I) is given by the node equat io n
(7.83)
eer
T his eq uation wi ll beco me th e top row of the ma trix equ ation (7.77). T he capaci tor cu rre nt icz( t) is give n
ing
by the node equ ation,
(7.84)
.ne
Note th a t we have been careful to ex press t his curre nt as a linear comb ina ti on of the e leme nts of x (t) an d
t
u(I) alone . The ind uctor vo lt age is give n by the loop equ atio n,
(7 .R5)
Equ at ions (7.83) to (7.85) ca n be wri tten in the follow ing matr ix form :
dv 1(1) l
-~ 0 - ]
di v.(t)
[c,
0 C
0 0
0
dvi(t)
= 0 I vit ) +[g]~
- -
~
2
- R2 + Ri
0 0 L di(t ) i(I) (7 .86)
- 1 0
----------- ~ dt
----.,_.:-
dx( t )
K A x(t) + B U(I)
dt

216 AC Eq11
i vale11
r Circuir Modeling
Matr ices A and B are now known.

It is also necessary to express the elem ents of y(t) as linea r combinatio ns of the elem ents of x (1)
and u(t). By solution of the circuit of Fig. 7.28, v,,..,(t) can be wri tten in ter ms of 11
2(1) as
(7 .87)
Also, iR 1(1) can be expressed in term s of v 1(t) as
(7 .88)
ww
By collect ing Eqs. (7.87) and (7.88) into the stand ar d matri x for m of Eq. (7.77), we obta in
w.E l
[ v, 11,(I) =
0
Ri
R2 + R3
0
V1(r)
Vz(I ) + [~]
--------
[i1,,(l)l
asy
jRl(r ) _L
....___.., R, 0 0 i( I} (7.89)
~ ----------
En
y(r) C x{I) + E u(r)
We can now id ent ify the matrices C and E as shown above .
gin
It should be recog ni zed that , start ing in Chap ter 2 , we have always beg un the analys is of con -
vetters by wr itin g their state equ ations. We are now si mp ly writing these equ ati on s in matr ix form .
7.3.2 The Basic State-Space Averaged Model

eer
Consider now that we are given a PWM conve rter, ope ratin g in the continu ous co nduction mode . The
ing
converter circu it cont ains indepen dent states th at for m the state vector x(I), and the converter is dri ven by
.ne
indepe ndent sou rces that form the inp ut vector u (t). Durin g the first subinterva l, when the sw itches are in
posi tion I, the converte r reduces to a li nea r c irc uit that ca n be described by the fo llowi ng state eq uations:
dx(I)
K~ =A 1i,;(t)+B 1u(t)
y (1) = C 1x(t) + E 1u(I)
(7.90)
t
Dur ing the second su binterv al, wi th the swi tches in posit ion 2, the converter reduces to anot her linea r cir-
cuit whose state eq uatio ns are
dX(I)
K rlt = A ,x( t) + B2u(I) (7 .91)
y (I) = C2x(I) + E1u(/ )
Dur ing the two su binterv als, the circ uit eleme nt s are connected diff erently; therefore, the respec tive state
equ ation matrices Al' Hi' C1, r, :1 and A2, B2, C2, 1< :2 may also diffe r. Gi ven these state eq uations, the
result of state-space av eraging is the state equa tions of the eq uili br iu m and sma ll-sig na l ac models .
Provided that the natura l frequencies of the converter, as well as the freque ncies of variations of
the converter input s , are mu ch slower than the sw itchin g fre que ncy, then the state-space averaged model

7.3 State-Space A veraging 217
that descr ibes the co nverte r in equ ilib rium is
0= AX+ BU (7.92)
Y=CX+EU
where the averaged matrices are
A=DA 1 +D'A 1
B = D8 1 + D'B2 (7.93)
ww
C=DC 1 +D'C 2
E=DE 1 +D'El
Th e equ ilibr ium de co mp onents are
w.E X = equ ilibrium (de) state vec tor

U = eq u ili bri um (de ) in p ut ve (7.94)
asy Y = equili br ium (de) ou tp ut vector

D = eq uilib rium (de) d uty cycl e
En
Qu anti ti es de fin ed in Eq. (7.94) represe nt th e eq ui lib r ium val ues of the averaged vectors . Equa tion (7.92)
can be solve d to find the equ ilibrium state and output vectors:
X=-A- 1 nu
Y=(-cA - 1 B+E) U gin (7.95)
Th e state equa tions of the small-signal ac mode l are

eer
K "!~t
)= A~(t)+BO(t) + {(A1 -A 1}X+ (8 1 -B1)u}J(t)
ing (7.96)
.ne
y{f) = Ci(l)+EO{t) + {(c1-C2)x+(E1-E1) u}J (r)
T he qu an tities x(t), O(t), y(t), and d(t) in Eq. (7.96) are small ac varia tions about the equiLibri um so lution,
or qui esce nt operating poin t, defi ned by Eqs . (7.92) to (7.95).
So if we ca n wr ite the converter state equ at ions, Eqs. (7.90) and (7.91 ), then we ca n always find
the average d de and sm all -signal ac models, by evalu atio n of Eqs. (7.92) to (7.96).
t
7.3.3 Discussion of the State-Space Averaging Result
As in Sec tions 7. 1 and 7.2, the low -freq uency co mponents of the indu ctor curr ents and ca pac itor voltages
me modele d by ave ra ging ove r an inter val of!ength T_,· Hence , we ca n defi ne the average of the state vec-
tor x(I) as
(x{tl)r = TI f'•T,x(t )d, (7.97)

> r I

218 AC Equivalent CircuitModeling
Th e low -frequency components of the input and output vec tors are mode led in a similar mann er. B y
ave rag ing the indu ctor voltages and ca pac itor currents , one the n obtains the follow ing low -frequenc y
state equation:
(7.98)
Thi s res ult is equi valent to Eq. (7.2).

For exa mpl e, let us co nsider how the e lemen ts of the state vector x(t ) change over one switch ing
per iod . Durin g the fi rst subin terva l, w it h the switches in pos ition I , the co nverter state equations are
ww
given by Eq. (7.90) . Th erefore, the element s of x(I) cha nge with the slopes K- 1(A 1x(t) + B 1u (t)) . If we
make the sma ll ripp le app rox imation , th at x(f ) and u(f) do not change mu ch ove r one sw itc hin g period ,
then the slopes a re esse ntially constan t and are approxima te ly equa l to
w.E (7.99)
asy
Thi s ass umption co incid es w ith the requirements fo r small sw itchin g ripple in all eleme nts of x (r) and
that variations in u(t) be slow compared to the sw itch in g frequency. If we assume that the state vec tor is
En
initi ally equal to x(O), th en we ca n w rit e
final initial interva l gin slope

(7.100)
value value leng th
eer
Simila r arg um ent s apply durin g the seco nd sub inter va l. With the switch in posit ion 2, the state equat io ns
ing
are given by Eq. (7.91). With the ass um pti on of sma ll ripple d ur ing thi s s ubinter va l, th e st ate vec tor no w
chan ges with slope
d;~l)
.ne
= 1( K" A 2 (x(t))r, + B 2 {u(1))

r,) (7. !01)
The state vector at the end o f the swi tch ing period is
~=5 + B
t
K·(A(x(t)}r,+ B (u(1))r,)
1
2 2
-------------
(7.l02}
final initial interval slope
value value length
Substitution of Eq. (7 .100) into Eq. (7 . I 02 ) allows us to de term ine x(TJ in terms of x(0 ):
x(T ,) = x(O) + dT,K - '( A 1 (x(I)}r, + B1 {uU)) 1 r,)

7 _,) + d'T,K - ( A 2 (x(I))r, + B 2 (u(t)
} (7.l03)
Upon collectin g terms , one obtains

7.3 Stare-SpaceAveraging 219
x(t) K-1(A,(x)r, +B1 (u)r,) K-'(A1(x}r,+B2 (u}r,)
........................
......... ..... .......(x(t)) r, ·--·"
x(O) ................. .....7 .......................
.......
....
.... . x (T,.)
K-'((dA 1 +tfA1) (x}r,+ (dBi + tfB1)(u}r,)
0 dT,
ww
Fig, 7,29 How an element of the s1a1c vector, and its average:,evolve over one switch ing period .
w.E y(t) C1 (x(l))r + E1 (u(rl)r
asy
{y(t))r
'
..../. ...~.. '
C 2 (x(tl)r, +
0 .______
En 7-- --
E2 (u(rl)r,___
____ _
0 dT,
gin Ts
eer
Fig. 7.30 Averaging an element of the output vector y(I ).
x(7'.) = x(0) + ~.K- '(d(t )A 1 + d' (t)A 1) (x(1)) r, + T,K - 1(d(t)B 1+ d' (t )B 2) (u(l)) 7,
ing (7.104)
.ne
Ne xt, we approximat e the derivat ive of (x(1)),, usin g the net change over one sw itch in g per iod :
Sub stitu tion of Eq. (7. 104) into (7. 105) leads to
d{x(t))r,
_d_t_,..
x(T,)-x(O)
T,.
(7,105)
t
(7,106)
which is identic al to Eq. (7.99). This is the basic averaged mod el w hi ch descr ibes th e co nverter dynam -
ics. It is nonli near because the control input d(t) is mu ltiplied by (x( t)).,~and (u (t)) r, Variat ion of a typ ica l
element of x(t) and its avera ge are illu strated in Fig. 7.29.
It is also desi re d to fin d the low -freq uency components of the output vector y(t) by averag ing .
Th e vec tor y(t) is descri bed by Eq . (7 .90 ) for the first sub in terva l, and by Eq . (7.9 1) for the seco nd sub -
int erva l. Hen ce , the eleme nt s of y(t) may be di scont inuous at the sw itch ing tran sition s, as illustrated in
Fig. 7.30. We ca n again remove the sw itc h ing harmo nics by averag in g over one switc h ing period ; the

220 AC Equivale11
r Circuir Modeling
resu lt is
(7.107 )
Rearr ange ment of term s yie lds
(7.108)
Th is is aga in a no nlin ear eq ua tion.
ww T he avera ged state eq uat ions, (7 .106) and (7 . 10 8), are co llected below:
d ( X(t))T
w.E K ~ = (d(t) A 1 + d'(t) A 2 )

(YUl
)r, = (d(I) Ci+ d '(I)
(xUl)r,+ (d(t) B 1 + d'(t) 8 2) (
c2) (xUl/r, + (d (t) E1 + d ' (t) E2 ) (0(1)),.,

u(I))r, (7,109)
asy
TI1e nex t ste p is the linea ri za ti o n of these equ atio ns abo ut a quiesce nt operat in g point, to co nstruct a
sm all -sig nal ac mode l. Wh e n de input s d(t) = D a nd u(t) = U are app lied , co nve rter opera tes in e q u il ib -
rium w he n the deri vat ives of all of the el em ent s o f (x( t)),; are zero. Hence, by se tt ing the der iva tive of
En
(x(f)),, to zero in Eq . (7 . 109 ), we can defi ne the co nve rter q ui esce nt opera ting poi nt as the so lu tion of
gin
0 =AX+BU (7. 110)
Y .. ex+ RU
eer
where defi ni tio n s (7.93) and (7.94) have been u sed . We now pertu rb an d linear ize the co nverter wave -
for ms about th is q u iesce nt oper at in g poin t:
(xU))r= X + i(t)
'
(u(1)) 7 =U+O (t)
., ing (7.111)
(y(t)) T, = Y + y(r)
.ne
d(I ) = D + J (t) ~ d'(t):: D' - a(t)
Here, u( I) and d(t) are sma ll ac var ia t io ns in th e input vec to r and du ty ra tio . The vec tors x( t) and y(t ) are
the result ing small ac va ri at ion s in the state and o ut p ut vecto rs. We m ust ass um e th at thes e ac va r iatio ns
are muc h sm all er tha n the qui esce n t val ues. In o ther wo rds, t
u i ;;,;-
11 I u<
nI
n :$ IJrn/ (7. 112)
IXI I~(t ) I
:;ic-
Ivi» IYUlI
Here, IIx IIdeno tes a nor m o f the vec tor x .
Sub st it ut io n of Eq. (7 .1 11) in to Eq. (7 . 109) yie ld s

7.3 State-SpaceAveraging 221
<l(X+i(t)) (( . . ) )
K dt - [)+ d(I) ) A 1 + (D'-d (t} A 2 (X+11(1))
+ ((v+d(r))B 1 + (o'-d(I)) n2) {u+o(n)
(7.113 )
(Y+9(r1)= ({ D+ d(r)) c 1 + (o'- d(r)) c 1 ) (x+ i (tl)
+ ((v+d<n)
E, +(D'- cl(r)jE1 ) (u+u(I))
ww
The deri vative dX/dr is zero . By collec ting terms , one obta ins
w.E
first-order nc
asy
de terms first-order ac term s
En second-ordernonlinearterms
(7.114)
gin
de + I " order ac de terms
+
first-order ac terms
{c1- C2)x(t)d(t) + {E1
eer
-Ei )iiU)d(I)
second-order nonlin ear terms

ing
Since the de terms satisfy Eq. (7. 110 ), they drop ou t of Eq . (7. 114). Al so , if th e sma ll - sig na l assumption
.ne
(7.1 12) is satisfied , then the second-order nonlin ear terms of Eq. (7. 114) are small in mag nitud e com-
pared to the fir st-orde r ac terms . We can therefore neglect the nonlinear term s, to obta in the following
line ari zed ac model :
K d~~I) ~ Ax(I) + Bu(I) + { (A l - A 2) X + { 8 1 - 8 2)U } rJ(I)

t
(7. ll5)
y(I ) "° Cil(1) + Ei1(t) + {(c,- C2)X + (E , - E2) u},i(I

)
This is the desired result, whic h coincides with Eq. (7.95).
7.3.4 Example: State-Space Averaging of a Nooideal Buck-Boost Converter
Let us apply the state-space averag ing method to model the buck -boost converter of Fig. 7.31. We will
model the conduction loss of MOSFET Q 1 byo n-res ista nc e R,111, and the forwa rd voltage drop of di ode

i/ t) Q. o.
+
i(t)
vgC
t)
T L C R v(t)
ww
F'ig. 7.31 Duck-boo~r converkr t~arnple.
D 1 by an inde pende nt voltage source o f val ue Vn. It is des ired to obt ai n a co mpl ete equ ivale nt ci rc u it,
w.E
wh ich models both th e input port and the o utp ut port of the co nverter.
The in de pende nt states of the co nverter are the in du ctor cu rrent i(t) and the capacitor voltage
v(I). Therefore, we shou ld define the sta te vector x(t) as
asy ,.(r) I I
= ,,(1)
i(t) (7 . J 16)
En
The input vo ltage v/ t) is a n ind epende nt source which sho u ld be placed in the inpu t vec tor u(t). ln addi -
tio n, we have chose n to model the diode forwa rd voltage dro p with an ind epende nt voltage source of
gin
valu e V0 . So th is vol tage source shou ld also be inclu de d in the inp u t vector u(t) . There fore , Jet us de fin e
th e inp ut vector as
U(t) aa [vp)]
Vo
eer (7.1 17)
ing
To model the co nverter in p ut port , we need to rind the co nverter in p u t c ur re nt i/t). T o calcu late th is
depe ndent curre nt , it shoul d be in c lu de d in the out p ut vector y(I). Th erefore, let us choose to defi ne y(I)
as
.ne
(7.118)
Note that it is n ' t necessary to inc lu de the outp ut vo ltage v(t) in the ou tpu t vecto r y(t ), since v(t) is alrea d y
incl uded in the state vector x (1).
t
ext, let us wr ite the state equ ations for each sub int erva l. Wh e n the switc h is in pos itio n I, the
conve rter c irc uit of Fig. 7.32(a) is obta in ed . The ind uctor volta ge, ca pacito r c urr e nt , and converte r inpu t
cu rrent are
di (r) .
I. ~ = v /1)- 1(1) R,.,
C 4_v(I) aa - ~ (7.119)
dt R
ii i) = i(t)
These eq uatio ns ca n be writt e n in the following state -space form:

7.3 Srare-Space Avera!fi11

g 223
(a)
+
i(t)
L C R v(t)
ww (b)
w.E L R v(t)
asy
Fig. 7.32 Bt1ck-buns1 conwrtcr t:ircu ir: (a) d uring ~ubi11terval 1, (b) during subinterva l 2,
En
l'- I - R on n gin
Ii·(t)I+ ~;:.,,
1101 lvit}I
eer
0 d I 1·(1
i(I)) I
.__
i(I)
0 C dt = 0 I \IL!
~_______...
~
-· R ~ __.
'---- -------
ing
dx(I) (7.120)
K -----;ft ,\ I x (I) Bi t1(/}
i I
--
l s(l) j
1 l I
IO
._______,
l
i(t) 1 + OOj r ·'/1)
.ne
r {t ) ______, \ID
--._,,.- -----------
y(t) c. x(I) E1 u (1)
So we have identified th e state equation ma trices Ai, Bl' C 1, and E1 .

"With the swi tch in position 2, the conve rter ci rc uit of Fig. 7.32(b) is obtained. For this subinter -
val, the inductor voltage, capac itor curr en t, and converte r input c urre nt are given by
t
I.,
di{I) _- ,,(I) - Vl!
, di
C tlv(I) = _ v(r) _ i( t ) (7. 121)

dt I?
i,(1) = 0
When written in state-space form, these equ ations become

224 AC Equivalenl Circuit Modeliug
---....__....l= -1-! l j I Il
l 0 1
[LO vs<t)j
----
d [ i(r) i(r ) O- J
0 C dt l'(t) v(t) + 0 0 VD
-----------
...._____:.-
K
dx(T) ---------------
A2 x (t) B2 U(I) (7.122)
dt
l j+ l j
liitl) = [ooj [ooJ
-
i(t ) v/t)
------- ------------------
v(t) Vu
ww
y(I) C2 x(t) E2 u(t)
So we have also ide ntified th e su bint erva l 2 matr ices A2, B2, C1, and E:2.
The next ste p is to eval uate the state -space averaged equilibrium equations (7.92) to (7.94). The
w.E
averaged matrix A is
0 - DR,., D'
asy +D'
- 1 -½ -D'
(7.123)
En
In a simil ar manner , th e averaged matri ces B, C , and E are eva lua ted , with the following res ults:
8 = DR I + IYl\2::
gin
C ==DC , + /J'C2 = [ fJ O j
I g -R'I
(7 . 124)
E=DE
The de state e qu atio ns (7.92) therefore become

1+ D'R2 =[ 00]
eer
- DR,,,, D'
li I+I g -f' II;~
l ing
.ne
- D' l
R (7.125)
I~;,
l
Evaluation ofEq . (7 .95) leads to the following
[ &j+ [0 0 j
so lut ion for the equilibrium sta te and output vectors:

t
V I
~
D' 2 R D' R
{ ( 1= ( ·1 + R,,,) D
D'' R D'
(7 .126)
I/ 1-(1 + ..12.. D'R lI v, I

1 t;/- _Q_
g - R,,.,) [ -D'2R t V"
[)' 2 R
A lternativ e ly, the ste ady -state eq ui vale nt ci rcu it of Fig. 7.33 can be co nstructed as usua l from

7.3 Stale-Space Averaging 225
l:D
+
V R
ww
Fig. 7.33 De circuit model for the buck-boost converter example, equivalent to Eq. (7. 125).
Eq. (7.125). The top row of Eq. (7.125) could have been obtained by applica t ion of the pr inci ple of
w.E
inductor volt-second balance to the inductor voltage wavefo rm. The second row of Eq. (7.125) could
have been obtained by applica tion of the pr inciple of capaci tor charge bala nce to the capacitor curr ent
waveform. The ig(t ) equation expresses the de component of the co nverter inpu t curre nt. By recons tru ct-
asy
ing circuits tha t are equi valent to these three equa tions, the de model of Fig. 7 .33 is obtained .
The small -signa l model is found by evalua tion of Eq. (7 .95). The vector coeff icien t s of d( 1) in
Eq . (7 .95) are
(A 1 -A 1) X+B( 1 -B 1 ) U -_,- v _,
J
En!
R,,, I+ vs+ ]-I
o vo - v. - v - I, R,,, + vn j (7 .127)
{CJ- C2)X + [E1- R2) U =I/J

gin
The small-signal ac state equations (7.95) therefore become
eer
lL Old ri(1)l
0 C di
-DR 0 ,
v(t) = - n ' _
D'
.L
R ing (7.128)
[~~
;:I+oo1[ I+1, ]<ir,)
.ne
r..8(t )1 = r /) o 1 r "s~')
ote tha t, since the diode forwa rd voltage drop is modeled as the co nstant val ue V0 , there are no ac va ri-
ation s in this source, and vD(I) equals zero . Aga in, a c ircuit model equi vale nt to Eq. (7. 128) can be co n-
stmcted, in the usual manner. 'When wr itte n in scalar form, Eq. (7. 128) becomes
t
L ,/~~) =D' v(t ) - DR.,,i(I) + D op)+ (v.- V - IR ,.,+ Vil)d ( t)

Cd!~) = - D' i(t) - v¼)+ I d (I) (7. [29)
i i t ) = D i (1) + / d (t )
Circuits cor respondin g to these equatio ns are listed in Fig. 7.34. These circu its can be comb ined into the
comp lete small -sig nal ac eq uiva lent c irc uit model of Fig. 7.35.

(n)
Dv,( t) D'v(t)
ww (b)
C d v(t)
dt
+ oc,)
R
w.E D'i(t) JJ(t) C v(t) R
(c) asy ; ,(t)
En
gin D i(t)
eer
ing
Fig. 7.34 Circuits equivalent to the ~mall-signal converter equation~: (a) inductor loop, (b) capacitor node. (c)
input po1i.
.ne
i,( r) l
l d(t) id(t) C
+
ii(t) R
t
l<'ig. 7.35 Complete small-signal uc equivalent circuit model, nonideal buck-boost converter example.
7.4 ClR CUIT AVERAGING AND A VERA GED SWIT CH MODELING
Circuit averag ing is another well-known techniq ue for derivation of converter equ ivalent circuits. Rather
than averag ing the converter state equations, wi th the circu it averag ing tec hnique we average the con -
verte r waveforms direct ly. All manipulations are performed on the circui t diagram, instead of on its equa -

7.4 Circuit Al'eragi11

g and As-eragedSwitch Modeli11
g 227
tions , and hence the circui t averaging techniq ue gives a more physical interpretatio n to the model. Since
circuit averaging involves averaging and small -signa l linear izat ion , it is equ ivalent to state -space ave rag -
ing . However , in many cases circu it averagi ng is easie r to apply, and allows the small -signal ac model to
be written almost by inspectio n. The circuit averagi ng techn iqu e ca n also be appli ed di rec tly to a number
of different types of co nverters and switc h elemen ts, inclu ding phase-cont rolled rectifiers, PWM co nvert -
ers operate d in d iscontinuo us con du ction mode or with curre nt pro gramm in g, and qu asi -resona nt con -
verte rs- these are described in later chapters. However, in other cases it may lead to involute d models
that are less easy to analyze and understand. To ove rcome this problem , the circ uit averagi ng and state -
space averag ing approaches can be combined. Circu it averag ing was developed before state-space aver -
ww
aging, and is described in [4]. Because of its ge nera lit y, there has been a rece nt resurgence of interest in
circuit averagi ng of sw itch networks [13-20].
The key step in c ircuit averag ing is to replace the converter switc hes with voltage and curr ent
sou rces, to obtai n a time -invariant circui t topology . The wavefor ms of the voltage and cur rent gene rators
w.E
are defined to be identica l to the switch wavefo rm s of the original converter. Once a time -invariant circuit
network is obtained, then the converter waveforms can be averaged over one sw itch ing period to remove
the sw itchi ng harm onics . Any nonl inear ele ments in the average d circu it mode l can then be pert urbed
asy
and linea rized, lea din g to the small-signal ac model.
In Fig. 7 .36, the sw itch ing elements are separa ted from the remai nder of the co nverter. The con -
verter therefore consists of a switch netwo rk co ntai ning the converte r switc hin g elements , and a time -
En
inva riant netwo rk, conta ining the react ive and other rema inin g elemen ts. Figure 7.36 illustrates the sim -
ple case in which there are two single-pole single -throw (SP ST) switches ; the swi tches can then be repre -
gin
sented usi ng a two -port ne twor k . In more compl icated systems containing multip le tran sistors or diodes,
such as in poly phase convert ers, the swi tch ne two rk may con tain more than two ports.
Power i11plll
Time-invariant network eer Load
containing conver ter reactive elements

ing +
.ne
C >
v/ t) L R ,> v(t)
H- --'olS1f'\-
il(t)
+ vd,_I)
i ,(t)
-
ii(t)
t
+ +
v,(t)
-
t:
C
Switch network -.::,
C)
::i. v2 U)
c,., N
- -
Control d(t)
inplll
Fi~. 7.36 A sw itchin g converter mil be viewed as a swi tch network connected to a 1i111t
-invar ianc network.

228 AC Eq11
ivale111
Circuit Modeling
ww .
Switch network
, •·•• •• •• •• •••
.
• • •• n •• •• nn .. •• • • .
w.E
asy
fig. 7.37
En
Schematic of the SE PIC. arranged in th1:form of Fig. 7.~6.
gin
eer
The ce ntra l idea of the averaged switch modeling approach is to fi nd an averaged c i rc uit model
for the sw itch ne twork. The resulting average d switc h mode l can the n be inserte d into the co nverte r cir-
c u it to obta i n a co mp lete average d c ircuit model of the conver ter. An impo rta nt ad vantage of the ave r-
aged switc h mo de li ng approa ch is tha t the same model can be used in man y d iffe rent co nve rter
co nfigurati o ns. It is not necessa ry to reder ive an averaged c irc uit model for each particu lar converter.
Further mo re, in many cases, the ave ra ged sw it ch model simp lifies conve rter analysis and yiel ds good ing
intu itive unders tandi ng of the con vert er stea dy-state and dyna m ic pro pe rties .
.ne
The firs t step in the process of fin di ng an averaged swi tch model for a switch net wo rk is to
sketc h the co nve rter in the for m of Fig. 7.36, in wh ich a swi tc h ne twork co nta ini ng only th e co nve rter
sw itch ing ele me nts is expli c it ly defi ned . The CCM SEP IC exa mple shown in Fig . 7.37 is used to illu s-
trate the process. There is usu all y more than one way to de fin e the two ports of the switch ne two rk ; a nat-
ura l way to de fin e the two -port sw itch ne tw ork o f the SEPIC is illust rated in Fig. 7.37. The swi tch
t
netwo rk te rmin al qu antiti es v 1(t) , i 1(1), vi(t), and ii(t) are ill us trated in Fig . 7.38 for CCM operat io n. Note
that it is not necessary that the ports of the switc h network be e lec trica ll y co nnected wi t h in the sw it ch
network itself . Fur the rm ore, there is no req uirem en t tha t any of the ter m ina l vol tage or cu rr ent wave -
fo rms of the sw itch ne two rk be no npu lsat ing.
7.4.1 Obtaining a Time-Invariant Circuit
Th e fir s t step in the c irc uit averag ing tec hniq ue is to rep lace the sw itch netwo rk w ith vo ltage
and curre nt sou rces, suc h that the c ircuit co nnec tio ns do not vary in tim e . The sw itch ne twork defi ned in
th e SEPIC is sho wn in Fig. 7.39(a). A s wi th any two -por t netwo rk , two of the fo ur termi na l vo ltages a nd

7.4 Cirw ir Averaging and Averaged Switch Modeling 229
( vi(1)) 7
..... . .... ... . . . . ... 1.••• . ··•·•·· ····· •••• ·•··· ·••··•··· - ·· · · ·-·· ···
0 ____ __._______ ...__

__
0------dT_,
0 ------
. --- 0
T, 0
0
T,
ww -- (iiCl)
)r,
w.E
•• • • .. •• ••• • •••• ••• ••oH OO.o••• ••• •• •.••• • •.••••••• - •••• OOHOO•OOOOOO
0 0 .._ ___
0 ..._____ .._ __
<ff, 0 T,
Fla. 7.38 Terminal switch network waveforms in the CCM SEPIC.

asy
En
c urrents can be taken as indepe ndent in put s to the switch netwo rk. The re mainin g two voltages and/or
gin
cur re nt s are viewe d as de pendent outputs of the switch net work . In ge neral , the cho ice of ind epend ent
inputs is arb itrary , as long as the inpu ts can indeed be indepe ndent in the given converte r ci rc uit. For
CCM operation, one can choose one termin al curre nt and one ter min al voltage as the indepe ndent inpu ts.
Let us select i 1(t) and v2(t) as the sw itch netwo rk inde pende nt inputs . In addi tion, the duty cycle d(t) is
the indepe ndent control in put .
In Fig. 7.39(b) , the ports of the sw itc h network are replaced by dependent voltage and curr ent eer
sources. The wa veform s of these dependen t sources are defi ned to be iden tical to the actu al depe ndent
outputs v 1(t) and i/1) given in Fig. 7.38. Since all waveforms in Fig. 7.39(b) match the waveforms of
Figs. 7.39(a) and 7.38, the ci rcuits are e lectr ica lly equi valent. So far, no approxi ma tio ns have been made. ing
.ne
7 .4.2 Circuit Averaging
The next step is deter mina tion of the average values of the sw itch network ter mi nal wavefo rm s
in term s of the converter state va1i abl es (indu ctor curre nt s and cap acitor voltages) and the co nverte r inde-
t
pendent inputs (such as the input voltage and the transistor d uty cycle). The basic assu mption is made
th at the nat ura l time co nstants of the co nverte r netwo rk are muc h lo nger that the sw itchin g period T,.
This assumption coincides with the requir emen t for small switc h ing ripple . One may average the wave-
form s over a time interva l which is short comp ared to the sys te m nat ural ti me co nstants, w ithout signifi -
ca ntl y alteri ng the syste m response. Hence, when the bas ic ass um ption is sa tisfied, it is a good
approximati on to averag e the converter wa vefor ms over the switchin g period Ts. The re sulting averaged
model predi cts the low- frequency beha vior of the syste m, while negle cting the high-frequency switchin g
harmonics. In the SEPIC exa mple, by use of the usual sma ll ripple approx im ation, the average values of
the sw itc h network ter m ina l wavefo rms of Fig. 7.38 can be expressed in terms of the indepe nden t input s
and the state variables as follows:

230 AC Eq11i
vale11ICircuitModeli11
g
(a) i 1(r) \ i ½U)

+ +
ww (b) __ ,.. __ .,..

i Switch nel\Vork
L.....h·····-·········
···············
····...:
! . ._. . _. .. _... _.. _... .,.. ......... ...... _.. _... _.. _... _. .. ,.., ____ _
w.E ~
lv (1) 1
(t)
+
asy !
En
1 Sw itch network
;•• •• ••••• ••• •• •~•• •••• ••• • • •••••••• L.... 0000000
(c )
gin
(i 1(t))r, ,............................................. ...................., (i-i(t))7'.
............... ,
+ +
d'(t)( . }
d(t) I 1(1) T,
eer
!·... ....... ...........
Averaged switch network
.....................
........... ............. .-.............. ing
.ne
(d )
...!.L
J
t
DD'
Averaged switch network ,

: ••••· ••·· ·•·• - ••• ••-• ·•• • •• n •• ••• •• • •·n• ••• • • •• •••• •• • • •uu• • • •u ••• •• ·• .. ••• :
Fig. 7.39 Derivation of the averaged swit<.:hmodel for lhe CCM SEPJC: (a) switch network ; (h ) 8Will:hm:lwork
where the switches nre replaced with depellClent source~ whos e wavefor ms match the switch t~rmimll depend ent
wavefonns; (c) large-sig1ial, nonlinear averaged switch model obtai ned by uvcrag ing the switch netwo rk termina l
wavefom1s in (tJ): (d) de and ac sm all-signal averaged swit.:h model.

7.4 Circuit Avera11i11g

andAveragedSwitch Modeli1111 231
(7.130)
(7. 131)
(7.132)
ww (7 .133)
w.E
We have selected (iL(t)),; and (v2(1) \ , as the sw itch network independ ent inp uts . The dependent outputs
of the averaged switch network are then (i,( t)\ ; and (v 1(!)\,. The next step is to exp ress, if possib le, the
switch network dependent outputs {i2 (t))r, and { 111(!)\, as functions solely of the switch network indepen -
asy
dent inputs (i 1(i)) r,• (vi(t ))T,' and the contro l inpu t d( t). In th is step, the averaged switch outputs should
not be written as function s of other converter signals such a~ (vgC
{ir.i( t)),.,, etc.
t}),:,, (vci (r)),:,, {vc,Cr)\ ,, (i1,1(1)\:,•
En
We can use Eqs. (7.131) and (7. 132} to write
gin (7. ! 34}
eer (7.135)
Subs titution of these express ions into Eqs. (7 . 130) and (7 . 133) leads to
ing
.ne
(7. 136)
(7.137)
t
The averaged eq ui val ent cir cuit for the sw itch network, that con-esponds to Eqs . (7. 136) and (7. 137), is
illus trated in Fig. 7.39(c). Upon complet ing the averag ing step, the sw itchin g harmon ics have bee n
removed from all converter waveforms , leavi ng only the de and low-frequency ac co mpone nts. This
large -signa l, nonlinear , time - invar ia nt model is va lid for frequen cies sufficient ly less th an the switc hin g
frequency. Averag ing the waveforms of Fig. 7.38 modifie s only the switch network; the remai nder of
the converter circuit is unchange d. Therefore , the averaged c ircu it model of the conve rter is obtained
simply by replaci ng the switch network wit h the averdged swi tch model. The switch network of
Fig. 7.39(a) ca n be iden tified in any two -swi tch conve1ter, such as bu ck, boost, buck -boo st, SEPIC , or
Cuk . If the converter operates in con tinuous conduct ion mode, the derivation of the averaged switch
model follows the sa me steps , and the result shown in Fig. 7.39(c) is the same as in the SEPIC exampl e.
Thi s mean s that the model of Fig. 7.39(c} can be used as a ge neral large-s ignal avera ged switch mode l
for all two -switch co nverters operatin g in CCM .

232 AC Eq11
ivale111
Circuit Modeli11
g
7.43 Perturbation and Linearization
The model of Fig. 7.39(c) is nonlinear , because the dependent genera tors give n by Eqs. (7.136) and
(7. 137) are nonlinear functions of d(t ), (ii(t))r, and (v 1(1)\,· To construct a small -signa l ac model, we per-
tur b and linearize Eqs. (7.136) and (7. 137) in the usual fashion . Let
d(l) = D+J (I)

(v1(t))T =: V1+ i1t(t)
(i1(1)) 7,' = 11 +t 1(1)
ww (vi(ll)r .,= V2 + vit)
( i 1(1)) r.,· = / 2 + i i(t)
(7.138)
w.E
With these substitutions , Eq. (7.136) becomes
asy
It is desi red to solve for the dependent quantity V1 + 1\.Equation (7.139) can be man ipulated as fo llows :
(7 . l 39}
En (7.140)
gin
The terms d(t)v 1(t) and d(t)v 2(t) are nonlin ea r, and are small in magn itud e prov ided that the ac variations
are much smalle r than the quiescent va lues [as in Eq. (7.32)]. When the s mall -signal assump tion is satis -
eer
fied, these terms can be neglected . Upon e limin ating the nonline ar terms and so lving for the sw itch net -
work depe ndent output V1 + 1\, we obtain
(v1+ 01)= ~ ( v2
i(
+ v2)-J( v,;v2)
"jj/y) ing (7,141)

= V2 + v2
)- J (
.ne
The term (V/DD')d(t) is drive n by the co ntrol input J, and
+
hen ce can be represe nted by an independent voltage
so urce as in Fig. 7.40. The tem1 (D'ID) ( V2 + 1\(t)) is equal
to the co nstant value (D'/D) mu ltip lied by the port 2 inde-
t
penden t voltage (V2 + vi(t)). Th is ter m is represented by a

dependent voltage source in Fig. 7.40. Th is depe ndent

source will become the pr imary winding of an idea l trans -
former.
In a sim ila r mann er, substitution of the re latio nships
(7. 138) into Eq. (7.137) leads to:
Fig. 7.40 Linearization of the dependent
voltage source. (7. 142)
The terms t1(t)J(t) and i2(t)d(t) are non linear , and can be neglected when the sma ll-sign al assump tion is
sa ti sfied . Elimi nat ion of the nonlinear terms , and so lution for /2 + [2 , yiel ds:

7.4 Circuit Averaging and Averaged Switch Modeling 233
(7.143)
The ter m (1/DD')d(r) is dr ive n by the co ntro l input d(t) , and

is represe nted by an independe nt c urrent sour ce in Fig. 7.41.
The term (V'/D)(/ 1 + i 1(1)) is dependent on the port l c urre nt
(/ 1 + i 1(1)), Thi s term is mode led by a depende nt c urre nt
ww ..!:La· so urce in Fig. 7.4 1; thi s source w ill beco me the secon dary
DD' w ind in g of a n ideal transfor mer. Eq uatio ns (7 . 141) a nd
(7.143 ) desc ribe the ave raged sw itch ne twork mo del of
Fig. 7.39(d). Note that th e mode l co ntain s bo th de a nd small-
w.E
Fig. 7.41 Linearization of the depen -
dent curren t source.
signa l ac ter ms: one e qui va lent c irc uit is used for both the de
and the sma ll-sig na l ac models. The tra nsforme r symbo l co n-
tai ns bot h a solid line (ind icat in g th at it is an idea l trans -
asy for mer cap able of pass ing de vo ltages and currents ) and a
si nu so idal line (whic h indi ca tes that sm all -signa l ac var ia-
ti ons are mode led). Th e averaged swi tch model of Fig. 7 .39( d) reveals tha t the switc h ne twork pe rform s
En
the functions of: (i) tran sfor mat ion of de and small-signal ac voltage and curre nt leve ls accord ing to the
D':D co nve rsion ratio , an d (ii) intro ducti on of ac volt age and c urren t var iatio ns into the conver ter c irc uit,
gin
d rive n by the co nt rol inp ut d(t). Wh en th is model is inserted in to Fig. 7.37 , the de a nd sm all -s ig na l ac
SEPIC model of Fig. 7.42 is ob tained . Thi s model ca n now be solved to de termine the stea dy-state vo lt-
ages and cu rrents as we ll as the small -signal converter tran sfer fu nct io ns .
eer
The sw itc h networ k of Fig. 7.39(a ) ca n be id e ntified in a ll two -sw itch co nverters, inc l udi ng
bu ck , boo st, SEPlC, Cuk , etc. As illustrate d Fig . 7.43, a co mplete ave raged c ircuit model of the co nverter
can be co nstructed s im ply by rep lac ing th e sw itch netwo rk wit h the average d sw itc h model. For exa m-
ing
.ne
R
t
Fig. 7.42 A de and small -signal uc averaged circu it model of the CCM ~EPIC.

234 AC E111i
vale11tCirrnitModeling
Power input load

1ime-invariant network +
co11tai11i11g
converter reactive elements
C R v(t)
-II-
+ vc(t)
ww i ,(I) , ..........................- ..·..-· ··, ii(t)

.____
+
,....... Switch ...-...
network
' _ _ _.
+
w.E (a)
asy '·················
Duty
r·····
-·····-···:
d(t)
En
cycle
Power i11p11t load

1ime-i11
gin
varia11tnetwork
containi11gconverter reactive elements
+
Vg + vg
-1-----1
-
C
eer R V+v
ing
.ne
t
(b)
t .._....
Averaged swf
i1ch_11etwork
...... .
D11ty
cycle d( t)
Fig. 7.43 Construclio11of an averaged t:i,\:uil model for a lwo-switd1 cn 11vtner operat ing in CCM: (a) the con -
vene r d rcuit with the gcllernl 1wu·swi1<
.:h network identified ; (b) de; aml ac.:small-signal av.:ragccl cin: uit mode l
ob tai nt!d by replacin g the swi td1 ndwork wit h tl1c averaged model.

7.4 CircuitAveraging andAveragedSwitch Modeling 235
(a )
·······...·
···············~·
'''
' .
I i2(t) +
Switch
k R 11
(t)
network
.
.. O OO OOOO H OOO O O • ••• • • .. • •• • ••oH o•o o 0 00 000
.
0 0 0 ,0
ww
(b)
L V2+ v2
-
+
w.E
vg+ vg
+
v, + v1
iJ
DD'
c::i
12 + l2
C R
+
V +v
asy Q
En
Fig. 7 .44 Construction of an averaged circuit model for an idea l boost converter example : (a) converter circuit
gin
with rhe switch network of Fig. 7.J9(a) identifi ed; (b) a de a11dsmall-signal ac averaged circuit model obtained by
replacing the switch network with the model of Fig. 7.39(cl).
pie, Fig. 7.44 shows an averaged circuit model of the boo st co nverter obtained by ide nti fyi ng the switc h
network of Fig. 7.39 (a) and replac ing the sw itc h network wit h the model of Fig. 7.39(d). eer
In summ ary, the circuit ave ragi ng metho d invo lves rep lac ing the sw itch network w ith equ iva lent
vol tage and cu rrent source s, suc h tha t a ti me-inva riant netw ork is obta in ed . The converter wavefo rm s are
ing
.ne
then averaged over one swi tchin g period to remove the sw itch ing harm onics . The large -signal model is
perturbed and lineariz ed abo ut a qu iescent operat ing point, to obtain a de and a small -signal averaged
swit ch model. Rep lace ment of the sw itch network w it h the averaged sw itc h model yields a co mplete
averaged ci rcuit model of the converte r.
7.4.4 Switch Networks

t
So far, we hav e de scri bed derivat ion of the average d switch mode l for the genera l two -swi tch
net work where the ports of the switch networ k coi ncide wit h the sw itc h ports. No connectio ns are
ass um ed be tween the swi tche s with in the sw itch network itself. As a resu lt, th is sw itch ne twor k and its
averaged model ca n be used to easily con stru ct averaged circu it mode ls of man y two -sw itch converte rs,
as illustra ted in Fig. 7.43 . It is important to note , howev er, that the defini tion of the sw itch netw ork ports
is not unique . Different defin itions of the switch ne twork lead to equi vale nt , but not ide ntical, average d
switch models. The alternative forn1s of the averaged switch model may result in simpl er circu it models,
or mod els that provid e better phy sical ins ight. Two alt ern ati ve ave raged swi tch mod els , better sui ted for
analyses of boost an d buck co nverters, are described in th is sect ion .
Cons ider the ideal boos t co nverter o f Fig . 7 .45(a). The switc h network con tains the transis tor

236 AC Eq11i
va/e111
Circuit Modeling
i I(t) r···········
-·····-·············i
(a)
+ + +
v(t)
C R
!..switch network .!
ww (b)
w.E -···{v,(t)}T
· -·····---L.... _..................
0 ..,____0 ...._____
.....................
...___
asy 0 dT, T,
En
Fig. 7.45 An ideal boost convener exam-
{i7.(t))T
ple: (a) convener circuit showing another pos-
sible definition of the switch network; (b)
terminal waveforms of the switch network. gin H·-··-··--··-·-·s___
0 .._ ___0
,. ·•H..· ·----·--·
___.
._____
· ·..··•·•·..··· ..........
_ ....___
..........
•
0
eer dT, T,
ing
and the diod e, as in Fig. 7.44(a), b ut the sw itch network ports are defined di ffe ren tly . Let us proceed w ith
the derivation of the correspo nding averaged switch model. The switch network te rminal waveforms are
shown in Fig. 7.45(b ). Since i 1(1) and v2(1) coincide wit h the converter inductor curren t and capacitor
.ne
voltage, it is convenient to choose these waveforms as the ind ependent inputs to the swi tc h network . The
steps in the de rivatio n of the avera ged switch model are ill ustrated in Fig. 7.46.
First, we replace the switch ne twor k w ith dependent voltage and curre nt gene rators as illu s-
trated in Fig. 7.46 (b). The voltage generator v 1(t} models the dependent voltage waveform at the inpu t
port of the switch netwo rk, i.e., the transis tor vo ltage. As ill ustra ted in Fig . 7.45(b) , v 1(t) is zero when the
transis tor con ducts, and is equ al to vit ) when the diode co nducts: t
v,(t}={ 0, O<t<d 'f'., (7 .144)

~2(1), dT, < I < T,
When v 1(1) is de fin ed in this mann er, the inductor vo ltage waveform is unchanged. Li kew ise , ii(t) models
the depende nt current waveform at port 2 of the netw ork , i.e., the diod e cu rrent . As illustrated in
Fig. 7.45(b) , ii(t) is eq ual to zero whe n the transis tor conduc ts, and is equ al to i 1(t) when the diode con -
ducts :

7.4 CircuitAveraging andAveragedSwirch Modeling 237
1'()-{
2 T -
0•. O<t<dT, (7.145)
i 1(I), dT, < t < T,
With ii(t) defined in this manne r, the capacitor curre nt waveform is unchanged. Therefore , the orig in al
converte r circu it shown in Fig. 7.45(a), and the circu it obtained by replacing the sw itch network of
Fig. 7.46(a) with the sw itch netwo rk of Fig. 7.46(b), are e lectr icall y ident ical. So far , no approxi mations
have been made. Nex t, we remove the swi tch ing har monics by averaging all signa ls over one switc hin g
perio d, as in Eq. (7.3). The results are
ww (7.146)
w.E
Here we have assumed that the switch in g ripp les of the indu cto r curren t and capac itor voltage are small,
or at least linear functions of time . The averaged sw itch mode l of Fig. 7.46(c) is now obtained. This is a
asy
large -signal , non linear model, wh ich can replace the switch netw ork in the or iginal conve rter cir cuit, for
construction of a large-signal nonlinear circu it model of the converter. The switc hing harmonics have
bee n removed from all conve rter waveforms, leav ing on ly the de and low -frequency ac com pone nts.
En
TI1e mode l ca n be linea ri zed by perturb ing and lineariz i ng the converter wavefo rms abo ut a qu i-
escent opera tin g po int, in the usua l manner. Let
(v/tl)r, = V8 + 0/I)
gin
d(f) = D + d(t ) =='1-d'(I)=D' - d(t)
(i(r))r .,= (i1(t)) , = I +f(I)
1
(\,(tl)r = (vi(t))r = V + v{t)

' s eer (7,147)
ing
(v1(1)}r= V1 + f1i(I)
(ii(tl)r' = 12 + i i(t)
'
.ne
The no nlin ea r voltage ge nerato r at port I of the averaged sw itch netw ork has value
( D' -clUl)(v + 0(1)) ,,_D' (v + vUl)-vd(r) -v(r )d(tl
The tem1 fi(r)d(t) is nonlinear , and is small in magnitude provided tha t the ac variatio ns are much smaller
than the quiescent values [as in Eq . (7.32) ]. When the small -signal assu mption is satisfied, th is te rm ca n
(7,148)
t
be neglected. The te1m Vd(t) is diiven by the control input, and hence can be represented by an indepen -
dent voltage source. The term D'(V + fi(l)) is equa l to the constan t val ue D' mu ltip lied by the outp ut vol t-
age (Vt- v(t)) . This ter m is depe ndent on the outpu t capac itor voltage; it is represented by a dependent
volta ge source. Th is de penden t source will become the pr imary w ind ing ofa n idea l tran sfo rmer.
The nonlin ea r cu rrent generator at the port 2 of the avernge d switc h network is treated in a si m-
ilar mann er. Its c urrent is
(D'- tf(l)j (1+ i(t)j = D' (t + i({}}- JJ(r) - i(r)d (I) (7.149)
TI1e term i(t)d(t) is nonlinear, and can be neglected provided that the small-signal assumption is satisfied.

238 AC Eq11i
va/e111CircriitModeli11
g
. ....................................
.... .
ww (b)
w.E ! +
i ,(t)
!
Iv,(,)+
asy l
Switch network
(i iU
>>r En
, '............................
·················-·· ·······················
...........................
...................
,
(c)
gin +
ld\1)
(,,(1)),,
eer
Averaged switch network ing
.ne
:• • •• -• • • •·•• • • • • .. • • •• • • •• • •• ••• ·.. • •-••n • •• ••• ·.. • • • • ••n• • Hn •• .. ... .. .. i
t
(d)
!......Averaged switch network ....... !
F!i;:. 7.46 Derivation of the averaged switch model for the CCM btx\sl of Fig . 7.45: (a) switch network;
(b) swi td1 network where the ~witches are replac.::d by clc1>enden1suur~es who~e wavefonns ma t<.:h1he sw it<.:hter-
minal waveforms ; (c) large-signa l, nonlinear average d switc h model obtai ned hy averagi ng the switt:h netw or k ter -
minal waveforms ; (d) de and ac sma ll-signul averaged switch ne twork model.

7.4 CircuitAveragi11
g and AveragedSwitch Modeli1111 239
I +i +
ld(t) C R V+v
ww
Fig. 7.47
De and smalHignal ac averaged circuit model of the boost converter.
w.E
The term td(r) is driven by the contro l input a(/), and is represented by an independent current source.
The term D'(l + i(r)) is dependent on the inductor curren t (/ + [(t )). Th is tem1 is modeled by a dependent
asy
current source; this source will become the secondary winding of an ideal transformer.
Upon eliminat ion of the nonlinear term s, and rep lacement of the dependent genera tors w ith an
ideal D': I transforme r, the combined de and small -signa l ac averaged sw itch model of Fig. 7 .46(d) is
En
obtained. Figure 7.47 shows the e-0mplete averaged circuit model of the boost conve rter.
It is interest ing to co mpare the models of Fig. 7.44(b) and Fig. 7.47. The two averaged circu it
gin
models of the boost converter are equivalent - the y resu lt in the same steady -state sol uti on, and the same
converter transfe r funct ions . However , since both ports of the switc h network in Fig. 7.45(a) share the
same reference ground, the resulting averaged circuit model in Fig. 7.47 is easier to solve, and gives bet-
eer
ter physical insight into steady -state opera tion and dynam ics of the boost converter. The circu it model of
Fig. 7.47 reveals that lhe sw itch network performs lhe functions of: (i) transforma tion of de and smal l-
signa l ac voltage and current levels according to the D': l conve rsion rat io, and (ii) introduction of ac
ing
voltage and current variat ions into the converte r circui t, driven by the control input d(t). The model of
Fig. 7.47 obtained us ing the circu it averaging approac h is identical to the model ofF ig. 7 . l 7(b) obtained
using the basic ac modelin g technique of Section 7.2.
.ne
Next, we consider the CCM buck converter of Fig. 7.48, where the switch network ports are
defined to share a commo n ground term inal. The derivation of the corre sponding averaged switch model
t
follows the same steps as in the SEPIC and lhe boost examp les. Let us select v 1(t) and iz(t) as the inde -
pendent terminal var iables of the two -port sw itch network , since these quantit ies co incide with the
app lied converter input voltage v/t) and the indu ctor current i(t) , respective ly. We then need to express
the averaged dependent termi nal waveforms {i1(t))T, and (v2(t))r , as functions of the control input d(t) and
of (v1(1)/r, and (i2(t)),, Upon averag ing the waveforms of Fig. 7.48(b ), one obtains
(7. lSO)
Perturbation and linear ization of Eq. (7. 150) then leads to
/ 1 + i 1(1):D{l 2 + i 2 (t))+/ 2 J(1 )

(7 .l.51)
V2 + v2{r) "' D ( V 1 + v1(1)) + V1 d(I)
An equivalen t circ uit corresponding to Eq. (7.15 1) is illustrated m Fig. 7 .49(a). Rep lacement of the

240 AC EquivalenrCirrnir Modeling
fO UOOOOHO••••• • • •• ••oHO UO OHO • • .. • •• •\
L
(a)
---+......·--
i,( t)
I T
i i iz(t)
'
I+
i(t)
+
v 1(t) I I vi( t) C R v( t)
- I l
i Switch network .
' ·••• .. ••••• ••• •••• • ••H • •• ••••• •• ••• ••• '
ww (b)
w.E Fig. 7.48 Buck converter example:

o ,_____ ..__
__ o__ ..__
__
asy
(a) conve rter circuit, (b) switch wave-
forms.
0 dTS
-
En
gi0------------------
nee 0
0
(a )
+
1:D
rin
g.n
(b)
Averaged switch netwo rk et
R V+ il
Averaged switc h netwo rk
Fig, 7,49 Averaged switch modeling , bud converter example: (a) de and small -s ign al ac avcrnged switch
mo<lel: (b) Averaged circuit model of the buck converter obtained by re place ment of the switch network by the aver -
aged switch model.

7.4 Cirrnir A11era

gin3 and A,,eraged Switch Modeli11
3 241
(a)
l :D
+
ww(b)
i..........···········
···-··· ·- · ···-··j
i1(1)
+ w.E
: 11i<1)
j +
I
+ +
asy lvi(t)
I
t
• • • • ·••• • H-•• • • •-•• •• •••••n • ., •• • •·• • n.'
1
:
En
(c)
i 1(1) j iI2(t ) gin

+
,,c,il
i+
j
+
eer +
ing
l
I- Ivie,) ...!1..._
DD '
d~
l l
.ne
!
l ! -
i........................................J
Fig. 7,SO Three hasic switch nelwork.s, and !heir CCM de and small-signal ac avcrnged swicch models: (a) che
buck switch network, (b) the boost switch network, and (c) the general two-switch network.
t
sw itch network in Fig. 7.48(a) with the averaged switch model of Fig. 7.49(a) leads to the converter aver-
aged circuit model of Fig. 7.49(b). The circuit model of Fig. 7.49(b) reveals th at the sw itch network per-
for ms the fun ctio ns of: (i) transformation of de and sma.11 - si gna l ac voltage and c urre nt levels according
to the 1:D conversion ratio, and (ii) introduction of ac voltage and current variations into the converter
circuit , dri ven by the co ntro l inpu td(I). The model is easy to solve for both de conversio n ratio and small-
signal freq uency responses. It is identical to the mode l shown in Fig. 7. l 7(a).
The three basic switch netwo rk s- the buck switch netw ork, the boost switc h network, and the
general two -swi tch netwo rk- toget her wit h the corres ponding averaged swi tch mode ls are show n in
Fig. 7.50. Average d switch models ca n be refin ed to include co nductio n and sw itchi ng losses. T hese
models can then be used to pred ict the voltages, currents, and efficie ncies of nonidea l converters. Two
examples of averaged switch models that include losses are described in Sec tions 7.4.5 and 7.4.6.

242 AC Eq11irnle11r
Circuit Modeling
7.4.5 Example: Averaged Switch Modeling of Conduction Losses
An averaged sw itc h mode l can be refin ed to in clu de swi tc h co ndu cti o n losses. Consider ag ain th e SEPIC
o f Fig. 7.37. Suppose that th e tra nsistor on -res istance is R,m and th e dio de forwa rd voltage dro p VD are
app roxi mate ly cons tant. In thi s examp le, all other co ndu ction or swi tch ing losses are neg lec te d. Our
objec tive is to der ive an averaged sw itc h model tha t in cl udes cond ucti o n losses ca used by th e voltage
dro ps across R,m and VD. Let us de fin e the sw itch network as in Fig. 7.39 (a). Th e waveforms of th e sw itch
network ter minal curr en ts are the same as in Fig . 7.38, but the voltage waveform s are affected by the
voltage drops across R,,,.and Vn as shown in Fig. 7.51. We select i 1(1) and vi(t) as the sw itc h ne twork
ww
independent inpu ts, as in Section 7.4. 1. l11e average va lues of v 1(1) and v2(!) can be found as follows:
(7.152 )
w.E
asy (7 .153)
En
ex t, we proceed to eliminate (iLl(I)),. , (il2(t)>r,•(vc 1(1)),., and (vc.( 1))7,, to w ri te the above eq uat io ns in
term s o f the averaged independ e nt te rmin a l curr e nts an d vol tages of th e sw it c h n etwork. By co mbin ing
gin
Eqs. (7. 152) an d (7 .153) , we obta in :
(7. 154)
Sin ce the c urre nt wavefo rm s are the sam e as in Fig. 7 .38, Eq. (7. l 34) ca n be used here:
eer
ing (7.155)
.ne
(v1(t))T
•• • •• ••• ·•••••••• • ••Jl ·•hOo .... ..• .. ••••••• •• -• -•• • •-•••• ,, ..... , .,._,,,
t
0 ---- ------- -- -
0 Fig, 7.51 The switch netwol'k termina l volt-
ages v1(t) and v2(t) for the case when the transis-
tor on-resistaitce is R0 ,. and the diod e forward
/vC I + vCl - Ro,,(iu + iu) voltage drop is V1y
V r--
( V2(1) )T2
........................... .........·-······--····- . , ............
0 1------- -~
._1--_i fi:======
:!---
0 <ff, ,_ VD T, t

7.4 Cirl'llit Averaging and A,,eraged Switch Modeling 243
(i2(t)) ,
s
+ +
ww
Fig. 7.52 Large-sign11Iaveraged switch model for the general two-switch network of Fig. 7.50. Th is model
includes conduction losses due to the transistor on-res istance R011 and the diode forward voltage drop V0 .
w.E
Substit ution of Eqs. (7.154) an d (7. 155) into Eq. (7.15 2) res ults in :
(7. 156)
asy
Equ atio n (7 .156) ca n be solve d for th e vo ltage (v 1(t)\ , :
En (7.157)
gin
The ex pr ess ion fo r th e averaged curren t (ii(t)),;. is given by Eq. (7. 137) der ived in Sectio n 7.4 .2:
' )
( li{I) T,
d'(t ) ( . )
=d(/) lr(t) T,
eer (7.158)
ing
Equ at ions (7. 157) and (7. 158) co n stitute the averaged ter min al relatio ns of the swi tc h ne twork . An eq u iv -
ale nt c irc ui t correspo nding to these re lat io nships is show n in Fig. 7.52. The generators tha t depend on th e
tra n sistor d uty cy cl e d(t) are co mb ined into an idea l tra nsfo rm er wi th the turns ratio a (t):d(t). T his pa rt
o f the mode l is th e same as in the averaged swi tch model derived ea rl ier for the sw itch networ k w ith
.ne
idea l sw itches. The ele ments Rm/d an d VD mode l the co nduc tio n losses in th e swi tch network . Thi s is a
large -signal, non linear mode l. lf desired, this mo del can be pert urbe d and linea rized in the usual manner,
to obtai n a s ma ll-s igna l ac sw itch mode l.
Th e mode l of Fig. 7.52 is also we ll sui ted for com puter simula tio ns. As an examp le of this
app lica tio n , co nsider the buck -boos t co nverte r in Fig 7.53(a). In th is converter, the transistor o n-res is- t
ta nce is R00 ==50 mQ, whi le the dio de fo rward vo ltage drop is V0 = 0.8 V. Res istor RL ==100 m.Q mode ls
th e copper loss of the ind uctor. A ll ot her losses are neglec ted. Figure 7 .53( b) shows the averaged circ uit
mo de l of the converter obt a ined by rep lacing the sw itc h network with the averaged sw itch mode l of
Fig. 7.52 .
Let ' s investigate how the co nve rter output vol tage reac hes its steady -state val ue, starti ng fro m
zero in itia l co ndit io ns. A tra ns ient si mu la ti o n can be used to ge nera te co nverter wavefo rms d u r ing th e
start -up tra nsien t. It is inst ru c ti ve to co mp are the res ponses obtained by s im ul at io n of the conve rter
swi tc h ing ci rcui t show n in Fig. 7.53(a) agai nst the responses obt ain ed by sim ulation of th e averaged ci r-
c uit mo del shown in Fig. 7.53(b) . De tai ls of how these s imulatio ns are performed ca n be fo un d in
Appe ndix B. I. Figure 7.54 shows the start -up trans ien t wavefo rms of the inducto r current and the output
vo ltage . [n the wavefor ms ob taine d by s imu lat ion of th e avera ged circuit model, the switching ripp le is
remove d , b ut other featu res of the conver te r transient responses match very c losely the respo nses

244 AC Equivale111
Circuit Modeli11g
(a) ii Switch nel\\lork i2

+
"1 ~ "2
+
+
i(I)
C1 R
v, 0.10 RL v(I)
15 V
+
50µF 20 Q
ww L1 15µH
w.E
(b)
asy
(i1(t))r,
+
(i-i(1)}r,
(v 1(t))r,
En (v2(/))r,
gin +
+
eer
c1 R
vg (v(t))r,
15V + SOµF 200
ing
.ne
}'lg. 7.53 Buck-boost converter example: (a) converter t:ircuit: (b) averaged circuit model of the converter.
obtained fro m the swi tching c ircuit. Simu lations of averaged c ircui t mode ls can be used to predict co n- t
verter steady -state and dynam ic responses , as we ll as conve rter losses and e ffi ciency.
7.4.6 Example: Averaged Switch Modeling of Switching Losses
Switching losses can also be modeled via averaged sw itch modeling. As an example , consider ag ain the
CCM buck co nverter of Fig. 7.48(a). Let us suppose th at the tra nsis tor is ideal, and that the diode exh ibits
reverse recovery described in Section 4.3.2. The simpli fied sw itch wavefo rm s are shown in Fig. 7.55. Ini -
tia lly , the diode cond ucts the in d uctor current and the tra nsisto r is in the off state . When the tra nsistor
turns on, a nega tive current flows throug h the diode so that the trans istor cu rr en t i 1 exceeds the ind uc tor
curr ent. The time it takes to remove the charge Q, stored with in the diode is the reve rse recovery t im e t,.

7.4 CircuitAveraging and Averaged SwitchMo,leling 245
i(t)
60A Waveform obtained by simulation
of the averaged model
50 A
Waveform ob tained by simu lation
40A of the switching circuit model
30A
20A
I0A
ww 0 0.2ms 0.4 ms 0 .6ms 0.8 ms I ms 1.2 ms
w.E
v(r)
I0V
Waveform obtai ned by simulation
0 of the averaged mode l
-I0V
-20V
-30V
asy Waveform obtained by simulation
of the switching circuit model
-40V
-50V
En
gin
-60 v+ ---....-- --.-----,--- ----,-----,---- -,
0 0.2ms 0.4 ms 0.6ms 0.8 ms I ms 1.2 ms
t
eer
Fig. 7.54 Wuvefnrms obtained by simulation of the switching converter circuit shmvn in Fig. 7.53(a) and by
,imulation uf the averaged circuit model of Fig. 7.53(b)
ing
.ne
~
i2
0
Fi~. 7.55 Switch waveforms, buck
t
converter switching loss exam ple.

:
i
vi(t)
", v,
0
,, :
dT,
I0
!
f, 0 [.
T,

l : d(t )
+ +
Q,
Ts
ww
F1g. 7.56 Large-signal avcr:iged switch model for the buck converter switching loss example .
w.E
It is assum ed that the diode is "s nappy," so th at the vo ltage dro p across th e diode re main s small dur ing
the reverse recove ry tim e. After the dio de reverse recove ry is comp lete d, the diode tu rns off, and the volt -
age v, across the diode qui ckly j ump s to the in pu t voltage v 1 = v~. For thi s simpl e examp le, co ndu ct io n
losses and other sw it c hin g losses are neglecte d .
asy
Let us selec t v 1(1) and ii(l) as the indepe nde nt te rm ina l var iables of the two -port switc h ne two rk ,
and derive express ions for the avera ged de pendent term ina l wavefo rm s (i 1(t)) 7, and (112(t))7, The ave rage
val ue of i 1(t) is equ al to the area und er the i 1(1)wavefor m, div ided by the swi tch in g period T,:
En
gin (7. 159)
eer
The quantit y d(t) is the e ffec tive tran sistor d uty cycle, de fined in Fig. 7.55 as the tran sisto r on-tim e m inus
the reverse recovery tim e, divided by the sw itc hin g period . The average val ue of v2(1) is eq ual to:
ing (7,160)
.ne
Equ ations (7. 159) and (7.160) co nstitute the averaged ter min al relat ions of the sw it ch net wo rk. An equi v-
;tlent ci rcuit correspondi ng to these re lat ion shi ps is co nstructed in Fig. 7.56. Th e generators that depe nd
on the effe cti ve tran sis tor du ty c ycle d (t) are co mb ined into an idea l tran sfo rm er. To comp lete th e model ,
the recov ered charge Q, and the reverse recovery ti me I, ca n be exp resse d as fun ctions of the curr ent
(ii(t)\, [20). Th is is a large -sig nal averaged sw itc h mode l, whi ch acco unt s for the sw itchi ng loss of the
ideali ze d wavefo rm s ofFi g. 7.55. If desired, this mode l ca n be pert urb ed and linea r ized in the usual man -
t
ner , to obtain a sm all-signal ac sw itch model.

The model of Fig. 7.56 has the fo llowi ng phys ica l interpreta ti on . The trans isto r opera tes wi th
the effective du ty cyc le d(t). Th is is the turns ratio of th e ideal de tra nsfo rm er , whi ch models the first -
order switch pro perty of lossless tran sfer of power fro m the sw itch input to the sw itch ou tput port. The
addit io na l c urr ent ge nerators model the switc hin g loss . ote th at both ge nerator s cons ume powe r. The
tota l sw it c h ing loss is:
(7. 161)
These genera tors also correctly model how the sw itc hin g loss increa ses the average sw itch inp ut curre nt.

7.5 The Canonical Cirrnit Model 241
, •u •••• u .. •.•• • ••·• •••• 0£,......... • •• •..•..•u••• -•• • o.-• ..••• ..•- ..• •••u .00000.o•u o.0000 0
1 I :Dr-_ i L I....
1 i ___
...... ..... -...,__ .,.... __ ..,
+ + +
Q, !I V2 C
...L R V
T,
! ~
!: - !,
,....................Averaged switch .mod el................!
ww
Fig. 7.57 De equivalent circuit nllJdel,buck c{Jnverter,witching loss example.
w.E
By inserting the switc h model of Fig . 7.56 into the origina l converter circuit of Fig. 7.48 (a), and by let-
ting all wavefonns be equal to their quiescent vitlues , we obtain the steady-state model of Fig. 7 .57. This
model predicts that the steady -state output vo ltage is:
asy (7.162)
En
To find the efficiency, we must compute the average input and output powers. The converter input power
IS
gin (7.163)
The average output power is

eer
Hence th e converter efficiency is ing (7.164)
.ne
(7. 165)
Beware , the efficiency is not simp ly equal to VIDV11• t

7.5 THE CANONICAL CIRC IT MODEL
Hav in g discussed severa l methods for deriving the ac eq uivalent circuit models of sw itchi ng converters ,
let us now pause to interpret the result s. All PWM CCM de- de converters perform si milar basi c func -
tions. First, they tran sfo rm the voltage and current levels, ideall y with 100% efficien cy . Second, they
contai n low-pass filtering of the waveforms . Whi le neces siu·y to remove the high -frequency swi tchin g
ripple, this filtering also influences low -frequency voltage and current variations . Third , the converter
waveforms can be contro lled by v,u-iation of the dut y cycle.
We expect that convert ers havin g si mi lar phys ic al properties shou ld ha ve qual itatively sim ilar
eq uivalent circuit models . Hence , we ca n define a canoni cal circuit model that correct ly accounts for all

of these basic properties [1-3]. The ac equi vale nt c ircu it of any CCM PWM de-de co nverter can be
ma nipulated into th is canonical for m. Th is allows us to ex tract physica l ins ight , and to compare the ac
pro perties of co nverters . The ca no nica l model is used in several later chapte rs, where it is des ired to ana-
lyze co nverter phenomena in a general manner, w ith out refere nce to a spec ifi c co nverter. So the cano ni-
cal model allows us to defin e and discuss the phys ical ac prope rties of co nve rters.
In this sec tion, the ca nonica l ci rcui t model is develope d, based on physica l argum ents . An
exa mp le is give n wh ich illustrates how to manip ulate a co nverter eq ui vale nt c ircuit into ca nonic al for m .
Fina lly, the paramete rs of the ca nonica l model are tab ulated for severa l bas ic ideal converte rs.
ww
7.5.1 Development of the Canonical Circuit Model
The phys ical ele ments of the ca non ical c ircuit mode l are collec ted, one at a time, in Fig. 7.58.
w.E
The converte r co ntai ns a power in put por t 11g<t) and a co ntrol input port d(t), as well as a powe r ou tput
po rt and load hav ing volt age v(t). As di scusse d in Ch apter 3, the basic func ti o n of any CCM PWMdc--dc
co nverter is the conve rsion of de voltage and curre nt levels, ideally w ith 100% effi cie ncy . As ill ustra ted
asy
in Fig. 7.58(a), we have modeled th is pro perty with an idea l de transfo rmer, havi ng effec tive turns rat io
I :M(D) where M is the co nversio n ratio . This co nver sio n ratio is a fu nct ion of the quiescen t dut y cycle D.
As discussed in Chapter 3, th is model ca n be refi ned, if des ired, by addi ti on of resistors and other ele -
ments th at model the converter losses.
En
Slow var iatio ns v.,(t) in the powe r inpu t indu ce ac var iatio ns v(t ) in the converter o utput voltage .
As illu stra ted in Fig. 7.58(b) , we expect these var iati ons also to be tra nsfo rm ed by the co nversio n ratio
M(D).
gin
The co nverter must also co nta in reac tive ele ments tha t filter the swi tc h ing har monics and tra ns-
eer
fer energy betwee n the powe r in pu t and powe r output port s. S ince it is desi red that the outp ut switch ing
ripp le be small , the reactive ele ments shou ld co mp rise a low-pass fil ter h avi ng a cutoff fre qu ency we ll
below the swi tc hing freq uency. Th is low-pass characterist ic also affects how ac li ne vol tage variat ions
ing
in fl uence the out put voltage. So the model should co ntai n an effec tive lo w-pass fi lt er as illus tra ted in Fig.
7.58(c). Thi s figure pr ed icts that the lin e-to -output tran sfe r function is
ii(s)
G,..(s) =_ - =M (D) H ,(s)
.ne
(7, 166 )
. v,(.l')
where H.(s ) is the tran sfe r fu nc tion of the effec tive low-pass fi lter loaded by resis tance R. Wh e n the load
is nonlinea r, R is the incre menta l load resis tance, ev aluated at the qu iesce nt opera ting poi nt. The e ffective
filter also influences other propert ies of the converter, such as the small -sig nal inpu t an d out put imped -
ances. It should be noted that the ele menta l val ues in the effect ive low -pa ss fi lter do no t necessa rily coin -
t
cide with the physica l ele ment val ues in the co nverte r. In ge neral, the e leme nt values, transfer functio n,
an d term in al impeda nces of the effect ive low -pass filter ca n vary wi th q uiesce nt operating po int . Exam-
ples are given in the follow ing sub sec tions.
Control input v,u iations, specifically , dut y cy cle varia ti ons J (t), also induce ac varia tio ns in the
co nverter vo ltages and currents. Hence, the model should co ntai n vol tage and curr en t sources driven by
d(t ). In the exa mp les of the previo us sec tion, we have seen th at both vo ltage sources and curre nt sources
appear , wh ich are distr ibuted aro und the ci rcuit model. It is po ssible to mani pulate the model suc h that all
o f the d(t) sources are pushed to the input side of the eq u ivale nt circ ui t. In the process , the sources may
beco me freq uency -de pendent; an exa mple is given in the nex t subsec t io n. In genera l, the sources ca n be
co mbined into a single vol tage source e(s)£l(s) and a single cu rre nt so urce j (s)d(s) as show n in

7.5 The Cano11icalCircuit Model 249
C,mven~r model
(a) (b)
I : M(D) l:M( D)
+ +
v, V R v,+v,(s ) + V+ v(s) R
ww Power
htpur
D
Con1ro/
i,tput
Load Power
input
Comrol
D
inpvt
load
(c)
w.E I : M(D) -------.. H, (s)
V, + O,(s) + asy Z,;(s) Effect ive

z,.(s)
+
V + •(s)
En
/ow-pau R
filter
gin
Power
i11p11t
D
Control
i11put eer load
(d) ' ! ing

H, (s) I
.ne
e(s)d(s)
-------.. i
,----l 1--- ...... --~
+
Z,1(1)
Effect ive
low-pass
Jilt er
-z,.(s)
V + v(s) R
t
k
D+J(s )
Power Co11trol Load
illput input
Fig. 7.58 Developme nt of the canon ical circ uic mo<lcl, based on physical argumen ts: (a) de cransformcr model,
(b) im:lu~ion of ac varimions, (c) reactive ek ments introduce dfcclive Jnw-pass filter, (d} inclusio n of ac dmy cycle
variations .

250 AC Equimlent Circuit Modeling
Fig. 7.58(d) . This model predicts that the small -s igna l control -to -ou tpu t transfer func t ion is
v(s) (7.167)
G,.<1(s)= J<,i) "'e(s)M(D ) H ,(.-)
Thi s transfer function is found by sett ing th e i\/1-J

variatio ns to zero , and solv in g for the depen dence of
v(s) on cl(s). Fig ure 7.58(d) is the complete canon ica l c ircuit, wh ich ca n model an y PWM CCM de- de
conve rter.
ww
7.5.2 Example: Manipulation of the Buck-Boost Converter Model into Canonical Form
To illus tra te the steps in the deriva tio n of the canonica l circu it model, let us manipulate the eq ui vale nt
w.E
ci rcuit o f th e buck -boost co nverter into ca non ical for m. A sm a ll -signa l ac eq uiv alent c irc u it for the bu c k-
boost converter is der ived in Section 7 .2. The resu lt, Fig. 7. 16(b ), is repro du ced in Fig. 7 .59. To manipu -
late this network int o canonica l form , it is necessary to push all of the in d epe ndent d(t) generators to the
asy
left, whi le push in g the indu ctor to the righ t and combin in g the transformers.
The (V~ - V) J (l) voltage source is in ser ies with the inductor, and hence the pos it ions of these
two elements can be in terchanged . In Fig. 7 .60(a), the vol tage source is p laced on the pr imary side of th e
En
I :D ideal tra nsfo rm er; this requ ire s d i vid in g by the effective turns rati o D. The o u tput - side / d(I) c urren t
source has also been moved to the pr imary side of the O': I tran sforme r. Th is requi res m ul t ip ly in g by the
turn s ratio 1/D'. The po lari ty is also reversed , in accor dance w ith th e pola rities of the D': I tran sfo rm er
windings .
gin
Next , we need to move the t J(ly D cu rrent source to the lef t of the in du ctor. Thi s can be done
eer
us in g the arti fice illus trate d in Fig. 7.60(b). The ground connec tion of the curren t source is broken, and
the source is co nnec ted to node A instead. A second, id ent ic a l, current source is con nected from node A
to gro un d. The second source ca uses the current flow ing into node A to be un c h anged , suc h tha t th e node
equati ons of Figs. 7.60(a) and 7.60 (b) are ident ical.
ing
In Fig. 7 .60(c), the parallel co mb ination of the inductor and current source is converted in to
Thevenin equiva lent form. The series comb ination of an induc tor and voltage source are obt a ine d.
.ne
In Fig . 7 .60(d), the !d(t)/LJ c urrent sourc e is pushed to the pr i mary side of the I :D tr ansfo rm er.
The magnitude of the curre nt source is mult iplied by the tu rn s ra ti o D. In addition , the c urrent so urce is
pushed through the( \/~ - V)d({JID voltage source , using the prev ious ly descr ibed ar ti fice. The groun d
connect ion of th e source is mo ved to node B, and an identica l source is co nnecte d from node B to grou nd
such that the ci rcu it node equat ions are unchanged .
t
( V1 - V)J(r)
l
C V + v(~) R
Fig, 7.59 Sma ll- signa l ac mo<lel of the buck -boo, t<:onvcrtcr. be fore mariipulal io n into ca nunirn l form.

7.5 The Canonical Cirrnit Model 251
(a)
V + v(s) R
ww
(b) v, - v •
w.E ~d L
Jd( t)
asy V + ii(s) R
En
gin
(c)
sll
D' d
•
L
eer
C ing +
v + v(s) R
.ne
(d) V1 -V J
t
D l
C V + v(s) R
Fig. 7.60 Steps in the mnnipulmionof the buck-boost uc mode! in!o canonical form.

252 AC Eq11ivale111
CircuirModeling
:
i
I +
v, + vg(s) v + v(s) R
ww Effective
low-pass
.....
......~!.~~~·
·-······
·.!
,.
1
w.E
Fig. 7.61 The buck-hoost convener model, in canonical form.
asy
Figure 7.61 is the fina l form of the model. The induc tor is moved to the secondary side of the
D'; 1 t:ransfo nn er, by multip ly in g by the square of the turn s rat io as shown. The sU J(t)/D' vo ltage source
is moved to the prim ary side of the 1 :D transformer , by divi di ng by the tu rns ratio D. The voltage and
En
curren t sources are co mbined as show n, and the two tran sfo rme rs are co mb ined int o a single D':D trans-
former. The circuit is now in canonica l form.
gin
It can be seen that the in ductance of the effec ti ve low -pass filter is not simp ly equa l to the phys-
ical indu ctor value L , but rather is equ al to UD' 2• At d ifferen t qui escent opera ting poi nts, wit h di fferent
values of D', the value of the effec tive inductance wi ll change. [n consequence, the transfer function,
eer
input impedance , and outp ut impedance of the e ffecti ve low-pass filt er w ill also vary with quiescent
operat ing point. The reason for thi s variation is the tra nsfo rm ation of the indu c tance va lue by the effec -
tive D' : l transfor mer.
ing
It can also be seen from Fig. 7.6 1 that the coefficient of the d(t) voltage generator is
(7.168)
.ne
This express ion can be simplifie d by subs tit ut ion of the de rela tionships (7.29) . The resu lt is
V (J -.< -D'DL)
e(.<) = - - ,
D·
2-
R
(7.169)
t
When we pushed the outp ut -side ld(t) current source through the inductor , we obta ined a vo ltage source
hav ing a frequency dependence. In conseque nce , the e(.v)J volta ge gener ator is frequenc y-depe ndent.
7.5.3 Canonical Circuit Parameter Values for Some Common Converters
For ideal CCM PWM de- de converters conta ining a sing le inductor and capacito r, the effect ive low-pass
filter of the cano nic al model shou ld conta in a single inductor and a sin gle capacitor. The ca nonical model
then reduces to th e circuit of Fig. 7.62. It is assume d that the capac itor is con nected direct ly across the
load. The parameter val ues for the basic buck, boost, and buck-boos t converters are collected in Table
7.1. Aga in, it shou ld be poin ted out th at the effec tive inductance L, depends not only on the phys ical

7.6 Modeling the Pulse-WidthModulwor 253
e(s)J(s)
v. + v,(s) j(s)a(s) C v + v(s) R
ww
Fig. 7.62 The canoflical model, for ideal CCM converlers containing a ~i11gle inductor 11mlcapaciror.
w.E
Table7.J Cano nical model parameters for the ideal buck, boost ,mdbuck- boost conve11ers
Conve rter
asy
M(D) l, e(s) j (s)
En
Buck D l V V
D2 R
Boost I
D'
l
D'i
giv(1n--2L) D' 2R
V
lY 2R
Buck-boos t D _!,,_
eer
V ( I sDl ) V
i
- lY D'2 - D2 - D'2 R - D'2R
ng
.ne
inducto r value L, but also on the quiescent duty cycle D. Furthermore, the curren t flowin g in the effec tive
inductance Le does not in genera l coinc ide wi th the phys ical inductor current / + [(!).
The mode l of Fig. 7.62 can be solved using conventional linea r circuit ana lysis , to find qua nti -
ties of interes t such as the converter transfer funct ions , inpu t imp edance, and ou tput impeda nce . Trans -
former isolated versions of the buck , boost, and buck -boost converters, such as the full bridge , forward ,
and f1yback converters , can also be mode led us ing the equ ivalent c ircuit of Fig. 7.62 and the par ameters
t
of Table 7. 1, provided that one correct ly accounts for the transformer turns rat io.
7.6 MODELING THE PULSE-WIDTH MODULATOR
We have now achieved the goal , stated at the beg inn ing of this chapter , of deriving a useful equ ivalent
circ uit model for the sw itchi ng converter in Fig . 7 . I . One detail rem ains: modeling the pulse -wid th mod -
ulator. The pulse -width modu lator block shown in Fig. 7. 1 produces a logic signa l o(t) that commands
the converter power transistor to switch on and off. TI1e logic signal 0(1) is period ic, with frequenc y /, and
duty cycle d(t). The input to the pu lse-width modulator is an analo g co ntrol si gna l v0 (r). The fun ction of
the pulse-wid th modulator is to produ ce a duty cycl e d(r) that is proportional to the analo g contro l vo lt-

254 AC Eq11ival
e11ICircuit Modeling
Saw too th
wave
genera tor
Compa ra to r
6(t )
A nal og
PWM
ww
inp rtt
wa vef o rm
vc(t ) o-----'
w.E
Fig. 7.63
age v,.(t).
A simple pulse-width rnodulmor circuit.
asy
A sche matic diagram of a sim p le pu lse -widt h mod ulator c irc uit is g ive n in Fig. 7.63. A saw-
too th wa ve ge nerato r produ ces the vo ltage waveform v.1..,,..(t) illustrate d in Fig. 7.64. The pea k-to- peak
amp litud e of this wa vefo rm is V,w,Th e co nverte r sw itching frequency f.. is deter mined by and e qu al to th e
En
freque ncy of v...a) t). An analog co mparator compa res the analog co ntrol voltage vJ t) to v,m,(t). Thi s
comparato r prod uces a log ic-level o utput wh ich is hi gh whenever vc(t) is greate r than v",.,(C),and is oth-
erwise low. Typi cal waveforms are ill ustrated in Fig. 7.64.
gin
If the sawtoo th wavefor m v,,,./f) has min i mu m val ue zero, th en th e du ty cycle wi ll be zero
wheneve r v,.(t) is less th an or equal to zero. The duty cy cl e wi ll be D = I whenever v..(1) is grea ter than or
eer
equ al to V,11' If, ove r a give n sw itch ing period, v.mw(t)varies linearly with t, th en for O 5 vc<t) :S VM the
du ty cycl ed wi ll be a linear func tio n of vc. Hence, we ca n write
I( ) -
t t -
JJI )
VM for O :S vj{) ::SVM
ing (7. 170)
.ne
VM ................._....._........
t
600
1~
- ~~~
!
t.
0 dT, T, 2T,
'
F ig. 7.64 Wavcfo1m s o!th e circuit of Fig. 7.63.

7.6 Modeling the P11/,e-ll'idth Modulator 255
V, + O,(s) I D + d (s)
VM
Pulse-width
modula tor
Fig. 7.65 Pulsc-widlh modLilatorblock diagram.
ww
Thi s equati on is the input -ou tpu t c harac teristic of the pul se -width m o dul ator [2, 11].
w.E
To be co nsiste nt wit h the pertur be d -and -lin ea rized co nverter models of the previo us sec tions,
we ca n pe rtu rb Eq. (7. 170). Let
v, (I) = V0 + Oc(t)
asy
(7.171)
d(t) = D +d(I)
In sertio n o f Eq. (7. 171) int o Eq. (7. 170 ) lead s to
En (7.172)
gin
A block dia,gram represe nt ing Eq. (7. 172) is illus tra ted in Fig. 7.65. The pul se -wid th mod ulator has lin-
eer
ear ga in 1/V,w By eq uat ing like tenn s on both sides ofE q. (7. 172) , one obtai ns
ing (7.l73)
.ne
So the qui esce nt va lue of th e du ty cycle is determine d in prac tice by V,..

The pul se -wid th modul ato r model of Fig. 7.65 is su ffic ie ntly accura te for near ly all applica-
t
ti o ns. Howeve r, it shoul d be po inted out tha t pulse -wi dth modul ators also int rod uce samp ling of the
wavefor m . Alt ho ugh the analog in p u t sig nal 11, {/) is a co nt in uo us fun c ti on of time, there can be o nl y one
discrete va lue of the du ty cycle durin g every swi tchin g period. The refore, the pulse-width mod ulator
samp les the wavefor m, wi th sa mp li ng rate eq ual to th e sw itc h ing freq ue ncy J;.Hence, a more acc urate
mod ul ator bloc k di agra m is as in Fig. 7 .66 [10]. In pract ice, thi s sa mp ling restr icts th e u seful freque nc ies
of the ac var iati ons to values muc h less th a n the switc hi ng freq ue ncy . TI1e des igner mus t e nsure th at the
bandwidth of the control system be su fficie nt ly less than the Nyqu ist rate f/ 2.
Si gnifica nt hi gh -frequency varia t ions in the co ntro l sig nal vJt ) ca n a lso alter the beha vior o f the
pu lse -w idt h modu lato r. A co m mon examp le is whe n v,.(I) co nt ain s sw itc h in g ripp le , introduced by the
feedb ack loop. Th is phenomenon has been analyzed by several authors [ 10, 19], and effec ts of inducto r
curr en t ri pple on th e transfe r fun ct ions of cur rent -prog ram med conve rters are inves ti gated in Chap ter 12.
Bu t it is ge nera lly best to avo id the case whe re vJ t) co nt ains signi fican t co mponents at the switch ing fre -
quency or higher, since the pulse -width modulato rs of such systems ex hibit poor noise immu nity .

256 AC Equivalelll Circuit Modeling
_v c__ 1 ~ *
.... ....i1 S1/
"! d
~
; Pulse-wid th modulator
=--•••••-••••
.. ·•H•••• ·.. ••••~••••••• ·• • ••• •• • ···-· · · .. ·····-··· ··· · .. j
ww
Fi~. 7,M I\. more accurat,.; pul~e-width modulator model, inc luding ~amp ling .
7.7
w.E SUMMARY OF KEY POINTS
asy
1. The CCM conve n er a nalyt ica l techniques or Chapt ers 2 and 3 can be extended to predict conve rter ac
behavio r. The key step is to average the conv er ter wavefor ms over one sw itc hing period. This remo ves the
sw itch in g har monics, th ereby exposing d irectly the desired de and low-freque ncy ac components of the
waveforms. In particular , express ions for the averaged inductor voltages, capacitor curren ts, and conver ter
2.
input cur rent are usually found.
En
Since sw itchi ng conve11ers are nonlinear systems, it is desirable to co nstruct smal l- signal linea ri zed mod-
gin
els. T his is accomp lished by pe rtur bin g a nd linearizi ng the a\•eraged model abou t a quiescen t opera ting
point.
eer
3. Ac equival ent c ircu it s can be cons tructe d , in the same manner used in Chap ter 3 to construc t de eq ui vale nt
circu its. Ir desired, the ac eq ui vale nt c irc uit s may be refined lo account for the effec ts of co nverter losses
and other nonidealities.
4. The stale-space averagi ng method or Section 7.3 is essen ti ally the same as the basic approa ch of Section
7.2, except th at the for mal ity of the state-space ne twork description is used. The general res ult s are listed
in Section 7.3.2. ing
.ne
5. The circu it averag ing technique also yiel ds eq uiva len t results , but the deri\ •ation in volves manipu lation of
circ uits ra ther than eq uatio ns. Swi tching eleme nts are replaced by dependen t voltage and c urrent sources ,
6.
whose waveforms are de fined to be iden ti cal to the sw itch wavefo rms of the actua l circuit. This leads to a
circ uit ha ving a time -invaria nt topology. The wavefor ms are then averaged to remove the sw it c hin g ri pple ,
and perturbed and linearized about a quiescen t operat ing point to ob tain a sma ll-sig nal mode l.
When the switches are the on ly ti me-vary ing elements in the converter , then circu it averagi ng affec ts only
t
the swi tch network. 11Je co nverter model can then be der ived by si mp ly rep lac ing the switc h network wi th
its averaged model. De and sma ll -sig nal ac models or severa l common CC I swi tch netwo rks are listed in
Sect ion 7.4.4. Condu ction and swi tching losses can a lso be modeled using this approach.
7, T he canon ical circuit describes the basi c properties sha red by all dc-<lc PWM co nverters operating in the
cont inuous co ndu cti on mode. At the hear t of th e model is the ideal I :M(D) transformer , intro duced in
Chapter 3 to rep rese nt the basic dc-<lc conversio n fun ctio n, and generalized here to include ac varia tions.
The conver ter reac tive e leme nt s int roduce an effec tiv e low-pass filter in to the network. The model also
inc ludes independent sources tha t represen t the effec t of dut y cycle var iat ions. The para meter values in the
canonica l models or severa l basic converters are tab ulated for easy refere nce.
8. The co nvent iona l pu lse -wid th modul ator circu it has line ar gain , depe nde nt on the slope of the sawtoo th
waveform , or eq uivale nt ly on its peak-to-peak magn itud e .

References 257
R EFERENCES
[ I] R. D. MIDDLEBROOKand SLOBODANCuK,"A Ge neral Unifi ed Approach 10 Mod e ling Swi tchi ng-Con-
verter Power Stages," International Journal of Electronics, Vol. 42 , o. 6, pp . 52 1-5S0, June 1977.
[2] SLOBODANC!JK , "Mo delin g, Ana lysis , and Design of Switchin g Converte rs," Ph .D. th es is, Cal iforn ia
Inslitu1e of Tech nology, Nove mber 1976.
[3] R. D . MIDDLEBROOK AND SLOBODAN CIJK, " Mo delin g and Ana lys is Me th ods fo r De- lo-De Swi tching
Converters," Proceedings of the IEEE lntemational Semiconductor Power Converter C01ifere11ce, 1977
ww
Record , pp. 90 -111 , March 1977. Repri n1ed in Adwmces in Switched -Mode Power Conversion, Vol. I, Irv-
ine: Tes laco, 1983.
[4] G. W. WESTERand R. D. MIDDLEBROOK," Low-Frequency Charact erization of Sw itched De-De Conv e rt-
[5] w.E
ers," IEEE Transactions an Aerospace and Electronic Systems, Vol. AES-9, pp. 376-385, May 1973.
ELL, De-De Switching Regulator Analysis, New York: McGraw-Hill , 1988 .

DANIEL M. MITCH
[6]
asy
SETH R. SANDERSand GEORGE C. VERGESE, " Synthes is o f Avera ged Ci rcu il Models for Switched Powe r
Converters ," IEEE Transactions 011 Circuits cmd Systems, Vo l. 38, o. 8, pp. 905-91S, Augus t 1991.
[7] P. T. KREIN, J. BENTSMAN
En
, R. M. BASS, and B. C. LESIEUTRE , "On the Use of Averagi ng for the Analysi s
of Power Electronic Systems ," IEEE Transactiom· 0 11 Power Electronics, Vol. 5, No. 2, pp . 182-190 , Apri l
1990.
[8]
gin
B. LEHMANand R. M. BASS, "Switch ing Frequency Depe ndent Averaged Mode ls for PWM DC-DC Con-
verters ," IEEE Transac tions on Power Electronics, Vol . 11, No. I, pp. 89-98, Janu ary 1996.
[9]
Conference, 1998 Record, pp. 630-632, May 1998. eer
R. M. BASSand J. SuN, "Averag ing Un der Lar ge-Ripp le Condi tion s," IEEE Power Electronics Sp ecialists
[IO] ARTHUR R . BROWNand R. D. M IDDLEBROOK,

ing
"Sampled-Data Mode ling of Sw itching Regula 1ors," IEEE
Powe r Electroni cs Specia lists Conference, 198 1 Reco rd, pp. 349-369 , June 1981.
.ne
[I I] R. D. MIDDLEBROOK,"Predict ing Mod ulator Pha e Lag in PWM Conv erler Feedba ck Lo ops," Proceed-
ings of the Eighth National Solid-State Power Conversion Conference (Powercon 8), Apr il 1981.
(12] , R. REDL,ANDN. SOKAL, Dynamic Anal ysis of Switchin g -Mode DC/DC Converters, New
A. KISLOVSKI
York: Van os1rand Reinhold , 1994. t
[13] R . T YMERSK I and V . VORPERIAN

, "Gen era tion, Classifica1 ion and An alysis of Swi1ched-Mod e DC -10-DC
Con ve 1ter s by the se of Conv erte r Cells," Procee dings of the I 986 Interna tional Telecomnumi cations
Energy Conference (TNTELEC'86 ), pp. 181-195, Oclober 1986.
[14] V. VORPERIAN, R. TYMERSK I, and F. C. LEE, " Equiva lent Circui t Mod e ls for Resonant and PWM
Switches ," IEEE Transactions on Power Electronics, Vol. 4, o. 2, pp. 20S-214, Apri l 1989.
[15) V. VoRPERIAN, "Simp lified Analysis of PWM Conv erte rs Usi ng the Mode l of the PWM Switch : Parts I
and II," IEEE Transactions 011 Aerospace and Electronic Systems , Vo l. AES-26 , pp. 490-50S, May 1990 .
(16) 5. FREELANDa nd R . D. MIDDLEBROOK , "A Un ified Analysis o f Converters wit h Resonant Switc hes, "
IEEE Power Electronics Specialists Conference, 1987 Reco rd , pp . 20-30.

258 AC Eq11i
va/e111
Circuit Modeling
[ 17] ARTHUR W ITULSKI and ROBERT ERICKSON,"Exle nsio n of Stale -Space Averagin g to Res ona lll Sw itc hes
- and Beyo nd ," IEEE Transactions on Power Electronics, Vol. 5, No , 1, pp. 98 -109, January 1990 .
[18) D. MAKSlMOVIC and S. CUK, " A nif ied Ana lysis o f PWM Conve rters in D isco ntinuous Modes ," IEEE
Transactions 011Power Electro11i
cs, Vol. 6, o. 3, pp. 476-490 , July 1991.
[19) D . J. SHORTTand F. C. LEE, "Exten sions of the Discrete -Av erage Mo dels for Convert er Power Stages, "
IEEE Power Electro11ics Specialists Co11fe
re11ce
, 1983 Reco rd, pp . 23 -37, Jun e 1983.
(20] 0 . A L-NASEEM and R.W . ERICKSON," Prediction of Sw itch ing Loss Var iations by Averag ed Sw itch Mod-
ww
eli ng," IEEE App lied Power Electronics Co11fere11
ce, 2000 Reco rd, pp. 242 -24 8, Febm ary 2000.
PROBL EMS
7.1
w.E An ideal boos t converter operates in the co n tinuo us co ndu ction mode.
(a) Detem1ine the non linear averaged eq uation s of this converter.
asy
(b) ow cons tru ct a small -s igna l ac mode l. Let
( vg(t)) . ; vg+ vgtr)

1s
En d(t); D + d(t)
(iU)}
7 = I+ i(I )
gin
(v(r)) ' = V+v
7
s
(r)
eer
where V8 ,D, / , and Vare stea dy-state de value s ; ii/t ) and J(1) are sma ll ac variations in th e power and
con trol inputs; and i(t) and v(I) are the res ulting small ac variat ions in the inductor c urrent and outpu t
vol tage, respective ly. Show that the fo llow ing mode l res ult s :
Large -signa l de compo ne11/s
0=-D'V+ \18 ing

.ne
0= D'I
-*
S111all
-sig11alac componellls
L dii(r) =- D' P(t ) + Vd (I) + i!,(I)

t I
t
•
c d v{l) = D'i(r ) - I Ju) - v(t)

dt R
7.2 Co nstruc t an equiva lent circ uit that correspo nds to the boost converter small -s igna l ac equations derived
in Prob lem 7. 1(b).
7. 3 Ma nipu late yo ur boos t conve rter equivalent circ ui t of P rob le m 7.2 into can on ica l fo rm . Exp la in each
step in yo ur de rivation. Ver ify that the elements in you r ca noni cal mode l agre e w ith Table 7.1.
7.4 The idea l current -fed bridge co nverter of Fig. 2.3 1 operate s in the con tin uous co nduction mode.
(a ) Determine the nonlinear averaged equations of this con vert er.
(b) Pe rt urb and linearize these equati on s, 10 de ter mi ne th e sm all -sig nal ac equ atio ns of the con-
verter.

Problems 259
vgCt) R v(t)
ww Fig.
(c)
7,67 Inverse SEPIC, Problem 7.7 .
Cons truc t a small -signal ac equivale nt c ir cui t mode l for lh is conven er.
7.5
w.E
Construc t a complete sma ll- sig nal ac e4 uiva lent ci rc ui t model for the fly bac k converler show n in Fig.
7.18, oper ating in co nt inuou s cond uctio n mode. The transfo rm er contai ns magne tiz ing induc tance L.
refe JTed to the pr ima ry. In addi tio n, the tra nsfo rm er exh ibits sig ni fican t core loss, wh ich can be modeled
asy
by a resis tor Re:in para llel w ith the pr im ary wi ndi ng . All other elements are ideal. You may use any valid
method to solve this prob lem. Yo ur model sho uld correctly predict varia ti ons in i/t) .
7.6 Modeli ng the Cuk co nverte r. You may use an y valid melhod to solve lhis pro blem .
(a)
(b)
En
Derive the small -signal dynam ic equat ions that model the ideal Cuk co nverte r.
Cons lruc t a co mplete sma ll- signal equiv alent circu it model for the Cuk converter.
7.7
gin
Modeling the inverse-SEPIC. You may use any va lid method to solve thi s probl em.
(a) Derive the small-signal dyna mic equations tha t model the converte r shown in Fig. 7.67.
7.8
(b)
eer
Co nstruct a comp lete sm all-s ignal eq uivalen t ci rcuit mod el for th e inverse- SEPIC.
Consider the nonidea l buck co nverter of Fig. 7.68. The in pu t voltage sou rce vx<t) has in ternal resis tance
R~.Other compo nent nonideal iUes may be neglecte d.
(a)
ing
Us ing the state-space averag ing met hod, determ ine th e small -sig nal ac eq uati ons tha t desc ,; be
vari ations in i, 11,and ig, wh ich occ ur ow in g to vari at ions in the transis tor duty cycle dan d in pu t
.ne
volta ge vN.
(b) Cons truc t an ac eq ui valent c ircu it model co rrespond ing to your eq uat io ns of part (a).
(c) Solve your model to de ter mine an exp ression for the small-sig nal co ntrol- to-output tran sfe r
function.
L t
v1 (t)
T C R v{t)
Fi1-1.7.68 Nonidealbuck convertec,Probl em 7.8 .
7..9 Use the circ uit-averag ing tech nique to derive the de and s mall- s ignal ac eq uiva lent ci rcuit of the buck
conven er with inpu t filter, illu strate d in Fig. 2.32. All ele ments are ideal.

260 AC Equivalent Circuit Mode/in,~
(a)
2
vgCt)
2
(b) L
+
ww i 1(1) V1(1) C R v(I)
w.E
Fig. 7.69 Bridge invencr. Problem 7.11: (a) circuit, (b) large-signal averaged model.
asy
7.10 A llyback converter operates in Lhe continuous conduction mode. The MOSFET switch has on-re. is-
lance R,,,,•and !he secondary-side diode has a constant forward voltage drop V0 . The flyback transformer
has primary winding resistance RPand secondary winding resistance R,,·
En
(a) Derive the small-s ignal ac equations for this converter.
(b) Derive a complete small-signal ac equivalent circuit model, which is valid in the continuous con-
duction mode and which correctly models the above losses, as well as !he converter input and
7.11
output ports.
gin
Circuit averaging of the bridge inverter circuit of Fig. 7.69(a).
(a)
(b)
Fig. 7.69(b). Sketch !he waveforms i t(r) and v 1(1).
eer
Show that the converter of Fig. 7.69(a) can be written in the electrically identical form shown in
Use the circuit-averaging method to derive a large-signal averaged model for this converter.
(c)
models de and small-. ignal ac signals in the bridge inverter.
ing
Perrnrb and linearize your circuit model of part (b), to obtain a single equivalent circuit that
7.12
.ne
Use the circuit averaging method lo derive an equivalent circuit lhal model. de and small-signal ac sig-
nals in Lhe buck-boost convener. You may assume that the conven er operates in Lhecontinu ous conduc-
tion mode, and that all elements are ideal.
(a)
(b)
Give a time-invariant electrically identical circuit, in which the switching elements are replaced
by equivalent vohage and current sources. Define the waveforms of Lhe sources.
Derive a large-signal averaged model for this converter. t
(c) Perturb and linearize your circuit model of par! (b), lo obtain a single equivalent circuit that
models de and small-signal ac signals in the buck-boost converter.
7.13 The two-output 0yback converter of Fig. 7.70(a) operates in the continuous conduction mode. ll may be
assumed that the convener is lossless.
(a) Derive a small-signal ac equivalent circuit for this converter.
(h) Show that Lhe small-signal ac equivalent circuit for !his two-oulp ULconverter can be written in
the generalized canonical form of Fig. 7.70(b). Give analytical expressions for the generators
e(s) andj(s).
7.14 A pulse-width modulator circ uit is constructed in which !he sawtooth-wave generator is replaced by a
triangle-wave generator, as illustrated in Fig. 7.7 l(a). The triangle wavefonn is illustrated in Fig.
7.71(b).

Problems 261
(a)
llJlil +
f ··1
;,
L
c. v 1(1)
~,f ·+~·
v1 (t)
-f )
ww(b)
: n2
w.E
e(s)d(s)
j ,(s}
asy
En
gin
Fig.
eer
7,70 1\vo-mllplll tlyback conven er, Problem 7.13; (a) converter circui t, (h) small-signal ac
equivalent circuit
(a)
ing
Triangle
.ne
v";(t)
wave
t
generator
Comparator
6( 1)
Analog
input PWM
Fig. 7 .71 Pulse -width 111avefon
n
vc(/)
modul ator, Probl em 7.14.
(b) v,,;<t)
2V
-2V

(a) Determine the co nver ter switc hing freq ue ncy , in Hz.
(b) Dete rmine the ga in d(t)lv,.(I) for th is cir c uit.
(c) Ove r wha t range of v,. is you r answer to (b) vali d ?
7.15 Use the ave raged sw itch mo de ling tec hnique to deri ve an ac eq ui vale nt c ir cuit model for the buc k-b oos t
conver ter of Fig. 7.31:
(a) Replace the sw itches in Fig. 7.31 with the averaged sw itch model give n in Fig. 7.S0(c).
(b) Co mpare yo ur resu lt wit h the model give n in Fig . 7.16( b). Show tha t the two models pred ict th e
same s mall-sig nal line-to -out put transfer function G,./ •l.:: 11/vs .
ww
7.16
7.17
Modify the CCM de and small- sig nal ac averaged swi tch mode ls of Fig. 7.50, to account for MOSFET
on- res istance R,,,.and diode forwar d voltage drop Yn-
Use the average d swi tch modeling tech niqu e to derive a de and ac equ ivalen t ci rcuit model for the fly-
w.E
back co nverte r of Fig. 7.18. You can neglec t all losses and the transformer leakage inductan ces.
(a) Defi ne a swi tch ne twor k co n tain ing the trans istor Q 1 and the d.iode D 1 as in Fig . 7.39(a). Derive
a large-s igna l average d sw itc h model of the switc h ne t work. The model sho uld acco unt for the
tra nsfor mer tu rn s rati o 11.
(b)
asy
Per tu rb and linea ri ze the model yo u derived in par t (a) to obta in the de and ac sma ll- s ignal ave r-
aged sw itch model. Ver ify tha t forn = I yo ur model redLtCes to the model shown in Fig. 7.39 (d).
En
(c) Us ing the averaged swi tch model you d erive d in part (b), ske tch a comple te de and sma ll- sig nal
ac model of lhe flyback convetier. Solve the mode l for the stea dy-sta te conversion ratio M(D) =
VIV8 .
(d)
gin
The averaged . witch models you derived in parts (a) and (b) coul d be used in ot her co nverters
having an isola tion transfo rmer. Which ones~
eer
7.18 In the flyback conver ter of Fig. 7. 18, the tra nsis tor on -resistance is .l-1
,,.,, and the diode forward vo ltage
drop is V11• Other losses and the tra ns former leakage induct;mces can be negle cted. Derive a de and
s mall- signal ac averaged sw itch model for lhe sw itc h network co nt aini ng the transis tor Q 1 and lhe diode
ing
/J 1. The model should acco unt for the on -resis tance R.,,., the diode forwar d voltage drop VD, and the
tra nsfo rmer turn s ratio 11.
7.19 In the boost converter of Fig. 7.72(a), the v 1(l) and ii( I) wave for m s of Fig. 7.72(b) are observe d. Du ring
.ne
the transistor turn- o n tra nsit ion , a reverse c urre nt flows th ro ugh the diode which removes the diode
stored charge . As illuslrated in Fig . 7.72(b), the revers e current spike has area - Q, and du ra tion 1,. The
indu ctor windin g has resis tance R1•. You may neglect all losses other tha n the sw itching loss due to the
diode stored charge and the co ndu ction loss due to the inductor winding resis tance .
(a)
(b)
Derive an average d sw itch model for the boost swi tch network in Fig. 7.72(a).
Use yo ur res ult of par t (a) to sketch a de equ ivalent circuit mode l for the boost co nverter.
t
(c) The diode stored chm·ge ca n be expressed as a fu nc lion of the c un en t I, as:
whil e the reverse recove ry ti me I, is appro xi mately cons tant. Give n VR= 100 V, n"" 0.5,f, = 100 kHz,
kq = 100 nC/A tn, t,= 100 ns. Rl =0.1 Q, use a de sweep s imu lati on to plot the converter eff ic iency as a
function of the load cun ent /'LOAD in the range:
I ASlw,1oS. JOA

ProblemJ 263
(a)
i I(1) r---------------------------
1 i2(1)
!+ +
~
v, j v 2{1) C v(t)
'
~
{b)
ww
v1(t)
w.E
asy r,
En 0 0
Area-Q, gin
eer
Fig. 7.72 Boost converter and waveforms illu,trating reverse recovc,·yof the diode_Averaged switch
modeling in this convener is addressed in l'rohlcm 7.19_
ing
.ne
t

ww
w.E
asy
En
gin
eer
ing
.ne
t

8
Converter Transfer Functions
ww
w.E
asy
En
The engineering desig n process is comprise d of several major steps: gin
I.
2.
Specifications and other design goa ls are de fin e d.
eer
A cirrnit is proposed . This is a creative proces s that draws o n the ph ysical insi g ht and experience o f the
3.
engineer.
ing
The circuit is modeled. T he co nvert e r power stage is modeled as desc ribed in Chapte r 7. Com po ne nts and
.ne
other portio ns of the sys tem are modeled as appro priat e, of ten wit h ve ndor -suppl ie d dat a.
4. Desig11-orie111edanalys is of the circ LLi

t is perfor med. T h is in vol ves deve lopment of equat ions th at allow
ele me nt va lues to be chosen such that sp ec ifications and desig n goa ls are me t. In addition, it may be neces-
5.
sary for the engineer to gain additiona l understandi ng and p hysica l ins ight into the circui t behavior, so that
the design can be improved by add in g e le ment s to the circuit o r by c hanging c ir cui t co nn ectio ns.
Model verifical io11. Predict ions of the model are compared to a laboratory proto type , under nomi nal oper-
t
ati ng cond ition s. The model is refi ne d as necessary, so that the mode l pred ic tions agree w ith laboratory
measure ments.
6. Worst-mse analysis (or ot her reliabili ty and pro d uction yi el d a na lys is ) of the circu it is perform ed . T h is
involve s q uan tita tive eva lu a tio n of the model per formance , to j ud ge wh e ther specifications are met und er
all cond itions . Compu te r sim u la tio n is well - su ited to th is task.
7. Iteration. The above steps are repeated to improve the design un ti l the wors t- case be hav ior mee ts spec ifi-
ca tions , or un ti l the re lia bil ity and product ion y ield are acce pt ably hig h .
Thi s chapter covers techniqu es of des ign-oriented analysis, measurement of expe rimental transfer func -
tion s, and comp uter simulation, as neede d in steps 4, 5, and 6.
Sections 8.1 to 8.3 discuss techniqu es for analys is and con struction of the Bode plot s of the c-0n-
verter tran sfer functions , input impedanc e, and output impedance predicted by the equ ivalent circuit

266 Co11v
erter Trn11sferF1111
ctio11s
L
Output
U 11e +
irrp 11t
v,(s) Z;.(s)
------
/ J(s) !d(s) C v(s) R
-z••,<s)
t t
I
ww
d(s) Controli11p11t
l<'ig.Kl Small-signal equivulerHcircuit moue! of rhe huck-boost crn1vert~
r . as Jerived in Chapter 7.
w.E
mode ls of Chapte r 7 . For exam ple , the small -signa l equivalent circ u it mode l of the buck -boost co nverter
is illustra ted in Fig. 7.17(c). Thi s model is reproduced in Fig. 8.1, wi th the i mportant inp uts and te rm inal
imped ~nces iden tifi ed. The lin e-to -out put tra nsfer function G ,,11(s) is found by setti ng d ut y cyc le var ia -
asy
tions d(s) to zero, and the n solving for the transfe r funct ion from i\ .(s) to ii(s) :
G,/s) -
. _ v(s)
v (s) .
I (8 .1)
En R d (J)=O
Thi s transfer fu nct ion describes how variati ons or disturba nces in the appli e d inp ut voltage v,,(1) lead to
gin
disturbances in the output voltage v(t). It is imp ortant in des ign of an ou tput voltage regulator. For exam -
ple, in an off -lin e power supp ly, the conve rter inpu t voltage 1i 1) contains undesired eve n harmonics of
th e ac power line vo ltage. The transfe r function G,,/.1') is used to de te rmi ne the eff ec t of these harmon ics
on the co nverter output voltage v( t).
eer
The co ntro l-to -outpu t transfe r fu nc t io n G,.,,(s) is found by sett ing the input voltage variations
ing
0/1·) to zero , and then so lvi ng the equi va le n t ci rc u it model for ii(.\') as a functio n of d (s):
G~d(,>·) _
- v(s) I (8.2)
.ne
..
d (s) .
'"i/ ')=0
This transfer fun c tion desc1ibes how contro l input variations {/(.,') influence the o utput voltage v(s). In an
outp ut voltage reg ulato r syste m , G,,,i(s) a key component of the loop gain and has a sig nifica nt effect on
regulator pe rform ance.
The output impedance Z,111,(s) is fo und under the condit ion s tha t v.-(s)and d(s) vari ation s are set t
to zero. Z,11,l s) desc ribes how var iation s in the load current affect the output vol tage . Th is quant ity is also
important in voltage reg ulator desig n. It may be appro priate to define Z,,,,i(s) either inc ludi ng or not
in c ludin g the load resista nce R .
The conve rter input impeda nce r- ;11(s) plays a s igni fi ca nt role whe n an electromag net ic interfer -
ence (EM !) filter is added at the co nverter power input. The rela tive magnitudes of z,"and the EMI filter
o ut put impe dan ce infl uence whet her the EMI filte r di srupts th e tra nsfer funct ion G,,,i(s). De sign of in p ut
EMI filters is the subject of Chapter 10.
An objective of this chapter is th e cons tru ct io n of Bode plots of the impor tan t transfer fu nctions
and termina l impeda nces of switch ing co nverte rs. For example, Fig. 8.2 illu strates th e magn itu de and
phase plots of G,.J, s) for the buck -boos t conve rter model offi g. 8.1. Ru les for co nst ruction of ma gnitu de
and pha se asymptotes are rev iewed in Sec tion 8. 1, includin g two types of feat ure s tha t oft en appear in

8. J Review of Bode Plots 267
80dBV
IIGvd II LG vd
60 dBV G _ V ..•........ If
1---c!O-----"'D-"'D'-
' -"""""" ~ - .•J_g= D'R L
40dB V fo
20dB V DV,
o·
o·
ww -20dBV -90'
w.E
-40dB V -18 0'
10.f, - 270'
.J-----------------==:..------
I kHz IOkHz 100 kHz
-I MHz
4 - 270"
IOHz JOOHz
asy f
Fig. 8.2 Rode riot of contrnl-to-a utput transfer funccion pn:dictcd by th~ model of Fig. l!.I, with analytic~!
express ions for the important features.
En
co nverter transfer fun ctions: resonances and right half-plane zeroes. Bode diagrams of the small-s ignal
transfe r fun ct ion s of the buck -boost conver ter are derived in detai l in Sectio n 8.2, and the tran sfer func -
ha lf-plane zero are also descr ibed.

gin
tions of the basic buc k, boost, and buck -boost converte rs are tabu lated . The ph ysical ori gi ns of the righ t
A diff iculty usua ll y enco untered in ci rcu it ana lys is (step 5 of the above lis t) is the complexity of
eer
the circu it model: prac tical circuits may co ntains hundreds of ele ments, and hence their analysis may
leads to co mplicate d derivat ions, intra ctab le equ atio ns, and lots of alge bra mistak es. Design -oriented
ing
anal ysis[ I] is a collec tion of tools and techn iques that can allevia te these prob lems. Some too ls for
app roac hin g the des ign of a compli cated co nverte r sys te m are descr ibed in thi s chapter. Writing the
tran sfer function s in norma lized form directly exposes the importa nt features of the response. Ana lytical
.ne
ex press ions for these feat ures, as well as for the asy mpto tes , lead to simple equatio ns that are usefu l in
design. Well-separated roots of transfer function po lynomials can be approxi mated in a simple way. Sec-
tion 8.3 describes a graphical method for constru cting Bode plot s of transfer funct ions and impedances,
essent ially by inspection. This method can: (I ) reduce the amou nt of algebra and associated algebra mis-
takes; (2) lead to greater in sight into circu it behavior, wh ic h ca n be applied to desig n the circu it ; and
(3) lead to the insig ht nec essary to make suitab le approx ima tio ns that render the eq uatio ns tractab le.
Experi mental meas ure ment of transfer funct ions and imp eda nces (nee ded in step 4, model veri-
t
fication) is discussed in Section 8.5. Use of co mput er simu lation to plot co nverte r transfer funct ions (as
needed in step 6, worst-case analysis) is covere d in Appendix B.
8.1 REVIEW OF BODE PLOTS
A Bode plot is a plot of the mag nitud e and ph ase ofa tra nsfe r function or ot her complex -valued qua ntity,
vs. frequency. Ma gnitude in decibels, and pha~e in degrees, are plotted vs. frequen cy, using semilogarith-
mic axes . The magnitude plot is effectively a log-l og plot, since the magni tu de is expressed in dec ibe ls
and the frequenc y axis is loga rithm ic.
The ma gnitude of a dim ension less q uant ity G can be exp ressed in dec ibe ls as follows :

268 Converter Transfer Fw,cl ions
(8,3) Tulllc 8.1 fapress i11gmagnitudts in tlecibels

Actual magnitud.e Magnitude in dB
Dec ibel values of some simple magn itudes are
1/2 -6dB
listed in Table 8.1. Care must be used when the
l OdB
magn it ude is not dimens ion less. Since it is not
proper to take the logarit hm of a quantity ha ving 2 6dB
dim ens ions , the magn itude must first be normal - 5 = ,on 20 dB - 6 dB= 14 dB
ized. For example, to express the magnitud e of 10 20dB
ww
an impedan ce Z in decibe ls, we shou ld normal - 3·20 d B= 60 dB
1000= 103
ize by d ivi d ing by a base impedance R,m,,:
w.E
(R4)
TI1e value of R,,,,.,.,is arbitra ry, bu t we need to tell others what va lue we have used . So if IIZ II is 5 Q, and
asy
we choose R1,0 ,,, = IO Q , then we can say that IIZ Ildli= 20 log io<5s:2/l OH) = - 6dB with respect to l O Q ,
A common cho ice is Rb""= 1!1; dec ibel impe dan ces expressed with Ri,.,_,,. = IQ are said to be expresse d
in dB.Q. So 5 Q is equiv alent to 14 dBQ. Current swi tch ing harmonics at the inp ut port of a co nverter are
lmA .
En
ofte n expressed in dBµA , or dB using a base current of I µA: 60 dflµA is equi va lent to I 000 µA , or
The magni tude Bode plots of functio ns equal to powers off are linear. For example, suppose
that the magnitude of a dimen sionless quant ity GU) is
gin
eer
{8.5)
ing
where / 0 and 11 are co nstan t s. The magnitude in decibels is
{8 .6)
.ne
This equation is plotted in Fig. 8.3, for severnl values of n. The magnitudes have val ue l ~ 0 dB at fre-
quency /ca/ 0, They are linear functions of log 10(J). The slope is the change in IIG lldB arising from a unit
cha nge in loglO(/); a unit increase in loglll(/) correspo nds to a facto r of 10, or decade , increase in /. From
Eq. (8.6), a decade increase in [l eads to an increase in IIG 1 1,m of 20n dB. Hence, the slope is 20n dB per
decade . Equ ivalent ly, we can say th at the slope is 2011log 10(2)"' 611dB per octave , where an octave is a
t
factor of 2 change in freq uency. In prac tice , the magnitudes of most frequency -dependent functions ca n
usua lly be approximated over a lim ited range of frequencies by fu nctions of the form (8.5); over this
range of frequencies , the magnitude Bode plot is approximate ly linear with slope 20n dB/decade.
A simple transfer func tion whose magnitud e is of the form (8.5) is the pole at the origin:
G(.~) = ( !l
Ulu
(8 ,7)
The magni tude is

8. I Review of Bode Plots 269
ww
w.E O.lfo lo lOfo f
log scale
asy I I ti1
Fig, 8.3 Magnitude Dode plots of functions which vary a,·f" are linear, with slope II dD per decade.
En 1G(}W) 1= l~ = (8.8)
If we defi ne f = W/21tand
gin
J0 = roJ21t,th en Eq. (8.8) becomes
e
(8.9)
eri
wh ich is of the fom1 of Eq. (8.5) with n = - 1. As illustrated in Fig. 8 .3 , the magn itude Bode plot of the
pole at the or igin (8. 7) has a - 20 d B per d ecade slope , and passes th ro ugh O dB at freq uen cy f =/ 0 •
ng
.ne
8.1.1 Single Pole Response

R
Co nsider th e s im ple R-C low -pass filt er ill ustrated in Fig. 8.4.
The tra nsfe r fu nctio n is given by the voltage di vider ra tio
C
+
t
(8.10)
!<'lg. 8.4 Simple R-C low-pass filler

T his tr ansfer functio n is a ratio of vol tages, and hence is
example.
d imensio nless. By m ultipl yi ng th e numera tor and de no mina -
tor by sC, we can exp ress th e transfer function as a ratio nal
fract ion :
G(s) = - 1
- (8.11)
1 +sRC

270 Converter Transfer Frmctiom
The transfer function now coincides with the following standard normali zed form for a single pole:
G(s) = ( __!_.)
1+ ~ (8.12)
ulo
The paramete r u>0 = 2rtf 0 is found by equ at ing the coefficients of sin the denomin ators of Eqs. (8.11) and
(8.12). The result is
o>o=_l_ (8 . 13)
l?C
wwSince R and Care real positive quantities , w0 is also real and positive. The denom inator of Eq. (8. 12)
con tains a root at s = -ro 0 , and hence G(s ) contains a real pole in the left half of the complex plane.
w.E To find the magnitude and phase of the transfer func tio n,
we let s= Jw,where) is the square root of -I. We then find the mag-
nitude and phase of the resulting complex -valued function. Withs =
lm(G(jro))
G(iffi)
asy
ju>,Eq. (8.12) becomes
l-j _m_
G(jw) = __ 1_ ... = __ W_
o (8. 14)
(i+j~o) l+(~~r
En Re(G(iro))
ffi. The magnitude is

gin
The complex -valued G(jro) is illustrated in Fig. 8.5, for one value of
Fig. 8.5 Magn ituile and phase of

IIG{j(Jl) II=J{Rc
=
{G(joo))J2+ [ lm (C(j{o)) l 2
l
eer
{lU 5J
the complex-valued function G(ju>).
Jt+(Jfuf
Here, we have assumed that w0 is real. In decibels, the magnitude is ing
.ne
(8.16)
The easy way to sketch the magnitude Bode plot of G is to investigate the asymptotic behavior for large
and small frequency. t
For small frequency, CJl< W 0 and f < f~-it is true that

(8. 17)
The (W!Wo)2term of Eq. (8.15) is therefore much smaller than I, and hence Eq. (8. 15) becomes
i G()w) I"'Jr.,I (8.18)
In decibels, the magnitude is approx imately

8. I Review of Bode P/otJ 271
II G(jw) 1~
8
OdB
OdB +-------------,.,
Fig. 8.6 Magnitude asympto1es
for tlm single real pole lrnnsfer - 20dB
funct ion.
-40dB
-60dB +-------<1-------+-----+-----~
ww
0.1/ 0 lo 10/0 f
(8.19)
w.E
Thu s, as illustrated in Fig. 8.6, at low frequency IIG(jw) llduis asymptoti c to 0 d B.
At high frequency , 01 ~ 010 and f ~ fw In this case, it is true that
asy (~o)~ I (8.20)
En
We can then say that
I+ (.fil.
)2~ (-ro
oi )l
(H.21)
gin
01 0 0
Hence, Eq . (8. 15) now becomes
eer (8.22)
Thi s exp re ssion coincides wi th Eq. (8.5), with n = - 1. So at high frequen cy, IIG(jol) Ilda
ing
has slop - 20 dB
per decade, as illustrated in Fig. 8.6. Thus , the asymptotes of IIG(jw) II are equal to 1 at low freq uency ,
.ne
and (j// 0t 1 at hi gh frequen cy. The asymp totes intersect at fw The actual magnitude tends toward these
asymp totes at very low frequency and very high frequency. In the vicinity of the corner frequency f0 , the
actua l cu rve devia tes somew hat from the asymp totes.
The dev iation of the exact curve from the asym ptotes can be found by simp ly evalua tin g
Eq. (8 .15). At the corner frequency J=f0 ,Eq. (8.15) becomes t
IG(Jrno)I=
~)= v2A.-
1
v/, t+(~
~ (8 23)
..
ln decibe ls, the magni tud e is
) l,in,, _ zologio
I G(jW~ (VI+(~
~) 1
)'"-3 dB
(8.24)
So the actual curve deviat es from the asymptotes by - 3 dB at the co rner frequency , as illu strated in
Fig . 8.7. Similar arguments show that the actual curve devi ates from the asymptotes by - I dB at f = fr/2

272 Converter Tramfer Functions
IIG(jw) llds
OdB r--;-;;~==- -..,_!... .......

f 3 dB
Fig. 8.7 Deviation of the actual curve from
the asymptotes, real pole. ____
JI dB
f, !
- IO dB 0 !
2/o
ww - 20 dB
+--
- -------+---------1
-20 dB/decad e
w.E
and at f = 2/0 .
-3 0 dB
asy
The phase of G(jw) is
lm (G(jw)}) (8.25)
En
L.G(jw) = can 1 (
Re G(jo))}
(
gin
Insertion of the real and imaginary parts ofEq . (8. 14) into Eq. (8.25) leads to
(8.26
eer
This function is plotted in Fig. 8.8. It tends to o· at low frequency , and to -90• at hi gh frequency. At the
corne r frequency f =flJ, the phase is -45 °.
Since the high-frequency and low -frequenc y pha se asymptotes do not inter sect, we need a th ird
ing
.ne
asymptote to approximate the phase in the vicinity of the corner frequency / 0.One way to do this is illus -
o· ..........
... o· asymptote
LG(jw)
Fig. 8.8 Exact pha se

-15'
-Jo· t
plot. single mat pole.

-45 •
-60·
_75·
-90'+-__.__._ ..................
~__.__._ ...............
~_,__._.._,_,......_~_.;;;:::r:.-~
0.01/0 0.1/ 0 lo 10/ 0 100/0

f . ==J
of4 .81
o·-,--- .._
..""
...................
....\
L.G(j w) \
....
- 15" \ ...
.•.
••·•··
Fig. 8.9 One choice fOI' -30"
the midfrcquency phase
asymptote, which cor-
rectly predicts the actual -4 5•
slope at f ==
J0 .
ww -60"
w.E
-75"
-90°+~~ ..........
~c1--~~~~-1--~~..:i,..,~~..:.:::=---~
0.01/0 0.lfo lo IOOfo
asy I
En
trate d in Fig. 8.9, where the slope of the asym ptote is chosen to be identical to the slope of the actual
curve atf =/II'It can be show n that , with this choice, the asy mptote intersect ion freq ue ncies f a andfb are
gin
given by
r ==r e - nl2.,, _ii_ (8.27)
eer
Ju JU 4.81
Ji,=foe~,2 "' 4J!I lo
ing
A simp ler choice , whic h better approx im ates the act ual curve, is
. - Ji,
J.,- 10 (8.28)
.ne
Ji,;;;;10.fo
t
T his asymp tote is co mpared to the ac tuaJ curve in Fig. 8.10. The pole causes the phase to change ove r a
freq uency span of approx i mately two decades, centered at the corner frequency. The slope of the asymp-
tote in this freq uency span is - 45° per decade . At the break freq uencies J,,and fb. the actua l phase devi -
ates from the asy mptotes by tan- 1(0.1) = 5.T .
The mag nitud e and phase asympt otes for the single -po le respons e are summ arized in Fig. 8. 11.
It is good pract ice to co nsistentl y express single-pole tra nsfer fu nc tio ns in the normalized for m
of Eq. (8.12). Both ter ms in the denominator of Eq. (8. 12) are dim ensionless, and th e coefficient of s° is
un ity . Equ ation (8.12) is easy to interpret, because of it nor malized form . At low freque ncie , where the
(s/(00 ) term is small in magnitude, the tran sfer functio n is approxi mately equ al to I. At high freq uencies ,
where the (s/w 0 ) tenn has magnitude much greater than I, the transfer func tion is approxi mate ly (.r/w0 1. r
This leads to a ma gnit ude of (Jl/ 0Y . The corner freq uency is / 0 = wJ2n. So the t ransfer fu nction is writ -
1
ten direct ly in terms of its salient features, that is, its asymptotes and its corner freq uency .

274 Converter Transfer F1111

ctio11
s
o·
LG(jw )
-15"
-Jo·
-45 •
ww - 60·
w.E - 75°
-9o·
asy
0.0 1/ 0 0.1/0
En
Fig. 8.10 A ~impl e r ch oke for tile mid frequ ency ph .isc asympt ote , which be tter app.-oxi1nates th e curve over the
cn1ire frequen cy range .
OdB
gin i·:::
··::
:::::::t 3 dB
l
lo
eer
.....J I dB
! ....
,
2/o
ing
.ne
- 20 dB/decade
LG(jw)
o·
t
-9o·
F lg. 8, l l Summa ry o f the magn itudc and ph.isc Bod e pl ot for the ~ingk rc;d po le.

8. 1 Review of Bode Plot.< 275
+20 dB/de cade
Fig. 8,12 Summary of 1hc

magnitude and phase Bode plot 2/o
for the single real zero.
Osif, In ; __.t ldB
• 0 ··· ·- ,
II GUro)llde _.:::0..::
d=.B
__ l_d_B_,t;;.···== .............f
"·!!::l:::....___J/.i 3 dB
ww +90 "
w.E
asy
En
8.1.2 Single Zero Response gin
eer
A sing le zero response contains a root in the num erato r of the transfer function, and can be written in the
follow ing normalized for m:
G(s)aa(I + J0 } ing (8.29)
.ne
This transfer fun ct ion has ma gnitude
(8.30)
t
At low freq uency, f <=/ 0 = Wc/27C,the transfer fun ction magnitude tends to I ~ 0 dB. At high frequency,
f > / 0 , the transfer function magnitude tends to (f/f0 ) . As illustrated in Fig. 8.12, the high -frequency
asy mptote has slope +20 dB/deca de.
The phase is give n by
(8.31)
Wi th the exception of a mi nus sign, the phase is identica l to Eq. (8.26). Hence, suitable asympto tes are as
illustrated in Fig. 8. 12. The phase tends too · at low freq uency, and to +90 ' at hi gh frequen cy. Over the
interval fJlO </ < 10/0 , the phase asymptote has a slope of +45 °/decad e.

276 Co11verter Tra11sfer

Frmctions
+20 dB/decade
2/o
Fig. 8.13 Summary of the
magnitude and phase Dode
plot for the real RHP zero.
OdB I dB/ .
0
'{ • f::=! l:::
ww LG(jw)
o·
w.E
asy -90'
En
8.1.3 Right Half-Plane Zero
gin
ers. These term s have the follow in g normaliz ed form:
eer
Ri gh t ha lf-p la ne zeroes are ofte n encountered in th e small -signa l transfer functions of sw it chin g co nvert -
ing (H.32)
.ne
The roo t of Eq . (8 .32) is pos itive, and hence lies in the rig ht half of the co mp lex s-plane . The righ t half -
plane zero is also someti mes called a nonminimum phase zero . Its norma lized form, Eq. (8.32), resem -
t
bles the normalized form of the (left half -plane) zero of Eq. (8.29 ), with the exception of a minu s sign in
the coefficien t ofs. Th e minus sign ca uses a phase reversa l at hi gh fre qu ency .
The transfe r functio n has magnitude
~or
IG(jw ) I= j
I+( (8.33)
T hi s express ion is iden tica l to Eq. (8.30). H ence, it is imp ossible to d istingu ish a ri g ht half -plane zero
from a lef t ha l f-plane zero by th e magnitude alone . The phase is given by
(R.34)
This coinc ides wit h the express ion for th e phase of the s in g le pole, Eq. (8.26). So the right h alf -pl ane
zero exh ib its the magnitude response of the left ha lf-plane zero, but th e phase response of the pole . Ma g-
nitude and phase asymptotes are su mmari zed in Fig. 8.13.

8.1 Review of Bode Plots 277
3 dB 4 ..............;
OdB
I dB { ... I
Fig. 8.14 Inversion of the fre- r··· i 1o
quency axis: summary of rhe
magnitude and phase Bode plots
for the inverted real pole,
IIG(jw) Ilda
+20 dB fdecade
ww
w.E
+90 '
LG(jw)
-45'fdeca de
asy +45" ··· ,

fo
o·
En
8.1.4 Fre quency Inver sion gin
eer
Two other forms arise, from inversion of the frequ ency axis, The inve rted pole has the transfer funct ion
G(s) = -(
1+T
'wo) ing (lU5)
.ne
As illustra ted in Fig, 8.14, the inverted pole has a h igh-frequ ency gain of 1, and a low frequenc y asym p-
t
tote having a +20 dB/decade slope, Th is form is useful fo r describing the gain of high-pass filte rs, a nd of
other transfer functions where it is desired to e mph asize the h igh frequency gain , with attenuat ion of low
frequenc ies. Equa tion (8.35) is eq uiv ale nt to
(~o
) (8.36)
G(s)= -( - )
1 +..L
Wo
Howe ver, Eq. (8.35) mor e di rect ly e mpha sizes th a t the hi gh freq ue nc y gain is I.
The inverted zero has the form
(8.37}
As illu st rated in Fig. 8. 15, the inverte d zero has a hi gh-frequency gai n asympt ote equ al to I, and a low-
freque ncy asympto te having a slope equal to - 20 dB/decade . An example of the use of this type of trans-

278 Co11
11e
rfer Tra11sferFrmcfions
-20 dB/decade
Fig. 8.15 Inversion or the fre-

quency axis: summary of the
ww
magniludc and pha se Bode plot
for the inverted real zero.
o·
w.E
asy
En
gin
fer function is the proportion al- plu s-i ntegral contro ller , d isc usse d in co nn ect ion w ith feed back loo p
desi gn in the nex t chapter. Eq uatio n (8.37) is equivalent to
G (s)
( 1 + (;~ )
=---"-
(~-(1) eer (8.38)
ing
However , Eq. (8.37) is the preferred form w he n it is des ired to emphas ize th e va lue of the high -freque ncy
.ne
gai n as ym ptote .
Th e use of frequency inv ers ion is illustrated by exampl e in th e next sec tion.
8.1.5 Combinations
t
The Bode dia gra m of a transfer fu nctio n co nta inin g several po le, zero , and ga in terms , can be constru ct ed
by simple addition . At any g ive n frequenc y, the ma g nitud e (in dec ibe ls) of the compo site tr ansfe r fun c -
tion is equa l to th e sum of th e dec ibe l ma gni tudes of the ind iv idua l te rms. Li kew ise, at a gi ven freque ncy
the phase of the compos ite tran sfer func ti on is equa l to the sum of th e phases of the ind ividual terms .
For exampl e , suppose that we ha ve alrea dy co nstruct ed the Bode di agrams of two co mp lex -va l-
ued fun ct ions of 00, G 1(ul) an d Gz((!l). These funct ions have magn itud es R 1(W) and Ri(w), and ph ases
f\(m) an d Hi(m), respect ively. It is desi red to co nstru ct the Bode di agram of the produc t GJfw) =
G 1(w)GiOO).Let Gim) have magnitude R 1(l0), and ph ase 0iw). To find thi s m ag nitude and ph ase, we
can express G 1(cu), G:(w), and G/oo) in polar form :

G 1(00);R 1(w) eJ-011"'1

Gi(w) = Ri( w) e182'"'> (8.39)
G i W) = R 3(w) eJU3l•• 1
The product Gi(J.))ca n then be expressed as
(8.40 )
Simp lification leads to
ww (8.41)
w.E
Hen ce, the composite phase is
(8.42)
The total magn itude is
asy (8.43)
When expresse d in dec ibel s, Eq. (8.43) becomes

En
gin
So the compos ite phase is the su m of the indi vidual phases, and when expressed in decibels, the compos-
(8.44)
ite magnitude is the sum of the ind ividual magnitudes. The compos ite magnitude slope, in dB per
decade, is therefore also the sum of the indiv idu a l slopes in dB per decade .
eer
IIGII
40dB G0 =40~ 32dB
ing LG
.ne
IIGII
20dB
OdB
·t··
t
OdB
. 1 ................
O' "···.... 2 kHz
20 dB .....................- .........1•• •••••• -40 dB/dec ade o·
- LG //10····-..... ········.... ......···......
200 Hz .............. ·············

-4 0 dB
-45'/decade ······i........~:::::::::·.·::::::··:.-.-.-
.-.-
.-;··············..... - 90'
-60dB
- 90"/decade I 0/2
20 kHz
10/1 - 135'
I kHz -45' /d ecade
~----..-----+-----1------+_.:, t--- -+
-180"
I Hz JO Hz JOOHz I kHz 10 kHz IOOkHz
Fig. 8.16 Construction of magnitude and phase asymptotes for the transfor fu nction of Eq.(8.45). Dashed li ne

280 Converter Transf er F11nction

s
For example, consider construct ion of the Bode plot of the following transfer funct ion:
(8 .45)
where G11= 40 ~ 32 dB,/ 1 = <o/2rt = 100 Hz,/ 2 = ul/21t = 2 kHz. Thi stransfer function contai ns thre e
terms: the ga in G0, and the poles at frequencies Jiand J2.The asymptotes for each of these terms are il lus -
trated in Fig. 8.16. The gain G 0 is a positive real number, and therefore contributes zero phase shift with
the gain 32 dB. The poles at 100 Hz and 2 kHz each contribu te asymptotes as in Fig. 8. 11.
ww
At frequencies less than 100 Hz, the C0 term con tribut es a gain magni tude of32 dB, while the
two poles each contr ibu te magnitude asymptotes of0 dB. So the low -frequency composite magnitude
asymptote is 32 dB + 0 dB + 0 dB = 32 dB. For frequenc ies between 100 Hz and 2 kHz , the G0 gain
again contributes 32 dB, and the pole at 2 kHz cont inu es to contribute a O dB magn itu de asymptote.
w.E
However , the pole at 100 Hz now contributes a magnitude asymptote that decrease s with a - 20 dB per
decade slope. The composite magnitude asymptote therefore also decreases with a - 20 dB per decade
slope, as illustrated in Fig. 8. 16. For frequenc ies greater than 2 kHz, the poles at 100 Hz and 2 kHz each
asy
contribute decreasing asympto tes havin g slopes of - 20 dB/decade . The composite asymptote therefore
decreases with a slope of - 20 dB/deca de - 20 dB/decade = -40 dB/decade , as illustrated.
The composite phase asymptote is also constructed in Fig. 8.16. Below ID Hz, all terms con-
En
tribut e O' asymptotes. For frequencies between //10 ~ IO Hz , and ,h/lO ==200 Hz, the pole at /j contrib -
utes a decreasing phase asymptote having a slope of -45° /decade . Between 200 Hz and 10/ 1 = I kHz ,
both poles contribute decreasing asymptotes with -45 °/decade slopes; the compos ite slope is therefore
2 gin
- 90°/decade. Between 1 kHz and 10/ 1 = 20 kHz, the pole at / 1 con tributes a constant - 90° phase asymp -
tote , while the poleatj contributes a dec reasing asymp tote with - 45 °/decade slope . The compos ite slope
eer
is then -45 °/decade. For frequencies great er than 20 kHz, both poles con tribute constant - 90° asymp -
totes, leading to a composite phase asymp tote of - 180°.
As a second example , con- J,
sider the transfer function A(s) rep-
resented by the magnitude and
phase asymptotes of Fig. 8.17. Let
IIAII
ing
us write the transfer funct ion that
.ne
corresponds to these asymptotes.

l11e de asymptote is A0• At comer
frequency fl' the asymptote slope
increases from O dB/decade to +20
dB/decade. Hence , there must be a
LA
o· o· t
zero at frequency / 1• At frequency J, 110

/ 2 , the asymptote slope decreases

from +20 dB/decade to 0 dB/ Fig. 8.17 Magnitude .ind pha~e asymptote~ of example transfer
decade . Therefore the transfer func - function A(,;·).
tion contains a pole at frequ ency / 2 .
So we can express the tran sfe r function as
( l + ~.)
A(s)=A
(8.46 )
I + __l__1
0 -( -
W1 '

8.1 Re,,iew of Bode Plots 281
where w1 and ro2 are eq ual to 2rr./1 and 2nf 2 , respectively.

We can use Eq. (8.46) to derive analytica l expressions for the asymptotes. For f </ 1, and letti ng
s = jw, we can see tha t the (s/OJ1) and (slw1) tem1s each have magnitud e less than 1. The asymptot e is
derived by neglecting these terms. Hence, the low-frequency magnitud e asymptote is
(1+I.)
Ao --- (8.47)
(t+~)
For / 1 <J</2, the numera tor term (s/001) has magnitude greater than l, while the denominator term (s/w 2)
ww
has magnitud e less th an 1. The asymptote is derived by neglect ing the smaller te1ms:
w.E (8.48)
asy
This is the expression for the midfrequency magnitude asymptote ofA(s). For/> f 2 , the (s/W 1) and (s/W 2)
terms each have magnitude greater than I. The expression for the high-frequency asymptote is therefore:
A (/+~.)
fl(/+~,)
-A
E!t Li"'-A
- 01.LI-
ng Olz_A
O(l) 1 -
fl.
0/j
(8.49)
ine
s., .s=jw W2 s=Jw
We can conclude that the high-frequenc y gain is
eri (8.50)
Thus, we can derive analytical expressions for the asymptotes.

ng
.ne
The transfer function A(.1) can also be written in a second form, using inverted poles and zeroes.
Suppose that A(s) represents the transfer function of a high-frequency amplifier, whose de gain is not
important. We are then interested in expressi ng A(s) direct ly in terms of the high-freque ncy gain A=. We
can view the transfer functio n as having an inverted pole at frequency f.,, which introduces attenuation at
frequencies less than / 1 . In addition, there is an inverted zero at f =f 1. So A(s) could also be written
t
(8.51)
It can be verified that Eqs. (8.51) and (8.46) are equivalent.

282 Co11
verter Transfer F1111
ctions
8.1.6 Quadratic Pole Response: Resonance L

+
Cons ider next the transfe r function G(s) of the two -pole
low-pass filter of Fig. 8. 18. The buc k converte r con tains C R
a filter of this type. When manipulated into canon ical
form, the models of the boost and buck-boost also con-
tain simil ar filters. One can show th at the transfe r func -
tion of thi s network is
Fig. 8.18 ·two-pole low-ras~ tilter examp le.
ww G(s) = v~(s) =
v1(s)
I
I + .1·~ + s 2LC
(8.52)
w.E
This tran sfe r function contai ns a second -order denomina tor polynom ial , and is of the form
(8.53)
with a 1 = UR and a2 = LC.

asy
To cons truct the Bode plot of thi s transfer func tion, we might try to factor the de nominator int o
En
its two roots:
s )I(1- sis)
gin
G(.1) = ( (8.54)
l - sj"
Use of the quadrat ic formula leads to the follow in g expressions for the roots:
eer (8.SS)
ing
.ne
(8 .56)
If 4a2 :S a/, then the roots are real. Each real pole then exh ibits a Bode diagram as deri ved in
Section 8. 1.1, and the composite Bode di agram can be cons tru cted as desc rib ed in Sect ion 8. 1.5 (but a
bette r approac h is described in Section 8.1 .7).
a/,
t
If 4a2 :S then the roots (8.55) and (8.56) are complex. In Section 8. 1.1, the assumpt ion wa s
made that W0 is real; hence, the resu lts of that section cannot be applied to thi s case. We need to do some
additional work, to determine the ma gnitude and phase for th e case when the roots are com plex.
The tran sfe r function s of Eqs. (8.52) and (8.53) can be written in the fo llow ing standard nor -
malized form :
G(s)= l , (8.57)
I+ 2~ ...L
Wo
+ Wo (...L)
·
If the coefficien ts a 1 and a2 are real and pos itive, then the par ameters Cand W0 are also rea l and positive .
The parameter m0 is again the an gular corn er frequency , and we can define / 0 = C1\/21t.The par ameter ~ is

called the damping fact or: I; co ntrol s the sha pe of the transfer function in the vicinity of J-=/ 0 • An alter-
nati ve standar d normalized form is
C(sl = I s,, I + (11)

+ ,-,,
"'= o
s -
o
r (8.58)
where
(8.59)
ww
The parameter Q is ca lled the quality factor of the c irc uit , and is a mea sure of the dissipatio n in the sys-
tem . A more general defini tio n of Q, for sinu so ida l excita ti on of a pa ssive element or netwo rk, is
w.E Q _ 211
-
(peak sto1ed energy)
(energy d1ss1pa1ed f)er cycle)
(8 60)
asy
For a seco nd-order pa ssive sys tem , Eqs. (8.59) and (8.60) are equiva le nt. We wi l l see th at the Q-factor
has a very simple int er pr et ati on in the ma gnitud e Bode di ag rams of second -order tra nsf e r funct io ns .
Analytical express ions for the parame ters Q and ul 0 can be found by equa tin g like powers o f s in
En
the origin a l transfe r function , Eq. (8.52), and in the normalized fo rm , Eq. (8.58). The result is
gin (8.6 1)
The roots .11 and s2 of Eq s. (8.55) and (8 .56) are real whe n Q s 0.5, a nd are complex when Q > 0.5.
l11e ma gnitude of G is
eer
IGijrn) I =
\/
'l ===a===
----,c,
, +
=,
[_w 1
r:l ·,;
0 ).
·i· J I_ '
Q)
r,i
l,w0
l;= ing (8.62)
.ne
Asy mptotes of IIG II are illustrated in Fig . 8.19. At low freq uen c ies, (w/w 0 ) ..;,:: I, and hence
JIG(jro) lido
IIGII...., 1 for w <li'.'.W11 (8.63)
t
OdB
OdB
- 20 dB
-40dB
-60 dB
0.1/0 lo 10.fo f
sfer function.
Fig. R.19 Mugniwde asymptot es for the 1wo-pole 1ra11

284 Conve rter Transfer Functions
At high freq uencies where (w/ro0) » I, the (w/w 0) 4 ter m IIGU

dominates the ex pressio n ins ide the radica l of Eq. (8.62) .
Hence, the h igh- freque ncy asympt ote is _o_d_D_==-----l ·
(8 .64)
Th is express ion co in cides wi th Eq. (8.5), with n = -2.

Ther efore, the hig h-fre que ncy asy m ptote has slope -40 dB/
decade. The asy mpto tes intersect at/= fw and are indepe n-
ww
Fi11. 8.20 Important features of the magni .
dent of Q. tudc Dode plot, for the two-pnle trnnsfer
The pa rameter Q aff ects the dev iat ion of the actu al function.
curve from the asymptotes, in the neighborhood of the cor-
w.E
ner freq uency / 0 . The exa ct magnitu de at/ = f 0 is found by substitut ion of w = Ol0 int o Eq. (8.62):
(8.65)
asy
So the exac t t ransfer functi on has ma gnit ude Q at the co rner freque ncy / 0 . [n deci bels, Eq. (8.65) is
LB" IQ l,m (8,M)
En
I G(JOOol
So if, fo r example , Q = 2 ='> 6 dB, the n th e act ual curve dev iate s from the asy mpt otes by 6 dB al the cor-
summ ari zed in Fig. 8.20.

The pha se of G is gin
ner frequency f = j 0 . Sali ent features of the magnitude Bode plot of the second-order transfer fun ctio n are
~(ll eer (8.67 )

1-(%)"
ing
The phase tends to o·
.ne
at low freq uency, and to -180 ' at high fre que ncy . At J = / 0 , the phase is - 90°. As
illu strated in Fig. 8.2 1, inc reasi ng the value of Q ca uses a sharper phase change bet wee n the 0' and
-180 " asympt otes. We again need a mid frequ ency asymptote, to approxi mate the phase transi tion in the
lacre a, ing Q
t
Mg, 8.21 Pha se plot, second -order poles . LG - 90~

Increasing Q causes a sharper pha,e change.
-! 80~-1---_ __ __ _ ,___..::::::::::::,==-;::;
0.1 JO

8.1 Review of Bode Plots 285
oo J~.\
..........................
\.
....
Fig. 8.22 One choice for !he midfrcquency LG ......
.....
phase asymptote of the 1wo-pole response,
which corrcc1ly predicts the actual slope at
f =fo · - 90°
ww - 180° -l------------1---..,;;... ___ ..,c
w.E
0. 1 10
flfo
asy LG
Fig. 8.13 A simpler choice for the
mldfn:quency phase asymptote, which
En _900
better approximates the curve over the
entire frequency range and is consistent
wilh tl1e asymptote used for real poles.
gin
eer
- 180° +--------......-.----'I-"<--- ...
0. 1
flfo
ing 10
vicini ty of the co m er frequen cy / 0, as illustra ted in Fig. 8.22. As in the case of the real single pole, we
.ne
co uld choose the slope of this asy mptote to be iden tical to the slope of the act ual curve at / = Ji,.It can be
shown th at this choice leads to the following asympt ote break fre quen cies :
J;, = (e"'2J-
f1o= (eit1
I
2Q fo
2 )2'o
fr.
(8.68) t
A better choice, wh ic h is co nsistent with th e ap prox imation (8.28) used for the real single pole, is
f.,= 10- JllQ lo (8.69)

f,, = 10ll >Q fo
With this choice, the midfrequency asymptote has slope - 180Q deg rees per decade . The phase asymp-
tote s are summ arized in Fig. 8.23. With Q = 0.5, the phase cha nges fro m 0° to - 1800 over a freque ncy
span of approximately two decades, centered at the corner frequency / 0 • Increasin g the Q causes this fre -
quency span to decrease rap idly.
Second-order res ponse magnitud e and phase curves are plotted in Figs. 8.24 and 8.25.

286 Converter TransferFunctions
Fig. 8.24 Exact mugnitlldc cur,,cs, two-

pole response, for several values of Q. OdB
ww
w.E
asy -20dB +--,;.........;..--;---;i-i--.-"'1-
0.3 0.5 0.7
---_,,_...-_-'I
2 3
En flfo
gin
eer
Fig, 8.25 Exact phase curves, twn-pole ing
response. for several values of Q.
.ne
LG
t
0.1 10
J/fo

8.1.7 The Low-Q Approximation
As mentio ned in Sectio n 8.1.6, when the roots of second-o rder denominator pol y nomi al ofEq. (8.53) are
rea l, then we ca n factor the denomina tor , and co nstruct the Bode di agra m using the asym ptotes for real
poles. We would then use the followi ng no rmalized form :
(8.70)
ww
This is a particularly des irable approach when the comer fre qu enc ies (0 1 and w2 are we ll separa ted in
value.
The diffi c ult y in th is proced ure lies in the com plex ity of the quadrat ic formu la used to find the
w.E
come r frequencies. Ex pressing the come r frequencies W 1 and w2 in terms of the c irc ui t elemen ts R, L, C,
etc., invariab ly leads to complicated and unillumina tin g expressions , especially when the c ircui t con tains
many elemen ts. Even in th e case of the simple circu it of Fig. 8.18, whose transfer fun cti on is given by
Eq. (8.52), the co nve nti onal quad ratic for mul a leads to the fo llow ing co mplicated for mul a for the corne r
freque ncies:
asy J ~±
En (~J2-4LC
2LC
(8.71)
gin
This equ atio n yields esse nt ially no ins ight regard ing how the corner frequencies depend on the e leme nt
values . For exa mple , it can be show n that when the comer frequencie s are well separated in value, the y
can be expresse d wi th high accu rac y by the much sim pler relat ions
(J) -
l -
R
{,'
(Jl
2~
!
RC eer (8,72)
ing
In thi s case, rn1 is essent ially independent of the va lue of C, and (tl 2 is essentially inde penden t of L, yet
Eq. (8.71) appa rent ly pred icts tha t bo th corner frequencies are de pende nt on all e lement values . The sim -
ple exp ress ions of Eq. (8.72) are far prefe rable to Eq. (8.71 ), and can be eas il y der ived usi ng the low-Q
.ne
approximation [2].
Let us assume that the tran sfe r functio n has been exp ressed in the standa rd no rm alized form of
Eq. (8.58), reproduced below:
G(,)-
' - s
l
( -,\' )2 (8.73)
t
i +-+
Qroo Wo
For Q :'>0.5, let us use the q uadr ati c formula to wr ite the rea l roots of the denom inato r polyno mial of
Eq. (8.73) as
(8.74)
(8.75)

288 ConverterTransfer Fu11

ctio11s
F(Q)
0.75
Fig. 8.26 F(Q) vs. Q, as given by

Eq. (8.77). The appro :dmarion F(Q) '- I is 0.5 •• • •••- •••• ••• H •••-•• •• ~•• ••••• •• ••••••••• •o uoooo .o.•••• • •• - •• .. ••.•nu-••
;
• •• .u•••••• •• .. • •L
within 10% of the exact value for Q < 3. !

0.25 i
!
ww O -t-------11-----
0 0. 1 0.2
- --+-----+-------i
0.3 0.4
i
0.5
w.E
Q
The corne r fre qu e ncy CO2 ca n be exp ressed
asy
())
w,=t} F(Q) (8.76)
where F(Q) is d efi ned as [2]:
En
F(Q ) = ½(l + \/T=4j:f) (8.77)
Note th at, w hen Q 4:: 0.5, the n 4Q 2 ..,;::: l

gin
and F(Q) is approxi m ately equ al to I . We then ob tain
eer (8.78)
Th e fun ctio n F(Q) is plotted in Fi g. 8.26. It ca n be seen that F(Q) app roac hes
decre ases below 0.5.
very rap idl y as Q
To der ive a simil ar approxi mation for w 1, we ca n mult iply an d divide Eq. (8.74) by F(Q), ing
Eq. (8.77). Upo n simp lificati on of th e numera tor, we obtai n
.ne
t
(8 .7\J)
A ga in, F(Q ) te nds to I for sm al l Q. Hence, w ca n be appro ximate d as

1
(8 .80)
Mag nitud e asy mptotes fo r the low -Q case are su mma ri ze d in Fig. 8.27. For Q < 0.5, th e two
po les at W0 sp lit int o re al _poles. O ne re al pole occ ur s at co rn er fr eq ue ncy co1 < Ulo, wh il e the ot her occ urs
at co rner freq uency W2 > Ulo-Th e co rne r freq uenc ies are eas ily app rox ima ted , usi ng Eqs. (8.78) and
(8. 80).
For the fi lter ci rcuit of Fig. 8. 18, the para mete rs Q and w0 are given by Eq . (8.61 ). For the case
when Q -< 0.5, we ca n der ive th e fo ll ow ing an a lyt ical ex pressio ns for th e corner freq uencies , us in g
Eqs. (8.78) and (8.80):

Fig. 8.27 Magnitude asymptotes predicted

by the low-Q approximation, Real poles occur
at frequencies Q/0 and/JQ .
ww (8,81)
w.E
So the lo w-Q appro x imatio n allows us to de rive simp le des ign-orie nted analy ti cal express ions for the
asy
corner frequ e ncies.
8.1.8 Approximate Roots of an Arbitrary-Degree Polynomial
En
gin
Th e low- Q approx ima ti on ca n be genera lized , to find app rox im ate analytica l exp ressio ns for the roots of
the ,/' -order poly n om ia l
eer
(8.82)
It is desired to factor the po lynomial P(s) into the for m
ing (8.83)
.ne
In a rea l circu it, th e coe ffic ie nts a 1, .. . , a,.are real, whi le the tim e co nstants 't 1, .. . , 't,. m ay be either real or
co mplex. Very often, some or aLI of the time constants are well separa ted in value., and depe nd in a very
simpl e way on the ci rcu it e lemen t val ues. [n such cases, simp le approx imate an alyti ca l exp ressio ns for
the tim e co ns tan ts can be derived .
The time co nsta nts ti' ... , , 11 can be related to th e or igin al coeffic ients a!' ... , a 11 by mult ip ly ing
out Eq. (8.83). The res ult is t
ll I = 't l + T 2 + ' •' + 't,.

a,=1 1(1: , + ... + t,.}+,,(i:1+ ... + ,,,) + ...
+ 1:,,,(
ll1 = 't ,, ,( 13 + ... + t.,) '• + •.. + 1:,,)+ •.. (8.84)
General sol ut ion of th is sys tem of eq uatio ns amounts to exact fac tor in g of the arb itra ry degree po ly no-
m ial, a hope less task. N one theless, Eq. (8.84) does suggest a way to approxim ate the roo ts .
Suppose th at all of the time cons tants t 1, .. . , t,, are real and we ll separated in va lue. We ca n fur-
ther assume , with out loss of ge nerali ty, that the time constan ts are arra nged in decreas in g o rder o f mag n i-

290 Convener Transfer Frmctiom
tude:
(8.85)
When the ineq ualit ies of Eq. (8.85) are sa tisfied, then the exp ress ions for a 1, ... , a,. of Eq. (8.84) are each
dominat ed by thei r firs t ter ms:
a1 =t1
a2=t1t2
='C1t2'T3 (8 .86)
ww
a3
w.E
TI1ese expressions can now be solved for the time constants, with the res ult
asy t, =-"
-
a,
a1
(8 .87)
En
'!3 "' ~
a,
gin
Hence, if
eer
ing
(8.88)
then the polyno m ia l P(s) given by Eq. (8.82) has the appro ximate factorization
.ne
(8.89)
ote that if the origi nal coeffic ie nts in Eq. (8.82) are simpl e fun c tion s of the circu it ele ments, then the
approx imate roots given by Eq. (8.89) are s imil ar simp le fun ctions of the circuit elements. So approxi -
t
mate ana lytical ex press ions for the roots ca n be obtai ned . Nu me ri cal val ues are substituted into
Eq . (8.88) to justi fy the appro ximati on.
In the case where two of the roots are not we ll separated, the n one of the inequ alities of
Eq. (8.88) is violated. We can th en leave the co rrespo nding terms in quadrat ic form . For exa mple, sup-
pose tha t inequ ality k is not satisfied :
(8.90)
Then an approx imate factorization is

8./ Review of Bode Plo1.1 291
(8.91)
IIG Ilda ICI)

'° 20 log w{
Th e condi tions for acc uracy of th is approx im a ti o n are
(8.92)
Comp lex conjugate roots can be approx im ate d in th is manner .
ww Wh en the first in equ a lity of Eq. (8.88) is violate d , th at is,
(8.93)
w.E
then the firs t two roots should be left in qu adrat ic for m
asy (8.94)
Thi s approxi matio n is ju stified provide d that
En
gin (8.95)
If none of th e above approximations
eer
is j ustifie d , th en th ere are three or more roots th at are close in mag-
nitude . One mu st then resort to c ub ic or higher -or der form s.
As an examp le, co nside r the damp ed EMJ filter illu strated in Fig . 8.28. Filters such as th is are
typically placed at the power input of a co nverter, to attenuat e the sw itch in g harm o nics present in the
ing
co n verter in put c urre nt. By c ir cui t ana lysis, on ca n show th at th is fi lte r exhi bit s the follow in g transfer
.ne
functi on:
Lt+ L2
- i'"(s) I + s . R----
t
G(s) - - ::; --- - ---- · · · · ·· ·· · (8.96)
- i,.(s) I L 1 + J.1
+s--R-+s 21 c.··
·1
3
+s - R-
L 1L 2 C
This tran sfe r function co nt ains a third -order denomina tor , with the follow ing coefficie nt s :
Converter
C
Fig. 8.28 Input EM I filter examp le.

292 Co,werter Transfer F1111clio11s
L1 +L2
a 1=--R-
(8.97}
a2"'L1C
L 1L 1C
aJ =-R-
It is desired to facto r the de nom ina tor, to obta in analyt ica l expressio ns for the pole s. The correct way to
do this dep ends on the numerica l values ofR, Lp Lz,
and C. When the roots are real and well sepa ra ted ,
then Eq. (8.89) pred icts that the denominator ca n be factored as follows:
ww ( 1+s L•+
R
L2)(I + .vRC-I,
/, + L 1
1
i -) ( 1 +s ~i
R
(8.9~)
w.E
Accord in g to Eq. (8.88), this approx ima tion is justified provi ded that
(8.99
asy
These in equalities ca nn ot be satisfie d unle ss L 1 > L2 . Wh en L 1 ;c:;, !'2, then Eq. (8.99) ca n be fur th er sim-
En
plified to
(8 . 100 )
gin
The approx imate factor izati on, Eq. (8 .98), can th en be further si mplifie d to
(l +s 1)( +s!?C)(
I l + s ~1 )
eer (8 .101 )
ing
Thus , in this case the transfer function conta ins thre e well sepa rated real pole s. Equatio ns (8.98) and
(8. 101) represent approximate analyt ical factorizations of the de nomin ator of Eq. (8.96). Although
.ne
numerical values mu st be su bstituted into Eqs. (8.99) or (8. JOO) to j ustify the approx imatio n , we ca n
nonethe less express Eqs. (8.98) and (8. 101) as ana lyt ical functions of L 1, Lz,
R, and C. Equ atio ns (8 .98)
and (8.10 1) are des ign-oriented, because they y ie ld insig ht in to how the eleme nt va lu es ca n be chosen
such that give n spec ified po le freq uencies are obta ine d .
When the second inequa lity ofEq. (8.99) is vio lated ,
t
(8,102)
then the second and third roots should be left in q uad ratic fo rm:
( I+
l+.1 · / ,-/?- L2)(l + .1-RCL 1L+Li1 ,
+ .1·-/. -1 · )
1, L 2C
(8.103 )
This exp ression fo llows from Eq. (8 .9 1), wi th k = 2. Equa ti o n (8.92) predicts that this approxima ti on is
ju st ified provided that

8.2 AnalysiJ of Converter Transfer Frmctiom 293
(8.104)
In appli ca tion of Eq. (8.92), we take a 0 to be equ a l to I. The inequali ti es of Eq. (8. 104 ) can be si mp li fied
to obt ain
L
and ,f » RC (R.105)
No te that it is no longer requ ired th at RC~ L.ilR.Equat ion (8.105) im plies that fac tor iza ti on (8.103) ca n
ww
be fur the r simpli fied to
(8.106)
w.E
Thu s, fo r this case, the transfer fun ct ion conta ins a low -frequency pole that is well separated from a high -
fr eque ncy quadra tic po le pair. A gain , the fac tored result (8.106) is ex pressed as an a nal ytic al func ti on of
asy
the eleme nt va lues , and co ns eq uent ly is des ign-or iented.
In the case whe re the first in eq uality ofEq. (8.99) is vio lated :
En (8.107)
gin
then the first and second roots shou ld be left in quad rat ic fo rm :
eer
(8. !08)
ing
This express ion fo llows di rec tly from Eq. (8.94) . Equation (8.95) pre di cts that thi s approx ima tio n is j us-
tified provi ded that
.ne
(8. 109)
t
tha t is,
(8.1 lU)
For thi s case, the transfer func tion con tains a low -freq uency qua d ratic pole pa ir tha t is well separ ated
from a hi gh-frequency real pole. If none of the above approxim ations are j ustified , then all three of the
mots are s imila r in ma gnitu de . We mu st th e n find other mea ns of dea l ing w it h the ori gi nal cu b ic poly no -
mial. Design of input filters, includ in g the filter of Fig. 8.28, is cove red in C ha pter 10.
8.2 ANALYSIS OF CONVERTER TRANSFER FUNCTIONS
Let us next derive analy tica l expressions for the poles, zeroes, and asympto te ga ins in the transfer func -
tions of the ba sic conve rter s.

294 Com,erter Tra11sfe

r F1111
ctions
/J(s ) c ii( s) R
Fig. 8,29 Huck-bo ost converter t:quivalent c ircu it deriv ed in Secti on 7.2.
ww
8.2.1 Example: Transfer Functions of the Buck-Boo st Converter
w.E
The small-sig nal eq uivalent circuit model of the buck-boost converter is derived in Section 7.2, with the
result [Fig. 7. I 6(b)] repeated in Fig. 8.29. Let us derive and plot the control-to-output and line-to-output
transfer functions for this circuit.
The converter contains two independent ac inputs: the control input d(s) and the line input v/s).
asy
The ac output voltage variations ii(s) can be expressed as the superposition of terms arisi ng from these
two inputs:
En (8.11 J)
Hence, the transfer functio ns G,_

,j,.s)and G,,gCI")can be defined as
G,.,{;·) = ~v(..:.....
,) gin
:1n<l G,.,(s) = •v{.i) I
eer
(8 . 112}
d (s) . · v,(s ) .
1) =
''.i:-C. n i.; ,,c,,-n
ing
To find the line-to-output transfer function G,,l1·), we set the ,i sources to zero as in Fig. 8.30(a). We can
then push the v/s) source and the inductor through the transformers, to obtain the circui t of Fig. 8.30(b).
The transfer function Gv,,(s) is found usi ng the voltage divider formula:
.ne
(a)
+
c ii(s) R t
(b)
+
C ii( s) R
Fig. R.~ Ma11ipulatio11of bt1ck-hoos r cqui valern circuit 10 /ii1< I rile li11
c -ro-outptll 1rnn.,fer fu111:!io
n G ,,/rJ ;
(u) se t d sou rces to i.ern: (b) push it1duc tor and OKso urce thrnu g h rra11~formc r~.

8.2 Analysis of Co11

~er1
· er Transfe r F11
11cti
ons 295
v(s))
G ,/ s) = -;;--( I D (Rl:k) (8.113)
v~ s J(,1 - 0 D' .4...+ (RII _L)
D'2 sC
We nex t exp and the paraliel co mbin ation, and express as a rational fr action:
G {
'B s
)=(- D'D)sL (~}
( R )
ww n·1 + 1 +s RC (8.JJ4 )
w.E
We aren 't done yet - the next step is to man ipu late the expr essio n int o norma li zed fo rm , such that th e
coe ff icie nts of s° in th e nume rator and denomi nat or poly nom ia l s are eq ua l to one . Th is ca n be acco m-
asy
pli shed by div idi ng the nu me rat or and deno m inator by R:
I ={-12)
G (s)
,g
= f,v(s)
g
(s) .
d(• ) = O
En lY I + r _l_
' D'2 R
1
+ r2 L C
. D'2
(8. 115)
gin
Thu s, the line-to-outpu t transfer fun ction co ntains a de gain 0. 0 and a quadra tic pole pa ir :
Gv/. 1') ., G,o . I ( .

l + --2. · +
Qw0
·\_
Wo
)2
eer (8. 116)
ing
Ana ly tica l expr ess ion s for the sal ient fea tur es of the line-to -o utpu t tra n sfer fun ction are fo un d by eq uat -
ing like terms in Eqs. (8. 115) and (8.116). Th e de gain is
G_.o= - rlD
.ne
(8. 117)
t
By equatin g the coeff icients of s 2 in the de nom inators of Eqs. (8. 115) an d (8.116), we obta in
(8 . l 18)
Hence, the angular comer freq uency is
D' (8. 119)

Ulo = ,/ TJ.:
By equating coefficie nts of s in the de nominators of Eqs. (8.1 15) and (8.116), we obtain
(8. 120)
Elim inat ion of w0 usi ng Eq. (8. 119) and so lution for Q leads to

296 Co111
1erter Tra11sferFrmcrions
(a)
+
I d(s) c v(s) R
(b)
ww VR- V
----U-
~
d (s)
l.,
D'2
Jd( s) C
+
v( s) R
w.E
Fig. 8.31 Manipula tion of buck-boost ec111i valenr c ircuit to find the control-to-ourput transfer function G../4s):
asy
(a) set v~ source to zero ; (b) push inductor and voltage source through transformer.
EnQ=D
'R/t (8. 121)
gin
Equa tions (8.1 17), (8. 119), and (8.12 1) are the des ired res ult s in the a nalysis of the line -to-o ut put tra ns-
fer functio n. Tiu:se exp ress ions are usefu l not only in analys is situati ons, where it is desired to find
num er ica l val ues o f the sa lient fea tu res G R0, w0 , and Q, b ut also in des ign situ atio n s, where it is des ired lo
eer
select nu me rica l values for R, L, and C such that g ive n values o f the sa lie nt feat ures are obta ine d.
Deriva tio n of the co ntro l-to-o ut put tran sfer fu nct ion Gwts) is co mplicate d by the prese nce in
Fig. 8.29 of thr ee generator s tha t depe nd on d(s). One good way to find G,/s) is to man ip u late the cir -
ing
cu it mode l as in the derivat io n of th e ca non ical mode l, Fig. 7.f/J . An ot her app roach , used here , em ploys
the principle of superposition. First, we set the iii;source to zero . Th is shorts the input to the I :D .tra ns-
for mer, and we are le ft w it h th e c irc u it illu stra ted in Fig. 8.31 (a) . Nex t, we push the ind ucto r and d volt-
.ne
age source th ro ugh th e D ':I tra nsfor me r, as in Fig. 8.3l( b).

Figure 8.3 1(b) co nt ai ns a d -dep cndc nt voltage source and a ti-depend en t current source. The
t
transfer function G,i s) can therefore be expressed as a superpos ition of terms ar ising fro m these two
sources. Wh en the cu rrent source is set to zero (i.e. , open -circu ited) , the c ircuit of Fig. 8.32(a) is
obt a ine d . Th e o utp ut v(s} can th e n be expressed as
v(.;-) =(- V~
-V) (RI
!±,) (8.122)
d (s) D' 0.,·2L+ (RII_!_,
.1·C
)
Wh en the voltage source is set to zero (i.e., sho rt-c irc ui ted ), Fig. 8.3 l (b) redu ces to the circ u it ill ustra ted
in Fig. 8.32( b). Th e output 0(,1')c an the n be exp ressed as
(8.12 3)
Th e tra nsfer fun ctio n G,Jf) is the sum of Eqs. (8 . 122) and (8. 123):

8.2 Analysis of Converter Tramfer Functions 297
(a)
+
V, - V .
---rr- d(s) C v(s) R
Fig. 8.32 Solution of the model of Fig .
8.32(b) by superp osition: (a) 1:urrent
source set to zero; (b) voltage source set
10 zero .
(b) +
ww Jd(s) L
D '2
C v(s) R
w.E ( V V) (RII_)-}
asy C +t( S~ IIRII_J__)
c ,,i(.s)= -~ 5 (8.124 )
D ~
D' 2
+ (R11__l,)
sC
D sC
En
By algebra ic manipulatio n, one can re duce this express ion to
G,js ) = ~(s) I = (- Vg
;,V) gin
( 1- s D' VU - V )
(1+s__J,_+s2
(~ ) (8. 125)
d (s),
s
1,1: 0
D'' R
LC)
D'2
eer
Th is eq uat ion is of th e form
( I - ~ ,) ing
.ne
(8.126)
G,,,(s) aaG.ro( )
I+ _ s_ +
Qcoo
(...L
wo
)2
The denom in ators ofE q . (8.125) and (8.115) are ident ical, and hence Gvj...s)and Gv/s) sha re the same Wo
and Q, given by Eqs. (8. 119) and (8.121). The de gain is t
(8.127)
The angu lar frequency of th e zero is found by equatin g coeffic ients of s in the numerators of Eqs . (8. 125)
an d (8.126). One obtains
(8.128)
(RHP)
This zero lies in the right half -plane. Equations (8 .127) an d (8. 128) ha ve been simp lified by use of the de
rela tions hips

298 Converter TranJfer flm ctio11s
V=- g V~ (8,129)
- V
I - -IJ'R
Equations (8.119) , (8 .121), (8. 127), and (8.128) co nstitute th e resul ts of the ana lysis of the contro l-to -
output tra nsfer function: ana lytical ex press ions fo r the sa lient features (,10 , Q, G,/0' and ul,. These expres-
sio ns can be used to choose the element values such tha t give n desired values of the salie nt features are
obta.ined.
Having found analyt ica l exp ress ions for the sa lient features of the transfer functio ns, we can
ww
now plug in numer ica l values and const ru ct the Bode plot. Suppose tha t we are given the fo llow in g val-
ues:
D=U.6
w.E R= ion
V~ = 30 V
/. = 160 µH
(8,130)
asy C= 160 µF
We can evaluate Eqs . (8.117) , (8.1 19), (8 . 121), (8.127 ), and (8.128), to determin e nume rical va lues of the
En
salie nt features of the transfe r functions . The results are :
1=g.=
10,...,
IVI
1.5=>3.SdB
gin
[ G,ro[ = DD'= 187.5 V ~ 45.5 dBV
Olo l)'
fo = 2n = 2.11.fLC = 400 H,.
Q = D'R\0 / , = 4 => 12 dlJ

-
eer (X.13 l)
. w D'2R
! , = 2~ = 211Dl = 2.65 l( Hz
ing
The Bode plot of the magnitude and phase of Gv,1is cons tru cted in Fig. 8.33. The transfer funct ion con-
.ne
tains a de gain of 45.5 dBV, resonant poles at 400 Hz havin g a Q of 4 ~ 12 dB, and a right half-plane
zero at 2.65 kHz. The resonant poles contr ibute - 180 ° to th e h igh -frequency phase asymptote , wh ile the
righ t ha lf-plane zero contributes - 90° In addition, the in verting characte ristic of the buck -boost con -
verter leads to a 180° phase reversa l, not incl uded in Fig. 8.33 .
The Bode plo t of the magnitude and phase of the li ne -to-output tra nsfer func tion (;,,R is con - t
struc ted in Fig. 8.34. This transfer funct ion co ntains the same reso nant poles at 400 Hz, but is missing
the right half -plane zero. The de gain G8 11 is equa l to the conversion ratio M(D ) of the converte r. Again ,
the l 80° phase reversal, caused by the inverting characteristic of the buck-boost conve11er, is not include d
in Fig. 8.34.

8.2 Analysis 0J C011

1erter
1 Transfer F1111
ctiom 299
80dBV
L. Gvd
60 dBV 1-G_"°_~..;.l..;.!.;;..~ _..__ = 4

·.;;..¥.;;..dB;;;..V__,'---* Jq ~ 12 dB
40dBV lo
400 Hz
20dBV
10 · 1'2Qfo
o· 300Hz
OdBVt------"-t:I o·
L. Gvd f,110
ww -20d8V
-40dBV
260Hz -90"
- 180"
w.E
lOf,
26kHz - 210·
+----------------+----= ,,,...--------1- - 270"
lOHz lOOHz I kHz IOkHz lOOkH
z I MHz
asy f
Fig. 8.33 Bode ploc of the comrol-to-out1m1lrnnsfer funcciun G,,,1, huck-boost rnnvcncr example , Phase reversal
En
owing 10 Ol!lpulvoltage inversion is not i ncludcd.
gin
20dB
IIG.8 II Go=l.5 t
o dB 1-- ' - ~:....::.:3·.::.5-=d=B-..::::...--1.
..\ _ t_Q= 4 => 12 dB
IIG,8 11 lo
- 20dB
400Hz
eer
-40 dB
-60dB +-----
o· --
10-112Qo fo
300 Hz
~ o· ing
.ne
- 80dB - 90"
+----- 100----------------4
_______ -_1_so_·--+
- 1so·
-270"
t
I0 Hz Hz I kHz I0kHz 100kHz
Fig. 8.34 Bode plot of the li11c-10-ot1tput lrnnslcr funccion C"K' buck-boo,t converter example. Phase reversal
owing 10 output vnlrngc reversal is nm inclwled.

300 ConverterTransfer F1111

ctio11s
Tobie 8.2 Salielll features of the small-signa l CCM transfer funtli ons of ,ome basic de--dc converters
Converter Gso GdO roo Q ro,
Buck D V 1 co
D ./LE Rjf
Boost I V lY D"2 R
D'Rlf
D' D' ./LE -r-
Buck-boost D V lY D"2R
- D' D'Rlf
ww
DIY ./TX DL
w.E
8.2.2 Transfer Functions of Some Basic CCM Converters
The sa lient featu res of the line- to-outpu t and control-to -output transfe r fu nc tio ns of the bas ic buck,
asy
boost, and buck -boost converters are summa rized in Table 8.2 . In each case, the con trol -to -output tran s-
fer functio n is of the form
En
c.,,(s) = c,iu(
(i-oJ;)
.
I+Qwo
s +(
~·-:--;-)
)-
(8 .132)
and the lin e-to -outpu t transfer fun ction is of the form ginolo
eer (8 .133}
ing
The boost and buck -boost converters ex hibit co ntro l-to-output transfer fun c ti o ns co nt ai ning two poles
.ne
and a right half -plan e zero. The buc k co nver ter Gv/s) exh ibi ts two poles but no zero. The line -to -out pu t
transfer func t ions of all three ideal conve rters co nta in two poles and no zeroes.
The se resu lts can be eas ily adapted to tr ansformer -isol ated vers io ns of the buck, boo st, and
buck -boost converters. The tran sfo rmer has neg ligibl e effect on the transfer fun ct io ns G,,/ s) and G,,JJ:),
other than in tro duc tion of a turn s rat io. For example , when the transformer of the bridge topology is
driven sy mm etr ica lly, its mag netizin g inductance does not co ntribute dy na mi cs to the conve rter s mall -
sig nal transfer functions. Likewi se, when the tra nsfor mer magne tizing inductance of the forwa rd con-
t
verter is reset by the in put voltage vx, as in Fig. 6.23 or 6.28, then it also co ntrib ute s negl ig ible dynam ics.
In all transforme r-isolated conve rters based on the buck , boost, and buck-boost co nverters, the lin e -to-
output trans fer fun ct ion G 0 /s) should be multi pl ied by the transfo rm er turn s ratio; the transfer fun ctio ns
(8.132) and (8 .133) and the parameters listed in Table 8.2 can otherwise be dir ec tl y applied.
8.2.3 Physical Origins of the Right Half-Plane Zero in Converters
Figure 8.35 contai ns a bl ock dia gram tha t il lustr ates the be hav ior of the right ha lf-plane zero . At low fre-
quenc ies, the gain (slw.) has neglig ib le ma gn itude, and hence a,,,,1 "' 11.,,. At hi gh frequenc ies, where the

8.2 Analysis of Converter Transfer Functions 301
Fig. 8.35 Block diagram hav ing a right half-plane

zern transfer function, as in Eq. (8.32), with m0 "" w, .
ww
magnitude of the gain (s/w,) is much grea ter than I , u,,,., ~ -( slw, ) u;,,· The nega tive sign causes a phase
reversal at high freque ncy . The impl icat io n for the trans ient response is that the output initially tends in
the opposite direction of the final value.
We have seen that the contro l-to -output transfer fu nctio ns of the boost and buck -boost conve rt-
w.E
ers , Fig. 8.36, exhibit RHP zeroes. Typica l tran sie nt response waveform s for a step change in duty cyc le
are illustra ted in Fig. 8.37. For this examp le, the converter initially oper ates in equilibrium, at d = 0.4
and d = 0 .6. Equil ibrium inductor current il (I), diode current i0 (1), and output voltage v(t) wavefo rms are
asy
illustra ted. The average diode current is
(&.134)
En
By capacitor charge balance , this average diode current is equal to the de load current when the converte r
operates in eq ui Iibri um. At time 1 = ,1, the dut y cycl e is increased to 0.6. In conseque nce , d' decreases to
gin
0.4. The average diode curren t, given by Eq. (8. 134), therefore decrea ses, and the output capaci tor begins
to discharge. The output voltage magnitude initially decrease s as illustrated.
(a) eer
L
+ ing
.ne
C R V
t
(b)
v, C R V
L
Fig. 8.36 Two basic converters whose CCM contro l-tu-output trans fer functions exhibit RHP zeroes: (a) boost,
(b) huek-boost.

302 Converter Transfer F1111ctiom
Fig. 8.37 Waveforms of the converters
ww
of fig. 8.36, for u ste p re.,pnr1sci 11duty
cycle. The u1•erage diode cu1n:n t and out-
put voltage initially decreuse, as predicted
by the RIIP zero. Eventually, the imluctor
w.E
curre11t increases, causing the averag e
diode current and rhe output voltage <o
increase.
asy I v(r) I
En
gin
d = 0.4
i
d =a0.6
eer
ing
The increased duty cycle causes the inducto r curre nt to slow ly in crease, and hence the average
diode curren t eventually exceeds its orig inal d = 0.4 equ ilib rium va lue. Th e output voltage eventually
increases in magnitude, to the new equ il ibri um va lue corresponding to d = 0.6.
.ne
The presence of a right half -plane zero tends to destabil ize w id e- bandwidth feedback loops ,
because during a tr ansie nt the outp ut ini t ia ll y cha nges in the wrong direction . The phase marg in test for
feedback loop stabi lity is discussed in the next chapt er; when a RHP zero is present , it is d iff icult to
obta in an adequate phase mar gin in convent ional sin gle-loo p feedbac k systems having wi de ban d w idth.
Pred iction of the right ha lf-pl ane zero, and the consequent expla natio n of why the feedb ack loops co n- t
troll ing CCM boost and buck -boost converters tend to oscillate , was one of the early successes of aver -
aged converter modeling.
8.3 GRAPHICAL CONSTRUCTION OF IMPEDANCES AND TRANSFER FUNCTIONS
Often, we can dra w approximate Bode di agrams by in spect ion , without large amount s of messy algeb ra
and the inev itab le associated algebra mi stakes . A great dea l of ins ight can be ga ined into the operation of
the ci rcuit usi ng this method. It becomes clear which components dominate the c irc uit res ponse at vari -
ous frequencies , and so suitable approximations become obvious. Analytica l expressions fo r the approx -
im ate corner frequenc ies and asymptotes can be obta ined direc tly . Impe dan ces and transfer functions of
quite complicate d ne two rks c.m be const ru c ted. Thu s in s ig ht ca n be ga in ed, so that the des ign engi nee r

8.3 Graphical Constructio 11of l111p

eda11ces and Transfer Functions 303
can modify the circuit to obtain a desired frequency response.

The graphical construction method, also known as "doing algebra on the graph," involves use of
a few simple rules for combining the magnitude Bode plots of impedances and transfer functions.
8.3.1 Series impedances: Addition of Asymptotes
A series connection represents the addition of impedances. If the Bode R

diagrams of the individual impedance magnitudes are known, then the IOQ
ww
asymptotes of the se1ies combination are found by simply taki ng the
largest of the indi vidual impedance asymptotes. In many cases, the
result is exact. ln other cases, such as when the individual asymptotes ~~ c
w.E J~
have the same slope, then the result is an approxi mation; nonetheless,
the accuracy of the approximatio n can be quite good.
--+_____ l µF
Consider the series-connected R- C network of Fig. 8.38. It is
desired to construct the magnitude asymptotes of the total series imped-
ance Z(s), wher e
asy Fig. 8.38 Series R- C network

example.
(8.135)
En
Z (.~) = R + .I'~.
Let us first sketch the magnitudes of the individua l impedances. The 10 Q resistor has an impedance
gin
magnitude of 10 Q ::::)20 dB.Q. This value is independent of frequency, and is given in Fig. 8.39. The
capacitor has an impedance magnitude of 1/(l)C. This quantity varies inversely with rn, and hence its mag-
nitude Bode plot is a line with slope - 20 dB/decade. The line passes through 1 Q::::) 0 dB~}at the angu-
lar frequency w where
_ !_ _ ,,.., eer
ing
(8.136)
(JJC- ••
that is, at
.ne
(!U37)
80dBQ 10 kQ
t
60dBQ lkQ
40dBQ 100 11
20dBQ JOQ
0dBQ I Q
-20dB11 0. 1 Q
IOOHz I kHz lOkHz 100kHz I MHz
Fig. H.39 Impedance magnitudes of the individualelemen/s in the network of rig . 8.38.


ctions
80dBQ IO k.Q
1211
60dBQ lkQ
40dBQ 1()0.Q
20dBQ
I, ···-..., 10n
0 ··-•••.
I - 16 kHz ······, . l
OdBQ 2nRc- · ···.........we lQ
ww
··········-....
-20dBQ 0.1.n
IOOHz I kHz IO kHz 100 1:.
Hz ! MHz
w.E
Fig. 8.40 Constru ction of the composite a.~ymptote~ of IIZ II. The ,isymptotcs of the serii:s comhi natio n can be
approximated by simply se lecting the larger of the individual resistor and capacitor asymptotes .
In terms of frequ e ncy f, this occurs at
asy f = 2~ = ~~6 = 159 kHz (8.138 )
En
So the capac itor imp edance mag nitude is a line with slope -2 0 dB/dee, and which passes throu gh O dBQ
at 159 kHz, as sho wn in Fig. 8.39. It shou ld be note d that , for s imp licity , the asymp totes in Fig. 8.39
20 lo g 10 (R/1 .Q) and 20 log 10 ((l/wC)/1 Q).

gin
have been labe led R and 1/roC. But to dr aw th e Bode plot, we mus t actua lly plot dBQ; for exa mple,
Let us no w co nstr uct the magnitude of Z(.s), given by Eq. (8 .135). The magnitude of Z can be
ap pro ximate d as follo ws:
eer
IZ<
·Jw)
ll=IR
+- 1
) WC I=\ R
I
(J)(.'
for R :c,, 1/wC
for R « J/roC
ing (8. 139)
.ne
TI1e asymptotes of the series combinat io n are simp ly the larger of the in div idua l resistor and capac itor
t
asymptotes , as illu strated by the heavy li ne s in Fig. 8.40. For th is exa mp le, the se are in fac t the exact
asymptotes of IIZ II. In the limiting case of zero frequency (de), the n th e ca paci tor ten ds to an open cir-
cuit. The series co mbina tion is th e n domi nate d by the c ap aci tor, and the ex act fun c ti on ten ds as ympt oti-
ca lly to the capacitor imp eda nce ma gnitu de . In the limitin g case of infinit e frequency , then the capacitor
tends to a short c ircu it, and th e tota l imp ed ance becomes simp ly R. So the R and 1/w C lines are the exac t
asy mptote s for thi s exa mple.
The corne r fre qu enc y / 0 , where th e asymp totes intersect, ca n now be eas ily dedu ce d. At a ng ul ar
frequ ency w0 :,a; 21t/0, th e two asy mptotes are eq ual in va lue:
1.e- -R (8 ,140)
ffiu'-'
Solu tion for ro0 and/ 0 lead s to :

8.3 GraphicalCo11strnctio11
of Impedancesand TransferFimcrio11
I 305
w
o
=-'- = --- 1- · · - =!Os rad/sec
RC ( JOQ)(HY 6 F) (8,141)
fr=
0
Wo =-l
211 2rtRC
·= 16kH z
So if we can write analytical expressions for the asymptotes, then we can equate the expressions to find
analytica l express ions for the corner fre quencies where the asy mptotes inte rsect.
The dev iatio n of the exact curve fro m the asymptotes fo llows all of the usua l ru les. The slope of
the asymp totes changes by +20 dB/decade at the corner freque ncy / 0 (i.e ., from - 20 d BQ/decade to
0 dBWd eca de), and hence there is a zero at f = .hi· So the exact curve deviates from the asympto tes by
ww
+3 dB.QatJ=J~. and by +I dBQ atJ= 2fo and atJ =JJ2 .
8.3.2
w.E
Series Resonant Circuit Example
As a second example, let us construct the magn itude asymptotes
Z(s) asy
for the series R- ~C circuit of Fig. 8.41. The series impedance Z(s) is
= R + st+ 1
l. (8. 142)
En
.t
Z(s)
The magnitudes of the indiv idua l resistor, inductor , and capacitor asymp -
__.
totes are plotted in Fig. 8.42, for the values
R = l k~l gin
l,= 1 rnH
C=O,l µF
eer
(8. 143)
The series impedance Z(s) is dominated by the capac itor at low frequency ,
by the resistor at mid frequencies , and by the inductor at high frequenc ies,
Fig. 8.41 Series R-~C
network example. ing
as illustrated by the bold line in Fig. 8.42. The impedance Z(s) contains a
.ne
zero at angular frequency 001, where the capacitor and resistor asymptotes intersec t. By equating the
expressions for the resistor and capacitor asymptotes, we can find OJ 1:
(It 144)
t
IIZII
IOOdBQ IOOkQ
80d.BQ !Olen
Fig, 8.4:?. Graphka l co n-
struction of IIZ IIo f the series 60dBQ I ill
R-/,--C netw ork of Fig. 8.4 1, R J; ·········
-····--... ..--·····
·1;
~ --~,,c:
for the element values spe ci-
fied by Eq. (S. l43).
40 dBQ !OOQ
20 dBQ "'.'.:,// /> < ::,, IOQ
OdBQ -1---~·~
···_···_···_
···---+----- -+------+----- ··....
·· I Q
JOOHz I kHz IOkHz 100 kHz !MHz

306 Co11venerTransfer F1111ctio11s
! 00dBQ 100 I&
80dBQ l OkQ
60dBQ l kQ
fo
40dBQ R 100 Q
20 dBll ~
··· · ...•.....·,;:;;_-/····:::: :::/·, · .. £'···
···,.e,•...••.... ,.. IOQ
ww 0 dBQ +------------------+---------
100 Hz I kHz 10 kHz 100 kHz
IQ
I MHz
w.E
Fig. 8.43 Grnphica l construction of impe<larn:c asymptotes for the serie~ H.- L-C network exa mpl e , with I{
decreased tu 10 n.
A second zero occurs at angular frequency 002, where the inductor and resistor asymptotes inte rsect.
asy
Upon equating the expressions for the resistor and inducto r asympto tes at w,, we obta in the followi ng :
(K.145 )
En
So simple express ions for all important featu res of the magnitude Bode plot of Z(s) can be obtaine d
gin
directly. It should be noted that Eqs. (8.144) and (8.145) are approximate, rathe r than exact, expressions
for the corner frequenc ies W 1 and 002 • Equat ions (8.144) and (8.145) coincide wit h the resu lts obtained
via the low-Q approximation of Section 8.1.7.
eer
Next, suppose that the value of R is decreased to IO ~2.As R is reduced in val ue, the approxi -
mate come r freque ncies ffi 1 and hl 2 move closer together un til , at R = JOO!l, they are both JOOkrad/sec.
Reducing R further in value causes the asymptotes to become indepen dent of the value of R, as ill ustra ted
in Fig. 8.43 for R = 10 Q. The IIZ II asymptotes now switc h directly from wl to I/WC.
ing
So now there are two zeroes at ul = w0. At corner freque ncy Ol0, the inductor and capac itor
.ne
asymptotes are equal in value. Hence,
(8.146)
Solution for the angular corner freque ncy IDn leads to

t
ulo "' o/, JC (8 , 147)

.
At w ==(l) 0 , the inductor and capacito r impedances both have mag nitud e R0 , called the characte ristic
impedance.
Since there are two zeroes at W ==(ilo, there is a possibility that the two poles could be complex
conjugates, and that peaking could occur in the vic init y of w = w11• So let us investigate what the actua l
curve does at W = ffi0 . The actu al value of the series impedance ZU<ilu) is
(8. 148)

8.3 Graphical Construction of lmpeda11

ce.sa11dTransfer Func1io11
s 307
IOOdBQ IOOkQ.
80dBQ IOkQ
60dBQ I ill
40dBQ IOOQ
20dBQ IOQ
ww OdBQ
JOOHz I kHz IO kHz IOOkHz
1n
I MHz
w.E
Fig. 11.44 Actual impedance magnitude (solid line) for the series resonant R-L - C ex.ample. The inductor and
capacitor impedances caned out at/= / 0, and hence Z(iru0) = R.
asy
Subs tit ution of Eq. (8.146) into Eq. (8. 147) leads to
R (8.149)
Z(jw 0) = R + )R 0 + -?-
= R + )R 0 - jR O = R
En 1
At W = rn0 , the indu ctor an d ca pacitor im pedance s are equal in magnitude but oppo site in pha se. Hence ,
gin
they exact ly cancel out in the series impedance, and we are left w ith ZUw 0 ) = R, as illu strate d in
Fig. 8.44. The act ual curve in the v ic init y of the resonance at w = w0 can dev iate significa ntly fro m the
asymp totes, because its value is determined by R rath erth an OOLorI/WC.
eer
We know from Sect ion 8.1.6 that the dev iatio n of the actual curve from the asymptotes at CJ.l=
w0 is equal to Q. From Fig . 8.44, one can see that
ing (8.150)
.ne
or,
Q -- Rn (!U51)
t
R
Equat ions (8.146) to (8. 15 1) are exact result s for the series resonant c ircu it.
The practice of adding asy mpt otes by simp ly selecting the larger asymp tote can be appli ed to
transfe r funct ions as well as impedance s . For exa mple , suppos e that we have already co nstruc ted the
mai,'llitude asymptotes of two transfer functions , G 1 and G 2, and we wish to find the asymptotes of G =
0 1 + G 2. At each freque ncy, the asy mptot e for G can be ap proximat ed by sim ply selecting the larger of
the asym ptotes for G 1 and G 2:
(8.152)
Corner frequen c ies can be found by equatin g ex pres sions for asymptotes as illu strated in the prece din g
exa mple s . In the next chap ter, we will see that thi s appro ac h yields a sim ple and powerfu l method for
determ in ing the closed -loop trans fer functions of feed back systems .

308 Co11verte
r Transfer F1111crio11s
8.3.3 Parallel Impedances: Inverse Addition of Asymptotes
A para llel comb ina tion represents inverse add iti on of impedances :
Z - I (8.153)
P"' - I
-+-+ I ...
zt Z2
If the asy mptotes of the in dividua l imp eda nces Zl' Z 2, ..• , are known , then the asy mp totes of th e para lle l
co mbination ZJH,,.can be found by s imply sele cti ng the smalles t indiv idu al im ped ance asym pt ote . Thi s is
ww
true beca use the s malles t imp eda nce will have the larges t inverse, an d will do m ina te the inverse sum. As
in the case of the se ries imped ances, this procedure will often yie ld th e exact asy mpt otes of Zp ar'
Let us co nstru ct the magnitud e asym ptot es fo r the p aralle l
w.E
R- L- C ne tw ork of Fig. 8.45, us in g the fo llowing element va lues:
R= !Oil
L= lmH (8 . 154)
Z(s)
__.,
R L C
asy
C=0.l µF
Im pedance ma gnitu des of the indi vid ua l e le ments are illu stra ted in l<ig. 8.45 Parallel R-l.r-C network
En
Fig . 8.46. Th e asy mpt otes for the tota l para lle l impedance Z are exainple .
approxim ated by si mp ly select ing the smalles t individu a l ele me nt
gin
imp eda nce , as shown by the heavy line in Fig. 8.46. So the para llel imped ance is dom ina te d by the
ind uctor at low frequ enc y, by th e re sistor at mid fre qu e ncies, and by the capacitor at high frequency .
Approxim ate exp re ssions for the ang ular co rn er frequencies are aga in found by equat ing asy mpt ote s:
eer (8.155 )
Th ese expressions co uld have been obtained by co nventio nal ana lysis, co mbin ed w i th the low · Q app rox · ing
.ne
imation of Section 8.1.7.
80dBQ JOkQ
t
Fig. S.46 Construct ion of ..j'c

........
w ·,········,........ _........
the compos ite a.~ymptotes of 60dBQ I k.Q
... ..-·····-······-····---
~i
~
11Z II, for the parallel R- L-C
example. The asymptote s of 40dBQ IOOQ
!he parnllel comhinarion can
...... .....................:;;
···....·-~ ·_
·: _::.~
_·.·:.·_.-:.-:_~:·_.>_-,_·
:::_.-::.
_~··,_··_···_·..._.........::
....................
be approximated by simply 20dBQ 10.Q
selectiug the smallest of the
individual resistor, inductor,
and capacitor asymptotos.
OdBQ 1n
llZII
- 20 dBQ -¼---- -+-----+- -- ----+ - -- --+ 0.1 Q
100Hz I kHz 10kHz 100kHz 1 MHz

8_3 Graphical Construction of Impedances a11dTran_fer F1111

ctio11
s 309
80 dB.Q 10 k.Q
·····-----... role wL .~-···
·-... .....•····
60dBQ I k.Q
Fig. 8.47 Graphical construc- R .•.., ·-~ ---, •., ...••.. •ce:::::
-:-········ ..
tion of impedance a~ymptotes 40 dB.Q 10O.Q
0
for the parallel R-Lr-C example ,
with R increased to l k.Q.
lo
20dB.Q IO Q
OdB.Q l .Q
ww -20 dB.Q -1-----------+-----1------

100 Hz l kHz JOkHz 100 kHz I MHz
O_l .Q
8.3.4 w.E
Par aJJel Resonant Circuit Example
asy
Figure 8.47 illustrates what happens when the va lue of R in the parallel R- L-C network is increased to
l k.Q. The asymptotes fo r IIZ IIthen become independent of R, and change directly fro m WL to 1/wC at
En
angul ar freque ncy w0 . The corner frequency ro0 is now the freque ncy where the ind uctor and capacitor
asymp totes have equal value:
gin (!U56)
which implies tha t
eer
UJo=
-.f[c'-
A t w "' w0 , the slope of the asymptotes of IIZ II changes fro m +20 dB/decade to - 20 dB /decade, and ing (8.!57)
.ne
hence there are two poles _We should inves tigate whether peaking occ w-s, by determi ning the exact va lue
of IIZ II at W = w0, as follows:
Z(}ffi
0 ) = R 11 = - 1- -- 1~1---
)W0 L 11--:--1----C
JWo . + -_- + }w 0 C
-R
JWof-
(8.158)
t
Subs titu tion of Eq_ (8-156) into (8_158) yields
Z(jw 0 ) = 1 . = ~ - =R
(8.159)
I +-'-+.1_ l_.1...+..l...
R )Ru R0 R Ru Ru
So at w = w 0, the impedances of the inductor and capacitor again cancel out, and we are lef t with
Z(jw 0 ) = R_The val ues of L and C dete rm ine the val ues of the asymptotes, but R determ ines the value of
the actual curve at W = 000.
The actual curve is illustrated in 8_48_ The dev iation of the actual curve from the asympto tes at
W ==Ctlo is

310 Converter Tra11.

,fer F11
11ctio11s
80 dBQ IOkQ
Fig. 8.48 Actual iinpedance

60 dBQ ·:·····
········
···..·,',. ············,...
! ····.....
./···-··
...-· Q .,;;'RI R0
l kn
magnitude (solid line) for rhe 40dBQ Acrual cunte ·· ·· ·:.." ............. R0 I 00 ,Q
parallel H-L--C example, Tl1e fo
inductor and capac itor imped- 20 dBQ IOQ
ances cancel our at / = j 0 , and
hence :I.UW0 ) = H. OdBQ 10
ww -2 0 dBO
JOO
Hz
+---- - -+-------
I kHz 10 kHz
----+------+
100kHz
0. 1 .Q
I MHz
or,
w.E - IRoLuu
IQl.m=IRIJm, (8.160)
asy (!!.16 1)
En
Eq uat ions (8. 156) to (8.16 1) are exact res ults for the para llel resona nt c ircu it.
The grap hica l co nstru ctio n method for impeda nce magn itude s is we ll kno wn , and reactance
gin
paper can be purc hased comm ercially. As illust rate d in Fig. 8.49, th e magn itu des of the imp edances of
various indu cta nces, ca pacitances, and res ista nces are plotte d on se milogar ithmi c axes . Asy mpt otes for
the impedances of R- lr-C networks can be sketc hed directly on these axes, and nu merical val ues of cor-
ner freq ue ncies can then be graphi c ally deter mined.
eer
80dBQ ing 10 1:Q
.ne
60dB Q l kQ
40 dBQ
20dBQ
100.Q
I0Q t
0 dBQ I Q
- 20dBQ lO()m Q
-40dBQ 10 rnQ
-oO dBQ +.c:.=----+~:;__--....,::....:;.. __ __,~c:;_----+-a...::: '-----+ l m.Q

l OHz lOOHz 1 kHz JOkHz 100 kHz 1MHz
Fig. 8.49 "Rea ctanc e pap er" : :in aid for graphi~al rnt1structi on of impeda nces, with the mag ni tudes of various
inductive, capac itive , a nd resistiv e impedan ces p rcplOLt~rl.

8.3 Graphical Co11str11cr

io11of lmpeda11cesa11dTra11sferFrmctions 311
(a) H(s)
~
+
L
ww ---- z, 2z
(b)
L
w.E C R
ZOUI
(c)
--
Z;"
L
C R
asy
En
gin
Fig. 8.50 Two-pok low-pass filter based on voltage divider circuii: (a) transfer function H(s), (b) determination
nf z0 . , . by settini; indept:ndent sources to zero, (c) detcn nination of Z;,,(s).
8.3.S Voltage Divider Transfer Functions: Division of Asymptotes eer

ing
sua ll y, we ca n express transfer functions in terms of impe dances - for example, as the rat io of two
impedances . If we can co nstruct these impedances as desc ribed in the previous sect ions, then we can
.ne
divide to construct the transfer function. In this section, construc tion of the transfe r funct ion H(s) of the
two -pole R- L-C low -pass filter (Fig. 8.50) is discussed in deta il. A filter of this for m appears in the
canonical model for two -pole converters, and the results of this sectio n are app lied in the converter exam -
ples of the next sectio n.
The fami lia r voltage divi der formula shows that the transfer function of this circu it can be
t
expressed as the rati o of impedances Z/2 ;11, where Z;,. = Zi + 2 2 is the network input impedance :
(8,162)
For this exam ple, Zi(-1') = sl , and Z2(s) is the paralle l com bina tio n of R and 1/sC. Hence , we can find the
tra nsfe r func tion asymptotes by co nstruc ting the asymp totes of Z.,,and of the se1ies combi natio n repre-
sented by 2 1,.. and then di viding. Anot her approach , whic h is easie r to apply in this examp le, is to multi -
ply the numera tor an d denom inato r of Eq. (8.162) by z,:

3 12 Con vert er Transf er f11nctio11s
(a) Fig. 8.S1 Graphical constructi on of Hand z,,.,of

the voltage divider circuit : (a) output impedance
z,.,,,;
(h) 1nmsfor function H.
ww
(b)
w.E
asy
En (!!.163)
=
gin
where Z,1111 Z 1 IIZ 2 is the ou tput impedanc e of th e voltage d ivi der. So ano th er way to con struct th e vo lt-
age divi der transfe r function is to first co nstruct th e asymptotes for Z 1 and for the parallel comb in ation
zm,r and then divide . Th is method is use ful when the paralle l c omb ina ti on Z 1 IIZ 2 is eas-
eer
represent ed by
ier to cons tru c t than the series com bin atio n 2 1 + 2,_.It often gives a diff erent a pp rox imate res ult , which
ma y be more (or some tim es less) accurate than the resul t obt ained us ing Z;,,·
The ou tp ut impedance z,,,,, in Fig. 8.50(b) is
zu.,,Cs)= R 11.~· IIsl, ing (8.164)
.ne
The impe dance of the parallel R- L-C network is cons tru cted in Section 8.3.3, and is illustrated in
t
Fig. 8.5 1 (a) for thehig h - Qcase .
Acco rding to Eq. (8. 163), the voltage di vider tran s fer function ma gnitude is IIH II = II II/ z,,,,,
11Z 1 II,This quant ity is const ructed in Fig . 8.51(b ). For W < 0) 0, the asym ptote o f IIZ,,,,, II coinc ides w ith
IIzl II:both are equ al to (J)L. He nce, th e ratio is IIz,,UI
II/IIzl II= l . For (J) > (l)n, the as ymp tote of IIz,,fllIIis
l/coC, w hi le /I 2 1 II is equa l to wl. The ratio then beco me s II7.0 ., , IJ/1

12 1 II= Ilw 2LC, an d hence th e hi gh -
I ............-·······
Fig. 8.52 Effoct of increasi ng Lon the output
ro:::·········
··.-,...............
·.....······:·:::
~::·
s:z.s.:~/: impedance a~ymp101es, corner frequency, an<l
. .....
. ....·l ;·R Q !Ro
··· . ..............Ro
wL
Q-factor.
lo

8.4 Graphical Comtrnc1i011of Convener Transfer F1111

ctio11s 313
ld(t ) R v(c)
ww
Fig. 8.53 Small-signal model of the buck converter, with input impedance Z;.(s) and output impedance
explicitly defined.
frequenc y asymptot e has a - 40 dB/d ecade slope. At lO:::: %, IIZ"'" II has exact value R, whi le II2 1 II has
z00.(s)
w.E
exact val ue Rn,Th e ratio is then IIHU00 0 ) II = IIZ.,,,,V,ll
functio n H has the same (1.)0 and Q as the impe da nce z,,.,,.
0 ) 11/11
Z 1Uu\1) II = RIR0 = Q. So the filter transfe r
It now beco mes obv ious how var iations in element values affec t the salie nt features of the tra ns-
asy
fer function and output impedance. For example, the effect of increasi ng l is illustrated in Fig. 8.52. Th.is
causes the ang ula r resonan t frequency 000 to be reduced, and also reduces the Q-factor.
8.4
En
GRAPHICAL CONSTRUCTION OF CONVERTER TRANSFER FUNCTIONS
gin
The small -signal equi valen t circ uit mode l of the buck converter , derived in Chapte r 7, is reproduced in
Fig. 8.53. Let us construct the transfer functions and terminal impedances of th is converter, using the
eer
graphical appro ach of the prev ious section.
The output imped ance Z,,..,(s)is found w ith the d(s) and vx<s)sources set to zero; the c ircuit of
Fig. 8.54(a) is then obta ined . Thi s mode l coincides with the parallel R- l - C c ircuit analyzed in Section s
ing
8.3.3 and 8.3.4. As illustra ted in Fig. 8.54(b), the output impedan ce is dom inated by the inductor at low
frequency, and by the capaci tor at hi gh frequency . At the reson an t frequenc y J0 , given by
~ - 1
.ne
{8, 165)
JQ - 2rtfEC
t
the output impedan ce is equal to the load resis tance R. The Q-factor of the ci rcu it is eq ual to
(a) l (b)
C R
Fig, 8.54 Construcli on of buck comerter output impcd,.mce z••,{.~);

(a) circ uit model; (b) impedance asymptotes .


11ctio11
s
(a) L
Fig. 8.55 Construction o f the input impedance
Z;,,(s) for the buck co nverter: (a) circuit model;
(b} the individual resistor, inductor. and capacitor
impedance magnitudes; (c) construction of the
C R impedance magnitudes II 2 1 II and II Z 2 II: (d} co n-
Slruction of IIz••, II;(e) final result IIZ;n II.
ww
Z 1(s) .li (s)
(b) I wL
-~:~:.
w .E:~:~
=:~,,:.~::
~:~;
.... asy
.....-······ 2rcll:c ·····~..................., .
(c)
··.... we
I
En wL (e)
] :····· :;;
g
'k;;··..·.......... :;-
, i:~:~
· .B.......................
i n
.~~
ee
\ ~- ........ .,,.,,.
..,·~ 11
2. 11
">):,......._
II2i II _,,,,,.
....
·, ·,
rin
.. .. 0 ........
...,/
/ . ....
/ t,,-...
g.n
where
(8106)
et
{8.101)
Thu s, the c irc uit is lig htly da mpe d (hi g h Q) at ligh t loa d , wh e re the va lu e of R is lar ge.
Th e co nve rter inp u t im pe d ,rnce z,,.(~')is also fo und w it h the J(s) and 1\( s ) sourc es set to ze ro , as
illu stra ted in Fig. 8.55(a) . Th e in p ut imped ance is ref err ed to the pr imar y side of the 1:D tra nsfo rm er , a nd
is equ al to
(8. 168)
where

8.4 Graf}hical C011structio11ofC011ve11erTransfer F1111

ctiom 315
Z 1(s) = sL (iU69)
and
(8,170)
Z,(s)"' R 11s~'
We begin construction of the impeda nce asymptotes corres ponding to Eqs. (8. 168) to (8.170) by con-
stru cting the indiv idu al resistor, capacitor, and inductor impedances as in Fig. 8.SS(b). The impedances
in Fig. 8.55 are co nstructed fo r the case R > Ru, As illu strate d in Fig . 8.SS(c), II2 1 II co inc ides wi th the
ww
inducto r reactance wl. The impedance II Z, 11is asymptotic to resis tance R at low frequencies, and to the
capacitor reactance 1/wC at high frequency . Th e resistor and capacito r asym ptotes intersect at co rner fre-
que ncy f1,given by
w.E (8.171)
asy
Acco rding to Eq . (8.168), the inpu t impedance Z,,.{s) is eq ual to the series co mbi nati on of Z 1(s) and Zi,{s),
div ided by the square of the turns ratio D. The asym ptotes for the series combinati on [Zi(.\·) + Zi (s)] are
found by selecti ng the larger of the II2 1 IIand IIZ2 II asympto tes. The IIZ 1 IIand II 2i Hasymptotes inter -
En
sect at frequency / 0, given by Eq. (8. 165). It can be seen fro m Fig. 8.SS(c) that the series combi nation is
dominated by 2i for f <fo, and by Z 1 for /> fo. Upo n sca ling the [Z 1(s) + Zis)J asy mp totes by the factor
)/D2, the inp ut impedance asymptotes of Fig. 8.SS(e) aie obtained.
gin
The zeroes of Z;,,(s), at freq uency / 0 , ha ve the same Q-facto r as the poles of Z0 111(s) [Eq. (8. 166)].
One way to see that this is true is to note that the output impedance can be expressed as
eer (8.172)
Hence, we can relate 7.,,Js) to Z;,.(s ) as follows :
ing
.ne
l Z,(s)Zis)
= DI z ()- (8,173)
z ,,,(.1·)
cm1 S
The impedances II Z 1 II,II 2 2 II, and IIZ'"" II are illu strated in Fig. 8.SS(d). At the reso nant freque ncy /= f 0 ,
impedance Z 1 has magnitud e R0 and impedance Z2 has magn itude appro ximate ly equal to «0 . The out put
impeda nce Z""'has magnitude R. Hence, Eq. (8. l 73) predicts that the input impedance has the magnitud e
t
(!U74)
At f =j 0 , the asympto tes of the inp ut impeda nce have magnit ude R!/D 2 • The dev iatio n from the asym p-
toteB is therefo re equal to Q c: RfRu,as illu stra ted in Fig. 8.55(e).
The control-to-output transfer function G,.h) is found wit h the vis) source set to zero, as in
Fig. 8.56(a). This c ircuit coincides with the voltage divider ana lyzed in Section 8.3.5. Hence, G.,i s) can
be ex pressed as
(8,1 75)

316 Converter Transfer Functions
(a) L
Fig. 8.56 Construction of the control-to-output
transfer function G,.j.s) for the buck converter: +
(a) circuit model; (b) relevant impedance asymptotes;
(c) transfer function IIG.J s) 11-
R v(t)
(b) (c)
ww
w.E IIG.,/.s)II
asy
Th e qu antiti e s l\ z,,,
En
,,ii and II zl II are con struct ed in Fig . 8.56 (b). Acco rdin g to Eq . (8.175), we ca n con-
struct IIGvJ s) II by finding the ratio of II Z""' II and IIZ 1 11, and then scalin g the result by Vg. For f < / 0 ,
IIZ0 w JI and IIZ1 II are bot h eq ual to wl and hence II Z'"" 111112 1 II is equ al to I. As ill ust rated in Fig.
and IIZ1 ll i s equal to wL Hence , II Z""' 11 111 gin

8.56(c), the low-fre quency asymptote of II G,,is) II has value VR. For f;:, / 0 , IIZ,,.., II has asy mptote 1/roC,
2 1 II has asympto te 1/ui LC, and the high-freq uency asymp-
eer
tote of IIG"J~')II is equal to V/ui LC. The Q-factor of the two poles at/= / 0 is again eq ual to R!Ro-
The line-to -ou tput tran sfe r fu nc tion G,,is) is foun d wi th the d(s) sources set to zero, as in Fig.
8.57(a). Thi s ci rcuit contai ns th e same voltage divider as in Fig. 8.56, and add itio nally co ntain s the l :D
tran sformer. TI1e tr ansfer fu nct ion G.,is) can be expressed as
ing
.ne
{a)
I :D L
Fig. 8.57 The line-to-output trnnsfer
function c,.(.I') for the buck w1wener :
(a) circuit model; (b) magni111de.isymp-
v1(t)
+
t
totes. R v(t)
(b)
D
II G.gCs)11

8.5 Measuremel!Iof AC Tramf er Frmctio11s

and lmf)eda11
as 317
NetworkAnalyzer
Injection source Measured inputs Data
ii, ii, Data bus
Magnitude
l~II
Frequen cy to computer
0 ff
17.3 dB
I .
ii, v, v,
Outplll Input Input
--0
+ - + -
L~I I
ww
- 134 .7'
+
) I )
V_.
ri ri
w.E
'
~
Fig. 8.58
asy
Key featu res an<lfunc !iolls of a netwo rk analyz er : sirmsoi<la/so un:e of counol!ablc arnp!iwdc and fre-
ag11itudc and ph ase of the inpu t compone nts :it the i11jcctin[I fre -
que ncy, tW(J input,;, aml de term inatio n of re lative 111
que ncy.
En (8.176)
gin
This expressio n is sim ila r to Eq. (8 .175) , exce pt for the scaling factor of D. Therefore, the line -to -output
eer
transfer function of Fig. 8.57(b) has the same shape as the control -to-output transfe r funct ion G,J~ ).
8.5 MEASUREMENT OF AC TRANSFER FUNCTIONS AND IMPEDANCES
ing
It is good e ng ineer ing practice to meas ur e the tra nsfe r funct ions of pro totype co n verters and conve rter
.ne
systems . Such an exercise can verify that the system has been cmTectly modeled and desi gned. Also, it is
often usefu l to charac te rize ind ividua l c ircuit eleme nt s through measureme nt of thei r terminal imped -
imces.
Sma ll-signal ac ma gni tu de and phase mea sureme nt s can be made using an instru ment known as
a network analyze r, or frequency response analyzer. The key in pu ts and outputs of a basic networ k ana-
lyzer are illustra te d in Fi g. 8.58. The networ k anal yzer prov ides a si nu so ida l output vo ltage of con - vz
t
tro llable ampli tude and freque ncy. This signal can be injected into the system to be measured , at any
desired loca tion. The netwo rk ana lyze r also has two (or mo re) in p uts , v.,
and i\. The ret urn electro des of
i\, i)Y' and iJ-'are in terna lly con nected to earth groun d. The network ana lyzer perform s the func tio n of a
narrowba nd trac kin g voltme ter : it measures the components of v_,and i\ at the injec ti o n frequency , and
disp lays the magnitude and phase of the qua n tit y v/0,.
The narrowb and tracki ng voltme ter feature is
essen tial for sw itch in g converter measureme nt s ; ot herwise , sw itch in g ripp le and noi se co rrupt th e
desired sinuso idal sig nals and make accurate mea surements impossible [3]. Modern network ana lyzers
ca n automatica lly sweep the freq ue nc y of the injection so ur ce i\ to ge nerate magnitud e and pha se Bode
plots of the transfer function f\/ 11,..
A typica l tes t set up fo r meas ur ing the tra ns fe r function of an amp lifie r is illust rated in
Fig. 8.59. A potentiomete r, connected between a de supp ly voltage V(:C and gro und, is used to bias the

318 Co11vert
er TramferFwrctio11s
Network Analy zer
.. .,
Jnj eclion .., uru Measurw lnpul$ Datt
-
Dmubu..r
Mag,t ltuck
0'
Frrq11.
ff
~11c
y
1~11-4 .7dB I u, ~~1lPU l rt
., Ou111u,
o,
/upUI
---0-1 T
1- L~ I - I'
o. 162.e·
ww DC
blocking ::
capacitor
-
w.E
DC .>
asy
bias ·~·-__ ....,_.,._ _,__ __.
>
adju st
En :,
C.
..:;
G(s)
0
C:
-6
s
--=- gin
Device
Fig. 8.59 Mea~ureme111or a transfer !"trnc

tirn1.
under test
eer
amplifier inp ut to attain the correct quiescent operating point. l11e injection source voltage v,is coupled
to the amplifier input terminals via a de blocking capacitor. This blocki ng capacitor prevents the injection ing
voltage source from upsetting the de bias. The network analyzer inp uts v, and C·1 are connected to the
.ne
input and output terminals of the amplifier. Hence, the measured transfer function is
\' .(J')
-f---=
v,(.n
G(s)
v, amplitude have no effect on the measured

(8.177 )
t
Note that the blocking capacitance, bias potentiometer, and

transfer function
An impedance
Z(s) = ~(s} (8. 178)

1(.1')
can be measured by treating the impedance as a transfer function from current to voltage. For example,
measurement of the output impedance of an amp Iifier is ill ustrated in Fig. 8.60. The quiescent operating
condition is again established by a potentiometer whic h biases the ampli fier inpu t. The injection source
ii, is coupled to the amplifier output through a de block ing capacitor. The injectio n source voltage v,
excites a current i,"'1in impedance Z" This curre nt flows into the output of the amplifier, and excites a

8.5 Me{lsuremenlof AC Tm11

sfer F11
1c11io11sand /111p
ed{l11c
es 319
Device
z.,
under test
DC .
t,>11'
DC blocking
capacitor
bias
adj ust 0
G(s) -5 ~
~
ww Vohage ___
probe
_
w.E
asy
Fig. R.60 Measu rement of the outpur impedm1cc of a circuit.
voltage across the ampl ifie r output imp edance:
En (8. 179)
gin
A current probe is used to measure i.,,.,
eer
. The current pro be prod uces a voltage pro portion al to i,,.,,; th is
voltage is connec ted to the networ k an alyzer inpu t v-'.A voltage probe is used to mea sure the amp li fie r
out put voltage OY,The netwo rk analyzer displays the trans fer func tio n 0/v,.
whi ch is propor tional toZ 0 ",·
Note that the va lue of z, and the amp li tude of ii, do not affec t the measureme nt of z,"'r
ing
In power app lications, it is so metime s nece ssary to meas ure impeda nces th at are ve ry sma ll in
mag nitud e. Grou ndi ng prob lems[4] cause the test setup of Fig. 8.60 to fa il in suc h cases . The reaso n is
illustr ate d in Fig . 8.61 (a). Since the return co nnectio ns of the injec tion source i\ and the an alyzer input
.ne
vy
are both co nnected to ea rth ground, the injected curre nt !0111 ca n return to the source th rough the return
con nec tions of e ither the injection source or the vo ltage prob e. In prac tice, i,,.,,di vides between the two
paths acco rding to their relative impedances. Hence , a sign ifica nt current (1 - k) l,,"' flow s throug h the
return connect ion of the voltag e probe. lf the voltage pro be retu rn connectio n has some total co ntact an d
wir in g impedanc e zp,,,w' then the curr e nt induces a vo ltage drop (I - k)i ,,,,1ZP"'""in the voltage probe wir-
t
ing, as illustrate d in Fig. 8.6 1(a). Hence , the netwo rk analyzer does not correc tly measure the vo ltage
drop across the im pedan ce Z. If the int e rnal grou nd co nn ect ions of the networ k an a lyze r have neg ligib le
impeda nce, then the network analyzer w ill display the fo llow ing impedan ce:
Z t- (l - k)Z w.,1,.,=Z-t Zrm11ell

Z" (8.180)
Here, z,, is the impeda nce of the injec tion source return co nnecti on . So to obt ain an acc ura te meas ure -
ment , the followi ng con dit ion mu st be satisfie d:
(8.181)
IIZ II'"" II{ Z rro.-llZ.,} I

320 Converter Transfer F1111ctio11s
(a)
Injection Network Analyzer
Impedance source
under rest return Injection source
connection
~ ~
;OUI k {0/j/
(1-k) l..,
ww Voltage
probe - -<
Measured
inputs
w.E Voltage ....-

probe .....····
return
connection
+
asy +
(I - k) I 0 . ,
-
zp,.,,.
- v,
En
(b)
Impedance
und er test gin
Injection
source
return
NetworkAnalyzer
Injection source
connect ion
eer
1: n R,.,.ru
Z(s)
'
1,,.,
ing
.ne
0
Measured
Inputs
Vohage
probe
Voltage ...···
'-------------1+-- ---o
.,.
+
v. t
probe ...·····
return
connection
---~--------..,,.-----+v,
.,_.,v'V"------- "1'!"
--...---o -
+ OV
Fig. 8.61 Measurement of a small impedance %(,): (a) current llnwiu i; in the retuni conllection of the voltage
probe in<luces a volrngc drop that corrupt s the measurcrnent; (b) an impm ved experiment, incorporat ing isolation of
the injection source .

8.6 Summary of Key Poims 321
A typical lower limit on IIZ II is a few tens or hundreds of milliohm s.

An improved test setup for measurement of small imped ances is illustrated in Fig. 8.6 l(b). An
isolation transformer is inserted between the injection source and the de blocking capacitor. The return
connec tions of the voltage probe and injection source are no longer in parallel, and the injected current
i,,,., must now return entirel y through the injection source return connection. An added benefit is that the
transformer turns ratio n can be increased, to better match the inject ion source impedance to the imped-
ance under test. Note that the impedance s of the transformer, of the blocking capacito r, and of the probe
and injection source return connections, do not affect the measurement. Much sma ller impedances can
therefore be measured using this improved approach .
ww
8.6 SUMMA RY OF KEY POINTS
I.
2. w.E
The mag nitude Bode diagrams of functions wh ich vary as {flfo)" have slopes equal to 20n dB per decade,
and pass through O dB at /= /o ·
It is good practice to express transfer funct ions in nonn alized pole-zero form; this form direct ly exposes
asy
express ions for the sa lient feature s of the response, tha t is, the corner frequencies , re ference ga in , etc .
3. The right ha lf-plane zero exh ib its the magnitude response of the left ha lf-p lane zero, but the phase
response of the pole.
4.
En
Poles and zeroes can be expressed in freque ncy-i nver ted form , when it is desirable to refer the gain to a
high-frequ ency asymp tote.
5.
gin
A two-pole respo nse can be wr itte n in the standard norn1alized fo rm of Eq. (8.58). When Q > 0.5, the poles
are complex conjugates . The magni tude respo nse then exh ibits peak ing in the vici nity of the comer fre-
quency , wit h an exact value of Q atl=/ 0. High Q also causes the phas e to change sharp ly near the corn er
6.
frec1uency.
eer
When Q is less than 0.5, the two pole respo nse can be plotte d as two real poles. The low-Q approxi mat ion
7.
predicts tha t the two poles occ ur at frequencies J0 /Q and
exact val ues for Q :!, O,J
Q/;
ing
1. These fre4uenc ies are with in 10% of the
The low-Q approx imation can be extended to find approx imate roots of an arbitrary degree polyno mial.
.ne
Approximate analytical expressi ons for the salient feat ures can be derived. Num e rical val ues are used to
justify the approximations.
8. Salient features of the transfer functions of the buck, boost, and buck-boost converters are tabula ted in
Section 8.2.2. The lin e-t o-outp ut tran sfer func tions of these converte rs co nta in two poles. Th eir cont rol-to-
o utpu t tran sfer fun c tions co ntain two poles , and may addi tionally contain a righ t half-p lane zero. t
9. Approximate ma gnitud e asymptotes of impedan ces and tran sfer funct ions can be eas ily derived by graphi-
cal cons truc tion. This approach is a use ful suppleme nt to conve nti ona l ana lysis , because it yields physical
insight into the c ir cuit behavior , and because it exposes suitab le approxim at ions . Severa.Iexamples, includ-
ing the impedances of basic series and pamllel resonant circuit s and the transfer fun ction H (s) of the voll-
age divider ci rcuit, are worked in Section 8.3. The inp ut impe dance, ou tput impe dance , and trans fer
functio ns of the buck converte r are construct ed in Section 8.4, and physical origi ns of the asympto tes, cor-
ner frequencies, and Q-factor are found .
JO. Measuremen t of transfer func tion s and impedances using a netwo rk ana lyze r is discussed in Section 8.5.
Care ful atten tion lo ground con nections is impo rtant when measuring small impedances.

322 Converter Transfer Functions
REFERENC
ES
[ I) R.D. MIDDLEBROOK,
"Low Entropy Expressions: The Key lo Design-Oriented Analysi ," IEEE Frolltiers
1991 Proceedings,pp. 399-403,Sep!. 1991.
in Ed11cationCo11fere11ce,
[2] R. D. MIDDLEBROOK,
"Mechodsof Design-OrientedAnalysis:The Quadratic Equation Revisited,'' IEEE
Fromier.sin Ed11cationConference, 1992 Proceedings, pp. 95-102, ov. 1991.
(3) F. BARZEGAR, s.CUK. and R. D. MIDDLEBROOK, "Using Small Computers [O Model and MeasureMagni-
tude and Phase of Regulator Transfer Functions and Loop Gain," Proceeding.1·of Powercon 8, April 1981.
Also in Advances i11Switched-Mode Power Co11versio11 , Irvine: Teslaco, Vol. I, pp. 251-278, 1981.
ww
[4) H. W. On , Noise Reduction Techniques i11Electronic Systems, 2nd edil., ew York: John Wiley & Sons,
1988, Chapter 3.
w.E
PROBLEMS
8.1
asy
Expresslhe gains representedby the asymptotes of Figs. 8.62(a) to (c) in factored pole-zerofonn. You
may assume that all poles and zeroes have negativereal parts.
(a)
En
gin
(b)
j,
eer
ing
-20 dB/decnde
.ne
-20 dB/decade
(c) Q
G_
t
Fig. 8.62 Gain asymp101es for Problem ILI.
8.2 Express lhe gains represented by the asymp101es of Figs. 8.63(a) to (c) in factored pole-zero fonn. You
ma)' assume lhacall poles and zeroe. have negativereal parts.
8.3 Derive analytical expressions for lhe low-frequencyasymptotes of the magnitude Bode plots shown in
Fig. 8.63(a) LO (c).
8.4 Derive analytical expre . ions for lhe three magnitudeasymptotes of Fig. 8.16.

Proble ms 323
(a) c_ (b)
+20 dB/decade
ww (c }
f,
w.E
Fig. 8.63 asy
Gain asyrnp!otcs for Problem s 8.2 and 8,3.
8.5
En
An exp erimentally measured transfe r fun ctio n. Figure 8.64 conta ins experime ntally measured magni -
gin
tude and phase data for the gain function A(s) of a certai n am plifier. The object of this prob lem is 10 find
an expressio n for A(s). Overlay asymptotes as appro priate on the mag nitude and phase data, and hence
deduce nume ri cal values for the ga in asy mptotes and corner freq uencies of A(s). Your magn itude and
40dB
eer
30dB
ing
.ne
20d8 900
t.. 45°
t
JOdB
..... ··~..t1·H ......... ···t··
~..t·....·r···~· :··~
·:·tt!.·____
····~·
····!-·~·)··~·~)
~
OdB
~-~....~...: --~--!
----- ~-t:
::::
::::.
:.:
:::.
;.::::~:;:~::::::::::::
~ ::::~
:::
: :::
:::-:
~ oo
.......;......•...i--~--~J.U
..........
;......i~--i·-·i--
~-i.it ·········i--•••i...i..J..~.i-iJ
""·'' ,(, .. _, ;,,,i,. .. i ..i J,i,i ••••••••••i•••••••n •••••ini ,i ,i-i •••••.••..• ••••.j .... 4.• -i- i-i-i-i
........... ,.i ,,,i.- ~..-,i.. i,i ............ .... J,. ,i,,J, .1,,i,i.i ......... i,..~,.,i ... i.,J ... J.iJ
:~ ....···:....~ : :~.;~
--:··
····-··;·----;...;--;--;;.;-; ····--·~.....
; ..:-:··:;.~: -·········:....:-·!··:-:·~· -450
..... ..... :•.... .: ... :.. .1. ; _1.:: .... ..•.... 1..... ; .•. : • .:. :,.::_; ; ........... •••••• • ••• ; ~ • .: i :i_i .... .. .... 1 • .• • • .•. ; •. • l_l;: .• •••• ••• • 1 .. ; __ .i __; lJ.t:
- 90"
... m ...
···-··--1-··
~ ~ ~
...... ... . ..
·+-?··+-i+·H·-·- ··i······½·
~.4.
~-~~
.....
._..~.....
·.~··-~-
··t··?·+?·H··-----~---
-~
-4~
.~~
......
._.
-4··+-?··H·H --·---
4...~~ ..i+~~
~.....
-+---+
..-.....
.~...~...l..i..;~~ ~ ..........~....i...l..4~.~-
- --1·4--t-i-h· ------t-····t-1·--t-!·H
'?
M
......... J......~...l... ~-4-~.l-~·····- ··J......i ... i ..i.4-t.l.i ........~ ...-.J ... l-;. .. i.t.~-l--··-··--l.......;...J.. ~ . . t.t..W.--- ·.... ---~·-J...i.J .~.ll
- 135°
.........
t.....~.-~..~~-
__ ..;;..-,..;..;;...;..
~.H·····---
; ;.;
·~·----4-
..~.4.
~4.!.! ....
; ,..;'";__ ..;_;;....;;..;;..;;;..
;.;.
;;.+
; __ ..,
...H
~.....
...... 4....;.
;_..;;
.i-;.;.;
~H
;.;.;..;;.;.
.......
. ;.....
;;__ ;..;
~..-~.-
....;.
;...;..
~;.;...~.~
; .., ;...
+!
;._
···-···;-~-
;;__ ,..
-··-~·-·;~.;.:_1
_..,;_,.. ;.;.
.~
.H
'.;..
' ;;.;
;+- - 180"
lOHz lOOHz 1 kHz IOkHz 100 kHz l MHz
Fig. 8.64 Ex perimentall y-meas u red magnitude and plwsc dat a, Prob lein 8.5.

324 Converter Tra11sferFunctions
phase asym ptotes must , of course, follow all of the rules : magnitu de slopes m ust be mu ltipl es of ±20 dB
pe r decade, phase slopes for real pol es must be m ultiples of ±45 ° pe r decade , etc . The phase and magni -
tude asymptotes mus t be consis tent with each other.
IL is sugges ted tha t yo u st ar t by guessi ng A(s) based on the magnitud e data. The n co n struc t the
phase asym pto tes for yo ur guess, and co mpa re them with the give n da ta. If there are discrepancies, then
mod ify yo ur guess accordi ngly and redo yo ur mag nitu de and phase asympto tes . You sho uld turn in: (1)
yo ur analytical exp ress ion for A(s), with numeri ca l va lues given, and (2) a copy of Fig. 8.64, with your
magnitude and phase asy mp to tes sup erimposed and with all break frequen cies and slopes clearly
labeled.
8.6 An experi mentally -mea sure d impedance. Fig ure 8.65 contains experimentally measu red mag n itude and
ww phase data for the driving-poin t impeda nce Z(s) of a passive network . The object of this pro blem is the
find an express io n for Z(s). Ove rlay asy mptotes as appropriate on the magnitude and phase da ta, and
hence ded uce n ume ri cal va lues for the sa lie nt features of the impeda nce funct ion. You sho uld turn in : (I)
w.E
yo ur ana lytical exp ression for Z (s), with num erica l values given, and (2) a copy of Fig. 8.65, with your
magnitude and phase asymptote s supe r imp osed and with all sal ient features and asympto te slopes
clearly labeled.
asy 20dBQ
En
Imped ance magni- gin
eer
Jiig. 8.65
tude and phnsc data, l'roblem 90°
8.6.
ing 45°
.ne
O"
-4 50
IOHz IOOH
z I kHz 10 kHz
_900
t
8.7 In Sectio n 7.2.9, the sma ll- s ignal ac model of a nonideal flyb ack co nverter is derived , wi th the res ult
illu stra ted in Fig. 7.27. Cons tru ct a Bode plot of the ma gni tu de and phase of the conv erter outpu t
z
impedance 0 .,(s). Give both an aly tic al expressio ns and nu merical val ues for all importa nt fea tures in
z
your p lot. Note: 0 .,(s) inc ludes the load res istance R. The e le men t va lues are: D = 0.4 , n = 0.2, R = 6 il,
L=60UµH, C= IOOµF, R.,,,=5 Q.
8.8 For the no nidea l flyback converter modeled in Section 7.2.9 :
(a) Derive analyt ic al expressions for the control -to -outp ut and lin e-to -output transfe r func tions
G"'/4s) and G,/ 1"
). Express your res ults in standa rd no rmali w d fo rm .
(b) Derive analytical exp ressions for the sal ient feat ur es of these transfer fun c tions .
(c) Co nstru ct the ma g nitud e and phase Bode plo ts of the contro l-to-o utpu t transfer fu nc tion, usin g

Problems 325
rhe following values:n = 2, V8 ""48 V, D = OJ, R "' 5 Q , l =250 µ.H. C =100 /lF, R 0 " =1.2 Q ,
Label the numerical value. of rhe constant asymptOles, all corner frequencies, the Q-factor, and
asymptote slopes.
8.9 Magnicude Bode diagram of an R-~ filter circuit. For the filter circuil of Fig. 8.66, consirucl lhe Bode
plors for the magnitudes of the Thevenin-equivalenl oulplll impedance Z0 ., and the rransfer functio n H (s)
= v/v 1• Plot your results on semilog graph paper. Give approximate analyrical expressions and numeri-
cal values for the important comer frequencies and asympto1es. Do all of the elements significantly
affecl Z0• 1 and H ?
RI LI
lO Q IOmH
ww C2
220µF
R3
-Z OU/
+
w.E
VI C1 V2
R2 47nF Jk Q
IOOQ
8.10 asy
Vig. 8,66 Filter circuit of Problem 8.9.
Operational amplifier filter circ uit. The op amp circuit shown in Fig. 8.67 is a practical realization of
En
what is known as a PID co11troller, and is sometimes used 10 modify the loop gain of feedback circuits 10
improve their performance. Using semilog graph paper, sketch the Bode diagram ofrhe magnitude ofi he
transfer func1ion vi( s)l v 1{s) of the circuit shown. Label all comer frequencies, flal asymptote gains, and
gin
asymplote . lope , as appropriare, giving both analytical expressions and numerical values. You may
assume chat the op amp is ideal.
eer
ing
.ne
t
Fig. 8.67 Op-amp PID controller circuit, Problem 8. I0.
8.11 Phase asymplotes. Construcl the phase asymptores for lhe lransfer function v2(.1')/v 1(s) of Problem 8.10.
Label all break frequencies, flal asymplotes, and asymplote slopes.
8.12 Consrruct the Bode diagram for the magnitude of the output impedance Z.," of the network shown in Fig.
8.68.Give suirable analytical expressions for each asymplole, corner frequency, and Q-faclor, as appro-
priare. J ustify any approximations that you use.
The component values are:
L 1 aalOOµH L1 = 16mH
C1 = 1000µF C.\= IOµF
R 1 = 5Q R1 = son

326 Conve rter Tran sfer Functions
-
z..,
Fig. 8.68 Filler network of Problem 8. 12,
ww
8.13 The two section input filter in the circuit of Fig. 8.69 should be designed such that its output impedance
20 .,l,, =o mem certain input filter design criteria, and hence it is desirable to construc t the Bode plot
w.E
for the magnitude of ?.,..Although th is filter contains six reactive elements, IIZ_, II can nonetheless be con-
structed in a relati vely straightforward manner using graphical co nstruction techniques. The element val-
ues are;
= :n 11111
/ .1 C 1 = 32 µF
asy ½ "' 40 0 µII

L.1"" 800 111-I
==l µH
C 1 = 6.8 µF
1 = IO!l
1-1
R2 = 1 .Q
En
/ .4
(a) Construct II z, II using the "algebra on the graph" method. Give simple approximate analytical
expressions for all asymptotes and corner freque ncies.
(b) It is desired that 11,Z_
gin
, II be approx imately equal to 5 Q at 500 Hz and 2,5 Q at I kHz. Suggest a
simple way to accomplish this by changing the value of one component.
eer
LI L3
in--gz,
.ne
Fig. 8.69 Input filter circu it of Prnbl~m 8.13. t

8.14 Construct the Bode plot of the magnitude of the output impedance of the filter illus trated in Fig.
Fig. 8.70. Give approximate analytic al expressions for each corner frequency. o credit will be given
for computer-generated plots.
8.15 A certain open-loop buck-boost convener contains an input filter. Its small -signa l ac model is shown in
Fig. 8.71, and the element values are specified below. Construct the Bode plot for the magnitude of the
converter output impedance IIz,,,.1(I ) ll. Label the values of all import ant corner frequencies and asymp-
totes.
D =0 .6 Lr = 150 µH
R =6 il c1 = 16 µr
C = 0.33 µi' C1, aa 2200 µF
L = 25 µH R1 = IQ

Proble ms 327
Li Ls
5mH IOµH
L3 IOOµH R, 1012 4. l mH
L, 0.2 µH t.., O.lµH
28V + c,
IOOµF
R,
C2 IOOOµF
c,
IOOµF C, IOOµF
Cs
l µF
-
z...
ww
IQ
J<'ig. 8.70 Input filter circuit of Problem 8. 14.
w.E
v,(s )
asy
l d(s) l d(s) C R
En
8.16
Fig. 8,71
gin
Small-signal model of a buck-boosl converter with input filter, Problem 8.15 .
T he small-sig nal equ ation s of the Wa tk ins-Johnson com•erter operating in cont inuo us conduction mode
are :
eer
ing
L d~~) = - Dv(r) + (2V., - V)a(t) + (D - D'Jvg{t)
Cd:~) = Di(I)- O~)

; git)=(D -
.ne
D') i( t) + 2/d(t)
(a) Derive analytical expressions for the line-to-outpu t transfe r function G.is) and the control -to-
(b)
outp ut tra nsfer func tion G.J~).
Derive analytica l expressio ns for the salie nt features (de gai ns, corner frequencies , and Q-fac
tors) of the transfer functions G.gls) and G.,l..s). Express your results as funtions of V6 , D, R, L,
and C.
t
(c) = =
T he co nverter operates at V8 "' 28 V, D 0.25, R = 28 .Q, C 100 µF, L = 400 µF. Sketch the
Bode diagra m of the magnitude and phase of G ,,j..s). Label salient featu res .
8.17 The element values in the buck conve11er of Fig. 7.68 are:
V8 = 120V D=0 .6
R-' 10 0. Rg-=2 0.
L = 550µH C= 100 /LF
(a) Detenn ine an analytica l exp ress ion for the con trol -to-ou tput transfer functio n G,/<l of th is con -
verter .
(b) Find analy tical express ions for the salien t feat ures of G./ v).
(c) Construct ma gnitude and phase asympto tes for G•tf' Label the nume rica l values of all slopes and

328 Convener Transfer Functions
other imp ortan t fea ture s.
8.18 Loss mechanisms in capac itors , such as dielectr ic loss and contac t and foi l resistan ce, can be modeled
e lectr ica lly usi ng an equivalent series resistance (esr). Ca pacito rs whose dielec tr ic mate rials ex hibi t a
hig h die lectric co nsta nt, such as electro lytic capac itors, tan talum capacitors , and so me types of multi-
layer cera m ic capac itors, typicall y exhib it relative ly high es r.
A buck co nver ter conta ins a 1.6 mH induc tor , and operates w ith a qu iescent duty cycle of0.5 . Its
ou tp ut capacito r can be modeled as a 16 µF capacito r in series w ith a 0.2 Q esr. The load res istance is
10 Q . The converte r opera tes in cont inuous cond uct ion mode. The qu iescen t in p ut voltage is VN= 120 V.
(a) Deter m ine an analy t ica l ex press ion for the control -to-outp ut transfe r fu nct ion G,/sJ of th is con -
verter.
ww (b)
(c)
Find ana lyti cal expressions for the sal ient fea ture s of U./s).
Const ruct mag nitude and phase asy mptotes for G,,t · Label the nu merical values of a ll slopes and
other impo rtant fea tures.
8.19
w.E
TI1e LCC reso nant inverter c ircu it co ntains the fo llo wing trans fer func tion:
(a) asy
When C 1 is suff ici ent ly large, th is transfer fu nc t ion ca n be expressed as an inve rted pole and a
En
quadra tic pole pair. Derive ana lyt ical ex press ions for the corner fre qu encies and Q-factor in th is
case, and sketch typical magni tu de asy mptotes. Determi ne ana lytica l co nditio ns for vali di ty of
yo u r approxi matio n.
(b)
gin
When C2 is s ufficie nt ly large, the transfer functio n can be also ex pressed as an inverted pole and
a quadra ti c po le pair. Derive analytical express ions for the co rner frequencies and Q-factor in
eer
th is case, and sketc h typ ica l magn itud e asy mptotes. Deter mi ne ana lytica l co nditio ns for val id ity
of your appro xima ti on in t his case.
(c) When C 1 = C2 and when the quadratic poles have su ffi c ie nt ly hi gh Q. then the transfer fun ct io n
ing
ca n agai n be ex pressed as an in vened po le and a qua drat ic pole pair. Derive ana lyt ical expres -
sio ns for the corne r freque ncies and Q-factor in this case, and ske tch typica l mag ni tude asy mp-
totes. Dete rmine ana lyt ical con di t ions for validi ty of yo ur approx imation in this case.
.ne
8.20 A two-sec tion ~C filter has the following transfer function :
The e lemen t values are:

t
R = 50 m.cl
C 1 = 680 µF C2 aa 4.7 µF
L 1 = 500µU ½ = 50 µ.H
(a) Factor G(s) into approxi mate rea l and qu ad ra t ic poles, as appropria te. Give analy tical exp res -
sio ns for the sal ien t fea tures . Just ify yo ur approximation using the num erical ele ment values.
(h) Co nstruct the mag n itud e and phase asy mp totes of G(s).
(c) It is desired to red uce the Q to 2, witho ut significan tly changing the co rn er freq uencies or other
feat ures of the response. It is poss ible to do this by cha nging o nly two element valu es. Specify
how to acco mpli s h this.
8.21 The boost conven er of Fig. &.72 operates in the con tinu ous condu ction mode, w ith qu iesce nt dut y cycle

Probl ems 329
D = 0 .6. On se mi-log axes , cons tru c t the mag nitud e and phase Bode plots of
(a) the control-to-o utput transfer function G,,/4s).
(b) the line-to-o utput transfer funct ion G,.,(., },
(c) the o utput impeda nce z••,(.,}.
and
(d) the input impedance Z;.,(!).
On each plot, label the corne r frequencies and asymptotes .
Boost converter
r•··-······...··-··-··················-······-·
·..··-····-····-··,
l L i
,--.,. 1_.., :
ww
Fig. 8. 72 Boosi co nverter of +
Problem 8.21.
V R
w.E
12 n
~--·- ···· ·--------

..-- ......
d-... f, = 200 kHz
asy Controller
8.22
En
TI1e forward conve rter of Fig. 8.73 operat es in the con tinu ous con duction mode , w i th the qu iescent val-
ues Vt= 380 V an d V = 28 V. The tra n sformer turn s ra tio is 11/n1 = 4.5. On se mi- log axes, co nstruc t the
gin
mag ni tude and ph ase Bode plo ts of
(a) the control-to-outpu t transfer function G,J 'i), and
(b) the line-to-output transfer func tion G,is) .
ratio 11t/11
verier. eer
On each plot, label the corner frequ enc ies and asympto tes. Hin t: other than introd uc t io n of the turns
3, the transforme r does no t sign ifica ntly affect the small-s igna l behavior of the forwa rd con-
n, n1 : n3 L
+ing
.ne
C R v(t)
II. II IOµF 1n
t
v1 (t) +
-
/,= 150kH2:
d Fig. 8.73 Forwardconverter of Problem8.22.

Controller
8.23 The boost conve rter of Fig. 8.74 operates in the co nt inuous cond uction mode , with the following qui es -
cent valu es : v, =- !20 V, V = 300 V. It is desired to control the converter input current wavefo rm, and
hence it is necessa ry to deter mine the small- sig nal tra nsfer fu nction

330 Converter TransferFu11ctiom
G;,,(S)-- -i'g<s
. - ll
d(s) v,i=0
(a) Der ive an analy t ica l ex pression for G,J,'). Express all poles and zeroes in nor ma lized sta ndard
fo111
1, and give analy tica l ex press ions fo r the co rn er fre qu encies, Q-facto r, and de gai n_
(b) On semi -log axes , co nstruct the Bode plo t for the mag n itude and phase of C ;,i(S)_
ww
Fig. 8.74 Uoost convene r of +
Prnhlem 8.23.
V R
w.E
1200
f, = 100 kHi
asy
Comroller
8.24 The buck-boo st co nverte r of Fig. 8.75 operates in the co nt inuous conduc tion mode , with the fo ll ow in g
En
quiescent values: Ve= 48 V, V = - 24 V. On semi-log axes , construct the magn itude and phase Bode plot s
of:
(a)
(b) the outp ut im peda nc e .z.,.,(s) ,
gin
the co ntrol- to -ou tput tr ansfe rfunct ion Gw/4s). and
On eac h plo t, label the corne r frequenc ies an d asymptot es as appro priate.
t'ig. 8.75 Huck-boost converter eer +
of Problem 8.24. l
50µH
ing
220µF
C R
Hl
V
.ne
d f. = 200 kHz
Comrol/ er
t

9
Controller Design
ww
w.E
asy
En
9.1 INTRODUCTION gin
eer
In all sw itch ing converte rs, the output voltage v(t) is a function of the input line voltage Y/t ), the du ly
cyc le d(t), and the load current i1,~,)1), as well as the co nverter circ uit element va lues. In a de-de con-
ing
verter app licat ion, it is desi red to obtain a constant output voltage v(t) = V, in spite of dis tur bances in vg(t)
and i1m,)t), and in sp ite of va ria tion s in the conver ter circu it e lem ent va lues. Th e sources of the se di st ur -
ban ces and variati o ns are man y, and a typ ica l situation is il lust rated in Fig. 9. 1. The inpu t voltage v/1) of
.ne
an off -line power supp ly may typi ca lly con tain periodic variat ions al the seco nd harmon ic of the ac
power system frequency (100 Hz or 120 Hz), produced by a rect ifie r circu it. Th e ma gnitud e of v i t) may
also vary when ne ighb or ing power system loads are sw itche d on or off. The load cu rr en t i1,"',f_i)may con-
tain variations of signi fican t amplitu de, and a typi cal power supp ly specificat ion is tha t the output voltage
mu st rema in within a speci fied range (fo r exa m p le, 3.3 V ± 0.05 V) whe n the load curre nt takes a step
change from, for exam ple , full rnted load c urrent to 50% of the rated ctment , and vice versa. The values
t
of th e ci rcu it e leme nts are co nstrncted to a ce rtain tolerance , and so in hig h -volu me man u fac tur in g of a
converter , conve rters are constructe d whose ou tpu t voltages lie in some d istrib ution. It is desired th at
esse ntially all of this dist ri but ion fa ll within the spec ified range; however, th is is not practi cal to achieve
wit hout th e use of negative feedbac k. Similar consi dera ti ons apply lo inve rter app lica tions, excep t th at
the o utput voltage is ac.
So we cannot expect to sim ply set the de-de co nverter du ty cycle to a sing le value , and obtain a
given co nstant ou tput voltage under all con di tions. The idea beh ind the use of negat ive feedb ack is to
bui ld a circuit th at aut omatically adjus ts the dut y cycle as necessary, to obtai n the desired output voltage
with high accuracy , regard less of dist urban ces in vg<r)or i1,"',f_i) or var iat ions in com ponen t value s. Thi s is

332 Controller DeJig11
(a) Switching converte r Lnad
ww ~
bn?
w. Ea dT, T,
Pulse-wid th
modulator
(b)
syE v/ t)
Switching converter
v(t) = f(v,, ilf>ad' d)
ng
v(t)
i,oa,1(
1) } Di<1urba11us
-
d(t) -- } Cmurol input
ine
Fig. 9.1 11\e output voltage of a typical switchlng converter is a function of the line input voltage v8 , the duty cyck
eri
d, and the load current i1r,,,,i(a) open-loop buck converter; (b) functional diagram illustrat ing dependence of v on the
independent quantities vt' d, and i,.,,,d.
ng
a useful thin g to do whenever there are variations and u nknowns that otherwise preven t the syste m from
attain ing the desire d perfor mance .
.ne
A block diagra m of a feedback syste m is shown in Fig. 9.2. Th e outp ut voltage v(t) is measured ,
using a "se nsor" with gain H(s) . In a de voltage regulator or dc-ac inverter, the sensor circui t is usually a
t
voltage div ider, comp rised of prec ision resistors. The sensor output signal H(s)v(s) is compare d with a
reference input voltage Vn:Js). The objective is to make H(s)v(s) equa l to v,J_s ), so that v(.s) accurately
follows v,..js)regardless of disturbances or compone nt variat ions in the co mpensator, pu lse -width modu -
lator, gate driver, or co nverter powe r stage.
The diffe rence between the reference input v,,/s) and the sensor output H(s)v(s) is called the
error signal v,( s). If the feedback system works perfectly , then v,,js ) = H(s)v(s ), and hence the error sig-
nal is zero. In pr<1ctice, the error sig nal is usually nonzero but nonethe less small. Obtai ning a small en·or
is one of the objec tives in add ing a co mpensator network G/ s) as show n in Fig. 9.2. ote that the output
voltage v(s) is equal to the e1rnr signal vP.(s), mult iplie d by the gains of the compensator, pulse-wid th
modulator, and co nverter powe r stage. If the compensator gain Gc(s) is large enough in magnitu de, the n a
small error sig nal can produce the required output voltage v(t) = V for a de regulator (Q: how should H
and v,e1 the n be chosen?) . So a large compensator gain leads to a small error, and therefo re the output fol-
lows the refere nce inp ut with good accuracy. This is the key idea be hind feedback systems .
The averaged small -signal converter models derived in Chap ter 7 are used in the fo llow ing sec-
tions to find the effec ts of feedback on the small -signal transfer functions of the regulator. The loop gain
T(s) is defined as the product of the small-signal gains in the forward and feedback paths of the feedback

9.I hrtrod11ctim1 333
(a) Power Switching converter Load

input ,.....................................................................
.
---- '----, ,-,.--- ...... -.J ,__, ........... · ----...---
!
+ ;,oat/
i
i
i V
~
'~ Sensor
H (s)
~ gain
\. .. ~·········· ............... ............... ..... ......... ..... ... . J
ww Transistor
gate dri ver
Pulse-width
modulator
.-----,
Error
signal
w.E Reference
input vref
(b)
asy Switching converter
En
v(I) = f( v6 , i1oa,1, d)
vgCt)
v(t)
-...
·--~!--1.i
}DlSturbancts
ompensator Pulse-width d(t)
modulator gin
----
l lr1t1tl I
) eoo,ror;"P"'
~L.;..._
_____ _.
eer
ing
L--------------1 Sensor
gain ..____________ __,
Fig. 9.2 Feedback loop for regulation of the output vol!age: (a) buck converter, with feedback loop block diagram;
.ne
{b) functiunal block diagrum of the feedback syscem.

loop. It is found that the tr ansfe r functi on from a distu rba nce to the ou tpu t is multiplied by the fac tor
1/(1 + T(s)). Hence , w hen the loop gain Tis large in magnitude, then the influence of disturb ance s on the
outpu t vol tage is sma ll. A large loop gai n also ca uses the ou tpu t vol tage v(s) to be nearly equ al to
11,.Js)IH(s), with very little dependence on the gains in the forward path of the feedback loop. So the
loop gain magnitude IIT IIis a measure of how well the feedback sys tem works . All of these gains ca n be
t
eas ily construc ted usin g the algebra -on -the-grap h metho d ; thi s allows easy evaluat ion of impo rtan t
closed-loop perfor mance measures, such as the output voltage ripple result ing from 120 Hz rectificat ion
ripple in vg<t)or the close d-loop ou tput impedance .
Stability is ano ther importan t iss ue in feedbac k systems. Add ing a feedba ck loop can cause an
othe rwise well -behaved circu it to ex h ib it osc illat ions , ringing an d overshoot , and other un desi rable
behavior. An in -depth treat ment of sta b ility is beyond the scope of th is book ; however , the simple ph ase
margi n crite rion for assess ing stab ilit y is used here . When the phase margin of th e loop gain T is pos itive,
the n the feedb ack sys tem is stable . Moreover , increasi ng the pha se margin causes the system tra nsient
respon se to be better beh ave d , with less ove rshoot and ring ing . The rel ation between phase marg in and
closed -loo p respo nse is qu ant ified in Sect ion 9.4.
An example is given in Section 9 .5, in whic h a compensator networ k is designe d for a de reg u-

334 Co11trolle
r Design
lator system. The com pensa tor network is designed to attain ade quate phase margin and good rejection
of expected disturb ances. Lead compensators and P- D con trolle rs are used to improve the phase margin
and extend the band w idth of the feedback loop . This leads to better rejection of high- fre qu ency dis tu r-
bances. Lag co mpensators and P- 1 con trollers are used to increase the low-freq uency loop gain. This
leads to better rejec tion of low -frequenc y di sturbances and very small steady-s tale error. More comp li-
cated com pensators can ach ieve the advan tages of both approaches.
Injection methods for experimental measuremen t of loop gain are introduced in Sect ion 9.6.
The use of voltage or current injec tion solves the pro blem of esta blishing the correct quiescen t operat ing
poin t in high -ga in syste ms. Condi ti ons for o bta ini ng an accura te measurement are exposed . The injection
ww
method also allows meas urement of the loop ga ins of un sta ble syste ms .
9.2 EFFECT OF NEGATIVE FEEDBACK ON THE
w.E NETWORK TRANSFER FUNCTIONS
We have seen how to derive the small -signa l ac transfer functions of a switch in g converter. For example ,
asy
the equ iva len t circu it model of the buck co nverter can be wri tte n as in Fig. 9.3. Th is equ iva lent circu it
conta ins three ind epe nd ent inp uts: the con trol input var iations ti. the power input voltage variations 0~,
and the load curr ent var iations '""'"' The ou tput voltage va ri ation Ocan therefo re be expressed as a lin ear
En
com bin ation of the three independent inputs, as follows:
v(s)-= G_,f.s)d(s) + G,,.(s) O,( .1·) -2 1,.,is) (9. l )
gin
0 ,,,(. ~),
where
eer
converter control- 10-outpul transfer fun<.:tion (9.1;1)
v(s) I ing
.ne
G,i~) = ~ ( ·) co nverter line-to-output trnnsfer function (9 .lb )
J ~o
\ • l
t«J(lr}=U
., ( ) = -
L, OJll .\'
0(.1·)
~
I l,wH/\
I
s) ,/ , 0
i'ix• o
converter output impedance (9. lc)
t
The Bode diagrams of these quantities are construc ted in Chap ter 8. Equation (9. 1) descr ibes how di stur -
e(s)d( s)
j (s)d (s) C v(s) R
Fig. 9.3 Sm11ll-signal convener model, which rcpre~ents variation s in i';,,d, and i1,,,,,
1.

9.2 Effect of Negative Feedback0 11 the Network Tram/er Fwrctiom 335
bances vii and i1,,,u/propagate to the output v, thro ug h the tra nsfer fun ct ion Gv/ r} and the output imped-
ance Z,,,.,(s). If the dist urb ances v. and i 1,,,.,1 are known to ha ve some max i mmn worst -case am plitud e,
then Eq. (9 . 1) can be used to comp ute the res ultin g worst-case open-loop variation in\! .
As desc ribed pr evious ly, the feedback loop of Fig. 9.2 can be used to red uce the influences of vg
a nd i1""" on the out pu t v. To ana lyze this sys te m, let us pertur b and linear ize its averaged signals about
the ir quiescen t operat in g poin ts. Both the power stage and the control block dia gra m are perturbe d and
lin ear ized:
v,..1 (t) = V,,1 + 9,.1(t)

(9.2)
ww v,(I) = V, + v,(t)
etc.
w.E =
In a de regulator system, the reference input is consta nt , so v,.,f.J) 0 . in a sw itchin g ampl ifier or d c-ac
in verter, the refer ence input may conta in an ac variat io n. in Fig . 9.4(a), the converte r model of Fig. 9.3 is
combi ned with the perturbed and linearized control circui t block diagra m . Th is is equivalent to the
red uced block diagram of Fig. 9.4(b), in which the converter model has been rep laced by bloc ks repre-
se nt ing Eq. (9 . I).
asy
Solution of Fig. 9.4(b) for the output voltage variation v yie lds
En C,
1 1"" "
z oirr
I + HG,GJ\IM
(9.3)
which can be written in the form
gin
eer
•_ • l T • G,., • Z.,,, (9 .4)
V - V "'i H I +"f + V ~ l + T - ' "'"" I + T
ing
wi th
T(s) =f/ (:;)G..(s )G,,,f 1')/V,,1 ="loop gain"
Equ at ion (9.4) is a ge neral res ult . The loop gai n T(s) is defi ne d in ge neral as the product of the ga ins
.ne
arou nd the forwar d and fee dback paths of the loop . Th is equa tion shows how the add ition of a feedback
loop modifies the transfer fu nct ions and pe rfo rm ance of the system , as desc ribed in detai l below .
9.2.1 Feedback Reduces the Transfer Functions from

Disturbances to the Output
t
The transfer functio n from vii to v in the open-loop buck converter of Fig. 9.3 is G,,is), as given in Eq.
(9 . 1). Wh en feedba ck is added, thi s tra nsfe r fu n ctio n becomes
(9.5)
fro m Eq . (9.4). So this transfer funct ion is reduced via feedback by the factor 1/( 1 + T(s)). If the loop
ga in T(s) is large in ma gni tude , then the redu ct ion can be subs ta ntia l. Hence, the output vol tage varia tion
v res u ltin g from a give n v8 va riat ion is atte nuated by the feedback loop.

336 Controlle r De.,ign
(a)
e(s)d (s)
vi<s> j(s)d(s) C v(s) R ;,""is)
ww d(s)
w.E Compensator
l
v;
Pulse-width
modulator
asy
H(s)v(s)
H(s)
En Sensor
gain
gin
(b)
eer
ing
;,oa,1(s) Load currem
variation
.ne
t
variation
Pulse-width
Compensator moduiaJor
v,(s) v,(s) I d(s) v(s)
Gc(s)
Error VM Duty cycle Output voltage

signal variation ~--------~ variation

Converterpower stage
H(s)v(s)
H(s)
Sensor
gain
Hg. 9.4 Voltage regula 1or system smnll -sig rial mode l: (a) with converte1· e4 uivalcn1 ci rcuit; (b) complete blm :k
diagram.

9.3 Cons1111 a,1tiries II(I + T) and Tl( I + T) and the Close,l-Loop TransferF1mctio11s
ctio11of the lmporrontQ11 337
Equation (9.4) also predicts that the converter output impedance is reduced, from z,, ( ~') to
111
(9.6)
So the feedback loop also reduces the converter output impedance by a factor of 1/(1 + T(s)) , and the
influence of load current variations on the output voltage is reduced.
ww
9.2.2 Feedback Causes the Transfer Function from the
Reference Input to the Output to be Insensitive to
Variations in the Gains in the Forward Path ol"the Loop
w.E
According to Eq. (9.4), the closed-loop transfer function from v,.1 to v is
asy _ v(s) j __ I_ ___ll1_

v,,r/.s)~,~o - H(s) I+ T(s)
I /ood-o
(9.7)
En
If the loop gain is large in magnitude, that is, II T II > I, then ( I + T) "' T and Tl( I + T) .. TIT= I. The
transfer function then becomes
gin (9.8)
eer
which is independent of Gc(s), VM• and G,/r) . So provided that the loop gain is large in magnitude, then
variations in G,.(s), VM• and G,.Js) have negligible effect on the output voltage. Of course, in the de regu-
lator application, v,,1 is constant and o,4 = 0. But Eq. (9.8) applies equally well to the de values. For
example, if the system is linear, then we can write
ing
V l T(O) I
.ne
(9 .9)
V,,1 "' f/(0) l + T(O)"' H(O)
So to make the de output voltage V accurately follow the de reference V,.f we need only ensure that the
de sensor gain H(O) and de reference V,.,1 are well-known and accurate, and that T(O) is large. Precision
resistors are normally used to realize H , but components with tightly-contro!Je.dvalues need not be used
in G,., the pulse-width modulator, or the power stage. The sensitivity of the output voltage to the gains in
t
the forward path is reduced, while the sensitivity of v 10 the feedback gain H and the reference input v,.1
is increased.
9.3 CONSTR UCTION OF THE IMPORTANT QUANTITIES l/( 1 + 1) AND

T/(1 + 1) AND THE CLOSED-LOOP TRANSFER FUNCTIONS
The transfer functions in Eqs. (9.4) to (9.9) can be easily constructed using the algebra-on-the-graph
method [4]. Let us assume that we have analyzed the blocks in our feedback system, and have ploued the
Bode diagram of II T(s) I]. To use a concrete example, suppose that the result is given in Fig. 9.5, for
which T(s) is

338 Co11trollerDesign
SO dB
IIT II
60 dB I To Ide
40 dB
20d B
OdB
ww -20d B Crossover
f requency
w.E
--40dB
I Hz IOHz 100 Hz I kHz 10 kHz 100 kHz
f
asy
Fig. 9.5 Magnitude nfth c loop gain example, Eq. (9. 10).
(t +~) - -
T(s) c=Tu ~---
En( l +QWri
------'---
--~ +(_!i___-
w,,,)2) (' +_!_
wr,2)
(9 . IO)
gin
This exa mple appears somew h at co m plicated . Bu t the loop gain s of prac tical vol tage regula tors are ofte n
even more co mplex, and may co ntai n four, five, or more poles. Evaluatio n of Eqs. (9.5) to (9.7), to dete r-
eer
min e the closed -loop tra nsfe r functi o ns, requ ires qu ite a bit of work. The loop gai n Tmust be added to 1,
and the result ing num era tor and de nominato r mu st be refac tored . Using th is approach, it is diffic u lt to
ing
obtain ph ysical insight into the rela tions hip betwee n the closed -loop tra nsfer fu ncti ons and the loop ga in.
In co nsequence, des ign of the feedback loop to meet specifica tions is d ifficult.
Us ing the algeb ra-o n-the-grap h method, the closed -loop tra ns fer fu ncti o ns can be co nstr ucted
by inspection, and hence the rela tion betwee n these transfer funct io ns and the loop gain beco mes obvi-
.ne
n
ous. Let us firs t inves tigate how to plot IITl( l + II.It can be seen from Fig. 9.5 that there is a freque ncy
/,_.• calle d the "crossove r frequency ," where II T II = l. At frequenc ies less t ha n / ~. II T II > I ; indeed ,
IIT II;;;,., I for f <l e· Hence, al low frequency , ( I + 7) = T, and T/(1 + D = TIT =- I. At freq uencies grea ter
tha n / , , IIT II < I, and II T II 4::. I for / ',;i> !,_
we have
n n
,. So at h igh fre quency, (I + = I and T/(1 + a: T/1 = T. So
t
I+
T
T~fl
\T for
for
ITl~ l
ITI< l
(9.1 I)
The asy mptotes correspo ndin g to Eq. (9. 11) are rela ti ve ly easy to co nstruct. The low -freq uency asy mp-
tote, for / <J,,,is I or O dB. The hig h-freq uency asy mpt otes , for f > !,_.,follow T. The resu lt is show n in
Fig. 9.6.
So at low frequ ency, where IIT IIis large, the refere nce -to-output tr ansfer function is
v(s ) l T( s) l (9. 12)

il ..,/ t) f /(s ) t + T(.1·) = H( .1·)

es II( I + T) a11dTl( I + T) and the Clo.red-Loop Transfer F11n

9.3 Constmctio11of the ImportantQrw11titi ctio11s 339
SO dB
60dB
40d B /4,i IITII
20 dB
OdB
ww -2 0 dB I.Ir I
w.E
-4 0 dB
I Hz JO Hz 100 Hz I kHz IO kHz JOOkHz
f
asy
Fig. 9.6 Graphica l constr uclion of the asy mptotes of II T/l l + 7) 11- Exact .:urves are omined .
This is the desired behavio r, and the feedback loop works well at freq uenc ies whe re IIT IIis large . At h ig h
freq uency (f-:» f) whe re IIT IIis sma ll, the refe rence -to-outp ut tra nsfer func ti on is
En (9.13)
gin
This is not the desired behavior; in fact, th is is the gain with the feedback co nnec tion removed (H -> 0).
At hi gh freq uencies , the feedba ck loop is una b le to reject the dis turb ance beca use the bandwid th of Ti s
Tl() + 1) asy mp to tes o f Fig. 9.6 by 1/H.

eer
li mited . TI1e refe rence -to-o utp ut tra nsfer fu nct ion can be co nstru cted on the gra ph by mult iply ing the
W e can p lot the asy mpto tes of IIl/ (1 + 7) II usi ng similar arg umen ts . At low freque ncies whe re
ing
II T II ::a,, l, then ( l + 7) "" 7, and hence 1/( I + 7)"' 1/T.At high frequ enc ies where 11T II < I, the n ( I + 7)
= 1 and 1/(1 + 7) = l. So we have
.ne
forj TJ -» l
(9 . 14)
I
for Ti < I
The asymp totes for the T(s) ex ample of Fig . 9.5 are plotted in Fig. 9.7.
t
At low freque ncies whe re II T II is large, the di st urbance tra nsfer fu nctio n from vK to v is
(9.15)
Again, Gvis) is the origi nal transfer funct ion, with no feedb ack. The closed-loop tran sfer funct ion has
magni tude reduced by the fac tor 111 1T 11- So if, for examp le, we wa nt to reduce this trans fer func tion by a
facto r of 20 at 120Hz, the n we need a loop ga in IIT IIof at least 20 ~ 26 dB at 120Hz. The dist urb ance
tra nsfer function from v" to v can be constructed on the graph, by multiplying the asymptotes of Fig. 9.7
by the asympto tes for G.s<s).
S imi lar argum ents app ly to the out put imped ance . The closed -loop output impeda nce at low fre-

340 Comroller Design
SOdB
60dB I ToIda
40dB
20d B
OdB
ww -20dB
w.E
--40 dB
-I Toldo
-60 dB
-SOdB
I Hz
asy IOHz IOOHz
I
I kHz !OkHz IOOkHz
En
Fig. 9.7 Graphical construction of 111/(I + 7) 11-
quencies is
v(s)
::i,,,Js) -
-
gin
z,,,,,(;') - z.,,,,(s)
I+ T(.1·) - T(s)
(9.16)
eer
The output impedance is also reduced in magnitude by a facto r of 1111T 11at frequencies below the cross-
ing
over frequency.
At high frequenc ies (f> f,_.)where II T II is small, then I /(I + I, and n "'
.ne
il(s) G,gC-1·)
v/t) = I + T(s) "' G,is)

(9 .17)
v(s ) z.,., (s) z ()
t
7~)
I /QaJ\-~
=l + T( .1·) ~ "'" J"
This is the same as the original disturba nce transfer function and outp ut impedance . So the feedback loop
has essent ially no effect on the dis turbance tran sfe r funct ions at frequencies above the crossover fre-
quency.
9.4 STABILITY
It is well known that adding a feedback loop can cause an othe rwise stable system to beco me unstab le.
Even though the transfer funct ions of the orig inal converter , Eq . (9. 1), as well as of the loop gain T(s) ,
contain no right ha lf-plane poles, it is poss ible for the closed -loop tran sfe r funct ions of Eq. (9.4) to con-
tain right ha lf-plane poles. The feedback loop then fai ls to regulate the syste m at the desired qui escent
operatin g point, and osc illa tions are usually observed. It is important to avoid this situat ion. And even
when the feedback system is stable , it is poss ible for the tr a nsien t response to exhibit undesirable rin gi ng

9.4 Stability 341
and overs hoot. Th e sta b ilit y probl em is discussed in this sect ion, and a method fo r en s urin g that the feed-
ba ck syste m is stable a nd well -beh ave d is exp lai ned.
Wh en feedbac k desta bilizes the system, the denomin ato r (1 + T(s)) terms in Eq . (9.4) co ntain
roots in the right hal f-p lan e (i.e., with positive real pa rts). [f T(s) is a rat ional frac tion, that is, the ratio
N(s)ID(s) of two po lynomi al functio ns N(s) and D(s), then we can write
N(s )
T(s) _D (s) _ N(s)
J + T(s) - 1 + N (s) - N(s) + D(s)
D(.r ) (9.18)
ww J t V(s)
l + T(J) "' 1 + N(s ) "' N(s) + D(s)
D(s)
w.E
So T(s) /( 1 + T(s)) and 1/( l+ T(s)) co ntai n the same poles, give n by the roots of th e poly nomial
(N(s) + D(s)). A brut e-fo rce tes t for stability is to eva luate (N(s) + D (s)), and facto r the result to see
whe ther any of the roots have pos itive rea l parts . However, for all but very simpl e loop gains, thi s
asy
in volves a great dea l o f work . A sim p ler metho d is give n by the N yqu ist sta bil it y theore m , in wh ic h the
number of righ t half-pla ne roots of (N(s) + D(s)) can be de ter min ed by testing T(s) [1,2]. This theo rem is
not discusse d here. However , a spec ial case o f the theo rem k now n as the pha se ma rg in test is suffic ie nt
En
for des ign ing most voltage reg ul ators, and is di scussed in thi s sec tion .
9.4.1 The Phase Margin Test
gin
eer
The crossove r fre qu ency J;. is define d as the frequency where th e magn itude of the loop gain is un it y:
!r(J2n1,.)j==
t ==a-OdB (9. 19)
60d B ing
IITII LT
.ne
IITII
20 d8
o· t
- 20dB
-4 0 dB ..... .......... . . ............ . ........

.........
.......
..........t.cp
'".........
...............
...............
...... -1so·
- 270"
I Hz tO Hz IOOHz I kHz IOkHz JOOkHz

f
Fig. 9.8 Magnitude and phase of the loop gain of a stable system. The phase margin <p..,is posit ive.

342 Conrroiler Design
60dB
IITII IIT II L. T
20dB
LT o·
- 20dB -90 '
ww -40dB - 180"
w.E I Hz IOHz IOOHz I kHz JOkHz 100kHz
l<'ig.9.9 Mugnitu<le <111d

asy f
phase uf the loop gain of an unstable system. The phase m.argin <p111 is n~gative.
To co mpu te the phase margin

and 180° is added. Hence,
(j)m,
En
the ph ase of the loop ga in T is eva luated at the crossove r frequ ency,
gin
q>. , = 180' + L'. T(j2n
fc) (9 .20)
eer
If there is exac tly one crossover frequen cy, and if the loop gain T(s) contains no right half-plane poles,
then the quanti ties 1/(1 + T) and T/( I + T) contain no right half-plane poles when the phase marg in
de fined in Eq. (9.20) is positive. Thu s, m ing a simple test on T(s), we can determ ine the stability of
greater than - 180° at the crossover frequenc y.

ing
T/(1 + T) and 1/(1 + T). This is an easy -to-use design tool- we simple ensure that the phase of T is
When there are mult iple crossover freque ncies, the phase margin tes t may be ambiguo us. Also ,
.ne
when Tcontains right ha lf -p lane poles (i.e., the or igin al ope n-loop system is unstable ), the n the phase
margin test can not be used. In either case, the more general Nyqu ist stability theore m must be emp loyed.
t
The loop gai n of a typ ica l stab le system is shown in Fig. 9.8. It can be seen th at
= - 112'. Hence , q,,,.= 180° - 112' "'+68'. Since the phase marg in is pos iti ve , T/(1 + T) and
L T(j2rr.f,_.)
1/( 1 + T) contai n no right half-plane poles, and the feedback system is stable.
The loop gai n of an un stable sys tem is sketched in Fig . 9.9. For th is exam ple,
LT(j21tf) = - 23 0". The phase margin is (fl,. , = 180' - 23 0' = -5 0". The negative phase marg in implies th at
T/( 1 + T) and 1/( l + T) each contain at least one right half-plane pole .
9.4.2 The Relationship Between Phase Margin and Closed-Loop Damping Factor
How much phase margin is necessary? Is a worst -case phase mar gin of l O satisfacto ry? Of cour se, good
designs shou ld have ade qu ate des ign margins, but there is anot her imp ortant reaso n why ad di tiona l ph ase
margin is needed. A small phase margin (in T) causes the closed-loop transfe r functions T/(1 + T) and
1/(1 + T) to exhibit resonant poles with high Q in the vicinity of the crossover frequency. The system
transient response exhibits overshoot and r ingi ng. As the phas e marg in is reduced these characterist ics

9.4 Srabiliry 343
40dB
IITI\ LT
20dB
OdB
-2 0 dB I lo/2
y
-40dB o·
ww
LT - 90' ~/IO
' -90'
...................
. .... ...............
..........................
.......
.......
......
..........;;:
...:::,
...,..
. ------4 - 180'
w.E ,.____________________
f
______ ,.. - 270'
asy
Fig. 9.JO Magnitude and phase a~ymptoles for the loop gain Tof Eq. (9.21 ).
o-,
become worse (higher Q, longer ringing) until , for rpm:'> the system becomes unstable.
En
Let us conside r a loop gain T(s) which is well-approximated , in the vicinity of the crossover fre -
quency, by the fo llowing func tion:
-
T(s) - ( oio-:-l(
I
-+
:-=-t
gin
-J~;:} (9,21)
eer
Ma gnitude and phase asymp totes are plotte d in Fig. 9.10. This func tion is a good approxima tion near the
crossover frequenc y for man y common loop gains , in wh ich II T II approaches un ity gai n with a
- 20 dB/decade slope, wit h an addit ional pole at freq uen cy / 2 = W/2n. Any addition al poles and zeroe.~
are assmned to be suffic iently far above or below the crossover frequency , such that they have neg ligible
effec t on the system transfer fu nctions near the crossover frequency . ing
Note that, as / 2 - • 00 , the phase mar gi n (flm approaches 90°. As / 2 > 0, <p,..· + o·.
.ne
So as / 2 is
reduced , the phase marg in is al so reduced. Let ' s invest igate how this affects the dose d-loop response via
T(I + n.
t
We can write
(9.22)
usi ng Eq. (9.21). By putting thi s in to the sta ndard no rm al ized qu adra tic for m, one obtains
T(s) J
1 + T(s) = J + ..L +
QW,. UJ,.
1 (_L) (9.23)
where
w" = .jw;f]ji = 2rr._f,.

344 Co111roll
er Design
40dB
Fig. 9.11 Constructio11 of 20 dB

magnitude asymptotes ilf the fc = ./ fo ./2 i
Tl(l + 7), for the low-Q case.
-20dB
I I rTI
closed-loop transfer function OdB +----------a.+,,,-----t.:
. ......f Q =lo/J,
.......
. ...
-40dB
ww f
w.E
So the closed -loop response contai ns qu adratic po les atJ;,., th e geo metric me an of / 0 a nd h_.These po les
qu enc ies:
asy
have a low Q -factor when f <:/ 2 • In this case, we can use the low-Q approxim at ion to est imate their fre-
0
En (9.24)
gin
Ma gn itude asym ptotes are plotted in Fig. 9. 11 for this case . It can be seen th at the se asymp totes conform
to the rules of Sec tion 9.3 for constructing T/( 1 + 7) by the algebra -on-the -gra ph method .
eer
Next consider the high -Q case. When the pole freq uency /2 is reduced, red uci ng the phase mar-
gin, then the Q-fac tor given by Eq. (9 .23) is increased. For Q > 0.5, resonant poles occur at frequency J;..
ing
The magnitude Bode plot for the ca~e/ 2 <.{0 is given in Fig. 9 .12. The frequency}; conti nue s to be the
geometric me an of / 2 and f 0 , and .f:Cnow co incides with the crossover (u nit y-ga in ) frequency of the II T II
asymp totes. Th e exact va lue of the close d-loop ga in T/( l + 7) at frequency f r. is equ al to Q = J;/fc· As
shown in Fig . 9. 12, thi s is ident ica l to the value of the low -frequency - 20 dB/decade asy mptote (/ 0 /fl,
.ne
evaluated at fre qu ency fc· It can be seen th at the Q-fac tor becomes ve ry large as th e pole frequency /2 is
red uced.
The asymptotes of Fig. 9. 12 also follow the alge bra-on -th e-graph ru les of Sectio n 9.3, but the
dev iation of the exact curve fro m the asymp totes is not pred icted by the algebra -on -the-gra ph method.
60dB
t
40dB
Fig. 9.12 Construction of
magnitude a.s)'mptote s of the
closed-loop transfer func tion 20 dB .......
.........
..........
.!
T/(1 +"/),for the high-Q case. !······
·····..._ Q =f,lf
0 dB -1----------===-- --4-
· . ___
..,_.-···,+····-···· 0 . <- ····-··--- ·--··-
- 20dB
I1ITI £=ill fo t
- 40 dB/decade
-40dB-1----->-----+---.;....-+------+-----
/

9.4 Stability 345
20dB
Q
15dB
\
~
lOdB
5dB ~"' ~
...............
."\
OdB Q=l=>Od.B ,--......
(jl .. = 52" r-------_
ww -5dB
- IOdB
Q 0.5=>-6dB
-.....
(j).,=7 6'
w.E
- IS dB
-20dB
'
asy
10" 30° 40°
<P
m
50° 60" 70° 80° 90°
En
Fig, 9.13 Relationship between loop-gain phase margin (jl,.,and closed-loor peaking factor Q.
These two poles wilh Q-factor appear in both T/(l + 1) and l/(1 + 7). We need an easy way to pred ict the
gin
Q-factor. We can obtain such a relation sh ip by find ing the frequency at which the m ag nitu de of Ti s
exact ly equal to un ity. We then eva luate the exact phase of Tat this frequency, and co mpute the phase
marg in . Th is phase margi n is a function of the ratio f 0// 2 , or Q2 . We ca n then solve to find Q as a func tion
of the phase mar g in . The res ult is
Q= .;~sq,"' eer
S111'1).,,
<~ "'tan·L
I'm v / I+ v'I+
2Q4
4Q'
ing (9.25)
.ne
Th is functi o n is plotted in Fig. 9.13, wi th Q expressed in dB. It can be seen that obtaining real poles
(Q < 0.5) req uires a pha se marg in of at least 76 ° . To obtain Q = l, a pha se mar gin of 52° is needed. The
sys tem wit h a ph ase mar g in of I O ex hib its a closed -loop response wit h very hi gh Q! With a small phase
mar gi n, TY.fro)is very nearly equal to - I in the vicin ity of the crossover frequency . The denomi nato r
( I + 7) then becomes very small, ca using the closed -loo p transfe r fun ctio ns to ex hibit a peaked re spon se
t
at freq uencies ne ,u th e crossover frequency fc.

F ig ure 9. 13 is the res ult for the si mp le loo p ga in defin ed by Eq. (9.21) . However , thi s loop ga in
is a good appro ximat ion for many other loop gains that are enco untered in prac tice, in which II T II
approaches unity g ain w ith a - 20 dB/d ecade slope, wit h an add itiona l pole at frequency f.1_, If all other
poles and zeroes of T(s) are suffic ien tly far above or below the crossove r frequency, the n they have ne gli-
gib le effect on the system transfer functions near the crossover frequency, and Fig . 9.13 gives a good
approx im atio n for the re lat ions hip between (!),,, and Q.
An other co mm on case is the one in wh ic h II T II approaches un ity gain wit h a -40 dB/deca de
slope, with an add iti ona l zero at frequency / 2. Asf 2 is increased, the phase margin is decreased and Q is
increased . It ca n be show n that the rela tion between rpmand Q is exac tl y the same, Eq. (9.25).
A case where Fig . 9. 13 fails is when the loop gai n T(s) thr ee or more poles at or ne ar the cross -

346 Co11rroiler
Design
over frequency . Th e closed -loop respo nse the n also contains three or more poles near th e crossover fre-
quency , and these poles canno t be completely character ized by a single Q -factor. Add itional work is
req uired to find the behavio r of the exact T/( 1 + T) and 1/(1 +7) near the crossover freque ncy , but none -
the less it can be sai d th at a s ma ll pha se m argi n leads to a pea ked close d-loop respo nse.
9.4.3 Trans ient Response vs. Damping Factor
One can solve for the uni t-step response of the T/( 1 + T) transfer function , by mult iplying Eq. (9.23) by
ww
1/s and then taking the inverse Laplac e tra n sform . Th e res ult for Q > 0.5 is
•
v(t) = I + 2Q,r
12Q .
"'c1 [v4Ql
,/4QZ _ I · Sm ~
2- ( 4Q-, - I
W 4/IJ' the Q-facto r is less than 0.5, and the closed -loop
v(r)
ing
.ne
1.5
t
0.5
0
0 5 JO 15
Wet, radians
Fig. 9.14 Unit-step resp onse of the se<.:oml-orde r system, Eqs. (9.26} and (9 .27) , for var iou s va lui:s of Q.

response contains a low -frequency and a high -freq uency rea l pole. The tra nsient response in this case,
Eq. (9.27), contains decay ing-expo nentia l functions of time, of the form
(9.28 )
This is ca lled the "overdamped " case. With very low Q, the low -frequency pole leads to a slow step
respo nse.
For/ 2 = 4fo. the Q-factor is equal to 0.5 . The closed -loop response co ntain s two real poles at fre -
quency 2J0 , This is called the "cr itica lly damped " case. The tra nsie nt response is faste r th an in the over-
damped case, because the lowest -freque ncy pole is at a hig her frequency . This is the fastest response that
ww
does not exhibit overs hoot. At rn,.1= nra dians (I= 112.f) , the vo ltage has reached 82% of its final value.
At ooct= 2n radia ns (r = life.), the voltage has reached 98.6% of its final value.
For / 2 < 4frl' the Q-factor is greate r than 0.5. The closed -loop respo nse co ntains complex poles,
w.E
and the tra nsien t response exhibits sinusoida l-type wavefo rms with decaying amp litu de, Eq. (9.26). The
rise tim e of the step response is faster than in the cr itica lly- damp ed case, but the waveforms exhibit over-
shoot. The peak value of v(I) is
asy peak f,(I) = 1 + e- "i,!~ (9.29)
En
Th is is called the "underdamp ed" case. A Q-factor of I leads to an overshoot of 16.3%, while a Q-factor
of 2 leads to a 44.4% overshoot. Large Q-fac tors lead to overshoots approach ing 100%.
The exact trans ien t response of the feedback loop may differ from the plots of Fig. 9.14,
gin
becau se of additional poles and zeroes in T, and because of differences in initial conditions . Nonetheless ,
Fig. 9. 14 illustrates how high-Q poles lead to overs hoot and ringing. In most power applications, over-
shoot is unacceptable. For example, in a 3.3 V compute r power supp ly, the vo ltage must not be allowed
eer
to overshoot to 5 or 6 volts when the supply is turn ed on- this would like ly destroy all of the integrated
circui ts in the computer! So the Q-factor must be suffic iently low, ofte n 0.5 or less, corresponding to a
ing
phase mar gin of at least 76°.
.ne
9.5 REGULAT OR DESIGN
Let's now cons ider how to desig n a regu lator system, to meet spec ificatio ns or desi gn goals regard ing
reject ion of distu rbances, tra nsient respon se, and stability . Typ ical de regulator designs are defi ned using
spec ificat ions such as the following:
l. E.ff
ecl of load c11rre111varia tions on the owplll voltage regulat ion. The outpu t voltage mu st remain w ithin a
speci fied range when t he load c urr ent varies in a prescribed way. Th is amount s to a limi t on the maxim um
t
magn itud e of the closed- loop o utp ut imp edance of Eq. (9.6) , repeated below
(9.30)
If, over some frequency range, the open- loop ou tput impedance Z,,,.,has mag nitud e that exceeds the li mit ,
then the loop gai n T mus t be sufficiently large in mag ni tude over the same fre qu ency range , such tha t the
magnitud e of t he closed-loop ou tput impedanc e gi ven in Eq . (9.30) is less than the given li mit.
2. Effect of inpm voltage vari ations (for examp le, at the seco nd ha rmo ni c of the {IC lin e frequenC) ) on the 0 111-
plll volrnge regulation. Specifi c max imum li m its are usually placed on the amp litud e of var iations in the

348 Controller Design
outp ut voltage at the second har monic of the ac line frequency ( 120 Hz or 100 Hz). If we know the magn i-
tude of the rect ification voltage ripple wh ic h appears at the conv ener in put (as 1\}. then we can calc ulate
the res ultin g outpu t voltage ripple ( in v) usi ng the closed loop line -t o -ou tput tran sfer func ti on of Eq. (9.5),
repe ated below
v(s) I _
G,i,i)
(9.3 1J
~,(-1) '...,1 =n - I+ T (s)
l / oi"J.!!:0
The ou tput voltage ripp le ca n be reduced by increas ing the magn i tude of the loop gain at the ripp le fre-
que ncy. In a typ ical good des ign, II '/' II is 20 dB or more at 120 Hz, so tha t the transfer functio n of Eq.
ww 3.
(9.31) is at least an order of magnitude small er than the ope n-loop line-to-o utp ut tra nsfer func ti on II0 ,.KII.
Tra11s
ie111response time. When a spec ified large dis turbance occurs , such as a large step change in load
w.E
cu rr ent or inp ut voltage, the ou tp ut voltage may undergo a trans ie nt. D uri ng th is tran sient , the output vol t-
age typ ically deviates from its specified allowab le range. Even tua lly, the feedback loop opera tes to retu rn
the o utput voltage with in to leran ce. The time req uired to do so is the tran sien t response ti me ; typically , the
response time can be shortened by increas ing the feedback loop crossover frequency.
4.
asy
Overshoot a11dringing. As di scussed in Section 9.4.3, the amoun t of overs hoot and ringing allowe d in the
transie nt response may be lim ited . Such a specificatio n implies that the phase mar gi n mus t be sufficiently
large.
En
Each of these requ ire ments imposes co nstrain ts on the loop ga in T(s) . Th erefore, the desig n of the con -
trol sys te m invo lves mod i fy in g th e loo p gain. As ill ustrate d in Fig . 9.2 , a co mpe nsa tor net work is added
gin
for this purpose. Sev era l well -known stra teg ies for des ign of the co mpe nsator tra nsfer fu nc tion G,.(s) are
d isc usse d be low .
9.5.1 Lead (PD) compensator

eer
loop ga in , at a freq uency .f, s uffi c ie ntl y fa r be low the crossover fre qu ency J;_., ing
This type of co mp ensator tra nsfer fu nct ion is used to imp ro ve the phase margi n. A zero is added to the
such tha t the phase mar gin
of T(s) is increased by the des ired amou nt. TI1e lea d comp e nsator is also calle d a proportional -plus-
.ne
derivative, or PD, co ntro ller - a t hi g h freq uenc ies, the zero ca uses the com pensator to di ff ere nt ia te the
erro r signal. It of ten fi nds ap plicat ion in systems orig ina ll y conta inin g a two -pole respo nse . By use of
thi s type of co mp ensator, the bandwidt h o f the fee dba ck loop (i.e., th e crossover frequency J;) ca n be
J,,
t
Fig. !US Magnitud e and pl1asc asymptot es IIGell Geo

of the PD co mpensator 1rnmfcr fun clion C, of i ....
f,
Eq. (9.32). =JI.I,,
f,,110 I0/2
o·
L GC

9.5 Regulator DeJig11 349
Maximum 9o·
ph ase lead
75'
60'
Fig. 9.16 Maximum
phase lead 8 vs. fre-
quency ratio J,,
lf, for the 45'
lead co mpensato r.
30·
ww 15"
w.E 10 100 1000
asy
extended whil e ma int ai nin g an accep table pha se marg in.
A side eff ec t of the zero is that it ca uses the co mp ensator gain to increase w ith frequ ency , w ith a
+20 dB/ dec ade slope. So steps mu st be take n to ensure th at II T II re m ai ns equ al to unit y at the des ired
En
crossov er frequ ency . Also, since the g ain of any pract ical amp lifie r mu st te nd to zero at hi gh freq uency,
the co mpensator tra nsfer fu nct ion G,.(s) mu st conta in high fre qu ency poles. These poles also have the
gin
be neficial effect of atte nu ating hi gh -fre qu e ncy noise. O f partic ul ar concern are the switc hi ng freq uency
har mo nics prese nt in the o utp ut vo ltage and feed back signals. If th e co mpe nsator ga in at the sw itc h ing
freque ncy is too great, then these sw itchin g har m on ic s are am plified by the co mpensator, and can disrupt
eer
the operat ion of the pulse -w idth mod u lator (see Sec tion 7 .6). So the co mpensa tor network sho uld co nt ai n
poles at a freq uency less than th e sw itch ing frequ ency. These co nside rations typ ically res trict the cross-
over freq ue ncy f c to be less than ap proxi mately 10% of the co nverte r sw itch ing freq uency f, . [n addit ion,
ing
the c irc uit des igner mu st take care not to exceed the ga in -ba nd w idth limit s of av ail able operat ional
amp lifie rs.
.ne
TI1e tra nsfe r fun c ti on of the lead co mp e nsator therefore co nta ins a low -frequ ency zero and sev-
eral hi gh-fre qu e ncy po les. A s im plifi ed examp le co nt ainin g a sin gle high-freq uency pole is given in Eq.
(9.32) an d illu strated in Fig. 9.15.
• {l + J,)
G,.(s) ~ G,0 -( l -+ _,.._
(OP
.-)
(9.32) t
TI1e max im um phase occ urs at a frequ ency /"" 11,., given by the geo metr ical mean of th e pole and zero fre-
q uenci es:
(9.33)
To ob tain the m ax i mum improve me nt in ph ase marg in , we sho uld des ig n our co mpensator so tha t the
co incides w ith the loo p gain crossover frequ ency f, .. The val ue of th e phase at th is fre -
freq uen cy f'f),mi:r
que ncy can be show n to be

350 Co111roller
Design
60dB
To
40dB IITII ToG,o
11711 LT
Compensated gain
20dB
OdB
fc
-20dB l
Compensatedphaseasympto!es
ww -4 0dB
LT
o·
Original phase asympto tes

l
l
'
o·
-90'
w.E ------ --------- ----+------+

asy f
-2 70"
En
Fig. 9.17 Comp,msat ion of a loo p gain co ntaining two poles, using a lead (PD) compe nsator. Th " phase marg in l(l,.,
is imprnved.
gin (9 .34)
eer
This equat ion is plotted in Fig. 9.16. Equation (9.34) can be inverted to obta in
fr,
J, =
l+s in(t!)
I - sin (9) ing (9.35)
.ne
where f:l = - C,.(f<rm1<1

x). Equatio ns (9.34) and (9.32) imply that, to optimall y obtain a compensator phase
lead of 0 at frequency J;.,the pole and zero frequencies should be chosen as follows :
l
.
V
= .1o-
/ l - sin (8)
1 + s,n (aJ
t
(9.36)
• ; I +sin(e)
JP=I,, \ T- sin (e)
When it is desired to avoid changing the crossover frequency, the magnitude of the compensator
gain is chosen to be unity at the loop ga111crossover frequency f c. Th is requires that 0, 0 be chosen
according to the followi ng formula:
(9 .37)
It can be seen that G, 0 is less tha n unity, and therefore the lead compensator reduces the de ga in of the

9.5 RegulatorDesign 351
feedback loop. Other choices of Geo can be selected when it is desired to shift the crossover freque ncy {.;
for example , increasing the va lue of G,fJcauses the crossover frequency to increase. If the frequencies Ip
and fz are chosen as in Eq. (9.36), then f(jll
11.u.ofEq. (9.32) will coinc ide with the new crossover freq uency
/,_..
The Bode diagram of a typical loop gain T(s) containing two poles is illustrated in Fig. 9.17.
The phase margin of the original T(s) is small , since the crossover frequency/,_. issubstantially greater
than the pole frequency / 0. The result of adding a lead compensator is also illustrated. The lead com pen-
sator of thi s examp le is designed to maintain the same crossover frequen cy but improve the phase mar-
gin.
ww
9.5.2 Lag (Pl) Compensator
w.E
This type of compensator is used to increase the low -frequency loop gain, such that the output is better
regul ated at de and at frequencies well below the loop crossover frequen cy. As given in Eq. (9.38) and
illustrated in Fig. 9.18, an inverted zero is added to the loop gain , atfrequency fi:
asy GJs ) = G,""(I+ -~.1,_) (9.38)
En
If fL is suffic ient ly lower than the loop crossover frequency f,_
., then the phase margin is un change d. This
type of compensator is also called a proportional -plus -integra l, or Pl , controlle r- at low frequencies, the
gin
inverted zero causes the compensator to integrate the error signal.
To the extent tha t the compensator gai n can be made arbitraril y hu-ge at de , the de loop gain T(O)
becomes arbitrari ly large. This causes the de component of the error sig nal to approach zero. In conse-
eer
quence , the steady -state output vo ltage is perfect ly regulated , and the dist urbance -to -outpu t transfer
functions approach zero at de. Such behavior is easi ly obtained in practi ce, with the compensator ofEq.
(9.38)realized using aco nve nti onal operat ional amplifier.
ing
Although the Pl compensator is useful in nearly all types of feedback systems, it is an espe-
cially simp le and effective approach for systems originally contain ing a sing le pole. For the example of
.ne
Fig. 9. 19, the original uncompensated loop ga in is of the form
t
Ge-
Fig. 9.18 Magnitude and phase asymptotes
of the Pl compensator transfer function Ge of IL
Eq. (9. 38).
JO/, o·
LGC
-9o·
fz.110

352 Comroller Design
IITII
40dB
20dB
1171111
OdB
-2 0dB 90'
LT 11
-4 0dB 1------=:::...,_ o·
ww L---~
~.~·
... ···
--
···········
··········
···
·-·······
·····
··· ···
····
····
·· ··········
·'.~.......
~~
!
IOJi
___;;:::;;;....:......-_,,_L-
- -1 _90·
w.E I Hz I kHz
~m·······-
IOkHz
··············· -180'
IOOkHz
asy
lOHz lOOHz
f
Fig. 9.19 Compen sation nf a loop gain containing a single polt!, using a lag (Pf) compensator. The loop gain
magnitude is increased.
En
gin
T,.(s) ,,,_( T11
n
-. ) (9.39)
I +...L
Wo
eer
The compensa tor tra nsfer functio n of Eq. (9.38) is used, so tha t the compensate d loop gain is
T(s) = T,,(s)G,.(.f),Magnitude and phase asymptotes of T(s) are also illustrated in Fig. 9. 19. The compen-
sator high -frequency gain G,- is chosen to obta in the des ired crossove r frequency J,.. If we app roximate
ing
the compensated loop gain by its high -freq uency asymptote , then at high frequenc ies we ca n write
.ne
(9.40)
At the crossover freq uen cy f

crossover freq uency is
= J;_.,the loop ga in has un ity magn itude . Equation (9.40) predicts that the
t
(9.41 )
Hence, to obtain a des ired crossover frequency [,_.,we shou ld choose the compe nsator gain G,_ as fol-
lows :
(9.42 )
The corner freq uency JLis then chosen to be suffic ien tl y less than f,., such tha t an adeq uate phase mar gi n
is ma intaine d.
Magnitude asymptot es of the quantit y 1/( I + T(s)) are con struct ed in Fig. 9.20. At frequ enc ies

9.5 Regulator Desig11 353
40 dB
20 dB
OdB
- 20 dB
-40dB
ww l Hz lOHz JOOHz ! kHz JOkHz IOOkHz
Fig. 9.20
w.E I
Construccion of II 1/( 1 + ·o IIfor chcPl-comp ensated example of Fig. 9. 19.
asy
less tha n fv the Pl co mp ensa tor improves the reject ion of d ist urb ances . At de , where the magnit ud e of G,.
approac hes infinity, the magn itude of 1/(1 + 7) tends to zero. Hence, the close d-loop disturbance -to-out-
put transfe r functi ons , such as Eqs. (9.30) and (9.3 1), tend to zero at de.
9.5.3 Combined (PID) Compensator

En
gin
The advant ages of the lead and lag co mp ensators ca n be co mb ined , to obta in both wide ban dwid th a nd
eer
zero steady-state error. At low frequenc ies, the compensator integra tes the error sig nal, leading to large
low -freq uency loop ga in and acc urate reg ula tio n of the low -fr equ ency compo nents of th e output vol tage .
At hi g h freq uency ( in the vici ni ty of the crossove r fre qu ency) , the compe nsator intro duces phase lead
ing
into the loop gain , imp roving the phase marg in. Such a co mpensator is sometimes called a PID control-
ler.
40 dB
.ne
IIG,11 L G,.
20dB
OdB
t
- 20 dB 90'
-40 dB
fp/ 10
o·
- 90' 90'/dccade
-1-
L_G
_c_;
· .i:....-/,""
L/'l"'
l.-0~/ / 10 - 90'
- 180'
f
Fi11.9.21 Magnitud e and pha se asy mptotes of the co mbined (/'ID) compen sator tra nsfer function G,. of Eq. (9.43).

A typica l Bode diag ram of a practica l version of this com pens ato r is ill us trated in Fig . 9.2 1. The
co mpe nsator has tr ansfe r fun ctio n
. ' - ( l + ~-i )[ l + ~. )
(9.43)
C,(.1) - G,rn-( s )( , )
!+ {J) l+ (J)
pl µ2
Th e in verted zero at fre qu ency 11.

fun ctio n s in the same manner as the Pl compensa tor. The zero at fre-
r
quen cy adds phase lead in the v ic init y of the crnssover frequency, as in the PD com pensator. Th e h igh -
frequency poles at freq uencies fp 1 and J;,2 must be present in pra ctic al compe nsato rs, to ca use the ga in to
ww
roll off at high frequen cies and to preve nt the sw itc hing ripple from d isru pting the operatio n of the pulse -
width modu lator. The loop ga in crossover fre qu ency fc is chose n to be greater than fl and l_,but less than
J;,1and /i,2·
9.5.4 w.E Design Example
asy
To ill ust ra te the desig n of Pl and PD compe nsators, let us consider the des ign of a combi ned PID com -
pen sator for the d e- de buck co nve rter system of Fig. 9.22 . The inp ut voltage vit) fo r thi s syste m has
En
nomina l val ue 28 V. It is de sired to suppl y a regu lated 15 V to a 5 A loa d. The load is modeled he re w ith
a 3 Q resistor. An accur ate 5 V re feren ce is availab le .
gin
The first step is to select the feedb ack gain H(s). The gain H is chose n such that the regu lator
prod uces a regula ted 15 V de out put . Let us assu me that we wil I succeed in des igning a good feedback
syste m, which ca uses the outp ut vo lt age to accura te ly follow the reference volta ge . Thi s is accomp lishe d
eer
via a large loop ga in T, which leads to a sma ll error voltage: v,,"' 0. Hence , /Iv "' v,,,J' So we shou ld choose
(9 .44 )
The quiescent du ty cycle is &11venby the steady -state so lution of the co nverter: ing
.ne
L
SOµH
v,<t) C
+
t
v(t) R
28 V SOOµF 3Q
Sensor
H(s) gain
J, ==100 kHz
Transistor
gate driver
Pulse-width
modulator Gc<s)
VM= 4 V Compensator
vref
5V
Fi i:;. 9.22 D~.~ign ~xa111plc.

v(s) R i1,md(s)
ww
w.E I
VM
d(s)
asy
Compensat or VM=4 V
H (s)v( s)
En H (s)
H=½ gin
eer
F ig. 9.23 System small-signal ac mode!. desig11example.
V - 15 - ()5 36
D -- v- (9.45)
ing
28 - ·
n
The qu iesce nt va lue of the co ntro l volt age , V,, must sa ti sfy Eq . (7. 173). Hence ,
.ne
(9.46)
Thu s, th e qu iesce nt co ndi tio ns of th e syste m are kn ow n . It re mai n s to des ig n the co mpe nsato r ga in GJ s).
A smal l- sig na l ac mode l of th e reg ulator syste m is illu stra te d in Fig . 9.23 . Th e buck converter ac
model is represente-d in ca noni cal for m . Distur ba nces in the inpu t voltage a nd in th e load curre nt are
modeled. For gen era lity, refere nce voltage varia ti on s \I,,.1 are included in the diagra m ; in a de voltage reg-
t
ulator , these var iati ons are nor m all y zero .

The open-loop converter transfer fu nct ion s a.re discussed in the previo us chapters . 111e open-
loop contro l-to-out put tra n sfer fu nction is
G,,f,_.
t) =t -- L~
I - (9.47)
l + '7i + s 21,C
Th e open -loop co ntrol -to-output transfer func tion con tains two poles, and can be written in the fo llow ing
nor m alize d for m :

356 ControllerDesign
60dBV
IIG,dll LGvd
40 dBV I--II _G_.,J_
• II
_S~-dO= 2~_v lfQ0 = 9.5 => I9.5 dB
=> 22_~~~-==----l-··
__ ___
20dBV fo
LG, ,d 10-inQofo=900 Hz
OdBV 1---~-------- -- ~ o·
- 20dBV -90·
ww -40dBV
101/2Qofo = l.l kHz
w.E
-210·
I Hz JOHz JOOHz l kHz IO kHz 100 kHz
Fig. 9.24
asy I
Convener small-signal control-lo-output lrnnsfer func1ion G,.•, dc,ign example.
En
G,,,(s) = G,/()- - -.- 1- ( , }1
!+ - ·\- + ...L
(9.48 )
gin
QoOJo Wo
By equa ting like coeffic ients in Eqs. (9.47) and (9.48), one finds tha t the de ga in , corne r frequency , and
eer
Q-factor are given by
Ge/fl=1;=28V
fo = ~; =
Q0 = R If=
znhzI kHz=
9.5 => 19.5 dB ing (9.49)
.ne
In practice, parasitic loss e lements, such as the capacitor equivalent series resistance (esr ), would cause a
t
lower Q-factor to be observed. Figure 9.24 contains a Bode diagram of G,,,fs).
The open-loop line -to -output transfer function is
(9.50)
This transfer function con tains the same poles as in G.Js), and can be written in the norma lized form
G ._(s)=GRll
l+ -s-+
1 (
.L
)i (9.51)
Qo/JJo w (l
wit h G80 = D. The open -loop output impedance of the buck conve rter is
Z..,,(s) = R II ~ IIsl = - ----c

i=rl
~_ (9.52)
-1· I +.1·R. +s 2 LC

9.5 Regulator Desig11 357
i (s) loa.d c_u

rrent
lood variallon
v,(s) v(s)
ww Converter power stage
w.E H(s)
asy
Fig. 9.25 Sy stem block diag ram , design e,rnmple.
Use of these equations to represent the converter in block -diagram fom1 leads to the complete syste m
block di agra m of Fig. 9.25. The loop gain of the syste m is
En
T(s)=GJs)( J.Ja,js)H(s)
gin (9 .53)
eer
Substitution of Eq. (9.48) into (9.53) leads to
GJf)H(s) V 1
(i _s
ing
T(s) =
(9.54)
Vu l5 + + (....L}2)-
Q0Wo Ulo
40dB
.ne
20dB
t
IIT.11 T.o 2.33 ~ 7.4 dB
0 dB ·················-·-· ······-·· ········-·· ·········- ····-········

-20<1B
- ...1...
-40dB
o· 10 2afo = 900 Hz
o·
LT.
- 90"
.µ,,
--------~ l
- 180'
lOla .fo= LI kHz
+--------+-----------<,__ _________ 270·
I Hz IOHz JOOHz lkH z JOkHz 100 kHz
f
Fig, 9.26 Uncompensated loop ga in '!;,.
desig n examp le.

358 Contro ller Design
40dB
20d B IIG,11
fc
OdB ·························· ······-···· f z .........= .[lJ'; ··-········
···································· ·········-·····
90'
o·
ww
LG, .
-90'
w.E I Hz IOHt 100 Ht I kHz 10 kHz IOOkHz

-1so·
Fig. 9.27
asy f
PD compe nsator transfer fu11ccionG,, dc~ig11example .
En
Th e close d-loop dis tu r ba nce -to - o utpu t transfe r fun ct io n s are given by Eqs. (9.5) and (9.6).
Th e unco mpe nsate d loop ga in 7:,(.\'), w ith u n ity co mpe nsator ga in , is sketched in Fig . 9.26. W it h
gin
G,.(s) = l, Eq. (9.54) can be writte n
(9.55)
whe re the de ga in is eer

1·,., = 11:
=
M
2.33 ~ 7.4 di!
ing (9.56)
.ne
The uncompe nsate d loop ga in has a crossover frequency of approx ima tely 1.8 kHz, with a phase marg in
of less th an five deg rees .
Let us design a co mpe nsato r, to atta in a crossove r fr eque ncy oft;. = 5 kHz. or one twe ntie th of
th e sw itch in g frequ ency. Fro m Fig. 9.26, the un co mp e nsa ted loop gai n has a m ag ni tude at 5 kHz of
approxim ate ly T,ftj(f 0 lf._)2= 0.093 ~ -20.6 dB. So to obtain un ity loop ga in at 5 kHz, ou r co mpensator
should have a 5 kHz ga in of +20.6 dB. In ad d it io n , the compe n sator shoul d imp rove the ph ase m argi n,
t
since the ph ase of the un co mpe nsate.d loop ga in is nearly - 180° at 5 kHz . So a lead (PD ) compensato r is
needed . Let us (so mew hat ar bitr ari ly) choos e to des ign for a ph ase marg in of 52°. Accor ding to Fig. 9.13,
th is choice lea ds to closed -loo p poles having a Q -factor of 1. The unit step respo nse, Fig. 9. 14, then
exh ib its a peak overshoo t of 16%. Eva luat ion of Eq. (9.36), wi th f.. = .5kHz and O = 52', leads to th e fo l-
low in g co mp ensator po le and zero fr equ e ncies:
/ = (5 kHz)
' ·V
FI- sin (520} = I. 7 kl lz
I i- sin (52°) (9.57)
fr " (5 kH z) V l + sin (52")
-1-- ..-{S 'J". = 14.5 kHz
-sm - )
To obta in a compe nsa tor gai n of 20.6 dB ~ 10.7 at 5 kHz, the low - freq uency co mpensa tor ga in mu st be

40dB
IIT II L.T
fo
OdB 1 kHz/,_ .........
1.7 kHz fr
- 20dB 5 kHz /p
900 Hz 14 kHz
o·
ww
L.T 170Hz
-90"
1.4 kHz 17 kHz
·······
f ,=52"·········-· ···-· ······
w.E
·····-···········-·······-··· ················· ...........•........... J. l kHz -180"
+----->-- -- ------- -----+----- -+

-270'
1 Hz 10 Hz lOOHz !kHz IOkHz 100kHz
asy
Fig. 9.28 The co1npensu1ed loop i;ain of Eq. (9.59).
f
G«, = (4)f- v~/,J;_

2
En = 3.7 => 11.3 dB (9.58)
JQ 1(0 ll
A Bode diagram of the PD compensator ma gnitude and phase is sketc hed in Fig. 9.27 . gin
With thi s PD controller, the loop gain becomes
( 1+ .s ) eer
T(.,) = 7'n0G,
0 - ·
( I + wr
--~ ' ---
,· ) ( I + .,· + ( .1· ) 2 )
Qo(llo roo
ing (9.59)
.ne
The compen sated loop gain is sketched in Fig. 9.28 . It can be seen that the phase of T(s) is approximately
equal to 52° over the frequency range of I .4 kHz to 17 kHz . Hence variations in component va lues,
which cause the crossover frequency to deviate somewhat from 5 kHz, should have little impact on the
phase margin. In addition, it can be seen from Fig. 9.28 that the loop gain has a de magnitude of T,,0G•.0
~ 18.7 dB.
Asymptotes of the quantity 1/(1 +7) are constructed in Fig. 9.29. This quant ity has a de asymp -
t
tote of - 18.7 dB. Th erefore, at frequencies less than I kHz, the feedba ck loop attenuates output vo ltage
disturbance s by 18.7 dB . For examp le, suppose that the input volta ge v/t) contains a 100 Hz variatio n of
amplitude I V. With no feedback loop, this disturbance would propagate to the output according to the
open -loop transfer function G,,/~), given in Eq. (9.51). At 100 Hz, this transfer func tion has a gain essen-
tially equa l to the de asymptote D = 0.536. Therefore, with no fee dback loop, a 100 Hz var iation of
amp litude 0.536 V wo uld be observed at the outp ut . In the presence of feedback, the closed -loop line -to-
output transfe r fun ctio n ofEq. (9.5) is obtained ; for our examp le, this attenuates the 100 Hz var iation by
an add itional factor of 18.7 dB=} 8.6. The 100 Hz ou tput voltage var iation now has ma gnitude 0.536/8.6
=0 .062V.
The low -frequency re gulation can be fur ther impro ved by addit ion of an inverted zero, as dis-
cussed in Section 9.5.2. A PID con troller , as in Sec tion 9.5.3, is then obt ained. The co mpensator transfer

360 ConrrollerDesign
ww
w.E I Hz IOHz 100Hz I kHz IOkHz 100 kHz
asy
Fig. 9.29 Cnn~truction 01· II l/( l + 7) IIfor the PD-~ompen.,atd
I
design cxampk, of Fig. 9.2 8.
fu nctio n beco mes
En l(
_
gin
Crt.r) acC", --
(I + ~, l +
(-.
l + ---L
_ )..
w,,
~L) (9.60 )
The Bode diagram of this co mpensator ga in is illustrated in Fig. 9.30 . The pole and zero frequencies f,
eer
and .fµare un changed, and are given by Eq. (9.57). Th e midba nd ga in G""' is chosen to be the sa me as the
prev ious G, 0• Eq. (9.58). He nce , for freque ncies greater tha n /, .• the mag nitude of the loop gai n is
ing
40d B
.ne
20dB f,,
0 dB
G .........
....................................................con.... .... fl ....fz_........
/,
...................................
.......
..
t
-2 0dB 90"
--40dB . . . 1p110 .
L Ge _ 90· 90'/decade
J, /10 -90'
fi /10 l
-1 80'
I Hz IOHz IOOHz I kHz IOkH:r; IOOkHz

f
l<ig, 9.30 PID co111p
ensamr tnm~fer function, Eq. (9 .60).

60dB
40dB
20dB
OdB
- 20 dB
ww -4 0 dB
w.E
-60dB
-80 dB +------+- -----+------+----- -+------<

I Hz 10 Hz IOOHz I kHz 10 kHz IOOk
Hz
asy
Fig. 9.31 Constmction of IITl1and II I/( l +
f
n IIwith the PfD-cumpensator of F•ig. 9.30.
En
unchanged by th e inverted zero. The loop co nt inu es to exhibit a crossover freq uency of 5 kHz.
So that the inverted zero does not sign ifican tly degrade the phase margin, let us (somewhat arbi-
gin
tra rily) choose .fL to be one -tenth of the crossove r freq uency, or 500 Hz. The inverte d zero w ill the n
increase the loop gai n at freq uencies below 500 Hz, improv ing the low-fre quency regu lation of the ou t-
put voltage . The loop gain o f Fig. 9.3 1 is obtained . The magnitude of the quantity 1/( 1 + T) is also con -
eer
strncted. It can be seen that the inverted zero at 500 Hz causes the magnit ude of 1/( 1 + T) at I 00 Hz to be
reduced by a factor of approxi mate ly ( 100 Hz)/ (500 Hz) = 1/5. The total attenu ation of 1/( 1 + T) at
ing
100 Hz is - 32.7dB. A I V, 100 Hz variatio n in vgC t) would now induce a 12 mV variation in v(t). Further
imp roveme nt s co uld be obta in ed by inc reas ing ft; howeve r , thi s wou ld req uire redesig n of the PD portio n
of the compensato r to mai nta in an adequate pha se margin .
.ne
The line-to-outp ut transfer function is constrncted in Fig. 9.32. Both the open-loop transfer
fu nction G,}s), Eq. (9.5 1), and the closed -loop transfer func t io n G 1/s)/( 1 + T(s)) , are construc ted usi ng
the algebra -on -the -graph method . The two transfe r funct ion s coi ncide at freq uencies greater than the
crossover freque ncy. At frequencies less than the crossover frequency fc,the closed-loop transfe r fu nc-
tion is reduced by a facto r of T(s). It ca n be seen that the poles of G,,/ s) are ca ncelle d by zeroes of
1/( 1 + T). Hence the closed -loop line -to-output transfer fu ncti on is approxi mate ly t
G,i s) _ D I
(9 .61)
( l + T(s}J T,.oG,,,. [t+ ~L)(1
.\
+ s ·)(!+
W:
I )
m,.
So the al gebra -on-the-gra ph method al lows simple app rox ima te dis turb ance -to-out put closed -loop trans-
fer functions to be wr itten . Armed with such an ana lytica l express ion, the system des igner can easily
compute the outpu t dist urbances , and ca n gain the insight required to shape the loop gain T(s) such that
syste m spec ificat ions are met. Comput er sim ul ati ons ca n then be used to ju dge wheth er the spec ifica tions
are met under all operatin g cond itions, and over expected ranges of compo nent parameter values. Results
of co mputer s imu lations of the des ign exa mple descr ibed in this section can be foun d in Append ix B,
Section B.2.2.

20 dB
ltJ OdB
Open-loop IIG ,g II
-20dB
-40dB
-60dB
ww -SO dB
- JOOdB
w.E l Hz lOHi. lOOHz 1 kHz lOkHz JOOkHz
asy f
Fig. 9.32 Comparison of ope11-loop line- to-o tnp ul transfer function G,.~ and closed- loop l,11e-1<
function or Eq. (9.6 I }.
H 1u1put tran sfer
En
9.6 MEASUREMENT OF LOOP GAINS
gin
It is good enginee ring pract ice to measu re the loop ga ins of proto type feedback systems . The objec tive of
eer
such an exercise is to ver ify that the syste m has been correct ly mode led . If so, then pro vided that a good
co ntro ller des ign has been implemented , the n the sys tem behavior will meet expectat ions rega rd ing tran -
sient overs hoo t (a nd phase marg in), rejec tion of dis tu rbances , de out put vol tage regu lation , etc. Unfor tu-
nate ly, there are rea sons why pract ica l syste m prot otypes are likely to diff e r from theoretica l models .
Phenomena ma y occ ur that were not acco unted fo r in the original model , a nd that signific a ntl y influe nce
the syste m beha vio r. Noise and ele c troma gne tic in terferen ce (EM I) can be prese nt, wh ich cause the sys- ing
.ne
tem transfer funct ions to dev iate in unexpec ted ways.

So le t us consider the measurem ent o f the loop gain T(s) of the feedback system of Fig. 9.33.
[
Block 1
.
l
A
: +
Bloc k 2
t
I G (s) v/ s)
1 + ~ v.,.(s)
I_.-············
········..
···-----.-. ,---4
!___
-..-.--.-.-..-_....
. =.-...-.,.--'
____
___
___
"4 ••• • .• • • •• H • .i
H (s)
l<'ig.9.33 II is desired to determine the loop ga in /' (.\·)experimentally, by makin g mea~ureme nt, at point A .

9.6 Measurement of Loo/J Gains 363
Block I Block 2
····-·····»·- ·············-······-····---·······-·1 de bias ···-·······-······
- ···-·· ··--
i !
!
j G2 (s)vx(s) = v(s)
ww
w.E
Fig. 9.34 Measurement of loup gain by breaking the loop.
We will make measurements at some point A, where two blocks of the network are connected electri-
asy
cally. In Fig. 9.33, the ou tput port of block 1 is represen ted by a Theven in-equi vale nt network, composed
of the depe ndent voltage source G I v, and outpu t impedance 2 1• Block I is loaded by the input impedan ce
Z2 of block 2. The remaind er of the feedback system is represented by a block diagram as show n. The
En
loop gain of the syste m is
Z 2(s)
gin
T(s) = Cl(.,) ( -- -· ) G 2(s)H( s) (9,62)
Z 1(s) + Z.(s}
eer
Meas urement of this loop gai n presents seve ral challenges not presen t in othe r frequency response mea-
surements.
In princ iple, one could break the loop at point A, and atte mpt to meas ure T(s) using the transfe r
function measure ment method of the previous chapter. As illu strated in Fig. 9.34, a de supply voltage
Vee and potentiometer would be used, to establish a de bias in the voltage 111 , such that all of the element s
of the network operate at the correct qu iesce nt po int. Ac voltage var iati ons in vp) are coup led into the ing
injec tion point via a de block ing capac itor. Any other independent ac inputs to the system are disabled. A
.ne
network analyzer is used to measure the relative magnitudes and phases of the ac componen ts of the vo lt-
ages v_i,(t)
and v,(t):
T ,. =--v,(s)
'"{.) v,{.v)
I,,,,,. o
i1~ -o
(9.63) t
The meas ured gai n 1;,.(s) differs from the act ual gain T(s) because, by break ing the con nection
between blocks I and 2 at the measurement point, we have removed the loading of block 2 on bloc k I .
Solution of Fig. 9.34 for the measured gain Tjs) leads to
(9.64)
Equa tions (9.62) and (9.64) can be com bined to express T,,,(s) in terms of T(s):
.f .,,,(s) ==T(s ) ( 1 + -Z - l(s)) (9.65)

Zi(s)

364 Co11trollerDesign
Hence,
T.,.(s) "'T(.I') provided lhnt II Z, II » II Z, II (9.66)
So to obta in an acc urate measuremen t, we need to find an inject ion po int whe re loadi ng is ne gligible over
the range of frequenc ies to be mea sured .
Other diffi cultie s are enco unt ered when using the method of Fig . 9.34. The most se rious prob -
lem is adjust ment of the de bias us ing a potentiometer. The de loo p g ain is t yp ic ally very large, especially
when a PI contro ller is used. A sm all chan ge in the de compone nt of vx(r) can therefore lead to very large
ww
changes in the de biases of some elemen ts in the system . So it is d iffi cult to es tab lish the co rrect de con-
ditions in the circuit . The de g ai ns may drift durin g the exper imen t, mak ing the probl e m eve n worse , and
sat uration of the error amplifi er is a com mon comp laint. Also , we have seen that the ga ins of the con-
verter can be a func tio n of the qu iesce nt opera ting point ; sig n ificant deviation from the correc t operating
w.E
point can cause the mea sured ga in to d iffer from the loop ga in of ac tual opera ting condi tions.
asy
9.6.1 Voltage Injection
An approach that avo ids the de biasing pro blem [3] is illustrate d in Fig. 9.35. The voltage source vii) is
En
injected be twee n blocks I and 2, wi thout breaki ng the feedback loo p. Ac varia tio ns in v, (t) again exc ite
va riations in the feedb ack sys tem, but de bias condit ions are determ ined by the ci rcu it. Indeed , if v,(t)
gin
co nt ains no de co mpo nent, then the biasi ng c ircui ts of the system itself esta b lish the quiesce nt ope rating
po int. Hence , the loop gain measurement is made at the actua l sys tem ope rating point .
The injec tion source is modeled in Fig. 9.35 by a Th even in equi valen t network, con tai nin g an
inde pendent voltage source with source impe dance Z,{s) . TI1e magn itudes of v, and
eer are irrelevant in

the deter mination of the loop g ain . However, the inject ion of v, does di sru pt the loading of blo ck 2 on
block I. Hence , a su it able inject ion po int mu st be found , where the loading effect is neg ligible.
z,
tra nsfe r func tio n from

ing
To measure the loop ga in by voltage inje ction, we connect a netwo rk analyzer to meas ure the
vx
to ;-1 The system independent ac inp ut s are set to zero, and the network ana-
lyzer swee ps the inject ion vo ltage v, (t) o ver the intended freq uen cy ran ge. Th e meas ured gain is
.ne
(9.o7J
Bl ock I
-....,.--·--
,......... ·---··-····.........._.. .., + Block 2
!
t
,,
i(s) 1
i !
i! + i
! G2 (s)P,(s) = O(s)
! G 1(s)ii,(s) + v,(s ) O,(s)
! !
l._,..~----- ..-..... !
-....... +
Fig. !J.3S Measurement of loop gain hy voltage injection.

9.6 Meas ureme/11of Loop Gains 365
Let us solve Fig . 9.35, to compare the measured gain T.(s) wi th the actual loop gain T(s) given by (9.62).
The error signa l is
[,,{.~)==- H {s) Gis) P,(s) (9.68)
The vol tage OY can be written
{9.69)
whe re l(s)Z 1(s) is the voltage drop across the so urce impe dance 2 1• Sub stitution of Eq. (9.68) into (9.69)
ww
leads to
(9.70)
But f(s) is
w.E
Therefore , Eq. (9.70) beco mes asy (9 .71)
En (9.72)
gin
Sub stitut ion of Eq. (9.72) into (9.67) leads to the follow ing expres sion for the measure d gain T,,(s):
Z 1(s}
T,(s) = G 1(s)Gi,l')H{.1') + - -
eer (9.73}
ing
Zi~·)
Equa tio ns (9.62) and (9.73) can be combin ed to de ter mine the measu red ga in T,(s) in terms of the actu al
.ne
loop gain T(s):
(9.74)
Thus , T/r) can be expressed as the sum of two terms. The first term is proport ional to the actual loop
gain T(s) and is approximate ly equal to T(s) whene ver II2 1 II < II 2i 11 .The second term is not propor -
t
tional to T(s), and limits the m inimum T(s) that can be measured with the voltage injectio n technique. If
Z/Z 2 is much smaller in magnitude than T(s), the n the second term can be ignored, and T/s ) "' T(s). At
fre quencies where T(s) is sma ller in mag nitude tha n Z/2 2, the meas ured data must be disca rded . Thus,
(9.75)
prov ided
(i) IZ1(S) I-<I2 2(.I) II

and

Block l Block2
---···· ·····..·-..···-···· ···-····-·············-·············
··
son i ol I
Fig. 9_16 Vollageinjection example. .-~Vv--+---- •+----------,
+
500Q
+ !•·••••••.. •••.. •••• ••• u•
ww
••••- .. .. •••
w.E (1i) j T(s) [ "~ It~:iI

Aga in , note that the value of the injection source impeda nce Z.,is irrelevant.
asy
As an example, consider voltage inject ion at the output of an operationa l ampli fier, havin g a
50 Q output impedance, which drives a 500 Q effect ive load. The system in the vicinity of the injection
point is illustrated in Fig. 9.36. So Z 1(s) = 50 !l and Zi(-1)= 500 Q. The rat io Z 1/Z 2 is 0.1, or-20 dB . Let
En
us further suppose that the actual loop gain T(s) contains poles at IO Hz and 100 kHz, with a de gain of
80 dB. The actual loop gain magnit ude is illustrated in Fig. 9.37.
(I+Z 1(.1')) gin

Voltage injec tion would result in measurement of TJs) given in Eq. (9.74). Note that
(9.76)
eer
Zi(s) = I.I ~ 0.83 dB
Hence, for large IIT II, the measured II T.11deviates from the actual loop gain by less than I dB. However,
ing
at high frequency where II T II is less than -20 dB, the measured gain differs significant ly. Apparen tly,
IOOdB
.ne
80dB
60dB
40dB t
20dB
OdB ···········
··· 12 I ..... .....
...........
..............
............
.......
--1 ~ - 20dB
Zz
-2 0dB r-------~------------ -~--
-40 dB-+-----+----->-------+-----+---~ "-<
IOHz 100 Hz I kHz IOkHz 100 kHz 1 MHz
f
Fig, 9.37 Comp;irison of measured loop gain 7~and actual loop gain 7; voltage injection ex.ample. Tl1t:rneasuret.l
gain dcviatt:sat high frcqm:ncy.

9.6 Measurement of Loop Gains 367
T.(s) contains two high-frequency zeroes that are not present in T(s). Depending on the Q-factor of these
zeroes, the phase of Tv at the crossover frequency could be influenced . To ensure that the phase margin is
correctly measure.cl
, it is important that Z/Lz be suffic ien tly small in magnitude.
9.6.2 Current Injection
The results of the preceding paragraphs can also be obtained in dual form, where the loop gain is mea-
sured by current injection [3]. As illustra ted in Fig. 9.38, we can model block I and the analyzer injection
ww
source by their Norton equ ivalen ts, and use cu rrent probes to measure 1, and
current injection is
'Y
The ga in measured by
w.E (9.77)
It can be shown that
asy
En
(9,78)
Hence,
gin
e
T;(1)= T(s) provid ed
;I er
(i ) IZi( s) I ~ IZ/s ) I,and (9.79)
(ii) IT(s) i ~· I~:::: ing

.ne
So to obtain an accura te meas urement of the loop gain by curre nt inject ion, we must find a point in the
network where block 2 has sufficient ly small input impedance. Again, note that the injection source
impedance z, does not affec t the measurement. In fact, we can realize i, by use of a Th even in-equiva len t
source, as illustrated in Fig. 9.39. The netwo rk analyzer inject ion source is represented by voltage source
t
Fig. 9.38 Meusur enicnl of loop gain by current injection.

368 Con/rollerDesign
•••.•. Ill .......

i1 (s) t<s)
Fig. 9.39 Current injection using Theven in-equivalent source.
ww
v, and outpu t resis tance R.,·A ser ies capac itor, Ch, is in serte d to avoi d di sru p ti ng the de bias at the injec -
tion point.
9.6.3 w.E Measurement of Unstable Systems
asy
When the pro totype feedback system is un stab le, we are even more eage r to meas ur e the loop ga in- to
find out what went wro ng. But measu re ments ca nn ot be made wh ile the system osci ll ates. We need to
En
stabili ze the sys tem , yet measure the o ri gi nal unstabl e loop gain. It is possib le to do th is by recog n iz ing
that the inject ion so urce imp edance Zs does not influence the mea sured loop gai n [3]. As ill ustrat ed in
z.,·
gin
Fig . 9.40, we ca n eve n add add it io nal res ista nce R,.rs•effect ive ly increasin g the source impe dan ce The
measured loop ga in T.(s) is unaffe ct ed .
Addin g series impeda nce ge ner all y lower s the loop gain of a sys te m, leading to a lower cross -
eer
over frequ e ncy and a more pos itive phase mar gin. Hen ce, it is u sua ll y possible to add a resis tor R,., that
is suffi c ie ntly large to stabili ze the sys tem. The ga in T..(.,;), Eq. (9.6 7), cont inu es to be approximat e ly
eq ual to the orig ina l un stable loop ga in, acco rdin g to Eq . (9.75). To avoid di st u rbing the de b ias co nd i-
ing
tions, it may be necessary to bypass R,.trwith inductor L,.!1·If the i ndu c tan ce value is s u ffici ent ly large ,
then it will not influence the stab ili ty of the modified system .
.ne
Block I
+
Block.2
!" "_.. ,, .. ,_ .. ,, .......
t
!
+
!
~,(s) !
I
i + - j
l,.._.................
,.,_,..,_..,,.,_.,...;
Fig. 9.40 Measurement of an unst,.b)e loop gain by voltage injt:ctiori.

9.7 Summary of Key Poims 369
I. Negat ive feedback ca uses the system ou tpu l lo closely follow the refere nce in pu t, according lo the ga in
1/H(s). The influence on the o utput of disturbances and variatio n of gains in the forward path is reduced .
2. The loop gain T(s) is equal lo the products of the gains in the forward and feedback path s. The loop gain is
a meas ure of how well the feed back sys tem wo rks: a large loop ga in leads to heller regulatio n of the o ut-
put. The crossover frequ ency fc is lhe frequency at wh ich the loop ga in T has unil y mag n itud e, and is a
measure of the bandwidth of the cont rol system.
3. The int rod uction of feed back causes the tra ns fer fu nc ti on s fro m d isturbances to the o utp ut to be mu lt iplied
ww by the factor 1/( l + T(s)). A l freq uencies where Ti s large in magn itude (i.e. , below the crossover fre-
quency ), this fac tor is approxima tely equal to lff(s). Hence, the influence of low -freq uency disturbance s
on the output is red uced by a factor of 1/f (s). Al frequencies where Ti s small in magnit ude (i.e., above the
w.E
crossove r frequency ), the fac tor is approximately equal to l . Th e feedback loop the n has no effect. Closed-
loop disturbance-lo-ou tput transfer functions, such as the line-to-ou tpu t tra nsfe r functio n or the ou lput
impeda nce, can easi ly be constructed us ing the alge bra-on-the -gra ph method.
4. Stabili ty can be assessed usin g the phase m arg in test. The phase o f T is ev aluat ed at the crossove r fre -
asy
quency , and the stab ility of the impo rtant closed -loop quantiti es T/(l + T) and 1/( 1 + T) is then deduced.
Inadequate phase marg in leads to r in g in g and overshoo t in the sys tem transi e nl respon se, and peak in g in
the closed -loop transfe r function s.
5.
En
Compensa tors are added in lhe forward paths of feedback loops to shape the loop ga in , such that desired
perfo rmance is obtained. Lead compe nsator s, or PD cont roller s , are added to improve the phase m argi n
6. gin
and extend the con tro l sys te m ban dwidt h . Pl cont rollers are used to increase the low-frequency loop gain ,
to imp rove the rejec tion of low-frequency d ist urbance s and redu ce the steady -state error.
eer
Loop ga ins can be experim enlall y measured by use of voltage or curren t injectio n. Thi s approach avoids
the problem of es tabli shing the correc t quiescent operating cond itions in the syste m, a co mm on diff ic ulty
in system s havi ng a large de loop gai n. An injec tio n poi nt mus t be fo und where inte rstage loadi ng is not
ing
sign ificant. U nstable loop gai ns c an also be measured.
.ne
RE FERE NCES
[1) B. Kuo , Aul omatic Conrrol Sys /ems , New York : Prentic e- Hall , Inc .
[2)
[3)
J. D'Azw and C. Houris, Li11ea r Comrol Sy.Hem A11alys is and Design: Co11ve11rio11aland Mode m ,
York: McGraw -H ill , 1995.
R. D.
ew
t
MroDLEBROOK , "Measureme nt of Loop Gai n in Feedback System s, " lm ema rional Journal of El ec -
tronics, Vol. 38, No. 4 , pp . 485-5 12, 1975.
[4) R . D. M IDDLEBROOK, "Desi gn-Orien ted Ana ly sis of Feedback Amplifiers," P roceedin gs National El ec -
tronics Confere nce, Vol. XX, Oc tober 1964, pp. 234-238 .
PROBLEMS
9.1 Derive both forms of Eq. (9.25 ).
9.2 The llyback co nverter system of F ig. 9.4 1 co ntains a feed back loop for reg ulatio n of the mai n outp ut
voltage v 1. An auxi lia ry o utput produc es volt age v1. TI1ede input voltage vK lies in the ran ge 280 V :-;;v~ :":
380 V . Th e compensa tor netwo rk has tra n sfe r function

GrCs)==G,~,( I + ~L l
where G, ~ =0.05, and J;=Wi'211:=400 Hz.
(a) Wha t is the ste ady-sta te value of the error vol tage v.(t)? Expla in yo ur reaso ning .
(b) Determ ine the stea dy-state va lue of the m ain o utput vo ltage v 1 •
(c) Estimate the steady -state value of the auxiliary output voltage v 2.
64: 3
ww
+
w.E
I•ig.
converter
9.41 Flyback
system of
+
+
asy
Problem 9.2.
H (s)
lsolared H (s) = 0.2
En
transisto r
gate driver
Pulse-width v,
gin
G, (s)
modulator
Compe nsator
Reference
eer
v.,1 = 3V
inpu t
9.3 In the boost converte r sys tem of Fig . 9.42, all ele ments are idea l. The compensa to r has gain
CJ,)"" 250/.,.
r••H-•- •- ·-
Boost converte r
•-• •-H •••-• •~•- ••~---- ing
! L
.ne
R
12.Q
H(s)
t
Fig. 9.42 Boos t conve rter

sys tem of Problem 9.3 . H (s) = 2~
GcCs)
V.,=4 V Compens ator

v,.f
Refe rence
input 5V
(a) Construct the Bode plot of the loop gain T(s) magnitude and phase. Label values of all corner
freq ue ncies and Q-factors, as appropr iate.
(b) Determ ine the crossove r freque ncy and phase margin.

Problems 371
(c) Co nstruc t the Bode diagra m of the magnit ude of 1/(1 + T), us ing the algebra -on-the-gra ph
me thod. Label values of all corne r freque ncies and Q-factors, as approp r iate.
(d) Co nstruc t the Bode dia gram of the mag ni tude of the clo sed -loop line- to-o utput tra nsfer func tion .
Label va lues of al l corner freq uencies and Q-factors, as app ropriate .
9.4 A cer tain inver ter sys tem has the followi ng loop ga in
( I + ..1..
)
T(s) = 1'11 o>,
{ I + ~1 )( I+ J1)(I + JJl
ww and the followi ng open -loop lin e -to -o utp ut transfe r func tio n
w.E
where
asy T0 = 100
w2 = lOOOrad /sec
ffi 1 = 500 rad/sec
ro, ., 24000 rndlsec
The gain of the feed back

En
w, = 4000 rnd/se.:
co nnection is H (s) = 0.1
G• 0 aa 0.5
gin
(a) Sketch the mag n it ude and p ha.se as ymp tote s of the loop gaj n T(s). Determ ine nu me rical val ues
of the crossove r freq uency in Hz and phas e m argin in degrees .
(b) Construct the magnitu de asymp totes of the closed -loop li ne-to -o utput transfer funct ion. Label
eer
im por tant fea tures.
(c) Cons truc t the mag nitud e asy mptote s of the closed -loop tran sfe r fun c ti on from the refe rence vol t-
age to the ou tp L1
t voltage. Label importan t fea tures .
9.5
cent value of the input voltage is I\ = 380\1.The transformer has tu rns rat io n/n
ing
The forwar d co nven er system of Fig . 9.43(a) is co nstructed with the element values shown. The q uies-
3= 4.5. The duty cycle
produced by the pulse -widt h mo du'lator is restricted to the r an ge OS d(r) :$ 0 .5. W ithin this range , d(t )
.ne
follow s the control voltage ~,.(1) according to
with V,1.1"'
3 V.
d(I),,l
2
~,(:!2_
v.\f
t
(a) Determine the quiesce nt values o f: the duty cycle D, the ou tpu t voltage V, and the con trol voltage
vr.
(b) The op-amp circuit and fee dback con nectio n ca n be mod eled using the bloc k d iagram illustrat ed
in Fig. 9 .43(b), wi th H(s) = Rl(R 1 + R1). Dete rm ine the transfe r funct ions G/ s) and G ,(.~).
(c) Ske tch a block diag ra m w hich mode ls the small -s ignal ac var iatio ns of the comp lete system , and
de termi ne the transfer fu nct ion of each block. H im: the tra nsfo rmer magnet izing indL1ctanc e has
negligib le infl uence on th e co nverter dy namics, and ca n be ignored. The small -sig nal mode ls of
the forward and buck conver ters are similar.
(d) Co nstm ct a Bode plot of the loop g ai n ma g n itude an d phase. Wh a t is the cro ssove r freq ue ncy ?
Wha t is the phase margin?
(e) Construc t the Bode plot of the closed -loop line-to -outp ut tra nsfer fun ct ion ma gn itud e

372 Controller Desig11
(a) n1 : n1 L
"i
+
C R v(t)
11. II 10 µf Hl
vgCt) +
-
/,= 150 kHz
~ -
ww Isolated
transistor
c,
l3nF
R,
81.SkQ
w.E gate driver

Pulse-width
modulator
Ve
R,
18.2Ml
(b)
asy V
-:-
En
gin
H(s)
G, (s)
eer
G,(s}
ing
Vig. 9.43 Forward converter sys tem of Pmblem 9.5: (a) system diagrunt, (b) mode ling tile op ump cir-
cuit using a block dingram.
.ne
11
{1
Label impo rtant feature s . What is the gain at 120 Hz? At what fre qu ency do d isturbanc es in I'~ have the
grea test influ ence on the out put voltage? t
9.6
In the vo ltage reg ulato r system of Fig . 9.43, desc r ibed in Problem 9.5, th e inp u t voltage vii) co ntain s a
120 Hz variat ion of peak ampli tude 10 V.
(a) What is the amplit ude of the res ult ing 120 Hz variatio n in v(r)?
(b) Mod ify the co mpe nsaior netw ork such tha i ihe 120 Hz ou tput volta ge va riation has peak amp li-
tud e less than 25 m V. Your modi fication should leave the de ou tput voltage unchan ged, and
sho uld res ult in a crossover freq uency no greate r th an 10 k Hz.
9.7 Des ign of a boost co nverter with c urr ent feedback and a Pl co mp ensato r. In some app lications , it is
desired to co ntrol the co nverter in p u t te rmi na l c urr ent wavefor m. The boost con verte r sys tem of Fig.
9.44 co nt ains a feedback loop whi ch causes the co nverter inp ut c urre nt i,(t) to be proport iona l to a refer-
ence volt age V ,,Ji). TI1e fee dba ck co nn ection is a c urre nt sense ci rcuit h avin g g ain H(s} = 0.2 vo lts per
ampere. A co nventio nal pul se w idth modulator circ ui t (F ig. 7.63) is employe d , having a saw too th wave -

Problems 373
C V R ;,
120n
H(s)
~
Tra11sistor I,= 100 kHz
gate driver
ww Pulse-width v,
modulator
v.,"'3 v
G,(s)
Compeusator
w.E
Fig. 9.44 Boost conve11ersystem with cun·ent feedback, Problem 9,7.
Refe rence
input v,.,f
asy
form wi th peak-peak amplitude of VM = 3 V. The quiescent values of the inputs are: V~
V,,-f = 2 V. A II elements are ideal.
(a) Determine the quiescent values D, V, and /".
120 V,
(b)
En
Determine the small-s ignal transfer funct ion
G,.h')=---
gin
i i s}
d(s)
(c)
(d)
eer
Sketch the magni tude and phase asymptotes of the uncompensated (C,.(.1·)= I) loop gai n.
It is desired LO obtain a loop gain magnitude of at least 35 dB at 120 Hz, while maintaining a
ing
phase margin of at least 72°. The crossover frequency should be no greater than /, /1 0 = 10 kH:t
.
Design a Pl compensator that accompl.ishes this. Sketch the magnitude and phase asymptotes of
the res ulting loop gain, and label importa nt features.
(e) For your design of part (d), sketch the magnitude of the closed-loop tran sfer functio n
.ne
~(.<~
Label important features.

t,,./s)
t
9.8 Design of a buck regulator to meet closed-loop output impedance specifications. The buck conve11er
wit h control system ill ust rated inFig. 9.45 is to be designed Lo meet the follow ing specifica tions. The
closed-loop outpu t impedance should be less than 0.2 n over the entire frequency range Oto 20 kHz. To
ensure that the transient response is well-behaved, the poles of the closed-loop transfer funct ions, in the
vicinity of the crossover frequency, should have Q-factors no greater than unity. The quiescent load cur-
rent f wM> can vary from 5 A to 50 A , and the abo\•e specifica tions must be met for every value of lWAn
in this range. For simplicity, you may assume that the input voltage vg does not vary. The loop gain
crossover frequency / , may be chosen Lobe no greate r than// 10, or 10 kHz. You may also assume that
all elements are ideal. The pulse-wid th modulator circuit obeys Eq. (7.173).
(a) What is the intended de outpu t voltage V? Over what range does the effective load resistance
RLOAD vary?

C
200µF
N(s)
/,= 100 kHz H (s) = 0.1

Tra11sistor
gate driver
ww
v, Hv
G,(s )
Compensato r
v,,,,
w.E
5V
Fig. 9.45 Buck regulator syscem, Prohlem 9.8 ,
(b) Cons truc t the magni tude asympto tes of the open -loop outpu t impedance z0 .,(s ). Over what
asy
range of freq uenc ies is the output impedance speci fication not met? Hence, deduce how large the
min imum loop gai n T(s) must be in magn itude, such that the closed-loop OLtlpu t impedance
meets the specificac ion. Choose a suitable crossover freq uency fc.
(c)
En
Design a compensator network G,.(s) such that all specifications are met. Additionally, the de
loop gain T(s) shou ld be at least 20 dB. Specify the following:
gin
(i) Your choice for the transfer func tion G,(s)
(ii) Tiie worst-case closed-loop Q
(iii) Bode plots of the loop gain T(s) and the closed-loop o utpu t impeda nce, for load cur-
(d)
behavior of your design·,
eer
rents of 5 A and 50 A . What effec t does variation of Rw ,._
0 have on the closed- loop
Design a circu it using resistors, capac itors, and an op amp to realize your compensator transfer
9.9
function G/1").
ing
Design ofa buck-boos t voltage regulato r. The buck-boost convene r of Fig. 9.46 operates in the con tin u-
.ne
ous condu ct ion mode, wit h the element values shown. The nom in al inp ut voltage is V~ = 48 V, and it is
desired to regulate the outpul voltage at - 15 V. Design the best compensator that you can, which has
high crossover frequency (but no greater than 10% of the switching frequency), large loop gain over the
bandwidth of the feedback loop, and phase mar gin of at least 52°.
+
t
l C R
V
50 µH 220µF sn
Fig. 9.46 Ruck- boost H(s)
voltage regulator syit~m.
f, = 200kHi
Pmblem 'J.9. Transisto r
gate driver
P11lse-width v, Hv
mod11/ator G,(s)
Compensato r
v,,,
5V

Problems 375
(a) Sp ec ify Lhe req uire d va lue o f H SkeLch Bode plOLs of lhe unco mpe nsated loop gain mag n itu de
and pha se, as wel l as Lhe m ag nitud e and phase of yo ur proposed compensa tor transf er fu nc tio n
Gc(s). Label Lhe important features of your plols.
(b) Const ru c t Bod e d iag rams o f Lhe ma gnitude and pha se of yo ur com pensated loop gai n T(s), and
also of the magnit ud e of the quantit ies T/( 1 + 7) and 1/(1 + 7).
(c) D iscuss you r design. W hat preve nts yo u from further increa sing the crossover frequency? How
large is the loop ga in at 120 Hz? Can yo u o btain more loop gai n at 120 Hz?
9.10 Th e loop gai n of a cer tain feed back syste m is meas ured , using vo ltage injec tio n at a point in the forwa rd
path of Lhe loop as illustra ted in F ig. 9.47(a). The dat a in Fig . 9.47(b) is obtained. W hat is T(s)? Specify
ww
T(s) in factored po le-zero fom1, and give nume1ical values for all impo rtant feat ures. O ver wha t range of
freq uencies does the me asur emen t g ive val id resu lts?
(a)
w.E
+ ,···---~-
--------
!
+ '
!
asy +
•.,., I 10 k.Q 2 nF
(b)
··---·
En
···-·····-···························-·········/
60dB -.- -----.------.- -----.-----~
'·- ····-·····-····-···-·
········
IIT,11
gin
eer
ing
.ne
t
-1so·-1--+-+-+-++H---+-+-1+H-++--+-+-+-++H-++---+-+-1-+fi~
100 Ht I kHz JO kHz JOOkHz I MHz
f
Jc'ig. 9.47 Expe rimental measurement of loop gain. Problem 9.10: (a} measurement via voltage injec-
tion, (b) measured data.

ww
w.E
asy
En
gin
eer
ing
.ne
t

10
Input Filter Design
ww
w.E
asy
En
10.1 INTRODUCTION
gin
10.1.1 Conducted EMI
eer
ing
It is nearly always req uired that a filter be added at the power inpu t of a switchin g co nverter. By atte nuat-
ing the switc hing harm on ics that are prese nt in the co nverter input cu rren t wavefo rm , the input fi lter
.ne
all ows co mpli ance w it h reg ulat ions tha t limi t conducted electromagnetic inte,f erence (EM I). The inpu t
fi lter can also pro tec t the co n verter and its load fr om tra ns ie nts th at appe iu in the in p ut volta ge v.4'(!),
t
thereby i rnp ro vin g th e sys te m reliabilit y.
A si mp le buck co nver ter exa mple is illu strated in Fig. JO.I. The co nverte r injects the pulsa tin g
cu rrent igCt)of Fig. 10.1(b) in to the power source v/t) . Th e Fouri er series of i/t) co ntai ns harmo nics at
mult iples of the sw itch in g frequ ency f., as follow s:
{a) (b)
L igCt)
+ i
2
C V R
0
0
0 D T, T,
Fig. 10.\ Buck converter ei<.ample: (a) circuit of power stage, (b) pulsating input current wavefor m .

378 /11p11/Filter Design
. •.• ..• •.• ••• •• u,,, ... .. ...... ..

(a)
L
+
2
C V R
Input filter
·-·······
· ·······
········..····=
ww (b)
- i/1 )
-
w.E 0
i;,,(t)
asy
0 DT, T,
Fig. 10.2 Aclditiou of a simple f,-C low-pu~s filter ltl tile power input tcnninal, of 1hc buck ,.-onvcrler: {a) circuit.
(b) input curre nt w.tvd" rms.
i,(I) EJn
= /JI+ f~sin (krrD)cos (krnr) ( 10.1)
gin
1
In pract ice , the magn itudes of the higher -orde r harmonics can also be s ignifi ca nt ly affecte d by th e cur -
eer
rent spike ca used by diode reve rse recovery , and also by the finite slopes of the switc hing trans itio ns. The
large high -frequ ency current harmon ics of i/ t) can interfere with television and radio reception , and can
d isrup t the opera tion of nea rby elec tro nic equipm e nt. In con sequ ence , regulatio n s and standards ex ist
that limi t the a mp lit udes of the harm o ni c curren ts injecte d by a sw it chi n g conve r te r into its power so urce
[ 1-8]. As an examp le, if the de inductor current i of Fig. 10.2 has a magnitude of several Amperes, then
the fundamen tal componen t (n = 1) has an rms am plitu de in the vic ini ty of one Ampere . Reg ulat ions may ing
requir e atten uation of this current to a value typ ica ll y in the range 10 µA to 100 µA .
.ne
To mee t limits on con ducte d EMI, it is necessary to add an input filter to the conve rter. Figure
t
10.2 illustrates a simpl e single-section L-C low-pass filt er, added to th e input of the converter of Fig.
IO.I. Thi s fi lter attenuates lhe curren t harmonics produced by lhe swi tc hin g conver ter, and th ereby
smooths the curr ent waveform drawn from the powe r source. If the filter has tra nsfer func tion
H{s) = i;,/ig, th en the input current Four ier series beco mes
i;.( t) = Ji (O)Dl + ktij H (kjrn) I f~sin (knD) cos ( kwt + L H(kj(J))) (10. 2)
In other words, the ampl itud e of each c urr ent harmonic al an g ul arfre qu enc y kw is att enu ated by the fi lier
transfe r function al the harmonic frequency, II H(kjW) II.Typical require ments effective ly li mit the cu rrent
harmonics to have ampli tudes less than IOUµ A, and hence inpu t filters are ofte n requ ired to attenu ate the
current amp litud es by 80 d B or more.
To im prove the rel iabil ity of the system , inpul fi lter s are someti mes requ ired to ope rate no r-
mally when transie nts or periodic d isturb ances are applied to the powe r in pu t. Such co11d ucted suscepti-
bility spec ificatio ns force the des igner to damp the input filter resona nces, so that input d ist ur bances do
not exc ite excessive curre nts or voltages w ith in the fi lie r or co nverter.

10.1 Introduction 379
(a) Converter model
JJ C R v
ww (b)
Inputfilter
J
Convertermodel
w.E +
asy Ia C R v
En
gind
Fig. 10.3 S mull-signal eqt1iva\ent cin:uil models ol the tlu~k converter: [,t) basic converter mork l, (b) with addition
of input tlltcr.
eer
10.1.2 The Input Filter Design Problem
ing
The situation faced by the design engineer is typica lly as follows. A switching regulator has
.ne
been de signed, which meet s perfo rmance spec i fications. The regulator was prop er ly de signed as dis -
t
cussed in Chapter 9, using a small -signa l model of the converter power stage such as the equ ivalent cir -
cu it of Fig. I0.3(a). In consequence, the transient response is well damped and sufficient ly fast , with
adequa te phase margin at all expected operating points. The output impedanc e is s ufficient ly small over a
wide frequency range. The line -to -output transfer func ti on G.,g(s), or audio.rnsceptibility, is suff ic iently
small, so that the output voltage remains regu lated in spite of varia tions in 1•s<
t}.
Having deve loped a good design th at meets the above goals regarding dy na mi c response, the
prob lem of conducted EMI is then addressed. A low-pass fi lter ha ving attenuation suffic ient to meet con -
ducted EMI specifications is constructed and added to the co nverter input. A new prob lem then arises:
the input filter changes the dynam ics of the converter. The tran sient response is mod ified, and the control
system may even become unsta ble. The ou tput impedance may becom e large over some frequency range,
possibly exhib iting resonances. The audiosuscept ibi lity may be degraded.
The problem is that the input filter affects the dynamics of the converte r, often in a manner tha t
de gra des re gulator pe rform ance . For examp le, when a single -sect.ion L-C inp ut filter is added to a buck
converter as in Fig. I 0.2(a), the small-sig nal eq uivalent c ircuit mode l is modifi ed as shown in Fig.
10.3(b). The input filter elements affect all transfer funct ions of the converter, including the contro l-to-

380 Filter Design

/11p11t
40dB
IIG,dll LG ""
IIGw1II
30dB1-----"'"'·
20dB
Fig. 10.4 Control- lo-OuI-

IOdB
put transfer fum:1io11s prc-
dic\etl by the equivalent L Gw1
cirCL1itmod els of fi g. 10.J . OdB-t------=.:::.:::- -............. o·
',, ___
Dmhetl lines: without input
ww
filter [Fig. 10.]( a)]. Solid
/i11es: with input filter l['ig .
lOJ(b )I.
-IO dB ..........
_____
______
____
- 180'
w.E +-- ~---~-~ --........:== =,.,,..---1-

- 360"
-540'
asy IOOHz I kHz

f
IOkHz
En
ou tp ut trans fe r functio n G./~l, the line- to-ou tpu t tran sfe r funct ion 0 1,/1"), and the converter outpu t
impedance Z0 " 1(s). Moreover, the infl uence of the i nput filter on th ese transfe r fun ctio ns can be qu ite
seve re.
gin
As an illustra tion, let's exami ne how the con tro l-to -outpu t tra nsfer fun ction Gvis) of the buck
converte r of Fig. 10.1 is altered when a simple l -C input filt e r is added as in Fig . 10.2. For th is example,
the eleme nt va lues are chosen to be: D = 0.5, L "' 100 µH, C = IOU µ I--'
eer , R "= 3 n, Ll = 3 30 µH , C/ "' 470 µF.

Figure 10.4 con tain s the Bode pl ot of th e mag n itu de and phase of the contro l-to-outpu t tra nsfer func ti on
Gv,l.1').The dashe d lines are the ma gni tude and phase before the inp ut fi lt er was added, generate d by
ing
so lut ion of the model of Fig. 10.3(a). The co mple x poles of the co nverter ou tp ut fi lter ca use the phase to
approach - 180° al high frequency. Usua lly, this is the model used to design the regulator feedabck loop
.ne
an d to eval uate the phase mar g in (see Chapter 9). The solid lines of Fig . l0.4 show the magnitude and
phase after additi on of the inp ut filter, ge nerated by so lutio n of the model of Fig. 10.3(b). The mag ni tude
ex hi b it s a "g lit ch" at the reso nant fre q uency o f the input fi lte r, and an addi tiona l - 360° of phase sh ift is
introdu ced into the phase. It can be show n tha t Gvis) now co nt a in s an additiona l complex pole pa ir and
a com plex right ha ! f-p lane zero pa ir , associated with the inp ut filter d ynamics . If the crossove r fre qu ency
of the reg ula to r feedba ck loop is near to or greate r tha n the resonant frequency of the input filter , then the
loop phase ma rg in wi ll become neg ative and in sta bilit y will res ult. Such beh av ior is typica l ; conse -
t
quen tly, input filte rs are notor ious for destabi liz in g sw itc h ing regula tor syste ms.
This chap ter shows how to mitigate the stab ili ty pro blem, by intro duc ing damping into the in put
fi lter an d by design ing the input filter such tha t its out pu t impedance is suffic ien tly small [9-2 1]. The
res ult of these measures is that the effec t of the input filter on the control -to -outpu t tra nsfe r fu ncti on
becomes neg li gib le, and hence the co nverter dy nam ics are much bette r be have d . Although a nal ys is of the
fo urth -or der system of Fig. 10.3(b) is pote ntia lly qui te complex , th e appro ach used he re s implifies the
prob lem through use o f imp edance ine qu alities in vo l vin g the converter in put imp ed ance and the filter
outpu t impeda nce [9,10]. These inequ a lities are based on Midd lebrook's extra element theo rem of
Appe nd ix C. This approach allows the enginee r to ga in the insigh t needed to effec tivel y design the input
filter. Optimization of the dampin g netwo rks of input filters, and desig n of mult iple-sectio n filters, is also
discus sed.

10.2 £/feel of an lnrmt Filler011ConverterTransferFunctions 381
- H (s)
Input Convene r
filter v
ww Controller
Fig. 10.5 Addition of an input filter 1,1 u switching voltnge regulntnr system.
10.2
w.E
EFFECT OF AN INPUT FILTER ON CONVERTER TRANSFER FUNCTIONS
asy
The control-to-output transfer function G,i~') is defined as follows:
En (10 .3)
gin
The co ntrol-to-output tra nsfer funct ions of basic CCM co nverters wit h no input filters are listed in Sec-
tion 8.2.2.
eer
Addition of an input filter to a switching regulator leads to the system illustrated in Fig. 10.5. To
dete rmin e the co ntrol-to-output transfer fun ction in the prese nce of the input filter, we set v/s}
to zero
and solve for v(s)ld(s) ac co rding to Eq. (I 0 .3). The inp ut filter can then be represented simp ly by its out-
havi ng impedance Z,,(s). [n Append ix C, Section C.4.3, Middlebroo k's extra elem ent theorem is
ing
put impedance Zis) as illustrated in Fig. 10.6. T hus, the input filter can be treated as an extra ele ment
employed to determine how addition of the input filter modifies the control-to-output transfer function. It
.ne
is found that the modified control-to-output trans fer function can be expressed as follows [9]:
( )
G""(s)= G""(s) lz.<,J•o (
( l + Z0
Z11(S)
(s))
z .(s) )
I+ Zo(S)
( 10.4)
t
Converter
()
F1g. 10.6 Dclermination of the control-to-output transfer
function G,,.1(s) for the system of Fig. 10.5.

382 Input Filter Design
TableIO.I Input filter design cr iteria for basic converters
Converter Z,ls)
Buck
R (1+si
+sLC) 2 sL
02
D1 (I +sRC)
Boost sL
ww
w.EBuck- boost sL
D1
whe re
asy
En (10.5 )
gin
is the or ig in al con trol -to-outpu t tra nsfer funct ion wit h no inpu t filte r. Th e qua nti ty Z 0 (s) is eq ual to the
conve rter inp ut impe dance Z/s) under the con diti on th at ,l (J') is eq ual to zero:
eer
Th e qua ntity Z,v(s) is equal to the co nverter inp ut impe dance Z;(.~) under the-cond ition tha t the feedback
(10.6)
ing
controller of Fig. 10.5operates ideally; in other words, the con troller varies d(s) as necessary to ma intai n
v(s) equal lo i.ero:
.ne
(10.7)
In tem1s of the ca non ical circuit mode l paramete rs desc ribed in Section 7.5 , ZN(s) can be shown to be
(10.8) t
Express ions for ZN(s) and Za(s) for the basic buck, boost, and buck -boost converters are listed in Table
JO.I.
10.2.1 Discuss ion
Equa ti on (10.4) relates the power stage con trol -to -out pu t transfer function C,.,,(s) to the ou tpu t impe d -
ance ZoCi ·) of the in put filter, and also to the quant ities ZN(s) and Z0 (s) measured at th e power input port
of the converter. The quant ity ?.,ls) coinc ides with the open -loop in pu t imp edance of the converter.
As desc ribed above , th e q uan tity Zif s) is e qual to the input port imp edance of th e conver ter

10.2 Effect of a11fopur Filter 011Co111erter

1 Tra11
sfer F1111cti
om 383
(a)
Closed-loop
(;,(t)) r, r..voltage regulato r ···1
-----~ +
( v,(t))r , p load V R
. .
ww (b)
"-- - ·•·• - ••• • •· ·•• ·• ••• n• •• ••• •• • • •- ••• • .. • • ••
w.E
asy M2
En
I
slope.,, _...!. = - -
V8 R
gin
Fig. 10,7 Power input port characieristics of an ideal switching voltage regulator: (a) cqui\•alent circuit model,
inclutlin~ dependent power sink, (b) constant power characteristic of inpnt port. eer
powe r stage, under the conditio ns that d(s) is varied as necessa ry to null v(s) to zero . Thi s is, in fact, the
ing
.ne
fu nctio n performed by an ideal controlle r: it varies the dut y cycle as necessary to ma intain zero error of
the output voltage . Therefore, ZN(s) co incides wi th the impedance that wou ld be meas ured at the con-
verte r power inpu t ter min als, if an ideal feedback loop perfect ly reg ulated the converter output voltage.
Of course, Eq. ( l0.4) is val id in genera l, rega rdless of wh e ther a co ntrol system is prese nt.
Figure 10.7 illu strates the large- signal behav ior of a feedback loop that pe rf ectly regulates the
converter output vo ltage. Regar dless of the applied input voltage v/t ), the output voltage is mai nta ined
equal to the desired value V. TI1e load power is therefore constant , and equal to P1oa d = V2/ R. In the ideal-
t
ized case of a lossless converter, the power flowi ng int o the converter inpu t ter mina l s wi ll also be equal to
I'1,,,,d, regardless of the value of ~11(!). Hence , the power input t erm inal of the converter obeys the equa tion
(10.9)
This characterist ic is illu strated in Fig. I0.7(b), and is represe nted in Fig. 10.7(a) by the dep endent power
sin k symbol. The prope rties of power so urces and power sin ks are di sc ussed in detail in Chapter 11.
Figure J0.7(b) also illustrates linearizat ion of the const m1t input power characte ristic, abo ut a
quiesce nt operating point. The result ing li ne has negative slope ; therefore, the incre ment al (small sig nal)
inp ut resistance of the ideal voltage reg ulator is negative. For exa mple, increasing the voltage ( v/t) )r ,

384 Filter Design

/11p11I
causes the current ( i/1) }.1, to decrease, such that the power rema ins constant. T his incrementa l res istance
has the value [9,14]:
(10 .10)
where R is the output load resi stance , and Mis the conversion ra tio V/V8 , For each of the conve rters lis ted
in Table 10.1, the de asymptote of Zis) coi ncides with the ne gative increment al resistance given by the
eq uat ion above.
Practical control sys tem s exhibit a lim ited bandwidth , determined by the crossove r frequency f..
ww
of the feedbac k loop. TI1erefore, we would expec t the closed -loop regulator inpu t impedance to be
approximate ly equa l to ZJ.s) at low frequency (f-< /) where the loop gain is large and the regulator
works well. At frequencies above the band width of the regu lator (f ;p /,), we expect the converter inp ut
w.E
impedance to follow the open -loop value ZD(s). For closed-loop co nditions , it ca n be show n that the reg-
ulator input impedance Z/ r) is, in fact , descr ibed by the follow ing equation:
_I = I T(s) .. + I I (10 . 11)
asy
7,(s} Z ,..(s} I + T(.~} Z,,(s ) I + T(s}
where T(s) is the controlle r loop gain. Th us, the regulator input impedance follow s the negat ive resis-
n""
En
tance of ZN(s) at low frequency where the mag nitude of the loop ga in is large [and hence T/(1 + I,
1/(l + 1)"" O]. and reverts to the (po siti ve) open -loop im pedance Zn(s) at high frequency where IIT IIis
small [i.e. , where Tl( I + T)"" 0, 1/( I + T)"" I].
gin
When an undamped or lightl y damped input filter is con nected to the regulator input port , the
input fi lter ca n interact with the ne gat ive resistance character istic of ZN to form a negative resistance
oscillator. This further explains why addition ofan input fi lter tends to lead to instab ilitie s.
10.2.2 Impedance Inequalities eer

ing
Equation ( 10.4) reveals that addition of the in pu t filter causes the co ntrol -to-ou tput transfer functio n to be
.ne
modified by the facto r
(10. 12)
t
called the correct ion fa ctor. When the following inequalities are satisfied,
l 2 all jZNII,and
4-:
(10 . 13)
lt,ll= lzDJ
then the correction factor has a magn it ude of approximate ly un ity, and the input filter does not su bstan-
tially alte r the con tro l-to-output transfer fu ncti on [9,10]. These ineq ualities lim it the max imum allowab le
ou tput impedance of the input filte r, and co nstitut e usefu l filter des ign cr iteria . One can sketch the Bode
plots of IIZJ.Jw) IIand IIZ0 (joo)\\, and co mpar e wit h the Bode plot of IIZjj{J}) 11 - Thi s allows the eng ine er
to gain the ins ig ht necessary to des ign an i npul filter that sat isfies Eq. ( 10.13).

10.3 Buck Converter Example 385
A sim ilar analy sis shows that the converte r output imp edan ce is not su b stanti ally affecte d by the
input filter when the follow ing inequalitie s are sat isfied:
IIz.14::iz, I, a11d (10. 14)

IIZol«iZoi
where Z 0 (s) is again as given in Table 10.1. The qua ntity Z/s) is equa l to the converter input impedance
Z.(s) und er the co nditi o ns that the converteroutput is shorte d:
( 10.15)
ww
Expre ssions for ZJs) for basic co nverters are also listed in Table IO.I.
Simila r imped ance inequalities can be derived for the case of current -programm ed converters
w.E
[ 12,13], or converters operati ng in the discontinuous con duction mode. In [12), impedance inequalities
nearly identi cal to the above equation s were show n to guara ntee that the inpu t filter does not degr ade
transie nt response and stabili ty in the current-program med ca~e. Feedforward of the converter input volt-
asy
age was suggested in [ 16].
10.3 BUCK CONVERTER EXAMPLE
En
Let us again consider the examp le of a simple buck converter with L-C input filter, as illustrated in Fig.
gin
10.8(a). Upon replac ing the converter with its small-signal mode l, we obtain the equivalent circu it of Fig.
I0.8(b). Let 's eval uate Eq . ( 10.4) for this example , to find how the input filter modifies the control-to-
output transfer function of the converter.
10.3.1 Effect of Undamped Input Filter eer

ing
The quantities Z'is) and Lris) can be read from Table 10.1, or can be derive d us in g Eqs. ( 10.6) and
.ne
(10.7) as fu rthe r descr ibed in Appendix C. Thequantity Z0 (s) is given by Eq. (10.6). Upon setting d(s) to
zero, the converte r small signal model reduc es to the c ircu it of Fig. 10.9(a). It can be seen that Z0 (s) is
t
equa l to the input impedance of the R-L-C filter , div ided by the square of the turns ratio :
(10.16)
Con structio n of asy mptotes for thi s impedan ce is treated in Section 8.4, w ith the resul ts for the numerica l
values of this example give n in Fig. 10. 10. The load resistance dominat es the impedance at low fre-
quency, leadin g to a de asympto te of R/D2 = 12 Q . For the high-Q case shown, II Z0 Ucu ) II follows the
output capac itor asymp tote, reflected through the square of the effec tive turns ratio, at intern1ediate fre-
quenci es. A series resona nce occ urs at the output filter reso nant frequency / 0 , given by
(l0.l7)
fu" 2n
J-rc
For the ele ment values listed in Fig. I0.8(a), the reso nant frequ e ncy is / 0 = 1.6 kHz . The values of the
asy mptot es at the re sonant fre qu ency / 0 are g ive n by the character istic impedanc e R11, referred to the

,.......Input filte r
(a) Converter
........
....
...............
i L1 \
i L !
.----';......J i
+
330µH lOOµH !
2 1
c1 C !R V
470µF l OOµ F : 3Q
!
''
ww
(b )
Input filter
= ... .... .... ... .... .. ... - ... . . .. ! .....fo ·=·o.s...............;
'...........................
Convener model
w.E LI
330µH
"'-...--+----+- ---.---,
+
470µPasy
C1 Id
C R i)
En
Fig. 10.8 Buck co11v
c1wrexample: (a) co nvene r cir~uit. (b) , mall -~igm,l m,1dcl. gin J
(a)
1: D i
eer L
-- C ing R
+
.ne
(b)
L
t
+ +
~
t,rs l v,rst -
ZJ..s)
Jcl vs -+O
null C R
J
Fig. 10.9 Det;;,m1ination of the quantit ies ZIV(s) and Zll(s) [or the circuit of Fig. IO.&(b): (a) determination of
z,>(s). {b) determination of ZN(.~).

/0.3 BrickConverter £rnm11

le 387
40 dBQ
.... ............. Ro!D2

lO dBO
Q=Rlf =~=3 4 9.SdB
............... ... /1
OdBQ
IOOHz I kHz lOkHz
ww f
Fig. 10.10 Cunslructiun ofl] ZNUOJ) I) and 1JZvUw) II, buck converter example.
w.E
tra nsfo rmer pri ma ry:
( 10. 18)
asy
For the eleme nt va lues given in Fig. 10.8(a), this ex pressio n is equal to 4 Q. The Q- factor is gi ven by
En (10 . 19}
gin
Thi s exp ress ion yiel d s a num erica l val ue of Q = 3. The value of IIZ0 Uw) II at the resonan t fre qu e ncy
1.6 kH z is therefo re equal to (4 Q)/(3) = 1.33 Q . At hi gh frequency, 11Z,/Jul ) 11 follow s the reflected
inductor asymptote.
eer
The quan tity Zis) is given by Eq. (10.7). This imp edance is equa l to the co nverter input imped -
ance Z;(s), under the co ndi tions that J(.1·) is var ied to m ai nt ai n the out put vo ltage ii(s) at zero. Figu re
ing
I0.9(b) illu strates the der ivation of an ex pre ssio n for Zis). A test current source f,,,.,(s)is inje cted at the
co nver ter in put port. The impe dan ce ZJs) can be viewe d as the tra nsfe r fu nction from i,es,(s) to 0,,,,(s):
.ne
ZNS( ) -_ v,.,,(s)
~
I (10.20)
I ,,_,,(.~) ,' ·-·• 0
t
, ult
The null condition O(s)--->\ ' 0 great ly s im pli fies a nalys is of th e circuit of Fig. 10.9(b). Since the voltage
nu
,,(s) is zero , the curr e nt s t uoug h the capac itor and load impedances are also zero . Thi s furthe r imp lies
th at the indu ctor current 1(s) and transforme r w ind ing curr ent s are zero , and he nce th e voltage across the
inductor is also zero . Fi nall y, th e voltage v,(s), equ al to the outpu t voltage pl us the indu cto r voltage , is
zero.
Since the curr ents in the w in din g s of the transfo rme r model are zero, the curr e nt i,e_,,(.~) is equ al
to the indepen den t source current Id(s) :
l,.,,(s) = ld(s) (10.21)
Because 11,(s) is e qu al to zero, the volta ge app lied to the seco ndar y of the tra nsformer model is equ al to
the ind epende nt source vo ltage - Vgd(s) . Upo n dividi ng by the turns ra tio D, we obtain v,._,,(
s):

388 Input Filter Desig11
Fig. 10.11 Determination of the filter outp ut impedance Z,,(.v).
• v.d( s) ( 10.22)
ww
v,,.,.(, s) = - - 0-
Insertion of Eqs. (10.21) and (I0.22) into Eq. (10.20) leads to the fo llow ing res ult:
w.E (10.23)
asy
The steady -state relat ionshi p l = DV/R has been used to s imp lify the above result. Th is equ ation coi n-
cides wit h the exp ress ion listed in Table 10.1. TI1e Bode d iagram of II ZNUW) II is const ructed in Fig.
En
I0. 10; this plot coi ncides with the de asy mptote of UZD(jw) I\.
Nex t, let us construct the Bode di ag ram of the filte r ou tpu t imp eda nce Z,,(s). Whe n the ind epe n-
gin
de nt source Ois) is set to zero, the inp ut filt er network reduces to the c ircuit of Fig. 10. 11. It ca n be seen
that Z}s) is give n by the par allel co mbinat ion o f the inductor L1 and th e ca pac itor Ci
Z 0(s) = sL111
-cl
s I
eer (10.24)
ing
Construct ion o f the Bode diagra m of th is paralle l reso nant circu it is discussed in Sect ion 8.3.4. As ill us-
trate d in Fig. 10.12, the mag ni tude IIZ0 (jw) II is domina ted by the inductor impe dance at low freque ncy,
and by the capaci tor impedance at h igh freque ncy. The indu ctor and capaci tor asy mptotes intersect at the
fi lte r reso nant frequ ency:
.ne
40dBQ
t
30dB Q
Fig. 10.12 Mugnitude plot of the output 20 dBQ

impcdm1cc of the input tilte r of Fig. 10.11.
Sinc e the filter is not damp ed, the Q-foctor is 10 dJ3Q
very large.
OdBQ · ········· R01 =J!fi;
= 0.84 n
- I OdBQ
1 kllz
f

/ 0.3 B11
ck Converter Example 389
40 dBil
OdBQ
ww - IOdBQ
- 20 dBQ+-----~~~~~--+--~~...::...- .................
--'-1
Fig, 10,13
w.E 100 Hz. I kHz
I
10 kHz
Impedance design crileria IIZrlJro) II und II 20 Uro)II from Fig. 10. 10, with the filler outputinipedance
asy
IIZ,Uw) (Iof Fig. I0.12 superimposed. The design criteria of Eq, (10 .13) are not satisfied nt the input filter reso-
nance.
J-
En
1
i-2n.JLl:1
(10.25)
For the given values, the input filter resonant frequency is

impedance gin,ft= 400 Hz. This filter has characteristic
eer (10.26)
ing
equal to 0.R4 Q. Since the input filter is undamped , its Q-factor is ideally infinite . In practice, para sitic
elements such as indu cto r loss and capacitor equi va lent series resistan ce limit the va lue of Qr Nonet he-
less, the impedance IIZ 0 Uw) IIis very large in the vicinity of the filter resonant frequen cy Ji·
.ne
The Bode plot of the filter output impedance IIZJjro) II is overlaid on the \IZJ)<iJ) II and
IIZp0W) II plots in Fig. 10. 13, for the eleme nt values listed in Fig. I0.8(a). We can now detem1ine
whether the impedance inequa lities (10. 13) are satisfied. Note the design-oriented nature of Fig. 10.13:
since analytical expressions are given for each impedance asymptote, the designer can easily adjust the
component values to satisfy Eq. ( I 0. 13). For examp le, the values of l_rand C1 should be chosen to en sure
t
that the asymptotes of ll Z,,(jm)IIlie below the worst-case value of RID2, as well as the other it~ymptotes
of IIZv(jro) II.
It should also be apparent that it is a bad idea to choose the input and output filter resonant fre-
quencies / 0 and Jj to be equal, becaus e it would then be more difficult to satisfy the ineq ual ities of Eq.
(10. 13). Instead , the reso nant freq uenciesj 0 and/2-shou ld be well separated in value.
Since the input filter is undamp ed, it is impos sible to sa tisfy the impedance inequ alitie s ( 10. 13)
in the vicinity of the input filter resonant frequency ft· Regardless of the choice of element values, the
input filter changes the control-to-output tran sfer fun ct ion G 0 d(s) in the vic inity of freq uen cy fr Figures
10. 14 and 10. 15 illustrate the resulting correc tion factor [Eq. ( 10. 12)] and the modified control-to-output
tran sfer function [Eq. (10.4)], respect ivel y. At frequencies well below the input filter resonant frequency ,
impedance inequalit ies ( 10.13) are well satisfied . The correction factor tends to the value l L0°, and the

390 lnp lll Filter Design
JO dB
I + -z,,
ZN
-I zo
+-
Zo -IOd B
o·
- 180' L
1 z.
+ ZN
z.
l
ww
(
I
+ z;;
w.E
100 Hz l kl-lz
f
Fig. 10.14 Mugnitudc orthe correction facto!', Eq, ( 10.12). for the buck convel'tcr example uf Fig. 10.8.
asy
IIGv,1II
40dB
L Gv,1
En
30dB~I _IG_•
_d_ll.--=;
20dB
IOdB
gin
LG,."
OdBt----=-=a::.- ----.........
.....
\.
eer o·
ing
',
-I OdB
--~~·-------------- - 180"
.ne
- 360'
-l-----
lOOHz
-~~~
I kHz
f
--_.__::::::==""""-- ""' - 540'
JO kHz
t
Fig. LO.IS Effect of the u11dumped inpu t filter nn the cnnll'Ol-to-output transfor func1io11ul"th<)buck converter
example. Dashed li11es: without input filtcl'. Solid line.I':with undmnpcd input filter.
co ntrol -to -out put tra n sfe r function G" 1( .\·) is esse ntially un cha nge d. In the vic in i ty of the re so nan t fre-
quenc y Jj·,the co rrection factor con ta ins a pair of comp lex poles, and also a pair of righ t ha l f-plane com -
plex zeroes . These cause a "gl it ch " in the magn it ude plo t of the correc tion fac tor , and they co ntrib u te
360° of lag to the phase of the co rrect ion factor. The g litch and its phase lag can be seen in the Bode plot
of G,.,i(.\'). At high freque ncy, the correct ion factor tends to a value of approx im ately IL- 360 °; conse-
qu ently, the high -freq uency ma gni tu d e o f G,d is unch anged . However, whe n the - 360 ° contr ibuted by
the correction factor is added to the - 180° contribut ed at high frequen cy by the two poles of the original
G,, 1(s), a high -freque ncy phase a~ymptote of - 5400 is obta ined . [f the crossover frequ ency of the co n-
ver ter feedback loop is placed near to or grea ter than the input fi lte r resonan t fre q uency fp the n a negat ive

10.3 BrickConver/er Example 391
phase margin is inevitab le . This ex plain s why addit ion of an inpu t filter often leads to instabili ties and
oscill ati ons in sw itch ing regu lators.
10.3.2 Damping the Input Filter
Let 's damp the resonance of the input filter, so that impedance inequalities (10. 13) are satisfied at all fre-
quencies.
One approac h to d amping the filter is to add resi stor R1 in par allel wit h capaci tor C1 as illus trated
ww
in Fig. I0. 16(a). The output impedanc e of thi s network is iden tical to the par allel reso nant impedance
analyze d in Sect ion 8.3.4. The maximum value of the output impedance occurs at the resonant freque ncy
fj, and is equal in value to the resistance Rf" Hence, to satis fy impedance inequa li ties (10.13), we should
w.E
choose R1 to be much less than the IIZ/'/jlil) II andIIZo()W) II asympt otes. The condi tion R1 «. II ZJjffi) I)
ca n be ex pressed as:
asy
(10.27)
Unfo rtunatel y, this raises a new problem : the power dissipation in Rf . The de input voltage V~ is applied
En
across resistor Rr, and therefore R1 dissipates powe r equal to v; /Rf' Equat ion (I 0.27) im plies that this
power loss is greate r than the load power ! Therefo re, the circu it of Fig . 10.16(a) is not a pra ctica l solu -
tion.
gin
One solu tion to the power loss problem is to place Rf in para llel with L.1 as illu stra ted in Fig.
I0.16(b). The va lu e of R1 in Fig. I0. 16(b) is also chose n acco rdin g to Eq . ( 10.27). Since the de vo ltage
eer
across indu ctor L1 is zero, there is now no de power loss in resistor Rf" The probl em with th is circu it is
that its transfe r function conta ins a high -frequ enc y zero. Addit ion of R1 degrades the slope of the hig h-
frequency asymptote , from - 40 dB/decade to - 20 dB/decade. The circuit of Fig. 10. 16(b) is effect ively
a single-pole R-C low-pass filter , with no atte nuatio n prov ided by induc tor Lr-
ing
One practical solution is illustrated in Fig. 10. 17 [10]. De blocking capacitor C/J is added in
series with resistor ~- Since no de curre nt ca n flow throug h resistor Rf' its de power loss is eliminated.
The value of Cb is chosen to be very large such that , at the filter resonan t frequency fj, the imped ance of
.ne
the Rf"C1,bra nch is do minated by resistor R1• When C1,is sufficientl y large, then the output impedance of
this network reduces to the out put impedances of the filters of Fig. 10.16. The impedance asympt otes for
the case of large C1,are illu strated in Fig . I0 .17(b ).
(a) t
Fig. 10.16 l wo attempts to d amp the input filter : (a) addition of d ampi ng resis11111c
e R1 ucrvss c1, (h) addition o/
damping resistan ce R1 in p:irnll el with Lr

392 1 Filter Design

!111, 11
(b)
0 0
ww
Fig. 10.17 A practical method to damping tile input tilter, including damping resistanc e R1 and Jc b!oc~ing
capacitor Cb: (a) circuit, (b) output impedance asymptotes.
w.E 40dBQ
asy
En
gin
OdBQ
- 10 dBQ
-20dBil+---~~-~~~'-'-l----......::
100Hi I kHi
I eer
......~~~--i
10 kHz
Fig. 10.18 Impedan ce design criteria 11Z,,JJCli

ing
) 11 and II Z0 (jw) 11from Fig. 10.10, with the tiller output impeda11ce
IIZ,,Ucu) IIof Fig. IO. l 7(b) superimposed. The design cr iteria of Eq. ( 10. 13) are well satisfied .
.ne
The low-frequency asymptotes of IIZNUW) !I and IIZvli W) II in Fig. 10.10 are equal to
RID2 = 12 Q. The choice R1 == I Q therefore satisfies impedance inequalities (10.13) very well. The
choice Cb= 4700 µ.F leads to 112nJjCb= 0.084 Q, which is much smaller than Rf' The resu ltin g magni-
tude IIZ0 (jw) II is compared with IIZNUw) II and IIZ0 (Jro)II in Fig. 10.18. It can be seen that the chosen
values of R,.and C 0 !ead to adequate damping, and impedance inequalities ( 10. 13) are now well satis fied.
t
Figure 10.19 illustra tes how addition of the damped input filt er modifies the magnitude and
phase of the control-to-output transfer functio n. There is now very litt le change in G,j s), and we would
expect that the pe1formance of the converter feedback loop is unaffected by the input filter.
10.4 DESIGN OF A DAMPED INPUT FILTER
As illustrated by the example of the previous section, design of an input filter requires not only that the
filter impedance asymptotes satisfy impedance inequali ties, but also that the filter be adequately damped.
Damping of the input filter is also necessary to prevent transients and dist urbances in vgCt) from exc iting
filter resonances. Other design constraints include attaini ng the desired filter atten uatio n, and minimizi ng

/0.4 Design of a Damped illpw Filter 393
40dB
IIG.dll LG •d
30dB
IIGvdll
20dB
Fig. 10.19 Effect of the
damped input filter on the IOdB
con tro l-to-output transfer
foncti on of the buck converter LGw1
examrl e. Dashed lines: with-
OdB ----·------- o·
ww
out inp ut filter. Solid li11
with dumped input filter.
es:
- IOdB
w.E
- 90.
asy -l------
IOOHz
-- ------======::z:1.
I kHz
I
- 180"
JO kHz
En
the size of the reactive elemen ts. Although a large number of class ica l filter de sign technique s are well
damp ing fi lter resonances.

gin
known, these techniques do not address the problems of limiting the maximum output impedance and
The value of the blocking capac itor Cb used to damp the input filter in Section 10.3.2 is ten
eer
times larger than the value of C1, and hence its size and cost are of practical concern. Optimizatio n of an
inpu t filter design therefore includes minimizat ion of the size of the elements used in the damping net-
works.
ing
Sever,11practical approaches to dampin g the single -section L-C low-pass filter are illustra ted in
Fig . 1020 [10, l l,17] . Figu re l0.20(a) contains the R,-C b dampin g br anc h considered in the pre vious
.ne
sect ion . In Fig. I0.20(b), the damp ing resis tor R1 is placed in pa rallel with the filter inductor Li' and a
high -frequency blockin g inductor L~ is placed in series with Rr Inductor Lb causes the filter transfer
function to roll off with a high-fre.:1uency slope of - 40 dB/decade . In Fig. l0.20(c), the dampin g resistor
R1 is placed in se1ies with the filter inductor LJ', and the de current is bypassed by inductor L1,,In each
case, it is desired to obt ain a given amount of damping [i.e., to cause the peak va lue of the filter out put
impedance to be no great er than a given value that satisfies th e impedance inequalit ies (10. 13)], wh ile
minimizing the value of Cb or L1, . This prob lem can be formulated in an alternate but equivalent form: for
t
a given choice of Cb or L1, findthe value of R1 that minimizes the peak output impedance [10]. 111esolu-
tions to this opt imi zation pro blem, for the three filter network s of Fig . 2 1, are summarized in this section.
In each case, the quan tities Rw and .iJ-are define d by Eqs. ( 10.25) and (10.26).
1,
Cons ider the filter of Fig. I0.20(b), w ith fixed va lues of Li' C and Lb. Figure 10.21 co ntain s
Bode plots of the filter output impedance IIZ,,(jW) II for several values of damp ing resistance Rr- For the
limitin g ca~e R1 = =, the circuit reduces to the original undamped filter with infin ite Qr In the limitin g
ca~e R1 : 0, the filter is also undamped , but the resonant frequency is increased because Lb becomes con-
nected in paralle l with L1. Between these two extremes, there must exist an optim um value of R1 that
causes the peak filter output impedance to be m inimize d. It can be shown [10, 17] th at all magn itude plots
must pass throu gh a commo n point , and therefor e the optimum attains its pea k at this po int . This fact has
been used to derive the desi!,'ll equations of optimally -damped L-C filter sections .

(b)
ww +
Fig. I0.21> S~vcnil practical appro aches to damping
lhe single-section inpLLl filler : (a) RJ°Cb pamllcl
w.E damping , (b) R,-L,, parallel dumping, (c) Rrli, series

dampin g .
asy
En
(c)
+
gin
eer
ing
.ne
30dB
t
20 dB
l OdB Fig . I0.21 Comparison of

output impedance curves for
optimal parullc/ ~-L 0 damping

IZol OdB
with undamped and severa l
Ro,
suboptimal d esigns . For this
-IO dB example, 11 =L1/ l"" 0,5!6
-20 dB
-30 dB
0.1 I 10
L
J;,

10.4 Design of a Damped input Filter 395
10.4.1 R1-cbParallel Damping
Optimization of Lhe fille r nelwork of Fig. J0.20(a) and Section I0.3.2 was described in [ IO]. The high -
frequency auenuation of this filter is not affected by the choice of Ch, and the high -frequency asymptote
is identical to that of the origina l undamped filter. The sole Lradeoff in design of the damping elements
for thi s filler is in Lhesize of the blocking capacitor Cb vs. the damping ach ieved.
For this filler, let us define the quantity n as the ratio of the blocking capacitance C1,to the filter
capacitance C/
ww (10.28)
w.E
For the optimum des ign , the peak filter output impedance occurs at the freq uency
l' -f f Vex::
Jr,r - 2 + 11
(10.29)
asy
The va lue of the peak output impedance for the optimum desig n is
jz.lrnm=Ro1~
En (10.30)
gin
The value of damping resistance that leads Lo optimum dampin g is described by
(2+ n)(4 + 311)

2(4 + 11)
211
eer (10.3 1)
The above eq uations allow choice oflhe damping values R1 and Cb.
ing
For example , let 's redesig n the damping network of Section I 0.3 .2, to achieve the same peak
output impedance IIZ0 (joo) 11mm ==l n, while min imizing the value of the bloc kin g cap acitance C1,. From
Section 10.3.2, the other parameter val ues are Rw= 0.84 Q, C1 =470 µF, and L1 =330 ,al. First, we solve
.ne
E~:i.(10.30) to find the required value of n :
( 10.32)
t
Eva luation of thi s expression with lhe given num eri cal values leads lo n = 2.5. The bloc kin g ca pacitor is
therefore required to have a value of 1iC 1 = 1200 µ,F.This is one-qu arter of the value emplo yed in Sect ion
10.3.2. The value of R1 is then found by eva lua tion ofE(( . ( 1().3 I), leading to
(2+n)(4+311 (10.33)
=0.67 Q
2n 2(4+il)
The output impedance of th is filter desig n is compared with the output impedances of the original
undamp ed filler of Section 10.3.1, and oflhe suboptimal design of Section 10.3.2, in Fig. 10.22 lt can be

396 lnf}rlf Filter Desig11
20d80
10 dB.Q
OdBQ
- IOdBO
ww -20dBr.l
w.E
- 30 dB.Q-1---~~ -~~~......., __ __ .......__.__._~~--1
100 Hz I kHz 10 kHz
f
1''ig.10.22 Compa rison of the output impedances of the design with optimal pmallel R1-c,,damping. the suhopti-
asy
mal design ot' Section 10.3.2, and lhe origin:il undamped filter.
En
seen that the opt imally damped filter does indee d achieve the desired peak output impedance of I .Q, at
the slight ly lowe r peak frequency given by Eq. (10.29)
gin
The RrCi, parallel damping approach finds significant application in de-de converters. Since a
serie.~ resistor is placed in series with C1,, Cb can be realized using capaci tor types hav in g sub stantial
equivalent series resistance, suc h as e lectro lytic and tanta lum types. However, in some ap pli cat ions, the
eer
R1 Li,approaches of the next subsections can lead to sma ller designs . Also, the large blocking capacitor
value may be undesirable in applicat ions h av in g an ac input.
10.4.2 R/°Lb ParaUel Damping

ing
.ne
Figure I0.20(b ) illust rates the placemen t of damping resisto r R1 in pa rallel with inductor Lr Inductor lb
causes the filte r to exh ibi t a two-pole attenuation character istic at h igh frequency . To allow R1 to damp the
filter,inductor Lb shou ld have an im pedance magni tud e tha t is sufficient ly smallerthan R1 at th e filter res-
onan t frequency ij· Optimization of this da mping network is descr ibed in [17].
W ith thi s approach, inductor Lb can be phys ically much sma ller th an Lf' Since R1 is typic ally
much greater than the de resistance of LI' essentia lly none of the de current flows throug h L0 • Further -
t
more, R1 could be realized as the equiva lent series res istance of Lb at the filter resonant frequency IJ·
Hence, this is a very simple, low-cost ap proac h to damping the inpu t filter.
The disadvantage of th is approac h is th e fact tha t the h igh -frequency attenua ti on of th e filter is
1Lj., to
degraded: the h.igh-fre quenc y asymptote of the filter transfer func ti o n is increased from l/CJJ 1
llrn2(L1IIL1,)C/' Furthermore , since the need for damping lim it s the max im um va lue of Lb, sign ifi cant loss
of hi gh-freque ncy attenuation is unavo id ab le. To compensate, the val ue of Ll mu st be increased. There -
fore, a tradeoff occurs between damping and degradation of hig h-frequency attenuation, as illustrated in
Fig. 10.23. For example, limiti ng the degrada tion of hi gh-frequenc y attenuation to 6 dB leads to an opt i-
mum peak filt er output impedanc e IIZ0 11mm of ,./6 times the orig inal character istic impedance Rnr Add i-
tional dampin g leads to further degradat ion of the high -frequ ency attenuation .
The opt imally dampe d desig n (i.e., the choice of R1 that min im izes the peak ou tpu t imp eda nce

10.4 De.1ig11
of a Damped l11p111
Filter 397
30dB
.,..
~
20dB ~ gradation of HF I
/
V
lter attenuation
~/ 12 1....
Fig. 10.23 Performance attained via optimal 10 dB

"' , .........
r-.
......V
/
/ Roi
ww
design proced ure, parallel RrLb circllit of
10.20(b). Optimum peak filler output imped-
ance II20 11,,,,,.
and increa se of filter hig h-fre-
quency gain, vs. 11=L/L. OdB /
./,_,.
~
~
~~
-----
--...
w.E .,,.../
/
asy - IOdB
0.1
L•
10
En
IIZ II for a given choice of L,,) is described by the following equations :
L1
gin
0
_!!.L"" / n(3 + 4n )( I + 210 (10.34)

V
where
Q,,p,- R01 2(J + 4n)
eer
ing (10.3 5)
.ne
The peak filter output impedance occurs at frequen cy
and has the val ue

( 10.36)
t
IZ,, II.,,.,
, =R01 ,.,/ 2ri(l + 2n) ( 10.37)
The attenua tion of the filter high-frequency asymptote is degraded by the factor
LI l ( 10.38)
- -- -· - l+-
1,, 111
.• - n
So, given an undamped LrCr filter having comer frequency /j, and characterist ic impedance Rw, and
given a requireme nt for the maximum allowa ble outp ut impedance II2 0 11 mm'one can solve Eq. ( 10.37)
for the required value of n. One can then determ ine the required numerical values of Lb and Rr

10.4.3 Rf-L b Series Damping
Figure I0.20(c) illustrates the p laceme nt of damp in g res istor Rf in ser ies with ind ucto r Lr Inductor L1,
pro vides a de bypass to avoid sign ificant power di ss ipation in Rr To allow Rrto dam p the filter, indu ctor
Lb should ha ve an impeda nce mag nitu de tha t is suffic ie nt ly greate r than Rf at the filte r reso nant fre-
quency.
Although th is c ircuit is theore tically equ iva lent to the par alle l d ampin g RrL 1, case of Section
10.4.2, severa l diffe rences are observed in pract ica l design s. Both ind ucto rs mu st carry the full de cur -
ww
rent , and hence both ha ve significant size. The filt er hi gh -frequ ency attenu atio n is not affecte d by the
choice of lw and the high -frequency asym ptote is ide nti ca l to that of the o rig ina l undamped filter. The
tradeo ff in design of this filter does not in volve high - frequ ency atte nu at ion ; rather , the iss ue is dam pin g
w.E
vs. bypass induc tor size.
Design equat ions similar to those of the previous sec tions ca n be de rived for this case. The opt i-
mum peak filter output impedan ce occurs at frequency
asy (10. 39)
and has the val ue
En
IZ'-'i11,m
gin
-R J2(1+n}(2+n
) (10.40)
ir - Of n
The va lue of dam pin g resis tance tha t leads to optim um d am p ing is desc ribed by
eer (l0.4 L)
ing
For thi s case, the peak outpu t impedance can not be reduced be low .[2 Rw via damping . None -
.ne
theless, it is possible to furth er red uce the filter output im peda nce by redes ign of L1 and C1, to reduce the
va lue of Rl!f.
10.4.4 Cascading Filter Sections

t
A cascade connection of multiple L-C filter sect ions ca n achieve a given high-frequency atte nuation with
less volume and we ight than a sing le-sec tion L-C filter. The increased cutoff fr eq uency of the mu lt ip le-
sect ion filter allows use of sma ller indu ctance and ca pacitance values . Dampin g of each L-C section is
usually req uire d, whi ch imp lies that dampi ng of each sect ion should be opt im ize d . Unfo rtun a tely, the
results of the pre viou s sectio ns are restricted to single-section filters. Interaction s between casca ded L-C
sec tions can lead to addition al resonances and increase d filter outp ut im pe dance.
It is nonethe less possible to design casca ded fil ter sections such th at in teractio n between L-C
sect ions is ne g ligib le . In the approach describe d below, the filter out put impeda nce is approx im ate ly
equa l to the ou tput impedance of the last sect ion, and res o nances caused by interactions betwee n stages
are avoided. Although the resu ltin g filt er may not be " optimal " in a ny sense, in sight can be gai ned that
allows int e ll ige nt des ign of mu lt ipl e-sec tion filters with econo mica l dampin g of each secti on .

10.4 Design of a Da11111ed

lll fJUI Filter 399
Additional Exist ing

filter za zil filter
section ,._ ----.
Fig. 10.24 Atlditionof a filter section at the input of an existing filter.
ww Cons ider th e addi tion of a filter sect ion to the input of an ex isting filter, as in Fig. 10.24. Let us
assume tha t the existing fi lte r has been correctly desig ned to meet the outp ut impedance des ign cr iteria of
Eq. (10.13): und e r the conditions Z,,(s) =0 and i\/ ~)= 0, IIZ,, 1)is sufficiently small. It is desired to add a
w.E
damped filter sectio n tha t does not sig nifi can tl y increase IIZ,, {I.
Middlebrook 's extra element theo rem of Appendix C ca n again be invo ked , to express how
addition of the filter section modifies Z,,(s):
asy (10.42)
En
where
gin
eer
(10.43)
is the imp edance at the in pu t port of the ex ist ing filter, with its output port shor t-ci rcuited. Note that, in
ing
this partic ular case , nullin g 01u,(s) is the same as shorting the filter o u tput port beca use the short-c ircuit
current flows through the{"' ·'' source. The qu anti ty
.ne
(10.44)
t
is the impedance at the inpu t port of the exist ing filter, with its output port open-ci rcuited. Hence, the
additional filter section does not sign ific antly alte r z,,provided tha t
IZ.ll«I ZNj and

1
( 10.45)
jz.[ ~ IZm!
Bode p lots of the quan ti ties ZNI and Z/JJ ca n be construc ted e ith er ana lyt ica ll y or by com puter simu la -
tion, to obtain limits of z,,. When II2 0 IJ sa ti sfies Eq. ( 10.45 ), then th e "corr ectio n factor"
(! + ZjZN )l(l + ZjZDI) is app rox ima tely equal to I , and the mod i fied z,,is approximately equal to the
origina l Z0 •
To satis fy the des ign crite ria ( 10.45), it is ad van tageous to select the resonan t frequ enc ies of Z"
to differ from the resona nt frequencies of 2 01 . In other words, we shou ld stagger -tune the filter sections.
This minimizes the interact ions between filter sections, and ca n allow use of smaller reac tive ele ment
values.

400 Filter Design

lnp111
ww Section 2 Section 1
Fig. 10.25 1\vo-s ect ion input filter example, employing R1·Lh parallel damring in each sec tion.
w.E
10.4.5 Example: Two Stage Input Filter
asy
As an examp le, let us conside r the desig n o f a two -stage filter usi ng RrLb parallel da mping in e ach sec-
En
tion as illustrate d in Fig. 10.25 [ 17]. It is desir ed to achi eve the same attenuat ion as the sin gle -sect ion fi l-
ters designed in Sect ions 10.3.2 a nd 10.4.1, and to fi lter the inpu t curr e nt of the same buck converter
exam ple of Fig. 10.8. These filters ex h ib it an attenua tion of 80 dB at 250 kHz , and satisfy th e des ign ine-
of Fig. 10.25 to attain 80 dB of attenua tion at 250 kHz.

gin
qua lities of Eq. ( 10 .13) wit h the II ZNIIand II 7,0 II impedan ces of Fig. 10.10. Hence, let 's desig n th e filter
As described in th e prev io us sec tion and be low, it is adva ntageo us to stagge r-tune th e filter sec-
eer
tions so that interacti on between filter sections is redu ced. We w il l find that the c uto ff fre qu ency of filter
sec tion I shou ld be chosen to be sma ller than th e cutoff freq uen cy of sec tion 2. In co nsequen ce , the
ing
attenuation of section I will be grea ter th an tha t of sect ion 2. Let us (so mewha t arbitrar il y) des ign to
obt a in 45 dB of attenua tion from sectio n I, and 35 dB of attenua tio n from sect ion 2 (so that the tota l is
the specified 80 dB ). Let us also selec t n 1 = n2 = n :a LhJL1 = 0.5 for each sec tion; as il lus tra ted in F ig.
10.23, this choice leads to a good compromise between damping of the fil ter reso nance and de gra dation
.ne
of h igh frequency filter att e nua tio n. Equat ion ( 10.38) and Fig. 10.23 pre dict th at th e R_rLbda mpin g ne t-
work wi ll degr ade the hi gh frequency atte nu ation by a factor of( ! + l/n) ""3, or 9.5 dB. Hence, the sec-
tion I und amped reso nant frequenc y /.ti should be chosen to yiel d 45 dB + 9.5 <lB= 54.5 dB ~ 533 of
attenuation at 250 kHz. Since sec tion I exhibits a two -pole (- 40 dB/decade) roll-off at high frequencies ,
~ should be chosen as follows: t
" "' (250 kHz) = IO g kH· ( 10.46 )

Jjl ,/533 . z
Note th at thi s frequency is wel l above th e 1.6 kHz reso nant frequency fu of the bu ck conver ter o utput fil-
ter . Co nsequ ent ly , th e outpu t impedance IIz,,II can be as large as 3 Q, and stil l be well below the
IIZN(jw) IIand II Z 0Uw) IIplots of Fig. IO.JO.
Solu tion of Eq. (10.37) for the req uired sect ion 1 ch ara cte ristic imped ance that leads to a peak
ou tpu t impedance of 3 .Q with n = 0 .5 leads to

10.4 Design ofa Damp ed lnp11tFilter 401
R - ,~.,.,,., - - J.Q - 2.12" (10.47)

01 1
- J211(
I + 211)- fi(O.Si(I + 2(0.5)) ••
The filte r inductance and capac itance value s are therefor e
Ro/1
L, = -2 f, =31.2 µH
1t / J (10.48)
C 1 ~ 2 f, I R = 6.9 µF
n /I 0/ l
ww
The sec tion I da mp ing network inductance is
w.E
(10.49)
The section I dampin g re sista nce is fo und from Eq. ( 10.34):
asy n(3+4n)(1
+2 n
2(1 +4n)
= l.9Q (10.50)
En
The peak output imp edance will occur at the frequency given by Eq. ( 10.36), 15.3 kHz. The quantities
IIZN1(jw) II and IIZ01 (iw) IIfor filter sectio n I can now be constructed analy ticall y or plotted by computer
gin
simulation . IIZN 1(jW) II is the section I inpu t impedance Zil wit h the outp ut of section I shorted, and is
given by the parallel combina tion of the sl 1 and the (R 1 + sn 1L 1) branches. IIZmCiW) II is the section l
in put impe dance Zn wit h the outp ut of section l ope n-circu ited, and is given by the se1ies combin ation of
eer
ZN1(s) with the capaci tor imp edance 1/sC1. Fig ure 10.26 con tains plots of II ZNI (jw) IIand II ZDl(iw) IIfor
filter section I, genera ted us ing Spice.
ing
One way to approach design of filter section 2 is as follows . To avoid significan tl y modifying
th e overa ll filter output impeda nce 2 0 , th e section 2 output impedan ce IIZaUw) IImust be sufficie nt ly less
than IIZN 1(Jco)II and IIZ01(jro) II, It can be seen from Fig. 10.26 th at , w ith respect to II Z 0 1(Jro) II, this is
.ne
most difficult to accomplish when the peak frequencies of sectio ns I and 2 coincide . It is most difficu lt to
sa tisfy the IIZNl(jro) IIdesi gn criterion when the peak frequency of sect ions 2 is lowe r than the peak fre -
qu enc y of section I . Therefore, the best choice is to stagger -tune the filter sec tions , w ith th e resonan t fre-
quency of section I being lower than the peak frequency of sec tion 2. This imp lies that sect ion l will
produce more high -frequency attenuat ion than section 2. For this reason, we have chosen to achieve
45 dB of attenuat ion wit h section I, and 35 dB of attenuation from section 2.
The section 2 undamped reso nant frequency ~ 2 should be chosen in the same manner used in
t
Eq. ( 10.46) for section I . We ha ve cho sen to selec t n 2 = rt = l bll 1 = 0.5 for sect ion 2; this again mea ns
tha t the Rflb da mpin g network wi ll degrade the high frequency at tenuation by a factorof (I + 1/n) = 3,
or 9.5 dB. Hence, the section 2 undamped reso nant freq uency /p.should be chosen to yield 35 dB + 9.5
dB = 44.5 dB =e> 169 of attenuation at 250 kHz . Since sectio n 2 exh ib it s a two -pole (- 40 dB/deca de)
roll-off at high frequencies , / 12 should be chosen as follows:
f,fl = (250 kHz) =

1ITi9 19..2
51cH·
z
(10.51)
The output impedance of section 2 wi ll peak at the frequency 27.2 kHz, as given by Eq. (10.36). Hence,
the peak frequencies of sect ions l and 2 differ by almost a factor of 2.

402 Filter Design

/11p111
20 dBQ
-" I 11
r--1!
2 l1
01
'- r--
' 1---'-;/
,,
V
~
~ .....
..----
/
OdBQ
......
IIZ,.J),
.,
.. /.- '\
V ,,,... 11
z. 11
,,,,...
-2 0dBQ - I"--...
,,
ww
V __
90' -
v
~ LzN ,
~- _ -,::::
/ ,
w.E 45'
o·
' I\ "\ I
I \ LZ.
asy
-45 '
/ZDI I
I
' , ...,
- 90'
I kHz
En .1-H'
lOkHz 100 kHl !MHz
gin
Fig. 10.26 Bode plot of 7.N I and Zv 1 for filter section I . Also showt1i, the Dode plot for the nutput impedance
of filter ,ectio 112.
z,,
IIZm/Jffi) II is approx imat e ly 7 <lB.Q, Hence , eer

Fi gure 10.26 shows that , at 27.2 kHz, II Zm(joo) II has a magn i tude of roughly 3 dBQ, and that
let us des ign sec tion 2 to ha ve a peak output impedance of
0 dBQ =a:>l Q. Solut ion of Eq. ( I 0.37) for the requ ired sec tion 2 characte ri st ic impe dance leads to
Ror- = I 2 . llrn
m = r:::::;- l ~i = 0.71 Q ing
.ne
( 10.52)
- J2n( I + 211) y 2(0.5)[ l + 2(0.5))
t
The section 2 e leme nt values are therefore
R (l/2
L i = -2 r = 5.8 µ H
'TtJfl
Ci = 2 / R :: I l.7 ilf
It /2 0/ 2 ( 10.53)
n/, 2 = 2.9 µ H
R2 = Q.,1. R012 = Ron Vf7ir+411)(I 2n)

-- ( - )--
2 l + 411
-t-
= 0.65 Q
A Bode plot of the resu lting Z" is overlaid on Fig . 10.26. It ca n be seen that II Z,,(jw) II is less th an, but
very close to, IIZ 0 1(joo) I! between the peak frequenc ies of 15 kHz and 27 kHz . The impeda nce in equ a li -
ties ( 10.45) are sat isfied somew hat better below 15 kHz, and are satisfied very well at hig h frequency.
The res ultin g filter output impedan ce 11 Z,,(}oo)II is plotted in Fig. 10 .27, for sec tion I alone and
for the comp lete cascaded two-sect ion filter. It can be seen that the peak output impedance is approx i-

10.5 SwnmaJ}' of Key Points 403
30dBQ
., V 11z0 11 11 1
,,,,,,,. IIZNII
20 dBil
,_
V
~ "'/
./
Cascaded
section1 I and 2
IOdBQ IIZo II
~
\ I ',,>~
..
..•....... I
··.•Section I
V / .. ·· ~ -alone
ww
OdBQ /
..-··
~
-IO dBQ /
/
::::-·
··· " I',..
l'-r-..
w.E ~--··· I'
-20dBQ
asy
I kHz JOkHz 100 kHz
Fig. 10.27 Comparison of the impedance design criteria IIZJ)(J)) II and II Z0 UW) II, Eq. (10.13), with the filter
output impedance IIz,,Uw) JI.Solid line: II Z0 (jw) IInf c.iscaded design. Dashed line: IIZ,,Uw) IIof section I alrn1e.
En
ma tely 10 dBQ , or ro ugh ly 3 Q . The imped ance des ign criteria ( 10. 13) are also shown, and it can be seen
that the filte r meets these design cri teria.
gin
o te the absence of reso nances in IIZ"(JW) II-
Th e effect of stage 2 on IIZ.,(jw) II is ve ry small above 40 kH z [where ine qu a lit ies (10 .45) are
very well satisfied ]. and has moderate -to-small effect at lower frequenc ies . It is interesti ng that, above
seen from Fig. C.8 of Append ix C: whe n th e phase diffe rence betwee n LZ,,(jw) an d L ZDl(jw) is not too
eer
approximately 12 kH z, the addition of stage 2 actually decreases II Z,,(jw) II, The rea son for this can be
large (:,; 90.), then the 1/(1 + Z)Z u) term decreases the magn i tude of the resulting II Z,,(jcn ) 11- As can be
seen from the ph ase plot of Fig. 10.26, th is is indeed what happ e ns. So allowing IIz ,,(jro) II to be si mi l ar
in magnitude to II Z 0 1(jw ) IIabove 12 kH z was an acceptab le design choice.
ing
.ne
The res ultin g filt er transfer function is illustrated in Fig. I0.28. It can be seen that it does indeed
atta in the goal of 80 dB a tte nu a tion at 250 kHz.

Figure 10.29 compares the s in gle stage des ign of Section 10.4.1 to the two -s ta ge des ign of th is
sec tion. Both des igns attain 80 dB attenuation at 250 kHz , and both des igns meet the imp eda nce des ign
crit eria ofEq. (10.13). However, th e si ngle -stage approac h requir es mu c h large r filter e lements.
t
10.5 SUM.MARY OF KEY POINTS
I. Switching converters usuall y require inp ut filters, to reduce conducted elec tromagn etic imerference and
possibly also to meet requirements concern ing conducted susceptib ility.
2. Addition of an input filter lo a converter alters the contro l-to-output and other transfer functio ns of the con-
verter. Design of the converter control system must accou111for the effects of the input filter.
3. If the inpu t filter is not damped, then it typically introduces complex poles and RHP zeroes into the con-
vener control-to-output transfer funct ion, at the resona nt frequencies of the inpu t filter. If these resonant
frequencies are lower than the crossover frequency of the controll er loop gain , then the phase margin will
become negativ e and the regulator wi II be unstable.

404 lnp11I Filter De.sign
20dB
IIHII ~
~
OdB
.........r-,
-20dB '
-40dB
ww -OOdB
-80dB
\
\
I\
w.E
-8 >dB~
at 250kHz
'
-100dB
'~
asy
~
- 120dB
1 kHz lOkfu IOOkHz 1 MHz
f
Fig. 10.28 Input filter trnnsfer

En
function , c;ascadcd two-~ectiondesign.
(a) gin
eer
ing
.ne
(b)
R2
0.6SQ
"2½
2.9µH
R,
1.9 n
n 1L1
JS.6µH t
Li S.8µH L , 31.2 µH
C2 ct
11.7 µF 6.9µF
Fi,:. 10.29 Compal'ison of single-section {a) and two se<:tion(h) input filter de,i gns. llnth cle~ign.,meet the design
criteri u (10. 13) , and hoth eKhibit 80 dH of attcm1ation at 250 kHz ,

References 405
4. The inpu t filter can be designed so that it doe. not significa ntly change the converter control-to-output and
ocher tran. fer functio ns. Impedance inequaliti es ( 10.13) give simple design cr iteria that guarantee this. To
meet the. e design criteria, the resonances of the input filter must be sufficien tly damped.
5. Opti mization of the damping networks of single-sect ion filters can yield signi fic ant savings in filter ele-
ment size. Equations for optimizing three differe nt filter sections are listed.
6. Sub cantial savings in filter element . ize can be realized via cascading filter ection.. The design of nonin-
teracting cascaded filter sections can be achieved by an approach . imilar to the original inpu t filter design
method. Impedance inequalities (I0.45) give design criteria that guaran tee that interactions are not sub-
stantial.
ww
REFERENCES
[I]
[2]
w.E
M. NAVE, Power Li11e Filter Design fo r Switched Mode Power Supplies,
hold, 1991.
ew York: Van
e1ference (EM!) Reduction in Power Supplies, MIL-HDBK-241 B,

Design Guide fo r Elutromagnet ic I111
ostrand Rein-
[3] C. MARS asy

U.S. Department of Defense, April I 1981.
HAM,The Guide lo the EMC Directive 89/336/EEC, ew York: IEEE Press, 1992.
[4) P. DEGA
En
, Electromagnetic Compatibility, Oxford: Oxford University Press, 1993.
UQUEand J. HAMELIN
[5)
Conference, 1996 Record, pp. 15-21.
gin
R. REDL, "Power Electronics and Electromagne tic Compatibi lity," IEEE Power Electronics Specialists
[6)
eer
P. R. WILLCOCK, J. A. FERREIRA,J. D. VANW YK, "An Exper imental Approac h to Investigate the Genera-
tion and Propagation of Conducted EMT in Converters," IEEE Power Electronics Specialists Conference_,
1998 Record, pp. 1140-1146.
[7]
ing
L. RossETrO, S. Buso and G. SPIAZZI,"Conduc ted EMI lssue.s in a 600W Single-Ph ase Boost PFC
Design," IEEE Transactions on Indu stry Appl ications , Vol. 36, No. 2, pp. 578-585, March/April 2000.
.ne
[8) F. Dos REIS, J. SEBASTIAN and J. UcEDA,"Determ ina tion of EMJ Emissions in Power Factor Prereg ula-
tors by Design, " IEEE Po wer Electronics Sp ecialists Conf erence, 1994 Record, pp. 1117-1126.
[9) R. D. MIDDLEBROOK, "Inpu t Filler Consideratio ns in Design and Application of Switchin g Regulators,"
IEEE Industry App lications Society Annual M eeting, 1976 Record, pp. 366-382. t
[10] R. D. MIDDLEBROOK, "Design Techniques for Preventi ng Inpu t Filte r Oscillations in Switched-Mode Reg-
ulators," Proceedings of Powercon 5, pp. A3. l - A3. I 6, May 1978.
[11] T. PHELPS and W. TATE, " Optimizing Passive Inpu t Filler Design," Proceedings of Powercon 6, pp. G l. l-
Gl.10 , May 1979.
(12) Y. JANGand R. ERICKSON, "Physical Orig ins of Input Filter Oscillations in Current Programmed Convert-
ers," IEEE Transactions on Power Electronics, Vol 7, No. 4, pp. 725-733, October 1992.
[13) S. ERICH and W. POLIVKA , "Inpu t Filter Design for Current-Programmed Regula tors," IEEE Appli ed
Power Electroni cs Conferenc e, 1990Proceedings, pp. 78 1-791, March 1990.

[ 14] N. SoKAL. "System Oscillations Cau. ed by Negative Input Resistance at the Power Input Port of a Switch-
ing Mode Regulator, Amplifier, De/De Converter, or DelAc Inverter," IEEE Power Elec1ro11i cs Specialists
Conference, 1973 Record, pp. 138-140.
[15] A. KisLOVSKI, R. REDL,and . SoKAL,Dynamic Analysis of Switching-Mode De/De Converrers, ew

York: Van Nostrand Reinhold, Chapter JO, 1991.
[16] S. KELKAR and F. LEE,"A Novel Input Filter Compensation Scheme for Switchin g Regulators," IEEE
Power Electronics Specialists Cmf ere11
ce, 1982 Record, pp. 260-271.
[I7J
ww
R. ERICKSON, "Optimal Single-Resistor Damping of Input Filters," IEEE Applied Power Electronics Con-
ference, I999 Proceedings, pp. I073-I097, March I999.
[! 8] M . FLORE KI, "Input Filter Design for Multip le-Module DC Power Sys-
Z-LIZARRAGAand A. F. WITULS
[19J w.E
tems," IEE E Transactions on Po wer Electronics, Vol 11, o. 3, pp. 472-479, May 1996.
V. VLATK OVIC, D. EOROJE VIC and F. LEE, "Input Filter Design for Power Factor Correction Circuits,"
IEEE Transactions on Power Electronics, Vol 11, o. l , pp. 199-205, January 1996.
[20]
asy
F. YUAN,D. Y. CHEN,Y. Wu and Y. CHEN , "A Procedure for Designing EMI Filters for Ac Line Applica-
tions,'' IEEE Trm1sactions 011 Power Electronics, Vol 11, No. l, pp. 170- 181, January 1996.
(21] G. SPIAZZIand J. PoMILIO

En
, "Interac tion Between EMI Filter and Power Factor Preregulators wit h Average
Current Control: Analysis and Design Considerations," IEEE Transactions on lndusrrial Eieclronics,
Vol. 46, No. 3, pp. 577-584, June 1999.
gin
PROBLEMS
IO.I eer
It is required to design an input filter for the flyback converter of Fig. I0.30. The maximum allowed
ing
amplitude of switching harmonics of i;.,(I) is lO µA rms. Calculate the required attenuation of the filter at
the switching frequency.
n = 0.5
.ne
i~(t)
+
+
Input
filler
R
SQ
'V
t
48 V
n r n =o.3
J L__J f,=2 00kHz
Fig. 10.30 Flybaek converter, Problem., 10.L 10.4, I0.6, 10.8, nnd 10.10.
10.2 In the boost converter of Fig. I0.31, the input filter is designed so that the maximu m amplitude of
switching harmonics of i,./t) is not greatcrthan 10 µA rms. Find the required attenuation of the filter at
the switching frequency.
10.3 Derive the expressions for ZN and 20 in Table IO. I.

Probl en1s 407
it<t) L
Input +
filter
vi R
V
48 V 12n
r-1 r D = 0.6
.J LJ f, = 200 kHz
ww l<'ig.10.31 Bo ost converter, Problems l0.2, 10.5, J0.7, and 10.9.
10.4
w.E
The inpu t filter for the flyback conve rter of Fig. 10.30 is desig ned using a s in gle l 1 C1 section. The filter
is damped us in g a resis tor Rf in series wi th a very large blocking capacito r C 6 •
(a) Sketc h a s mal l-signa l mode l of the fly back co nverte r. De rive express ions fo r Z,.,.(s) and 7.D(s)
u sing yo ur model. Sketch the mag nitude Bode ploL~of ZN and Zv, and label all salie nt feat ures.
(b)
asy
Design the inp ut filter, i.e., se lect the val ues of Lr CJ' and Rf , so tha t: (I) the filter allenua tio n at
the sw itching freq uency is at least 100 dB, and (ii) the magnit ude of the filler output impeda nce
Z,,( s) satisfies the co nditi ons II Z/j(J) ) II< 0 .3 11ZJJUW) II. II ZJj ro) II< 0 .31[ Z,ljw) II, for a ll fre -
(c)
quenc ies .
En
Use Spice si m ulations to verify that the filter des igned in pa rt (b) meets the specifica tions.
(d)
gin
Using Spice simu lations, plo t the converter control -to-ou lpLtt magni tude and phase responses
without the inpu t filter, and w ith the fil ter designed in part (b). Co m ment on the change s intro -
du ce d by th e fi lter.
10.5
eer
It is req ui red 10 design the inp u t filler for the boost co nve rter of Fig. 10.31 using a si ngle LrC f section.
The filler is da mpe d us in g a res isto r R1 in series wi th a very large blocking capacito r Cb.
(a)
(b)
Ske tc h Lhe magni tu de Bode p lo ts of 111
fea tures.
ing
U) and ZD(s ) for th e boost co n verte r, and label all sa lien t
Des ig n the inpu t filter, i.e., se lect the val ues of Lr CJ' and Rf , so that: (i) the filter au enua tion at
th e sw itch ing freque ncy is at least 80 dB, and (ii) the magnitude of th e filter ou tput impeda nce
.ne
ZJs ) sat isfies the condit ions II Z.,(iw) II < 0.211ZD(jm) II, II Z0 (j w) II< 0 .2 11Z/'/Uw) II, for all fre-
quenc ies.
(c)
(d)
Use Sp ice si mu lation s to ve r ify tha t the filt er de sig ned in part (b) meets the specifica tions.
Us ing Spice simul atio ns, plot the co nven er control-to -output ma gni tude and phase respo nses
witho ut the in pu t filler , an d w ith the filler des igned in pan (b). Comment on the changes in the
t
control- to- out put responses introdu ced by the filter.

10.6 Repeat the filter desi gn of Problem 10.4 us ing the op ti m um filter damp ing approac h described in Section
10.4.1.Find the values of Li' Ci' Rf' and C1,.
10.7 Repea t the fille r de sign of Probl em 10.5 using the op timu m filter damp in g approac h of Sec tion 10.4.1.
Find the values of L1, Cf' Rf' and C 0•
10.6 Repeat the filter design of Problem 10,4 using the op timu m RrL 1, parallel d amp ing approach desc 1ibed
in Section 10.4.2. Find the va lues of L1, l p Rf' and /,b,
10.9 Repeat the filler design of Prob lem 10.5 using the op ti mum Rr L0 para llel dampi ng approac h desc 1ibed
in Section 10.4.2. Find the va lues of Lr Cf' Rr and l~.

408 lnpw Filter Design
IO.IO It is required to design the input filter for the tlyback convener of Fig. 10.30using two filter sections.
Each filter section is damped using a resistor in series with a blocking capacitor.
(a) Design the input filter, i.e., select values of all circuit parameters, so that (i) the filter attenuation
at the switching frequency is at least 100 dB, and (ii) the magnitude of the filter output imped-
ance Z,,(~·) satisfies the conditions 11Z0 Uw) 11< 0,311 Zp(jw)11,11 < 0.311ZJJw) II, for all
Z,1(jw) 11
frequencies.
(b) Use Spice simulations to verify that the filter designed in part (a) meets the specific ations.
(c) Using Spice simu lat ions, plot the converter co ntrol-to-output ma gnitude and phase responses
witho ut the input filter, and with the filter designed in part (b). Comment on the changes intro-
duced by the filter.
ww
w.E
asy
En
gin
eer
ing
.ne
t

11
AC and DC Equivalent Circuit
Modeling of the Discontinuous
ww Conduction Mode
w.E
asy
En
gin
So far, we have derived eq uiva lent circuit mode ls for de-de pulse -wid th modula tion (PWM ) converters
opera ting in the continuous conduction mode. As illustrated in Fig. 11.1, the basic de convers ion prop -
eer
erty is modeled by an effect ive de transformer, hav ing a turns ratio equal to the conversion ratio M(D).
This model predicts th at the conve rter has a voltage -source out put charac teristic, such that the outpu t
ing
voltage is essent ially ind ependen t of the load cur rent or load resista nce R. We have also seen how to
refine thi s model , to predict losses and efficiency, converter dynamics, and smal l-signal ac transfer func -
tions. We found that the transfer funct ions of the buck conve rter co nt a in two low -frequen cy poles, owing
to the conve11er filter inducto r and capac itor. The control -to-output transfe r func tions of the boost and
.ne
buck -boost converters addit ionally contain a ri ght half -pl ane zero. Finally, we have seen how to ut ilize
these res ults in the design of co nverter contro l sys tems.
What are the basic de and small - signal ac equ ivalent circu its of conve rters operating in the dis-
con tinu ous conduct ion mode (DCM)? It was fou nd in Chapter 5 that , in DCM, the output voltage
becomes load -dependent: the conversio n rat io M(D , K) is a funct ion of the dimens ion less para meter t
K ==2LIRT,, which in tu rn is a func tion of the load resis tance R. So the conve rter no longer has a voltage -
source ou tp ut characteris tic, and hence the de tran sfo rmer mode l is less appropriate. In this cha pter, the
averaged sw itch modeling [1-8] approach is emp loyed, to deriv e equi valent c ircuit s of the DCM sw itch
network.
[n Section I I. I, it is shown that the lossjr ee resisror model [9-11] is the averaged switch model
of th e DCM sw itch network . This eq ui valent c ircuit represents the stea dy-state and large-signa l dynamic
character istics of the DCM sw itch network , in a clear and simple manner. In the discont inuou s conduc-
tion mode, the average transistor voltage and current obey Ohm ' s law, and hence the trans istor is mod-
ele d by an effec ti ve resistor R,. The averag e diode vo ltage and curren t obey a power source
character istic, with power equal to the power effect ively dissipa ted in R, . Therefore , the diode is modeled
with a dependent power source.

410 AC a,u/ DC Equi1,alent Circuit Modeling of the Disco11/

imtom Co11du
ctio11Mode
DC AC
I : M(D)
+ +
R V v(s) R
ww + +
DCM
w.E v, ? R V ? v(s) R
asy
Fig. 11,l The ohj ec \iv~ of this chap\er is the dcrivution or lurgc-sig nul de tmd small-signal uc equivale11t circuil
models for ~onvene rs op erating in the discontinu ous com.luction mode.
En
gin
Since most co nverte rs operate in disco ntinu ous co nduc ti on mode at some opera tin g points ,
small-signal ac DCM models are needed , to prove that the control systems of such converters are cor-
rect ly designe d. In Section 11.2, a sma ll -sign al mode l of the DCM s witch network is derive d by linea r-
eer
ization of the loss -free resistor mode l. The trans fer functions of DCM converters are qu ite different from
th e ir respect ive CCM transfer funct io ns. The bas ic DCM buck, boos t, and buck-boos t conve rters esse n-
t ia lly exhi bit si mp le single- pole tra nsfer functions [12, 13], in which the second pole and the RHP zero
ing
(in the case of boost and buck-boost converters) are at high frequencies. So the basic converters operat ing
in DCM are easy to contro l ; for th is reaso n, converters are sometimes purpose ly operated in DCM for all
loads. The tran sfe r functions of higher order converters suc h as the DCM Cuk or SEPIC are consi derab ly
.ne
more complica ted; bu t again , one pole is shifte d to high freq uency, where it has neg ligible practical
effec t. This chapter conc ludes , in Sect ion 11.3, with a discussion of a more detailed ana lys i s used to pre-
t
dict high -frequency dynamics of DCM converters. The more detailed anal ysis pred icts that the high-fre-
que ncy pole of DCM converte rs occurs at fre qu encies near or exceeding the switching frequency [2-6].
The RHP zero, in the case of DCM buck -boost and boost co nverte rs, also occurs at h igh freq uencies.
This is why , in pract ice , the high -freque ncy dy namic s can usu ally be neglected in DCM.
11.1 DCM AVERAGED SWITCH MODEL
Cons ider the buck -boos t conve rter of Fig. 11.2. Let us follow the average d sw itch mode ling approac h of
Section 7.4, to der ive an equi va le nt ci rcu it tha t mode ls the averaged term in a l waveforms of the switc h
network . The genera l two -swi tch network and its te rm inalqua nt ities 11 1(/) , i 1(1), v2 (1), and i 2 lr) are defi ned
as illustrated in Fig. 11.2, co nsisten t with Fig. 7.39(a). Th e indu ctor and switch network voltage and cur -
ren t waveforms are illu stra ted in Fig. 11.3, for DCM opera tio n.
The inductor c urr en t is equal to zero at the beg inn ing of each switc h ing period. Dur in g th e first
su bin terval , while the trans istor co nducts, the inductor current inc reases with a slope of vil)IL. At the

I I . I DCM Averaged Swit ch Mod el 411
Switch network
i, i2
+
+
+
v, I- V2
v, + C R V
+
vl L
ww i1,
w.E
F'ig. 11.2 Duck-boost convener example, with swi1ch ne1work terminal qua111i1
ics idcntiticd.
end of the firs t su bin te rval, the ind uc torcu rren t i 1_(1
) att a ins the peak va lue give n by
asy ( 11.l)
En
During the second sub inte r val, wh ile the dio de con du cts, the in ductor curr e nt decreases with a slope
equal to v(t)/L. Th e second subinterval ends when th e di ode becomes reverse -biased , at time
indu ctor voltage is zero du rin g the thi rd su bin terva l.

gin
f a:::(d 1 + d2 )T,. The indu ctor current then re ma ins at zero for the ba lance of the sw itch ing period . The
A DCM average d switch model ca n be der ived wit h refere nce to the waveforms of Fig. I 1.3.
eer
Fo llowing the approach of Section 7.4.2, let us find the average values of the switch network term inal
waveforms 111(r), vi t), i 1(t), and i2(t) in terms of the converter state variab les (ind uctor curr ents and
ing
capaci tor voltages) , the inp ut voltage v/ t), and the subinte r va l lengths d 1 and d 2•
The average switch network input voltage {vt{/))~, or the average transistor voltage , is found by
averag ing the v 1(t) waveform of Fig . 11.3: ·'
.ne
( 11.2)
Use of the identity d,(t} = L - d 1(r)- di(t) yiel ds

(11.3 )
t
Simi lar ana lysis leads to the fo llowing exp ression for the avera ge diode voltage:
(v2(t))r, = d 1(1)
((vil))7 , - (v(l))1 , ) + d.( t)· O+ dit) (-{vU)}r,) ( 11.4)
= d 1(1)
(vit))1 ,-{t -d 2(1))(v(r)}r,
The ave rage swi tch netwo rk input c urr ent (i 1(t))r, is found by integra ti ng the i 1(t) waveform of Fig. 11.3
over one switc hi ng period:

412 AC and DC Equi11a/ent Circuit Modeling of the Disco111inu

o11JConduction Mode
( 11.5)
The integra l q 1 is equal to th e area under the 11(t) wave -

form du rin g the firs t sub interva l. This area is easily eval-
uated usin g the triangle area formu la:
VL(t) (l 1.6)
vg
ww 0
Sub stitut ion of Eqs. ( 11. 1) and ( 11.6) into Eq. ( 11.5)
gives:
i1(t)
w.E V d;(r) 1', ( (
( 1,. ( I )) T ,"' 2L l)
v8 t r,
( 11.7)
asy
ipk
Note tha t (i 1(t))r, is not equ al to d 1{iL(l))r, Since
inductor current ripple is not small, it is necessary
sketch the actua l input cu rren t wavefo rm, inclu di ng
the
to
th e
En large switc hing ripple, and the n correctly co mpu te

average as in Eqs. ( 11.5) to (1 1.7).
The average diode curre nt (iit)) T.,is found in a m anner
the
gin
simil ar to that used above for (i 1(t))r,:
0
eer ( 11.8)
ing
TI1e in tegra l </2 is eq ual to the area under th e ii(r) wave -
form dur in g the seco nd sub int erval. Th is area is eva lu-
ated us ing the tr iang le area formula :
.ne
(i2(t)) 7, (11.9)
t
··--·-----------·- -
Sub stitution of Eqs. (I I.I ) and (1 1.9) into Eq. (1 1.8)

leads to :
(11.10)
& iuations ( 11.3), ( 11.4) , ( 11.7) and (1 1.10) co nst itut e

the average d termi nal equations of the sw itch network in
the DCM buck-boost converter. In these equa tions , it
rema ins to express the su b interva l length di_in terms of
the swi tch dut y cycle d 1 = d, and the co nverter avera ged
Fig. 11,3 Inductor and switch network
waveforms . One appro ach to find ing th e sub interv a l
voflage and cur rent waveforms .
len gth d 2 is by solv in g the inductor curren t waveform . In
the buck -boost converte r, the diode switches off when
the indu ctor c urrent reaches zero, at the end of the sec-

II. I DCMAveraged Switch Model 413
ond su binter va l. As a resu lt, il(T, .) = 1'i(O)= 0. There is no net change in inductor current over one com -
plete switching period , and no net volt -seconds are appli ed to the in ductor over any comp lete sw itchin g
period tha t starts at the tim e when the trans istor is turned on. Therefore, the average ind uctor voltage
compu ted over this period is zero,
(11.11)
even when the converter is not in equili br ium. This equa tion can be used to find the length of the second
subinter val:
ww d,(l)=-d,
(v/1))r
(1) -(
v(t)
) '
r
'
(11.12)
w.E
Substitution of Eq. (I 1. 12) into Eqs. (11.3 ), (1 1.4), (1 1.7) and ( II. 10), allows us to obtai n simple expres -
sions for the averaged termina l wavefor ms of the sw itch network in the disco ntinuou s conduction mode:
asy (11.13)
En
( 11.14)
,l~(t)T, ( ( l)
( I.i(I) ) r_,= ------rL v, r r,.
gin ( 11.15)
{i (1)) = d f(t) T,
• r, 2L
(vi(t))
~,
(v,(t)) eer ( 11.16)
ing
T,
Let us next construct an equivalent circu it corresponding to the averaged switch netwo rk equatio ns
( I I. 15) and ( 11.16). The switch network inpu t port is modeled by Eq. ( 11.15) . This equation states tha t
.ne
the avera ge input current (i 1(!))r, is proportiona l to the applie d input voltage (v 1(t))r,. In other words, the
low -frequency compone nts of the sw itch network input port obey Ohm 's law:
(11.17)
t
where the effec tive resis tance R.,is
(11. 18)
An equivale nt circui t is illu strated in Fig . 11.4. Dur ing the first sub interval , the slope of the input current
waveform i 1(1) is proportional to the input voltage (v/ t))r, = (v 1(t)),;, as illustrate d in Fig. 11.3 . As a
result, the peak curre nt ipk• the total charge qi' and the average inpu t current (i 1(t)\, are also propor tiona l
(tJ\,..
to (v 1 Of course, there is no physical resistor inside the converter. Indeed, if the converte r elements
are ideal, then no heat is generated inside the conver ter. Rather, the power apparen tly consumed by R, is
transferred to the switch network outpu t port.

414 AC and DC Eq11i

vale11ICircuit Modeling of the Disco111i1111
ous Co11d
11ct
ion Mode
+
Fig, 11.4 Equivalent circllit that models the
uverage waveforms of the switch input (transistor)
port.
The swi tch netwo rk output (diode ) port is mode led by Eq. ( 11.16 ), or
ww (11.19)
w.E
Note th at (v 1(t))\IR, is the average power (p(t)>.,_; apparentl y consume d by the effect ive res istor R,(d1).
Equation (1 1.19) states that this power flows out of the swi tch network output port. So the sw itch net-
asy
work consumes no net power- its avera ge input and outp ut powers are equa l.
fa1uat ion (11. 19) can also be der ived by co nsidera ti on of the ind uc tor stored energy. Durin g the
first sub in terval, the inductor curr en t increases from O to i1,,. In the process, the in ductor stores the fol-
lowi ng energy:
En
gin (11.20 )
eer
Here, i1, , has been ex pressed in terms of(v 1(t)\ using Eqs. ( I I. I) and (11.13) . Thi s energy is transferred
from the source vR,through the sw itc h networ k input terminal s (i.e., throu gh the transisto r), to the ind uc-
tor. During the second sub inte rva l, the inductor releases all of its stored ener gy through the sw itc h net-
ing
work ou tput term inals (i.e., through the d iode), to the outp ut. The average output power can the refo re be
exp ressed as the energy transfe rred per cycle, divided by the switch ing per iod:
.ne
(11.21)
Thi s power is transfe rred to the load, and hence

t
(11 .22)
Th is result co incides with Eq. ( 11.19).

The average power (p (t))r. is indepe nden t of the load charac terist ics, an d is de te rmin ed sole ly
by the effect ive res istan ce R, and the app lied switch netwo rk inpu t termina l voltage or cu rr ent. In othe r
words, the switc h network out pu t port behaves as a sou rce of power, equa l to the power appare nt ly con -
sumed by the effect ive res istance R,. Thi s behavior is represe nted schemat ically by the depe ndent power
source sy mbo l illu strated in Fig. 11.5. In any lossless two -port netwo rk, when the voltage and c urr ent at
one port are indepe ndent of the charac teristics of the ext erna l netwo rk con nec ted to the second port , then
the second port mu st e xhibit a depend e nt power source characteri stic ( 10]. Th is sit uation arises in a num -

I I . I DCM A veraged S witch Model 415
i(r)
(a) (b)
v(t)i (t) = p (t)
i(t)
+
p( t) v( t) v(l)
ww \
w.E
Fig. 11.S The dependent power source: (a) schematic symbol, (h) i- v characteristic.
he r of co mm on powe r-process ing app lication s, inclu din g switch networks ope rating in the di scont i nuous
co nduction mode.
asy
The powe r source charac teri stic illus tra ted in Fig. l l.5(b) is symmetrica l wit h respect to voltage
and curr ent ; in conseq uence , the powe r source exh ibi ts seve ral unique prope rties. Sim ilar to the vol tage
En
so urce , the idea.I power source must not be short -circu ited; othe rwise, inf inite curr e nt occur s. And simila r
to the current source , the ideal power so urce mu st not be open -circ uited, to avoid infini te termin al volt -
gin
age . Th e power source mu st be connected to a load capab le of absorb ing the power p( t), and the operat-
ing poi nt is defined by the intersect ion of the load and power source i-v charac terist ics .
As illu strate d in Fig. I l.6(a), se1ies- and para llel-co nnected power sour ces ca n be combine d
(a)
eer
ing
.ne
t
p[
(b) n1: n2
..-----, ,----
I •
Fig. 11.6 Circuit manipulations nf power source elements: (a) combination of series- and parallel- connected
power sources into a sing le equivalent power source, (b) invarinnc~ of the power S(Jurc
c 10rc !lcction thro t,gh an ideal
transformer of arbitrary 1U1ns ratio.

416 AC and DC Equi,,alent Circuit Modeling of the Disconti11uomCo11du

ctio11Mode
(a)
i 1(t) ,·················-············, i2(1)
+ + +
·.................................:
ww
Fig. l.1.7 (a) the general two-sw itch ne twork, and (b) the corre sponding averaged switch mude l in the discQlllinu-
ous conduction mode: the average transisrnr waveforms obey Oh m's law, while the average diode waveforms hchave
n, u dependent power source.
w.E
into a sing le power sou rce, equ al to th e su m of the powers of the indiv idua l sources. Fig. I l. 6(b) illus -
trates how reflection of a power sou rce through a tr ansfo rm er , having an arb itrary turns rati o, leaves the
power source un changed. Powe r sou rces are also invariant to duality tran sformations .
asy
The averaged large -signal model of the genera l two -sw itch network in DCM is illus tra ted in
Fig. l l. 7(b). The input port behaves effective ly as resis tan ce R,. The instantaneous power ap p a ren t ly
co nsume d by Re is transferred to th e ou tput port , an d the ou tpu t po rt be have s as a dependent power
En
sou rce. Th is loss less two -port network is ca lled the loss-fr ee resistor model (LFR ) [9]. The loss -free
resistor represents the basic power co nve rsion propert ies of DCM swi tch networks [I l]. lt can be shown
boos t conve rter , but also in other PW M converte rs.

gin
th at the loss -free resistor models the averaged properties of DCM sw itch networks not on ly in th e buck -
When the switc h network of th e DCM bu c k-boost conve rter is replace d by the ave raged model
eer
of Fig . I l .7(b) , the converte r equivalen t circui t of Fig. 11.8 is obtained . Upon sett ing all averaged wave -
forms to thei r quiescen t values , and lett ing the indu cto r and capac itor become a short -ci rcuit and an
open -ci rcuit, respective ly, we obta in the de model of Fig. 11.9.
ing
Systems containing power sources or loss-free res istors can usually be eas ily solve d, by equat -
in g average sou rce and load powers . For example , in th e de network of Fig. 11.9, the power flow ing into
.ne
the converter inp ut termi na ls is
yl
p,, _ , ( I l.23)
(i1(t)) T .
R,
(p(t) )r
(i2(t)) T
. t
+ ...---.......
s
+
(v.<0)
7 J
R,(d) (v2U))
7
I
(v,U))r + + C R (v(r))
7 .,
'
L
Fig. I LR Repla cc merit of the switc h netwo[·k of the DCM buck-boost converter with the !n.ss-frec resistor model.

11.1 DCM Averaged Switch Model 417
+
Fig. 11.9 De network example containing
a loss-free resistor model. R V
ww
The powe r flow in g in to the load resis tor is
(I l. 24)
w.E
The loss -free res istor model states th at these tw o powers mu st be equal:
v; v2
asy
( 11.25)
P = - =-
R, R
Solu tio n fo r the voltage conve rsion ra tio M = V/\18 y iel d s
vv_ -± EJf n1f< (11.26)
gin
g
Eq uat ion ( 11.26) is a ge neral result , valid for any converter tha t can be modeled by a loss -free resis tor
and that drives a resis tive load. Other arguments mu st be used to determine the polarity of V/Vg. In th e
stea d y-state value of R. is eer

buck-boost converter show n in Fig. 11.2, the diode polari ty indica tes that VIV 11 mu st be negat ive. l11e
R,(D) = 0 2!:,
' ing (11.27)
.ne
where Di s the qui esce nt tra ns istor dut y cy cl e . Su bstit ution of Eq. ( 11.27) into ( 11.26) leads to
w ith K ==2/,/f?T,. Th is equat ion coincides with the prev ious steady -state resu lt given in T ab le 5.2.
( l l.28)
t
Similar argumen ts app ly whe n th e waveforms contain ac components. For examp le, cons ider
the network of Fig. 11. 10, in wh ich the voltages and curren ts are per iodic func tions of time . The rms val -
i,(t) i2(t)
+
Fig. 11.10 Ac network example
~nntaiuing a loss -free rc:sistor ml,dl'I. v,(t) R,
-
p(t)
C R v(t)

418 AC a11dDC Eq11iva/e111

Circuit Modeling oft/re Di.1co111i111wu
s Co11d
11
c1io11
Mode
ues of the wavefo rms can be dete rmin ed by si mply equating the average source and load powers. The
average power flowing into the converte r input port is
p =-
v2
_g,mJ,t (11.29)
ctv Rt
where Pavis the average powe r consumed by the effect ive resistance R,,, o average powe r is consumed
by capacitor C, and hence the average power P"', mu st flow ent irely int o the load resis tor R:
p = V!,.
, ( 1130)
ww pon equating Eqs. ( 11.29) and ( 11.30), we obtain

(fl!' R
w.E (11.31 )
asy
Thus, therms termi nal voltages obey the same relation ship as in th e de case.
Averaged eq ui valen t circu it s of the DCM buck, boost, and buck -boos t con verters , as we ll as the
DCM Cuk and SEPIC converters , are listed in Fig. 11, 11. In eac h case , the averaged transistor wave -
En
forms obey Ohm ' s law, and are modeled by an effec ti ve resistance R,,· The averaged diode waveform s
follow a power source charac ter istic , equa l to the powe r effect ively dissipate d in !?,.. For the buck , boost,
and buck-boost convert ers , R, is give n by
gin (lt.32 )
For the Cuk and SEPIC converters , R,. is given by

eer
ing (11.33 )
.ne
Here, dis the tran sistor du ty cycle.

Steady -state condit ions in the conve rters of Fig. I 1. 1 I are fo und by lettin g the indu ctors and
capac itors become sho rt-c ircuits and open -circu it s, respect ively, and then so lvin g the resu ltin g de circuits
with d(r) = D. The buck-boos t, Cuk, and SEPIC then reduce to the circu it of Fig. 11.9. The buck and
boost converters reduce to the ci rcui ts of Fig. 11.12. Equilibrium co nversion ratios M = VN 11 of these
conver ters are summarized in Table 11. 1, as functio ns of R,.(D). It can be show n tha t these co nverters
t
opera te in the d iscon tinu ous conduc tion mode whenever the load cu rrent/ is less than the crit ical curre nt
/m,,:
1 > I er,,for CCM (11.34)

1 < I er /I for DCM
For a ll of these converters, le,;, is given by
(11.35)

I/ .I DCM A ,,eraged Switch Model 419
B11ck
R.(d) L
+
(p(t~ C R
·'
ww Boost
w.E
B11ck-boost asy
En +
gin
R,(d)
eer
C11k ing
.ne
t
SEl'IC
Fig. 11.11 Averaged large -sign al equ ivale11tcircuit s ot five ba sic conveners up ~rating in the disconlinuous con .
duction mode.

420 AC and DC Eq11iva/entCircuitModeling of the Disco11t

i11u
o11sCo11du
ctio11Mode
(a)
+
p
R V
ww
(b)
-----.---- -. --
---- +
w.E v, R,(D) R V
Fig. I 1.12
asy
De equ ivalent circui ts represe nting the buck (a) and boost (b) converters operati ng in DCM .
En
gin
Table 11.1 CCM and DCM <:onversionratios of hasic conv~11ers
Converter M,CCM M, DCM
Buck D
eer 1 +JI +4 R) R
Boost l
1-D
ing
I + .j_l +4 RIR,
2
- D
-If.
.ne
Buck-boost , Cuk
l-D
SEPIC D
1-D ff,
t
11.2 SMALL-SIGNAL AC MODELING OF THE DCM SWITCH NETWORK
Th e next step is cons truction of a sma ll-signal equival ent <:ircuit model for converters operat ing in the
disco ntinu ous conduction mod e. In the large -signa l ac equi vale nt circu.its of Fig . 11.11, the av eraged
sw itch network s are nonlinear. Hence , cons truction of a small -sig n al ac model involves perturbat ion and
lin eari zatio n of the loss-free resis tor net work . The signa ls in the large-s ign al averaged DCM switc h net -
work model of Fig. I I .13(a) are perturbed about a quiesce nt opera ting point, as follows :

11.2 Small-Sig11alAC Modeling of the DCM Switch Network 421
(a) (i1(t))r (ii(t )) T

l
•
+ (p(t))T +
--------....
'
{v.(t)) T (vi(t))r I
I Re<
d)
l
ww
(b)
;.
d(t )
..
+
,,.
w.E '2
+
'•
asy g,v2 Ki 1 ji '2 v2
En
gin
Fig. 11.13 Averaged models of the genciral two- switc h netwo rk in a converter ope rating in DC M : (a) large-signal
model, (b) small-signal model,
d(t} := /) +d(I)
eer
ing
(y1(1))r, := v 1 + 01(!)
(i,(l))r, = 11+ 11(1) (1 1.36)
.ne
{v2(t))r , = V2 + v2(t)
(i 2(1))1· = l2 + j i(I)
'
Here , Di s the quies ce nt val ue of the tr,msisto rdut y cycle, V1 is the qu iescent val ue of the app lied average
tra nsistor voltage (v1(t)),:., etc. The quantities tl(t), i\( t), etc. , are small ac var iation s about the respective
qu iescen t va lues. It is des ired to linear ize the average swi tch netwo rk term ina l e-quation s ( 11.15) and
t
( 11.16).
Equations (I 1.15) and ( 11.16) express the average terminal currents (i 1(t) )i:; and (i2(t)),, as func -
tions of the trans istor duty cycle d(t) = d 1(r ) and the average termi nal voltages (v 1(t))r, and (v2(t) )-r.· Upon
perturb ation and linearization of these equatio ns, we will therefore find that i 1(t) and t2(t) are expressed
v v
as linea r functio ns of d(t), 1(1), and 2{1). So the small-signal switch network equations can be written in
the follow ing form:
(I 1.37)
These eq uations describe the two -port equi vale nt circu it of Fig. l l.1 3(b).

422 AC and DC Eq11i

vale11fCirrnit Modeling of the Disco11ti11u
or1sConduction Mode
The param ete rs r 1• }p and b't ca n be found by Taylor expans ion of Eq. ( 11. 15), as desc rib ed in
Section 7.2.7. The average tran sistor current <i1(1)),,, Eq. ( 11. 15), can be expressed in the fol lowing form :
(l 1.38)
Let us ex pand th is expressio n in a three -dimensio nal Tay lor series , about the quies cent operat in g point
(Vi, V2,D ):
ww
w.E (11.3 9 )
asy + highcr--0rdcr nor1linear tcrn1s
En
For simp licity of notation , the angle brackets de noti ng average valu es are drop ped in the above equ a tio n.
The de terms on both sides of Eq. ( 11.39) mu st be equal:
gin ( I 1.40)
eer
As usual , we linear ize the equatio n by discarding the highe r-order non li near term s. The re m ain in g firs t-
orde r linea r ac terms on both side s ofEq. (11.39) are equ ate d :
ing (11.41)
where
.ne
(1 1.42)
t
( 11.43)
__ ~ ~R,.(dJ I
v,. v i , ,1)I
. _ a1,(
Jr- ~ d=D - R;(D) rlcl d=D (I l .44 )
2v1
= VR,.W)
Thu s, the small -sig na l input resis tance r 1 is equal to the effective resistance R,,, ev a luat ed at the qu iescen t
operati ng point. This term describes how variatio ns in (v 1(1)), ., aff ect (i 1(1)).,_,, via R.,(IJ).The small -signal

11.2 Small-Signal AC Modeling of the DCM Switch Network 423
paramete r g 1 is equal to zero, since the avera ge tran sistor curre nt (i 1(1)),, is independent of the average
diode voltage (vi(t)\, The small-signal gain ) 1 describes how duty cycle variations, which affect the
va lue of R.(d), lead to variatio ns in (i 1(1)\.
In a s imi lar mann er, (i2(t))r, fron;' Eq. ( 11.16) can be expre ssed as
(11.45 )
ww
Expans ion of the functionf 2(v 1, v2, d) in a thr ee -di mensional Taylo r series about the qui escent operatin g
point leads to
w.E
asy
(11.46)
En
+ higher--<Jrdernonlinear terms
gin
By equatin g the de terms on both sides of Eq. ( 11.46), we obtain
eer
(11.47)
The higher-order nonlinear terms are discarded , leavi ng the followin g first-order linear ac term s:
ing (11.48 )
.ne
with
_l _
r, -
(11.49)
t
( 11.50)
(11.51)
The output resistance r2 desc ribes how variation s in (vi(I)\ in fluence (i 2 (t)\, . As illustrat ed in Fig. 11.14,

424 AC and DC Eq11ival

e11ICircuit Modeling of t/1e Discontinuous Co11
d11
ctio11Mode
Power source
characteristic
Load
Fig. 11.14 Tl1e small -:;ignal output , csistance characte ristic
r2 is determined by tfle slope of tr,e power l
source charac tcriscic ar chc quiescent operating R
point.
ww
w.E (vi(t))r
'
Table 11.2
Swiech network K1 asy

Small -signal DCM switch mode l parameters
jl r, K2 h r2
General
two-s witch, 0 ~ En R, 2 2V 1
M 2R,
gin
DR, M R, DMR,
Fig. l l.7(a)
Buck, ..L 2(1- M)VI 2- M 2{1-M)V 1

R, M 1R,
Fig. l l.1 6{a)
Boost,
R,
1
DR,
2MV 1 (M- l)2 R eer

M R,
2M - I
DMR.
2V1
ing
Fig. l l.16 (b) M2 , (M - 1)2R,
(M -1 ) 2 R, D(M - l)R, (M - 1) 2 R, D(M -l )R,
.ne
r 2 is determine d by the slope of the power source characteristi c, ev aluat ed at the qu iesce nt operat ing
po int. For a linea r resis tive load , r 2 = R. For any type of load , it is true th at r 2 = M1R.,(D). The param e te rs
) 2 and g2 descri be how varia tions in the dut y cycle d(t) and in the average tra nsisto r voltage (v1(I)):,;
(wh ich influence the average power (p(r) \) lead to va riatio ns in the ave rage diode curr ent (i2(t)), ,. Value~
of the small -signal parameters in the DCM swi tch model of Fig . I l.13( b) are summ ar ized in the top row t
of Tab le 11.2.
A small -signa l model of the DCM buck -boost converte r is obtained by repl acing the transistor
and diode of th e converte r w ith the switch model o f Fig. 1 I. I 3(b) . The res ul t is illu strated in Fig. I 1.15.
This equ iva lent c ircuit ca n now be solved us in g co nvent iona l li near c ircu it a nalysis techn iques , to de ter-
mine the transfe r functions and othe r small-signal quan tities of interest.
The same small -signa l sw itch mode l can be emp loyed to model other DCM conve rters, by sim-
ply repla cing the transis tor and diode with por ts I and 2, respect ive ly, of the two-port mode l of
Fig. 11. I 3(b). An alternative appro ach , wh ic h yield s more co nve nient res ult s in th e a na lysi s of the bu ck
and boost converters , is to de fin e the sw itch networ k as illu stra ted in Figs . I l.16 (a) and I l.l 6(b), respec-
tive ly. The se switch network s can also be modeled us ing the two -port small-sign al equ ivalent circui t of
Fig. I l.16 (c) ; however , new exp ressio ns for the parameters rp} 1, x 1, etc ., must be de rived . These expres -
sions are aga in fo un d by linear iz ing the eq uat ions of the avera ged sw itch network termi na l cu rr ent s.

I 1.2 Small-Signal AC Modeling of the DCM Switch Network 425
SwiJchnetwork small-signal ac model

j2
+
r2 il2
+
.
v -+ + C R i)
ww
l
w.E
Fig. 11. 15 Small-signa l ac model of the DCM buck-boost converter obtained by insertion of the switch network
two-port small-signal model into the original converter circuit.
(a)
a
T sy
(b)
+
1·· ·· ····-·· ·· ··· · ······· ·· ···· ·· · · ·-· ! 12(1)
+
En 1
i
!vz(t)
gin :....................................... :
l: -
(c)
eer
+
ing +
.ne
Fig. 11.16 A convenient way to model the switch uetworks of DCM buck and boost converters: (a) de fined termi-
t
nal quantities of the DCM buck switch network, (b) defined termina l quan tities of the boost switch network, (c) two-
port small-signal ac model. The model parameters are given in Table 11.2.
Table 11.2 lists the small-signal parameter s for the buck sw itch network of Fig. l l. I 6(a) (midd le row)
and for the boost switch netwo rk of Fig . 11. 16(b) (botto m row ). In serti on of the sm all -sig n al two -port
model into the DCM buck and boost convert ers leads to the e<1uivalent circ uits of Fig. 11. I7.
The small - sig nal equivalent circuit model s of Fig. 1 I. 15 and Fig. 11. 17 co ntain two dynam ic
elements: capacitor C and inductor L Control -to-output transfer fun ctions obtained by solving these
eq uiv a lent circuit models have two poles. It has been shown [2-6] that one of the poles , d ue to the capac -
itor C, appears at a low freque ncy, w hil e the other pole (and a RHP zero in the case of boost and buck -

426 AC and DC Equi11a/ent Cirmit Modeling of the Discontin11011s

Conduction Mode
(a) DCM buck swik h network ,mall -signal ac modtl

i, i2 L ;,
+ + +
vt v, ,, g,v2 '2 02 C R i)
ww R
+
w.E
asy
Fig. 11.17 Snmll -~igna l ac motld s of (a) the DCM buck c,lJlverter, and (h) the DCM boost con ve rter, obtained by
replacing the swi tch netw orks defined i11Fig . 11. 16(a) and (b) wit h the sma ll-sigmll switc h mode l o f Fig. I l . I 6(c) .
En
boost converters) due to the inductor L, occurs at much higher frequency , close to the converter switching
gin
frequency. Therefore, in pract ice, the DCM buck, boost, an d buck-boost converte rs exhibit esse ntially
single-pole transfe r fu nctio ns, wh ich are ne glig ibl y influ enced by the induc tor d y nam ics.
The small -sig nal equiva lent c ircuit models have been deri ve d in th is sec tion from the large -sig -
eer
na l averaged sw itch networ k equa ti ons ( 11.15) and (11.16). These equa tions are based on Eq. (l 1.11 ),
which states that the average inducto r voltage , an d therefore its small -s igna l ac voltage, is zero. This con -
trad icts predictions of the resu ltin g small -sig na l models in Figs. l l .15 and l l. l 7. As a result , we expect
ing
tha t the models deri ved in this section can be used to predict low -frequency dynamics, while predictions
of the high -frequency dynamics due to the inductor Lare of questiona ble valid ity. Equiva lent ci rcu it
models that give more accurate predictions of h igh -fre qu ency dy nami cs of DCM conve rters are dis-
cussed in Section l l .3.
.ne
A simp le approx imat e way to determine the low -frequen cy small - sig nal transfe r fun ctio ns of
the buc k, boost, and buck -boost converters is to let the indu cta nce L tend to zero. If L is sho rted in the
equiva lent c ir cu its of Figs. l l.15 and 11.17, the model in a ll three cases reduces to Fig. 11.18. This cir-
DCM swilch networksmall-signalac 11Wdel

t
C R v
Fig. 11.18 !..ow-frequency ac mode l obtained by letting L approach ze ro, T he buck, boost, or buck-boost convert-
ers can be modeled . by employing the approp riate parnnwer s from T[,ble 11.2.

11.2 Small-Signal AC Modelin g of the DCM Swire/, Network 427
cuit is relative ly easy to solve.

The contro l-to-outp ut transfer function GvJ..
s) is foun d by let tin g v,,= 0 in Fig . 11. 18. Solut ion
for v then lead~ to
(1 1.52)
with
ww G.u=iz(Riirz}
(l) =--'-
,, (miri)c
(1 1.53)
w.E
The line-to-output transfer func tion C,/I) is found by letting d = 0 in Fig. I 1.18. One then obtains
asy G (.,·) =-C· 1

'~ vK ,/.O
=-l C,,
-~-
+ L
(l.lp
(11.54)
wi th
En (11.55)
gin
Exp ress ions for G,io, 0 80 , and u>Pare listed in Table 11.3, for the DCM buck , boost , and buck -boos t con-
eer
verters with res istive loads [ 12,13].
The ac modeling approach described in thi s sect ion is both general and use ful. The transisto r
and diode ofa DCM converter can be simpl y rep laced by th e two-port network of Fig . I l.13(b), leading
to the sma ll-signa l ac model. Alternative ly, the sw itc h network can be defi ned as in Fig. 1 I. I 6(a) or
I 1.16(b), and then modeled by the same two -port network , Fig. II . 16(c). The small-signal converte r
ing
model can then be solved via conven tiona l circu it ana lysis tec hn iques , to obta in the sma ll-s igna l tra nsfe r
functio ns of the co nverter.
.ne
Table 11.3 Salient features of DCM converter small-signal transfe r functions

Converter GcfJ G,o (l)p t
Buck 2V 1- M M 2-M
02 - M (l - M )RC
Boost 2V M -1 M 2M-1
D2M- l (M - l )RC
Buck-boost V M 2
75 RC

428 AC and DC Eq11

i11
ale11tCircuit Modeling of tl,e Disco11tin11011s
Cond11
ctio11Mode
11.2.1 Example: Control-to-Output Frequency Response

of a DCM Boost Comerter
As a simpl e numer ical example, let us find the sma ll-sig nal co ntrol -to -output transfer function ofa DCM
boost co nverter hav ing the fo llowi ng element and parameter va lues:
R= 12!1
L =5µH (l [.56 )
C =4 70 µF
ww f,. = l 00 kHz
The output vo ltage is regulated to be V = 36 V. It is desired to dete rmin e Gw/s) at the operating po int
w.E
where the load current is I= 3 A and the de inpu t vol tage is V8 = 24 V.
The effect ive resista nce R,(D ) is found by so lution of the de equivalent circu it of Fig. 1 l.1 2(b ).
Since the load current / and the input and o utput vo ltages Vand VR are kn ow n, the power sou rce va lue P
asy
is
r= 1(v-v~)= (3 A)(36V-24 v) = 36 w (! 1.57)
The effec tive resistance is therefore

En
gin (11.58)
The steady -state du ty cycle D can now be found using Eq. ( 11.32):
~
=v~('j~ eer
ing
( 11.59)
D=:V R,T, (16Q) (IO µs) ac0,25
The expressio ns given in Tab le 1 l.3 for G,10and WP of the boost converter ca n now be e val ua ted :
.ne
( (36 V) _ i)
G = 2V .M..=.l.=2 0 6 Vl (l 4 V)
'°D 2M - I (0,2'j) ( (36 V)
-
2 (24 VJ- l
)
( 2 (36 Y ) _
= 72 V =>37 dBV
l)
(l 1.60) t
f, _ wP_ 2M-l "' <24 V) --=112Hz

•P- 2n- 211(M- l)RC {{36 V) )
2n {24 V) - I (12 Q ) (470 µF)
A Bode dia gra m of the con tro l-to -output tran s fer function is co nstructe d in Fig. 11.19 . The so lid lines
illustrate the magnitud e and phase pred icted by the approx imate single -pole model of Fig . 11.18. The
dashed lines are the predic tions of the more acc ura te mod el discussed in Section 11.3, which inclu de a
second pole at / 2 = 64 kHz and a RHP zero at/,= 127 kHz, arising from the inductor dy namics . Since the
sw itch ing frequency is 100 kH z, the accur acy of the mode l at these frequencies canno t be guara nteed.
Nonetheless , in practice, the la gg ing ph ase asymptotes ar ising from the induc tor dynamics can be

11.2 Small-Signal AC Modeling of the DCM Switch Network 429
60 dBV
IIGvdII L. G.,,,
40 dBV Gd/J~37dBV
IIGvdll
20 dBV
OdBV
o·
ww -20 dBV o·
-40dBV ------..,,,,.,-----4 -90"

············~...•..........
....
w.E ---------------------+ - 270'

- 1so·
asy
IO Hz IOOHz I kHz
I
JOkHz IOOkHz
En
l<'ig. 11.19 Magnitude and phase of the control-ro-ourputtransfer function, DCM boost example. Solid lines: func.
tion and its asymptotes. approximate ~ing\e-pole response:predicted by the model of Fig. I I. 18. Dashed lines: more
accurate response that include s high-frequency inductor dynamics .
observed beginning at f 2 /IO = 6.4 kH z. gin

11.2.2 Example: Control-to-Output Frequency Responses
eer
of a CCM/DCM SEPIC
ing
.ne
As ano ther example, conside r th e SEPIC of Fig. 11.20. Accordi ng to Eq . ( 11.34), this converter operates
in CCM if
where R.(D) is given by Eq. (11.33). Upon neglecting losses in the converter, one finds that the CCM
( 11.61)
t
conve rsion ratio is
(11.62)
Wh en Eqs. (I 1.33) and (11.62) are substituted into Eq. (I 1.61), the condit ion for operat ion in CCM
becomes :
( 11.63)
The converter contro l-to-output frequency responses are generated using Spice ac simulations . Detai ls of

430 AC and DC Eq11

i11ale11/
CirrnirModeling of the Disco11ri1111
011
s Co11d
11cr
io11Mode
(a)
C 1 47µF D1
Li +
vs lOOµH C2
+
~ 200µF
R V
120V ill Q, Rl2

load
ww D=0.4
f, = IOOkHz
0.02.Q
w.E
Fig. 11.20 SEPIC ex.amp le.
II Gvdll
asy
80d BV
60d BV
R = 40Q .)\
;.
H
LG...i
40 dBV
En
t----_-_-_-_-_----·-· - \ !\
IIGvdII \ i \
;/ \.
gin
y '
20dB V
l ""'- '-._
R=4 0Q "'-,
eer"-~
OdBV
,'\
o·
i ii
- 20d BV I
ing
_90·
I
-40 dBV '!
\ ii
'-' '-··--··- ····-··-- ........~~,. - tso·
.ne
t
+---- --+ -- --------< ,--- ---+ -270'
5 Hz 50 Hz 500 Hz 5 kHz 50 kHz
f
Fig. 11.21 Magnitude a11dphase of !he contm l-to-nlttput transfer flmction obtai ned by simul:ition of the SEPIC
crnmple .shown in Fig. l l .20 , for two va lues o f the lnad n:sistance : R = .~O!l when the co nvener operates in DCM
(solid lines), and R = 40Q for whi<.:hthe converter operate ~ in CCM (dashed l ines).
the simu lation se tup are describe d in A pp e ndix B, Sec tion B .2.1 . Figu re 11.2 1 shows mag nit ude a nd
phase responses of the co ntro l-to-ou tput trans fer funct ion obt aine d for two di ffe re nt val ues of the load
=
res istance : R 40 Q, for w hi ch the co nverte r operates in CCM, and N = 50 n , for whic h the converter
operates in DCM. For these two ope ratin g poin ts , the qui esce nt (de) voltages and currents in the circui t
are nearly the same . Neve rthe less, the freq uency respo nses are qual ita ti ve ly very diffe re nt in the two
operat in g modes . In CC M, the conve rter exh ibits a fo urt h-ord er response w ith two pa irs of hig h- Q com -
plex -co njuga te poles and a pair of comp le x-co nj ugate zeros . A nothe r RHP ( righ t- half p lane) zero can be
observed at frequencies approaching 50 kH z. In DCM , there is a dom inant low-frequency pole followed

I 1.3 High-Frequency Dynamics of Converters in DCM 431
by a pair of co mple x-co nj ugate poles and a pa ir of co mp lex -co nju gate zeros. TI1e freq ue ncies of the co m-
plex poles and zeros are very close in value. A high-frequency pole and a RHP zero contribute additio nal
phase lag at hig her frequ enc ies.
11.3 HIGH-FREQ UENCY DYNAMICS OF CONVERTERS IN DCM
As discussed in Sectio n 11.2, tra nsfer fu nct ion s of co nverte rs opera ting in discon tinuous condu ct ion
mode exhibit a do m ina nt low -freq uency po le. A pole and possi b ly a zero ca used by ind uct or dy nami cs ,
ww
are pu shed to hi gh fre quen cies. To corr ectly model the hi gh- freq ue ncy dy nami cs of DCM conv erte rs, one
mu st acco unt for the fact that the ac voltage across the inductor is not zero. Equ at io n (11.12) is e mployed
in Sect ion I I. I to great ly s imp lif y the equ ations o f the DCM ave raged swi tch mode l. Altho ugh thi s
w.E
model gives goo d results at low fre que ncies , it ca nnot acc urately pred ict high freq uency induct or d ynam -
ics bec au se it imp lies th at the ac indu ctor vo ltage is zero.
A more acc urate approac h is employed in thi s sectio n. The subinterval le ngth dz is foun d by
averag ing the indu cto r c urre nt wavefor m iL(t) o f Fig. 11.3 (4-6]:
asy (I J.64)
Solu tio n for dit) yiel d s:

En
gin (ll.65)
eer
Equ atio n (11.65), toge th er w ith Eqs. (11.3 ), ( 11.4), ( I 1.7), a nd (1 I. I 0), co nst itu tes a large -sign al aver -
ing
aged model in DCM that ca n be used to inves ti ga te stead y-state be havior , as we ll as low -frequency and
h ig h-fre qu e ncy d ynami cs. U n fortun ately , the model eq uatio ns are more involve d , and do not all o w el im -
.ne
in atio n of all co n verte r voltages and curr ents in terms of the sw itc h network average te rmin al wavefo rm s .
Let us use th is model to find pre dic tio ns for th e hig h-freque ncy pole ca used by the inductor
dynami cs of DCM co nvert ers. Consider th e buck -boos t co nverter of Fig. 11.2 hav in g th e DCM w ave -
fo rms show n in Fig. 11.3.TI1e average tra nsis tor voltage (v1(t)}T, and the average diode c urrent (iit)\
are selected as the sw itc h net wo rk depe nd ent va riables . Su bs tit ut io n of Eq. ( 11.65) int o Eq . ( 11.3) yiel d s
t
{ 11.66)
The averaged sw itc h volta ge (v1(t)>r, in Eq. ( 11.66) is a nonlinea r fu nc ti on of the switch duty cycle , the
average in ductor c urr e nt , and the average in put and ou tp ut vo ltages:
(11.67)
A s ma ll-si gnal ac model ca n be ob t ained by Taylo r ex pansion of Eq . ( 11.67). Th e small -sig na l ac compo -
ne nt v1of th e average swit c h vo ltage ca n be fou nd as:

432 AC and DC Eq11ivale11t

Circuit Modeling ofihe Disconti1111om
Co11d11
ction Mode
+
1---.---..---1 - 1---.- ---.-- --,
+
+
+ v
ww
C R
w.E
Fig. 11.22 A small- sign al ac model of the DCM buck-boust convener .
asy (11.68)
En
where the small -sig nal model parameter s k8 , k,, rl' and f 1 are computed as partia l deriv atives of y1 evalu-
ated at the qu iesce nt opera ting po int. In part icular,
gin ( 11.69)
Substitution of Eq. (11.65) into Eq.( 11.10) yields eer

ing ( 11.70)
.ne
The small -signa l ac componen t i2 of the average diode current can be foun d as:
(I l.71 )
where the small -signa l model para meters g 8, h2, and h are computed as part ial derivat ives of y1 evalua ted
t
at the quiescent operat ing point. Figure 11.22 shows the sma ll- signal ac model of the buck -boost con-
ve11er, where the tra nsistor and the diode sw itch are replaced by the sources spec ified by Eqs. (1 1.68) and
(1 1.7 1), respective ly. It can be shown that this model pred icts esse ntially the same low-frequency
dynam ics as the model derived in Section 11.2.
To find the control-to-outp ut transfer func tion, we set v~= 0. At hi gh freque ncies , the small -sig -
nal ac componen t of the capacitor voltage is very small , ii"' 0, Therefore , the co ntribution of the depen-
dent source k,,O can be neglected at hi gh frequencies. Th en , from the eq uivale nt c irc uit model of
Fig. 11.22, we have
st.11• + r/ 1• + Jid = 0 ( 11.72 )
Equation (1 1.72) can be solved for the control -to-induc tor current transfe r function at high frequenc ies:

J1.3 High-Frequency Dynamics of Converters in DCM 433
(I 1.73)
where the pole frequ ency / 2 is give n by
{! 1.74)
T o s imp lif y the ex pression for the pole freq uency /2,we use th e stead y-state re lati o nship th at fo llows
ww
fro m Eq . ( 11.12):
(I 1.75)
w.E
Also , recall that the steady -state eq ui v ale nt resist ance R.(D) ca n be w ritten as
asy
( 11.76)
whe re f.. is th e s wi tchi ng freq ue ncy . Upo n substi tuti on of F.q s. (11.69) , ( 11.75) and ( 11.76) in to
Eq. ( 11.74 ) we get:
En
gin
(I 1.77)
This is an expression for the frequ en cy f 2 of the hi g h-freq ue ncy pole that is ca used by the ind uctor
eer
d yn a mics of the DCM buck -boost co nverter. It can be shown that Eq. (11.77) is a ge neral result for the
h igh-freq uency pole , vali d for all bas ic co n verters operat ing in DCM . Sin ce O< D2 < I, Eq . ( 11.77)
ing
imp lies that the hig h-frequ ency pole is always grea ter than app rox imately one thi rd of the switchin g fre-
quency.
Table 11.4 summ arizes the ex press ions for the hi gh -fr equ en cy po le w2 and the RH P zero w,
caused by the inductor dynam ics in co ntrol-to-o utp ut tra nsfer fu nctions G 0js) of basic DCM co nverters
.ne
[6]. Th e high-fre quency pole and the RHP zero occur at freq uencies close to or exceedi ng the switch ing
frequ ency /,. T his is wh y, in practice , the high-freque ncy inductor dyna mics can usually be neg lec ted .
Table 11.4 High-frequency pole and RHP zero of tl1cDCMconvertercontrol-to-output transfe r function GJ.s)
t
Converter High-frequ ency pole co7 RHPzerow,
2Mf,
Buck none
D(l - M)
Boos t 2(M - 1).f. 2.f.

D I)
Buck- boost 2IMIJ, 2.f.

--,y- D

434 AC and DC Equivalent Circuit Modeling of the Discontinuous Co11d11

clio11Mode
1. In the discontin uous conduction mode, the average transistor voltage and current are proportional , and
hence obey Ohm's law. An averaged equivalent circuit can be obtained by replacing the transistor with an
effective resistor RidJ, The average diode voltage and current obey a power source characteristic, with
power equal to the power effectively dissipated by R,. In the averaged equivalent circuit, the diode is
replaced with a dependent power source.
2. The two-port lossless network con isting of an effective resistor and power source, which re ull. from
averaging the transistor and diode waveform of DCM converter., is called a loss-free resistor. This net-
ww
work models the basic power-processing functions of DCM converters, much in the same way that the
ideal de transformer models the basic functions of CCM converters.
3. The large-signal averaged model can be solved under equilibrium conditions to determine the quie cent
w.E
values of the converter currents and voltages. Average power arguments can often be used.
4. A small-signal ac model for the DCM switch network can be derived by pert urbing and lineariz ing the
loss-free resistor network. The result ha the form of a two-port y-parameter model. The model describe.
asy
the small-signal variations in the transistor and diode currents, as functions of variations in the duty cycle
and in the transistor and diode ac voltage variation. .
5. To simplify the ac analysis of the DCM buck and boost converters, it is convenient to define two other
En
forms of the small-signal switch model, corresponding to the switch networks of Figs. l l.16(a) and
I 1.16(b). These models are also y-parameter two-port models, but have dif ferent parameter value .
gin
6. The inductor dynamics of the DCM buck, boo. t, and buck-boost converter occur at high frequency, above
or j ust below the switching frequency. Hence, in most cases the high frequency inductor dynamics can be
ignored. In the small-signal ac model, the inductance Lis set to zero, and the remai ning model is solved
eer
relatively easily for the low-frequency converter dynamics. The DCM buck, boost, and buck-boost con-
verters exhibit transfer functions containing essentially a single low-frequency dominant pole.
7. To obtain a more accurate model of the inductor dynamics in DCM, it is necessary to write the equations
ing
of the averaged inductor waveforms in a way that does not a sume that the average inductor voltage is
zero.
.ne
REF ERE 'CES
[ I]
[2]
V. VORPERIAN , R. TYMERSK I, and F. C. LEE, "Equivalent Circuit Models for Resonant and PWM
Switches," IEEE Tran.wction.1 on Power Electro11ic.s
V. VORPERIAN
, Vol. 4, o. 2, pp. 205-214, April 1989.
, "Simplified Analy i of PWM Converters Using the Model of the PWM Switch," parts I
t
and JJ, IEEE Trcmrnctio11son Aerospoce a11dElectronic Systems, Vol. 26, No. 3, May 1990, pp. 490-505.
[3] D. MAKSIMO VJCand S. CUK,"A Unified Analysis of PWM Converters in Discontinuous lodes," IEEE
Tra11.mctio11s , Vol. 6, No. 3, pp. 476-490, July 1991.
on Power Elec/ro11ics
[4] J. S N, D. M. MITCHELL, M. GREUEL,P. T . KREh , and R. M. BASS, "Averaged Modelling of PWM Con-
verters in Di. continuous Conduction Mode: a Reexamination," IEEE Power Electronics Specialists Con-
ference, 1998 Record, pp. 6 15-622, June 1998.
[5] S. BEN-Y AAKOVand D. ADAR,"Average Models a Tools for Studying Dynamics of Switch Mode
Specialists Conference, 1994 Record, pp. 1369-1376, June
DC- DC Converters," IEEE Power Elec/ro11ic.1·
1994.

Problems 435
[6) J. S N, D. M. MITCHELL,M. GREUEL, P. T. KREIN,and R. 1. BASS,"Average Models for PWM Conven -

ers in Discontinuous Conduction Mode," Proceedings of the 1998 l11tem atio11al High Frequen cy Power
ce (HF PC' 98), pp. 61-72, November 1998.
Co11ersion Co11fere11
[7] A. WITULSKIand R. ERICKSON, "Extens ion of State-Space Averaging to Resonant Switches - and
Beyond,'" IEEE Tran.rnclions 011Power Electron ics, Vol. 5, No. I, pp. 98-109, January 1990.
[8] S. FREELANDand R. D. MIDDLEBROOK, "A nified Analysis of Converters with Resonant Switches,"
IEEE Power Electronics Specialis ts Conference, 1987 Record, pp. 20-30, June 1987.
ww
[9) 5 . SINGER,"Realization of Loss-Free Resist ive Elem ents," IEEE Transactions 011 Circ uits and Systems ,
Vol. CAS-36, No. 12, January 1990.
[IO) S. SINGER and R.W. ERICKSON, "Power-Source Element and Its Properties," IEE Proceedings-Ci rcu its
[ I I] w.E
Devices and Systems, Vol. 14 1, o. 3, pp. 220-226, June 1994.
S. SI "GERand R. ERICKSON,"Canonical Modeling of Power Processing Circuits Based on the POPI Con-
cepL," IEEE Transact ions on Power Electroni cs, Vol. 7, o. I, January 1992.
[ 12)
asy
S. CI JK and R. D. MIDDLEBROOK, "A General Unified Approach to Modeling Switching De-to-De Con-
verters in Discontinuous Conduct ion Mode," IEEE Power Electron ics Specialists Conference , 1977
Record, pp. 36-57.
En
gin
[13) S. CUK, "Modeling, Analysis, and De. ign of Switching Converters," Ph.D. Thesis, California Institute of
Technology, November 1976.
PROBL EMS
11.1 eer
Averaged switch modeling of a nyback converter. The converter of Fig. 11.23 operates in the discontinu-
ing
ous conduction mode. The two-winding inductor has a I :11turns ratio and negligible leakage inductance,
and can be modeled as an ideal transformer in parallel with prima ry-side magnetizing inductance l 1,.
.ne
(a) Sketch the transistor and diode voltage and current waveforms, and derive expressions for their
average values.
(b) Sketch an a\•eraged model for the converter that includes a loss-free resistor network, and give
(c)
(d)
an expression for R, (J).
Solve your model to determ ine the voltage ratio V/1/8 in the disco ntinuous conduction mode.
Over what range of load current / is your answer of part (c) valid? Express the DCM boundary in
the form / < I,.,u(D, R,., V~, 11).
t
(e) Derive an expression for the small-signal control-to-output transfer function Gw1(s). You may
neglect inductor dynamics.
11.2 Averaged switch modeling of a nonisolated Watkins-Johnson convener. The converter of Fig. 11.24
operates in the di scontinuous conduc tion mode. The two-windi ng inductor has a 1:1 turns ratio and neg-
ligible leakage inductance, and can be modeled as an ideal transformer in parallel with magnetizing
inductance L.
(a) Sketch the transistor and diode voltage and cu1Tent wavefom1s, and derive expressions for their
average values.
(b) Sketch an averaged model for the converter tha t includes a loss-free resistor network, and give
an expression for R,(d).

436 AC and DC Eq11ivale111

Circuit ,Wodeli11gof the Disco11
lin110
1s1 Co11du
ctia11Made
C R V
+
ww l<'ig.II .23 Fly back cnnverter, Probl em l I. 1.
w.E
asy +
En C R V
gin
1<1g.11.24 Watkins-Johnson converter, Prnblem 11.2.
eer
Solve your mode l to de termi ne the co n verter co nversio n ra tio M(D } = VN n in the d iscon tinuous
ing
(c)
conductio n mode. Ove r wha t range o f load cu rrent s is yo ur express ion valid ?
11.3 Sketch the stea dy-state o utp ut charac teris tics of the buck -boost con verter: plo t the output voltage V vs.
.ne
the load current / , for seve ral values of duty cycle D. Include both CCM and DCM operatio n, and clear ly
label the bo undary betwee n mcxle.~.
11.4 In the net work of Fig. 11.25, the powe r som ce waveform p(t) is given by
p(t) = 1000 cm,2 3771

The cir c ui t opera tes in steady stale . Dete rmi ne ther ms resis tor volt age VR,mr.,·
t
11.5 Ver ify the exp ress ions for G,/0and w,,give n in Table 11.3.
11.6 A cer tain buck conve rter opera tes wi th an in put vo ltage of VH = 2ll V and an o utp ut 1,01tage of V = 15 V.
T he loa d resis tan ce is R ,,,HJ!2. Other ele ment and parame -ter value.s are: l = 8µ H, C = 220µF ,
f,, = l 50kHz.
(a) Dete rmi ne the val ue of R,.
(b) Determine the qu iesce nt du ty cycle D.
(c) Ske tch a Bode plot o f the contro l-to-o utpu t transfer fu n ctio n ( i"' 1(s). Label the va lues of a ll
salient features. You may neglect induc to r dynamics .
11.7 Using the approac h of Sec tion 11.3, de te1mi ne the con tro l-to-ou tput transfe r func tion G,.,t<.r) of a boost
converter. Do not make the approx im ation l "' 0.

Probl ems 437
+
Li
7 mH
p(t) R
ww 20Q
w.E
Fig. 11.25 Net wor k with a powe r so urce, Problem 11.4.
(a) De rive ana lytical express ions for the de gain G~1and the RHP zero frequency w,, as functions of
(b)
asy
M, R,, D, Vg, L, C, and R.
With th e assu mption that C is suff iciently large and that L is s uff ic ient ly small, th e poles of
Gvi s) can be factored using the low-Q approx imation. Do ,o , and exp ress the lwo poles as fonc -
En
lio ns of M, D, L, C, and R. Show th at lhe low -fre q ue ncy pole matches the expressi on in
Ta ble 11.3, and that the high-frequency pole is given by the exp ression in Ta ble 11.4.
gin
eer
ing
.ne
t

ww
w.E
asy
En
gin
eer
ing
.ne
t

12
Current Programmed Control
ww
w.E
asy
En
gin
So far, we have discussed duty ratio control of PWM converter s, in which the converter output is con-
trolled by direct choice of the d uty rat io d(t). We have therefo re developed express ions and small-signal
eer
tra nsfer functio ns that relate the conve rter waveforms and outpu t voltage to the du ty rat io.
Anothe r co ntro l scheme, which find s wi de app lic ation, is current prog ramm ed co ntrol [1- 13],
ing
in wh ich the co nverter ou tpu t is co ntro lled by choice of the pea k transistor switch current peuk (i,(t)). The
control input signal is a current iJt), and a simpl e control network switc hes the tran sistor on and off , such
that the peak tran sisto r curr ent foll ows i,(t) . The trans isto r dut y cycl e d(t ) is not dir ectly co ntrolled, but
.ne
depends on iJt) as well as on the converter inductor c urre nt s, capac itor voltages, and power inpu t volt-
age. Converters controlled via current prog ramm ing are said to operate in the current p rogrammed mode
(CPM).
The block diagra m of a simple curr ent programmed controller is illustrated in Fig. 12.1. Control
sig nal ( .(t) and sw itch curr ent i,(t) wavefor ms are given in Fig. 12.2. A clock pul se at the Set input of a
latch ini tiates the sw itc hin g per iod, ca u sin g the latch output Q to be high and turn i ng on the tra nsisto r.
Wh ile the transistor conducts, its current i,(t) is equal to the inductor current i,_(t);this current increases
t
with some positive slope m 1 that depe nds on the value of inducta nce and the converter vo ltages. In more
complicated converters, i,(t) may follow the sum of several inductor currents. Eventu ally, the switch cur-
rent i_,(t) becomes equal to the co ntrol signal i,(t) . At thi s poi nt, the co ntro ller turn s the transist or sw itch
off, and the induc tor current decreases for the remainder of the sw itchi ng period . The con troller mu st
meas ure the switch curr ent i_,(1) with some current sensor circuit , and compare i,(t} to 1)t) using an an a-
log comp ar ator. In practice , voltages pro porti o nal to i,(t) and ic(f) are co mpare d, wit h con sta nt of propor-
tion ality R1.Whe n i.,(1):::>:i,.(1), the co mpar ator resets the latch , turnin g the transistor off for the remaind er
of the sw itchin g period .
As usu al , a feedbac k loop can be co nstructed for reg ulation of the out put voltage. The outp ut
voltage v(t) is co mpared to a refe re nce vol tage v,.1, to genera te an e1ror signal. T his error signal is applied

440 Current Programmed Comrol
Buck converter
i,(t)
+
C v(t) R
. ·----~-------,
Measure
ww swi 1ch
current
(,(t)
Clock
LL
w.E o r,
asy :>---+-----1
compara tor
A
Latch
Co,urol
input
EnCurre111-prog
rammed controller
gin
Co11ve111ional
output voltage controller
Compensator
eer v(t)
vrcf
ing
.ne
Fig, 12,1 Current -programmed co ntro l of a buck convener . The pea k tran.si.stor current replaces the duty cycl e us
the control input.
Control signal
ic(t)
t
Fig. l2.2 Swiech cu1Tent i ,(r) and

conlw l input i) r) waveforms, for the currtnt
curr ent-pro grammed sys tem ofFig . i,(t)
12.l.
0 dT,
Trans istor ;
status: i on l off
t t
Clockturns Comparator turns
transistor on transis tor off

12.I Oscillatio n for D > 0.5 441
to the inpu t of a co mpensat ion network, and the out pu t of the comp ensator drives the contro l signal
(.(t)Rr To design such a feedbac k system, we need to model how varia ti ons in the co ntro l signal 1)t) and
in the lin e in put vo ltage vp) affect the out put vol tage v(t).
The chief advantag e of the curre nt pro grammed mode is its sim pler dy nam ics . To first order, the
small-signal contro l-to-o utput tran sfer func tion v(s)!( ,(s) contain s one less pole than v(s)ld(s ). Act ually ,
this pole is moved to a hi gh frequency , near the converter swit chin g frequency, Nonetheless, simp le
robust wide-bandwidth output voltage control can usually be obtai ned, witho ut the use of compensator
lead netwo rks. It is true th at the curr e nt progra mm ed contro ller requ ires a c ircuit for meas urement of the
sw itch cur re nt i/r); howeve r, in pract ice such a circuit is also requi red in duty ratio co ntrolled syste ms,
ww
for pro tect ion of the tra nsisto r aga inst excessive curre nts du ri ng t ransien ts and fau lt co ndi ti ons . Current
progra mmed contro l makes use of the avail able current sensor in form ation durin g nor mal operatio n of
the co nverte r, to obta in si mpl er system dy na mics. Tra nsistor fai lur es due to excess ive switch curr en t ca n
then be preve nted simply by limiting the maxim um value of i.(t). Thi s ensures that the transistor will turn
w.E
off wheneve r the sw itc h current beco mes too large, on a cycle -by-cycle basis.
An added bene fit is the red uction or elim inatio n of tra nsfo rmer sat uratio n prob lems in ful l-
bridge or push- pu ll isolated converters. In these converters, small voltage imbalances induce a de bias in
asy
the tra nsfor mer mag netiz in g curr ent; if sufficie nt ly large, thi s de bias can satur ate the tran sfor mer. The de
current bias increases or decreases the transistor sw itch c urren t s. In response, the cu rrent program med
co ntroll er alters the tra nsistor du ty cycles, such that tra n sfo rm er volt-second bal ance tends to be mai n-
En
tai ned. Curr ent-progr amm ed full-bri dge isolat ed buck co nverte rs sho uld be operated wit hout a capaci tor
in series with the transformer primary windi ng; th is capacitor tends to destabilize the system. For the
same reaso n, curr ent-programmed co nt ro l of ha lf-bri dge isolated buck converte rs is ge nerail y avo ided.
gin
A disadvantage of current progra mmed control is its susceptibility to noise in the i,(1) or i,(t)
sig nal s. Thi s noise ca n pr emat urely reset the latc h, dis ru ptin g the operatio n of the co ntrolle r. In par tic u-
eer
lar, a small amount of filtering of the sensed swi tch curre nt waveform is necessary, to re move the turn -on
curre nt spik e caused by the diode stored charge . Add ition of an artificia l ramp to the curre nt-progra mm ed
co ntro ller, as discussed in Section 12. 1, can al so imp rove the noise im mun ity of the c irc ui t .
ing
Commercial integrated circui t s that implement curre nt prognu nm ed contro l are widely avail -
able, and operat ion of co nverters in the c urren t progra mmed mode is qu ite pop ular. In this chapter, con-
verter s operating in the cu rrent progra mm ed mode are modele d . In Sec tion 12. 1, the stab ility of th e
.ne
c urren t pro grammed co ntroll e r an d its inn e r sw itch -curr ent-se nsi ng loop is exa mined. It is found tha t thi s
controller is unstab le wheneve r converter steady -state dut y cycle D is greater than 0.5. The curre nt pro-
gra mmed cont roller can be stabil ized by addit io n ofan artific ial ra mp s ignal to the sensed swi tch curre nt
wavefor m . In Sect ion 12.2, the syste m small -s ignal tra nsfer fu nctio ns are desc ribed, us in g a simple first -
order mode l. The avera ged te rmin al wavefo rms o f the switc h net wor k ca n be desc ribed by a sim ple cur-
rent source, in co njun c tion wit h a po wer source eleme nt. Perturb ation and lineariz atio n leads to a simple t
small-signal model. Although th is first-order model yields a great deal of ins ight into the control -to-out-
put tran sfer function and converter outp ut imp edance, it does not predict the line-to-outpu t transfer func-
tion G,8 (s} of current-progra mme d buck converters . Hence, the model is refined in Sec tion 12.3. Section
12.4 extends the mode ling of curre nt prog ramm ed converters to the di sco nt in uous conduct ion mode.
12.1 OSCILLATION FORD> 0.5
The cur rent pro gra mmed co ntro ller of Fig. 12. 1 is un stable w henever the steady -state du ty cycle is
greater than 0.5. To avoid this stability problem , the control scheme is usua lly modi fied , by addition of an
ar tificia l ra mp to the sensed swi tch curren t waveform. In this sec tion , the stab ilit y of th e current pro -
gramm ed co ntroller , wit h its inne r s witch -curr ent -sensing loop, is analyzed . The effec ts of the add ition of

442 Current Programmed Control
Fig. 12.3 Inductor current wavcfo1m nf ic ••••• •••••••••

••••••••-•...:.._••·---.--·...
..cc.
·• • •O O O+O O ·OOOO OOO ·OO OOO O OO,ooo, o+OO OO•HOOOOO · OO ·•OOOOHOOOOOO•OOOOO•OOOOOO
a current-programmed converter operating

in the continuous conduction mode.
ww 0 dT.
the artificial ramp are ex pl ai ned , us in g a s imp le first -order di sc rete -time a nalys is . Effec ts of the ar tifi cia l
ramp on controller noise susce pt ib ility is also discu ssed.
T,
w.E F igur e 12.3 illustrates a ge ner ic inducto r current wa vefo rm of a swi tching conve rter operat ing
in the co nt inuous co nd uction mod e. Th e inducto r curr ent c han ges wi th a slope m 1 duri ng the first sub-
inte rva l, and a slope - m2 durin g th e seco nd sub int er va l . For the bas ic noni so lated conve rters, the slopes
m 1 and - m7• are give n by
asy Buck converte r
EnmI
Vk ~- V
-:e -
Boost con verier

r.- llli =- L
V
/111 =f
I'
Buck- boost converter gin

-111 2 =:
-,-.-
v,., - V ( 12. 1)
eer
With know ledg e of the slopes m 1 and - m 2• we ca n determin e the genera l re lat ionships be tween iJO), ( .•
i 1_(T,),and dT,.
Durin g the fir st subinterva l, the ind ucto r cu rre nt i L(I) incre ases with slope 1111. u nti l iL(I) reac hes ing
.ne
the contro l signa l ( . Hence ,
(12.2)
So lution fo r the d u ty cycled leads to

t
d = i,.- iL(O)
( 12.3)
m T,
1
In a sim ila r manner, for the second subi nt erva l we can wr ite
i 1.(T ,) =11,(d'l) - m2 d'T, (12.4)

= iL(O)+ m,dT, -m 2d'T,
In stea dy-s tate, iL(O) =iL(T,), d =D, m1= M,. and n12 = M2. In sertio n ofd1ese relationsh ips into Eq . ( 12.4)
yields

I 2. I Osci /larion for D > 0.5 443
........... ; ····-····· l1,(T,) -·······--······Steady-state·············

Fig. 12.4 Effect of initi;il perwr-
· wavefonn
bation iL(O) on inductor current t
waveform.
m, .
/LO ...................!.....
[
.........
!........... ........
...
; :
I dT, l
: :
ww 0 (o+a)T, or, T,
{12.5)
Or,
w.E
asy
(12.6)
Steady -state Eq. ( 12.6) coi ncides with the req uireme nt for stea dy-state vol t-seco nd ba lance on the in d uc -
tor.
Co nsider now a small pertur batio n in iL(O):
En
i ,(0) a;; I ,.o+ i ,.(0)
gin (12 .7)
eer
lw is a ste ady-state val ue of ii(O), wh ich satisfies Eqs. ( 12.4) and ( 12.5), while 11_(0) is a sma ll perturba -
tion such tha t
IiL(O) I« 11,D I
It is desired to assess the sta bil ity of the cur rent-programmed controller , by de termin i ng whether this ing (12.8)
.ne
small perturb ation eve ntually decays to zero. To do so, let us solve for the pertur bation after n switch ing
periods, I1(11T,), and determ ine whether ii(11T,),tend s to zero for large n.
t
The steady-state and pe rtu rbe d ind uctor curre nt wavefor ms are illust rat ed in Fig. 12.4. For clar -
ity, the size of the ind ucto r curre nt per turb atio n ii.(0) is exaggerate d. It is ass umed that the conver ter
operntes nea r steady-state, such that the slopes m1 and lllz are esse ntially uncha nged . Figure 12.4 is
drawn for a posi ti ve iL(O);the quant ity dT,is the n negat ive. Since the slopes of the steady -state and per -
turbed wavefo rm s are essent ially equal over the interval O < / < (D + J)T,, the diffe rence between the
wavefor ms is equ al to i,.(O)for this e nt ire int erval. Likewise, the di fference betwee n th e two waveforms
is a constant riJT.) over the interval (D + d)T, < r < T,, since both waveforms then have the slope - 1111 •
ote th at {L(T.) is a neg ati ve qu antity , as sketc hed in Fig. 12.4. Hence, we can solve for tL(T.) in terms of
(_(0), by co nside ring only the interval (D + d)T;<I< D'F, as illustra ted in Fig. 12.5.
1<1g. 12,5 Expanded view of the steady-sraie and - m2

perturbed inductor curre11twaveforms, neur the peak Steady· slate
of /1.(t) . wavefonn
ar, Permrbed
wavefonn

444 Curr e11tProgrammed Contro l
From Fig. 12.5, we can use the steady -state wavefo rm to express i1_(0 ) as the slope m.,mu lti -
plied by the interval length - dT,. Hence ,
(12.9)
Likewise, we can use the pertu rbed waveform to express l/ T,) as the slope - m2 • multiplied by the inter-
val length - Jr,.:
( 12.10)
ww
E limination of the intermediate var iable
.
J from
1 1(T,)
Eqs. (12.9) and (12.10) leads to
= 1.1(0) {- -m2) ( 12. 11)
w.E "'1
If the converter operating point is suff ic ient ly close to the qu ies cent operating po int, then m/m 1 is given
approx imate ly by Eq. (12.6). Equa tion ( 12. 11) then becomes
asy (12.12)
En
A simi lar analysis ca n be performe d duri ng the next switch in g period, to show that
{ 1.<2Ts) = i 1.U~) ( -
ginr
g,)= f L(O) ( - g, (12.13)
After II switc hi ng per iods, the pe rtu rba tion becomes

er
(-g,) i-re
r,.(nT,) = 7, ((11- l)T ,) = 1, (0) (-
ing (12 . 14)
Note that , as II tends to infinity , the perturbation i,.(nT.) tends to zero provided that the characteristic
.ne
value - DID ' has magn itude less than one. Converse ly, th e pertu rbat ion :,_(nT,) becomes large in magni -
tude when the charac ter istic va lue a== - DID' has magnitude greater than one:
when j-g.l
(12.15)
t
Therefore , for stabl e opera tion of the curr ent pro grammed contro ller, we need I a I ::;DID' < I, or
D < 0.5 ( 12.16)
As an examp le, consider the opera tion of the boost co nverter with the steady-state termina l vo lt-
ages Vg a: 20 V, V = 50 V. Since VIVR "' 1/D' , the boost co nverter shou ld operate w ith D "' 0.6. We there -
fore expect the current programmed controller to be un stab le . The charac terist ic val ue w i II be

I 2.1 Oscillat ion fo r D > 0.5 445
ww
Fig. 12.6
0 T,
Unstable oscillation for O: 0.6.

2T, 3T, 4T,
w.E a=-S,
·=(-8
:~)c:-15 ( \1 . l7)
asy
As given by Eq. ( 12.14), a perturbation in the inductor current w ill incre ase by a factor of - 1.5 ove r
eve ry switch ing period . As illustrated in Fig. 12.6, the pe rturba tion grows to - 1.SlL(O) after one sw itch -
ing pe riod , to + 2.25i1,(O) after two switc h in g pe1iods , and to - 3.375i/ 0) afte r three sw itching pe1iods.
En
For the part icular init ial cond itio ns illu stra ted in F ig. 12.6, this grow ing osci llat ion sa tura tes the current
progra mmed co ntro ller after three sw itching periods. The tran sisto r rem ains on for the entire duration of
gin
the fourth switchin g period . The inducto r current and co ntroller waveforms may eventually become
osc illatory and peri odic in natu re, with per iod equa l to an integra l num ber of swi tc hin g per iod s. Alterna -
tively, the waveforms may beco me chaotic. In either eve nt, the contro ller does not operate as inten ded.
eer
Figure 12.7 illustra tes the inductor current waveform s when the ou tpu t vo ltage is decrease d to V
= 30 V. TI1e boost converte r then operate s with D = 113, and the charac teristic value becomes
-
a -- o·- !1
3)-
D_(-213 -- 05
·
ing (12.18)
.ne
Per tur bation s now decrease in ma gnitud e by a factor of 0.5 over each switc h ing period . A disturba nc e in
the inductor curre nt becomes small in magnitude after a few switching periods.
The instabi lity for D > 0.5 is a we ll-know n problem of cu rrent pro grammed control, wh ich is
not dependent on the converter topolo gy. The controller can be rendered stable for all duty cycles by
addition of an artific ial ramp to the sensed switch current wavefo rm , as illustrated in Fig. 12.8. This arti -
t
0 T, 2T, 3T, 4T,

Fig. 12,7 A stable trnnsienr with D = l/ 3.

446 Currell/ ProgrammedCo111ro/
(a) Buck conve rter

L
+
C v(t) R
ww Measure i,(t)
switch
current
w.E Artificial ramp

LL
0 T,
asy Analog
->--~--t R
Latch
Control En comparator
gin
Current-prog rammed controller
inpur
(b) ia<t)
eer
ing
.ne
0 T, 2T,
t
Fig. 12.8 Stabilizati on of the currolll progran1tne<l controller by addition of un artiliciul rnmp t<1 the 1neu,.urcd
switch current waveform : (a) block diagram , (b) :lflificial ramp waveform.
fic ial ram p has the qualitative effec t of red uci ng the gain of the inner switc h-current-se nsi ng discrete
fee dback loop. Th e artific ial ra mp has slope m" as show n. Th e controlle r now sw itches the tran sis tor off
whe n
i. (dT,) + i 1.(dT,) = i, (12.19)
whe re i.,(t) is the arti fic ial ramp waveform. Therefo re, the transis tor is switched off when the ind uc tor
curr ent iL(t) is given by
(12 .20)
Fig ure 12.9 illustrates the analog co mparison of the ind uctor curre nt wavefor m iL(t) with the quan tity
[ic - i,,(t)] .

12.J O.scillalio11for D > 0.5 447
Fig, 12.9 Addition of artificial ramp:

the transistor is now switched off when
iL(t) "' ir.- i0 (t).
ww We can aga in dete rmine the stabilit y o f the curre nt p rogra mm ed con troller by analyz ing the
change in a per turbatio n o f the induc tor cu rre nt waveform over a comp lete switc h ing period. Figure
w.E
12.10 illustra tes steady -state and pertur bed induc tor current wavefo rms , in the presence of the art ificia l
ram p. Aga i n, the magn itude of the pertur bation i/0 ) is exaggerate d . The pertu rb ed waveform is sketc hed
for a pos itive va lue of ir_(O); this causes d, and usually also ij T,), to be negative. [f the perturbed wave -
asy
forms are su fficient ly close to the quiesce nt opera ting point, then the slopes m 1 and lt'7.are essent i ally
unchange d , and the rela ti o n ship be tween iL(O)and i1.(T,) can be deter m ined so le ly by co nsidera tion of the
interval (D + d)T, < I< DT,. The per turb ations 11.(0) and 11.(T , ) are expressed in term s of the slopes m 1, r11;i,
and m 11, and the inte rva l le ngt h - aT,,as follows:
En (12.21)
gin ( 12.22)
Elimin at ion of J yiel ds

eer
ing (12.23)
.ne
A sim ila r analysis can be app lied to th e 111" switc hin g period, lea di ng to
,• L(n7,),,
. • •.
1 L((11-l)I ,) { - m,
m 2 - 1110 ) m 2 - m )"
+ 1110 "'r• 1,{0) { - mi+"'
0
• ,, t, i (O) a ,.
The evo lut ion of inducto r curre nt perturba tio ns are now dete rm ined b y the charac ter istic va lue
(12.24 )
t
Fig. 12.10 Steady -state and perturbed

inductor current waveforms, in the pres-
ence of an artificial ramp . I LO+ 1l(O)
/LO
0 D+ d) T, DT, T,

448 Current ProgrammedCo111rol
Cl.__ 1111 - m, (12 .25)

-- mi+ ,n"
For large n, the pertu rbat ion mag n it ude tends to
,>1-·(~
when lal< 1
I;1cnr I
when a[> I
( 12,26)
Therefore, for stabil ity of the curre nt program me d co ntr oller , we need to choose the slope of the artific ial
ww
ramp m0 such tha t the charac terist ic value a ha s magnitu de less than one . The ar ti fi c ia l ramp gives us an
add itional degree of freedom , wh ich we can use to stab ili ze the system for d ut y cycles greate r th an 0.5.
Not e that inc reasi ng the val ue of m., causes the numera tor of Eq. ( 12.25) to decrease, whi le th e denom i-
w.E
nator increases. Therefore, the cha racter istic va lue a atta in s magnitude less than one for suffic ie ntly large
In the co nve ntional vo ltage regu lator applicat io n, the output voltage v(r) is well regula ted by the
converter co ntrol syste m, whi le the input voltage v/ t) is unknown. Equation ( 12. 1) then pre dicts th at the
asy
val ue of the slope m 2 is co nstant and know n with a high degree of accuracy, fo r the bu c k and buck -boost
converters. Th erefo re, let us use Eq . (12 .6) to e li minate the slope m 1 from Eq. ( 12.25), and there by
express th e cha racter istic val ue a as a fu nct ion of th e kn ow n slope m2 and the stea dy-state dut y cycle D:
En
gin
(12 .27)
One common choice of artific ial ramp slope is
ma=½m2 eer (12 .28)
ing
It can be ve rified , by sub stitution of Eq . (12.28) into ( 12.27) , that th is choice leads to a = - l at D = I,
and to I a. I< I for O :<:::D < I. This is the minimum val ue of m., tha t leads to stab ilit y for all d uty cyc les.
.ne
We wi ll see in Sect ion 12.3 th at this cho ice of m" has the added be ne fi t of ca using the idea l line -to -outpu t
tran sfer fun ction GvK(s) of the buck co nve11er to become zero .
Ano ther common choice of m,, is
This causes the charac ter istic value a to beco me zero for all D. As a resul t, iL(1) is zero for any l1.(0) that
{12 .29)
t
does no t sa tura te the controll er. The system removes any error af ter one sw itchi ng period T,. This behav -
ior is k nown as deadbeat control, or finit e settling time.
It shou ld be noted that the above sta b ility an a lysis employs a qu as i-stat ic approx imat ion , in
which the slopes m 1 and m 2 of the pertur bed in duc tor current waveforms are ass umed to be ide ntica l to
the steady -state case. In the most gene ral case, the st ability and tra n sient respo nse of a co mpl ete system
emp loying current progr amm ed co ntro l must be assessed using a system -wide di screte ti me or samp led-
dat a analys is . Nonetheless, in pr actice the above argu ments are fo und to be suffic ien t for se lec tion of the
artificia l ramp slope m,..
Curren t-programm e d contro ller c ircu its e xhibit sign ifican t sensit ivi ty to noi se . The reason for
thi s is illu st rat ed in Fig. 12. l l(a) , in wh ic h the contro l si gnal i,.(1)is pe rturbe d by a small amount of no ise

12.2 A Simple First-Order Model 449
Perturbed
Fig. 12.11 When noise pe1t urbs a wavefonn
controller signal such as i<, a perturb a- i, .. :Jic_ :::::::::::::::::···..·······-···
tion in the duty cycle resul!s : (a) will1
no artificial ramp and small ind uctor !
Steady-state
current ripple, the pcrmrb ation J is i tlT, :
l~ I
waveform
large; (b) an artificial ramp reduces the
controll er gain, thereby reducing the
perturbation J
ww 0 OT, (D+ a)T, T,
w.E
A n ificial Perturbed
• ramp waveform
.'c·--·-~--··-····.-··•••
-•••••
-•-••••••••••..
• • -••+ • • • • •• • • ·• •H O
asy Steady-stale
waveform
0
En DT, (D +a)T , T,
gin
rep rese nted by ( . It ca n be see n that, wh en the re is no a rt ific ia l ram p an d wh en the in ducto r curren t rip -
ple is sm all , then a s mall pe rt urba tio n in i.- leads to a large pe rtu rbation in the d uty cy cl e : the co ntrolle r
eer
has high ga in. Whe n noise is prese nt in the co ntr oller circ uit, then signific ant ji tter in the du ty cy cle
w avefo rm s m ay be observe d. A solutio n is to redu ce the gai n of the co ntroller by in tro d uctio n of an ar ti-
fic ial ra mp. A s illu strated in Fig. 12.11(b), th e same pertur ba tion in i 0 now lea d s to a red uced va riatio n in
th e du ty cycle. Wh e n the layo ut and gro undin g of the co ntroll er ci rcu it introd uce sig ni fican t no ise into
the du ty cycle wave fo rm, it may be necessmy to add an artifi c ial ramp whose amp litu de is subst ant ia lly
grea te r than the ind ucto r cu rrent ripp le . ing
.ne
t
12.2 A SIMPLE FIRST -ORDE R MODEL
On ce the curr ent pro gra m med co ntrolle r has been co nstru cted , a nd stabil ized u sin g a n a rtific ial ramp ,
then it is desired to des ign a feedback loop for reg ulation of the o utput volt age. As usua l, thi s vo ltage
fee dbac k loop mu st be desi gned to meet spec ificatio ns reg ardi ng l in e distur ba nce reje ction , tra ns ie nt
respo nse , o utpu t im peda nce , etc. A b lock d iagram of a ty p ical sys tem is i llustra ted in Fig. 12.12, co nta in -
ing an inn er curre nt progra mm ed co ntro ller , wi th an outer voltage feed back loop.
To desig n the outer vol tage fee dbac k loop, a n ac equ iva len t circ uit mode l of the sw itc hin g co n-
verte r o pera ti ng in the c urr e nt pro g ramm ed mod e is neede d. In C ha pt e r 7, averag ing was employed to
develo p s mal l-sig nal ac eq u ival ent c ircu it models for co nverters o perat ing w ith d ut y rati o con trol. Th ese
models predic t the cir cuit be hav ior in terms of var iations d in the du ty cyc le. If we co uld find the rela -
t io nsh ip betwee n the co ntrol s ignal ((r ) and th e d ut y cycle d(t) fo r the curre nt programmed con tro ller,
th e n we co u ld adapt the models of Ch apter 7, to app ly to th e c urre nt program med mode as wel l. In ge n-
eral , the dut y cycle depe nds not only o n i.(t), but also on the converter voltages and cur rents ; he nce, the
curr e nt pro gram me d con tro ller incorpora tes mu ltiple effec tive fee d back loops as indi cated in Fig . 12. 12.

450 Currell/ Prog rammed Control
Switching converter
+
R v(t)
d(t ) Converter
ww Current
pros rammed
controller
voltages and
currents
w.E _i_
c<_>
r__ -1 Compensator
asy
En
Fig. 12.12 Block diugram of a converter system in~orporntingcurrent prngrammed co 11trol.
In this section , the ave raging approach is extended , as desc ribed above, to treat curre nt pro-
gin
gram med co nverters. A simp le first -order approx ima tion is emp loyed , in which it is ass umed that the cur-
rent pro grammed contro ller opera tes ideally , and hence cause s the average ind uc tor cu rren t (/ 1,(t)}r, to be
identical to the contro l i,lt). This approx im ation is just ified whe neve r the inducto r curr ent ripple and arti-
eer
ficial ramp have negligible magnitudes. The indu ctor current then is no longe r an ind ependent state of the
system, and no longer contr ibutes a pole to the converter sma ll-signa l transfer fun ctions.
This first-order model is derived in Section 12.2. 1, using a simple algebraic approach. In Sec -
ing
tion 12.2.2, a sim ple physical int erpretation is obtained via the averaged sw itch model ing technique. A
more accurate, bu t more complicated , model is described in Sect ion 12.3.
.ne
12.2.1 Simple Model via Algebraic Approach: Buck-Boost Example
The powe r stage of a si mple buck -boost conve rter operating in the conti nu ous conduc tion mode is illu s-
trated in Fig. 12.13(a), and its inductor cu rrent waveform is given in Fig. 12.13(b). The small-signal aver-
aged equat ions for this conve rter, un de r du ty cycle control , were derived in Section 7.2. The result,
t
Eq. (7.43), is reproduced below :
(12.30)
t gCt)= ol L + I id(r)
The Laplace tran s forms of these equation s, with ini tial cond itions set to zero, are

12.2 A Simp le Fir.st-Order Model 451
(a)
+
ii( t)
T L C R v(t)
(b)
ww
w.E
0
asy err
, T,
Fig. 12.13
En
Buck-boost convener example: (a) power stage, (b) inductor current waveform.
sU 1_(s)"' o,·,(s) + D'v(s) + ( V,,-

sG(s)-::: - D'[ L(s) - v~) gin
+ f id(~)
v)J(s)
(t2.3!)
i',(s) = D[ l(.f) + l 1d(s)
eer
ing
We now mak e the assumption that the inducto r curre nt i1(.~) is identica l to the progra mm ed contro l cur-
rent l,(s). This is valid to the extent tha t the co ntro ller is stable, and that the mag nitudes of the induc tor
curren t rippl e and artific ial ramp wavefo rm are sufficie nt ly small:
.ne
(\2.32)
Thi s app roxi mat ion , in conjunction w ith the indu c tor c urr en t equ ati on of ( 12.3 1), can now be used to find
the relat ionship betwee n the contro l curre nt i ,.(s) and the duty cycle d{s), as follows:
sLi,,(s) "' Dvis) + D'~(s) + ( v, - v)d(s) (12.33)

t
So lution for d(s) yields
l __ slf, .(s)-Dv , (i')- V'\l (.r)

(12.34)
( (.1)- ( )
V, - V
This small -signa l ex press io n descri bes how the curren t pro gra mmed co ntro ller var ies the dut y cycle, in
response to a give n co ntrol input variat ion 1',.(s). It can be seen tha t <l(s)depends not only o n i_(s), bu t also
on the converter ou tpu t voltage and input voltage variations. Equa tion (12.34) can now be substituted
into the second and third lines of Eq. (12.31), thereby eliminating d(s) . One obtains

452 Currell/ Programmed Co11/rol
(a) is
D1. •
D'R v,
D'R
- r7 ( sL),
D l + D'R 1,
12
RV
~
ww
(b)
Node
f
i)
sCv
w.E R
75 C
R
R
asy
En
Fit, 12.14 Construction of CPM CCM buck-boost converter e4L1ivalentcircuit: (a) input port model. correspond-
ing to Eq. (12.38 ); (b) output port model, corresponding to Bq. (12.37}.
,. ,•
R
v(s)
gin .1Li ,.M- D O,( .,) - LJ'P(s)
{v,- v)
eer
s[v(s) = --DI,(. ~)- -t / I.
{12.35)
• • .~!.{..(s) - Dv,(s)- lJ'v( .,·)
(v, -v )
ing
1is)=D1,.(s)+! 1_
These eq uations can be simp lified by co llecti ng tem1s, an d by use of the steady -state re lationship s
.ne
t
(12 .36}
Equa tio n (12.35) the n beco mes

-[sLD R + J.)
-(12. ti. .,( - (Ji...)
I ·) . (s)
·C"·( (12.37)
-~ -~ .1·) - D'R -D '). 1, (s·) D'R v,
i
• ( )_(sLD
1_~s - • ·)- (D)
D'R+ D)
1,.(.1 Res "(
.) - (lJR
D 2 ) • ( _.
v,, ·'}
(12.38)
The se are the basic ac sma ll -sig nal equ ations for the si mp lified first-o rder mo del of the current -pro -
gra mm ed bu ck -boo st converter. These equat ions ca n now be used to co nstru ct s mall -s ignal ac c ircui t
mod els tha t represe nt the behav ior of the co nverter input and output ports. In Eq. ( 12.37), the quantit y
,fC0(.1·)is th e ou tput capac itor current. The ((s) term is rep resen ted in Fig . 12 .14 (b) by an in dependen t

12.2 A Simple Finr-O rder Model 453
i,
+
f,(s) l, g, O 112 o, f.,_(s)i, R v
Fig. 12.15 Two-port equivalent circuit used (o model the current-programmed CCM buck. boo~t. and buck- boost
converters,
ww
current source, while the v/1-) term is represented by a depende nt current sourc e. v(s)IR is the curren t
thro ugh the load resistor, and v(s) D/R is the c urrent through an effec tive ac resistor of value RID.
Equation (12.38) descri bes the current iis) drawn by the conve rter inp ut port , out of the source
vis).
w.E
Th e icf~)term is aga in represented in Fig. 12 . 14(a) by an independent current sou rce, and the D(s)
term is represented by a dependent c urrent source. The quan tity - v/s)D 21D'R is model ed by an e ffecti ve
ac resisto r having the negative valu e - D'R/D 2 •
asy
Figures 12.14(a) and (b) can now be combined into the small -signal two-po1t model of Fig.
12.15 . The current programmed buck and boos t conv erters can also be modeled by a two-port equivalent
circui t, of the same form. Table 12. l lists the model paramete rs for the basic buck, boost, and buck -boost
converters.
En
The two-port equiva lent circu it ca n now be solved, to find the converter tran sfe r funct ions and
output impedance . The control-to-output transfer function is found by setting \la to zero. Solution for the
outpu t voltage then leads to the tran sfer function G, 0 (s):
I
.- ( gin
eer
v(s) t ) (12.39)
G"_(s) = r,(s) • - o "'h rill R UsC
ing
Substi tu tion of the model parameters for the bu ck -boost conve rter yie lds
( 1 - s ..i2!..,_}
.ne
D' a 2R
(--R C-) ( 12.40)
G,Js ) = - RI +D
l+ s l -t-D
t
Tuble 12,l Current prog rammed mode srnnll-signal equivalent circuit param eters, simple model
Converter 81 /1 rl 82 h r2
Buck D
R v(I+sk) -02
R
0 00
Boost 0 00 l
D'R
0·(1
-A-)
D" R 2
R
Buck-boost -R
D
0(1+J~) - 752
IYR D2
- D'R
- D'( I - sDL)
D"2 R
R
75

454 C1JrremProgrammed Conrrol
It can be seen th at thi s transfe r fun c tion cont ains only one pole ; the pole due to the inductor has been los t.
TI1e de gain is now directly depen dent on the load resistance R. In addition , the transfer funct ion conta ins
a right ha lf-plane zero whose corner fre quency is unchange d from the du ty -cycle -con trolled case. In gen-
eral, introductio n of cunen t progra mm ing alters the transfer function poles and de gain , but not the
zeroes.
The line -to-output transfer fu nctio n G,/~) is fo un d by setti ng the control in pu t i, to zero , and
then solv ing for the output voltage. The result is
(12.4 1)
ww
Sub st ituti on of the parameter s for the buck -boost co nve rter leads to
w.E , 02
G,./,)= - -1 - l) , ( !+ -....BL
·
I
s I +D
i (12.42 )
asy
Aga in, the indu ctor pole is lost. The ou tpu t impedanc e is
Z".,,(.1·) ::: r2 11 RHs~ (12.43)
For the buck -boost converter, one obta ins

En
z
,,,,,(s) -
- R
T+ D -( gin I
RC ) (12.44)
eer
l +s \ + lJ
12.2.2 A , •eraged Switch Modeling
ing
Addi t ional ph ysica l insight into the prope rties of curr en t programmed converte rs can be obtained by use
.ne
of the avera ged swi tch modeling approach develope d in Sect ion 7.4. Consider the buck converter of Fig.
12.16. We can define the tern1inal voltages and currents of the switch networ k as shown . When the buck
converter operates in the continuous co nduc tion mode, the switch netw or k average term in al waveforms
are related as follows:
t
1 .. .. • •• •~•• •• ••• •••• ••••• •• ••• -- •u u o• ,

L
...------.
+
l 1ii(t)
+ +
v,( t)
T C R v(t)
___Switch _network ...J

Fig. 12.16 Averag ed switch modeling of a current-programmed conve rter : CCM buck examp le.

12.2 A Simple Firsr-Order Model 455
We again invoke the approxim ation in wh ic h the inducto r current exact ly follows the control current. In
tem1s o f th e sw itc h network te rmina l current ii, we can therefore wr ite
(12.46)
ww
The duty cy cle d(t) ca n now be eli min ate d fro m Eq . (12.45), as follows :
(12.47)
w.E
Th is equation can be written in the alternat ive form
asy (12.48)
En
Equations (12.4 6) and (12.48) are the des ired result, which describes the average term in al re lat ions of th e
CCM cu rrent -pro gramme d buck sw it ch network. Equation (12.46 ) states that th e average termina l cur -
rent (ii,(t))7, is equa l to the control curren t (i,(1)\ . Equation (12.48) states that the input port of the
sw itch network con s um es average power (p(t))r, equa l to the average powe r flow ing out of the sw itch
output port. The averaged equ ivalent circui t of Fig . 12.17 is obtained .
gin
Figure 12.17 descr ibes the behavior of the current pro gra mm ed buck converter sw itch netwo rk ,
in a s imp le and straightforward
value (icCt)>r,.
mann er. The swi tch network output port beh ave s as a curren t source of
The input port follow s a powe r sink ch aracteristic , draw ing powe r from the source vKequ a l
to the powe r supplied by the i_.curren t source . Propert ies of the power source and powe r sink elements eer
are described in Chapt ers 11 and 18.
Similar argumen ts lead to th e averaged sw itch mode ls of the cur re nt programmed boost and
ing
.ne
buck-boos t converters , illustrated in Fig. 12.18. In both cases, the sw itch network averaged termin al
wavefo rm s can be represente d by a current source of va lue (i,(t ) )Til'in conjunc ti o n w ith a depen den t
power source or power s ink .
A sma ll-signal ac mode l of th e current -programmed buck converte r c,m now be cons tructed by
perturbation and linea rization of the sw itch network averaged term inal wavefo rm s. Let
t
r ••• --•T••• ·•••••••-••••••••••••••••••----••• •• •••••-•••••-••1
(ii(r))r, 1 l (il i» r, L
.-----+--..---, ..-----+-- +-----'-..I
+
R (v(1))r_
Fig. 12.17 Avera ged 111

odel of CPM buck co11vcr1er.

456 CurrentProgrammed Con/ro/
(a) L , ...... -...·······-~--.

..........................................
!
+
(v,(t))r, C R
..... Averaged switch network .......!
ww (b)
i
!·
~-~---~~~-~----~
I---~----,
i
w.E I
i
I ( p( t))~
s
asy
+
l
;
·.................
......
...........
...... ·················-··-··-···'
+ C R {v(t))r
En L
'
gin
eer
F'ig. 12.18 Averaged models of CPM boost (a) and CPM buck-boo st (b) converters, derived via averaged switch
modeling.
(vicn
)r = '-\ + 1W>
' ing
{i1(t)) 7 = / 1+ii{t)
.ne
'
{vi t)}r,= V2 +vi( r) (12.49)
\i2Ul)r "'I 2 + i , (1)

'
{icCtl)r
, = 1, + 1, (1)
t
Pertu rbation ,md linear ization of lhe (i,(t)\ current source of Fig. 12.17 simp ly leads to a current source
of value i,(I). Perturba tion of the power source characteristic, Eq. ( 12.48), leads to
(12.50 )
Upon equating the de terms on both sides of this equation, we obta in
(12.51)
The linear small -s ignal ac terms of Eq. (12 .50) are

12.2 A Simple First-Order Model 457
+ +
~ IC
Vz- C R v
V1
i Switch network small -signa l ac model 1

t •. ••••...•..•. ••.••...•...•.•.•.... ..... ·- · ··· ··· · ··- ·· ··· ··· ···- ···· ···· ·· ·-·· · ···· ··· --
ww
Fig. 12.19 Smnl I-signal model of the CCM CPM bt1ck converter, derived by perturbation and lioearization of the
switch network in Fig. 12.17.
w.E
So lutio n for the sma ll-sig nal sw itch netwo rk inpu t curren t i1(t) yie ld s
(12.52)
asy (12.53}
The sma ll-s ig nal ac model of Fig. 12.19 ca n now be

co nstru cted . Th e swi tch net work ou tput po rt is agai n a
En Power source
characteristic
curr e nt source, of va lue i,(t). The swi tc h netwo rk inpu t
por t mode l is obt ained by lin eariza ti on of th e powe r
sink characteristic , as give n by Eq. ( 12.53). The inp u t gin .
(v1(t)}r (i 1(t)) 7 = (p(t)) 7
' .
port c urr ent i 1(1) is co mpo sed of thr ee term s. T he ((r)
te rm is modeled by an ind epe nde nt curr e nt so ur ce, the
1\(t) term is modeled by a depe ndent curr ent source, eer
a nd the v1(t) te rm is modeled by an effective ac resis tor
h avi ng the nega tive value - V 1// 1• As ill us trated in Fig .
12.20 , this increme nt a l res istan ce is de te rmin e d by the ing
.ne
slope of th e powe r si nk inpu t port characte ris tic, eva lu -

ated at the qu iesce nt opera ting po int. The powe r sink
t
leads to a negat ive incr e m ent a l re sistance beca use an
increase in (v 1(t)}r, ca uses a dec rease in {i1(t)) 71, such Fig. 12.20 Origin of the input port negative
th at co nsta nt (p(t)) 1, . is main tain ed. incremental resistance r 1: lhc slope of the power
The eq ui va len t circuit of Fig. 12.19 can now sink chara cteristic , e'lla\uated at the quiescent oper-
be sim pl ifie d by use of the de rela ti o ns V2 = DV 1• uting point.

12 = V/R, 11 ==D/ 2 , 12 = Jc. Equat ion ( 12.53) the n
becomes
[ i(t)"" Di,(t) + ~ ii,(1)- ~ 2 0,(1) (12.54)
v
Fin a ll y, we ca n e limin ate the q uant it ies 1 a nd il2 in favor of the co nve rter ter min al vo ltages 118 a nd il, as
v
follows. The qu an tity i\ is s imply eq ual to 8• The quanti t y 02 is eq ual to th e o u tp ut vo lta ge p lus the v
vo ltage across the indu cto r, sli,(s). Hence,

458 Current Programmed Comrol
D "
R v
~
'c C R v
Fig. 12.21 Simplification of the CPM buck converter model of Fig. 12. 19, with d<!pcndentsource expressed in
ww
terms of the output voltag~ v,1ria1ions
.
Oi(s) "'v(s) + sLi c(s) ( 12.S5 )
w.E
With these su b stitut io ns, Eq. (12.54) becomes
asy
( 12.56)
The equi valen t circuit of Fig. 12.21 is now obta in ed. It ca n be ver ified that this equivalent ci rcu it coin -
En
cides with the mode l of Fig. 12.15 and the buck converter parameters of Table 12.1.
The app roximate small -signa l properties of the cu rrent programmed buc k converte r can now be
g
expla ined . Since the indu ctor is in ser ies with the curre nt source( ., the inductor does not contri bu te to the
i
contro l-to-ou tput transfer function . The co ntro l-to -output tr ansfer func ti on is determined sim ply by the
I ( n
rela tion
G,,c(s) = iil(s )
(s) •
I )
= R IIsC
eer (12 .57 )
ing
C ~R=O
So curr ent programming tran sfo rm s the outpu t character ist ic of the buc k converter into a cu rren t source .
.ne
The power sink input charac teristic of the cu rrent progra mmed buck conve rter leads to a nega tive incre -
mental inpu t resistance, as described above . Finally , Fig. 12.21 predicts that the buck co nverter line -to -
ou tput transfer funct ion is zero:
(12 .58)
t
Disturbances in v8 do not influence th e output voltage, since the indu cto r cu rrent depe nds only on ic. The
current prog rammed con troll er adjusts the duty cycle as neces sary to maintain co nstant inducto r curre nt,
regardless of var iations in v~.The more accurate models of Section 12.3 predict that Gv/ s) is not zero,
bu t is nonethe less small in magnitude.
Similar arguments lead to the boost converter sma ll -signal equ ivale nt circu it of Fig. 12.22. Der-
ivat ion of th is equ iva lent c irc uit is lef t as a homework prob lem. In the case of th e boost converter , the
sw itch network inpu t port behaves as a curren t source , of value ic, while the output port is a depe nde nt
power source , equa l to the power app arent ly co nsu med by the current source ic In the small -s igna l
model , the cu rrent source ( appears in series with the indu ctor L, and hence the con verter transfer func -
tions cannot con tain poles arisin g from the inductor. The sw itch network power source outpu t character -
istic leads to an ac resistance of va lue r 2 = R. The line -to -output transfe r func ti on Gv11(s) is nonzero in the

12.3 A More Accurate Model 459
R C R v
Fig. 12.22 Smull-signal model of tl1e CCM CPM boost cun,•erier, derived via averaged switch modeling and
ww
the approximation iL "' i,..
boost converter, since the magni tud e of the power so urce depe nd s directly on the val ue of vg. The con-
trol-to-ou tput transfer function G,..(s) contains a right half-plane zero, identical to the right half-plane
12.3
w.E
zero of the duty-cyc le-contro lled boost converter.
A MORE ACCURATE MODEL
asy
The simp le mode ls discussed in the previous section yie ld much ins igh t into the low-fre quency behavio r
En
of current -programme d converte rs. Un fort unat e ly, they do not always desc ribe every thin g that we need
to know. For example, the. simp le mod el of the buck converter pred icts that the line -to-ou tput tra nsfer
funct ion Gvi s) is zero. Wh ile it is tru e that this transfe r fu nct ion is usua lly sma ll in magn itude , the. trans -
we need to co mput e the actual G,is).

gin
fer fun ction is no t equal to zero. To pred ict the. effect of input vol tage di stur bances on the outpu t voltage ,
In thi s sectio n, a more acc urate analys is is perfo rmed which does not re ly on the approx imation
eer
( i1_(t)\,"' id,_t).The an aly tical approach of [5,6] is com bined with the co ntro ller model of [7]. A func -
tional bloc k dia gram of the current pro1,rrammed controller is constructed , which accoun ts for the. pres-
ence of the artifici al ram p and for the induc tor current ripple. Th is block diagra m is appended to the.
ing
averaged conve rter mode ls der ived in Chapter 7, lea ding to a co mpl ete co nverter CPM model. Mo dels
for the CPM buck , boost , and buck- boost converters are listed , and the buck co nverter model is analyzed
.ne
in detail.
t
12.3.1 Current Programmed Controller Model
Rather than using the approxima ti on (tit )),,._, = (((t))ip let us derive a more accurate expression re lating
the average inducto r current (i l (r)\ , to the control input f..(t). The inductor current wavefonn is illus -
trated in Fig. 12.23. It can be seen that the peak va lue. of i1_(t) d iffers from i,.(t), by the mag nitu de of the
art ific ia l ramp waveform at time t = d:l',, that is, by m,,dT,. The peak and average values of the- indu ctor
c urrent wave.for m di ffer by the average value of the. induc tor current ripple. Under trans ien t con dition s,
in whic h i1_(0) is not equa l to i1_(T,), the. magnitudes of the inducto r current ripples duri ng the dT, and d'T,
subintervals are m 1d7)2 and m2d'TJ2, respective ly. Hence , the average val ue of the indu ctor cu rrent rip -
ple is d(m 1dT/2) + d' (m2d'T/2). We. can express the average. ind uctor current as
( 12.59)

460 Current Prog rammed Contro l
Fig. 12,23 Accura w determinatim:1 of

the relat ion ship be1wee11 the average
inductor current ( iL(I) >r,
and i,.
(iL(t))d7,
(i1,(/))7, = d(i1,(l))dT,+ d'(iL(/)}d7 ,
r,
ww
0 dT,
Thi s is the more accu rate relat ionship wh ic h is em p loyed in this sect ion .
A small -signal current prog rammed co ntroll er model is fo un d by pertur bat ion and lin eariza tion
w.E
of Eq .( 12.59). Let
(i,.(t)) r, = / 1 + ii.(1)
asy (1,,(f)) T, = j + t, ,(f)

d(r)
C
=D + d(t )
111,{1)= M 1+ ii, ,(I )
(12.60 )
En =
mi(r ) M 2 + 1112(1)
gin
Note that it is necessary to pertu rb the slopes m 1 and m2 , since the in ducto r curr en t slope depends on the
converter voltages acco rdin g to Eq. ( 12. 1). For the bas ic buck , boost , and buck - boost co nverters, th e
slope variatio ns are given by
Buck converter
eer
ing
• ii~ - ii
m 1=-L-
Boost converter
(12.61)
.ne
(,
• R
m 1= T
Buck- boost converter
It is assumed that
m1--- iL,
m" does not vary: lh,, = M•. Substit ution of Eq . ( 12.60) into Eq. ( 12.59) lea ds to
t
The first-order ac terms are
(12.63)
With use of the equilibr ium re lations h ip OM 1 : D'M 2 , E~. (12 .63) can be fu rth er simplified:

12.J A More A ccurate Model 461
Table 12.2 Current programmed controller gains for basic convene rs
Convert.er F, F,
Buck D 2T, (1-20)r,

2L 2L
Boost (w - 1)r, u 2 r,
2L 2L
0 2r,
ww Buck- boost D'2 T,

2L" - 2L
w.E D 2T
i L(r) = i it l -M .r,J(t) -Tm
D' 2T .
1(1)---r ni2Ul
(12.64)
asy
Finally, so lution for d(t) yie lds
(12.65)
En
tion of i,(t), ljt), ,111(t), and 11
gin
This is the ac tu al relationship th at the c urr ent programmed controlle r fo llows, to determine d (t) as a fun c -
1,.(t). Since the quant itie s fi11(I), an d (hi(t ) depend on 0/t) and v(t), acco rding
to Eq. (12 .61), we ca n express Eq. ( 12.65 ) in the following form :
eer ( 12.66)
ing
whe re F,,,= llM ..T,. Expres sio ns for the ga ins Fr and F,. for th e b asic bu c k, boost , and buck - boo st co n-
verters, are listed in Tab le 12.2. A functional block dia gra m of the curr e nt programmed cont roll er, corre -
spon din g to Eq . ( 12.66 ), is cons tructed in Fig. 12.24 .
.ne
Curr ent pro grammed co nvert er mo dels ca n now be obt ai ned, by co mbinin g the co ntro lle r block
t
Fig. 12.24 Functional block diagram of the current

programmed controller .
F, F,

462 C11r
re11tProgrammed Control
diagr am of Fig. 12.24 with the averaged conve rter mode ls de rived in Chapter 7. Figure 12.25 illust rates
the CPM conver ter models obtained by combination of Fig. 12.24 with the buck, boost, and buck -boost
models of Fig. 7. 17. For each converter , the current programmed cont roll er contai ns effec ti ve feedback
of the inductor cu rrent iL(I) and the output voltage 11(1), as well as effec tive feedfo rward of the input volt -
age Oil) .
12.3.2 Solution of the CPM Transfer Functions
ww
ext, let us solve the models of Fig. 12.25, to determ ine more accurate express ions for the co ntro l-to -
output and line -to -output tran sfer fun ction s of curren t-programm ed buck , boost , and buck - bo ost convert -
ers. As discusse d in Chapter 8, the con verte r outpu t voltage Ocan be expressed as a fun ctio n of the dut y-
cycle d and inp ut voltage vKvar iations , us ing the tra nsfer fun ctions G,..i(s) and G ,/r):
w.E ( 12.67}
asy
In a sim ilar mann er, the indu ctor current vaiia tion i can be expresse d as a functio n of the dut y-cy cl e
and input voltage 0~ variation s, by defin ing the tran sfer funct ions G,is) and G;/s) :
d
En
( 12.68)
where the tran sfer functions G.,i(s)and G;.(.I') are give n by:
gin
eer
(a) Buck
V,d(t) L
ing
+
JJ(t) v(t) R
.ne
t
fig. 12.25 Mm e acc urute model s o f curr cnt-pro granime<l c<rnvertcrs : (a) huck, (b) huos t, {~) hu ck- bon st.

12.3 A More Acc urate Model 463
(b) Boost
C v(t) R
ww
w.E v
asy
En
(c) Buck-boost
gin
L (V8 - V)d(t)
eer +
ing
C v(t) R
.ne
t
--------- vR- v
Fig, 12.25 Continued .

464 Cu,.,-elllProgrammed Control
CPM
controller
model
v
.
,, d
ww
w.E
asy
Fig. 12.26 Block diagram that models the current-programmed converters of fig . 12.25 .
En
gin ( 12.69)
eer
Figu re 12.26 ilJustrates replacement of the converter circuit mode ls of Fig. 12.25 with block diagrams
that correspond to Eqs. ( 12.67 ) and ( 12.68 ).
ing
The contro l-to-output and line -to-output transfer funct ions can now be fou nd, by manipu lation
of the block diagram of Fig. 12.26, or by alge braic e limination of d and 11_ from Eqs. (12.66), ( 12.67), and
( 12.68), and solution for v. Substitu ti on of Eq . ( 12.68) into Eq. ( 12.66) and solution fo rd leads to
.ne
J=( F.,
, . ) [ le-
I +1 ,.,G,,1
• (0i,:+r L')·v, .....1·vv··1
By substi tut ing th is expression into Eq. ( 12 .67), one obtains

8
( 12.70)
t
• = -(- FmGwl i·[·I C -

V
I +F.,G;d
(G + 1· )·
i~ l.i: \I X -
p·j G •
~v + )'~vg ( 12.71)
So lution of this equa tion for v leads to the des ired result:
( 12.72)
Therefore, the curren t-pro gramm ed contro l-to-output tran sfer fu nctio n is

/2.3 A More Accurate Model 465
G,..(s); f(.~I = F",G,, , (12.73)

1,.(s) D/ •t~o l + F,.(G,,1+ F,G.,,.)
The current-progra mm ed line-to-o utput transfe r functio n is
(12.74)
ww
Equa tion s ( l 2.73) and (12 .74) are ge neral express ions for the import ant tra nsfer fu ncti ons of sing le-
induc tor current-prog ramm ed converters operat ing in the co ntinuou s co nd uct ion mode.
12.3.3
w.E
Discussion
asy
The co ntro ller model of Eq. (12.66) and Fig. 12.24 acco unts for the diffe re nces between iL and ( th at
arise by two mecha nisms: the inductor c urre nt ripp le and the arti fic ial ram p. The ind uc tor cu rre nt ripp le
ca uses the peak and ave rage val ues of th e indu cto r curr ent to differ; th is leads to a dev iation betwee n the
En
average ind ucto r c urrent and i0 • Sin ce the m ag ni tud e of the indu ctor cu rre nt ripp le is a functio n of the
co nverter in put and capaci tor vo ltages, th is mechan ism intro duces v& an d v de pe nden cies into the co ntrol-
ler small -signal block di agra m. Thu s, the F, and F, gain blocks of Fig . 12.24 model the small -signal
gin
effec ts of the ind ucto r curr ent rippl e. For opera tion deep in co ntinu ous co nducti o n mode (21JRT, > I),
the indu ctor c urrent ripp le is small. The Fx and F, gain bloc ks can then be ignored, and the induc tor cur-
eer
rent ripp le has neg ligible effec t on th e curr e nt prog ramm ed co ntrolle r gai n .
The ar tifici al ramp al so cau ses the average induc tor curr ent to differ fro m i,- T his is modeled by
th e gain b lock F,., whi c h de pends in ve rsely on the art ificia l ram p slope M •. Wit h no artificia l ramp ,
ing
M,, =d) and Fmtends to infin it y. The c urr ent-progra mm ed co nt ro l syste ms of Fig. 12.25 then effec ti ve ly
have in fi n ite loop gai n. Since the du ty cycle J is fini te , the sig nal at the inp u t to the F"' block (JIF ,.) mu st
tend to zero. The b loc k di agra m then predicts tha t
.ne
J O= l• c--1 • 1. -r,:'-.i~-
Fm= ,.•' F vV" (12.75)
In the case of neglig ib le indu ctor c urre nt ri pple (FK- ' 0 and F,-> 0), thi s equ atio n furth er reduces to
(12.76)
t
This coincides w ith the si mple approxi mation employe d in Secti on 12.2. Hence, the transfe r fu nc tion s
predicted in this section red uce to the resu lts o f Section 12.2 when there is no art ific ial ramp and neg ligi-
ble inductor curre nt ripple. In the lim it when F,,, • • 00 , Fg --,.0, an d F, .-,. 0, the co ntrol-to-output transfer
fu nctio n ( 12.73) reduces to
(l2.77)
and the line-to-o utput tran sfer function reduces to

466 Cun-ent Programmed Control
. G,~G,,1-G,~C"1
hm G,s-c,,m
(s) "' GjJ (12.78)
Fm )""
f'~---:, 0
,.·v~ o
It can be ver ified that Eqs. ( 12.77) and (12 .78) are eq uivalent to the transfer functions derived in Section
12.2.
When an artificial ramp is present , then the gain F,,, is reduced to a fi ni te v alue . The current -pro -
grammed controller no longer perfe ctly regulates the induc tor curre nt iL, and the terms on the righ t-ha nd
side of Eq. ( 12.75) do no t add to zero . In the extreme case of a very large artifici a l ramp (large M,.and
ww
hence small F,,,), the curr ent -pro gra mmed controller degenera tes to du ty-cycle con trol, The art ific ia l
ramp and ana log compa rator of Fig. 12.8 then function as a pu lse -wi dth modu lator sim ilar to Fig. 7.63,
wit h small -signal gain Fm. For small F,.1 and for FR -> 0, F, -> 0 , the control -to-outpu t tra nsfe r funct ion
w.E
(12.73 ) reduce s to
Jim G,.Js )"' F.,,<J

i,,mallt m
,.,1(s)
(12.79 )
asy
f~, -) (~
f'-'< >0
which coincides wit h conventiona l duty cycle control. Likew ise, Eq. ( 12 .74) reduc es to
En (12.S O)
gin
which is the line-to-output transfer function for convent iona l du ty cy cle control.
12.3.4 Current-Programmed Transfer Functions of the CCM Buck Converter eer

ing
The contro l-to -ou tput transfer functio n G,.,ls) and lin e-to -output tra nsfe r fu nction Gv/s ) of the CCM
.ne
buck conve rter wi th dut y cycle contro l are tabulated in Ch apter 8, by a nal ys is o f the eq uivalent circ u it
mode l in Fig. 7.17(a) . The results are:
G ' s) - 1:'.._I _
"" - V dm(s )
(12,81)
t
C ,.,(s)=D 1-
-de11(s) (12 .82)
w here the denom inato r polyno mia l is
den(s} = I+ ~- ~ + s 2LC ( 12.83 )
Th e induc tor cu rren t tran sfer functions G;,i(s) and G;1/~) defined by Eqs . ( 12.68) and ( 12 .69) are also
found by so lution of the equivale nt circu it model in Fig . 7 .17(a) , with the fo llow ing results:
V (1+sRC) ( 12.84)
G,.(s ) = OR de11(s)

12. 3 A Mo re Accurat e Model 467
_ v (l+ sRC) ( 12 .85)

G;,(s ) - R de11(I) ·
where den(s) is again given by Eq. ( 12.83).

W ith no artific ial ram p and neg ligible ripple, the control-to -outpu t transfer functio n reduces to
the idea.I expressio n (12.77). Substitution ofE qs. ( 12.8 1) and ( 12.84) yields
1• G ( G,.i l) R
· im oo
~m-+
'«· s) - ·c u/\.s
. 1 ·) - I+ sRC ( 12.86)
ww
FA --;Q
F,,-¼ 0
Under the same co nditions, the line-to-output transfer functio n reduces to the ideal express ion (12.78) .
w.E
Subs titution of Eqs. (12.8 1) to (12.85) leads to
( 12.87)
asy
Equatio ns (12.86) and (12.87) coincide wit h the express ions derived in Section 12.2 for the CCM buck
conve rter.
En
For arbitrary F,,,,F,,, and F8 , the control-to-output transfer function is given by Eq. (12.73). Sub-
stitution of Eqs. (12.81) to (12.85) into Eq. ( 12.73) yields
F gin
(Y I-)
eer
F G "' D d en(s )
G~"{s )=- ,11 .1, '(, =- __ __ . __ (!2. 88)
! + F.,,, G,
,1
+ F,C.,,1 l + F [[_L_I+.,Re_\+ F''li_v_
"' DR den(,') }
- 1- )j
D den(.1)
Simplifica tion leads to ing

.ne
F V
F V "'0
(12,89)
G,.,(s)= --- -V
(s) +
de11 DR(
l + sRC)+ F,,,f , D
Finally, the control-to-output transfer function can be written in the follow ing norma lized form: t
G,o
G ( )
•.,.., = -
I+ L
, . (-:--
)2
+ .2....
(12.90)
Q,w,. w,
where
G<J=y_ _ _ _f-',,._ -- ( 12. 91)

, D 1 + .f:,;, i_+ F,,.F.V
DR D
( 12 .92)

468 Curre ll/ Programn1ed Control
V
/ 1+ f.,,V-------r-J,.V
DR +-o
(12.93)
- -( l + R~i,
V)-
In the above equ atio ns, the sal ie nt feat ures G,.0 , u\ ., and Q<.are ex presse d as the d uty -ra tio-c on tro l va lue ,
mul tipl ied by a factor th at acco unt s for the effec ts of cu rren t-progra mme d contro l.
It can be seen from Eq. (12 .93) th at curr ent pro g ram m ing te nd s to red uce the Q-factor of the
poles . For large F111, Q,, varies as r:,.-
112; conseq ue nt ly, the poles beco me rea l and we ll-separate d in mag-
ww
ni tude. The low-Q approx ima tio n of Section 8. 1.7 th en pr edict s that the low -fre quency pole becomes
-+ F,,/~
( I +-F.,,V -V)
R DH D
w.E
Qw = -------- ( 12.94 )
,. ,. l ( RCF V )
I +- -m
DI.
asy
For large F and sma ll Fv, th is expressio n can be further ap proxima ted as
11,
(12 .9:'i)
En
whi ch co incides wit h th e low -frequ e ncy po le predicte d by the simple model of Sec tion 12.2. The low-Q
appro xima ti on also pred icts th at the hi gh-freq uency pole beco mes
~
Q,-
-__l__
RC gin
(t+ RCF,,,V)
DL
(12 .96 )
For large F,,,.th is express ion ca n be fur ther appro xim a ted as eer
ing (12 .97 )
.ne
Th e high-freq uency pole is typica lly pred icted to lie near to or grea ter th an the sw itch.ing freque ncy / ,. It
should be poi nted out th at th e co nverter switc hin g and modulator sa mp li ng processes lead to d iscre te-
ti me pheno mena th at affect the h ig h-fre qu e ncy behav ior of the conve rter , and that are not pr edicted by
th e co ntin uo us-time ave raged analys is employe d here. Hence, th e ave raged mode l is va l id o nl y at fre -
quen c ies su ffic ien tly less than one-ha lfofthe sw itc h ing frequ e ncy ,
For arbitrary Fm,F,,, and FR, the cur rent -program med line -to-output tran sfer funct io n G,.~-f/,,,,(s )
t
is give n by Eq. (12.74) . Thi s eq ua tion is most eas ily eval uated by first finding th e ideal tr ansfer funct ion ,
Eq. (12.78), and the n usin g the res ult to si mp lify Eq. (12 .74). In the case of the buck converter, Eq.
( 12.87) shows that the q uant ity (G,,p,.,r GvJG;g) is equa l to zero. Hence, Eq. (12.74) beco mes
1 + F,
, _ G,, - F.,,F,G.,, ,,{O)
G ,g-cp_,(.1)- ( --. - (12 .98)
1 + F,, G1d+ F,G,,u 1
Su bstitution of Eqs. ( 12.8 1) to ( 12.85) into Eq. ( 12.98) yields

12.3 A More Accurate Model 469
_fl__F F f__l_
de11(s) '" g D den(s)
r,,.(s)=
G,~-,- ( ) ( 12.99)
l +F L I + sRC + F x__ I_
"' DR den(s) 'D den(s )
Simp lification leads to
(12.100 )
ww
Finally, the c urrent -programme d line-to-output tran sfer function can be written in the following nonnal -
w.E
ized form:
=
C 'R"1'-'"(s) s + (-s )2
I+-- -
(12 . 101)
asy
Qc<»,. w,
where
En (12.102 )
gin
The quantities Q,,and ro,. are give n by Eqs. (12.92) and (12.93).
eer
Equation (12.102) shows how cu rrent programming reduces the de gain of the buck converte r
ing
line-to-output transfer function. For duty cycle control (F.,.---->0), 0 110 is equal to D. Nonzero values of F111
reduce the numerator and increase the denom inat or of Eq. ( 12. 102), which tends to reduce Ggo· We have
already seen that , in the idea l case (F,,. --> oo, FR -> 0, F, -, 0), G110 becomes zero . Equa tion (12. 102)
revea ls that nonideal current -programmed buck converters can also exhibi t zero Ggo•if the artifici al ramp
.ne
slope Ma is chosen equal to 0.5M2 . The c urrent program med controller then prevents input line voltage
variations from reaching the output. The mechanism tha t leads to this result is the effect ive feedfo rwar d
of v6, inherent in the current program med controller via the F/K term in Eq. (12.66). It can be seen from
Fig. 12.26 that, whe n F 8F,.Gv/s) = G.is), the n the feedforward path fro m 08 through F8 induces varia -
tions in the outp ut v that exact ly cancel the v, -induce d variations in the direct forward path of the con-
verter through G,/s). This cancellation occurs in the buck converter when M., = 0.5M 2 .
t
12.3.5 Results for Basic Converters
The transfer fu nction s of the basic buck, boost, and buck -boos t conve rters with curre nt-pro grammed con-
trol are summ ar ized in Tables 12.3 to 12.5. Control -to-output and line -to-outpu t transfer functions for
both the simple mode l of Section 12.2 and the more accurate model deri ved in th is section are listed. For
comple teness, the transfe r funct ions for d uty cycle contro l are inclu ded. In each case, the salient featur es
are expres sed as the correspo ndin g quantity with duty cycle contro l, multiplied by a factor that accounts
for current -pro gra mmed control.

Table 12.3 Summary of results for the CPM buck converter
Simple model Dutycycle controlledgains

i_ = __ R_ G (s) -Y_l_ G 's)-L 1 + sRC
t, l + sRC "'' - D den(s) '"' - DR den(s)
$. .. o G.is ) =D~ G,gCs) "'j den(s)
VI
den(s) = I +si +s 1LC

More accuratemodel
, , =G,J..s) =Gc0 I +-
.j.. .r 1 ( r r G - ~ F,.
ww
- + ..,__ «>- D ( I F.,V F.,F,V )
Q,w, w, +DR+ D
1 V I + F.,V F.F.V fc
Ji +Di[+-;r-
J..,V /..,P.V
DR + ~
w.E
W, = v7;c Q. = R y l ( RCF,,,V)
I+~
(1- ~F.,F1 V)
$.
v8
=Gvz-cp,n(s)
=G,o I +-S-+. 1
asy
Q,w,
(
..L
w<
}2 G,o= D
(l+DR+D
F.,V F.,F. V )
Table 12.4 Summary of results for the CPM boost co11vt:rler

En
Simple model
(i-s~) gin
Dutycycle controlledgains
V(1-s[Y
~R)
eer
ii D'R ( l +sR 2 )
G,,,,(s}= 75' G ,(s) - 2V
· =2 den(s)
1c (i+sRF) u - D'2R den(s)
..L ,,...L 1
v1 2D'( i +s Rr )
G (s) - ..!.._l_
•s - D' den(s)
ing
l
Gis) = D'2R
(t +s RC)
den(s)
.ne
More accuratemodel
•
-?
t,
= G,,,(s)= G.o I+
(1-s+)R
,we
s
D'
+ L
(
lt)('
)z t
D' I 2F,.V F,.F,V

w,=J[c + D'2R +---yr-
ii
...L)
( I+ w1,
0
g
=G,,-cp,n(s) =G&()! +--+S ( S
-w,
)2
Q,w,

12.3 A More Accurat e Model 471
Tobie IZ.S Summary of resuJcs for the CPM buck-boost convert-er
Simple model Duty cycle controlledgains
v D'R ( I - s "iifji
DL) 1vi(1-s gfR
)
T, = - (I+ D) (i+ s RC )
l +D
) =- DD'
G.,/...s den(s)
0 D1 G (s) =-D_I _
D (1+sRC)
~ = -1 - D 1 (i+s1RC)
+D
•s D' den(s) G,:,C
s) = D'1R den(s)
ww
More accurate model
den(s) = I + s __j,_
1 + s 2 LC1
D' R D'
0
.-
,, w.E (1-s~)
=G,j. s} =Gc0 l+--+ s
Q,ooc
(s
-
oo,
)2
_ IVJ
G'°-- DD' (
F,.
F.,Iv l(t + o) FJ.Ivi)
l + ~- o"'"
a"'z-
R--'- _ D_D_'-
asy I?"
Q , = D'R y7 I+
F.,IVJ(t+D) F,.F
DD'1R -~
,IVI
-----,-------------------,--
vi)
En I vJRC F,.F.I
( 1 + F.. DL + D'
0
.,,- = G.,.,P,.(s) = G,o
Vt
(l + s )
~
J+ - S- +
Q,ooc
(
c&:
<
2)
gin
eer
The two poles of the line -to -output transfer functions G,8 .,.P"' and contro l-to-output transfe r
funct ions G,.._.
of all three co nverters typ ically exhibit low Q-fac tors in CPM . The low -Q approximation ing
can be applied, as in Eqs. (12.94) to (12 .97), to find the low -frequency pole. The line -to-output tra nsfer
.ne
functions of the boost and buck- boost conv erter s exhibit two poles and one zero, with sub stantia l de
t
garn.
12.3.6 Quantitative Effects of Current-Programmed Control

on the Com•erter Transfer Functions
The frequency responses of a CCM buck converter, operati ng with curr ent-p rogra mmed contro l and with
duty cy cle control, are compared in Appendix B, Section B.3.2. The buck converter of Fig. 8. 25 was
simulated as described in Appendix B, and the resu lting plots are reproduced here.
The magnitude and phase of the contro l-to-output transfer fun ctions are illustrated in Fig .
12.27. It can be seen that, for duty cycle control, the transfer funct ion G,,,t(s)exhib its a resonant two-pole
response. The s ubstantial damping introduce d by curre nt-prog ramm ed contro l leads to esse ntially a s in-
gle -pole response in the current -programmed contro l-to-output tran sfer function G 0/s) . A second pole
appears in the vicinity of JOOkHz, which is ne,u the 200 kHz swi tching frequency . Because of this effec-
tive single-pole respon se, it is relat ively easy to desi gn a contro ller that exhibits a we ll-behaved response ,

40dB
IIGII LG
OdB
- WdB
-40dB
o·
ww
LGw1
-60d8
_90•
w.E -l-------
lOHz tOOHz
-----:::::::e: ......
lkH:i.
---
lOkHz
----1-- 180'
lOOkHz
asy f
Fig. 12,27 Comparison of CPM control with tluly-cyde control, for lhe cnntrol -lo-nutput frequency rcs110nst: of
En
the buck convene r example.
II Gvg
20dB
II
OdBJ----------- gin
Duty cycle control
d(t) = constant
-20dB
eer
-40dB.t---
-60 dB
---~
Current programmed mode ing

v0(1) = constant
.ne
- 80dB
-100 dB +------+-
IOHz
--
JOOHz
----1--
I kHz
f
- --+----
IOkHz
- -+
100 kHz
t
Fig. 12.28 Comparison ot"CPM contro l with duty-cyc!t: control, fol' the line-to-output frt:quency response of th~
buck converter example.
hav ing ampl e phase margin over a wide range of operating po ints. Propo rti ona l-plus -integra l (Pl) con -
troll ers are co mmonl y used in current -prog rammed regulators .
The lin e-to-output transfe r functions of the same example are compared in Fig. 12.28. The lin e-
to-output transfer fu nction G,/s) for duty -cycle control is characte rized by a de asymptote approxi -
mately equal to the duty cy cle D = 0 .676. Reso nant poles occu r at the comer frequency of the l,-C filter.
The line -to-ou tput transfer function Gv8 _9 ,,,,(s) with curren t-pro grammed co ntro l is sign ificant ly reduced ,
and exhibits more than 30 dB of add itiona l attenuat ion over the frequenc ies of interest . It sho uld again be

12.4 Discominuom Conduction Mode 473
20 dBQt-----
ll ZOU/ II
OdBQ
Duty cycle control

d(t) = constan t
-20d BO
ww
w.E
-40d BO -1------1-------+-- - - --+-- ---+-
IOHz IOOHz I kHz IOkHz IOOkHz
f
asy
Fig. 12.29 Cotnp nriso11o f CPM co11tro l with duty -cycl e control, fur the output impedance of the buc k converter
example .
En
noted that the tran sfer fu nction G\ g-q,m(s) in Fig. 12.28 cannot be predic ted by the si mpl e mode ls of Sec-
tion 12.2; the more acc ura te mode l of Sec tion 12.3 must be employe d .
The effec t of c urr ent -progra mmed co ntrol on the co nverter output impe dan ce is ill u strated in
gin
Fig. 12.29. TI1e o utp ut impedance plotte d in the figu re inclu des the load res istance of IO Q. For du ty-
cycle co ntro l, the de asy mpt ote of the out put impe dance is dominated by the ind uctor w in ding resis tance
of 0.05 Q. The indu ctor beco mes significan t in the vic init y o f 200 Hz . Above the resona nt freque ncy of
eer
the o utpu t fi lter, the o utput impedance is do mina ted by the out put filter ca pacito r. For current- pro-
gramm ed co ntro l, the si mple mode l of Sect ion 12.2 pred icts th at the ind uctor bra nch of the circ uit is
ing
drive n by a cur re n t source ; thi s effectively removes the in fl ue nce of the indu cto r o n the outp ut imp ed-
ance . The plot of Fig. 12.29 was generated us in g the more acc ura te model of th is sec tion; nonetheless,
the outpu t im pedance is accurately predicte d by the simple model. The de asym ptote is dom inated by the
.ne
load resistance, and the high -frequency asy mptote follows the impedance of the output filter capac itor. It
ca n be seen that curr ent progra mmin g su bsta nti ally incre ases the co nve rter o utput im pedance .
12.4 DISCONTlNUOUS COND CTION MODE
Curre nt-progr amm ed co nverters opera tin g in the d isco ntinu o us con du ct ion mode can be descr ibed us ing
t
the ave raged sw itch mode lin g approaches of Sec tions 12.3 and I I. I. It is fo un d in th is sec tion th at the
average transistor vo ltage and c urre nt foll ow a power sink characte ristic , whi le the average dio de vo ltage
and curre nt obey a power source charac teri stic . Perturb ation and linearizat ion of these charac terist ics
leads to a small-sign al eq uiva lent circu it that models CPM Dct vl conver ters. TI1e basic DCM CPM buck,
boost, and bu ck- boos t co nverter s esse nti all y ex h ibi t single-pol e tran sfe r fun ctions: the second pol e and
the right half -p la ne zero appea r at freq uenc ies nea r to or greater th an the sw itc hin g freq uency , ow ing to
the small val ue of Lin DCM .
A DCM CPM buc k- boos t co nverter exa mp le is analyzed here . Howeve r, Eqs . ( 12.103) to
(12. 120) are wr itten in genera l form , and ap pl y eq ually well to DCM CPM buck and boost conve rters.
The schema tic of a buck-boost conve rter is ill ust rated in Fig. 12.30. The te rm in al wavefom1s of the
sw itch netwo rk are defi ned as shown: v 1(1) and i 1(t ) ,u-e the tran sistor wavefo rm s, wh ile vi t) and iit) are

474 Currem Programmed Conrrol
Switch network
Fig, 12.30 C urrent-programmed DCM
buck- boost converter ex:imple. +
+
+
I-
C R v(t)
L
i,_(r)
ww
the diode waveforms. Figure 12.3 1 illu stra tes typica l DCM wavefo rm s , for curr ent -programmed control
with an artific ial ramp hav in g slope - m".The indu cto r curren t is zero at the beginning of each sw itch ing
w.E
period . By so lut ion of the transistor co nduct ion subi nt erval , the programmed cur rent ipk ca n be related to
the transisto r dut y cyc le d 1 by:
i , = i1,, + m 0 d 1'f,
asy
(12.l03 )
= (m+ m.)dT,
1 1
En
Solution for d 1 leads to
gin
(12. I04 )
eer
The avera ge transistor cur ren t is found by inte grat in g the i 1(t) waveform of Fig. 12.3 1 over one sw itchin g
period:
ing (12 .105)
The total area q I is equa l to one -half o f the peak cur rent i,,k• multiplied by the subinte rva l length
.ne <1i7
;.
Hence,
Elimination of i1,k and d 1, to express the average transistor c u rre nt as a function of i,.. leads to
(12. l06)
t
(12.!07)
Finall y, Eq. ( 12.107) ca n be rearranged to obta in the averaged sw itch network inp u t po rt re la tio nship :
(12. 108)

12.4 Discontinuous Co11d

uctio11Mode 475
Thus , the average trnns istor wavefor ms obey a power sink il(t)
characte ristic. When m. = 0, then the average power
(p(t))r, is a function on ly of L, i,, and f. .. The presence of
the artific ial ramp causes (p(t)}r, to add itionally depend ic
on the conve rter voltages, via m 1•
The power sink charac teristic can also be
exp lained via inductor energy arguments. Durin g the first
sub interval , the inductor current increases from Oto ip~·In
the process, the induc tor stores the followi ng ene rgy :
ww
The energy W is transferred from the power input vR.
w.E
through the switch network input port, to the induc tor,
once per switching period. This energy transfer process
accounts fo r the power flow
0
asy
En
The switch network inpu t port, tha t is, the trans isto r ter-
minal s, can therefore be modeled by a power si nk ele-
ment, as in Fig. 12.32.
The average sw itch network output port current,
that is, the average diode cu rrent, is gin . !
(iitl)r = -7I. J''+ 1., ii't) ?
dt = l1? ( 12.lll )
eeri Areaq 2 i
ing
.J" ., J J
,!,.=,
:,
By inspection of Fig. 12.31, the area q2 is give n by (ii{t)) r i j
-----
•• •oH .... . .. .. 1 OH
•• •}• ·••••••• ••• ; ••••on o, -.a,
: :
.ne
(12. 112)
- -- • ;,._._.. ;
d2 T, ' d3 T, r.
t
The duty cycle d2 is detenn ined by the time requi red for - ---- T, --- - ~
the induc tor curre nt to retw-n to zero, during the second
subinterva l. By ,uguments simihu· to those used to derive Fig. 12.31 Waveforms, CPM DCM buck- boost
example.
Eq. (11.12) , the duty cyc le d 2 can be found as follows:
(l 2. ll 3)
Sub stitution of Eqs. ( 12. 113), ( 12.1 12), and ( 12.110) into Eq. ( 12.1 I I) yields
(12. 114)
The outpu t port of th e ave raged sw itch network is therefore described by the re lationship

476 Current Programmed Comro/
{i,(t)
)Ts (ii t))T s
+
+
(v1(t))T (vi(t))T ,
'
h(t) ) Ts + + C R ( v(t)} 7
s
ww
Fig. 12.32 CPM DCM buck- boost converter model, derived via averaged switch modeling.
w.E (12 .l 15)
asy
In the averaged mode l, the diode can be replaced by a power source of va lue (p (l)) r,• equa l to the power
apparently co nsumed at the sw itch network inpu t port. Dur ing the secon d sub interv al, th e inductor
En
releases all of its stored energy th rough the diode, to the converte r outpu t. Th is results in an average
power flow of valu e <P(I) )'I'..
,
A CPM DCM buck-boos t averaged model is therefore as given in Fig. 12.32. In th is model , the
source also of va lue (p(I)\ •.

gin
transistor is simply replaced by a power s ink of va lue (p(t) )r,.• whi le the diode is replaced by a power
The steady -state equivalen t cir cuit mode l of th e CPM DCM buck -boost converter is ob tained by
eer
letting the inductor and capac itor tend to short- ,md ope n-circui ts, respectively. The model of Fig. 12.33
is obtained. The steady -state o utput voltage V can now be determi ned by equa ti ng the de load power to
ing
the conve1t er average power (p(t)\. For a res istive load, one obta ins
(12 . l 16)
.ne
where the stea dy state va lue of (p(t) \ , is give n by
{12.117)
t
and where [.. is the steady -state va lue of the control inpu t i,(t) . Solution for Vyields the fo llowin g result
+
Fig. 12.33 Steady-state model of the CPM DCM
buck- boost converter.
R V

12.4 Disco11ti1111
ous Conduction Mode 477
(a) L
+
Fig. 12.34 Averaged models

of current -programme d DCM
(va(t))T I
C R {v<t)}T .
converters: (a) buck, (b) boost.
ww
(b)
w.E ( v,(t) ) T, C R {l\f))T .

asy
En (12.11 8)
for the case of a resistive load.

gin
Averaged models of the DCM CPM buck , boost, and other co nverte rs can be found in a simi lar
eer
manner. In each case, the average transi stor waveforms ,u·e shown to follow a power sink char acteristic,
wh ile the average diode waveforms follow a power source characteris tic. The resul ting equ ivale nt ci r-
cu its of the CPM DCM buck and boost converters are illustra ted in Fig. 12.34. In eac h case , the avera ge
power is given by
ing
.ne
Table 12.6 Steady-srnte DCM current-p rogrammed characteristics of basic converters
Converter M Stability range when ma= 0 t

Buck ½(1c-MmT,)
0 OS M <!
Boost (1,-¥m r,) 0 05.D5, I

2M
Buck- boost
Depends on load characteristic : (1,-~ m.r.} 05.D5, I
P1°""=P
2(M-1)

478 Ct1rre11tProgrammedCo11trol
(a) ;, ;l L ;,
+ + +
P, r, f, ;, g,V: g,v, J,l, r, P, C R v
(b)
{,._ L l, .
,,
ww + + +
P, r, 8•'':a ,, P, C R v
(c)
w.E
asy
I, {,
En
Iii, +
+ + C R
L g. in
,,
eer
ing
Fig. 12.35 Small-signal models of DCM CPM convert.ers, derived by perturbation and line11riza1ion of Figs
12.32 and 12.34: (u) buck, (b) boost, (c) buck-boost.
.ne
~ li~(t)f ,
(r,(t))r., = (.l + mu.
)2 (12 . l 19)
with m 1defined as in Eq. ( 12. l).

m,
t
Steady -state ch aracteristi cs of the DCM CPM buck , boost , and buck- boost conve rters are sum -
ma rized in Table 12.6. In each case, the de load power is P"""' ==VI and P is given by Eq. ( 12. 117). The
condit ions for ope ration ofa curren t programmed converter in the d iscon ti nuous con ductio n mode can be
expressed as follows:
I/ I> I/crir I for CCM (12.120)

IIl<ll,,;,I forlKM
where l is the de load current. The critica l load current at the CCM- DCM bound ary, !" '" is expressed as
a function of I, and the volta ge convers ion ratio M = \1/Vg in Tab le 12.6.
In the discont in uous con ductio n mode, the indu ctor current is zero at the be ginning and end of

12.4 Disco11ti11uo11s
Cond11
ctio11Mode 479
Tablt 12.7 Cum:n t pmgrnmmed DCM smull-signal c4uivalenl circ uit pi1rameters: inp11tpl)l't
Converter f1 r,
Buck 2!.i. )( I + 3!)

-R(L:.M. m,
IC
Mz (I-::)
R
-i(M~l) 2L +2n
1,1m,)
ww
Boost M2(2-M
I, M- l l '"•
+ mi
m,,)
w.E
(l +
Buck- boost 0 2!.i. - R m,
Jc
w (1-::)
Table 12.11 C11
asy
rrcI1lpru grn mmed IJC M sma ll-signal «1u iv,1le nt circuit parnmeters: output pun
En
Converter 82 f2 rz
(m•
1.(_M_) (2- M}- M) (1-M)(1+7,:~)
Buck
R 1-M
mj
(l + ::)
gin
2j__
IC
R
( l - 2M + ::)
Boost { (M~J) 2 !.I eer R(MMI)
ing
IC
(m,
m.}
.ne
2M 2!.1.
Buck- boost R
R l,
(1+ ::)
each swi tching period . As a result, the current programmed controller does not exhibi t the type of insta-
bility descr ibed in Section 12.1. The current programmed controllers of DCM boost and buck- boos t co n-
t
verte rs arc stable for all duty cycles with no artifi cial ramp. However, the CPM DCM buck co nverter
exhibits a different type of low-frequency instability when M > 2/3 and m. = 0, that arises because the de
output charac teristic is non linea r and can exhibit two equi librium points when the converte r drives a
resistive load. The stability range can be extended to O :-:;D .'.S:I by addition of an artificial ramp have
slope 1110 > 0.086 m2 , or by addition of output vo ltage feedback.
Small-signa l mode ls of DCM CPM converters can be derived by perturbation and linearizat ion
of the averaged models of Figs. 12.32 and 12.34. The results are given in Fig . 12.35. Parameters of the
small -signal models are listed in Tables 12.7 and 12.8.
Th e CPM DCM small -signal models of Fig. 12.35 are quite similar to the respective small -sig-
nal models of DCM duty -ratio controlled converters illustrated in Figs. 11.1S and 11.17. The sole differ -
ences are the parameter exp ress ions of Tab les 12.7 and 12.8. Transfer functions can be determined in a

480 Currem Programmed Co111rol
v, R v
Fig. 12.36 Simplifi ed snia!l-.~igna l moclel obtained by lettin g I. hecome zero in Fig. 12.35 (a), (b), or (c).
ww
s imil ar manner. In part icu lar, a simp le approx imate way to determin e the low-frequency small-sig nal
transfer functions of the CPM DCM bu ck, boost, and buck -boos t converters is to simp ly let the indu c-
w.E
tance L tend to zero in the equiv ale nt circ uit s of Fig. 12.35. This approxim ati on is j usti fied for frequen -
cies sufficient ly less than the converter switching frequency, because in the discont inuo us conduction
mode the value of L is smal l, and hence the pole and any RHP zero assoc iated wit h L occur at frequen -
cies near to or greate r than the sw itching freq uency . For all three converte rs, th e equiva le nt circuit of Fig.
12.36 is obta ined .
asy
Figure 12.36 predict s that the co ntro l-to-o utpu t tra ns fer fun cti on G.,.(s) is
En = ,-0 I
G,c<-~)
'" '"
_ G,-0
- ---s-·
1+ '\JJ
,.,{1
(12 . 121)
gin
Vg ""- U
with
G,11=.h(Rfirz)
w -- I_
eer
ing
1' - (Rf1r
2 )C
The line-to-o utput transfer function is predicted to be
.ne
(12. 122)
with
t
If desired, more accur ate expres sio ns which acco unt for ind uctor dy nam ics ca n be der ived by sol utio n of
th e mod els of Fi g. 12.35.
I. In current-programmed control, the peak switch current i,(t) follows the control input i,.(r). This wide ly
used control scheme has the advantage of a simpler control-t o-out put tra nsfer funct ion. The line- to- outpu t
transfer functions of cu1Tent-programmed buck conveners are also reduced.

Refe rences 481
2. T he basic cu tTe nL-pro grammed controlle r is un sta ble when D > 0.5, rega rdless of the co nverter topology.
The cont ro ller can be stab ilized by addit ion o f an ar ti ficia l ramp havi ng slope m.,. W hen 1110 > 0.5111
2, then
the contro ller is stab le for all duty cycles.
3. The behavior of cu rrent -prog rammed con verters can be modeled in a simple and in tu it i ve manner by the
fir st-order approxi mation {iL(1))7;"' ip). The averaged term inal wa vefo rm s of the sw itc h network can then
be modeled si mp ly by a c urren t source of va lue ir, in co nj unc tion wi th a powe r sink or power sou rce ele-
men t. Perturba tion and li nearizat ion of these elements leads to the small-signa l mode l. Alternative ly, the
small -signa l converter equatio ns der ived in Chapter 7 can be adapte d to cover the cu rre nt progra mmed
mode, usi ng the simple approximat io n i/1 ) "'i/1 ).
ww
4. T he simple model predicts that one po le is e liminat ed from the converte r line -to-o utput an d con u·ol-to- out -
put transfer funct ions. Cu rren t progra mm ing does not alter the tran sfe r func tio n zeroes. The de gains
become load -depe ndent.
w.E
5. The more acc urate mode l of Section 12.3 correct ly acco unts for the d ifference between the average induc-
tor current (iL(t)\, and the control input i,( t). This model predic ts the nonzero line-Lo-outp ut transfer func -
tion G,,..(s) of the buc k co nverte r. The curre nt-pro gram med controller be hav ior is mod eled by a block
diagram, which is appende d to the sma ll-signal converter models der ived in Chap ter 7. Analysis of the
6.
asy
re sulting mu lt iloop feed back sys tem then leads to the relevant tran sfer functions .
The more accurate model pred icts that the inducto r pole occ urs a l the crossover freq uenc y / , of the effec -
tive current feedback loop gain T,(s), The frequ ency / , typica lly occ urs in the vici n it y or the conver ter
En
sw itching freque ncy / ,. Th e more accurate model also pred icts th at the line -to-outp ut tran sfe r fu nct ion
G,x<,1·) of the buck co nverter is null ed when m11 c: 0.5111
2.
7.
gin
Curre nt progra mmed conver ters operat ing in the disco ntinuous co nduction mode are mode led in Section
12.4. The average d tra nsistor waveform s can be modeled by a powe r sin k, while the avera ged diode wa ve-
forms are modeled by a power source. The powe r is controlled by i/1). Per turbation and lineariz atio n of
eer
these averaged mode ls, as usua l, leads LO sm all -sign al equiva le nt ci rcuits.
REFERENCES
[ I] ing
C. DEISCH, "Simple Switching Con trol Metho d Change s Power Con verter into a Cu1Ten t Source," IEEE
Powe r Electro11ic.1· Spec ialists Co11ference, 1978 Record, pp. 300-306.
.ne
[2 ] A. CAPEL, G. FERRAN TE, D. O 'SULLIVAN,and A. W EINBERG , "Applic ation of the Injected Curr ent Mode l
[3]
for the Dyna m ic Ana lys is of Sw itch ing Regu lators wi th the New Concept of LC 3 Modulator," IEEE Power
Electro 11ics Sp ecialists Confe rence, 1978 Record, pp . 135-147.
S. Hsu, A. BROWN, L. RENStNK, and R. D. MIDDLEBRO

OK, "Modeling and Analysis of Switching Dc-to-
t
Dc Converters in Constant -Freque ncy Curre nt Programmed Mode," IEEE Powe r Electro11ics Sp ecia lists
f ere11ce, 1979 Reco rd, pp. 284-30 1.
Co11
[ 4] F. C. LEE and R. A. CARTER , ''Investi gations of Stabi lity and Dynam ic Performances of Sw itching Regula-
tors Emp loying Current-Injected Control, " IEEE Powe r Ele ctro11ics Spe cialists Conference, 1981 Reco rd ,
pp . 3-16.
[5) R. D. MIDDLE
BROOK
, "Top ics in Multiple-Loop Reg ulators and Current -Mode Programm ing," IEEE
Powe r Elec tronics Specialists Co11ference, 1985 Recor d, pp. 716-732.
(6] R. D. M IDDLEBROOK,"Mod eling Curre nt Program med Buck and Boost Reg ulators," IEEE Tra11rnctio11s
on Power Electronics , Vol. 4, No. I, J anu ary 1989, pp. 36-52.

482 CurrentProva 111111

ed Co11/rol
[7] G. VERG'ESE, C. BRUZOS,and K. MAHABIR,"Averaged and Sampled -Data Models for Current Mode
Control: A Reexamination," IEEE Power Electro11i
cs Specialists Conference, 1989 Record, pp. 484-49 1.
(8] De- De Switching Regulator Analysis,

D. M. MITCMELL, ew York: lcGraw-Hill, 1988, Chapter 6.
[9] A. KISLOVSK
I, R. REDL, and N. SOKA L, Dynamic Analysis of Switching-Mode DC/DC Con11erte
rs, New
York: Van ostrand Rei nhol d , 1994.
[10] A. BROWNand R. D. MIDDLEBROOK , "Sampled-Data Modeling of Switching Regulators," IEEE Power

Electronics Specialists Co11fere
1c1e, 1981 Record, pp. 716-732.
ww
(11] R. RIDLEY , "A ew Continuous-Time Model for Current-Mode Control," IEEE Transactions 011Power
Electronics, Vol. 6, o. 2, Ap ril 1991, pp. 271-280.
(12]
[13)
w.E
F. D. TAN and R. D. MIDDLEBROOK,"Unified Modeling and Measurement of Current-Programmed Con-
verters, " IEEE Power Electronics Specialists Co11fer
R. TYMERSKI
e11
ce, 1993 Record, pp. 380-387.
, "Sampled-Data Modeling of Switched Circuits, Revisited," IEEE Power Electronics Spe-
[14] asy
cialists Co11fere11ce,1993 Record, pp. 395-40 I.
W. TANG, F. C. LEE, R. B. RIDLEY and I. COHEN , "Charge Control: Modeling, Analysis and Design,"
[IS] K. SMEDLE En
IEEE Power Electro11ic.sSpecialists Conference, 1992 Record, pp. S03-51 1.
Y and S. CUK, "One-Cycle Control of Switching Converters," IEEE Power Electro11icsSpecial-

ists Conference, 1991 Record, pp. 888-896.
gin
PROBLEMS
121 eer =
A nonideal buck conver ter operates in 1he con tinuous co nducti on mode, with the values V~ 10 V,J 2 =
ing
l 00 kHz, L-=4 µ.H, C ==75 µ F. and R ==[1.25Q. The desired fu ll-l oad out put is 5 V at 20 A. The power
stage conta ins the followi ng loss ele ments: MOSFET on-resistance R,,.,"' 0.1 Q , Schottky diode forward
voltage drop Vr, = O.S V, inductor windin g resistance Rl = 0.03 Q .
.ne
(a) Steady-state analysis : determine the converter steady-state d uty cycle D, the inductor current
ripple slopes m I and 1112• and the dimensio nless parameter K: 2U RT,-
t
(b) Determine the small- signal equations for this conve11er, for duty cycle control.
A current-progra mmed controller is now imp lemented for this conve11er. An art ificial ramp is used, hav-
ing a fixed slope M. = 0.5M 2, where M2 is the steady-state slope 1112 obtained with an output ofS Vat 20
A.
(c) Over what range of D is the curren t progra mmed controller stable? Is it stable at rated outpu t?
No te that the nonidealities affect the stability boundary.
(d) Deterrnine the control-to-output transfer function G,-c(~}, using the simple approximation
{11.(l))T , "- iJt). Give analy tical express ions for the corner frequency and de ga in . Sketch the
Bode plot of G,,,Js).
12-2 Use the averaged switch modeling approach to model the CCM boost co nvener wi th curren t-pro-
grammed control:
(a) Define the switch network terminal q uantities as in Fig. 7.46(a). With the assu mpt ion that
_(1)\, "' iJt) , deter mine express ions for the average values of the switch network termi nal
(/ 1
wave fonn s, and hence derive the equivalent circu it of Fig . l 2. 18(a).

P roblems 483
(b) Pe rturb and linearize your mod el of par t (a), LO obtain the equ iva lent ci rcu it of Fig. 12.22.
(c.) Solve your mode l of pan (b), to de rive expressio ns for the co nt rol - to -outp ut transfer fu nctio n
G,.,.(s) and the line- Lo-output Lransferfu nc ti o n Ci,.,(s), Express yo ur results in stan da rd no rm al-
ized form , and give analytical expre ss ions for the corner frequ enc ies and de gai ns.
12.3 Use the averaged switch modeling approac h to model the CCM Cuk converte r with current- prog ram med
co ntrol. A Cuk conve rter is dia grammed in Fig. 2.20.
(a) ll is de sired to model th e switc h networ k wi Lh an ic c ur rent source and a dependen t power source
or s in k , usi ng the approac h of Sectio n 12.2.2. How sho u ld the sw itch ne twork te rm inal vo ltage s
and cur rents be defi ned ?
ww
(b) Ske tch the sw itch network term ina l voltage and c urr e nt wav eform s. W ith the assumptio n that
(i 1(1)),, - (i 2{1J)i:,"'i..(1) (where i 1 and i 2 are the ind uc tor curren ts define d in Fig. 2.20), deter-
mi ne express ions tor th e avera ge va lue s of the s w itch network ter mi na l wavefor ms, and hence
derive an equ ivalent circuit simi lar to the eq u iva lent circ u its o f Fi g. 12. 18.
12.4
w.E
(c) Perturb and linear ize your mode l of part (b ), to obta in a small sig nal eq u ivalent circuit similar to
the mode l of Fig. 12. 19. It is not necessary to solve yo u r m odel .
T he fu ll- br idge converte r of Fig. 6. l 9(a) operates w ith VK= 320 V, an d supp li e s 1000W to a 42 V resis-
asy
tive load. Losses can be neglected , the d uty cyc le is 0.7, and th e swi tch in g per iod T,. defi ned in Fig. 6.20
is \0 µsec. L = 50 µH and C = 100 µF. A cu rrent-pro g ramm ed controller is employ ed , whose waveforms
are refe rred lo the secondary side of the tra nsfo rme r. In the fo ll owi ng calcu lati o ns, you may neg lec t the
transfor mer m agnetiz ing curre nt.
(a)
En
What is the mini mum ar tificia l ramp slope m,,that will stabilize the co nt roller at the give n ope r-
gin
ating po int ? Expre ss your res ult in terms of m 2 .
(b) An art ificial ramp havi ng the slope 111,.= 1111 is employed . Sketc h the Bod e plot of the c ur rent
loop gai n I;(s), and label n um erical values of the corne r freq uencies an d de gains. It is not neces-
sa ry LO re-deriv e th e analytical ex pressio n for 1;. Determ ine the cross over freq uency J;..
(c)
eer
For m""' m 2, sketc h the Bode plot s of the co ntro l-t o-o utput tra nsfer fun cti on G ",(s ) and line- to-
oulput tran sfe r func tion G,./s), and label n umerical va lues of the co rner fre qu encies and de
125
ing
ga ins . IL is not nece ssary to ~e-d e1ive analy tica l expressions for these tr ans fe r fu nc tion s .
In a CCM cu rre nt- progra mmed buc k convene r, it is de sired to minimize the line-to -o utp ut trans fer func-
tion G,/1·) v ia the cho ice m,, = 0.51112. However, beca use o f component tolera nces, the value of ind uc-
.ne
tance L can vary by ± 10% from its nomi n al va lue of 100 µ.H. Henc e, 111 ,, is fix ed in va lue wh ile m 2 var ies,
and m,. = 0.51112 is obta ined only at the nom in al va lue of L. The sw itching freque ncy is 100 kHz, the o ul-
t
p ul voltag e is 15 V, the load cu rrent var ies over th e range 2 LO 4 A, and the in p ut vo ltage varies over the
range 22 to 32 V. You may neg lect losses . De terrnine the wor st-c ase (maxi mu m) value of the line-to -out-
put de ga in G,i O).
12.6 Tiie nonid eal flybac k conve n er of Fig. 7. 18 e mploys cu r ren t- p rogrammed co ntrol, with a r tificia l ramp
MOSFETQ1ex hi b its on-r esis ta nce R,,.,.

havin g slope 111,,. All curr en t prog ra mm ed co ntrolle r wavefor ms
are referred to the tr ansfo rmer p rim ary side.
(a) Derive a block diagram whic h mode ls the curr e nt-pro gramme d co ntroll er, of for m similar to Fig.
12.24. G ive ana lytica l ex pres sions for the gi1ins in yo ur blo ck diagram.
(b) Comb ine your res ult of part (a) with the conver ter small- si gnal mode l. De rive a new express ion
fo r the com ro l- to-ou tpu l transfer functi o n G, .,.(s) .
12.7 A buck co n ver ter opera tes wi th cu rre nt- pr og ramme d con trol. The eleme n t val ues are:
VK= 120V D=0 .6

R = JOQ f,"' 100 kHz
L"" 550 p.H C = LOOµF

484 Curre/11ProgrammedComrol
An artifi c ial ramp is employe d, hav ing slope 0.15 AJ11sec

.
(a) Construct the magnitude and pha se asympto tes of the control -to-output trans fer function G,,,,(.~)
for duty-cycle control. On the same plot, construct the magni tude and phase asymptotes of the
contro l-to-output transfer funct ion G,,.(s) for curre nt-progr ammed co ntr ol. Compare.
(b) Con,tmc l the magnitude asympto tes of the line-to-ou tput transfer function G,x(s) for du ty-cycle
contro l. On the same plot, construc t the magnitu de asymp totes of the line -to -outp ut tra nsfer
functi on G, R-<l'"'(s) for current -program med cont rol. Compare.
12.8 A buck-boos t conve rter operates in the disco nt inuo us conduction mode. Its current -prog rammed control -
ler has no compensati ng artifi ci al ramp : m,,= 0 .
ww
(a) Derive an express ion for the contro l-to-outp ut tran sfer func tion G,..(s), using the approximati on
[, "'0 . Give analytical expressions for the corner freque ncy and de ga in.
(b) Repeat pan (a), wi th the inductor included. Show tha t, provided the induc tor is su ff ici ently
small , then the indu ctor merely adds a high -frequ ency po le and zero to C,/ ~),an d the low-fre -
w.E (c)
quency pole de rived in pan (a) is e ssenti ally unc hanged.
Al the CCM-DCM boundary , what is the mi nimu m value of the RHP zero frequency ?
asy
12.9 A current-progra mmed boost converter interfaces a 3 V battery to a sma ll por table 5 V load. The con-
verte r operates in the disco nti nuou s cond LtCtion mode, with cons tant tra nsis tor on-lime t,,,,
and variable
off-tim e; the switch ing freq uency can therefore vary and is used as the comro l variable . There is no arti-
ficial ramp , and the peak transi stor current i, is eq ual to a fixed value J.;in practice,/, . is chosen to mini-
mize the total loss.
(a)
En
Sketch the transistor and diode voltage and curre nt wa, •efo rms. Deter mine expressio ns for the
(b)
converter.
gin
waveform average values, and hence der ive a large-signal averaged equiva lent cir cuit for this
Perturb and line ari ze you r model of part (a), to obtain a small-s ignal eq uiva lem ci rcuil. Note that
(c)
the swi tching frequency f, should be perturbed.
transfer function GJ ,s) = l" eer

Solve your model of part (b), to deri ve an expressio n for the low-fr eq uency control -to-o utput
•(s)l/,(s). Express you r results in standard normalized form , and give
12.10
ing
ana ly tica l express ions for the corne r frequencies and de ga ins. You may assume that Li s smal l.
A curre nt-programmed boost converter is employed in a low-harm onic recti fier syste m, in which the
.ne
inpu t voltage i s a rectified si nusoid : vx(t) = VM I sin(ult ) 1-Th e de output vo ltage v(t) "' V > VM ' The
capacitance C is large, such that the ou tp ut voltage con tains negligible ac variat ions. It is desired lo con-
trol the conve n er such that the in put current i/ 1) is proportiona l to i'i t) : ig(J) = i•.( t )IR, , where R, is a
t
co nstan t, called the "em ulat ed res istance ." The averaged boost co nverter mod el of Fig. 12.IS(a) suggesL~
that this can be acco mplished by simpl y Jell ing (.(/ ) be proportional to vgCt),acco rdin g to (_(/)= v/t) IR,.
You ma y make the simp lifying assump tion that the converter always operate s in the co ntinuou s conduc-
tion mode.
(a) Solve the mode l of Fig. 12.IS(a), subj ect to the assumptions listed above, to d eterm ine the
power (p{l))r ,- Find the average value of {p(t)),,, averaged over one cycle of the ac inpu t v.(t),
(b) An arti ficial ramp is necessary to stabi lize the current-pro gramm ed co ntroller at some ope ratin g
point s. Wh at is the mini mu m vtdu e of m., that ensures sh 1bili ty at all operating po ints along the
input rectified sinusoid? Express your result as a function of V and L Show your work.
(c) The artific ial ramp and ind, 1ctor cur rent ripple cause the average inpu t cur rent to d iffer from iJr).
Derive an alge braic expression for (ig(I))~, as a fun cti on of (.(I ) a nd othe r qu ant ities such as m.,
vgCr),V, L, and T,. For this part, you may assu me that the inducto r dynam ics are negligi ble. Show
yo m work .
(d) Sub stitute vR(t) = VM I sin(ult) Iand ( (1) = v,(t)IR, ., into your res ult of part (c), to de termin e an
expression for i/t) , How does ip) d iffe r from a rectified sinusoid?

Probl ems 485
Switch network
i,(t) i,(t)
+ + L +
C 11(1)
R
ww Clocli
Li.L s Q
w.E +
vq(t)
Analog
R Q
asy s,
comparator
En
":" RJc(t)
Cha'8e controller
gin
Control
input
Fig. 12.37 Ilu.:k conver ter with charge concrollcr, Problem l2 . l l .
12.11 eer
Figure 1237 shows a buck co nverter w ith a charge controller [14J- Operat ion of the charge controller is
ing
sim ilar to operatio n of the c urren t-programmed controller. At the beginning of eac h swi tching perio d, at
tim e I = 0, a short clock pulse sets the SR latch. The log ic h igh signal at th e Q outp ut of the latch turns
the power MOSFET on. At the same time , the logic low signal at the Q output of the latch turns the
sw itch S,off. Curr e nt K/, propor tiona l to the power MOSFET curren t charges the capacitor C_,. At
.ne
t = dT,,the capac itor voltage ''q(I} reaches the contro l input volta ge R1i,., the co mparator outp ut goes
high and rese ts the latch . l11e logic low signal at the Q output of tl1e latch turns the power MOSFET off.
At the same ti me , the logic high s igna l at the Q o utp ut of the latch turn s the sw itch S, on, which quickly
discharges the capacitor C_,to zero.
J:
In this prob lem, the co nverter and controller paramete rs are: VK= 24 V, = IIT., = 100 kHz,
l = 60 µH, C = I 00 µF, R = J Q, K, TJC , = Rf= I ii . You ca n ass um e tha t the converter operates in con-
t
tinuo us co ndu ctio n mode .

(a) Find expressions for the average va lues of the swi tch network termi nal waveforms , and hence
derive a large-signal averaged switch model of the buck sw itch network with charge contro l. 1l1e
control input to the model is tl1e control current i,.. The avera ged sw itch model shou ld consist of
a c urre nt source and a powe r source. The switch duty cycle d should not appear in the model.
(b) sing the averaged sw itch model derived in part (a), find an expression for the quiesce nt o utput
voltage Vas a function of VK,(, andR . Given !, : 2 A, find numerical va lues for V. ! 1, r2, and the
dut y cycle D . For this quiescent operati ng po int, sketch the waveforms i 1(1), i 2(1), and 11/t) dur -
ing one switch ing period.
(c) Pertur b and linearize the averaged swi tch mode l from pa rt (a) to der ive a small -signal ave rage d
sw itc h model for tl1e buck sw itch network w ith charge control. Find ana lytical expressions for

486 C11rr
e11t Programmed Co11tro
l
all parameter values in terms of the converter parameters and the quieseent operating conditions.
Sketch the comp lete small-signal model of the buck conve rter with the charge controller.
(d) Solve the model obtained in part (c) to find the control-to-output transfer function G"'"(s } = vi{_
..
At the quiescent operat ing point found in part (b), constrnct the Bode plot for the magnitude of
G,~ and label all salient features of the magnitude response.
(e) Comme nt on advantages charge control may have compared to duty-cycle control or current-
programmed control.
12.12 Figure 12.38 shows a buck converter wit h a one-cycle contro ller [ IS]. Opera tion of the one-cycle con-
troller is similar to operation of the cu1Tent-programmed controller. At the beginning of each .switching
per iod, at time 1 =0 , a short clock pulse sets the SR latch. The logic high signal at the Q output of the
ww latch turns the power MOSFET on. At the same lime, the logic low signal at the Q ou tput of the latch
turn s the switch S, off. Current G,vll) proportional to the voltage v2(1) charges the capacitor c,. At
t = ,ff,, the capacitor voltage v_lr) reaches the control input voltage v,, the comparator output goes ·h igh
w.E and resets the latch. The logic low signal at the Q output of the latch t urn s the power MOSFKT off. At
the same lime, the logic high signal at the Q output of the latch turns the switch S, on, which quickl y
discharges the capacitor C_.to zero.
In this problem, the conve11er and controller parameters are: Ve aa 24 V, /, a: 117',= 100 kH1.,
asy
!. = 60 µ H, C = 100 ~tF, R "' 3 Q, G,7~/C, = I. You can assume that the converter operates in the continu -
ous cond uction mode.
(a) Find expressions for the average values of the switch network termin al wavefo rms, and hence
En
derive a large-signal averaged switch model of the buck swi tch network with one-cycle control.
The control in put to the model is the control vollage v,.• The switch dut y cycled should not
appear in the model.
: Switch network
gin :
lz(r)
+
eer
+ l +
ing
C v(I)
R
.ne
Clock LiL s Q t
+ R Q
v,(1)
Analog
compara 1or
s,
-:- v,(t)
, .... ........ .... ---....................... . . ..................
................
One-cycle cont roller
Colllrol
inpul
Flg. L2.38 !luck co nvcrlcr with onc-cydt! co1Hrollc1. l' mhk m 12. 12.

Probl ems 487
(b) Us ing the average d switch mode l derived in pa rt (a) , find an expres ion for the quiescen t output
voltage Vas a func ti o n of V,. Given V, = 10 V, find the numerical \•alues for V, / 1, / 2, and the duty
cycle D. For this qui escent opera ting poi nt , sketch the wav efo rm s i 1(t), i2(1}, and v,.(t ) during one
s witc hin g period.
(c) Pert urb and li nearize the averaged sw itch model fro m par t (a) to der ive a sma ll -signa l averaged
sw it ch model for the buck sw itch network with one-cycle co ntrol. Find analyt ica l ex press ions
for all parameter values in tenn s of the converter parameter s and the quie sce nt operating cond i-
tions. Sketch the co mplete small -signa l model of the bu ck conve n er with the one-cycle co ntrol -
ler.
(d) Solve the model obtained in part (c) 10 find the contro l-to-output tran sfer function G,,.(s) = 0/0f,
ww and the line-to-outp ut transfe r fun ction c;,is)= v/v~, For the quiesce nt opera ting po int fo und in
pan (b), sketch the mag nitud e Bode plots of these tra nsfer funct ions, and label all sa lien t fea-
tures.
w.E
(e) Com ment on advan tages one -cycle co ntro l may have compa red 10 duty -cycle co ntrol.
asy
En
gin
eer
ing
.ne
t

ww
w.E
asy
En
gin
eer
ing
.ne
t

ww
w.E
yE
Part III
asMagnetics
ng
in
eer
ing
.ne
t

ww
w.E
asy
En
gin
eer
ing
.ne
t

13
Basic Magnetics Theory
ww
w.E
asy
En
gin
Magnetics are an integral part of every switching converter. Often , the design of the magnetic devices
eer
cannot be isolated from the converter design . The power electronics eng ineer must not only mode l and
design the converter, but must mode l and desig n the magnetics as well. Modeling and des ign of magnet -
ics for switching converters is the topic of Part III of this book.
ing
In this chapter, basic magnetics theory is reviewe d, including magnetic circuits, inductor mode l-
ing, and transfo rmer modeling [l -5]. Loss mechani sms in magnetic dev ices are described. Winding eddy
.ne
currents and the proxim ity effec t, a significa nt loss mechanism in high-current high -freque ncy windings,
are expla ined in detail [6- 11]. Inductor desi gn is introduced in Chapte r 14, and transformer design is cov -
ered in Chapt er 15.
13.1 REVIEW OF BASIC MAGNETICS t

13. 1.1 Basic Relationships
The basic magnetic quantities are illustrate d in Fig. 13.1. Also illustrated are the analogous, and perhaps
more fami liar, electrica l quan tities. The magnetomotive force § , or scalar potent ial, between two points
x 1 and x 2 is given by the integral of the magnetic field H along a path connect ing the point s:
(13.l)
where dl is a vector length e lement pointin g in the direct ion of the path . The dot product yields the co m-

492 Basic Magnetics Theory
Magnetic quant ities El ectrical qua nti ties
,_ Length l - , 1- Length f. _,
Mag ne tic field H Electricfield E
x1 -------• X2 x 1 -------• X2
+......_
MMF _- - +
....._Voltag e_-
.<¥=Ht. V= El
ww .
Surfaces
1th area Ac
Surface S
th area Ac
w.E
Total nux Total current /
Flux dens ity B { Current density J {
asy
Fig. 13. t Compnrison of nmg11etic field H. MMr <ti, nux .:/, 1111d
flux density fl, with the analogous electrirnl qunn-
tities £, II, /, llnd J .
En
ponent of H in the direction of the path . If the magnetic field is of uniform stre ngth H pass ing through an
element of le ngth l as illustrated , then Eq. ( 13.1) reduces to
gin
(13.2 )
.~=Hf
Thi s is analogous to the electric fie ld of uni for m streng th £, wh ich indu ces a voltage V =El between two
po ints separate d by distance e.
eer
Figure l 3. 1 a.lso illu strates a total mag netic flux 4>passing throu gh a surface S having area A ...
The total flux cf>is equa l to the integral of the nomial com ponent of the flux density B over the surface
tD= f B·dA ing (13.3)
.ne
~mfun•S
where dA is a vector area element ha ving direct ion normal to the surface. For a uniform flux density of
magnitud e B as ill ustrated , the integra l reduces to
( 13.4)
t
Flux density B is analogous to the electrical current density J, and flux <1>is analogo us to the electric cur-
rent /. If a uniform current dens ity of magnitude J passes through a surface of area A", then the total cur-
rent is / :e JAc.
Faraday's law relates the voltage induced in a windin g to the total flux passing throu gh the inte-
rior of the windjng. Figure 13.2 illustrates flux <l>(t)pass ing throug h the interior of a loop of wir e. The
loop enclo ses cross-sect ional area Ac. According to Faraday's law, the flux indu ces a voltage v(t) in the
wire, given by
l'{t) = d<:l>/(1) ( 13.5)

(I
where the polarities of v(t) and <l>(I) are define d acco rdin g to the right -han d ru le, as in Fig . 13.2. For a

13. I Review of Basic Magn etics 493
Fig. 13.2 The voltage v(t) induce.d in a loop of wire is

related by Faraday's law to the derivative of the total flux $(1)
passing through the incerior of the loop. Flux <l>
(t)
ww
uni form flux distribut ion, we can exp ress v(t) in term s of the flux density 8(1) by substitution of Eq.
(13.4 ):
w.E v(t) = A dB(t)

< dt
(13,6)
inte rior of the winding.

asy
Thus , the voltage induced in a winding is related to the flux and flux dens ity B passing throu gh the
Lenz 's law states that the voltage v(t) induced by the changing flux ({)(t) in Fig. 13.2 is of the
En
polari ty that tends to dri ve a current throug h the loop to co unteract the flux chan ge . For exam ple, con-
sider the shorted loop of Fig. 13.3. The changing flux <ll(t) passing through the interior of the loop
gin
induces a voltage v( t) arou nd the loop. This voltage, div ided by the impedance of the loop co nductor ,
lead s to a curre nt i(t ) as illustrated. T he curre nt i (t) indu ces a flux cf>'(t), which tend s to oppose the
cha nges in <t>(t). Lenz ' s law is invoked later in this chapter, to prov ide a quali tative underst ,mding of eddy
eer
curr ent ph enom e na.
Ampere's law relates the curren t in a wind ing to the magnetomot ive force Sand magnet ic field
H. Th e net MMF around a closed path of le ngt h l,. is equal to th e tota l current pass ing through the inte-
ing
rior of the path. For examp le, Fig. 13 .4 illustra tes a magnetic core , in which a wire carrying current i(t )
passes throu gh the wi ndow in the cente r of the core. Let us co nsider the closed path illu strated , which
fo llows the magnetic field line s aro und the interior of the core. Ampere ' s law states that
.ne
f H ·dl = total current passing through interior of path (13.7)
t
clo1eidputh
The total current pass ing through the int erior of the path is eq ual to the total curre nt passing through the
Fig, 13.3 Illustnitirm of Lenz 's law in a shorted loop nf wire. TI1eflul\
<Zl(t)induces curre11ti(I), whiclt in tum generates tlux cl>'(t) that rends to
oppose changes in (1)(/). Shorted
loop

494 Basic Magnetics The01y
i(I)
Fig. 13.4 The net MMF around a clo~cd Mag netic p ath
path is relateu hy Ampere's law to the total leng th e/11
current passing through the interior of the
path.
ww
window in th e ce nter of th e core , or i(t). If the magnetic fie ld is unifo r m an d of ma gnitude H(t), then the
integra l is H(t)lm. So for th e exa mpl e of Fig. 13.4, Eq. (13.7 ) reduces to
w.E .~(t ) = fl(('/1.,,.= j(I ) (13.8)
asy
Th us, the magnetic field streng th H(I) is related to the winding current i(t). We can view winding curre nts
as sources of MMF. Eq uati on ( 13.8) states that th e MMF around the core, //(/ ) ca H(l)t,,, , is eq ual to the
wind in g curre nt MMF i(f). The tota l MMF aro und the close d loop , accoun tin g for both MMFs , is zero.
En
The re latio n ship betwee n B and H, or equ ivalen tl y betwee n$ and;'/ , is determi ned by the core
mater ial character istics. Figure 13.S(a) illus tra tes th e character istics of free space, or a ir:
gin
The qu a ntity µ 0 is the permeabil ity of free space, and is equa l to 41t · I 0-7 Henr ies per meter in MKS
(13.9)
eer
unit s. Figure 13.S(b) illu stra tes the B- H character istic of a typical iron alloy unde r high -leve l sinu soi dal
steady -state exci tatio n. The characte ristic is high ly non linear , and exhib it s both hysteresis and saturation .
ing
Th e exac t shape of the cha rac terist ic is dependent on th e exci ta t ion, an d is d ifficu lt to pred ict for a rbitrary
waveform s .
For purpos es of analysis, th e core mater ial cha racterist ic of Fig. 13.S(b) is usua ll y modeled by
.ne
the linear or p iecewise -linea r charac teris tics of Fig. 13.6. In Fig. I 3.6(a) , hysteres is and sat uration are
ignored. The B- H c harac ter istic is th e n gi ve n by
(a) B (b) B
t
Fig, 13,5 B- 11char acteris t ics: (.i) of free space or :iir, (b) of a typi cal m:ignc tic 1:ore nmter i.tl.

13.l Review of Basic Magnetics 495
(a) 8 (b) B
H H
ww
w.E
F'ig. 13.6 Approximacionof the JJ-H characteristic s of a 1m1gne1ic
and saturation, (b) by 11eglcctinghysteresis .
core macerial: (a) by negl~cting both hysteresis
asy {13. !O)
Th e core material permeabilityµ
En
ca n be exp ressed as th e product of the relative permeabilit y µ, and of
µ 0 . Typical values of µ, lie in the ra nge 10 1 to 105 .
gin
The piecewise -linear model of Fig. l3.6(b) accounts for satur atio n bu t not hysteresis. The core
material saturates whe n the ma gnitude of the flux de nsity B exceeds the saturat ion flux density nrn,·For
I BI < B,·ai•the characteristic follows Eq. ( 13. 10). When I BI > B,arothe model pre dicts that the core
eer
reverts to free space, w ith a character istic hav ing a much smalle r slope approx im ate ly equ al to µ 0 .
Square -loop materials ex hibi t this type of abrupt -sat uration cha racte ristic, and addi ti onally have a ve ry
large rela tive perm eab ili ty µ,. Soft materials exh ib it a less abrupt sa turation cha racte ri stic, in which µ
grad ually decreases as His increased. Typical val ues of B_.,,,
ing
are I to 2 Tesla for iron lam in ations and si li-
con steel, 0.5 to I Tesla for powdered iron and molypermalloy material s, and 0.25 to 0.5 Tesla for fe rri te
.ne
materials.
Unit systems for magnetic quantities are summarized in Table 13.1. The MKS system is used
throughou t th is book. The unrationali zed cgs system also con tin ues to find some use. Conve rsions
betwee n these systems are listed.
Fig ure 13.7 summar izes the relatio nships between the ba sic elect rica l and magne tic quant iti es
of a magnetic dev ice. The wind in g voltage v( t) is relate d to the core flux and flux de nsity via Faraday 's t
Table 13,1 Units for magnetic quantities
Quantity MKS Unrationalized cgs Conversio ns
Core mater ial equation B=J.1,H

B Tesla Gauss IT=l0 4 G
H Ampere/meter Oersted I Nm=411 · 10- 3 oe
Weber Maxwell
I Wb = 108 Mx
IT= 1 Wb/m 2

496 Basic Magneti cs Tl,eory
Faraday's law
B(t) , <l)(r)
I
v(t ) ------•
Fig. 13,7 Summary of the steps in determina-

tion of' the terminal electrical i-v characteri ~tic s Tennina/ Core
ot' a magnetic element. charac teristics cha racterisrics
i(t) -- -- --• H (t) , :!1(1)

Ampere's law
ww
law . The wind ing curren t i(t) is re lated to the magnetic fie ld strength via Ampere ' s law . The core material
character istics relate B and H.
We can now determi ne the e lect rica l terminal charac teris tics of the simple indu cto r of Fig.
13.S(a). A win din g of n turns is placed on a core hav in g permeab il ity µ. Farnday ' s law states th at the flux
w.E
ll>(t)in side th e core indu ces a vo ltage v,.,,,(t) in each turn of the wi nding , give n by
v,,n,(1)=~
d<fl(I) (13.11)
asy
Since the same flux <!>(r)passes thro ugh each turn of the wind ing, the total wind ing voltage is
En d<l>(t)
v(t ) = 11v,.,,.(1) "'11 ~
(13.12 )
gin
Equation ( 13.12) can be expresse.d in terms of the average flux densi ty B(t) by substitution of Eq. ( 13.4 ):
dB(r) (13 .13)
eer
v(t) = nA, . dt
(a)
i(t)
ing Core area
Ac
+
.ne
v(t) tum~ ---

Core
Fig. 13,8 lridu ctor example: (a) inductor

geome1ry. (b) applit:alion of Ampere's law.
core
permeabil ity
µ
t
(b)
i(r)
Magnetic
path
leng th e,,,

13.I Review of Basic Magnetics 497
whe re the average flux de nsity B(t) is <()(1)/A,..

The use of Ampere ' s law is illustra ted in Fig. 13.8(b). A closed pat h is chosen whic h follows an
average magne tic field line aro und the interior of the core. The length of this path is called the mean
magnetic parh length l,,,. If the magnetic field strengt h H(t) is un iform , then Ampere's law states that Ht,,.
is equal to the tota l cu rrent pass ing through the interior of the path , tha t is, the net curren t passing
through the window in the ce nter of the core. Since there are n. turns of wire passing through the window ,
each carrying current i(t ), the net current passing through the window is ni (t). Hence, Ampere's law
states that
(13.14)
ww
H(r')( n,= ni(r)
Let us model the core material character istics by neg lecting hysteresis but account ing for sa tu-
rat ion, as follows:
w.E B= {
B,., for H ~R .10 /µ
1,1,H for IH I< B,,,/µ
(13.15)
asy -B:JIJI for H 5.- B,.,f µ
En
Th e B- H characteristic sa tur ated slope µ0 is much smaller than µ, and is ignored he re. A characte1istic
si mi lar to Fig. 13.6(b) is obtained . The curren t magn itude l_,aiat the omet of saturation ca n be found by
subst itution of H = B,,.,I/J.into Eq. ( 13.14 ). The resu lt is
I
:~c.i
- B,.,t,.
, - µ,1 gin ( 13.16)
eer
We can now e liminate B and H from Eqs . (13. 13) to ( 13. 15), and solve for the electrical term inal ch,u-ac-
terist ics. For I/ I < I..,,,,B = µH. Equ at ion (13. 13) then becomes
v(() =µnA,. cit

dH(l)
ing (13.17)
.ne
Substitution of Eq. ( 13. 14) into Eq. (13. 17) to eliminate H(t) then leads to
which is of the form

v(I) = µ11 2 A c
e.,
di(tl
Jr
(13.18)
t
v(t) = L d i(t) (13. I 9)

di
with
(13.20)
So th e dev ice behaves as an inductor for I /I< Isa/'When I /I> l ,m, then the flu x den sity B(t) :aa B-'"' is con-
stant. Faraday 's law states that the terminal voltage is then

dB (13.21)
v(r) = nA, ai"" = O
When the core saturntes, the magnetic device behavior approaches a short circuit. The dev ice behaves as
an inductor only when the wind ing current magnitude is less than l.,w· Practical inductors exhibit some
small residual induct ance due to their nonze ro sat urated permeab ilities; nonetheless , in saturat ion the
inductor impe dance is great ly red uced, and large inductor currents may res ult.
13.1.2 Magnetic Circuits
ww
Figure 13.9( a) illustra tes unifo rm flux and magnetic field inside a ele ment having permea bilit y µ, length
e, and cross-sectional area A,..The MMF
w.E
between the two ends of the cle ment is
.i=Hl (13.22)
Since1H = Blp. and B
asy
= /l !A,., can express :7 as
- e ,.,.
,/1' =µAc.,, ( 13.23 )
Thi s eq uation is of the form

En
gin (1 3.24)
wit h
,'fiee-e_ eer (13.25 )

µA,.
ing
Equation (13.24) resembles Ohm' s law. This equation states that the magnetic 11ux through an elemen t is
.ne
propo rtiona l to the MMF across the element. The cons ta nt of pro porti onalit y, or the rel uctance ,'/2',is
analogo us to the resistance R of an elec trica l conductor. Ind ee d, we can co nstruc t a lumpe d-e lement
magnetic circuit model that corresponds to Eq. ( 13.24), as in Fig. 13.9(b). In th is magnetic ci r cui t model,
voltage and curr ent are replaced by MMF and fl ux , whi le the element characteri stic , Eq. (13.24), is rep-
resented by the ana log of a resisto r, hav ing reluctance .'Ii'.
C o mpli cated m agnetic stru ctures, comp ose d of m ultiple windin gs and m ultiple he tero ge neous t
(b)
(a) - Length t
+- MMF.'ff Area
+ :Y
Fl~, [ ~-+--1
-- ---il+ill:
""
: A~ penn,abiJ;ty µ
6i) -
.,,, ec
, - µA
II
'ig. 13.9 An element co ntaining magnetic flux (a), alld its equivalent magn~tk cin;uil (b).
1:-

13. l Review of Basic· Magnetics 499
(11) Node (b) Node 2 + <1>

<l>I = <1> 3
,
~
I <l>
3
--+-
<1>
1 <1>
3
I ~·ll 2
Fig. 13.10 Kirchoff' s current law, applied to magnetic circuits: the net flux entering a node muM be zero: {a) phys-
ww
ical element, in which three legs of a cure meet at a nude; (b} magnetic circuit model.
ele ments such as cores and air gaps, can be represe nted using equ iva len t mag n etic circu its . TI1ese mag -
w.E
netic circu its can then be so lved us ing co nventional circ uit analysis , to determ in e the var iou s flux es ,
MMFs , and term inal voltages and currents . Kirchoff's laws apply to magnetic ci rcu its, and follow
directly from Maxwell's equa tions . The analog of Kirchoff's curre nt law holds because the divergence of
B is zero, and hence magnetic flux lines are co ntinuous and can not end . Therefore , any flux line that
asy
enters a node must leave the nod e. As illustrated in Fig. 13.10, the total flux en tering a node must be zero.
The ana log of Kirchoff's voltage law follows from Ampere's law, Eq. (13.7) . The left -hand -side integral
in Eq. ( 13.7) is the sum of the M.MFs across the reluctances aro und the closed pa th. The right -han d-side
En
of Eq. (13.7) states that currents in windings are sources of MMF. An 11-tum winding carry ing curren t i(t)
can be modele d as an MMF source , analogous to a voltage sou rce , of value ni(t ). Whe n these MMF
gin
sources are inc luded , th e tota l MMF aroun d a closed path is zero.
Consider the inducto r with air gap of Fig . 13.1l(a). A close d path following the magnetic fie ld
lin es is illu strated. This path passes th roug h the co re, of permeabilityµ and length f, , and across th e air
eer
gap , o f permeabil ity µ0 and leng th Cs.The cross -sec tiona l areas of the core and air gap are approx imately
equal. Application of Ampere's law for this path leads to
ing
where &c and f'Jsare the MMFs across the core and air gap , respect ively . The core and air gap character -
(13.26)
.ne
ist ics can be modeled by reluc tances as in Fig. 13.9 and Eq. (13 .25); the core reluctance r!lt,xand air gap
reluctance r!lt,xare given by
(a)
Core
permeability µ
(b)
+
f!j"c
t
cp
Cross-sectional {Ylc
i(t) area Ac
+ +
n
v(t)
~
turns Air gap
lg ni(t) &l/J §,
Magnetic path
length em
Fig. 13.11 Inductor wi th air gap cxampk: (n) physica l geometry, (b) magnetic circuit model.

500 Basic Magnetics Theo1y
( 13.27)
A mag netic circuit correspon ding to Eqs. ( 13.26) and ( 13.27) is given in Fig . 13.ll (b). The w inding is a
so ur ce of MMF, of val ue ni. Th e core and air ga p re luctances are effe ctively in series. The so lu tion of the
magnet ic c ircui t is
ww
( 13.28)
Th e flux <ll(t) passes thro ugh the wi ndin g , and so we ca n use Faraday's law to write
w.E
Use of & 1. ( 13.28) to el imi na te 4>(r) yie ld s
v(t=n~
) de!>(/) (13 .29 )
asy (13 .30)
Therefore, the induc tance L is

En
gin (13.31)
eer
The air gap increases the total rel ucta nce of the mag net ic c irc ui t, an d dec reases the ind ucta n ce.
Air gaps are emp loyed in pract ical inductors fo r two reaso ns. W ith no air gap (dl 11 = 0), the
ing
inducta nce is di rec tl y proportional to the core per meabi lity µ. Th is qua n tity is depe nde nt on tem perature
and operati ng point, and is diffic ult to control. Hence, it may be d iffic ult to construct an ind uctor hav ing
a well-controlled value of L. Add it ion of an ai r gap hav ing a re luctance Pit,~·greater than .-1(causes the
val ue of Lin Eq. (13.3 1) to be inse nsitive to var iatio ns in µ,.
.ne
Addit ion of an air gap also allows the inductor to operate at higher val ues of wind ing c tirrent i(t)
without saturation. Th e total flux cf) is plotted vs. the windi ng MMF ni in Fig . 13.12. Since ct>is propor -
tiom d lo B, an d w he n the core is no t satur ated ni is propo rtional to the mag netic fie ld stre ngt h H in the
t
F1g, 13.12 Effect of air gap on the magnetic circuit <f.>vs. 11i
characteristics . TI1c air gap increases the current I,,,, at the
onset of core saturation.

/3.2 Tra11.efo1111erM
odeli1111 501
core, Fig. 13.12 h as the same shape as the core B- H characteristic . When the core is not saturated , <l>is
related to ni according to the linea r relations hi p ofEq . (13.28) . Wh en the core satu rates, <l>is equal to
<t>
,., ;;;B,.•,A,, ( 13.32)
The w indin g curre nt /Jul at the onset of sa turation is found by sub stituti o n ofEq . ( 13.32) in to ( 13.28):
(13.33)
ww
The cl>-nicharacter istics are plotted in Fig. 13.12 for two cases: (a) air ga p present , and (b) no air gap
(:¥lg= 0). It can be seen that [sat is increased by addition of an air gap. Thus, the a.ir gap allows increase of
the saturation current, at the expense of decreased inductance.
13.2 w.E
TRANSFORMER MODELING
asy
Conside r next the two -w ind ing tr ansforme r of Fig. 13.13. The core has cross -sectiona l area Ac, mean
magnetic path length £,., and permeabi lity µ.. An equivalent magnetic circu it is given in Fig. 13.14. The
core reluctance is
En
i/l-~
• -µA,.
(13.34)
gin
Since there are two wi nd ings in this example, it is necessar y to determine the rel ative polarities of th e
MM F generators . Amper e's law states th at
eer ( 13.35)
ing
.ne
Fig. 13.13 A two-winding transformer.
t
Core
<l>
Fig. 13.14 Magnetic circuit that models the

two-winding transformer of Fig. 13.14.

502 Basic Magn etics Theo')'
The MM F genera tors are addi ti ve, because the curr ents i 1 and i2 pass in th e sa me dir ectio n throu gh the
co re wi ndow. Solut io n of Fig. 13. 14 yiel d s
(13.36 )
=
Thi s expr essio n cou ld also be ob tai ned by subs titut ion o f .:.Y., W.:Wint o Eq . (13.35).
13.2.1 The Ideal Transformer
ww
In the idea l tran sfo rmer, the core re luctance ,'fl, appro ache s zero . The ca uses the co re M MF i!l,, = Woi' to
also appro ach zero . Equa tion ( 13.35) th e n beco mes
w.E
Also , by Faraday ' s law, we have
(13.37)
asy I' "'II

J
J(I)
I fit
=II,• Jis the same in bot h eq uati ons abo ve: the same total
flux lin ks bot h w ind ings. Elimin at ion of lea ds to
gin ( 13.39)
+ +
Equa tions ( 13.37) and ( 13.39) are the equa tions of the ideal tra ns- eer
former:
( 13.40) ing Ideal
.ne
Fig. U.15 Ideal transformer symb ol.
The ideal transfo rmer sy mbo l of Fig. 13. 15 1s defi ned by Eq .

(13.40) .
13.2.2 The Magnetizing Inductance

t
For the actual case in whi ch the core re luc tance ,'fl, is nonzero , we have
With (13.4 l )
Elimin a tio n of ct>yiel d s
(1 3.42)

13.2 Tra11sfor111e
r Modeling 503
+ +
ww
fi'ig. 13.16 Transformer model including magnc:tizing inductance.
Th is equat ion is of the for m
w.E V - L
, - M
di M
dt
( [3.43 )
where
asy
En ( 13.44)
are the magnetizing inductance and magnetizing curre/11

circu it is illustra ted in Fig. 13.16. gin
, referred to the prima ry winding. An equivalent
eer
Figure 13.16 coincides wit h the tra nsforme r model introduced in Chapter 6. The magne tizing
indu ctance mode ls the magnet iza ti on of the core mate ri al. It is a rea l, phys ica l indu ctor , wh ic h exh ib its
sat ura tio n and hyste resis. All physica l tra nsfo rm ers must co ntai n a mag neti zing indu cta nce . For example,
ing
suppose that we disco nnect the secondary wi nd ing . We are then lef t with a single wind ing on a magnetic
core- an inducto r. Indeed, the equi va lent c ircuit of Fig. 13.16 predic ts thi s behav ior, via the magnetizi ng
.ne
inductance. The magnetizing current causes the ratio of the wi ndi n g currents to differ fro m the turn s
rat io .
1l1e transfo rmer saturates whe n the core flux density B(t) exceeds the saturat ion flux dens ity
B,-ar· Wh en the transfor mer saturates , the magnetiz ing curr ent (w(I) becomes large , the imp edance of the
mag neti zing inducta nce beco mes small, and the tr ansfor mer wi nd ings become short circuit s. It sho uld be
noted that large w indi ng currents i 1(t) and ii(! ) d o not necess aril y cause sat ura tion : if these cur re nts obey
Eq. ( 13.37), then the mag netiz ing curr ent is zero and there is no net magne ti za tio n of the core . Rather,
t
satur at ion of a tr ansformer is a functi on of the app lied volt-seco nds . The mag neti zing current is given by
{13.45)
Alt ernati ve ly, Eq. ( 13.45) can be exp resse d in te rm s of the core flux dens ity B(I) as
IJ(t) = _JA
fl I c
f v 1(1)dl { 13.46)
The flux dens ity and magne tiz ing curr en t will become large eno ugh to satura te the core when the applied
volt-seconds )s1 is too large, where A1 is defined for a periodic ac voltage wavefo rm as

(13.47)
The limits are chosen such that the integral is taken over the positive portion of the applied periodic volt-
age waveform.
To fix a saturating transformer, the flux density sho uld be decreased by increasing the number of
turns, or by increasing the core cross -sectio nal area Ac. Adding an air gap has no effect on saturation of
conventio nal transformers, since it does not modify Eq . ( 13.46) . An air gap simply makes the transformer
less ideal, by decreasing LM and increasing i1,1(t) without changing B(t). Saturation mechanisms in trans-
ww
formers differ from those of inductors, because transformer saturation is determined by the applied wind-
ing voltage waveforms, rather than the applied winding curren ts.
13.2.3
w.ELeakage Inductances
asy
In practice, ther e is some flux whic h links one windin g but not the other, by "leaking" into the air or by
some other mechani sm . As illu strated in Fig . 13.17, this flux leads to leakage inductance, i.e., additional
effective inductances that are in series with the windings. A topo logically equiv alent struct ure is illus-
En
trated in Fig . I3.17 (b ), in which the leakage fluxes <l>lland ezare show n expli citly as separate indu c-
tors.
(a)
gin
eer
ing
.ne
(b)
t
Fig. 13.17 Leakage flux in a two-winding transformer: (a) transformerget>rnctry,(b) an equivalent system.

13.2 Tra11sformer
Modeling 505
i1 Lu
n,: " 2 la i2
+
v, L
M
n1
= n2 L12 V2
Ideal
ww
Ji'[g.13.18 Tuo -windi11gtransformer equivalent circuit. including magnetizing inductance rtferrcd to primary, aml
primary ll!ld secondary leakage inducmnces.
Figure 13.18 illu strat es a transformer electrica l equi va le nt circui t model, includin g series induc -
w.E
tors Ln and L11 which model the lea kage in duc tances. These leakage inducta nce s cause the termin a l vol t-
age rntio 11i(t)/v1(t) to differ from the ideal turns rat io 112/111. In genera l, the terminal eq uations of a two-
wind in g transforme r can be w ri lien
asy (13.48)
En
The qu an ti ty L 12 is calle d the m.urual inductance, and is g iven by
gin (13.49)
eer
TI1e quant ities L 11 and ½.2 are called the pr im ary and secondary self -inductances, given by
ing
(13.50)
Note that Eq. (13.48) does not exp licit ly identify the physical turns rat io 112 /111 • Rather , Eq.
.ne
(13.48) expresses the transformer behavior as a function of electrica l quanti ties alone. Equ ation (13.48)
can be used, howeve r, to define the effective tllms ratio
(13.51)
t
and the coupling coeffic ient
k- ~ (13 .52)
- v'Lul2~
The coupling coe ffic ient k lies in the range O ~ k ~ I, and is a measure of the degree of mag netic cou plin g
between the pri mary and secondary windings. In a transfo rmer with perfect coupling, the leakage induc-
tances Ln and L 11 are zero. The co up ling coefficient k is the n equal to I. Cons tru ct ion of low -voltage
transforme rs hav ing coefficien ts in excess of 0 .99 is qu ite feasible . When the coup ling coeff i-
cient is close to I, then the effec tive turns ratio 11, is approx imately equal to the physical turn s ratio 11/11 1.

13.3 LOSS MECHANISMS IN MAGNETIC DEVICES
13.3.1 Core Loss
Energy is required to effect a change in the magnetiza tion of a core material. Not all of this energy is
recoverable in elecuic al form ; a fraction is lost as heat. This power loss can be observed electrically as
hysteresis of the 8- H loop.
Consider an 11 - turn inductor excited by periodic waveforms v(t) and i(t) having frequency/ The
net energy that flows into the inductor over one cycle is
ww W= f .·(t)i(1)d1 ( I J .53)
w.E
(Jll,t"t y,d i•
We can relate this expression to the core 8- H characteristic: substitute B(t) for v(t ) using Faraday's law,
Eq. ( 13.13), and substitute H(t) for i(t) using Ampere's law, i.e. Eq. (13.14):
asy W=j· ( AdB(t)

di \
) (H(t }f,.,) ,
II ,. II l I
( 13.54)
En
~l l 'C_ •;dr"
= (AJ,.) r l!dB
:,m•L"J(.'JY
gin
The term A,,C,.,is the volume of the core, while the integral is the area of the 8- H loop:
(energy lost per cycle)= (core volume)(area of B- H loop)
The hysteresis power loss PH is equal to the energy lost per cycle, multiplied by the excitation eer (13.55)
frequency f
I ing
PH=(/ )(A)m)
.ne
H ,/8 ( 13.56)
(JrJ~ C)'d t •
To the extent that the size of the hysteresis loop is independent of frequency, hysteresis loss increases
directly with operating frequency.
Magnetic core materials are iron alloys that, unfor-
tunately, are also good electrical conductors. As a result, ac
t
magnetic fields can cause electrical eddy currents to flow

within the core material itself. An example is illustrated in
Fig. 13. I9. The ac flux <l>(t)passes through the core. This
induces eddy curren ts i(t) which, according to Lenz's law,
flow in paths that oppose the time-varying flux ¢ (() . These
eddy currents cause PR losses in the resistance of the core Fig. 13.19 Eddy currents in an iron core.
material. The eddy current losses are especially significan t
in high-frequency applications.
According to Faraday's law, the ac flux <ll(t) induces voltage in the core, which drives the cur-
rent around the paths illustrated in Fig. 13.19. Since the induced voltage is proportional to the derivative
of the flux, the voltage magnitude increases directly with the excitation frequencyf If the impedance of

13.3 Loss Mecha11i

.rn1si11Magnetic Devices 507
the core mat erial is pure ly res istive and indepen dent of frequency, then the ma gn itude of the induced
eddy curr ents also increases directly wit h/ This implies that th e PR eddy c urren t losses should increase
as/2. In powe r ferrite materials, the core materia .l impedance magnitude actually decreases with increas -
ing/ Over the usefu l frequen cy range, the eddy curr ent losses typica.lly increase faster than/ 2.
There is a basic trad eo ff between satura tion flux de nsity and core loss. Use of a hi gh ope rating
flux den sity leads to red uced size, weight , and cost. Silicon steel and simi lar ma te ria ls exh ibit satura tion
flux densities of 1.5 to 2 T. U nfort un ate ly, these core materials exhi bit h igh core loss. In part icu lar, the
low res ist ivity of these materials leads to hi gh eddy curren t loss. Hence , these materia .ls are su itab le for
filt er inductor and low -frequency transformer app l ications. Th e core material is pro duce d in lam in ations
or thin ribbons, to reduce the eddy c urrent magnitude. Other ferrous alloys may contain molybde num,
ww
cobalt , or other e lements, and exhibit somew hat lower core loss as we ll as somewh at lower sat uration
flux den sities.
Iron alloys are also employed in powdered cores, contai ning ferromagnet ic particles of suffi -
w.E
ciently small diameter such that eddy currents are small. The se particles are bound together usi ng an
ins ula tin g med ium. Powdered iron an d mo l ybdenum per mall oy powder cores exhibit typical saturat ion
flux dens ities of 0.6 to 0.8 T, with core losses significa ntly lower th an lami nated ferrous alloy materia.ls.
asy
The insu lating medium behaves effective ly as a distribut ed ai r gap , and hence these cores have relative ly
low permeabili ty. Powder cores find application as transfo rmers at frequencies of several kHz , and as fil-
ter inductors in high frequency (100 kHz) swi tching converters.
En
Amorphous alloy s exhibit low hystere sis loss. Core co nd uctivity and eddy current losses are
somewha t lower than ferrous alloys, bu t hig her than ferrites. Satura tio n flux de nsiti es in the rnnge 0.6 to
1.5 T are obtained.
Ferrite cores are ceramic materials ha v-
ing low satur at ion flux densit y, 0.25 to 0.5 T .
Their resistiv ities are much higher than other gin ,..,
A ,.,
-:JI I
eer
c SC I I
mate rials, and hence eddy c urr ent losses are 1 "I I
muc h smalle r. Manganese -zinc ferrite cores find 'I I I
I i~I/
I
i/:1
widespread use as ind uct ors and tra nsfo rmers in
I
converters having switchin g frequenc ies of 10
kHz to I MHz . icke l- zi nc ferrite materials can I I ng
be e mplo yed at yet higher frequencie s. J
.ne
0.1
Figure 13.20 co ntains typical tota l core I
I
I I ,::.
loss da ta, for a ce rtain ferri te mat er ia l. Power loss I I M
t
I I
dens ity, in Watts per cubic ce ntimeter of core I
I I I I
material, is plotted as a function of sinusoidal I I I !.
excitation frequency f and peak ac flux dens ity
M, At a given frequency , the core loss l'f, can be
I I I LJ.
approxi mated by an emp irical function of the

form
0.01
0.01
I I j
II
0.1
I 0.3
( LU 7)
Ml, Tesla
The parameters K1., and ~ are determ ined by fit- Fig. 13.20 Typica l core lose;data for a high-frequency
tin g Eq. ( 13.57) to th e manu facturer's pub lished power ferrite material. Power loss density is plotted v.~.
data. Typ ica l values of f:! for ferr ite mat erials penk ilC fiux <lensicy t..B, for sinusoidal excitation.
operating in their intended range of till and f lie
in the range 2.6 to 2.8. The constant of proportiona lity K1., increases rapidly wi th excitat ion frequency f
The depe ndence of K1, onf can also be approximat ed by emp iri cal formulae th at are fitted to the manu -

508 Basic Magnetics Theo/)'
facturer ' s published data; a fourth-order poly nomial or a function of the form K1,oJ~ are sometimes
employed for this purpose .
13.3.2 Low-Frequency Copper Loss
Signi fica nt loss also occurs in the resista nce of the co pper wi ndings. This is also
a major dete rm inant of the size of a mag netic device : if co pper loss and windi ng
resistance were irreleva nt, then inductor and transforme r elements could be
ww
made arbitrar ily small by use of many small turns of small wire.
Figure 13.21 co ntain s an eq uivale nt c irc uit of a wi nd ing , in wh ich ele- i(t)
ment R models the winding resistance. The copper loss of the winding 1s
w.E
R
(13.58}
where l, 10 ., is the rms value of i(t). The de resistance of the windi ng condu ctor
can be expresse d as
asy R =p _
{
h_ ( 13.59)
.Fig. 13.21 Windin g
equivalent circuit that
models copper loss.
En
A •.
where A,, is the wire bare cross -sectional area, an d l 0 is the le ngth of the wire . The res ist ivit y p is equ al to
o-
2.3 • 1 6 Q --<:m at I 00°C.
gin
1.724 - lo-r.Q--<:m fo r sof t-ann eale d cop per at roo m tem pera ture . Thi s res istivity increases to
13.4 EDDY CURRENTS IN WINDING CONDUCTORS

eer
ing
Eddy c urrents also cause powe r losses in w ind in g co nductors. This ca n lead to copper losses s ig nificantl y
in excess of the va lue predicted by Eqs . ( 13.58) and ( 13.59). The speci fic co nd uctor eddy cu rre nt mecha -
.ne
nisms are called the skin effect and the pr oxim ity eff ect. These mechanisms are most pro nounced in high-
current co ndu ctors o f multi -laye r wind in gs, pa rticul arl y in high-freq uency converte rs.
13.4.1 Introduction to the Skin and Proximity Effects

t
Figure 13.22(a) illu stra tes a curre nt i(t) flowing thro ugh a solit ary condu ctor. This curre nt induces mag-
netic flux (I),whose flux lines follow circular paths around the curre nt as shown . Accordi ng to Lenz' s
law, the ac flux in the conductor induces eddy currents, which flow in a manner that tends to oppose the
ac flux <ll(I). Fig ure J 3.22(b ) illustrates the paths of the eddy currents . It ca n be seen that the eddy cur-
rents tend to reduce the net curr ent dens ity in the ce nter of the co nductor , and increase the net curre nt
density near the surface of the conductor.
The current distribu tion within the co nductor can be found by solution of Maxwell's equations.
For a sinu soidal current i(t) of frequency J; the result is that the current density is greatest at the surface of
the conductor. The curre nt de nsit y is an ex ponentially deca ying functio n of distance into the con ductor,
with characte ristic length o known as the penerration depth or skin depth. The penetration dep th is gi ven
by

13.4 Eddy Currents in Wi11di11g

Co11d11
c1ors 509
(a) (b )
ww
Fig. 13.22 The skin effect : (a) current i(r) induces llux rfJ(I},which in rum induces eddy currents in condu(;tor;
w.E
(b) the eddy currents tend to oppose the current i(I) in the center of the wire, and increase the current on the surface
of the wire.
asy ( 13.60)
En
For a coppe r conductor, the permeab ili ty µ,is equal to µ,0 , and the resistivity p is given in Section 13.3 .2.
At I 00°C, the penetration dep th of a copper conducto r is
o=licm
IJ
gin { 13,61)
eer
w ith/ expressed in Hz. The penetration depth of copper co ndu c tor s is plotted in Fig. 13.23, as a function
of frequency f For compar ison , the wire diamete rs d of standard American Wire Ga uge (A WG) conduc-
tors are also liste d. It can be seen that d/6 = 1 for AWG #40 at approximate ly 500 kHz , whi le d/6 = 1 for
ing
Wire diameter
-- ......-.....
.ne
0.1
-
#20AWG
Penetration
depth o,cm
---:--,....._
-i---. ;;::~~-...!Oo
·~
2~ P::::::::
:::::::
-
-
#30AWG
t
t- I-
0.0 1 #40AWG
0.001
l0kHz 100 kHz 1 MHz
Frequency
Fig. 13.23 Penetration depth Ii, as a function of fre<Juencyf, for copper wire.

AWG #22 at approximate ly 10 kH z.

The ski n effect causes the resista nce an d cop per loss of solitary la rge -di ameter wires to increase
at hig h frequency. High -fre que ncy curr e nts do no t penetrate to th e ce nter of the cond uctor. The curren t
crowds at the surfac e of the wire , the insi de of the wi re is not utilized , a nd the effective w ire cross -sec-
tio nal area is reduced . However , the ski n effect alone is not suffic ie nt to ex p lai n the increa se d h igh-fre-
qu ency copper losses obse rved in mul tiple-layer tran s form e r wi ndin gs.
A con du cto r that carries a high -frequen cy c urre nt i(t) ('I
induc es copper loss in a adjacen t co ndu c to r by a phenomeno n

known as the proximity effect. Figure 13.24 illu stra tes two copper
ww
fo il con ducto rs that are placed in close proximity to each other.
Conductor I car ries a high-freque ncy sinuso idal cur rent i(t), whose
~i~
,_
~
penet ra tion dep th O is mu ch sma ller than the th ickness h of co nd uc-
tors I or 2. Conductor 2 is open -circu ite d, so that it carries a ne t
w.E
curre nt of zero. Howeve r, it is pos sib le for eddy c urrent s to be
indu ce d in con du ctor 2 by the c urr en t i(t) flowi ng in co ndu ctor I.
The cur ren t i(t) flowin g in cond uctor I ge nerates a fl ux
Currell/
density}
7:,,
Area
asy
<l>(t)in the space be twee n co ndu c tor s I and 2; thi s flux att e mpts to
penetra te con duct or 2 . By Lenz's law, a c urrent is indu ced on the
adjac en t (lef t) side of co ndu ctor 2, w hic h tends to oppo se the flux
En
<{)(t) . If the co ndu ctors are clo se ly spaced , and if h :-"-'8, th e n the - i
induce d c urr ent wil l be equ a l and opposite to the curr e nt i (t), as
l<'i11.13.24 The proximity cffec1
illustrated in Fig . 13.24.
gin
in adja<.:en! t:nppel' foil conductors .
Since co ndu ctor 2 is open -c ircuited , the net curren t in co n- Conduct or I carries ~urrent i(I) .
ductor 2 mu st be zero . Therefo re, a c urren t + i(t) flows on the righ t- Conductor 2 i., open-circuited.
eer
side surface of conductor 2 . So the c ur rent flowin g in co nduct or I
indu ces a cu rr ent that circulates on th e surfaces of cond uctor 2.
Fi gure 13.25 illu strates the proximity effect in a s im ple tran s former wi nding . Th e primary
ing
win din g cons ists of three ser ies -connected turns of copper foil, hav in g thickne ss h 2> 8, and ca rry in g net
cu rrent i(t). The seco nd ary winding is iden tical; to the exte nt that the ma gnet izi ng curre nt is s ma ll, the
secondary turn s carry net curre nt - i(t). The windin gs are surr ounded by a magnetic core mate rial th at
encloses the mutu al flux of the tra nsfo rm er.
.ne
The high -frequency sinu soidal curre nt i(t) flows on the righ t surfac e of primary layer I , adjacen t
to laye r 2. Th is ind uces a copper loss in layer I, w h ich ca n be calc ulat e d as follows . Let Rd< · be the de
re sistance of layer I, given by Eq. ( 13.59 ), and let/ be th erms va lu e of i(t). The ski n effect causes the
coppe r loss in la yer I to be eq ual to the loss in a co nductor of thick ness 8 w i th unifo rm c urr e nt den sity .
This redu ction of the conductor thi ckne ss from h to 8 effec ti vely increases th e resistance by the same fac- t
tor. Hence, layer 1 can be viewed as ha vi ng an "ac resis tanc e" give n by
R,,,.=#R,,, (13.62)
The co pper loss in layer I is
(13.63)
The proximit y effec t causes a curre nt to be induced in the adjacent (le ft -s ide) surface of primar y
layer 2, which tends to oppose the flux ge nerate d by the curre nt of layer I. If th e co ndu c tors are closely
space d, and if h » 8, then the indu ce d cur rent w ill be equal and oppo site to the cu rr ent i (t), as illu str a ted

13.4 Eddy Currems i11Wi11di11g

Co11
d11
c/or.< 511
(a)
Core
-i -i - i
@ @ @ ® ® ®
... .. ...... ..... .....
('I
...
<') <') ('I
s s s s s §
....
ww
(b)
w.E Primary winding Secondary winding
asy
Currellt En
density
J
gin
eer
Primary winding Secondary winding
ing
Fig. U.25 A simple tr:insformcr example illu~trnting the prrndmity cflecl: (a) core ;m<lwinding geometry,
.ne
(b) distribution orcurrents on surfaces of conduc1ors ,
in Fig. 13.25. Hence , cu rrent - i(I) flows on the left surface of the seco nd layer. Since layers I and 2 are
connec ted in series, they mu st both co nduct the same net current i(I). As a result , a current + 2i (I) must
flow on the right -side surfac e of laye r 2.
Th e current flo win g on the lef t surface of layer 2 has the same magni tude as the current of la yer
t
I , a nd hence the copp er loss is the same : P 1 • The curr ent flow in g on th e rig ht surface of la yer 2 has nns
magnit ude 2/ ; hen ce, it ind uces copper loss (2{)2 R0 , = 4P 1• The to tal co pper loss in prim ary layer 2 is
therefore
(} 3,64 )
The copper loss in the second laye r is fiv e times as large as the copper loss in the fir st layer!
The current 2i(t) flowing on the right surface of layer 2 induce s a flux 2q>(r) as illu strated in Fig .
13.25. Th is causes an opposing current - 2i(t) to flow on the adjacent (left) surfac e of primary laye r 3.
Since layer 3 must also co nduct net cune nt i(t), a cune nt + 3i (t) flow s on the right surface of layer 3. The
total copper loss in layer 3 is

512 Basic Ma11

11eli<·sTheory
(1 3.65)
Likewise , the copper loss in layer m of a multip le-layer wind ing can be written
(13.66 )
It can be seen that the copper loss compo unds very quickly in a multip le- layer wi nding.
The total copper loss in the three -layer primary winding is P 1 + 5P 1 + 13P1, o r 19P 1 • More gen-
ww
erally, if the winding contains a total of M layers, then the total copper loss is
P=1 2 (gR,
1,) ,t [(m- It +m 1]
w.E
(13.67)
= 12(iR,,")1 (2M+ l)2
If a de or low-frequency ac current of rms amp litude / were applied to the M-layer winding, its copper
asy
loss would be Pde = I2MUr1c·Hence, the proximity effect increases the copper loss by the factor
En
(13 .68)
Thi s expression is val id for a foil wind ing having h ~ 6.
the secondary win din g has the same conduc tion loss.
gin
As illu strate d in Fig. 13.25, the curre nts in the seco ndary winding are sym me tri cal , and hence
=
eer
The examp le above, and the assoc iated equations , are limited to h & and to the wind ing
geometry show n. The equat ions do not quantify the behav ior for Ir - 6, nor for round co nduc tors, nor are
the equati ons suffic iently gene ral to cover the more co mplica ted wi nd ing geome tries often encou ntered
ing
in the magnetic dev ices of sw itc hing converters. Optimum des igns may, in fact, occur with co ndu ctor
thicknesses in the vicinity of one penetrat ion depth . Th e discuss ions of th e follow ing sect ions allow com-
putat ion of proximity losses in more general circumsta nces.
.ne
13.4.2 Leakage Flux in Windings
As descr ibed above, an externall y-app lied magnetic fiel d w il l indu ce eddy currents to flow in a co nduc-
tor, and thereby ind uce copper loss. To understand how mag netic fields are or iented in wind ings, let us
t
consider the simp le two -wi ndin g transfo rmer illu strated in Fig. 13.26. ln thi s exa mple , the core has large
permeab ility µ ;;., µ 0 • The prima ry wind ing co nsis ts of eight turns of wire arra nged in two layers, and
each turn carries curr ent i(t) in the direct ion indi cate d. The secondary windi ng is identica l to the pr imar y
windi ng, except that the current po larity is reversed.
Flux lines for typic al operation of thi s tran sfor mer are sketched in Fig. l 3.26(b). As descr ibed in
Section 13.2, a rel atively large mutua l flu x is present , which mag netizes the core . ln ad diti on, leakage
flux is prese nt, which does not comp letel y link both wi nd ings . Because of the symmetry of the wind ing
geometry in Fig. 13.26, the leakage flux ru ns approximate ly vertical ly throug h the wi ndings .
To de termi ne the magn itude of the leakage flux, we can app ly Ampere's Law. Consider the
closed path taken by one of the leakage flux lines , as illu strated in Fig . 13.27. Since the core has large
permea bili ty, we can assume that the MMF indu ced in the core by this flux is neg ligib le, and that the

13.4 Eddy Curre/Usin \Vi11di11g

Co11du
cton 513
(a) (b)
Primary Secondary
winding winding Leakageflux
,........,...._
,....-.........
® @ ® ® @ ® ® ®
Mutual
® @ ® ® @ ® ® ® flux
<l>M
® @ ® ® ® ® ® ®
ww Yf ® @ ® ®
f-+ Core
® ® ® ®
w.E
X
µ> ~
Fig. 13.26 Two-winding transformer example: (a) core nnd winding geometry, (b) typical flux distribution.
asy
tota l MMF around the path is dominated by the MMF .'f(x) across the core window. Hence , Ampere 's
Law states that the net cun-ent enclosed by the path is equa l to the MMF across the air gap:
En
Enclosedcurrent = ,Jo(x)= H(x)t •· (13.69)
gin
where f., is the hei ght of the window as shown in Fig . 13.27. The ne t current enclo sed by the path
depends on the number of primary and seco nd ,u-y condu ctors enclosed by th e path, and is therefore a
eer
function of the hmizo ntal position x. The first layer of the prima ry windin g co nsis ts of 4 turn s, each car -
rying current i(t), So when the path enclo ses only the first layer of the prim ,u-y winding, then the enclosed
current is 4i(t ) as show n in Fig . 13.28. Likewi se, wh en the path encloses bo th layer s of th e pr imary wind -
ing
ing , then the enclosed curren t is &i(I). When the path encloses the entir e p1imm-y, plu s layer 2 of the sec-
o ndary winding , then the net enclosed current is 8i(t) - 4i (t) = 4 i(t). Th e MMF ::l(x) across the core
window is zero out side th e windin g, and rises to a maximum of &i(t) at the interface betwe en the pri mary
and seco nd iu-y windin gs. Since H(x) = ,'if(x)l tw, the magnet ic fiel d inten sity H (x) is proporti ona l to th e
.ne
sketch of Fig. 13.28.
Leakagepath
t
-
Fig. 13.27 Analysis of leakage Hux using Ampere 's Luw,
for the transformer of Fig. 13.26.
®
Enclosed
currenJ
\
.'~(x)
l
f-+
X
H (x) I
+ l

514 Basic MagneticsTheory
Primary Secondary
wind ing winding
b
'<
.,
""
b
'<
.,
""
s., s.,
"" ""
N N
Fig, 13,28 MM F diagrnm fur the transformer win di ng examp le @ @ ® ©

of Figs. 13.26 and 13.27 . @ @ ® @
@ @ ® ©
:ff(x)
@ @ ® ©
ww 8i
w.E
4i
0
X
asy
It should be noted that the shape of the ;!l(x) curve in the vicinity of the w ind ing con du ctors
depends on the d istribution of the current within the conductors. Since this distributio n is not yet known ,
the ;i'(x) cu rve of Fig . 13.28 is arbi tra ri ly d rawn as straight lin e segmen ts.
En
In gene ral, the magnet ic fields that sur ro und conduc tors an d lea d to eddy cur rents mu st be
determined using finite ele ment analysis or othe r sim ila r me thods. However , in a large class of coax ial
gin
so lenoidal w ind ing geome tries, the magnetic field lines are nea rly parallel to the winding layers . As
show n below, we can then obta in an analyt ical solution for the proximi ty losses.
13.4.3 Foil Windings and Layers

eer
ing
The winding symmet ry described in the previous sect ion allows sim pli fica ti on of the analys is. For the
purposes of determining lea kage inductance and w in d in g eddy cu rren ts, a layer co nsi sti ng of n1 turn s of
.ne
round wire carrying curren t i(t) can be approximately mode led as an effec tive single turn of foi l, which
carries curren t nci(I) . The steps in the transformation of a layer of rou nd con ductors into a foil conductor
are forma lized in Fig. 13.29 [6, 8- 11]. The ro un d cond uctor s are rep laced by square conductors havin g
the same co pper cross-sect iona l area, Fig . l3.29( b). The thicknes s h of the sq uare conducto rs is therefore
(a) (b)
Ii
(c) (d )
Ii
t
i.... ·i
d:r::o6
: !
1"11:, 13.29 Approx imating a layer or round 0 D

conducto rs as an effective foil co nductor.
0 D t,.
0 D
0 D
0 D

I 3.4 Eddy C11rr

e111s
i11Wi11di11g
Co11d11
ctors 515
equa l to the bare copper wire diameter, mu ltipli ed by the factor ./ii74:
( 13,70)
These sq uare condu ctors are th en jo ine d toget her , into a fo il layer [Fig. 13.29(c) ], Fin ally , the wi d th of
the foil is increased, such tha t it spans the wid th of the core win dow [Fig. 13.29(d)], Since this stretching
process increases the co ndu ctor cross -sect ional area, a co mpe nsa ting factor T] mu st be introduced such
that the correct de co nducto r resis tance is pre dicted . Th is factor, some times ca lled the conductor spacing
fa ctor or the winding porosity, is defined as the ratio of the actual layer coppe r area [Fig. 13.29(a)] to the
ww
area of the effect ive fo il con ductor of Fig. 13.29(d). The poros ity effec ti ve ly increases the resist ivity p of
the conductor , and thereby increases its sk in depth :
6'-_ 8_
w.E - ,/ff ( 13.71 )
If a laye r of wi dt h C.,
, conta ins n1 turns of round wire ha vi ng dia meter d, then the winding poro sity Tl is
give n by
asy ,.,- n
11=. 1!!. (l...!.
V 4 f,.
( 13.72)
En
A typical va lue of l) for roun d cond uctors that span the wi dt h of the w ind ing bobb in is 0.8. In the fo llow -
in g ana lys is, the facto r (j) is give n by h/3 for fo il con ductors , and by the ratio of the e ffec tive foil co nduc -
tor thi ckness h to the effec ti ve skin dept h o'
gin
for round co nd uctors as fo llows:
(IJ.7))
eer
13.4.4 Power Loss in a Layer
......... -
ing
In th is sec tion, the ave rage power loss P in a u nifo r m layer of
.ne
th ickness h is dete rm ined. As ill ustrated in Fig. 13.30, the mag -

netic fiel d strengths on the left and righ t sides of the cond uctor are
denoted H(0) and H(d), res pect ively. It is assu med that the compo -
ne nt of m ag netic field normal to the co ndu ctor surface is zero.
These mag net ic fields are d riven by the magne tomotive forces
H(O) H (h)
t
il(O) and ::l(h), res pect ively . Sin uso id al waveforms are assumed,
and rms magn itudes are e mp loyed. It is fu rther assumed here that
H(0) and H(h) are in phase; the effec t of a phase shift is treate d in ········· ··;---- :······
! ;
[10].
With these assum ptions, Maxwe ll's equat ions are solve d
to find the c urre nt de nsity d istr ibutio n in the layer. The power loss
de nsity is th en compu ted, and is integra ted over the volume of the
laye r to find the total copper loss in th e laye r (10]. Th e res ult is 0 h
Fig. 13.30 The power Joss is deler-
mined for a uniform layer . Uniform
(13.74) tangemial magnetic fields f/(0) and
H (/1) are applied to t he layer surfaces.

516 Basic Ma,:11

etic~ Theory
where nt is th e numbe r of turns in the layer , and RdL· is the de resistance of the layer. The functions G 1(<p)
and Giq,) are
G ( ) ;;;;sinh (2q>)+ sin (Jq>}

1 (f) cosh (2q>)- cos (2cp}
(13 .75)
G ( ) _ sinh (q>) cos (;p) + cosh (q>) sin _(<pl
2 qi - cosh (2<p)- cos (2qi)
If the winding carries curren t ofrms magn itude / , th en we can write
ww J( h)- .i(O) = 1111
Let us furth er express ,'Jl(h) in terms of the winding current /, as

(13.76 )
w.E ( 13.77)
asy
The quantity III is the refo re the rat io of the MMF ,"l(h)to the layer ampere -turns n 1I. Then,
.«(0) m- 1 (13.78)
.i(I!) =-,,,-
En
The powe r d issipated in the laye r, Eq. (13 .74), can th en be w ritten
gin (13.79)
where
eer (13 .80)
ing
We can conclude that the prox imit y effect increases the copper loss in the layer by the fac tor
.ne
( 13.81)
Equation (13 .8 1), in conjunction with the definit ions ( 13.80), ( 13.77), (13.75), an d (13. 73), can be plot-
ted using a computer spreadsheet or small com put er program. The resu lt is ill ustrated in Fig. 13.3 I, for
several val ues of 111. t
It is illumi nating to exp ress the layer co pper loss P in terms of the de power loss Pd,·l<p = 1 that
wou ld be obta ined in a foil conduc tor having a thickness cp = I. This loss is found by div idin g Eq . (13 .8 I)
by the effect ive th ickness ratio <p:
_P_ = Q'(tp, 111) (13.82)

P,i.-1~~t
Equation (13.82) is plotted in Fig . 13.32. Large copper loss is obta ined for small (j) s imply beca use the
laye r is thin and he nce the de resistance of the layer is large . For large III and large (!),the proximity effect
leads to large power loss; Eq. (13.66) predicts th at Q'((J), m) is asymptotic to m 2 + (m - 1)2 for large (j).
Between these ex tremes , there is a va lue of (f) wh ich minimizes the layer copper los s.

/3.4 Eddy C11

rre111s
i11Wi11di11
g Co11d11
ctors 517
100
6 s 4 3
p
12R.ic
1.5
10
ww m : 0.5
w.E
0.1
asy 10
En
Fig. 13.31 rncrease of layer copper loss due to the proximity effect, as a function of (fl and MMF ratiu m, for sinu-
gin
soida l excitation .
100
m = l5 12 10 8
eer
'!
I
~/
,, , , ,,
//
, I
//
- 6
s
ing
.ne
l / / / 1/// ~ :
I
I I 4
Vv/v.
V//~
I
I I
' I 3
10 '
I
I
~ ....,,,,.,
i--
I
~
----= ' y ,_,,,y
i~
j /
IO
/
V.
''
'
I
1
/
,,
/
_/'
I
,,, ,,
--I
'!
'
I
I
I
'
I
I
'
;
'
'
2
1.5 t
i' I
- I
: ; ' ''
~ : ;
I I I I t m =O.S
I : I I I I
' 'I I '
'
l I ! I I
i I ' '
t I I
0.1
0.1 10
cp
Fig. 13.32 Layer copper loss, relative to the de loss in a layer having effective thickness or one penetration depth.

518 Basic Magnetic, Theory
Primary layers Secondary laye rs
Fig. 13.33 Conventional1wo-wi11di11

g
tramformer example. Each winding
~onsis1sor M luy~rs.
ww
w.E X
asy
13.4.5 Example: Power Loss in a Transformer Winding
En
Let us again consider the proximity loss in a conventional transformer, in which the primary and second-
ary windi ngs each consist of M layers . The nor malized MMF diag ram is illustrated in Fig. 13.33. As
gin
given by Eq. (13.8 1), the proximity eff ect increases the copper loss in each layer by the factor (j)Q' (<p, 111
).
The total increase in primary wi ndin g copper loss Pl',..is fou nd by summation over al I of the pri mary lay-
ers:
eer ( 13.83)
ing
Owing to the symmetry of the windi ngs in this example, the secondary wi nding copper loss is increased
by the same factor. Upon subs ti tuting Eq. (13.80) and co llecting terms, we obtain
.ne
(l3 .K4}
The summati on can be expressed in closed form with the help of the ident ities t
(1 3.85)
Use of these iden ti ties to si mplif y Eq. ( 13.84) leads to
( 1186 )
This expression is plotted in Fig. 13.34, for several values of M. For large (fl, CJ<p) tends to I, whi le

13.4 Eddy C11rrents

i11Wi11di
11
g Co11
d11
ctors 519
Numberof layers M =l 5 12108 7 6 5 4
... -,,,.-
100 , , r -
, r -
, r
I I , ,I / 3
I II I / ...
I II II V/ / _..V'
F - Pp,; I I/ Ill I//. V 2
R - p pri.dc
Al/JIii/ /' ......
,.... 1.5
..
V
vll/// /
/
V
........
...
10 r
- ,,
ww I I
I
, ,I
.... /
I 'NI I I I/ ... I/
0.5
J /'I •JV/ I I / /
N I" ·Ji/ I I V / /
w.E ir/ I/ V
d, 'J/111 / /
/4 ~ e@
..... ~~ V
/ .,,"
l'i;
0.1
asy 10
En
Fi~. 13.34 Incr eased total winding copper loss in th e two-w inding lmnsformer examp le, as a functi on of <jl and
nu1nbe r of layer~M, for sinusoida l excitation.
gin
100
Number of/ayers M = 15 12
eer
ing
, , IO
.
/
' r ,IF 8
/// / 7
! 1////-r 6
'
.ne
5
I ' /J, Vff~
I
l
' 4
10
-- r r I I r I
- 3
.,,,,
t
r
._,,,,,,...__.,
I I I I.I ,r I
....
' I /
~
_/ _/
'i .../
2
/ l
! ' 1 ..........-::
__,,, '
I
1.5
I
I
I
I
- 0.5
I :
I
'I I
; I
I
I
I
0. 1 ' i ;
0.1 JO
f?ig. 13.35 Transformer example wiriding total copper loss, relative to the winding de loss for Jayc, ·s having effec-
tive thicknesse s of one pen etralion depth.

520 Ba.sic Magnetics Theory
Gi(q>) tends to 0. It c an be ver ified th at FRthen tend s to th e val ue predicted by Eq. (13.68).
We can aga in express the tota l primary power loss in ter ms of the de power loss th at would be
obtained usi ng a con duct or in which q:>= I. This loss is found by dividin g Eq. ( 13.86) by (I):
(13 .87)
This express ion is plotted in Fig. 13.35, for several values of M. Depending on the number of laye rs, the
minimum copper loss for s inusoidal exci tation is obta ined for (j) near to, or somewhat less th an , unity .
ww
13.4.6 interleaving the Windings
w.E
One way to reduce the copper losses du e to the prox im ity effect is to int erleave th e w in din gs . Figure
13.36 illustrates the MMF diagra m for a simple transfo rmer in which the prima ry and secondary layers
are alternated, w ith net la yer current of magnit ude i. It can be seen that each la yer operates with :'/ = 0 on
asy
one side, and :7 =i on the other. Hence, eac h layer opera tes effect ively w ith 111 = I . Note that Eq . ( 13.74)
is sy mme tric with respect to :Ji'(O)and :Jf(h);hence, the copper losses of the interle ave d seco ndary and
prima ry layers are identical. The pro xim ity losses of the e ntire winding can th erefore be determin ed
En
directly from Fig . 13.34 and 13.35, w it h M = l. It can be shown th at the m inimum coppe r loss for this
case (w ith sin usoidal currents) occurs w ith (j) = tr./2, alt hou gh the cop per loss is near ly co nstant for an y
gin
(p <".1, and is approx ima tely equal to th e de copper loss obta ined when q>= I. It should be apparent that
interleaving can lead to s ig nificant imp roveme nt s in copper loss whe n the w ind ing conta in s several lay -
ers.
eer
Partial inte rle av ing can lead to a pa rti al impro vemen t in proxi m ity loss. Figure 13.37 illu strates
a transformer having three primar y layers and four seco ndary layers. [f the total curren t carried by each
primary layer is i(t), then each secondary layer should carry current 0.75i(t). Th e maximum MMF again
ing
occurs in th e spaces between the pr imary and seco ndar y w in dings, but has value I.Si(t).
To determ ine the value form in a given layer , we can solve Eq. (13.78) for 111:
.ne
(13.88)
t
MMF
:F(x)
3i
2i
Fig. 13.36 MMF diagram for a simple transformer with interleaved windings . Each layer operates with 111= 1.

/3.4 Eddy C11rremsin Wi11

di11
g Co11d11
ctors 521
Secondary Primary Secondary
MMF
ti"(x )
~~i1i ~~~
1
:·
~~
17'11~11~1 n111
l.5 i
i i !E i i E i ! . . ! i
l 1 ~ i ! l ; : 1
! I I
o.5o----+--+---+-----<t---+--+_,_ ! I
ww
i _____ ____,,__--+--+-...,,_ __
X
-0 .5i
-i
w.E - 1.5/
Fig. 13.37 A partially interleaved two-winding transformer, illustrating fractional values of m. Tile MMF dia-
gram is constructed for the low-fre-iuencylimit.
asy
The above express ion is valid in general, and Eq . (13.74) is symme trical in :17(0)and :~(h) . Howeve r,
when F(O) is greater in magnitude than iY(h), it is conve nie nt to intercha nge the roles of ;f(O) and .'~(h),
so that the plots of Figs. 13.31 and 13.32 can be employe d .
En
In the leftmost secondary layer of Fig. 13.37, the layer carr ies curren t - 0.75i. The MMF
gin
changes from O to - 0.75i. The value of III for this layer is found by eva luation of Eq. (13.88):
m-' _ ~(h) _ = - 0.751 = l (13.89)

- 0.75i - 0
eer
,j-(h) - ..¥(0)
Th e loss in this laye r, relative to the de loss of this seco ndary layer, can be determined usin g the plots of
ing
Figs. 13.31 and 13.32 with m = 1. For the next secondary layer , we obtain
.:l(h) = - I.Si =2 (13 .90)
.ne
m= ,i(}1)-.,'(0) - I.5i - (- 0 .75i)
Hence the loss in this layer can be determined using the plots of Figs. 13.3 1 and 13.32 with 111 = 2.The
next layer is a primary -winding layer. Its va lue of m can be expressed ,LS
.$(0)
m = ,.Jr(O)- ,:/(h)
- l..5i
- 1.5i - (- O..'ii)
= 1.5 (13 .91) t
The loss in this layer, relative to the de loss of this primary layer, can be determ ined usin g the plots of
Figs. 13.31 and 1332 with m = 1.5. The center layer has an m of
.f( h) 0.5i =0.5 ( 13.92)

m = S(h) - -.i(O) 0.Si - {- O.Si)
The Joss in thi s layer, rel ative to the de loss of th is prim ary layer, can be determined usin g the plots of
Figs. 13.31 and 13.32 with m = 0.5. The remain ing layers are sy mme trica l to the correspo nding layers
described above, and have identical copper losses. The total loss in the winding is found by summing the
losses descr ibed above for each layer.

Inte rleaving windings can significantly reduce the proximi ty loss whe n the pr ima ry and seco nd-
ary ctments are in phase. However, in some cases such as the transforme rs of the flyback and SEPIC con -
verters, th e wi nd in g cu rr en ts are ou t of phase . fnterleavi ng the n does li ttle to reduce th e MMFs and
magnet ic fie lds in the vicinity of the w ind ings, and he nce the prox imity loss is essen tially unchanged. It
sho uld also be no ted that Eqs. (13.74) to ( 13.82) ass um e th at th e w ind ing c urr ents are in pha se. General
exp ressions for ou t-of-p hase currents, as well as analysis of a flyback example, are given in [ 10].
The above procedure can be used to de term in e the high -frequency copper losses of more com-
p licated multiple -w inding magnetic dev ices. The MMF diagrams are co nstructed , and then the power
loss in each layer is eva luated using Eq . ( 13.81 ). These losses are summed, to find the to tal cop pe r loss .
The losses induced in electros tatic shields can also be dete rm ined . Several add itional examples are given
ww
in [ IO].
ft ca n be co nc luded that, for s inusoidal curr ents, the re is an optima l co nd uc tor thi ckness in the
vicinity of If)= I that leads to minimum copper loss. It is highly advantageo us to min imize the number of
w.E
layers, and to int erleave the windings. Th e amo unt of copper in the vic in ity of th e hi gh -MM F porti o ns of
win din gs should be kept to a m ini mum . Core geometr ies that maximize the width e"'of the layers, wh ile
minimizing the overa ll number of layers, lead to reduced proximi ty loss.
asy
Use of Lit z w ire is another means of increasi ng the co nducto r area wh ile mainta ining low prox -
imity losses. Tens, hundr e d s, or more strands of sma ll -ga u ge insu late d copper wir e are bund led toge ther,
and a.r e ex ternally con ne cte d in paralle l. These stran ds a.re twi ste d , or tra nsposed, such that eac h st rand
En
passes equally throu gh eac h pos itio n ins ide and on th e sur face of the bund le. T hi s prevents th e c ircula -
tio n of h igh -fr e qu e ncy curr ents between stra nds. To be effect ive, the diameter of the stra nd s should be
su ff ic ien tl y less than one sk in depth . Also , it sho uld be pointed out that the Litz wire bundle itself is com-
gin
posed of mu ltiple layers. The disadvantages of Litz w ire are its increased cost , and its reduced fill factor.
13.4.7 PWM Waveform Harmonics
eer
ing
Th e pulse-width-mod ulated wavefo rms encou ntered in sw itching co nverters conta in sign ifica nt harmo n-
ics, which can lead to increased pro x im ity losses. The effect of harmonics on the losses in a layer ca n be
dete rm ined via fiel d harmonic ana lys is [IO], in which the MMF wavefor ms 1'1(0,t ) and /i (d,t) of Eq.
.ne
(13 .74) are ex pressed in Fourier se ries . The pow er loss of each indi vi du al harmon ic is compu ted as in
Section 13.4.4, and the losses are summ ed to fin d the to ta l loss in a layer. For examp le, th e PWM wave -
form of Fig. 13.38 can be represented by the follow ing Four ier series:
i(t ) =I ~+ f
; =I
/J. / ic os(j wt) (13.93)
t
w here
/ 2.f
li =--;t- I
sin (.in:D )
=
w ith m 211.IT =
,. Thi s waveform conta ins a de compone nt / 0 D/pk' plu s harmon ics of rms magnitude 11
pro portiona l to 1/j . The transformer w ind ing curr ent waveforms of mo st sw itch ing conver ter s follow th is
Fo ur ier series, or a sim ilar ser ies.
Effects of waveforms harmon ics on proximity losses are discussed in [8- 10]. The de component
of the wind in g curren ts does no t lead to prox imi ty loss, and should not be included in proxim it y loss ca l-
cula tions . Fail ure to remove th e de componen t can lead to significa n tly pess imi stic estimates of copper

13.4 Eddy C11rre11ts

i11Wi11di11g
Conductors 523
i(t)
Fig. 13.38 Pufae-widlh modulated winding current waveform.

-
0 DT, T,
loss. The sk in depth <i is smaller for high fr eq uency harmon ics tha n for the fu nd amen tal , and hence the
ww
wavefo rm hmm onics ex hibit an increase d effect ive cp, Let q,1 be give n by Eq. (13.73), in which O is fou nd
by evaluat ion of Eq. ( 13.60) at the fun da me nta l fre quency. Since the penetrat ion dept h o var ies as the
inverse square-root of frt:4uency, the effect ive value of <Pfor hmmo nic, j is
w.E (13.94)
asy
In a mult ip le -layer win di ng exc ited by a curren t wavefo rm whose fu ndamental com po nent has (fl = q>1
close to I , harmonics can significant ly increase the total coppe r loss. This occurs because, for m > I ,
Q'(((), m) is a rapidly increas ing func tion of <p in the vic ini ty of I. When {fl 1 is sufficiently grea ter th an I ,
En
then Q'(q,, m) is nearly consta nt , and har mo nics have less infl uence on the total copper loss.
For examp le, suppose that the two-winding transfo rmer of Fig. 13.33 is employed in a converter
such as the fo rward co nverter, in whic h a w ind ing curre nt wavefo rm i(t) can be well approx imated by the
gin
Fourier series of Eq. ( 13.93) . The winding co nta ins M laye rs, and has de resis tance R,1,. The coppe r loss
ind uce d by the de co mp onent is
P,,..= l ~R,rc
eer (l 3.95)
ing
The copper loss l'j asc ribab le to harmo nic) is foun d by eva luatio n of Eq . ( 13.86) wi th(/)~ ({)j:
(13 .96)
.ne
t
The total co pper loss in the windin g is the sum of losses arising from all co mponents of the harmo nic
series:
(13.97 )
In Eq. (13 .97), the cop per loss is ex pressed re lat ive to the loss D11,/ Rdc predicted by a low-freque ncy
analysis. This express ion can be evaluated by use of a com puter program or computer spreadsheet.
To explic itly quantify the effects of harmo nics, we can define the harmonic loss factor Fr1as
f,
j =I
p
J ( 13.98)
F11=- p-
'
wit h Pi given by Eq. ( 13.96). TI1e tota l wi ndi ng copper loss is then given by

524 Basic Magnetics Theo1y
100
DaaO.I
I I I' I
I I
10
ww '' I
w.E
I
0. 1 10
q,,
asy
100
D = 0.3
Fig. 13.39
En
Increased proximity losses
'!'
I
induced hy PWM wavetorm harmonics,
rorward convener example: (n) at D "° 0.1,
(h) m D =0.3, (c) at D = 0.5.
10
gin I '
eer
I I
'
ing I I
.ne IO
q,,
10
t
0.1 10

13.5 Several Types of Magnetic De11ices, Their B-H Loo11s

, and Core vs. Copper Loss 525
with FR given by Eq. (13.86) . The harm onic factor FH is a funct ion not only of the winding geometry , but
also of the harm onic spectru m of the wi nd ing curre nt wa vefo rm . TI1e harmo nic facto r F11 is plot ted in
Fig. 13.39 for seve ral values o f D, for the simple tra nsformer exa mp le . The tot al harm onic distortion
(THO ) of the e xample c urre nt wavefo rms are : 48% for D = 0.5, 76% for D = 0.3, and 191% for D = 0. 1.
TI1e wavefo rm THO is defined as
ww
( 13.100)
It can be seen th at ha rmon ics signifi c antl y increase the proxim ity loss ofa mu lt ilaye r win d ing when cp1 is
w.E
close to I . For suffic ie nt ly small q>1, the pro ximity effect ca n be neglec ted, and Fu tends to the va lue
l + (THD)2. For large 1()1, th e h armoni cs also increase the proximit y loss ; ho wev er, the inc rease is less
dra matic than for q>1 near I beca use the fund ame nt al compo nent proximity loss is large. It can be con -
asy
clude d tha t, when the c urr ent waveform co ntains hi gh THO and when the w in d in g co ntains several lay-
ers or more, then proxi mity losses can be kept low on ly by choosi ng qi 1 much less th an I. Inte rlea vi ng the
windi ngs allows a larger value of q>1 to be e mp loyed .
13.5 En
SEVERAL TYPES OF MAGNETIC DEVICES, THEIR B-H LOOPS, AND
CORE VS. COPPER LOSS
gin
A variety of magnetic ele me nts are com mo nl y used in powe r applicat io ns, wh ic h emp loy the prope rties
eer
of magnetic core materials and windings in different ways . As a res ult , quite a few fact ors constra in the
design of a magneti c devic e. The max imum flux de nsity mu st not saturate the core. The peak ac flux den-
ing
sity should also be su ff ic ientl y sma ll, such th at core losses are accep tably low. Th e wire size shou ld be
su ffic ientl y small, to fit the requi re d numb er of turns in th e core window. Subjec t to thi s cons train t, the
wi re cross -sectional ar ea should be as lm·ge as possi ble , to minim ize the winding de res ista nce and cop -
pe r loss . But if the wi re is too thick , th en un accep table copp er losses occu r ow in g to the proxi mity effec t.
.ne
An ai r gap is needed when the device stores sig ni ficant ene rgy. But an air gap is und esira ble in tra ns-
former app lications. It should be apparent th at, for a given mag netic device, some of these constra ints are
active whil e others are not sig nifi cant.
Thu s, desig n of a magnetic ele me nt involves not onl y obtai nin g the des ired indu ctance or turn s
ra tio, but als o e nsurin g th a t the core mat eri al does not sa turate and tha t the tot al po we r loss is no t too
large . Seve ral comm on powe r app licat ions of magnetics are disc ussed in this sect ion, whi c h illustra te the
t
fac tors gove rn ing th e cho ice of core mat eri al, m a ximum flux de nsity, and desig n appro ac h .
13.5.1 Filter Inductor
A filter inductor e mployed in a CCM buc k converter is illust ra ted in Fig. 13.40(a). ln th is applica tion, the
val ue of inducta nce Li s us ually chosen such th at the inductor curr en t ripp le peak mag n itud e tJ.iis a small
fractio n of the full-load indu ctor current de component / , as illu strated in Fig. 13.40(b) . As illustrated in
Fig . 13.4 1, an air gap is e m ploye d th at is su ffi cie ntl y large to preve nt sa tu ration o f th e co re by the peak
curren t / + !li .

(a) L
i(t)
(b)
ww
w.E 0 DT, T,
asy
Fig. 13.40 Filter inductor employed in a CCM buck converter: (11) cin.:uit schematic, (b) i ndu1:tor wrrelll wavt:·
form.
(a) (b }
En
Core relu ctance ill,
<l> I'\ +
r - ...,
+
i(t)
n
I'\
" I
~ - gin
"">
eer
v(t) Air gap
turns ) l"'I:
- reluctance
&'lg ni(t)
' ' ing

.ne
Fig. 13.41 Filter induct or: (a) structure, (b) m~gnetic circuit mode l.
t
The core magne tic field strength HJt) is related to the wind in g current i( t) according to
II ( ) = n i(I) ____!!__s__ (13. 101)

(' ( { ,;: .·''
7 1 ,+ ·'"
11~
where (c is the ma gnetic path leng th of th e core . Since HJt) is proport iona l to i(t), H,.(t) can be exp ressed
as a large de compo nent H,,r1 and a sm all supe rim pose d ac ripple !J.H,., where
( 13,102)
A sketch of B(t) vs. HJJ) for thi s appli catio n is given in Fig. 13.42 Th.is dev ice operates with the min or
B- H loop illustrated. The size of the m inor loop, and hence the core loss , depends on the ma gnitud e of
the inductor current ri pp le 6.i. The coppe r loss depen d s on the rms indu ct or current ripp le, essent ially

13.5 SeveralTypes o.fMag11

etic De1•ices, Their B-H Loops, and Core 11.1. Copper Loss 527
Fig. 13.42 Filter inductor minor B-H loop.
ww 8-H loop,
large excitation
w.E
equal to the de component /. Typically, the core loss can be ignored, and the design is driven by the cop-
per loss. The maximum flux density is limited by saturation of the core. Proximity losses are negligible.
Although a high-frequency ferrite material can be employed in this application, other materials having
asy
higher core losses and greater saturation flux density lead to a physically smaller device. Design of a fil-
ter inductor in which the maximum flux density is a specified value is considered in the next chapter.
13.5.2 AC Inductor
En
gin
An ac inductor employed in a resonant converter is illustrated in Fig. 13.43. In th is application, the high-
frequency current variations are l,u·ge. In consequence, the B (t) - H (t) loop illustrated in Fig. 13.44 is
{a) {b)
i(t) eer
large. Core loss and proximity loss are usually signific ant in this application. The maximum flux density
.....
~1- L
..... ing
.ne
Fig. 13.43 Ac inductor,resonant convercerexample: (a} resonantrnnk circuit, (b) indu~torcunent waveform.
B t
Fjg. 13.44 Operational B-H loop of an ac imludor .
Core 8- H loop

528 Basic MagneticsTheory
is limited by core loss rathe r than saturat ion. Both core loss and copper loss must be acco unted for in the
design of thi s element, and the peak ac flux density t!.Bis a des ign variab le that is typica lly chosen to
minim ize the total loss. A high-frequen cy mate rial hav in g low co re loss, suc h as ferr ite , is norm ally
employed. Design of magnetics such as th is, in wh ich the ac flux dens ity is a design variable th at is cho -
sen in a optimal manner , is considered in Chapter 15.
13.5.3 Transformer
ww
Figure 13.45 illustrat es a conventional transformer employed in a sw itching conver ter . Ma gnetiz ation of
the core is mode led by the magnet izing inductance L,., . The magnetiz ing current iM(t) is related to the
core magnetic field H(r) according to Ampe re's law
w.E ( 13.103)
asy
However , iM(t) is not a d irec t function of the winding curre nts i 1(1) or i2(1), Rat her, the magneti z ing cur -
rent is dependent on the ap plied winding voltage waveform vi(t ). Sp ecific all y, the maximum ac flux den -
sity is directly proportio nal to the applied vo lt-seconds A1• A ty pica l B- H loop fo r this application is
En l
illu stra ted in Fig. 13.46.
(a) (b)
gin~ 1..__
v,(t) Ar ea A.1
t
+
[ n1 : n2
e
j
____.F
i2(t)
vi( t) · 1~~,)
~ eri i,..,(t)
--- _-___-_-_-__-__-___-__-___...
-.,-___... __ _______
ng
.ne
waveforms.
t
Fig, 13A5 Conventional transfom1er: (a) eqllivalent circuit, (bl typica l prim ary voltage and magnetizing curre nt
B
Fig. 13.46 Opera tional /J-H loop of a conventional transforme r.

8-H loop.for
operation as
-- ...1
conven:ional__ -fl ______ _
transfonner

13.5 Several Types of Magnetic Devices, Tl,eir B-H Loo/JS, and Core vs. Copper Loss 529
In the tran sformer app licat ion , core loss and proxi mit y losses are usua ll y signific ant. Typically
the maximum flux de nsity is limi ted by core loss ra ther than by satura tion. A hi gh -frequency mater ial
ha ving low core loss is emplo yed. Both core and copper losses mu st be accounted for in the des ign of th e
trans forme r. The des ign mu st also incorporate mu lt iple windings . Transforme r desig n with flux densi t y
optimized for minimum tota l loss is descri bed in Chapter 15.
13.5.4 Coupled Inductor
ww
A coup led inductor is a filter inductor hav ing mul tiple windings . Figure 13.47(a) illu strates co uple d
in ducto rs in a two -output forward converter. Th e in duct ors can be wo und on the same core , bec ause the
win d ing voltage wavefo rms are proport iona l. The induc tor s of the SEPI C and Cuk conve rters, as well as
w.E
of mu ltiple-output buck -der ived conve rters and some other converters , can be coup led . The inductor cur -
rent rippl es can be co ntro lled by control of th e win ding leakage ind uctan ces [ 12, 13]. DC currents flow in
eac h winding as illustrated in Fig. I 3.47(b) , and the net magnetization of the core is prop ortion a l to the
sum o f the winding ampe re-turn s:
asy ( 13.104)
En
As in the case of th e s in gle -win ding filte r inductor , the size of the min or B- H loop is proport ional to the
to tal current ripple (Fig. 13.48). Small ripp le impli es sm all core loss, as well as sma ll prox im ity loss. An
gin
air gap is employed , and the maxi mum flu x dens ity is typically li mited by saturation .
(a)
eer
+
ing
.ne
t
,=====
·~&,
(b)
i,( 1)~
Fig. 13.47 Coupling the output filter inductors

of a two-output forward converter: (a) schematic,
(b) typical inductor current waveforms. •
i,{1)~
'====l" ·······
·············
···········
·· l 6,·.

Fig. 13.48 Co up led inductor minor B- lf loop.
ww
w.E
13.5.5 Flyback Transformer
asy
As discussed in Chapter 6, the flyback transformer func tions as an inductor with two wind ings . The pri-
En
mary w ind ing is used dur ing the transistor conduct ion interval, and the secondary is used during the
diode con ductio n inte rva l. A flyback conve rter is ill ust rated in Fig. I 3.49(a), with the fl yback transfo rmer
gin
modeled as a magnetizing inductance in para llel wi th an ideal tran sfo rmer. The magneti zi ng curren t iM(I)
is propor tiona l to the core magne tic field strength He(/). Typica l DCM waveforms are given in F ig.
l 3.49(b).
eer
Since the flyback transformer sto res energy, an air gap is needed . Core loss depends on the mag -
nitude of the ac compo nent of the magnetizing curr ent. The B- H loop for d isconti nuous cond uction
mode operation is illust rated in Fig . 13.50. When the converter is des igned to opera te in DCM, the co re
ing
loss is sign ificant . The peak ac flux densi ty t!.R is then c hosen to ma inta in an acceptably low core loss.
For CCM operation , core loss is less significa nt, and the maximum flux dens ity may be limited only by
saturation of the core. In either case, winding proxim ity losses are typically qu ite sig nificant . Unfortu -
.ne
nate ly, inter leaving the windings has litt le impact on the proximity loss because the prima ry and seco nd-
ary windi ng curren ts are out of phase .
(a)
;, I
(b)
i,(t)~. •1_o,1:
__...,.,,_
t
+
I LM
V ',(1)1
~
+
-I iM
(')A 1,pk
__...,.,- .
Fig. 13.49' Flyback transfor me r: (a) converter schema tic, with transfo rmer eq uivalent circuit. (b) DC M eun-ctll
waveforrm .

I 3.6 S11111111ary
of Key Poims 531
B- H /oop.for -- 1,..J
Vig, 13.50 Operational 8-11 loop uf a DCM nyback lrnnsfurme.r. operation i11
DCM jlyback'----1+1--_.,. _ __ __.
converter
ww
13.6 w.E
SUMMARY OF KEY POINTS
I.
asy
Magnetic devices can be modeled using lumped-element magnetic circuits, in a manner similar to that
commonly used to model electrical circuits. The magnetic analogs of electrical voltage V, current /, and
En
resistance R, are magnetomotive force (MMF) S, nux <!>,and relucta nce ,,I' respectively.
2. Faraday's law relates the voltage induced in a loop of wire to the deri vative of flux passing through the
gin
inter ior of the loop.
3. Ampere's law relates the total MMF around a loop to the total current passing through the center of the
loop. Ampere's law implies tha t wind ing curre nts are sources of MMF, an<l that when these sources are
4.
included, then the net MMF around a closed path is equal to zero.
eer
Magnetic core materia ls exhibi t hysteresis and saturatio n. A core material saturates when the flux dens ity
Br eaches the saturation flux density 11,
-.,.
5.
ing
Air gaps are employed in inductors to prevent saturatio n when a given maximum current flows in the
winding, and to stabilize the value of induc tance . The inductor with air gap can be analyzed using a simple
magnetic equivale nt circ uit, contai ning core and air gap reluctances and a source representing the wind ing
.ne
MMF.
t
6. Conventional transformers can be modeled using sources representi ng the MMFs of each winding, and the
core MMF. The core reluctance approaches zero in an ideal transformer. Nonzero core reluctance leads to
an electrical trnnsformer model containing a magnetizing inductance, effectively in parallel with the ideal
transformer. Flux that does not link both windings, or "leakage flux," can be modeled using series induc-
tors.
7. The conventional transfor mer saturates when the applied winding volt-seconds are too large. Addition of
an air gap has no effect on saturation. Saturation can be prevented by increas ing the core cross-sectional
area, or by increasing the number of primar y turns .
8. Magnetic materials exhibit core loss, due to hysteresis of the B- H loop and to induced eddy currents flow-
ing in the core material. In available core materials, there is a tradeoff between high saturation flux density
lJ_,,.., and high core loss P1, . Laminated iron alloy cores exhib it the highest IJ·"" but also the highest 1'1,.,
while feJTite cores ex hibit the lowest P1, but also the lowest R·"". Between these two extremes are pow-
dered iron alloy and amorphous alloy materials .
9. The skin and prox imity effects lead to eddy currents in winding conductors, which increase the copper loss
P... in high-curren t high-freque ncy magnetic de,,ices. When a conductor has thickness approaching or

larger than the penetration depth 6, magnetic fields in the vic inity of the conductor induce eddy currents in
the conductor. According to Lenz's law, these eddy currents flow in paths that tend to oppose the applied
magnetic fields.
10. The magnetic field strengt hs in the vic inity of the wind ing conductors can be determ ined by use of MMF
diagrams. These diagrams are constructed by application of Ampere' s law, following the closed pat hs of
the magnetic field lines which pass near the winding conductors. Mul tiple -l ayer noninte rleaved windin gs
can ex hibit high maxim um MMFs, with res ulting high eddy curre nts and high copper loss.
11. An expression for the copper loss in a layer, as a function of the magnetic field strengths or MMFs sur-
rounding the layer, is given in Section 13.4.4. Thi s expression can be used in co njLtnction with the MMF
ww
diagram, to compute the copper loss in each layer ofa wi ndi ng . The res ults can then be summed, yieldi ng
the total wind ing copper loss. When the effec tive layer thickness is near to or greater than one skin depth ,
the copper losses of mult iple-laye r noninterleaved windi ngs ;ire greatly increased.
w.E
12. Pulse-wid th- modulated windin g currents contain significant total harmon ic distor tion, which can lead to a
further increase of copper loss. The increase in prox imity loss caused by current harmonics is most pro-
nounced in multiple-layer non-interleaved wind ings, wit h an effec tive layer thickness near one skin depth.
REFERENCES
asy
En
[l] MIT STAFF, Ma gnetic Circuits and Transfo rmers, Cambridge: The MIT Press, 1943.
[2] J. K. WATSON,Applications of Ma g11etis111

, New York: John Wiley & Sons, 1980.
[3]
gin
R. P. SEVERNSand G. E. BLOOM, Modem De-to-De Switchmode Powe r Conv erter Circuits, New York:
Van Nostrand Reinholcl, 1985.
[4] A. DA HNRE and R. D. MIDDLEBR

eer
OOK, "Modelin g ancl Estimatio n of Leakage Pheno mena in Magnetic
Circuits ," IE EE Po wer Electro nics Spec ialists Confe rence, 1986 Record, pp. 2 13-226.
(5]
ing
S. EL-HAMAMSYancl E. CHANG, "Magnetics Modeli ng for Compute r-Aided Design of Power Electron ics
Circuits," IEEE Powe r Electronics Spec ialists Confer ence, 1989 Reco rd, pp. 635-645.
.ne
[6] P. L. DOWELL,"Effec ts of Eddy Currents in Transformer Windings," Proceedi11,:sof the IEE, Vol. 113, o.
8, August 1966, pp. 1387-13 94.
[7] M. P. PERRY, "Multiple Layer Series Connected Winding Design for Minimum Loss," IEEE Transactions
011Powe r Appara tus and Sy stems , Vol. PAS-98, No. I, Jan./Feb. 1979, pp. 116-123. t
[8] P. S. VENKATRAMAN , "Wind ing Eddy Current Losses in Switch Mode Power Transformers Due to Rect-
angular Wave Currents," Proceedi11,:s of Powercon I I, 1984, pp. A I. I - A 1.11.
(9] B. CARSTEN,"High Frequency Conductor Losses in Sw itchmode Magnetics ," High Frequency Power
Converter Confe rence, 1986 Record, pp. 155-176.
( IO] J.P . VANDELACand P. ZIOGAS, "A Novel Approach for Minimizing High Frequency Tran sformer Copper
Losses ," IEEE Power Electroni cs Sp ecialists Conf erence, 1987 Record , pp . 355-367.
( 11] A, M. URLING, V. A. NIEMELA, G. R. SKUTT,and T. G, WILSON, "Characteriz ing High-Frequency Effects

in Transformer Windings- A Guide to Several Significant Articles," IEEE Applied Power Electronics
Conferenc e, 1989 Record, pp. 373-385.

Problems 533
(12] S. CUK and R. D. MIDDLEBROOK

, "Coupled-Inductor and Other Extensions of a New Optimum Topology
Switching De- to- De Converter," IEEE Industry Appiica1io11
s Society A111111al
Meeting, 1977 Proceeding. ,
pp. II I0- 1122.
(13] S. CuK and Z. ZHA NG, "Coupled-Inductor Analysis and Design," IEEE Power Eiectro11i
c.1 Specialists
Conference, 1986Record, pp. 655-665.
PROBLEMS
ww
13.1 The core illustrated in Fig. 13.SI(a) is I cm thick. All legs are I cm wide, except for the right-hand side
vertical leg, which is 0.5 cm wide. You may neglect nonuniformities in the flux distribution caused by
turning corners.
!r... r ·u·}.f!!!
w.E 1
(a) (b)
i,
......
lS.!i:L ...
ii 4
i
!
61
l
! O.Scm
--
n 1 turns -, ~-~
i .__
_ _..'
'I i
1 cm
asy
i.....J £!!!......... t.......t~.(!1
~:::::::::::::: :::::: ;~'lcm
~
......
Core relarivepermea/Jilityµ, = 1000

"1=10
En "•"' 10
Fig, 13.Sl
(a)
Problem 13.1
gin
Determine the magnetic circuit model of this device, and label the values of all reluctances in
(b)
your model.
Detem1ine the inductance of the winding.
eer
ing
A second winding is added to the same core, as shown in Fig. 13.5 l(b).
(c) Modify your modelof part (a) to include this winding.
(d) The electrical equations for this circuit may be written in the form
.ne
13.2
Use superposition to determine analytical expressionsand numerical values for L11, l
Two windings are placed as illustrated in Fig. 13.52(a) on a core of uniform cross-sectional area
11, and Li2• t
A,.= l cm2. Each winding has 50 turns. The relative permeability of the core is µ.,= 104.
(a) Sketch an equivalent magnetic circuit, and determine numerical values for each reluctance.
(b) Determine the self-inductance of each winding.
(c) Determine the inductance t,+ obtained when the windings are connected in series as in Fig.
13.52(b).
(d) Determine the inductance L- obtained when the windings are connected in anti-series as in Fig.
I 3.52(c).

534 Bas ic Magne tics Theon
(a)
;, + ;2.
•
- J -J
- vi ~
Fig. 13.52 Problem 13.2.

5cm 5cm
ww
(b)
w.E
13.3
asy
All three legs of the magnetic device illu strated in Fig. 13.53 are of unifor m cross-sectional area Ac
Legs I and 2 each have magnetic path length 3(, whil e leg 3 has magnetic path leng th ( , Both windings
have II turn s. The core has permeabil ity /J :,.. µ0 .
En
gin
ug
I
Leg
3 eer ug
2
Fig. 13.53 Magnetic core for Problem 13.3.
(a) ing
Sketch a magnetic equivale nt circuit, and give analytic al expressions for all eleme nt values.
.ne
V""" and
A voltage source is connected to windin g 1, such tha t v1(1) is a square wave of peak va lue
period T,. Winding 2 is open-circuited.
t
(b) Sketch i 1(1)and label its peak value.
(c) Find the nux 1p2(r) in leg 2. Sketch q,2(1) and label its peak value.
(d) Sketch vii) and label its peak value.
13.4 The magnetic device ill ustrated in Fig. 13.54(a) con sists of two wind in gs, whic h can replace the two
inducto rs in a Cuk, SEPIC, or other similar converter. For this problem, all three legs have the same uni-
form cross-sectional area A, .. The legs have gaps of lengths!,' 1, !,' 1, and!,'_i,respectively. The core perme-
ability /J is very large. You may neg lect fringing flux. Legs I and 2 have windings contai ning 111 and 111
turns , respectively.
(a) Derive a magnetic circuit model for this dev ice, and give ana lytical expressions for each reluc-
tance in your model. Label the polarities of the MMF generators.
(b) Write the electr ical termin al equations of th is device in the matr ix form

Probl ems 535
(a)
tur~i ----- v+2

Gap Gap
ltog th~/ t ngt/1
Ii, ------- -----g,

(b)
ww R V
w.E
.Fig, 13.54 Magneticcore and convcricrfor l'rublcm 13.4.
+
(c) asy
and derive analy tical express ions for L 11, L 12, and L22•
Derive an elect rical ci rc uit model for thi s device , and give analyt ical exp ress ions for the turn s
En
ra tio and each inductance in yo ur model, in terms of the turns and rel uct ances of pan (a).
T his single magnetic device is to be used to rea lize the two inducto rs of the Cuk converter , as in Fig.
13.54(b)
(d)
gin
Sketch the voltage wavefonm v1(1) and 1,2(1), making the linear ripp le approximation as appro-
p riate. You may ass ume tha t the co nve rter opera tes in the cont inuous co nd uction mode.
eer
(e) The voltage wavefor ms of part (d) are applied to you r mode l of pans (b) and (c). Solve yo ur
model to dete rmi ne the slopes of th e indu ctor c urren t ripp les durin g int ervals DT,.and D't ,.
Sketch the steady-state induc tor cu rrent waveforms i 1(1) and iii), and label all slopes.
(()
ing
By skillf ul choice of n 1/112 and the air gap lengths, it is possible to make the induc tor curre nt rip-
ple IJ.i in either i 1(t) or ii(I) go to zero. De te rmi ne the co ndit ions on 111/112 , 111, g 2, and g 3 th at
cause th e c urre nt ripple in ii(t) to become zero. Sketch the re sulting i 1(t) and ii(r ), and labe l all
slopes.
.ne
IL is possib le to coup le the indu ctors in this manner , and cause one of the induc tor c urre nt ripples to go to
zero, in any convener in which the indu ctor voltage wavefo rms are proportional.
13.5 Over its usable operati ng range, a ce rta in permanent mag net material has the B- H characleri stics illus-
trated by the solid line in Fig. 13.55.The magnet has leng th l,.. = O.S cm, and cross -sec tional area4 cm 2.
B,,,= I T. Derive an equi vale nt magnet ic circuit model for the magnet, and label the numerical values of
t
the ele ments.
Fig, 13.55 8-H characteri~tic.: of the permanent

magnet material for Prohlcm lJ.5 .

536 Basic Ma111iet

ics Theory
13.6 The two-tran sistor forwa rd conve rter of Fig. 6.27 operate s wi th Vx = 300 V, V = 28 V, swi tch ing fre-
que ncy / , = 100 kHz,and turn s ratio n = 0.25. The de load power is 250 W . The transformer uses an
EC4 I ferrite core; releva nt data for this core is listed in Ap pe ndix D. The core loss is gi ven by Fig. 13.20.
Th e primary winding consist s of 44 turns of #21 AWG wi re, and the secondar y win di ng is composed of
11 turn s of#l5 AWG wire . Data regard ing the America n wire gauge is also listed in Append ix D.
(a) Estimate the core loss of this tra nsfo rmer
(b) De tern1ine the copper loss of this transformer. You may neglect prox im ity losses.
13.7 Th e two-trans istor forward con verter of Fig. 6.27 operates in CCM with V8 = 300 V, V = 28 V, switchin g
freque ncy f, = 100 kHz , and turns ratio 11 = 0.25. T he de load power is 250 W. The tr ansformer uses an
ww
EC4 I ferr ite core; releva nt data for this core is listed in Appe ndix D. Th is core has window he ight
{"' = 2.78 cm . The primar y wind ing consists of 44 turns of#24 AWG wire , and the secondary windin g is
composed of 11 turn s of# l4 AWG wire. Eac h w ind in g compri ses one layer. Data regardi ng the Ameri -
can wire ga uge is also listed in Appendix D. The w ind in g ope rates at room temperatu re.
w.E (a)
(b)
De tern1ine the prim ary and secondary copper losses induce d by the de compo nents of the wind -
ing currents.
Determi ne the prima ry and secondary copper losses induced by the fun damenta l compo ne nts of
(c)
asy
the wind ing curre nts .
Detem 1ine the primar y and secondary copper losses indu ced by the second harm onic compo-
nents of the windi ng currents.
13.8
En
Th e wi nd ing curr ent s of the transfor mer in a high -volt age inve rt er are esse ntiall y sinuso ida l, w ith negli -
gible harmon ics and no de compon ent s. The prima ry wi nding co nsis ts of one layer co nt ain ing 10 turn s
gin
of ro und copper wire . The seco ndary win di ng cons ists of250 turn s ofround copper wire, arranged in ten
layers. The operating frequency is/ = 50 kHz , and the windi ng poro sity is 0.8 . Determi ne the primary
and secondary wir e diame ters and wire gauges th at mi nimi ze the total coppe r loss.
13.9
eer
A cer tain three-winding tran sfor mer co nta ins one prim ary an d two secon dari es . The operating fre q uency
is 40 kH z. The pr im ary w indi ng co nta ins a total of 60 tu rns of#26AWG, arrange d in three laye rs. The
secondary windi ngs each consist of five turns of copper foil, one tmn per layer. l11e foi l thickness is
ing
0.25 mm . The pri mary laye rs have porosity 0.8, whil e the seco ndary laye r porosity is I. Th e prima ry
wind ing carries a sinusoi dal curr ent hav ing rm s va lue / , whi le each secondar y carrie s rms current 6/. The
wi nd ings are not interleaved : the pri ma ry wi ndin g is closes t to the center leg of the core, follow ed by
.ne
secondary wind ing # 1, followe d by secondary w ind ing #2.

(a) Sketch an MMFdi ag ram illus trat ing the mag netic fie lds in the vici n ity of eac h wi nd ing laye r.
(b)
(c)
(d)
Determi ne the increased copper loss, du e to the prox imity effect, in each laye r.
Determi ne the ra tio of copper loss to de coppe r loss, F11, for the enti re trans fo rmer wi ndi ngs .
In th is applica tion , it is not feas ible to interleave the prima ry wi nding with the other windin gs. t
However, changing the conduc tor size is permi ssible . D isc uss how th e windi ngs cou ld be bette r
opt imiz ed.
13.10 A transfor mer wi nd ing contai ns a four- laye r prim ary windi ng, and two two- layer seco ndar y wind ings .
Each layer of the pr im ary w in ding carri es tota l c urr en t /. Eac h laye r of seconda ry wi nd in g #I carr ies
tota l curr e nt 1.5/. Each layer of sec ondary windin g #2 carri es tot al c mr en t 0.5/. All curre nts are sin usoi-
dal . The effect ive re lative co ndu ctor thickne ss is q>= 2. The win din gs are parti ally inter leave d , in the fol-
low ing order: two pri mary layers, followed by bot h layers of secondary # I, followed by both laye rs of
secondary #2, and finally the two remai ning pr imary layers.
(a) Ske tch an MMF d iagram for th is windi ng arrangement.
(b) Deter mine the increase d cop per loss , due to the prox imity effect, for each laye r.
(c) De ter min e the increase in total transformer copper loss, due to the proxi mity effec t.

Problems 537
13.11 A single-output forward com•erter contains a transforme r havi ng a noninterleaved seco ndary win ding
with four layers. The converter operates al D = 0.3 in CCM , with a secondary wi ndi ng current wavefo rm
similar to Fig. 13.38.
(a) Estimate the value of ((l1 that minim izes the secondary win ding copper losses.
(b) Determi ne the resu lting secondary copper loss, relative to I,,.,2Rdc .
13.12 A schema tic diagram and waveforms of the isolated SEPIC, operating in CCM, are given in Figs. 6.37
and 6.38.
(a) Do you expect the SEPIC transformer to con tain an air gap? Why or why not ?
(b) Sketch the SEPIC transfo rmer 8-H loop, for CCM opera tion .
ww (c)
(d)
For CCM opern tion, do you expect core loss to be sig ni ficant? Exph1in your reaso ning.
For CCM opera tion, do you ex peel windi ng proximi ty losses to be sign ifica nt? Exp lain yo ur rea-
soni ng.
w.E
asy
En
gin
eer
ing
.ne
t

ww
w.E
asy
En
gin
eer
ing
.ne
t

14
Inductor Design
ww
w.E
asy
En
nu s chapter treats the design of magnetic elements such as filter inductors, using the K~ method. With
gin
this method, the maximum flux density B,,,"'is specified in advance, and the element is designed to attain
a given copper loss.
The design of a basic filter inductor is discussed in Sections 14.1 and 14.1.5. In the filter induc-
eer
tor application, it is necessary to obtain the required inductance, avoid saturation, and obtain an accept-
able low de winding resistance and copper loss. The geometrical constant K11 is a measure of the effective
magnetic size of a core, when de copper loss and winding resistance are the dominant constraints [ 1,2).
ing
Design of a filter inductor involves selection of a core having a Kg sufficie ntly large for the applicatio n,
then computing the required air gap, turns, and wire si:z.e.A simple step-by-step filter inductor design
procedure is given. Values of Kg for common ferrite core shapes are tabulated in Appendix D.
.ne
Extension of the K11method to multiple-winding elements is covered in Section 14.3. In applica-

tions requiring multiple windings, it is necessary to optimize the wire sizes of the windings so that the
t
overall copper loss is minimized. It is also necessary to write an equation that relates the peak flux den-
sity to the applied waveforms or to the desired winding inductance. Again, a simple step-by-step trans-
former design approach is given.
The goal of the K8 approach of this chapter is the design of a magnetic device having a given
copper loss. Core loss is not specifically addressed in the Kg approach, and B,.w., is a given fixed value. In
the next chapter, the flux density is treated as a design variable to be optimized. This allows the overall
loss (i.e., core loss plus copper loss) to be minimized .
14. 1 FILTE R INDUCTO R DESIGN CONST RAIN TS
A filter inductor employed in a CCM buck converter is illustrated in Fig. 14. 1(a). In this application, the
value of inductance Li s usually chosen such that the inductor current ripple peak magnitude i'li is a small
fraction of the full-load inductor current de component /, as illustrated in Fig. 14. l(b). As illustrated in
Fig. 14.2, an air gap is employed that is sufficiently large to prevent saturation of the core by the peak

540 ctor Design

/11d11
(a) L
i(t )
(b)
ww
w.E 0 DT, T,
asy
Fig. 14.1 Filter inductor employed in a CCM buck converter: (a) cin.:ui1 schematic, (b) inductor current wave·
form,
En
(a) Core reluctance fJl, (b)
9C

~ I'\ +
r
+
i (t)
n
'" I
"'
6 -, gin
"
eer
v(t)
turns Air gap
I N reluctance
-
" )
&/8 ni (t)
'
"""
~
' ing
.ne
Flg. 14.2 Filter indm;tm: (n) stmc ture, (bl mag ne tic circ uit mmfol .
t
current/ + l!!.i.
Let us consider the design of the filt er inductor illustrated in
Figs. 14.1 and 14.2. It is assumed that the core and proximi ty losses are
negligib le, so that the inductor losses are dominat ed by the low-freq uenc y L
copper losses. The inductor can therefore be modeled by the equivalent

circuit of Fig. l4.3, in which R represents the de resistance of the wind - i(t)
ing. It is desired to obtain a given inductance L and given winding resis-
tance R. The inductor should not saturate when a given worst-case peak R
curren t l,,.,u is applied. ote that speci ficat ion of R is equivale nt to speci-
fication of the copper loss Pm, since
PC."lt = / ~ltUR (14, \) J,'ig. 14.3 Filter inductor

equivale111 <.:ircui
t.
The influence of inductor winding resistance on converter efficiency and
output voltage is modeled in Chapter 3.

/4. I Filter lnducror Design Cmw raints 541
(a) (b)
Cross-sectio
nal fYlC
i(t) areaAc
+
n
v(t) Air gap
~ ·"',
turns
eg ni(t)
ww
Fig. 14.4 Filter inductor; (a) assumed geometry, (b) magnetic circuit
w.E
It is assumed that the inductor geometry is topologic ally equivalent to Fig. 14.4(a). An equiva -
len t magnetic circui t is illustrate d in Fig. 14.4(b). The core re luctance ,'1i?,and air gap reluctance ,'1!11are
asy ( 14.2)
En
where f 0 is the core magnetic path lengt h, A,_.is the core cross -sect ional area, Jlc is the core perme ability,
gin
and fg is the air gap leng th . It is assumed tha t the core and air gap have the same cross -sect iona l areas.
So lution of Fig. 14.4(b) yield s
eer (14.3)
Usually, .<W
, < ,'1/
8 , and hence Eq. (14.3) can be approx im ated as
ing (14.4)
.ne
The air gap dominates the inducto r properties . Four desig n cons train ts now can be ide ntifie d.
14.1.1 Maximum Flux Densit y

t
Given a peak windi ng curre nt l11uu, it is desired to operate the core flu x dens ity at a max im um value Bmax·
The value of B.,,m:is chosen to be less than the wor st-case satura ti on flux den sity n.,mof the core mate ria l.
Substitution of <ll ==BA,. into Eq. ( 14.4 ) leads to
(14.5)
Upon letting / = /,,"'-'and 8 = B,,•..,, we obtain
(14.6)
Th is is the first desi gn co nstra int. The turn s ratio II and the air gap le ngth €8 are unknowns.

542 Design
l11d11ctor
14.1.2 Inductance
The given ind uctance value L must be obtained . The indu ctance is equal to
(14.7)
This is the secon d design co nstrai nt. The turns ration , core ,uea A,., and gap length£~ are unknown .
ww
14.1.3 Winding Area
w.E
As illu strated in Fig. 14.5, the wi nding must fit through the window , i.e ., the hole in the center of the
core. The cross -sectional area of the conductor , or bare area , is Aw If the win di ng has n turns , the n the
area of copper conductor in the window is
asy
If the core has window area WA, then we can express the area availab le for the winding co nductor s as
(14 .8)
En K,.W~ (14.9)
gin
whe re K11 is the window utilization factor , or fill fa ctor. Hence, the third desig n co nstra int can be
expressed as
K,,wA ;:::nAw
eer ( 14. 10)
ing
The fill factor K,, is the fract ion of the core wind ow area tha t is filled with copper. K,, mu st lie
between zero and one. As discussed in [ l] , there are several mecha nism that cause K,, to be less than
uni ty. Rou nd wire does not pack perfe ctly; th is reduces K,. by a factor of 0.7 to 0.55, de pendin g on the
.ne
winding techniq ue. The wire has insu lation ; the rat io of wire co nductor area to total wire area varies from
approximately 0.95 to 0.65, depe ndin g on the wire size and type of insu lation . The bobb in uses some of
t
the win dow area. Insulat ion may be required between windings and/or w in d ing laye rs. Typic al va lues of
K,, for cores with windi ng bobbins are: 0.5 for a sim ple low -voltage inductor , 0.25 to 0.3 for an off -l ine
transfo rmer , 0.05 to 0.2 for a high-voltage transformer supp lyi ng seve ral kV, and 0.65 for a low -voltage
foi l tra nsforme r or inducto r.
Core
Wir e bare area
Aw
Core w indow
area WA
Fig. 14.5 The winding nm,t fil in the core wind()w a.rca.

14.1 Filter lnd11c

lor Desig11Co11strai111.< 543
14.1.4 Winding Resistance
The resi stance of the w indi ng is
e
R=p A°
w
( 14.11)
where p is the resist ivity of the cond uctor mate rial , £,, is the lengt h of the wire , and Aw is the w ire bare
area . TI1e res istivity of coppe r at room temperature is 1.724• l 0--6Q--cm. The len gt h of the w ire compr is-
ww
ing an 11-turn win ding can be expressed as
e.= n(ML,T) (14.12)
w.E
where (MLT) is the mea n-length -per -turn of the wind ing. The me an- le ngt h-per-turn is a fu nction of the
core geometry. Sub stitu tion of Eq. ( 14. 12) into ( 14. 11) leads to
asy n (MlT)
/( co p - A
" w
-
{14.13)
Thi s is the fourth cons tra int.
En
14.1.5 The Core Geometrical Constant Kg
gin
eer
The fo ur constra ints , Eqs. (14 .6), ( 14.7), (14.10 ), and (14 . 13), invo lve the qu an ti ties A'", W,1,and MLT,
whic h are function s of the core geometry, the quantities f,,.0 ,. B,.,,,x• µ 0 , L, K,,. R, and p, which are given
specifica tions or other known quantitie s, a nd Fl, CR, and Aw, wh ic h are unk now ns. Elimi nation of th e
unk nowns n, CR,and Aw leads to the following eq uation:
A_;W1 > pl 2/;,,. , ing

.ne
(14.14)
(MLT) - B!,,,RK,,
t
The qu anti ties on the right side of thi s e quat io n are specifica tio ns or other know n quan titie s. Th e left side
of the eq uat ion is a func ti on of the core geometry alo ne. It is necessary to choose a core whose geome try
sa tis fies Eq. (14. 14).
The quantity
(14.15)
is called the core geo metrica l co nsta nt. It is a figur e -of -mer it that descr ibes the effe cti ve elec trical size of
magneti c cores , in applicatio ns where copper loss and maximum flux density are specified. Tables are
inc luded in Appendix D th at list the val ues of Kg fo r sever al standard fa milies of ferri te cores . K~ has
dimen sio ns of lengt h to the fift h power.
Equat ion ( 14.14 ) reve als how the spec ific at ions affect the core size . Increasi ng th e inductance or
peak current req uir es an increase in core size . Increas ing the peak flu x densi t y a ll ows a decrease in core
siz:e, and he nce it is advan tageous to use a core ma te rial that exhib its a hig h satur a ti on flux densi ty .
Allo wi n g a larger w indin g res istance R, and hence larger copp er loss, leads to a s ma lle r core . Of course,

544 Inductor Desig n
the increased copper loss and sma ller core size w ill lead to a higher temperature rise, which may be
unacceptable. The fill factor K0 also in fluences the core size.
Equatio n (14. 15) reveals how core geometry affec ts the core capabi litie s. An inductor capable
of meeting increased electrica l requ irements can be obta ined by increas ing either the core area A, .. or the
window area WA.Increase of the core area requ ires addit ional iron core mater ial. Increase of the window
area impl ies that additiona l copper winding material is emp loyed. We can trade iron for copper , or vice
versa, by ch anging the core geome try in a way that maintains the K~ of Eq. (14.15).
ww
14.2 A STEP-BY-STEP PROCEDURE
The procedure developed in Section 14.1 is summarized below. This simple filter indu cto r des ign proce-
dure shou ld be regarded as a first -pass approach. Numerous issues have been neglected , including
w.E
detai led insu lation requirements, conductor eddy current losses, temperature rise, roundoff of number of
turns, etc.
The fo llowing quanti ti es are spec ified , using the un its noted:
asy
Wire resistivity
Peak winding current
p
Ima;:
(il-c m)
(A)
Inductance
Winding resistance
En L
R
(H)
(1JJ
Winding fill factor
Maximum operating flux density gin
K.
8 ma:r: (I')
The core dimensions are expressed in cm:

Core cross-sectional area A, eer
(cr1i2)
Core window area

Mean length per turn
WA
MLT
(cnh
(cm)
ing
.ne
The use of centimeters rather than meters requires that appropria te factors be added to the desi gn equa -
tions.
I. Determine core size
K > pl il~ .., 10•

B;,._,RK,.
(cm~ ) (14 , 16)
t
g-
Choose a core which is large enough to satisfy this inequalit y. Note the va lues of A c, W,1,and MLT for
this core. Theresistivi ty p of co pper wire is 1.724, I~ .Q...cmat room te mpera tur e, and 2.3 · 10--<>
.Q-cm
at 100°C.
2. Determine air gap length
(m) (14.17)
with A0 expressed in cm 2 . µ 0 = 4rt ·w--

7 H/m. The air gap len gth is given in meters . The va lue expressed
in Eq. ( 14.17) is approximate, and neglects fring in g flux and other nonidealiti es.

14.3 M11/tiple
-Wi11di11g
Magnetics Design via the K, Method 545
Core manufacturers sell gapped cores. Rather than spec ifying the air gap leng th, the equivalen t
quant it y Al is used . AL is equal to the inductance, in mH , obta ined wit h a winding of 1000 turns. Whe n
AL is specified, it is the core manufacturer 's responsibil ity to obtain the correct gap length . Equation
( 14.17 ) can be modified lo yield the required A1,,as follows:
(mH/ 1000 turns) ( 14.18)
where Ac is given in cm 2, Lis given in Henries, and B,,.,u.

is given in Tesla.
ww
3. Determine number of tums
(14.19)
4.
w.E
Evaluate wire size
asy (14.20)
En
Select wire with bare copper area less than or equal lo this value. An American Wire Gauge tab le is
included in Append ix D.
As a check, the win di ng resistance can be computed:
R= pn(MLT)
A ,,
(.Q)
gin ( 14.21)
eer
14.3 M LTIPLE-WlNDING MAGNETIC S DESIGN VIA THE K111VIETH0D
ing
The Kg method can be extended to the case of mult iple -winding magnetics , such as the tran sforme rs and
coupled inductor s described in Sections 13.5.3 to 13.5.5. The desired turns ratios, as well as the desired
.ne
wi ndin g voltage and current waveforms, are specified. In the case of a couple d inductor or flyback tra ns-
former, the magnetizing inductance is also specified. It is desired to select a core size, number of turns
for each winding, and wire sizes. It is also assumed that the max imum flux density B,,. u is given.
With the Kg meth od , a desired copper loss is attain ed . In the mu lti ple - winding case, each win d -
ing con tributes some copper loss, and it is necessa ry to alloca te the avai lable window area among the
t
various windings. In Section 14.3. l below, it is found that total copper loss is minimized if the wi ndow
area is divided between the windings according to their apparent powers. This result is emp loyed in the
following sections, in which an op timi ze d K8 met hod for coupled inductor desig n is developed .
14.3.1 Window Area Allocation
The first issue to sett le in des ign of a mu ltiple-winding magnetic device is the allocat ion of the window
area Awainon g the vaiious windings. [ti s desired to design a device having k windings with nuns ratio s
111 : n 2 : ... : nk. These wind in gs must conduct rm sc urrenl s fl' 12 , .. . , l k respectively. It should be noted that
the wi ndings :u-eeffective ly in paral le l: the windin g voltages ai·e idea lly related by the turns ratios

546 c1or Design

/11d11
n11scurrent rms current

Ii 12
rms curren t
ww 1.
w.E : nk
Fig. 14.6 It i~ des ired in optimally allocate the window area of a k- winding magnetic clement to minimi7.e low-
frequency copper loss~ . with givrn nm wimling cu1rcntsand tums ratios.
asy (14 .22)
En
However, the win di ng rms currents are de termined by th e loads, and in ge neral are not related to the turns
ratios. The dev ice is represented schema tically in Fig. 14.6.
gin
The relevant geometr ical parameters are summ ari zed in Fig . 14.7(a). It is necessary to allocate a
portion of the total window area WAto each wi ndin g, as ill us trated in Fig. 14.7(b). Let ai be the fract ion
eer
of the window area allocated to windin g j, where
0<a 1 <l (14.23)

a 1 +a 2 +···+cx,:l
ing
(a)
.ne
Core
Window area WA
Core mean length

per tum (MLT) t
Wrre resistivity p
l<'ig. 14.7 IJasit: corn topology,
i11cludi11g
window urea W11 cndo scd by Fill factor K.,
core (a}. The window is allocated to
the vnrious windings to minimize low-
frequency copper loss (b) .
(b)
Winding l alloca1io11{ ::::~~:::~::::~::
a1W.t
Wi11ding2 allocation {
<XiWA
/ Total window
etc. area WA

14.3 Mulriple-Wi11di11g
Ma11
11eti
cs Design via the Ki Method 547
The low -frequency coppe r loss P,....1 in wind in g j depen ds on th e de resis tance Rj of wi nd in g ) , as follows:
( 14.24)
The resis tanc e ofwindi ngj is
(14.25)
whe re p is the wire resis tivi ty, Cjis the length of the wire used for windin g) , and AwJ is the cross-sect io nal
ww
area of the wire used for wi nd ing j. These qua nt it ies can be expressed as
( 14.26)
w.E (14 .27)
asy
where (ML1) is the windi ng mean -leng th-per-turn , and K" is the wind ing fill factor. Substitution of these
ex pressio ns into Eq. (14 .25) leads to
En (14.28}
The copper loss of windin g j is therefo re

gin
eer (14.29}
T he total coppe r loss o f the k windings is

ing
(n ;IJ)
.ne
p(MLT) J.., (14.30)

Prn,,01 = P,,.,1 + P..,;i + ··· + P..,,k= --wy- L -ix-
A• J= I ] 1
It is desire d to choose the U?such tha t th e total coppe r loss

happe ns when we vary one of the as, say a 1, between Oand I .
P,.,.,,,
1 is min imi zed . Let us co nsider what
Wh en a.1 = 0, then we allocate zero area to wincling I . In co nsequence, the resistance of winding t
I tend s to infinity. The copper loss of w in d in g I al so tends to infin ity. On the other hand , the other win d -
ing s are given maximum area, and hence their coppe r losses can be reduced . onet heless, the tota l cop -
per loss ten ds to infin ity.
When a 1 = I, th en we allocate al l of the window area to winding I, and none to the other wi nd -
ings . Hence, the res istance of wi nd ing I, as we ll as its low - frequency copper loss, are minimi zed. But the
cop per losses of the re ma in ing wind in gs tend to infin ity.
As illustrate d in Fig . 14.8, there must be an opt imum n lue of a 1 that lies between these two
ext reme s, where the total copper loss is minim ized. Let us compute the opti mum val ues of a 1• a 2•• . . , ak
usi ng the method of Lagrange multip liers. It is de sired to m inimi ze Eq. ( 14.30), subject to the constrai nt
of Eq. (14 .23). Hence, we define the function

548 ctor Design

/11d11
Copper
loss
ww 0
Fig,. 14.8 Variation of copper lo~ses with a 1.
w.E (14.3 1)
where
asy
En
( 14.32)
gin
is the co nstra in t that mu st eq ual zero, an d l; is the Lagra nge mu ltipl ie r. Th e optim um poi nt is the sol ut ion
of the sys tem of equ ations
eer
'ti(o. 1, 1x2... ·, a,.l;) _ 0 ing (14.33)
.ne
Jcr., -
iJ/(0. 1, a 2, " ', a,,S) -Q

d~ -
The sol uti on is
p~MtT2 (ti
n/ i)2"'P.-.w, (14.34)
t
l;=
A 11 / -
nn,Jnr
am=- ~- - (14.35)
L ,i.r
n= J I
L
Thi s is the op timal choice for the as, and the res ulti ng m in im um val ue of Pm·""'
Accord in g to Eq . ( 14.22) , the w indin g vo lta ges are propo rtion al to the turns rntios. Hence, we
can express the ais in the alte rnat e fo rm

14.3 M11/tiple
-Wi11d
i11
g Ma8'1erics Design via the K,M erhod 549
Vm/11,
a.,.=- .,-- (14.36)
L~ I V/J
,1 1
.
by multip lying and divid ing Eq. (14.35) by the qu antity V",!11 111• It is irrele vant whether rms or peak volt-
ages are used. Equation (14.36) is the desired result . It states that the window area should be allocated to
the various windings in proportion to their apparent powers. The numerator of Eq. ( 14.36) is the apparent
power of winding m , equal to the product of the rms current and the voltage. The denominator is the sum
of the apparent powers of all windin gs.
As an example, consider the PWM full-bridge transfor mer ha ving a center-tapped secondary, as
ww
illustrated in Fig. 14.9. This can be viewed as a three-winding transformer, having a single primary-side
winding of fl I turns, and two secondary-side windings , each of 112 turns. TI1ewinding cur rent wavefor ms
i1(t), ii(t), and i3(1) are illustrated in Fig. 14.10. Their rms val ues are
w.E 2T
l
,
127
,i (t) dt
0
2
1
II
:: --1
Tl I
I .fl5 (14.37)
asy.C'
Ii= 11 = \ / 2}., i ~(1)dt =½I, ..I+ D
(14.38)
En
Substitution of these expressions into Eq. (14.35) yields
gin (109 )
0
·::-
-a
3-2
-l
(
I
.~ 0 ) eer (14 .40}
I +y 1·+0
If the design is to be optimized at the operating poin t D = 0.75, then one obtains ing
.ne
a 1 ==U.396
t
U2 = 0,302 (14.41)
a 3 = 0.302
So approximate ly 40% of the window area should be allocated to the primary winding, and 30% should
ri 1 turns {
} ri 2 turns
i3(t)
Fig. 14,9 PWM foll -bridge transformer ex;imple .

550 lnd11ctor Design
i 1(l) n2 I
n,
0 0
-~ I
n,
Fig, 14.10 Transf'onner waveforms, ii(t)
l
1-'WMful 1-briJge co nve 11er exampl~. I
0.51
0
0.51 r
ww iif)
l 0.5/
I
0.5/
w.E 0
0
DT, T_
, T,+ DT, 2T, t
•
asy
be allocated to each half of the center-tapped secondary. The total copper loss at thi s optimal desig n poi nt
is found from evaluat ion of Eq. ( 14.34):
En
p(M LT ) 1·f ') 1
r 0 , .1M =~ _L. n j l _r
,J - [
_4 ;1
( 14.4 2}
1(
= p( MC/')11~/ , ·--- ·-)
gin
W K - I + 21) + 2,1D ( l + D)
;\ /,(
14.3.2 Coupled Inductor Design Constraints

eer
Let us now consider how to design a k-winding coupled inductor, as discussed in Section 13.5.4 and
illustrated in Fig. 14.11. It is desired that the magnetiz ing inductance be a specified value L M, refe1Ted to
winding I. It is also desired that the numbers of turns for the other windings be chosen according to ing
.ne
desired turns ratios. When the magnetizing curre nt iM(t) reaches its maximum value IM,ma., , the coupled
inductor should operate with a given max imum flux dens ity 11,,,,,, . With rmscurrents t., 12 , . . . , I, applied to
the respective windi ngs, the total copper loss should be a desired value P,.., given by Eq. (14.34). Hence,
the design procedure involves selecting the core size and number of primary turns so that the desired
magnetizing inductance, the desired flux density, and the desired total copper loss are achieved. Other
quantit ies, such as air gap length, secondary turns, and wire sizes, can then be selected. The derivation
t
follows the derivation for the single wind ing case (Section 14.1), and incorporates the window area opti-
mization of Section 14.3.1.
The magnetizing current iM(f) can be expressed in terms of the windi ng currents i (1), ii( l ),.... 1
i/1 ) by solution of Fig. 14.11 (a) (or by use of Ampere's Law), as follows:
(14.43)
By solution of the magnetic circ uit model of Fig. 14.1 l(b), we can write

14.3 M11/tipl
e-Wi11di11g
Magnetic., Design via rhe K1 Method 551
(a) (b)
nl : ''2
+ i2(t)
file
LM v 2(t)
RI Rz
I
n 1iM(t )
'9 f!lg
ww
+ ik(t)
vk(t)
w.E : nk
Rk
Fig. 14.11 A k-winding magnetic device. wi1hspecified 1ums mlios and waveforms: (a} electrical circuit model,
(h) a magneticcircuit model.
asy
En
ll Ii M(I) = B(l)A, .1?t (14.44)
This equation is analogous to Eq. (14.4), and assw11esthat the reluctance ,-'Ilg of the air gap is much larger
are ignored.
gin
than the reluc tance .'1\',.of the co re. As usual , the total flux <ll(t) is eq ual to B(t)A ,.. Leakage inducta nces
To avo id sat uration of the core, the instantaneo us flux density B (t) must be less than the satura -
eer
tion flux density of the core material, B_,0 ,. Let us define IM,nmx as the max imum value of the magnetiz ing
curre nt iM(t). According to Eq. ( 14.44), this will lead to a ma x im um flux density B,,uu givenby
ing ( 14.45)
.ne
For a value of fM ,max g iven by the circ uit application , we should use Eq . ( 14.45) to choose the turns 111 and
gap lengt h fE such that the maxi mum flux density B.,."'is less than the satura ti o n dens ity B_ ,.,,.Equa tion
(14.45) is similar to Eq. ( 14.6), but accounts for the magne tizations produced by multiple winding cur -
rents.
The magnetizing inductance LM, referred to win din g I , is equa l to t
(14.46)
This equat ion is ana logous to Eq. (14.7).

As shown in Section 14.3.l, the total copper loss is minimi zed when the core window area WAis
alloca ted to the various wi ndings according to Eq. (14.35) or (14.36). The tota l coppe r loss is then given
by Eq. (14.34). Equation (14.34) can be expressed in the form
p(MLT)n; l ;"' (14.4 7)

Pm = WK
, u
---

552 /11d 11
ctor Design
where
(14.48)
is the sum of the rms win din g curr ents, referred to w ind in g I.
We can now elim inate the unkn ow n qua ntit ies l11 and n 1 fro m Eqs. (14 .45), (14.46), and (14.47).
Equ ation (14.47) then becomes
(14.49)
ww
We can now rearrange th is equa tion, by groupin g term s th at invo lve the core geome try on the left -hand
w.E
side, and spec ifications on the rig ht -hand side:
(14.50)
asy
The left -hand side of the equ a tion can be recog nized as the same Ki; term de fin ed in Eq. ( 14. 15) . There-
fore, to des ign a coupled indu ctor th at meets the requir ement s of opera ting wit h a given m ax imum flux
En
dens ity B,,..... give n primar y magne tizi ng ind ucta nce LM, and with a given total copper loss P,,., we mus t
select a core th at sat isfies
gin (14 .51)
eer
Once such a core is fo und , then the wi nd in g I turn s and gap length can be selected to sat isfy Eqs. (14.45)
and ( 14.46). Th e turns of windings 2 through k are selec ted accord ing to the des ired turn s ratios. The
u sin g Eq . (14 .27) .

ing
win dow area is alloca ted am ong the win di ngs acc ordin g to Eq. ( 14.35), and the wire gauges are chosen
Th e proced ure above is appl ica ble to desig n of cou pled indu ctors. Th e res ults are appli ca ble to
.ne
design of flyback and SEPIC tra nsfo rmers as well , alth o ugh it sho uld be noted that the proced ure does
not accou nt for th e e ffects of core or pro xi mity loss. It also ca n be extended to design of other devices,
t
such as conventional tran sform ers - doing so is left as a homework problem.
14.3.3 Design Procedure

Th e fo llow ing quantiti es are spec ified, us ing the un its noted:
Wire effective resis tivity p (~m)
Total rms winding currents, referred to winding (A)
Peak magnetizing current, referred to winding (A)
Desired turns ratios

14.3 M11
lri/J/e-Wi11di11
g Magnetics Design via the K, Method 553
Magnetizing inductance, referred to winding I LM (H)
Allowed total copper loss P,.• (W)
Winding fill factor K.

Maximum operating flux density 8 i,r,u (T )
The core d imen sions are expressed in cm :

Core cross-sectional area A,. (cm2 )
ww
Core window area WA (cnh
Mean length per tum MlT (cm)
Th e use of cen timeter s ra ther than meters require s that appropr iate factors be added to the design equa -
tions.
1. w.E
Determine core size
asy (14.52)
En
Choose a core which is large enoug h to sa tisfy this inequality. Not e the values of A, , WA' and MLT for
this core. The re sistiv ity p of copper wir e is 1.724· 10-6 Q-cm at room temperature, and 2.3 · 10- 6 Q-cm
at l00°C.
2. Determine air gap length

gin
(m)
eer (14.53)
ing
Here, B.,wx is expressed in Tesla, Ac is expressed in cm 2, and lg is exp ressed in meters . The permeabilit y
of free space is µ0 = 47t·10- 7 Him . Thi s val ue is ap proximate , and neglect s fringing flux and othe r non -
ideali ties.
.ne
3. Determine number of winding turns
(14.54)
t
Here , Bmaxis expressed in Tes la and A,. is exp ressed in cm 2 .

3. Determine number ofs econdary turns

Use the desired turns ratios:
( 14.55)

554 Indu ctor Design
4. Evaluate fraction of window area allocated to each winding
/i1/ I
U1= --
/I l / ""
nif1
Ui= - - (14.56 )
111/M
11,/1
a,=--
n1l,c,,
ww 5. Evaluate wire sizes
w.E
asy (14.57 )
Select wire with bare copper area less than or equa l to these values. An American Wire Gauge table is
included in Appendix D.
En
14.4 EXAMPLES
gin
14.4.1 Coupled Inductor for a Two-Output Forward Converter
eer
ing
As a first example, let us consider the design of coupled inductors for the two-output forward converter
illustrated in Fig. 14.12. This element can be viewed as two filte r inductors that are wound on the same
.ne
core. The turns ratio is chosen to be the same as the ratio of the output voltages. The magneti zing induc-
tance performs the function of filtering the switch ing harmonics for both outputs , and the magnet izing
current is equal to the sum of the reflected windi ng currents.
At the nominal full-load operating point , the converter operates in the continuous conduction
mode with a duty cycle of D = 0.35. The switching frequency is 200 kHz. At this operating point, it is
desired that the ripple in the magnetizing current have a peak magnitude equal to 20% of the de compo-
nent of magnetizing current.
t
The de component of the magnetizing curre nt 1,11 is
{M = 11 +!!1_12
n,
(14.58)
= (4 A)+ ~~ (2 A)
= 4.86 A
The magnetizi ng current ripple 1',iM can be expressed as

14.4 Examples 555
(a)
+
Output 1
Vi
28V
4A
v, +
-I +
Output 2
ww
Vz 12V
/ , = 200kHz 2A
(b)
w.E (c)
asy +
En
Coupled
inductor gin
r,u,del
eer
ing
l<'ig.14.12 Two -output forwurd con verkl' examp le : (a) cin.:u it schema tic, (b ) coup led inducto r m0<.le l inscrte tl into
converter secondary-side circuit, (c) mag netizing curr clll and volrngc waveforms of coupled inductor, referred to
.ne
wind ing I .
Since we want !:,iM to be eq ual to 20% of lw we shou ld choose LMas follows:

(14 .59)
t
L _ V1D'T,
M- 2/J.iM
_ (28 V)( 1 - 0.35 )(5 µs) (14.60)
- 2(4 .86 A)(20%)
=47 µH
The peak magnetiz ing c urrent, refe rred tow ind i ng I , is therefore
IM,m,"'=I...,+ 11iu = 5.83 A (14 .61)
Sin ce the curre nt ripp les of the wi ndin g curren ts are sma ll co mp ared to the respectiv e de compo nents, the

556 l11ductor Desi;:11
rm s va lues of the w ind ing cu rr ents are approximate ly equal to the de co mpo nen ts: / 1 = 4 A, / 2 = 2 A.
Therefore, the s um o f therm s wi nd in g c urre nt s, referred to w in d ing I, is
(14 .62)
For thi s desig n, it is decided to allow 0.75 W of copper loss, and to operate the core at a maximum flux
density of 0.25 Tesla . A fill fac tor of 0.4 is assu med. T he requi red Kx is fou nd by eva lu a tio n of Eq.
( 14.52), as fo llows :
ww
K >!_l.72'!-· rn - (·~i - cm)(47µH) 2(4.86A J2(.S.83A)1 IOH
g- (0.25 T)\0 .75 WJ(0.4) (14 63)
= 16 · l()-J <.:J!l·1
w.E
A ferri te PQ 20/16 co re is selected , whi ch has a KNof 22.4 , w-J
cm5. From Appen dix D, the geo metr i-
ca l parameters for th is core are: A,.= 0.62 cm 2, WA= 0.256 cm 2, and MLT aa 4 .4 cm.
The air ga p is found by evaluatio n of Eq. ( 14.53) as follows:
asy / = µ 0 L M 1M ,nra., l04

R B~....A ,
2
En
= (4n.10- 7H/m)(47 µH)(5 .83 A)2 104 (14.64)
(0.251') 2(0,62 cm 2)
gin
=0.52mm
In pract ice , a sl ightly longer ai r gap would be necessa ry, to allow fo r the e ffects of f ringing flux and other
eer
non idealit ies . Th e w indin g I turns are fou nd by eva lu ation of Eq. (14.54 ) :
- L,11IM,-..,104
ing
n1 - Bm,,,Ac
= (47 µHX5 .83 A) to• (14 .65)
(0.25 T){0.62 cm2)
.ne
= 17.6 turns
The wi ndi ng 2 turns are chose n acco rd in g to the desi red turns rat io:
(14 ,66)
t
=
The numb e rs of turn s are round ed off to n 1 = 17 turns, 112 7 t urns (18:8 wou ld be anot her po ss ible
choice). The wi nd ow area WAis allocate d to the w indi ngs accord ing to the fractio ns from Eq. (14.56):
n 1/ 1 (17){4A)
U1 =nil,., = (17)(4.86A) =0.82 35
(14.67)
Ct2= n2l 2 = (7)(2 A) = 0 . 1695
n 1l, oi ( 17)(4.86 A)

I 4.4 Exc1111p
les 557
The w ire sizes ca n therefore be chosen as fo llows :
< a,K.W,i _ (0.8235)(0.4 )(0.256cm 2) _ • _3 2

A •., - - 17) 4.96 10 cm
/I I (
uscAWG#21
(14.68)
< a 2K.W,i 2)
I\ (0.J695)(0.4)(0.256c::m 2.48 . 10 _3 cm 2
w2 - --n-,- = (7)
useAWG 1124
ww
14.4.2 CCM Flyback Transformer
w.E
As a secon d example , let us design the flyback transformer for the co nve rter illustrated in Fig. 14 .13.
Th is co nverter operates w ith an inpu t voltage of 200 V, and produces an full -loa d outpu t of 20 V at 5A.
asy
The switching frequency is 150 kH z. U nder these operat in g cond it io ns, it is des ired tha t the converter
operate in the con tinuou s conduc ti on mode , w ith a ma gne tiz in g cur rent ripp le equa l to 20% of the de
co mpon ent of magnetizing cu rrent. The du ty cycle is chosen to be D = 0.4 , an d the turn s ratio is n2 /n 1 =
En
0. 15. A coppe r loss of 1.5 W is allo wed , not including proximit y effect losses. To allow room for isola -
tion be tween the prima ry an d seconda .ry w in ding s, a fill factor of K,, = 0.3 is assumed. A maximum flux
de nsi ty of B,,."-"= 0.25 T is used; this value is less than th e wors t-case satura tion flux dens ity B,u, of the
ferrite core material.
gin
By solu tion of the conve rter using capac itor char ge balance, the de componen t of the ma gnet iz -
eer
in g cu rr ent can be fou nd to be
(14.69)
Hence , the magnet izing cur rent ripp le should be ing

.ne
( 14,70)
and the max imum value of th e magnetizing curren t is
I"'·"'"'= I 1,1 + !!.i M = 1.5 A (J4.71) t

To obtain this rippl e, the magn etiz ing inducta nce shou ld be
VgDT ,
LM = 26i,.. (14.72)
= 1.07 mH
The rms value of the pri mary winding current is foun d using Eq. (A.6) of Appendix A , as follows:
11 = 1.,vu\1+
rr; I (M")
i =0 .796A
3l T;; ( 14.73)

558 Indu ctor Design
(a)
~-···:;.;~;;;j~;;;;
·;;;;d~i
''''"]
t 11, : 112 '
H --IM------.----,
+
! jM +
+
!'• '• C R V
t ........................ ................
..------- --
ww
w.E
(b)
I<'ig.
asy
14.13 Flyback transformer
design example ; (a) converter schc-
En
malic, (h) typical waveforms.
gin C
eer
ing
.ne
t
The rms value of the second,u·y windin g current is found in a similar manner:
(14.74)
Note that / 2 is not simply equal to the turns ratio multiplied by / 1. The total rms winding cur rent is equal
to:
(14 ,75)

14.4 ExamJJl
es 559
We can now determ ine the necessa ry core size. Eva luation of Eq. (14.52) yie ld s
(14.76)
= 0.04 9 ems
The sma lles t EE core listed in App endix D that satisfie s th is inequality 1s the EE30, whic h has
ww
K8 ==0,0857 cm~. The di mensions of this core are
A.:: 1.09cm 2
w.E W" 0.476 cm 2

Ml.T 6.6 cm
(,,. 5.77 cm
(14.77)
asy
The air gap lengt h CKis chose n accor ding to Eq. ( 14.53):
En (14.78)
= 0.44 mm gin
eer
The n umber of win d in g I turn s is chosen according to Eq. ( 14.54) , as follows:
111 = LMfM ,nUl.t 104

B.,....A,
= ( 1.07, 10- 3 tt)(1.5A) 104 ing ( 14.79)
.ne
(0.25T)(l.09cm2)
= 58.7 tluns
Since an integral number of turns is required , we round off th is value to
(14.80)
t
" • = .59
To obta in the desired turns ratio , n2 shou ld be chosen as fo llows :
111 == ("2)11
,
"1 (14.81)
= (o 1s).s9
= 8.8 1
We aga in round thi s va lue off, to

560 /11d11c10rDesiJ?n
(14.82)
The fract ions of the window area allocated to wind ings I and 2 are selected m accordance wit h Eq.
(14.56):
(14.8 3)
ww
The wire gauges sho uld therefore be
w.E A WI- <a 1K,.WA=

n 1
109·
·
10->cm 2
Aw 2 :Sa 1 ~ ;WA =8 .88· 10- -'cm 2

-u se# 28AWG
- use# l9AWG
(l 4 .84)
asy
The above American Wire Ga uges are selected us ing the wire gauge table given at the end of Append ix
D.
En
Th e above des ign does not account for core loss or copper loss caused by the proximity effect.
Let us com pute the core loss for th is des ign. Figure Fig. 14.14 conta ins a sketch of the B- H loop for this
gin
design . The flux density B(t) can be expressed as a de componen t (determined by the de value of the
magne tizing curre nt IM), plus an ac variation of peak amplitude l:!,. B that is determined by the curre nt rip -
ple l:!,.iM.TI1e max imum value of B(t) is labeled B,,.,.,; thi s value is detem 1ined by the sum of the de com-
eer
ponent and the ac ripple component. The core mater ial saturates when the applied B(t) excee ds IJ,ar;
hence, to avoid sa turat ion, B11uc<sho uld be less than B,..,,rThe core loss is determ ined by the amp lit ude of
the ac variatio ns in B(t) i.e., by t::.H.
ing
The ac com ponent l',.B is determine d using Faraday ' s law, as follows. Solut ion of Faraday ' s law
for the derivat ive of B (t) leads to
.ne
(14.85)
As illustrate d in Fig. 14.15, the voltage applied durin g the first sub interva l is vM(l)
B(t)
= VH.Thi s causes the
t
Fig. 14.14 8-H loop for the tlyback transformer design

example.

14.4 Examples 561
B(t)
B=t-----;,-.::--- --.-
Fig. 14.15 Variation of flux density 8 (1), flyback transformer

example. 0 ~------------•
VM(t} v,
ww 01-----+---------+--
w.E
flux den sity to increa se with slope
dB(/) V, (14,86)
asy
Ove r the first subin terva.l O < t < DT_,
7t= 111Ac
, the flux dens ity B(I) changes by the net amou nt 211B. Th is net
En
change is equal to the slope given by Eq. (14.86) , mult ip lied by th e int erva l le ngth DT, :
gin
tJJ ==( VA. )( DT,) ( 14.87)
11, ,.
Upon so lving for l':,.Rand express ing Ac in cm2 , we obtain
Mi==2A
V1 DT, 4
10 eer ( 14.88)
ing
IJ.1 C
For the flybac k transformer example , the peak ac flux dens ity is found to be
.ne
t:JJ=
(200 v){o.4)(6.67
~ --'c7 ~~
fls) 4
----;--~ 10
( 14,89)
2(59)(1.09cm )2
aa 0.041 T
To determine the core loss, we next exam ine the da ta prov ided by the manufacturer for the given t
core material. A typical plo t of core loss is illu strated in Fig. 14.16. For the values of /1B and switch ing
frequency of the flyback tran sfor mer design, this plot indicates th at 0.04 W w ill be lost in every cm 3 of
the core ma terial. Of course, thi s va lue neglects the effects of harmon ics on core loss. The total core loss
P1, wi ll therefo re be equal to this loss dens ity, mu ltip lied by the volume of the core:
P1, = (o.04
W/cm
3 )(A£.,) 0
( 14.90)
= (o.04 W/cm1 }( 1.09cm2 )(5.77 cm)
=0.25W
This core loss is less than the coppe r loss of 1.5 W, and neg lec tin g the core loss is often warranted in
des igns that operate in the continuous conduction mode and that employ ferr ite core m ater ials .

562 Inductor Desig11
,_ I I
I I I
~
?/ ( "'"' '-"' 1-.:t I
,k /::],,!
I I -::/~ I
I
J I I ~/
Fig. l4. 16 Determ ination of core loss de nsity for the
flyback tr:msformcr de~ign examp le. 0 .1 I I I
~
!1.~
ww 0.04
I
I
I
I
I I
I
w.E W/c m3
I
I
I
/ / 'I
I' I I
I
asy 0.0 1
0.01
0.041
0.1
MJ, Tesla
0.3
En
14.5 SUMMA RY OF KEY POINTS
gin
eer
I, A varie ty of magnetic devices are commonly used in switching converte rs. Th ese devic es differ in their
core tlux dens ity variations, as well as in the magnitudes of the ac winding currents. When the tlux density
variations are small, core loss can be neglected. Alternatively, a low-frequency material can be used, hav-
ing
ing higher samration flux density .
2. The core geometrical constant KK is a measure or the magnetic siie of a core, for app lica tions in which
copper loss is dominant. In the K11design method, flux density and total copper loss are specified. Design
procedures for single-wi nding filter inductors and for conventional multiple-winding transformers are
.ne
derived.
R EFERENCES
( 1) C. W. T. MCLYMAN,Transformer and /nd11ctor Design Handbook, Second edition, ew York: Marcel

t
Dekker, 1988.
[2] S. CHK, "Basics of Switched-Mode Power Conversion: Topologies, Magnetics, and Control," in Adva11ces
in Switched-Mode Power Conversion, Vol. 2, Irvine : Teslaco, pp. 292-305 , 1983.
[3] T. G. W!LSO JR., T. G. WILSON , and H. A. OWEN, "Coupling or Magnetic Design Choices to DC-to-DC
Conve11er Electrical Perfom,ance ," IEEE Applied Power Electro11ic.1 Conference, 1994 Record, pp. 340-
347.
[4) S. CuK and R. D. MIDDLEBROOK , "Coupled-Inductor and Other Extensions of a ew Optimum Topology
Switching DC- to-DC Converter," IEEE !11d11slryApplirntion.i Society An1111
al Meeti1111,1977 Proceedings,
pp . 1110-1122.

Problems 563
[5) S. CIJK. and Z . ZH ANG , "C oupled -Inductor Ana lysis and Des ign ," IEEE Power Elect ro11ics Spec ialisrs
Conference, I986 Recor d, pp, 655-665 .
[6] E. HN AT EK, Desig11of Solid -Srate Power Suppli es, Sec ond ed itio n, New York : Van Nostrand Rei nho ld,
198 1, Chap ter 4.
PROBL EMS
14.1 A simple buck conven er operates with a 50 kHz switching frequency and a de input voltage of V0 = 40 V.
The ou tpu t voltage is V = 20 V. The load resista nce is R <':4 n.
ww (a) Determine the value of the ou tput filter induc tance L such that the peak-to-a verage inductor cur-
rent ripple /1i is I 0% of the de compone nt /.
w.E
(b) De te rmin e the peak steady -state inducto r curre nt /~,,u
(c) Design an ind uctor wh ich has the val ues of L and l .,,u from parts (a) and (b). Use a ferr ite EE
core, with /J""'-'= 0.25 T. Choose a value of w indi ng resis tance such th at the indu ctor copper loss
is less than or equal 10 I W at room tempera ture . Ass um e K,. = 0.5 . Specify: core size, gap
14.2
J;= 100 kHz. asy
le ngth , wire size (AWGJ, and numb er of tu rns .
A boost conve11er ope rates at the follow in g quiescent point : VK = 28 V, V 48 V, P1<,.,,1= = 150 W,
Desi gn th e indu c to r for thi s converter . Choose the indu ctance val ue such tha t the peak c ur-
En
re nt rippl e is 10% of the de induc tor c urrent. Use a peak flux densi ty of 0.225 T, and assume a fill fac tor
of 0.5. Allow copper loss equa l to 0.5% of the load power, at roo m tem perature. Use a ferrite PQ core.
gin
Specify: core size, air gap length , wire gauge , and nu mber of turn s.
14.3 Exten sion of the K8 approach to desig n of two-wi nd ing transforme rs. It is desired to design a trans-
former hav in g a turn s ratio of I :11. The transforme r stores neg ligi ble energy, no ai r gap is req uired, and
eer
the ratio of the w indin g curr ents i,(l)/i 1(t) is esse ntiall y equ al LO the turn s ra tio 11. The applied pr ima ry
volt-second s J..1 are defined for a typical PWM voltage wavefom1 \'t (/} in Fig. 13.45(b) ; these volt-sec -
onds sho uld cause the max imum flux den s it y to be eq ual to a specified value B.,.,u cc AB. You may
ing
ass um e that the flux density B(t ) co nta in s no de bias, as in Fig. 13 .46. You shou ld allocate ha lf of the
cove window area to each wind ing. The tota l copper loss P,u is also specifi ed. You may neglect proxi mity
losses.
.ne
(a) Derive a tran sformer design proce d ure, in w hi ch the followi ng quan ti ties are specified: tota l cop-
per loss P,u, maximum flu x de nsity B,,,,._,..fill factor K. , wire resistiv ity p , rm s primar y cur rent / 1,
applied prim ary volt-seconds A1 , and turns ratio 1:11.Your proced ure should yie ld the fo llow ing
(b )
data: req uired core geom etr ical co nsta nt Kx, prima ry and secondary turn s nt and 112 , and pr imary
and seco ndary wire areas A,..1 and ,\, 2 •
The voltage waveform appl ied to the tra nsfo rme r prim ary wind in g of the Cuk conve rter [Fig.
v.
t
6.4 l(c)) is equal to the converter input voltage while the transisto r conducts, and is equal to
- V,DI( I - D) whi le the diode co nd ucts. This converter operates wit h a switching freq uency of
100 kHz, and a trans istor du ty cycle D equa l to 0.4. The de inpu t voltage is V" = 120 V, the de
o ut put voltage is V = 24 V, and the load powe r is 200 W. You may assume a fill fac tor of K,. = 0,3 .
Use yo ur proced ure of part (a) to design a tran sfo rm er for thi s app lica tion , in wh ich
R,,,,,..=0.15 T, and !', .,.= 0.25 W at l00°C. Use a fe rrit e PQ core. Spec ify: core size, pri mary and
secondari • turn s, and wir e gauges.
14.4 Coupled induc tor de sign . The two- outpu t forward co nverter of Fig. I 3.47(a) emp loys secondary -side
coupled induc tors. An air gap is emp loyed.
Design a co upled indu ctor for the fo llo win g app lica tio n: V1 = 5 V. V1 = J.5 V, / 1 = 20 A , 11 = 4 A,
D = 0.4. The magneti zing indu ctance should be equal to 8 µH, referred to th e 5 V wind ing. You may
ass ume a fill facto r K., of0.5 . All ow a w tal of I W of coppe r loss at l00°C, and use a peak flux density of

564 Ind uctor Design
B#uu = 0.2 T. Use a ferrite EE core. Spec ify: core size, air gap lengt h, number of tllrnS and wire gauge for
each windi ng .
14.5 Fly back tra ns forme r design. A flyback converter operates with a 160 Vdc inp ut, and produces a 28 Vdc
ou tput. The max imum load curr ent is 2 A. The transformer tllrn S ratio is 8: I. The switch ing freq uency is
IOO kHz . The conve rter should be des ig ned to opera te in the disco ntinuous conduction mode at all load
curre nts. The total coppe r loss shoul d be less tha n 0.75 W.
(a) Choose the val ue of transforme r magnet izing inducta nce LM such tha t, at max imum load current ,
D 3 = 0.1 (the du ty cyc le of subi nterval 3, in wh ich all semiconductors are off). Please ind icate
whether your value of LM is referred to the pri mary or seco ndary w indi ng . What is the peak tra n-
sistor curr en t? Th e peak diode curr e nt ?
ww (b) Des ign a flyback tra nsfo rmer for thi s appl icatio n. Use a ferrite pot core with B""" = 0.25 Tesla,
and with fill factor K.,aa 0.4. Spec ify: core size, prima ry and secondary turns and wire sizes, and
air gap leng th .
w.E {c)
(d)
For your des ign of part (b), compute the copper losses in the p rimary and secondary win din gs.
You may neglect prox imity loss.
For yo m design of par t (b), co mpute the core loss. Loss data for the core mate ri al is g iven by
asy
Fig. 13.20. Is the core loss less than the coppe r loss comp llted in Part (c?
En
gin
eer
ing
.ne
t

15
Transf armer Design
ww
w.E
asy
En
gin
In the design method s of the previou s chapter, copper loss Pm and maxi mum flux densit y B max are speci-
eer
fied, whi le core loss Pfe is not spec ific ally addressed . This approach is appropriat e for a numb er of appli-
cations, such as the filter inductor in which the dominant design constraints ,ue copper loss and
saturation flux densit y. However, in a substantial class of applica tions, the operating flux dens ity is lim -
ing
ited by core loss rather than saturation. For example , in a conven tional high -frequency transfo rmer , it is
usuall y necess,uy to limit the core loss by operating at a reduced value of the peak acfluxdensi ty M.
This chapter covers the general tnmsformer design problem. It is desired to design a k-windin g
.ne
tra nsfo rmer as illustrated in Fig. 15.1. Both copper loss Pcuand core loss P1, are modeled. As the operat-
ing flux densit y is increased (by decreas ing the numb er of turns), the copper loss is decreased but the
t
core loss is increased. We will determine the operating flux density that min imizes the total power loss
P,,,,"' Pfr + P,.,..
It is possible to generalize the core geometrical constant K1 design method, de1ived in the previ-
ous chapte r, to treat the design of magnetic devices when both copper loss and core loss are sig nifica nt.
This leads to the geometrical constant Kief,•a measure of the effective magnetic size of core in a trans-
former design applicatio n. Several example s of transformer designs via the K81e method ,ue given in this
chapter. A similar procedure is also derived, for design of single-winding inductors in which core loss is
significant.
15.1 TRANSFORMER DESIGN: BASIC CONSTRAINTS
As in the case of the filter inductor desig n, we can write severa l basic co nstrainin g equ ations. These
equations can then be combined into a single equatio n for select ion of the core size. In the case of trans -
former desi gn, the basic co nstraints describe the core loss, flux density, copper loss, and total power loss

S66 Transform
er Design
ww
w.E
llig. IS.I A k-winding transform er, in which bottl co re loss and coppe r loss an~ signi !it:ant.
asy
vs. flux den sity. The flux dens ity is then chosen to optim ize the total powe r loss.
15.1.1 Core Loss

En
gin
As descr ibed in Cha pt er 13, the total core loss P1, depends on the peak ac flux density !J.B,the o perati ng
fre qu ency f, and th e vo lu me of the core . At a given frequency , we can approximate the core loss by a
function of the form
Pr, = Kr_(t,.iJ)ll A J,,, eer (15.1 )
ing
Again , A 0 is the core cross -sect ional area, t,,.is the core mean magnetic path length , and hence AJ 111is the
.ne
vo lume of the core. K,..,_is a consta nt of proportionali ty whi c h depe nds on th e ope rating frequency. The
expo nen t Di s determined from the core manufac ture r 's publ ished data. Typically, the va lue of /3for fer-
rite power materials is approximate ly 2.6; for other core mater ials, th is expone nt lies in th e range 2 to 3.
Equatio n (15. 1) gene rall y assumes th a t the app lied waveforms are si nu soi dal ; effects of waveform ha r-
monic content are ignored here .
t
15.1.2 FllLxDensity
An arbitrary periodic primary volta ge wavefo rm v 1(r) is illus trated in Fig. 15.2. The vol t-seco nds app lied
during the po sitive po rtion of the wavefo rm is denoted A1:
(15 .2)
These volt-seco nds , or flux -linkages, cause the flux de nsit y to change from it s ne gative pea k to its posi -
tiv e pea k value . Hence, from Farad ay's law, the peak va lue of the ac component of the flux dens it y is

15./ Tramfo n11er Design: Basic Co11sr

rai11r
s 567
ww
w.E
Fig. 15.2 An arbitrary transformer primary voltage waveforms, illustrat i ng !he volt-seconds 11
posirive pQrtionof the cycle.
ppli cd dui-ir1g the
asy (15.3)
En
Note that, for a give n app lied voltage waveform an d 11. 1, we can reduce M by increas ing the pri mary
turns 111• This has the effec t of decreasing the core loss acco rding to Eq. ( 15.1). However , it also causes
gin
the copper loss to increase, since the new windings will be compr ised of more turns of smaller wire . As a
res ult , there is an optimal cho ice for t.B, in wh ich the total loss is min imized. In the next sections, we
w ill dete rmin e the op timal t:JJ. Having done so, we can then use Eq . (15 .3) to deter min e the pr imary
turns II p as follows:
eer
ing
It should also be noted that , in some converter topologies such as the forward converter with conven-
(15.4)
.ne
tiona l reset wind in g, the flux density B( t ) and the magneti zin g current iM(t) are not allowed to be nega-
ti ve. In conseq uence, the instantaneous flux density B(t) contains a de bias. Prov ided th at the core does
not approach saturatio n, this de bias does no t significa ntly affect the core loss: core loss is determ ined by
the ac component ofB(t). Equations ( 15.2) to (15.4) con t inue to ap pl y to this case, since AB is the peak
value of the ac compo nent of B(t). t
15.1.3 Copper Loss
As shown in Section 14.3.1, the tota l copper loss is min im iz ed when the core window area WA is allo -
cated to the various w ind in gs accor din g to their re lative apparent powers. The total coppe r loss is then
g iven by Eq. ( 14.34 ). This eq uation c,m be ex pressed in the fo rm
(15 5)
where

568 Transform er DeJign
( 15.6)
is the sum of the rm s wind ing curr e nts, referred to w ind i ng I. Use of Eq. ( 15 .4) to el iminate n 1 fro m Eq.
( 15.5) leads to
(15.7)
ww
The right -hand side of Eq. (1 5.7) is gro uped int o three terms. The first gro up co ntain s speci ficat ions,
whi le th e seco nd grou p is a fu nc ti o n of the core geo metry. The last term is a fun c ti on of !lB, to be chosen
to opt imize th e des ign. It ca n be seen that copper loss va ries as the in verse sq uare of !lB; increas ing !lB
w.E
reduces P '-'u'
The increased copper loss due to the prox im ity effec t is not e xpli c itl y accou nted for in th is
design proced ure. In pract ice , the p rox im ity loss must be est imated a fter the core and w in di ng geome-
tri es are kn own . However , the increased ac res istance due to prox imity loss ca n be ac counted for in the
asy
des ign proced ure. The effective val ue of the wire res istivity p is increase d by a factor eq ual to the es ti-
mated rat io RaJR,1,,, Wh en the core geometry is know n , the engi nee r can att emp t to imp le me nt the w ind -
ings such tha t the es timated R0 JRdc is obta in ed . Several des ign ite ra t ions may be needed .
15.1.4 Total power loss vs. Ml En

The total power loss P,,,, gin
is fou nd by add ing Eqs. ( 15.1) and ( 15.7):
eer (15.8)
The dependence of Pf,• P,,,.,and P,,,1 on 13.Bis sketc hed in Fig. 15.3.
ing
.ne
Power
loss
t
Oprimumt:.B t:.B
t'ig. 15.3 Dependence of copper loss, core los~. and total loss on peak ac flux density.

15./ Tra11s
fo nner Design: Basic Con.Hrainrs 569
15.1.5 Optimum Flux Density
Let us now choose the val ue of tJJ th at m ini m izes Eq. ( 15.8). At the optimum M, wec an write
(15.9}
Note tha t the optim u m does not nece ssm·i ly occu r where P10= Pru. Rather, it occ urs where
ww
dl' 1, _ dP,. (15 .10)
d(/:,.B) - - d(M)
T he deriva tives of the core and copper losses with respect to M are gi ven by
w.E dP1, -
d(t,B) - f3K1JMJ )
l~-i)
A J,.
(!5.l I)
asy ( 15.12)
En
Substitut ion of Eqs. ( 15.1 1) and (15. 12) into Eq . ( 15 .10), and solut ion for till, leads to the op timum flux
gin
density
(15.13)
eer
ing
T he resulti ng total powe r loss is found by subst ituti on ofEq . ( 15. 13) into ( 15.1), ( 15.8), and ( 15.9). Sim-
plification of the resulting expression leads to
.ne
p
'" ' ,. '" f•
., (MLT
+2l [p).;I;
=[At K JlD
4K. W,.A
; -{i&l+ (Q)tirhl
1[r~i~l [(-13) 2
l 2
( 15. 14)
This expression can be regroup ed, as follows :

t
( 15.15)
The terms on the left side of Eq. ( 15.15) depe nd on the core geo metry, wh ile the terms on the right side
depend on specifications reg,u-din g the applicatio n (p, !,,,,,Ap K11, P,,") and the desired core material
(K 1,, (3). The left side of Eq. ( 15.15) can be defi ned as the core geometrical consta nt Kxf•:

570 Transform er Design
(15 . 16)
Hence, to design a transformer , the right side of Eq. (15.15) is eva luated. A core is selected whose K/iJ,
exceeds this va lue:
(15 . 17)
ww
The quantity KJl.f• is si milar to the geometrica l consta nt K0 used in the previo us chapter to des ign magnet -
ics when core loss is negl igible. K~r,is a measure of the magnet ic size of a core, for applicat ions in wh ich
w.E
core loss is sign ificant. Unfortuna te ly, Kg/, depe nds on
the value of K~f<
P, and hence the choice of core mat erial affec ts
·· However, the fl of most hig h-fre que ncy ferr ite mater ials lies in the narrow range 2.6 to
2.8, and Kgfe varies by no more than± 5% over th is range . Appendix D lists the values of K~1;, for variou s
asy
standa rd ferrite cores, for the va lue O= 2 .7 .
Once a core has been selected , then the va lues of A, , WA, t.,., and MLT are known. The peak ac
flux density fi.B can then be eva luated usin g Eq. (15.13), and the pr imary turn s 111 can be found using E{(.
En
( 15.4). The numb er of turn s for the rema ining windings can be com puted using the desi red turn s ratios.
The vario us window area allocations ,ue foun d using Eq. ( 14.35). The wire sizes for the various wi nd ings
can then be co mputed as discussed in the previous chap ter,
gin ( 15.18)
whe re A,,j is the wir e area for windin g j.

eer
15.2 A STEP-BY-STEP TRANSFORMERDESIGN PROCEDURE
ing
.ne
The procedure developed in the previous sections is summarized below. As in the fi lter inductor desi gn
procedure of the previous chap ter, this simp le transformer desi gn procedu re should be regarded as a first-
pass approach. Numerous issues have been neglected , includi ng deta iled insula tion requireme nts , con-
ductor eddy curre nt losses, tempe rature rise, roundoff of num be r of turn s, etc.
The following quantit ies are specified , using the un its noted:
t
Wire effective resis tivity j) (!! -cm)
J., /I .
Total rms windi ng currents, referred to primary I,,,, = 2.,
}=I
,t' 1 1
(A )
Desired turns ratios
Applied primary volt-seconds

A1 = J. v 1(t)dt
,~ J,i.1/jl •r'
(V-sec)
(mr 11
'm 1
1J
/1·ydi•

I5.2 A Step-By-Step TrmzsfomierDe.1i

g11Procedure 571
Allowed total powe r d issipat ion (W)
W inding fill factor K,,

Core loss exponent
Core loss coefficient
The core di men sions are expressed in c m:

Core cross-sectional area A,. (cm2)
Core window area WA (crn2)
ww Mea n leng th per turn
Magnetic pat h leng th

MI.T (cm )
(c m)
w.E
Peak ac flux density
W ire areas
(l i:sla )
(cm2)
The use of ce ntimeters ra ther th an meters requi res that approp ri ate factors be added to the des ign equa -
tions.
asy
15.2.1 Procedure
En
I. Determine core size.
gin
eer (15.19)
ing
Choose a core that is large enough to sa ti sfy this ineq ual ity . If necessary , it may be poss ible to use a
s ma ller core by choos ing a core material havi ng lower loss, i.e., smalle r K1;,·
2. Evaluate peak ac flux density.
.ne
l(~l,-1
!:,fl= f108 p).; /~
2K,.
(MLT ) l
WAA~l,.. PK1,·
-, ( 15.20)
t
Check whethe r M is greater than the core mater ial satura tion flux densi ty. If the core operates with a flux
de bias, then the de bias plus liB shou ld not exceed the saturatio n flux density. Proceed to the next step if
ade quate margins exist to preve nt sat ura ti on . Otherwise, (I) repea t the proce dur e us in g a core mater ial
havi ng greater core loss, or (2) use the Kil design method, in which the maxim um flux density is speci-
fied .
3. Evaluate primaiy turns.
(15.21)

572 Transformer Design
4. Choose numbers of tllrns for other windings

According to the desired turn s rat ios:
(15.22
ww 5. Evaluate fract ion of window area allocated to each winding.
w.E ( 15.23)
asy a, =--
11,1.
111i ,1u
6. Evaluate wire sizes.

En
gin
eer
(15 .24 )
Choose wire gauges to sati sfy these cr iteria

ing
A win d ing geo metry ca n now be de termin ed , and copper losses due to the proximi ty effect can
.ne
be eval uate d. If these losses are significant, it may be des irable to fu rt he r optimize the desig n by reitera t-
ing the above steps, accounting for proxim it y losses by increas ing the effective wire resistivity to the
va lue P,11= Prnl'crtlP,1,., where P,.., is the actual copper loss in clu din g p rox im ity effects, and Pd,. is the
cop per loss ob taine d when the prox im ity effect is neglig ible .
[f desired , the powe r losses and transformer model para mete rs can now be checked. For the
simp le model of Fig. 15.4, the fol low ing parame ter s are es timated:
t
Ma gnetizin g inductance, referred to windi ng 1:
Peak ac magnetizing c urr ent, referre d to w in ding I :

15.3 faamp les 573
ww
w.E
Fig. 15,4 Computed elemems of simple transformer model.
asy R _ p11,(MLT)
i - A.,.1
En
Winding resistances : R _ p11i(MLT)
2 - A.,2
gin
The core loss, coppe r loss , and total power loss can be determined
respective ly.
u si ng Eqs. (15.1), ( 15.7), and ( 15.8),
153 EXAMPLES eer

15.3.1 Example 1: Single-Output Isolated Cuk Converter ing
.ne
A s a n example, let us co nside r the design of a simple two -wind in g transforme r for th e Cuk co nverter of
Fig. 15.5.This tr ansfo rm er is to be opt imi zed at the operating po in t shown , correspon din g to D = 0.5.
The steady -state converte r solu tion is Yd = V8 , V,.2 = V. The desired transfo rm er turn s rat io is
t
l
20A
+
v, V
25V 5V
n: 1
Fig. 15.5 Isolated Cuk convener ei:.arnple.

Ve, ,,,Area A1
/ - D'T"
+
-or s- -nV a
i ,(t)
Fig. 15,6 Waveforms, Cuk converter lln
transformer desig n example.
ww -l g
w.E
ii t)
I
asy
En
n = n/112 = 5. The sw itchin g fre qu ency is / , = 200 kHz, correspo nding to T, = 5 µs. A ferr ite pot core
consis ting of Magnetics , Inc. P-materia l is to be used ; at 200 kHz , this mater ial is de scri bed by th e fol-
=
= =
gin
lowing parame ters : K1, 24 .7 W/f flcm', p 2.6. A fill factor of K,, = 0.5 is assume d . Total powe r loss of
=
P,"' 0.2 5 Wis allowed. Copper w ire, hav ing a res istiv ity of p 1.724 · l()--0.!:2--cm,is to be used .
Transfor mer waveforms are illu stra ted in Fig. 1.5.6.The app lied primary volt-seconds are
A1 "' m~V,.1 = (0.5) (5 µsec) (25 V}

eer (15 .25)
ing
"'62 .S V- µse c
Th e pri mary m1s current is
.ne
(15.2t
It is assumed tha t the rms magnetiz in g curre nt is much smaller tha n th er ms wind ing currents. Since the
transforme r con tai ns only two windings , the seco ndary rms curre nt is equa l to
f 2 =nf 1 =20 A ( 15.27)

t
The total m1s wind ing cu rren t , referred to the primary , is
! ,,,,= 11 + ftI, = 8 A ( 15.28)
The core size is evalua ted using Eq. (15 .19):
K > (l.724· !0 - '' )(62. 5· IO- •)i{8J2(2 4.7){112 ·•l to"

ef,· - 4 (Q.5)(0.25){H l1,6) ( 15.29)
= 0.0O29S

15.3 faa1111,l
es 575
Th e pot core data of App en d ix D Lists the 2213 pot core with Kxf<= 0.0049 fo r~= 2.7. Evaluat ion ofEq.
(15.16) shows that KK(, = 0.0047 for th is core, when f>= 2.6. In any eve nt, 2213 is the smallest standard
pot core size having K;;_r,:S 0.0029~ The increase d va lue of KP.fesho uld lead to lower total power loss.
Tiie peak ac flux density is found by evaluat io n of Eq. (15.20), us in g the geome tric al d ata for the 2213
pot core :
[lt4.o)
M= JOSS
..!_.2_
24·10- "}(§2.5·10-6 ) 1(8) 1 {4.42) _l _ _
2 (0.5) (0.297)(0 .635)3(3. 15) (2.6)( 24.7) ( 15.30)
ww = 0.0858 Tesla
Th is flux de nsit y is co nsiderabl y less than the sa tura tion flux densi ty of approxima tely 0.35 Tesla. The
w.E
pr ima ry turns are determined by eva luation of Eq. ( 15.21):
II I :;
~ (62.5· I0- 6 )
\0 2(0.0858)(0.6Jj ) (15.31)
asy = 5.74 turns
The secondary turn s are found by evaluation of Eq. (15.22). It is desired that the transfo rmer have a 5: I
tu rns ratio, and hence
En
gin
(15.32)
In prac tice, we might select 111 = 5 and 112 = I. Th is wo ul d lead to a slightly higher M and slightly higher
loss.
eer
The fraction of the window area allocated to windin gs I and 2 are determ ined usin g Eq. (15.23):
a,=
{4A)
(8A)=0 ..5
ing ( 15.33)
{½)(20 A)
.ne
a,=
. ( 8 A ) = 0.5
For this exa mple, the win dow area is divi ded equa lly between th e pri mary and secon dary win d ings, since
the ratio of thei r rm s cu rren ts is equal to the turn s ra tio. We ca n no w eva luate the p rimary and seco ndary
wire areas, v ia Eq. ( 15.24):
t
(0.5)(0. 5)(0 .29 7) ..3 2

Aw1= (S) ==14.8·10 cm
( 15.34)
Aw,-
_ (0.5 )(0.5)(0 .297 ) _ 74 '?.
(I) - .~l
o--'cm l
The wire gauge is selec ted us ing the wire table of Appendix D. AWG # 16 has area 13.07 · 10- 3 cm', and
is su itab le for the p rimary winding. AWG #9 is suitab le for the secondary wi ndi ng , with area
66 .3 , 10- 3 cm 2. Th ese are very large cond uctors, and one turn of A WG #9 is not a practical so lutio n l We
can also expect signific a nt p rox imi ty losses , and sig nificant leakage indu ctance . In pract ice, interleave d
fo il w ind in gs might be used . Alternative ly, Litz wire or several parallel strands of smaller wire could be
e mpl oyed.

576 Tra11sfor111
er Desig11
4226
. /""( 0. 1
261~-
1;; ·;; 2213
~ •
2616
0.08
0.06
1811
0.04
ww R02
w.E
25 kHz 50kHz 100 kHz 200 kHz 250 kHz 400 kHz 500 kHz 1000 kHz
Switch ing frequency
Fig. 1S.7 Variation of transformer size (bar chart) with switchi ng frequency, Cuk converter example. Optimum
asy
peak ac flux density (data points) is also plott ed.
It is a worthwhile exerc ise to repea t the above des ign at several d iffe re nt switch in g frequencies ,
En
to determin e ho w transfor mer size var ies with switching freque nc y. As th e sw itc hing freque ncy is
increased , the core loss coefficient K1, increases. Figure 15.7 illustrates the transformer pot core size , for
vario us switch in g frequencies over the range 25 kHz to I MHz , for this Cuk conve 11er examp le using P
gin
material wi th P101 < 0.25 W. Peak flux de nsities in Tes la are also plotted. For switching frequenc ies below
250 kHz, increasing the frequency causes the core size to decrease. This occurs because of the decreased
applied volt -seco nds A1. Over this range, the optima l Af1 is essentia lly ind ependent of switc h ing fre-
eer
que ncy; the t..Bvaria ti ons sho wn occur ow ing to quan tizat ion of core sizes.
For sw itching frequencies greater than 250 kHz , increas ing frequency causes great ly increased
ing
core loss. Maintaining P,or:5 0.25 W then requires tha t llB be reduced, and hence the core size is
increased. The minimum transfor mer size for thi s example is apparen tly obtained at 250 kHz.
In practice, several matters com p lica te the depende nce of transformer size on sw itch ing fre-
quency. Figure 15.7 ignores th e winding geometry and copper losses due to winding eddy currents.
.ne
Greater power losses can be allowed in large r cores. Use of a different core m aterial may allow higher or
lower switching frequencies. The same core material, used in a different application with different speci-
ficat ions, may lead to a different opt imal frequency . Nonetheless, exam ples have been reported in the lit -
erature [1-4] in which ferri te transformer size is minimized at frequencies rang ing from several hundred
kil ohe rtz to several megahertz. More deta iled design optimi za ti ons can be performed using computer t
optim iza tion programs [5, 6].

15.3.2 Example 2: Multiple-Output Full-Bridge Buck Converter
As a secon d examp le, let us consi der th e design of transformer T 1 for the multiple -out pu t full -brid ge
buck converte r of Fig. 15.8.This converter has a 5 V and a I 5 V output , with m ax imu m loads as shown .
l11e transformer is to be opt imi ze d at the full -loa d operat in g po int shown, correspond ing to D = 0.75.
Waveforms are ill us tra ted in Fig. 15.9.The conver ter sw it ch ing frequency is .f, = I 50 kHz. In the full -
bridge confi guration , the transfo rm er waveforms have fundamental frequency equa l to one -half of the
sw itching freque ncy, so th e effective transformer fre qu ency is 75 kHz. Upon accou ntin g for losses

I 5.3 Example.1 577
Q, Ql T, lw
D, D,
-I -I 100 A
+
v, + i 1(r) 5V
160V
j D, j D• 115v
15A
ww +
15V
w.E
asy
Fig. 15.S Mullipl e-outp ul full-bridge i.solatcd buck con verter exampl e.
Area11.
1
=VDT
En
g s
0 0
gin
ii(l) 112
11,
1sv+ 111 1 ,sv
11,
eer
ing
Fig. 1S.9 Transformer wnveforms,
0
full-bridge converter example.
- ( -112 I sv + -113 l ,sv )

111 111
. n
r-1 . e
i2t,(t)
l
1sv
i3a(t)
10.51,
1 0
t
l
1u v
0
~0.5/r
DT S Ts
0 c==C
.
Ts+DTs 2Ts t
caused by diode forward voltage drops, one find s th at the desired transformer turns rat ios n 1:n 2 :n 3 are
110:5: 15. A ferrite EE co nsi st in g of Magnet ics, Inc. P- material is to be used in this examp le; at 75 kHz ,
thi s mat erial is described by the follow ing parame ters: K1, ==7.6 WIT11 cm3.f3= 2.6. A fill factor of
K,,= 0.25 is ass umed in th is isolated multiple -output app lication . Total power loss of l',,,1 = 4 W, or
approximate ly 0.5 % of the load power, is al.lowed. Copper wire, havin g a res istivity of
p a: 1.724 · 10-6 il-cm, is to be used.
l11e app lied primary volt-seconds are

>..1 =V'[',VN=(_0.75)(6.67 µsec )( L60 V) = 800 Y µsec (l .'i.35)
The primar y rms curre nt is
(15 .36)
The 5 V seco ndary wi ndings carry rm s curre nt
(15.37 )
ww
The 15 V secon dary windings carry rms curr e nt
w.E /_\= ! f1.w /T+n= 9.9 A

The total nn s wind in g curr ent , referred to the pr imary, is
( 15.38)
asy (15 .39)
En
==14.4 A
The core size is e valuate d us ing Eq. (15. 19):
K >-
( 1.124-10· 0 icsoo-
---· gin
1o-'')2 (14 .4) 2(7.6)121! 61 8
- - - · lO (15 .40)
eer
!/J, - 4 (0.25 )(4)(u ,io )
= 0.00937
ing
The EE core da ta of Appendix D lis ts the EE40 core wit h K 111, = (J.0118 for t3= 2.7 . Eva lu a ti on of Eq.
(15.16) shows that K~r,= 0.0108 for th is core, whe n f:l= 2.6. In any eve nt , EE40 is the sma llest standa rd
EE core size having KJl.i e :5 0.00937 . The peak ac flux density is fo und by eva luation of Eq. ( 15.20 ), u sing
the geo met ric al data fo r the EE40 core:
.ne
!J.B,,, 10s (l.724-I0-
= 0.23 Tesla
6 )(800-10 - 6 ) 1(14.4) 2
2(0.25)
(8. 5) __ I_ _
(l.l) (l.27) \ 7.7) (2.6)(7.6) (15.41 )
t
Thi s flux densi ty is less th an th e satura tion flux densi t y of approx ima te ly 0.35 Tesla. The prim,uy tu rns
are de termine d by eva lua tion of E{(. ( 15 .21):
4 (800-tO 6)
111 = 10 2{0.23)(l.27 ) (15 .42}
= 1).7 lllrnS
The secondary turn s are fo und by eva lu ation of Eq. ( 15.22). It is des ired that th e transfo rm er have a
110:5: 15 turn s rat io , and hence

15.3 Examples 579
5 0 62 (15.43)
112=m''1= . 1urns
11-';
15
TTo "i= I .87 cums ( 15.44)
In pr actice, we might select 111 = 22, 112 = I, and n 3 = 3. Thi s wo uld lead to a reduced t:,.n
with red uced
core loss and increased coppe r loss. Since theresuh ing f>B is subop tim a l, the tota l power loss w il l be
increase d. According to Eq. ( 15.3), the peak ac flux density for the EE40 core w ill be
ww (800 -I0- 1') ,

M = 2( 22 )( 1.2?) IO = 0. 143 Tesla
( 15.45)
w.E
The resulting core and copper loss ca n be co mpute d us in g Eqs. ( 15. 1) and ( 15.7):
!',, =(7 .6)(0 . 143) 26(1.27)(7. 7) :: 0.47 W ( 15.46}
P =(!.724-I0-
.,, asy 6 )(800I0-
4 (0.25)
6 J1( l4.4 )~ _ (K.5) ~- L
(1.1)( 1.27)2 (0. 143) ~
JO~
(15.47)
""'5.4W
En
Hence, the tol,tl power loss would be
I'.,,,=P10 + P,.,. = .5.9 W gin (15.48)
eer
Since thi s is 50% greater than the design goal of 4 W , it is necessary to increase the core size . The next
larger EE core is the EE50 core, having K}{fi.of0 .0284. The opt imum ac flux dens it y for thi s core , given
by Eq. ( 15.3), is t!,,8 = 0.14 T; operation at this flux densit y woul d req uire 111 = 12 and would lead to a
total power loss of2 .3 W. With 111 = 22, ca lcu lations simi lar to Eqs. ( 15.45) to (15 .48) lead to a peak flux
=
dens it y of t:,.B 0 .08 T. The res ulti ng power losses woul d then be P1,, = 0.23 W, P,,. 3.89 W, ing =
.ne
P11,,= 4. 12W.
With the EE50 core and 111 = 22, the fraction of the availa ble window are a allocated to the pr i-
t
mary win din g is give n by Eq. ( 15.23) as
1, .5.7 . (15 .49)

Cl I =- = J4:4 = 0,39(,
1,,11
The fr act ion of the avai lable window area alloca ted to each ha lfofthe 5 V secondary wind in g should be
( 15.50)
The fraction of the ava ilab le window area allocated to each half of the 15 V secondary wind ing should be
Ct.
3
= 113 1 -' = _li_ .,23_ = II 094 (15 .51)
11,J, 0 , l 10 14.4 '
The prima ry wire area A'"1, 5 V secondary wire area 1\..,1 , and 15 V seco ndary wire area A,..3 are then give n

580 Tra11sfon11er
Desig11
by Eq. (15.24) as
o:1K ,,W11 (0.396)(0.25)( 1.78) _1 ,

A •.1 = --- = (22 } = 8.0-10 · ~m-
111
=} AW G /#19
a 2 K ,,W11 (0.209)(0.25)( 1.78) -.1 ,
A •., =---ee (! ) = 93.0·JO cm· (15.52)
112
=} AWG #8
_ a :iK. wA_ (~094)( 0 .25JCJ.78) _ '.I 9_ 0 _., . 2
1\ ,.,.1- - (l ) - L. I rn 1
ww
11,1 •
~AW G # l6
It may be prefera ble to wind th e 15 V out put s us ing two # 19 wires in par allel; this would lead to the same
w.E
area Aw, but would be easier to wi nd . The 5 V wi nd ings could be wo un d usi ng many turns of sma ller par-
alle led wires , but it woul d proba bly be eas ier to use a fl at cop per fo il wind ing . If insu latio n requi rements
allow , proxi mit y losses cou ld be m inim ized by interleav ing severa l thin layers of foi l w ith the pri mary
wind ing.
asy
15.4 AC INDUCTOR DESIGN
En
The transfo rm er desig n proce dure of the prev ious sectio ns can be adapted to handl e the des ign of other
gin
magnetic devices in whic h both core loss and copper loss are significa nt. A proced ure is outl ined here for
design of s ingle -windi ng inductors whose wavefo r ms co nta in sign if ica nt hi gh- freq ue ncy ac co mpone nts
eer
(Fig. 15. 10). An optimal value of ti.II is fou nd, wh ich leads to mini m um total core -plus-copper loss. The
majo r differe nce is that we must desig n to obta in a give n ind uctance, us ing a core with an air gap. The
co nstra ints and a step-by-step proce dur e are br ie fly out lined below.
15.4.1 Outline of Derivation

ing
.ne
As in the filter inductor design procedure of the previous chapter, the desired inductance L must be
t
obtained , given by
(15 .53)
The applied voltage wavefo rm and the peak ac co mponent of the flux dens it y t.B are related acco rding to
(15 ..S4)
The copper loss is give n by
( 15.55)
where / is the rms val ue of i(t). Th e core loss P1, is give n by Eq . ( 15. 1).

15.4 AC Inductor Design 581
(a) (b) Window area WA

Core mean leng th
+ per tum (MLT) Core area
i(t)
Ac
v(t) n
L cums Air gap
lg
Wire resistivityp
Fill factor K"
ww (c)
v(t)
w.E
asy
En
i(t)
gin
eer
Fig. IS.IO Ac inductor, in which copper loss and core loss are significant: (a) definition of terminal quantities,
(b) cure geometry, (c) arbilrary terminal waveforms.
ing
The value of t:JJthat min imizes the tota l powe r loss Plvl=Pc,.+ P1~is found in a manner similar
to the tran sformer desig n derivatio n. Equ atio n ( 15.54) is used to eliminate n fro m the expression for Pm.
.ne
The optimal l!.11is then computed by setting the derivative of P,0 1 to zero. The result is
(15.56)
t
which is esse ntially the same as Eq. ( 15.13). The total power loss 1'"'1 is evaluat ed at thi s value of M, and
the resulting expression is manipulated to find Kxte· The result is
( 15.57)
whe re K8f, is defi ned as in Eq . ( 15.16) . A core that satisfies this inequ ality is selected.

15.4.2 Step-by-step AC Inductor Design Procedure
The un its of Section 15.2 are employed here.
1. Dete rmin e co re size.
(15.58)
ww
Choose a core th at is large enoug h to satisfy this inequality. If necessary, it ma y be po ssib le to use a
sma ller core by choosi n g a core materia l having lower loss, that is, sma ll er KV
2. Evaluate peak ac flux densit y.
w.E ( 15.59)
3. asy
Number of turns.
En I I "'-"-
2MJA,.
[0 4 (15.60)
4. A ir gap length.
gin
eer (15 .6 1)
ing
with A,.spec ified in c.:m2 and tgexpressed in meters. Alternati vely , the air gap ca n be ind irectly expressed
via Al (mH/1000 turn s) :
.ne
( 15.62)
5. Check for saturation.

If the inducto r cur ren t con tain s a de compone nt l,1,., then the m ax imum tota l fl u x densi ty B,,.,,_
, is greate r t
than the peak ac flux density 6.ll. Th e ma x imum tota l flux densi ty , in Tes la, is given by
u
/Jma.1 =u AIJ+A ,/.•10'' ( 15.63)
JI f
If B,,,,,,. is close to or greate r than the satura tio n flux dens ity B.,,,, then the core may sat urate . The filte r
induc tor des ign procedure of the previous chapte r shou ld then be used , to operate at a lowe r flux de nsity.
6. Evaluate wire size.
A < K,.W,, ( 15.64)

.,, - ll

15.5 Summary 583
A winding geometry can now be determined, and copper losses due lo the proxim ity effect can be eval u-
ated . If these losses are significant, it may be desi rable to further opt imize the desig n by reiterat ing the
above steps, accou nting for proximity losses by increasing the effect ive wire res istivity to the value
P,1r=Pc,,l'c)Pd,·' where P,.., is the act ual co ppe r loss including proxi mity effects, and Pt/cis the copper
loss pred icted whe n the prox im ity effec t is ignored.
1. Check po wer Joss.
{' = pn(MLT_l 12
(-it Aw
( 15.65)
ww
l'k = K 1, (~B) ~AJ"'
I',,,,=P + f'j,.
0 ,.
15.5
I.
w.E
S MMARY
In a m ultipl e- w indin g tran s form er , th e lo w- freque ncy copper losses are m ini miz e d whe n th e ava ilable
2. asy
window area is alloca ted to the windi ngs acco rding to their ap parent powers, or ampere -turn s.
As peak ac flux de ns ity is increase d , core loss increases whi le cop per losses decrea se. T here is an o ptimu m
En
flu x den sity that leads to min imum total powe r loss. Provi ded tha t the core mater ial is operated near its
intended frequenc y, then the op timu m flux dens ity is less tha n the sat urat io n flux densi ty. Minim iza ti o n of
tota l loss then dete rm ines the choice of peak ac flux de n siiy.
3.
gin
The core geo me trical co nstant KI'], is a mea sure of the ma gnetic size of a core, for app lications in wh ich
core loss is sig n ifican t . In the Klif, de sign me th od, the peak flu x dens ity is optimized to y ie ld min i m u m
total loss, as opposed to the K, design m ethod w here peak flux d en sit y is a give n spec ific ati on .
eer
ing
R EFERENCES
[IJ W. J. Gu and R. LIU, "'A Study o f Volume and Weight vs. Freq uency for High-Frequency Tra nsformers,"
IEEE Power Electronics Specialists Conference, 1993 Reco rd , pp. 1123- 1129 .
.ne
[2] K. D. T. NGO, R. P. ALLEY, A. J. YERMAN,R. J. CHARLES, and M. H. Kuo, "Eva luation of Trade-Offs in
t
Trans former Design for Very -Low -Voltag e Powe r Sup ply with Ve ry High Eff iciency and Pow er Density ,"
IEEE Applied Power Electronics Conference. 1990 Record , pp . 344-353.
[3] A. F. GOLDBERG and M. F. SCIILECHT,'T he Relations hip Between Size and Power Diss ipation in a 1-
IOMHz Transfo rme r," IEEE Power Elecrronics Specialisrs Conference, I 989 Recor d, pp . 625 -634.
[4] K. D. T. GO and R. S. LAI, "E ffect o f Height on Pow er Density in High -Frequency T ransfo rmers ," IEEE
Power Electronics Specialists Conference, 199 I Recor d , pp . 667 -672 .
[5] R. B. RIDLEYand F. C. LEE, "Pract ica l Non linea r Des ign Opt imizat io n Tool for Powe r Co nve11er Co mpo -
nen ts," IEEE Power Ele Ironies Special isrs Conference, 1987 Record , pp. 3 14-323 .
[6] R. C . WONG, H. A. OWEN, and T. G . W ILSON, "Parametric S tud y o f M in imu m Co nve rter Loss in an
Energy -Stora ge De-to-D e Conv erte r," IEEE Power Electronics Specialists Conference, 1982 Reco rd , pp.
4 11-425 .

PROBLEMS
15.1 Forward converter inductor and transformer design. The objective of this problem set is to design the
magnetics (two inductors and one transformer) of the two-transistor, two-output forward converter
shown in Fig. IS. I I. The ferri te core material to be used for all three devices has a saturation nux dens ity
of approximately 0.3 T at 12.CrC.To provide a safet}' margin for your designs, you should use a maxi-
mum flux density o,..._,.that is no greater than 75% of this value. The core loss at 100 kHz is described by
J. (IS.I), with the parameter values p= 2.6 and K1, = sowrr11cm°. Calculate copper loss at 100°C.
E.i:
Steady-stare converter analysis a11ddesi1111.

You may assume 100% efficiency and ideal lossless compo-
nents for this section.
ww (a)
(b)
Select the transformer turns ratios so that the desired outpu t voltages are obtained when the duty
cycle is D = 0.4.
Specify values of L 1 and L2 such that their current ripples t:.iI and t.i 2 are 10% of their respective
'i·
w.E
(c)
full -load curren t de components 11 and
Determine the peak and rms currents in each inductor and transformer winding.
ctor design. Allow copper loss of I W in L 1 and 0.4 W in /. 2• Assume a fill factor of K,, = O.S. se
/11d11
asy
ferrite EE cores- tables of geometrical data for standard EE core sizes are given in Appendix D. Design
the outpu t filter inductors l 1 and½· For each inductor, specify:
(,) EE core size
(i,)
(iii)
En
Air gap length
umber of turns
Tra11.\{ormer
(i v) AWG wire size
gin
design. Allow a total power loss of 1 W. Assume a fill factor of K" =0.35 (lower than for the
filler inductors, to allow space for insulation between the winding s). Use a ferrite EE core. You may
eer
neglect losses due to the skin and proximi ty effects, but you should include core and copper losses.
Design the transformer, and specify the follow ing:
ing
(i) EE core size
(ii) Turns ,z1, n2 , and "i
.ne
f,= lOOkHz
-I jl
t
+
v, + n, n2 v.
SV
325 V turns turns 30 A
-I
15V
IA
Fig. 15.11 Twu-uutput forward converter of Problem 15.1.

Problems 585
(ii i) AWG wire Sile for the three windi ngs

Chec k your tra nsforme r desig n :
(iv) Comp ute the m axi mu m flux dens ity. Wi ll the core sa tm a te?
(v) Com put e the core loss, the copper loss of each wind ing, and th e to tal power loss
15.2 A single -t rans istor fo rwa rd conve n er operat es with an in p ut volla ge V,:: 160 V , a nd supplies two out-
pu ts: 24 Val 2 A , and 15 Val 6 A. Th e d uly cycle is D = 0.4. The turns ra tio between th e p rimary wi nd -
ing a nd the reset wind ing is I: I. The sw itc h ing freq uency is 100 kHz. Tiie core material loss eq ua tion
parame ters are ll"' 2.7, Kr,= .SO.You m ay assume a fill fac to r of 0.25. Do no t allow the co re maximum
flux de nsi ty to exceed 0.3 T.
ww Des ign a tra nsforme r for thi s appl icat io n, having a total powe r loss no grea ter than 1.5 W at
100°C. eglec t proximi ty losses. Yo u may neg lec t the reset w indi ng. Use a fe rrit e PQ co re . Spec ify: co re
size, peak ac flux de nsity, w ire Siles, and n umbe r of turn s for each wind ing . Co mp ute th e core and cop -
per losses for your design .
15.3
w.E
Fly back/SEP IC tran sfo rme r des ign. The '' transfor mer " of the llyback and SEPIC co nven ers is an ene rgy
storage dev ice, w hich migh t be more accu ra tely described as a mulliple -wind ing ind uctor. The magne -
til ing indu ctance L,, fu nct ion s as an energy- transferri ng ind ucto r of the co n ver ter , and therefore the
asy
"transform er" normally contains an air gap. The convener may be designed to opera te in either the co n-
tinu o u s or di sco nt in uo us cond uction mode. Core loss may be sig n ific an t. It is also im por tant to e ns ure
that the peak c urrent in the mag ne ti zing in d uc ta nce does not cau se sat u ra ti on.
Inpu t:
En
A flyback tra nsfor mer is to be des igned for the follow ing two-ou tput flyback co nve rter applica tion:
160 V<lc
Ou tp ut I:
Ou tp ut 2 :
Swit chi ng frequency : gin 5 Vdc at 10 A
15 Vdc al I A
100k H z
Mag netizi ng inductance
T urn s ratio:
L/
eer
1.33 mH , refe rre d to p rim ary
160:5:15
(a)
Transfor mer powe r loss: A llow 1 W tota l
ing
Does lhe co nverter operate in CCM or DCM ? Refe rred to th e pri ma ry win din g , how large are (i)
lhe ma g ne tiz ing cur re nt ripp le Iii , (ii) lhe magne tizi ng cu rrent de co mpo nent / , and (iii) the peak
.ne
magn e tizi ng c urren t fP1 ?

(b) D e te rmi ne (1) the 1ms wi nd ing curre nts, and (ii) the app lied prim ary volt -se conds 11.
1. Is 1..1 pro-
(c)
po rtio nal to /Pk?
Mod ify the tra nsfo rm er and ac induct or desig n proced ures of this chapte r, to deri ve a ge neral
proced ure fo r desig ning flybac k tra nsfor mers tha t expl ici tl y accounts fo r both core and copper
loss, and th at em ploys the opt im um ac nu x dens ity that mi n imizes the to ta l loss.
t
(d) G ive a ge neral step -by -step de sign p roce dur e, wi th a ll spec ificat ions and un its c learly stal ed.
(e) Des ign the flyback tra nsfor mer for the co nverter of part (a), using _yo ur step -by-step proce dure of
par t (d). Use a ferrite EE core, w ith ~ = 2 .7 and K1, = 50 W /I µcni3. Spec ify: core size , air gap
leng th , turn s, and w ire sizes for all wind in gs .
(f) Fo r your final desig n of part (e), wh at are (i) the core loss , (ii) the total copper loss, and (iii) the
pea k flux dens ity?

15.4 Over the intended range of operating frequencies, the frequency dependence of the core-loss coefficient
K1, of a certain ferrite core material can be approx imated using a monoto nically increasing fourth-order
polynomial of the form
where Kr,o• al' a2 , <13 , a~, and / j1 are constants. In a typical converter transformer application, the applied
primary volt-seconds .11. 1 varies directly with the switching period T,"' !If. It is desired to choose the opti-
ww mum switching frequency such that Kw,• and therefore the transforme r size, are minimized.
(a) Show that the opt imum switching frequency is a root of the poly nomial
f)+ (13-
w.E I +a1 (-1-J-
~- l)(Jo -2)(Jo
-13 ~ - 3·i (Jo
f )l +a.i (-,)-
r11
Nexi, a core material is chosen whose core loss para meter s are
f )4
/ )]+a4 (T~ - 4)(7c,
asy ~ = 2.7
f0 = l0OkHz
KJ,O = 7.6
En
"1 = - 1.3 "2 = 5,3
= - 0.5
ll1 "J= 0,075
The polynomial fits the manufact urer's published data over the range 10 kHz <I< I MHz.
(b)
(c)
Sketch K1, vs. f
gin
Determine the value off that minim izes Ki/.-·
(d) Sketch KI/J,(f)JK111
eer
, (IOD kHz), m•er the range 100 kHz ~ / ~ I MHz. How sensitive is the trans-
former size to the choice of switchin g frequency?
ing
15.5 Transformer design to allain a given temperature rise. The temperature rise t'lT of the center leg of a fer-
rite core is directly proponi onal to the total power loss P,.,, of a transformer: t'lT = R,1, P,,,,.where R,1, is
the thermal resistance or the transformer under given env ironme ntal conditions. You may assume that
this temperature rise has minimal dependence on the dist ribution of losses with in the transformer. It is
.ne
desired to modify the K, 1, transformer design method, such that temperature rise 6T replaces total power
loss /',,,, as a spe-cification. You may neglect the dependence of the wire resistivity p on temperature.
(a)
(h)
Modify the n-winding transformer Kw,design method, as necessary. Define a new core geomet-
rical constant K,1,that includes R,1,.
Thermal resistances of ferrite EC cores are listed in Section D.3 of Appendix D. Tabulate K,1, for
these cores, using ~= 2.7.
t
(c) A 750 W single-output full-bridge isolated buck de-de converter operates with converter switch-
ing frequency /,= 200 kHz, de input voltage V, = 400 V, and de output voltage V = 48 V. The
turns ratio is 6: I. The core loss eq uation parameters at 100 kHz are Kr, = IO W/Tflcm] and
~ = 2.7. Assume a fill factor of K,,= O.J. You may neglect proximi ty losses. Use yo ur design pro-
cedure of parts (a) and (b) to design a transformer for this application, in which the temperature
rise is limited 10 20°C. Specif)•: EC core size, primary and secondary turns, wire sizes, and peak
ac flux density.

ww
w.E
asy
En
Part IV
Modern Rectifiers
gin
and Power System Harmonics
eer
ing
.ne
t

ww
w.E
asy
En
gin
eer
ing
.ne
t

16
Power and Harmonics
in Nonsinusoidal Systems
ww
w.E
asy
En
Rectification used to be a much simpler topic. A textbook could cover the topic simply by discussing the
gin
various ci rcuits, such as the peak-detect ion and indu cto r- input rect ifiers, the phase -contro lled bridge,
polyphase transformer co nnections, and perhaps multipli erc ircuits. But recently, rectifiers have become
much more sophisticated, and are now syste ms rather than mere c ircuits . They often include pulse -width
eer
modulated converte rs such as the boost converter, with co ntrol systems that regu late the ac input curren t
waveform. So modern rectifier techno logy now incorporates many of the de- de converter fundamentals.
The reason for this is the undesirab le ac line current ham10nics, and low power factors, of con-
ing
ventiona l peak-detection and phase -contro lled rectifiers. The adverse effects of power syste m harmon ics
are well recognized . These effects inc lude: un safe neu tral current magnitudes in three -phase sys tem s,
heating and reduct ion of life in tran sfor mer s and induction motors, degradation of system voltage wave -
.ne
forms, unsafe currents in power -factor -correc tion capac itor s, and ma lfunctioning of certa in power sys-
tem protection elements. In a real sense, conventional rectifiers are harmon ic polluters of the ac power
distribution system. With the widespread dep loy ment of e lectronic equ ipment in our society, rectifier
harm onics have become a significant and measurable problem . Thu s there is a need for high -quality rec-
tifiers, which operate with high power factor , high efficiency, and reduced generation of harmonics. Sev-
eral interna tion al stand ards now ex ist that specifica ll y limit the magn itudes of h armonic currents, for
t
both high -power equ ipment such as industrial motor drives, and low-power equipment such as electronic
ballasts for flu orescent lamps and power suppl ies for office equipment.
This chapter treats the flow of energy in power systems contai ning nonsinusoidal waveforms.
Average power, rm s values, and power fac tor are expressed in terms of the Fourier series of the voltage
and current waveforms. Harm onic currents in three -phase syste ms are discusse d, and present-day stan-
dards are listed. The following chapters treat harmonics and harmonic mitigation in conventiona l line-
commutated rectifiers, high -quality rectifier circuit s and their models, and con tro l of hi gh-qual ity rectifi -
ers.

590 Powerand Ho111 in No11

1011ics si111
1.soido/Systems
i(t)
+
Source Y(t) Load
Surface S
ww
Fig. 16.1 Obscrvi, the lmnsmission of cneri;y through surface S.
16.1
w.E AVERAGE POWER
Let us cons ider the transm ission of ener gy fro m a sou rce to a load , th rough a g iven surface as in Fig.
asy
I 6.1. In the network of Fig. 16. I, the vol tage wavefo rm v(t) (not necess arily sinusoidal) is _g
i ven by the
source, and the cu rren t wavefo rm is deter mined by the respo nse of the load. In the more genera l case in
whi ch the so urce output impedance is significant, then v(t) and i(t) both depe nd on the characte ristics of
En,.t,
the source and load . Bala nce d three -ph ase systems may be trea ted in the same mann er , o n a per -phase
basis, using a line curre nt and line -to-neutra l voltage.
If v(t) and i(I) are perio dic, then they may be ex pressed as Fourier ser ies:
v(I) =
g
,.t, in
v(, + V,, cos (nwr - (!),.) (16. J)
i(I)" f u+ -0,.)
I,, cos (11w1
eer
ing
where the per iod of the ac lin e voltag e wavefo rm is de fin ed as T = 2nfw. In ge neral , the instanta neous
power p(t) = v(t)i(t) ca n assum e both pos itive and neg ative values at var ious poi nts duri ng the ac line
cy cle. Energy then flows in both di rections betwee n the sou rce and load. It is of interest to de ter mine the
net energy trans mitte d to the load over one cycle, or
.ne
L·7
(16.2)
t
w,)'<k= l'(l)i(,)dl
Th is is d irec tl y re lated to the average powe r as fo llows:

W,..,..,,
P,.,.= ~ = T
I 1·., .
v(l)1(1)d 1 ( 16.3)
O
Let us in vest igate the rela ti o nsh ip betwee n the har monic content of the voltage and curre nt waveforms,
and the average power. Sub stit u tio n of the Fourier series, E(j. (16 . 1), into Eq . (16.3) yields
+[ (V ,.t(V,. (110>1
1'
P".= 0 + (1 1,,, (11w1

- tp,.)) co~ - e,,))d, 0 + cos ( 16.4)
.o
To eva lu ate this in te gra l, we m ust mu lt ip ly out the infini te series. It ca n be shown that the in teg rals of

I 6. I Average Power 591
cross -produ ct ter ms are zero, an d the o nl y co ntribu ti on s to th e int egral co mes fr om th e produ c ts of volt -
age and c urre nt har mo ni cs o f the same fre qu ency :
.,))d1~\V
j ·r(v,.c:os(11wt
<jl,,))(1,..cos
[mw1-e I O if fl "Ill (16.5)
0 __!'___E_<.:OS("'
2 • "t"tl
- 0 11) if 11 = Ill
Th e ave rag e power is th erefore
ww P,,,,-- Volo+/1"' 1 -2-co

VJ,,, , (qi,, -
So net energy is tra nsmitted to the load only whe n the Four ier series of 11
0)"
(1) and i(t) co ntain terms at the

(J 6.6)
w.E
same freque ncy . For exa mple, if v(t) and i( t) bo th co ntain third harm onic, then net energy is trans mitt ed
at th e thir d har mo n ic freque ncy, w ith average powe r eq ual to
asy -V23f_,
- cos ( qi_,- 0 _,)
Here, V//2 is eq ual to ther ms volt -a mperes o f the third har m o n ic c urr ent and vo ltage . T he cos (<ll:i- 8~)
(16. 7)
En
te rm is a disp lace me nt term whi ch ac coun ts for the phase di ff ere nce be twee n the thir d ha rm on ic vo ltage
and curre nt.
gin
Some exam ples o f power flow in sys tems conta inin g harm o nics are illustrated in Figs. 16.2 to
16.4. In exa mple I, Fig. 16.2, the volta ge co nta ins fu ndam ent al only, whi le the curre nt co nta ins th ird har-
(a) v(t)
eer
0.5
ing
0
.ne
--0.5
(b)
-l
t
p(t ) = Y(l)i(t)
0.5
-0 .5
-I
Fig. 16.2 Voltage, current, and instanhne ous power waveforms, exa111plc1. T he voltn ge cont ains only fun damen-
tal, and the cu1Tenlco111ai
ns onl y third harmonic . The average power is zero.

592 Power and Harmonics i11 Nonsi1111

soidal Sys/ems
ww p(t) = 1/{t)i{t)
w.E
asy
En
~'ig. 16.3 Voltage, CLitrent,und insta11umeouspnwer waveforms, example 2. The voltage and currc11teach conta in
gin
only third harmonic, und are in pha5e. Net energy is transmincd at the third harmonic freque11cy
.
1.0
0.5
eer
0.0
ing
.ne
-0 .5
-1.0
0.6
p (r) = v(r)i(t )
t
0.4
0.2
0.0
--0.2
l<'ig, 16.4 Voltage, current, and h1stantaneous power waveforms, exun1ple 3. The voltage ~onmins fundame11tul,
third, and fifth harmonics. The current contains fl.mdamcntal, fifth, an<l seventh harmonics . Net energy is transmitted
ut the fundamental and fifth harmonic frequencies,

/6.2 Root-Mea11-Sq11
are (RMS) Valueof a Waveform 593
mon ic only. It can be see n tha t the instantaneous powe r waveform p(t) has a zero average val ue, and
henc e Pav is zero. E nergy circ ulates between the so urce and load, but ove r one cycle the net energy trans -
ferred to the load is zero. In exam ple 2, Fig . 16.3, the voltage and c urren t each c ontai n only third har -
mon ic. The average power is given by Eq. (16.7) in th is case.
In example 3, Fig. 16.4, the voltage wavefo rm conta in s funda menta l , third harmon ic, and fifth
harmo nic, whi le the curre nt co nt ains fundamenta l, fifth harmon ic, and seve nth harmon ic, as follows :
v(t) = 1.2 cos (wt)+ 0.33 cos (3wt) + 0.2 cos (Soot)
(16.8)
i(r ) = 0.6 cos (Wt+ 30°) + 0.1 COS (5Wt + 45°) + 0.1 cos (7rot + 60°)
ww
Average power is transmitted at the fundamen tal and fif th harmon ic frequenc ies, si nce only these fre-
quencies are prese nt in bot h wavefo rm s. The average power is fou nd by evaluation of Eq. (16.6); all
terms are zero exce pt for the fundamental and fifth harm onic te rm s, as follows:
w.E P••· -_ (l.2)(0 .6)

2 COS
(JO•)
+
(0.2)((U)
2 C()S
. (4.50 ) _
-
0 32
.
(16.9)
asy
The instantaneous power and its avera ge are ill us trated in Fig. 16.4(b).
16.2 ROOT- 1\ILEAN-SQUARE (RMS) VALUE OF A WAVEFORM
En
gin
The rm s value of a periodic wavefo rm v(t) with perio d Tis defi ned as
(rms value) aa ..LIr v 2(t)dt (16.10)
eer
T Jo
The rm s va lue can also be expresse d in terms of the Fourier co mp onents . Insertion of Eq. ( 16. 1) into Eq.
( 16.10), and simp h ficatio n usi ng Eq. ( 16.5), yie lds
.j V~ + L vi2 ~ ing ( 16.11)
.ne
(nns value)= n
n :11I
Again , the integrals of the cross -product terms are zero. Th is expression holds when the waveform is a
curre nt:
(rms current)=
v -,1 / ~ + ~ -2•
(16.12) t
ri=-•
T hus, the presence of harmo nics in a wavefo rm always increases its rm s va lue. In particular, in the case
where the voltage v(t) con tains only fundamenta l while the c urrent i(t ) contai ns harmon ics, then the har-
monics increase the mis va lue of the current whi le leavi ng the average power unchanged. Th is is undesi r -
able , because the harmo nics do not lead to net del ivery of ene rgy to the load, yet they increase the lm./R
losses in the sys tem .
In a practical system, series resis tances always exist in the source , load, and/or transmission
wires, wh ich lead to unwant ed power losses obey ing the expressio n
(mis current? R.,,;,. (16.13)

594 Power and Harmonics i11 Nomi11usoidal

Systems
Exa mples of such loss e lements are the res ista nce of ac ge nerator w ind ings , the res istance of th e wi re
co nnect ing the so urce and load , the resistance of tr ansfor mer wind ings, and the res istance of se mico n-
ductor devices and mag netics w ind ings in sw itch ing co nverte rs. Th us, it is desi red to make the rm s c ur-
rent as sm all as poss ible, whi le tr ansfe rring the req uire d amo un t of energy and average power to the load .
Shunt re sistances usually also ex ist, w hi ch cause power loss accor ding to the re lation
(rm~voltage) 2 (16 .14)

R.1 1r1j111
Exa mpl es incl ud e the core losses in tra nsfor me rs and ac genera tors, and switc hi ng converte r trans istor
ww
sw itching loss. Th erefo re, it is desi red to also mak e the rms vo ltage as small as poss ible whi le tran sfe r-
rin g the requ ired average power to the load .
16.3
w.EPOWER FACTOR
asy
Power factor is a figure of merit that measures how effectively energy is tra nsmitted betwee n a source
and load net work . It is meas ured at a give n surface as in Fig. 16. 1, and is defi ned as
En
owcr factor= (average power) (16. 15)
P (r[lls voltagt:) (rms current)
gin
The powe r factor always has a va lue between zero and one. The ideal case , u ni ty power factor, occurs for
a load tha t obeys Ohm 's Law . In this case, the voltage and curre nt wavefo rms have the same shape , con-
tai n the same harm oni c spectru m, and are in phase . For a given average power thro ughput, the rms c ur -
eer
rent and voltage are minimized at maximum (unity) power factor, that is, with a linear resist ive load . In
the case where the vol tage con tains no harmo nics but th e load is nonli near and con tai ns dy namics , then
the powe r factor ca n be expressed as a prod uct of two ter ms, one res ulti ng fro m the phase sh ift of the
fundame ntal component of the current, and the other resulting from the current harmonics.
ing
16.3.1 Linear Resistive Load, Nonsinusoidal Voltage
.ne
In th is case, the curre nt harm on ics are in phase with , and proport ional to, the voltage har mo nics . As a
result, all harm onics result in the net transfer of energy to the load. The current harmon ic magnitudes and
phases are t
I ,.-- v,, (16.16 )

R
fl,.= cp,, so cos(El,.- (Jl,,)a=I (16 . 17)
The rms voltage is agai n
(rms voltage)=
J ~
V~ + "~ '
vi
2 (16.18)
and the nns cu rren t is

16.3 Power Factor 595
v.,, - ~
(rms current)= \
/
/ ~+ L1 -2" =
00 / '
_ii + L v~
V 11 • R' 'l =I 2R2 (16.19)
= k(nns voltage)
By use ofEq. ( 16.6) , the ave rage power is
P.,. = VI0
{'- V,,I., cos(<?,.- 0 • )
11+ ,t., -
2
u= I
v~+ f ~ ( 16.20)
ww
=
R 11: JlR
= f? (rrns voltage) 2
w.E
Insert ion of Eqs. (16. 19) and ( 16.20) into Eq. ( 16.15) then sho ws th at the power factor is un ity. Thus, if
the load is linear and purely res istive, then the po we r factor is unit y regar dless of the harmonic co ntent of
v(t). The harmonic co ntent o f the load current waveform i(t) is iden tical to that of v(t), and all har monic s
asy
res ult in the transfer of e nergy to the load . This raises the poss ibilit y that one co uld constru ct a power dis-
tribu tio n syste m base d on no ns inuso idal waveform s in which the ene rgy is eff ic ie nt l y transferred to the
load.
16.3.2 Nonlinear Dynamical Load, Sinusoidal Voltage

En
gin
If the voltage v(t) co ntains a fundament al compo nent bu t no de com ponent or harmon.ics, so that V0 = V2
= V3 =...= 0 , then harmon ics in i(t) do not resu lt in trans mission of net ene rgy to the load. The average
power expressio n, Eq. (16 .6), becomes
eer
However, the harm onics in i(t) do affect the value of the m1s current: ing (16.21)
.ne
(nns curren(J = J - [' ~ -2"

/~ + 1r::;;:I (16.22)
Hence , as in examp le 1 (Fig. 16.2), harmon ics ca use the load to d raw more rm s current from the source,
b ut not mor e average power. Increas ing the current harmonics does not cause more energ y to be trans -
t
ferred to the load , b ut does ca use addit ional losses in series resist ive elements R, eries ·
Al so, the prese nce of load d ynamics and react ive elements, wh ich causes the phas e of the fun -
damental componen ts of th e vo ltage and cu rrent to d iffe r (0 1 - q,1) , also reduces the power factor. The
cos (q,1 - 0 1) tenn in the average power Eq. (16 .21) beco mes less than unity. However, the nn s va lue of
the current , Eq. (16 .22), does not depend on the ph ase . So shifting the phase of i(t) with respect to v(t)
reduces the average pow er without changing the rms voltage or cu rre nt, and hence the power factor is
redu ce d.
By substit uting Eq s. ( 16.2 1) and (16.22) into ( 16.15) , we can express the powe r fac tor for the
si nu soi dal vo ltage in the fo llowin g form:

596 Po wer a nd Harmonics in No nsi1111

soi dal Systems
(16 .23 )
= (distortion factor) (displacemen t factor)
So when the volta ge contain s no harmon ics, then the power factor can be wri tten as the product of two
terms. The first, called the distortio11factor, is the rat io of the rms fundamenta l component of the current
ww
to the total rms value of the curre nt
w.E .
(d 1ston 1·on f acto r) = (
V
1
,
, 2+
0
"J½ .) = (mis fundamental
~
L-~r,,
IP• I
(
_fl_
2
current)
)
rms current
(1 6.24)
asy
The second ter m of Eq. (16.23) is calle d the displacement factor , and is the cosine of the angle between
the fundamenta l com ponents of the volta ge and current wavefo rms.
En
The Total Harmonic Distortion (THO) is defined as the rat io of the rms value of the waveform
not inc luding the fundamenta l, to the rms fundamenta l ma gnitude . When no de is prese nt, this can be
written :
Y._f
- gin
~
1
(16 .25)
eer
(T HO)= -"
I
The total harmon ic di stort ion and the distor tion factor are closely re lated. Comparison of Eqs. (16.24 )
and (16.25), with / 0 = 0, eads to
(dist oni on factor) = 1 ing (16.26)
.ne
2
,.jI+ (THDJ
This equation is plotted in Fig. 16.5. Th e distortion factor of a waveform with a moderate amount of dis-
tort ion is qu ite close to unity. For example, if the waveform contains third harm onic whose mag nitude is
100%
t
...
g 90%
~
Flg. 16.5 Di stort ion factor vs. total
harmonic distor tion. -~
~
.:::i &0%
c::i
~ ~
THD

16.3 Power Faoo r 597
ww
Fig. 16.6 Con ventional peak detection rectifier.
- 100%
w.E ~~
;::s"'
.-:;:I::
}~
~ J::
80%
60%
THD= 136%
Distortion factor= 59%
-~~
t: 0
o-
E ::
,__ I\)
~~
asy
40%
20%
~
0%
3
En
5 1 9 11 13 15 17 19
gin
Harnwnic number
Fig. 16.7 Typical ac line current spectrum of a peak detection rectifier. Harmo nics I to 19 are shown .
eer
10% of the fundamental , the distortion facto r is 99.5%. Increas ing the thi rd harmonic to 20% decreases
the distortio n factor to 98%, and a 33% harmonic magnitude yiel d s a di stort ion fac tor of 95%. So the
pow er factor is not sign ificantly degraded by the presence of harmoni cs unless the harmonics are qu ite
large in magnitude .
ing
An example of a ca~e in which the di stort ion factor is mu ch less than un it y is the conven ti onal
.ne
peak detection rect ifier of Fig . 16.6. In thi s cir cuit, the ac line current consis ts of short -dur ation current
pu lses occu rr ing at the peak of the vol tage wavefo rm. TI1e fundamental compo nent of the line curre nt is
esse ntiall y in phase with the voltage, and the disp lacement facto r is close to un ity. However, the low -
order cu rrent harmonic s are quite large, close in magn itu de to th at of the funda men tal - a typica l current
spectrum is given in Fig. 16.7. The distort ion factor of peak dete ct ion rec tifie rs is usually in the range
55% to 65%. The resulting power factor is simi lar in value.
In North America , the standard 120 V power out let is protected by a 15 A circuit breaker. In
t
consequence , the availa b le load powe r quite li mited . Denn ing the circu it breake r current by 20%, ass um-
ing typ ical effic iencies for the de- de converter and peak detec tion rectifier, and with a power facto r of
55%, one obtains the follow in g estim ate for the maximum ava ilab le de load powe r:
(ac voltage) (derated breaker cur rent) (power faclOr) (rectifier efficie 11
cy)
= (120 V) (80% of 15 A) (0 .55) (0.98) {16.27)
=77 6W
The less -than -unity efficiency of a de- de converter wou ld further reduce the ava ila ble de load power.
sing a peak detection rectifier to supp ly a load power greater than this requires that the user install
hi gher amperage and/or highe r voltage service, which is inconvenient and cost ly. The use of a rect ifier

598 Power and Harmonics i11No11si1111soidal

Sysrems
circuit having nearly unity powe r factor would allow a significant increase in ava ilable de load power :
(a~ voltage) (dcrated breaker curmll) (power factor) (rec tifier eflkiency )
= ( 120V} (80% ofl5A) (0.99) (0.93) (16.28)
"'l3 2'iW
or almos t twice the available power of the peak detec ti on rect ifi er. This alone can be a com pell in g reason
to emp loy high qual ity rectifiers in commerc ial systems.
ww
16.4 POWER PHASORS 1N SINUSOIDAL SYSTEMS
The apparent power is defined as the produc t of the rms vol tage and rm s cu rrent. Apparen t power is eas -
w.E
ily measured- it is simply the product of the readings of a volt meter an d ammeter placed in the c ircuit at
the given surface . Many power system elements, suc h as transforme rs, must be rated according to the
apparent power that they are able to supp ly. The un it o f apparent power is the vo lt-ampe re, or VA . The
asy
power factor, de fined in Eq. (16.15), is the ratio of average power to apparent power.
In the case of sinusoida l vo ltage and curren t waveforms, we can additionally define the complex
power S and the reactive power Q. If the sinuso idal voltage v(t) and current i(I) can be represented by the
En
phasors V and / , then the complex power is a phasor defined as
s = vr· " I' + jQ (16 .29)
gin
Here, / * is the comp lex conjuga te of / , andj is the squa re root of - 1. The magnit ude of S, or !IS II, is
eer
eq ual to the apparen t power, measured in VA. The real part of S is the average power P, having units of
watts. The imag inary part of S is the reacti ve power Q, having units of react ive volt -amperes, or VAR s.
A phasor diag ram illu stra ting S, P, and Q, is given in Fig. 16.8. The angle (<j)1 - 8 1) is the ang le
ing
between the vol tage phasor Vand the cur rent phasor /. (q, 1 - 0 1) is add it iona ll y the phase of the complex
power S. TI1e power factor in the pure ly sinusoi dal case is therefore
.ne
Imaginary
axis
t
Real axis
Fig. 16.8 Power phasor diugram, for a sinu so id11Isyst~m, illustrati ng the voltag e , current, and .:omplex powe r
phasors.

16.5 Hamwnic C11rr

e111s
i11Three Phase Systems 599
power factor=
1; I = cos ( (I) 1 -0 1) (16 .30)
It shou ld be emphasized tha t this equation is va lid on ly for systems in which the voltage and current are
purely sinu soidal. The di stortion factor of Eq. ( 16.24) then becomes un ity, and the pow er factor is equa l
to the displacement fac tor as in Eq. (16 .30).
The reactive power Q does not lead to net transmiss ion of energy between the source and load.
When react i ve power is pr esen t, the rm s current and apparent power are greater than the minimum
amount nece ssary to trans mi t the average power P. In an ind uc tor, the current lags the voltage by 90° ,
ww
ca using the disp lace ment factor to be zero. The alterna te stor ing and rele asin g of energy in an inductor
leads to current flow and nonzero appa rent power , but the average power P is zero . Just as resistors con -
sume real (average) power P, inductors can be viewed as consumers of reactive power Q. In a capac itor,
the current leads to vo ltage by 90°, again caus ing the disp laceme nt fac tor to be zero. Capac itors su ppl y
w.E
react ive power Q, and are common ly placed in the utility power di str ib ution sys tem near inductive loads.
If the reactive power supplied by the capacitor is equal to the react ive power co nsumed by the inductor,
then the net current (flow in g from the source into the capacitor -induct ive -load comb in ati on ) wi ll be in
asy
phase with the voltage, leading unit y power factor and minimum nn s current magn itude.
It wi ll be seen in the next chapter that pha se-controlled recti fiers produce a non sin uso idal cur -
rent waveform whose fundamental componen t lags the voltage. T his lagging current does not arise from
En
ene rgy storage, bu t it does nonethele ss lead to a reduced d isplacement factor , and to rm s curre nt and
apparent power that are grea ter than the minimum amou nt nece ssa ry to transmit the average powe r.
16.S HARMONI C CURRENTS IN THREE PHASE SYSTEMS

gin
eer
The presen ce of harmonic currents can also lead to some spec ial probl ems in thr ee -pha se systems. In a
fou r-wire three -pha se system, har monic currents can lead to large currents in the neutr a l cond uctors ,
which may easi ly exceed the conductor rms curren t rating. Power factor co rrect ion capacitors may expe -
ing
rience sig nificantl y increased nu s currents, caus ing the m to fai l. In this sect ion , these problems are exam -
ined , and the properti es of harmonic current flow in three -phase systems are de rived.
.ne
16.S.1 Harmonic Currents in Three-Phase

Four-Wire Networks
Let us co nsider the three -phase four -wire netwo rk of Fig. 16.9. In general , we can express the Four ier
t
series of the line currents and lin e-neutral voltages as follows:
i,,(1)="1
,.,,+ L I •• cos(kw
! : I
- 0.,)
iil)=/h(J+ f
t=I
/h•cos(k(wr- 12O')-0 1,1 )
(16.31)
i,,(r)=/,<i+ f
t:I
ld cos (k(w1+ 120' )-0, 1)

600 Power a11dHan11 Sysrems

cs i11No11si1111soidal
011i
Ideal C i,(t) Nonlinear

3~ loads
source i,.(t)
Neutral connection
ww b
w.E
Fig. 16.9 Current flowin a three-phasefour-wire network.
asy
v,.,,(t) = V., cos (wr)
vb,,((}= V"'cos(wt - 120· ) (16.32}
va,(r) = Vm COS (WI+ 120•)
En
The neutral current is therefore i,, = ia + ib + i,., or
i,.(t)
ti,[
= I ,,o + I bO+ 1,0 +
gin
1... cos (kwr - 0"*) + I bkcos (k(WI - 120") - e bk) +I,, cos (k(WI + 120") - e,k) l (16.33)
eer
When the load is unbalanced (even though the voltages are balanced and undistorted), we can say little
ing
else about the neutral and line currents. If the load is unbalanced and nonlinear , then the Iine and neutral
currents may contain harmonics of any order, including even and triplen harmonics.
Equation (16.33) is considerably simplified in the case where the loads are balanced. A bal-
= =
anced nonlinear load is one in which Iak = /bk= I,k = I* and 8ak =Obk 8,k 8k, for all k; that is, the har-
.ne
monics of the three pha es all have equal amplitudes and pha e shifts. In this case, Eq. ( 16.33) reduces to
i,,(I) = 3/ 0 +
i a
}:
3,6,9, .. ,
31, cos (kwt- 0.)
Hence, the fundamental and most of the harmonics cancel out and do not appear in the neutral conduc-
(16 .34)
t
tor. Thus, it is in the interests of the util ity to balance their nonlin ear loads as well as their harmonics.
But not all of the harmonic cancel out of Eq. ( 16.34): the de and rripl en (triple-11, or 3,6,9,...)
harmonics add rather than cancel. The rms neutral current is
(16.35)
Example
A balanced nonlinear load produces line currents containing fund amental and 20% third har-
monic: ia11(t) = / 1cos(wt - 0 1) + 0.2/ 1cos(3wt - 83 ) . Find the rms neutral current, and compare its ampli-
tude to the rms line current amplitude.

16.5 Harmonic Currents in Three Phase Systems 601
Solution:
. - 3J( 0.2l,) 2 _0.61 ,

111,m,s - 2 - ./2
. -J
' '·""'-
d + (0.21,) 2 _ ..!.J._JT+o:04.!.J..
2 - ./2 + . .. ./2
(16.36)
So the neutral current magnitude is 60% of the line current magnitude! The triplen harmonics in the three
phases add, such that 20% third harmonic leads to 60% third harmonic neutral current. Yet the presence
of the third harmonic has very little effect on the rms value of the line current. Significant unexpected
ww
neutral current flows.
w.E
16.5.2 Harmonic Currents in Three-Phase
Three-Wire Networks
asy
If there is no neutral connection to the wye-connected load, as in Fig. 16.10, then i.(t) must be zero. lfth e
load is balanced, then Eq. ( 16.34) still applies, and therefore the de and triplen harmonics of the load cur-
rents must be zero. Therefore, the line current in,i,,, and i,. cannot contain triplen or de harmonics . What
En
happens is that a voltage is induced at the load neutra l point 11', containing de and triplen harmonics ,
which eliminates the triplen and de load current harmonics.
This result is true only when the load is balanced. With an unbalanced load, all harmonics can
some small amounts of third harmonic line currents are mea ured.
gin
appear in the line current , including triplen and de. In practice, the load is never exactly balanced, and
With a delta-connected load as in Fig. 16.11, there is also no neutral connection, so the line cur-
eer
rents cannot contain triplen or de compone nts. But the loads are connected line-to-line, and are excited
by undistorted sinu oidal voltage. Hence trip len harmonic and de current do, in general, flow through
ing
the nonlinear loads. Therefore, these currents simply circulate around the delta. If the load is balanced,
then again no triplen harmonics appear in the line currents.
.ne
a
t
Ideal C i,(t) Nonlinear

3; loads
source
b
Fig, 16.10 Current flow in a three-phase three-wire wye-connected network.

602 Power and Harmonics in Nonsi1111s

oidal Sys1ems
Delta-
Idea l C i,( t) connected
3~ nonli near
sourc e loads
ww b
w.E
Fig. 16. 11 A balanced nonlineardelta-connected load may generate triplen current harmonics. These harmonics
circulate around the delta, but do not now through the lines if the load is balanced.
16.5.3
asy
Harmonic Current Flow in Power Factor
Correction Capacitors
En
Harmonic currents tend to flow through shunt-connected power factor correction capacitors. To some
gin
extent, this is a good th ing because the capacitors tend to low-pass filter the power system currents, and
prevent nonlinear loads from pollut ing the entire power syste m. The flow of harmonic currents is then
confi ned to the non linear load and local power factor correction capacitors, and voltage wavefo rm distor-
eer
tion is reduced. High-frequency harmonic currents tend to flow throu gh shunt capacitors because the
capacitor impedance decre;ises with frequency, while the inductive impedance of transmi ion lines
ing
increases with frequency. In this sense, power factor correction capacitors mitigate the effec ts of har-
monic currents arising from nonlinear loads in much the same way tha t they mitigate the effects of reac-
tive currents that ari e from inductive loads.
.ne
But the problem is that the power factor correction capacitors may not
be rated to handle these harmonic current , and hence there i a danger that the
capacitors may overheat and fail when they are exposed to sig nifica nt harmo nic
current . The los in capacitor is modeled u ing an equivalent series resistance
(esr) as shown in Fig. 16.12. The esr models dielectr ic lo s (hysteresis of the
dielectric D- E loop), contact resistance, and foil and lead resistances. Power
loss occurs, equal to in11./(e sr) . Dielect ric materials are typically poor conduc-
t
tors of heat, so a moderate amount of power loss can cause a large temperature
Fig. 16.12 Capacitor
rise in the center of the capacitor. In consequence, the rm current must be lim- equivalent circuit.
ited to a safe value. Losses are modeled by
Typical power factor correction capacitors are rated by voltage V, fre- an equivalent series
quency f , and reactive power in kVAR . The e ratings are computed from the resistance (esr).
capacitance C and safe rms current l ,111,. , as urning undi tarted inu oidal wave-
forms, as follows:
I
, = 211j''c
rated rms voltage v,,,, (16 .37)

16.6 AC lin e Current Harmonic Standards 603
,2
rated reactivepower= 2 ;Jc (16.38)
In an undistorted system, the rms current, and hence also the capacitor esr loss, cannot increase unless
the rms voltage is also increased. But high-frequency harmonics can lead to larger rms currents without
an increased voltage. Any harmonics that flow re ult in increased rm current beyond the expected value
predicted by Eq. (16.37). If the capacitor is not rated to handle additional power loss, then failure or pre-
mature aging can occur.
ww
16.6 AC LINE CURRENT HARMONIC STANDARDS
Besides the increased current and reduced power factors of peak detection rectifier , the harmon ics
w.E
themselves can be detrim e ntal: if large enough in magnitude, they can pollute the power system. Har-
monic currents cause distortion of the voltage waveform via the power system eries impedance. l11ese
voltage harmonic can interfere with the operation of nearby loads. As noted previously, increased cur-
asy
rents in shunt capacitors, and increased losses in distr ibution transformers and ac machines, can lead to
premature aging and failure of thee device . Odd triplen harmonics (triple-11:3rd , 91h, 151h, etc.) lead to
unexpectedly large neutral curre nts in three-pha e ystems. Harmonic currents can al o excite system
En
resonances some distance from their ource, with results that are difficult to predict. For thee reasons, a
number of organizations have adopted standards that limit the magnitudes of the harmonic currents that a
load is allowed to inject into the ac line . The US military was one of the early organizations to recognize
gin
these problems; the very strict 3% limit was initially adopted. The standards adopted by the IEC and
rEEE are more recent, and are intended for conventional utility ystem . A fourth example, not di cussed
here, is the telephone interference factor, which limits power distribution system harmonics in cases
when telephone lines and power line hare the ame pole .
eer
16.6.1 International Electrotechnical Commission
Standard 1000
ing
.ne
This international agency adopted a first draft of their IEC 555 standard in 1982. It has since undergone a
t
number ofrev i ion , and ha been superceded by IEC 100) [7]. Thi tandard is now enforced in Europe,
making it a de facto standard for commercial equipment intended to be sold worldwide.
The CEC 1000-3-2 standard covers a number of differ ent types of low power equipme nt, with
differ ing harmonic limit s. It specifically limit s harmonics forequ ipment having an input current of up to
16 A, connected to 50 or 60 Hz, 220 V to 240 V single phase circuits (two or three wire), as well as
380 V to 415 V three phase (three or four wire) circuit . In a city environment such a a large building, a
large fraction of the total power system load can be nonlinear. For example, a major portion of the elec-
trical load in a bui lding is comprised of fluorescent lights, which present a very nonlin ear characteristic
to the utili ty system. A modem office may al o conta in a large number of personal computers, printers,
copiers, etc., each of which may employ peak detection rectifiers. Although each individual load is a neg-
ligible fraction of the total local load, these loads can collectively become significant.
The IEC 1000-3-2 standard defines several categories of equipment, each of which is covered
by a different set of harmonic limits. As an example, Table 16.1 how the harmonic limits for Class A
equipment, which includes low harmonic rectifiers for computer and other office equipment.
The European norm E 61000-3-2 defines similar limits.

604 Powera11dHar111011ics
i11No11si1111soidal
Systems
Tobie 16.1 !EC 1000-3-2Harmonic current limi1s. class A
Odd harmonics Even harmonics

Harmonicnumber Maximumcurrent Harmonicnumber Maximumcurrent
3 2.30A 2 1.08A
5 1.14A 4 0.43A
7 0.77 A 6 0.30A
9 0.40A 8:.n:.40 0.23 A·(S/n)
ww 15 5n
11
13
$ 39
0.33A
0.21 A
0.15A-(15/n)
w.E
16.6.2
asy
IEEFJANSI Standard 519
En
In 1993, the IEEE published a revi ed draft tandard limi ting the amplitude of current harmonics, IEEE
Guide for Harmonic Control and Reactive Compensation of Static Power Converters. The harmonic lim-
gin
its are ba ed on the ratio of the fundamenta l component of the load current fl to the short circuit current
at the point of common coupling (PCC) at the utility l,c· Stricter limit are imposed on large loads than
on small loads. The limits are simi lar in magnitude to IEC 1000,and cover high voltage loads (of much
eer
higher power) not addressed by IEC 1000.Enforcement of this standard is presently up to the local utility
company.
ing
The odd harmonic limits for general distribution system at voltages of 120 V to 69 kV are
listed in Table 16.2. The limits for even harmonics are 25% of the odd harmonic limits. Limits for gen-
eral distribution systems at 69.001 kV to 161 kV are 50% of the values listed in Table 16.2. DC current
components and half-wave rectifiers are not allowed.
.ne
It is the re ponsibility of the power con umer to meet these current harmonic standards. Stan-
dard !EEE-519 al o pecifie maximum allowable voltage harmonic , Ii ted in Table 16.3. It is the
responsibility of the utility, or power supplier, to meet these limits. Both total harmonic distortion and
maximum individual harmonic magnitudes are limited.
t
Table 16.2 IEEE-519 Maximumodd harmonic currenl limits for generaldis1ribu1ionsys1cms,120 V to 69 kV
1,/ IL n < 11 ll$n<l7 l7:.n<23 23 $n < 35 35 $n THO

<20 4.0% 2.0% 1.5% 0.6% 0.3% 5.0%
20-50 7.0% 3.5% 2.5% 1.0% 0.5% 8.0%
50-100 10.0% 4.5% 4.0% 1.5% 0.7% 12.0%
100-1000 12.0% 5.5% 5.0% 2.0% 1.0% 15.0%
> 1000 15.0% 7.0% 6.0% 2.5% 1.4% 20.0%

BibliograJ]hy 605
Table 16.3 IEEE-S 19 Volta ge di storlion limits
Bus voltage at PCC Individualharmonics THO

69 kV and lower 3.0% 5.0%
69.001kV to 161kV 1.5% 2.5%
Above 161kV 1.0% 1.5%
ww
BIBLIOGRAPHY
[I] , D. BRADLEY, and P. BODGER, Powe r Sys/e m Harmonics ,

J. ARRILLAGA ew York: John Wile y & Sons,
19&.5.
[2]
w.E
R. SMITY and R. STRATFORD, "Power System Harmonics Eff ects from Adjus table-Speed Drives," IEEE
.rnctions 0 11 lnd mfl )' Applications , Vol. IA-20, No. 4, pp. 973-977, July/Augus t 19&4.
Tra11
(3]
asy
A. EMAN EL, "Powers in onsin usoi dal Situations - A Re 1•iew of Definitions and Physica l Meanin g,"
IEEE Transactions on Power Deli very, Vol. 5, No. 3, pp. 1377- 1389, Ju ly 1990.
[4] . MOHAN, T. UNDELAND, and W. ROBBINS
En
, Powe r Electroni cs : Converters, Applications, and Design ,
Seco nd ed ition, New York: John Wiley & Son.~, 1995.
[5] J . KASSAKIAN
Wes ley, 1991.
gin
, M. SCHLECHT, and G. VERGESE, Princip les of Power Electroni cs, Massac husetts: Addi . on-
[6]
eer
R . GRETSCH, " Harm o nic Distorti on of the M ains Vo ltage by Swi tche d-Mode Power Snp p lies- A sess -
ment of the Futur e Deve lopme nt and Po ssible Mit iga t.io n Meas ures," European Power Electroni c.1·Confer-
ence, 1989 Reco rd, pp . 1255- 1260.
[7] IEC 1000-3-2, First Edition, Commission E lectrotechni que Interna tiona le , G eneva, 1995.
ing
.ne
PROBLEMS
16.1 Passive rectifier circuit. In the passive rectifier circuit of Fig. 16.13, Lis very large, such that the inductor
current i(I) is esse ntial ly de. All components are ideal.
t
+ +
v,<t)
C R
230 Vrms V
4011
50Hz
Fig, 16.13 Pa.-.sive reci ifier circu it of Problem 16. !

(a) Determine the de output voltage, curre nt, and power.

606 Power and Hannonics in No11s

i11usoida/Systems
(b) Sketc h the ac li ne curre nt wavefo rm iit ) and the rec tif ier o ut put volt age wavefo rm v11(t).
(c) Deter mine the ac line cu rrent rrns mag nitude, fundamental rms magnitu de, and third harrnonic
rms magn itude . Does th is rec tifie r networ k conform to the IEC-1000 ha rmonic c urrent limi ts ?
(d) De term ine the powe r facto r, measure d at sur faces St and S2•
16.2 The three-phase rec tifie r of Fig. 16.14 is co nnected to a balanced 60 Hz 3i:iac480 V (rm, , line -l ine) sin u-
soida l source as show n. All elemen ts are ideal. T he indu ctance L is large , such that the current i (t) is
es senti ally co nstant , wi th neg li gible 360 Hz ripp le.
i0 (1) L
ct>" +
ww Balanced
3pac
480 V
cpb
ib(I)
V R
20 11
w.E ct>
c __
i,(t)
..,.
Fig. 16.14 Three-phase rcc ti!icr ci rcuit of Problem 16.2
(a)
(b) asy
Ske tch the w,weform vit )
Deter mine the de out put voltage V.
(c)
(d)
En
Sketch the line curr ent waveforms i,.(1), i,,(1), and i,(r ),
Find the Fourier series of iJ t)
16.3
(e)
gin
Fi nd the distortio n factor , displaceme nt facto r, power fac tor, and li ne cu rrent TH D.
Harmo nic poll uti on pol ice . In the network of Fig. 16.15, voltage harmo nics are observed at the ind icated
eer
surface. The object of thi s prob lem is to decide whe the r to bla me the source or the load for the obse rved
ham1onic pollution . Either the source element or the load elemen t contains a nonlinear ity that generates
harmonics, while the other element is linear.
i(I)
+
ing
.ne
v,(I) v(I)
So11rce
S11
,face
s
Load
t
Fig. 16.15 Single-plrnse power sy stem of Prohl e111s16.3 to l 6.5
(a) Co nsider first the case where the load is a passive linear impe dance Zz(s) . and hence its phase
lies in the range - 90 ' :-; LZ 2 UW) ~ + 90• for all posi tive to . The source generate s harmonics.
Ex press the ave rage powe r P in Lhe form
P="i,P
tt = O /j
where P 11 is the average power transmi lled to the load by harrnonic number n. Wha t can yo u say
about the polarities of the P,,s ?

Pro/JI ems 607
(b) Cons ider next the case where the load is nonli nea r, whil e the source is li nea r and can be modele d
by a Theveni n-equivalent sinus oidal voltage source and linear impedan ce 2 1(s ) . Again express
the average power P as a sum of average powers , as in part (a). What can you say abou t ti1e
polarities of the P.,,in th is case?
(c) The followi ng Fourier serie s are meas ured :
Harm o nic v(t) i(t )

number Magn itu de Phase Magn itud e Phase
I 230 V o· 6A - 20·
ww 3
5
20 V
8V
180"
60"
4A
IA
20·
- 110·
16.4 w.EWho do you accuse1 Explain yo ur reason ing.
For the net work and wavefo rm s of Problem 16.3, determ ine the power factor at the indicated su rface ,
and the average power flowing to the load. Har mon ics highe r in frequen cy than the fifth harmonic are
16.5
asy
neglig ible in mag nitude .
Repea t Problem 16.3(c), using the follo wi ng Four ier series:
Ha rmonic
En
V(I) i(t)
gin
number Ma gnitu de Phase Magnitude Phase
I 120V o· 5A 25°
3 4V 60" 0.5 A 40•
5 2V - 160"
eer
0.2A - 100'
16.6
ing
A balanced three -phase wye-connected load is constru cted usi ng a 20 Q resistor in each phase . This load
is connec ted to a balanced three -pha se wye-connected vo ltage so urce, whose fundamen ta l voltage com -
ponent is 380 Vr ms line-to -li ne. In add ition , each (li ne -to- neu tr al) voltage source produces third a nd
.ne
fift h harmonics. Each harmo nic has ampl itude 20 Vrm s, and is in phase wit h the ( lin e -t o-neutral ) fund a-
mental.
t
{a) The source and load neutr al po int s are connec ted, such that a fom -wire system is obtained. Find
the Four ier series of the line cu rre nts and the neutral c urr ent.
(b) The neutra l co nnectio n is broke n, such that a three -wir e system is obtained . Fi nd the Fourier
series of the line currents. Also find the Fourier series of the voltage between the source and load
neutral poi nts.

ww
w.E
asy
En
gin
eer
ing
.ne
t

17
Line-Commutated Rectifiers
ww
w.E
asy
En
gin
Conv entional diode pea k-detectio n rectifie rs are inexpensive, re liable, and in widesp read use. Their
eer
shortcomings are the high harmon ic content of their ac line curre nts, and their low power factors. In this
chapter, the basic operation and ac line current wavefor ms of severa l of the most common single -phase
and three -phase diode rectifiers are summar ized. Also intro duced are phase -con trolled three-phase recti-
area are listed at the end of this chapte r (1- 15].

ing
fiers and inverters , and passive harmonic miti gat ion techniques. Severa l of the many references in thi s
Rigorous ana lytica l desig n of line -commutated rec tifi er and filter c ircuits is un feasib le for all
.ne
but the simplest of circu its . Typical pea k-detect ion rectifiers are num erically ill -co nditioned, because
small changes in the de-side ripple voltage lead to large changes in the ac line curre nt waveforms . There-
t
fore , the discussio ns of this chap ter are con fined to mostly qualitative argu ments, with the object ive of
giv ing the reader some insight into the physical ope ration of rect ifier/filter circuit s. Wavefom1s , harm onic
magnitude s, and power factors are best determ ined by measurement or co mputer si mu la tio n.
17.1 THE SINGLE -PHASE FULL-WAVE RECTIFIER
A single-phase fu ll-wave rectifier, with uncontrolled diode rect ifiers, is shown in Fig. 17.1. The circuit
inclu des a de-side L- C filter. There are two conve nt ional uses for thi s c ircu it. In the traditional full -wave
rectifier, the output capac itor is large in value, and the de outpu t voltage v(I) has negligible ripple at the
second harm onic of the ac line frequ e ncy. Inductor L is most often small or absent. Additiona l small
inductance may be in series with the ac source v/t) . A second conventional use of this circuit is in the
low -harmon ic rec tifiers discusse d in the next chapter. In thi s case , the res isti ve load is replaced by a de-
de co nve 1t er that is controlled such that its power input port obeys Ohm ' s law. For the purpo ses of under -
stan din g the rec tifier wavefor ms, the converter ca n be mode led by an effect ive resistance R, as in the cir-

610 Rectifier.f
Line-Co11111111/ated
C v(t) R
Hg. 17.1 Conventional single-phase full-wave c·cctiflcr, w ith tk-s ide f.-C li lt<:r
ww
cuit of Fig. 17. 1. In this appl icat ion, the L-C filt er is required to filter the conducted electro magnetic
interference (EM!) generated by the converter. The inductor and capaci tor element values are typi ca ll y
small in value, and 1,(1) is approximately a rectifi ed sinusoid. More genera lly, there may be several sec-
w.E
tions of L-C filter networks, connected to both the de and ac sides of the diode rectifier, which filter EM!,
smooth the de output voltage, and reduce the ac line current harmoni cs .
The presence of any filt er degrades the ac current wavefo rm of the rectifier. With no reactive
elements (L = 0 and C =0), the rec tif ier presents a pur ely resistive load to the ac inp ut. l11e output volt -
asy
age v(t) is then a rectified sinusoid, there are no ac line current harmonics, and the power factor is unity.
Addition of reactive elements between the rectif ier diodes and the load leads in genera l to ac lin e curr ent
harmonic s. Given that such a filt er is necessary, one might ask what can be done to keep these harm onics
En
as small as possible. In this section, the dependence of the ac line current tota l harmonic disto rti on on the
filt er parameters is described.
gin
The cir cu it of Fig. 17.1 generates odd harmonics of the ac li ne voltage in the ac line current. The
de output voltage con tain s de and even harmonics of the ac line voltage. The circu it ex hibi ts several
modes of opera tion, dependi ng on the relative values of L, C, and R. It is easiest to under stand these
modes by considering the Ii mi ting cases, as follow s.
eer
17.1.1 Continuous Conduction Mode
ing
.ne
When the inductor L is very large, then the inductor curr en t iL(I) is essentially constant. This fol lows
from the inducto rd e finiti on vL(t) = LdiL(t)ldt. For a given applied inductor voltage waveform vL(t), the
slope di!..(t)ldt can be made arbitr ar ily small by mak ing L suff icientl y large. In the limi tin g case where L
is infinite , lhe slope di L(l)ldt beco mes zero, and the inducto r curre nt is constant de. To provide a path for
the constant inductor to flow, at least two of the rectifier diodes must conduct at any given inst ant in time .
For the circ uit of Fig. 17.1, diodes D 1 and D3 conduct when the ac line voltage v/t) is positive, and D2
and D 4 conduct when v~(t) is negative. The ac li ne current wavefo rm is therefore a square wave, with
t
iii)= i1,(1) when v11(t) is positive , and i/1) = - i1,( 1) when v./ t) is negative. The diode conduction angle p,
defined as the angle throu gh which one of the diodes conducts, is equa l to 1800in CCM.
The rms value of a square wave is equal to its peak value /I'' ' in this case the de load current.
The fundamental component of a square wave is equal to 4/ 1j rr..,The square-wave conta.ins odd harmo n-
ics which vary as l/11.The distortion factor is therefore
• ' f actor= ·/1.......

d 1stortum _,_= - 4- = 90.0o/,
, mn o
I,,,,,. 1t .fI
The total harmo nic distort ion is

17.1 The Si11gle-Pha.se Full-Wave Rectifier 611
THD=29 %
ww
w.E
I<1g. 17.2 Typical ac line current and voltage waveforms, continuous conduc;tion mode.fof/L = 5, Q = 0.25.
asy
THD= . .I
( d1stortlo n factor
)'- - .1 =48.3 % ( 17.2)
So the Ii mi t ing case of the large inductor leads to some sig nifi ca nt harmo nic di storti on, alt hough it is not
En
as bad as the peak detection rec tifier case. Since the square wav e is in phase wit h the ac input voltage, the
dis placement factor is unit y, and hence the power fac tor is equal to the di stortion factor.
gin
Whenever the induc tor is s uffi cien tly large, the rec tifi er diodes conduct con tinu ously (i.e., there
is no tim e interval in which all four diodes are reverse -biase d). This is ca lled the con tinu ous co nducti on
mode (CCM). A typica l ac lin e current waveform is plotted in Fig. 17.2 for a finit e but large val ue of L. It
eer
can be seen that the ac line current is discontinuous at the ac line voltage zero cross ing, as in the square-
wave li miting case. Some ri ngin g is also present. Th is wavefon n co nt ains a tota l harmon ic di stor tion of
approxima tely 29%.
17.1.2 Discontinuous Conduction Mode ing

.ne
The opposite ca~e occurs when the inducto r is very sma ll and the ca pac itor C is very large. Th is is the
peak detec tor circuit. In the lim it as L goes to zero and C goes to infin ity, the ac line current approa ches a
string o f del ta (impulse) fun ctions that coinc ide with the peaks of the sinu so idal inpu t voltage wavefo rm .
It can be shown th at, in thi s lim itin g case, the THD become s infi nite while the distortion fact or and t
power facto r beco me zero . Of course , in the practical case the current is not infinite; nonetheless, large
THD w ith low power factor is quite possible. The diodes condu ct for less tha n one-hal f of the ac line
period, and hence ~< 180' in DCM.
Whene ver the capacitor is large and the induc tor is small, the rectifier tends to "peak detect,"
and the rec tifie r operate s in the discon tinu ous conduction mode (DCM). There exist time interva ls of
nonze ro length where all four rect ifier diode s are rev erse -biased . A typica l set of waveform s is plotted in
Fig. 17.3, wher e the capaci tor is hu-ge but finite, and the inductor is smaII but nonzero. The ac line volt -
age and the value of the load resistance are the same as in Fig. 17.2, yet the peak cwTent is substa nti ally
larger. The THD for th is wavefo rm is 145%, and the distort ion fac tor is 57%.

612 Li11e-Co
111
11111tated
Rectifiers
THD= 145%
ww
Fig. 17.3 Typic.alac line current and voltage waveforms, discontinuous conduction modc.J 0 /f1. = 8_4,Q = 12 I_
w.E
17.1.3 Behavior When C is Large
asy
A var iety of auth ors have discusse d the solut ion of passive rectifie r circ uits; several works are listed in
the references [8-15]. An alys is of even the si mple c ircuit of Fig. 17.1 is surpri s ing ly co mplex. For the
En
case when C is in finite, it was show n in [8] that the rectifi er waves hap es can be ex presse d as a function of
a single di mensio nle ss parameter Kl' defined as
gin
K _ 2L
,.-w L
( 17.3)
eer
where Tl= 1/fi is the ac line period . Eq uation ( 17.3) is of the same form as Eq. (5.6), used to defi ne the
dim ensio nless parameter K whic h gove rns the DCM behavior of PWM converters. Figure 17.4 illus trates
ing
the behav ior of the single-phase rectifier c ircuit of Fig. 17. 1, as a fun ctio n of Kr, and for infi nite C [8].
When Kl is greate r than appro xim ately 0 . 1, the rect ifier opera tes in CCM, with wavefo rm s sim il ar to
those in Fig. 17.2.
The voltage co nversio n ratio M is de fin ed as
.ne
( 17.4)
where V,,, is the peak value of the si nusoi dal ac inpu t voltage . In CCM , the out put voltage is idea lly inde-
pe ndent of load, wit h M = 2/rr.. Addi tion of ac-side inductance can cause the ou tpu t voltage to ex hib it a
t
dependence on load curre nt. The total har monic dis tortion in CCM is nearly co nstant and equ al to the
va lue given by Eq. ( 17.2).
ear the boun dary betwee n CCM and DCM, the fu nda me nta l component of the line current
s ignificant ly lags the line vol tage. The di splace ment factor reache s a m ini m u m va lue s lightl y less than
80%, and powe r facto rs betwee n 70% and 80% are observed .
For Kl = Cl.I, the rectifier operates heavi ly in DCM , as a peak -detection rec tifier. As KL is
decrease d, the di splace ment factor appro aches uni ty, while the THD increases rapidly. T he pow er fac tor
is dominated by the distortion facto r. The output voltage beco me s depende nt on the load , and hence the
rec tifie r ex hibits a small but nonzero outpu t imp edance .
For K 1, less than approx im ate ly 0.05, the wavefor m s are unchanged when some or all of the
ind uctance is shi fted to the ac side of the diode br idge. Figure 17.4 therefor e app lies to rec tifiers co ntai n-

17.I The Single-Phase Full-Wa ve Rectifier 613
cos (q,1 - 0 1),

PF,M THD
1.0 180'
0.9
PF 150% 135•
0.8
ww 0.7
M
100% 90"
0.6
w.E r--- -- THD
----ar- 50% 45'
asy
0.5
DCM :t.._ccM
---------------------~~-o o·
En
0.4
0
§ 8
c;i
0
0
gin
0
KL
Fi11,.17.4 Diode conduction angle~. displacementfactor. power factor, conversion ratio, and total harmonic distor-
eer
rion of the reciifier circuit nf Fig. 17. I, with infinite capacitance.
in g both ac-side and de -side inductance , provided that the circu it operates sufficient ly deep ly in DCM.
ing
The parameter K,. is computed according to Eq. ( 17.3), with L taken to be the total ac -side p lus de -side
inducta nce . A common example is the case where the c ircuit conta in s no phys ical discrete inducto r ; the
performance is then detennined by pm·asitic elements such as the capacitor eq uivalent series induc tance,
.n
the induc tance of th e utility distribution w iring, and transformer lea kage ind uctances.
17.1.4 Minimizing THD When C is Small
Let us now consider the ped 'on nance of the second ca~e. in wh ich the inducto r and capacito r are small
et
and are intended solely to prevent load -ge nera ted EM I from reach ing the ac line . [n thi s case, de -side fil-
tering of the low -freq uenc y eve n voltage harmon ics of the ac li ne frequency is not necessar y. The filter
ca n be charac ter ized by a come r frequency / 0 , character istic impedan ce R0 , and Q-factor, where
( 17.5)

614 line-Commutat ed Rectifiers
To obtain good filtering of the EM!, the corner frequency .ft1 should be selected to be suff iciently low.
However, as can be seen from Eq. ( 17.S), reducing the value of / 0 requires increasi ng the values of L
and/or C. As described above, it is unde sirab le to choose either element va lue too large, because large
distorti on results. Sofu shou ld not be too low, and there is a limi t to the amount of filte ri ng that can be
obtained with ou t significantly disto rtin g the ac line cur rent wavefo rm.
How low can 11 1 be? Once J; 1 is chosen, how should L and C be chosen such that THO is mini -
mized? We might expect that THO is increased when the phase of the filter inp ut impedance - Z;(iw),
evaluated at the second harmonic of the line frequency or 2ft , differs sign ifi cantly from 0°. When the
zero crossings of the voltage and current wavefo rms do not coincide, then diode switc hing distorts the
current waveform. To a lesser exte nt, input impedance phase shift at the higher-order even ha rmon ic fre-
ww
quencies of the ac line frequency should also affect the THO. The input impedance Z.(s) contain s two
zeroes at frequency / 0, and a pole at frequency J;,== .fi,JQ.To obtain small phase shift at low frequenc y,};,
must be suffic ient ly large. In addition , Q must be neither too small nor too large: small Q causes the
w.E
zeroes at.fci to introduce low-frequenc y phase shift, while large Q causes the pole atf;, to occur at low fre-
quency.
An approximate plot of THO vs. the choice of 1; 1 and Q is given in Fig. 17.5. It can be seen that
there is an optimum choice for Q: minimum THO occurs when Q lies in the range 0.5 to I. A typical
asy
waveform is plotted for the choice J0lfl = l 0, Q = 1, in Fig. 17.6. The THO for this wavefo rm is 3.6%,
and the distortio n factor is 99.97%.
Small Q corresponds to CCM operation, with large L and small C. In the ex treme case as
En
Q-> 0, the ac line current tends to a square wave with THO= 48%. Large Q corresponds to DCM opera-
tion , with small Land large C. In the extreme case as Q - •""',the ac lin e current tends to a string of delta
gin
fu nctions with TIID • oo. The optimum choice of Q leads to operation near the CCM-DCM boundary ,
such that the ac line curre nt waveform contains neither step cha nges nor subi ntervals of zero current.
In the case when the load resistance R varies over a wide range of values, it may be difficult to
optimize the circuit such that low THD is always obta ined. It can be seen that increasing 1;/J~
eer
low THO for a wider range of load resistance. For example , when }~= Sfi,. THD ~ 10% can be obta ined
leads to
only for Q between approx imately 0.6 and l.S, which is a 2.5: 1 range of load resis tance var iations. If the
50
ingTHD=: 10%
.ne
THD=:3%
t
10
THD=l%
THD=0.5%
• • ·• .. ••••• • •-• .. i••• -• •• ••••• •• •H•••••··~
0.1
1 ~
100
Fig. 17.5 Approx imate total harmonic; distort ion of llw si[lg )e-ph ase diod~ rec1ifier with de-side L~C lilter.

17.2 The Three-Phase Bridge Rectifier 615
THO =3.6%
ww
Fig. 17.6 Typical ac l ine curren t [Ind voltage waveforms, nenr the boundary betwt:en con tinuous and disconti nu-
w.E = =
ous modes and with small de filler capacitor./ oif1. 10, Q l.
filter cutoff frequency fo is increased to 2(ifL, then THO 5 10% is obtained for Q between approximately
0. 15 and 7, or nearly a 50: l range of resistance variations. In most cases, maximum harmonic limits are
asy
enforced only at full load, and hence it is possible to design with relatively low values of f~IJL if desired.
17.2 THE THREE-PHASE BRIDGE RECTIFIER

En
gin
A basic full -wave three-phase uncontro lled rectifie r with LC outpu t filter is shown in Fig. 17.7. Its behav-
ior is similar to the single-phase case, in that it exhibits both contin uous and discont inuous conduction
modes, depending on the values of L and C. The recti fier generates odd non-tripl en harmonics in the ac
conta in de and even trip len harmonics: 0, 6, 12, 18, etc.

eer
line current. So the ac line curre nt may contain )51,5th, 7 th , 1111', 13th , etc. harmonics. The de output may
In the basic circu it of Fig. 17.7, no more than two of the six diodes can conduct during each
ing
int erval, and hence the line current waveforms must contain interv als of nonzero length during which the
current is zero. Unlike the single-phase case, the ac line current waveform must cont ain distortion even
.ne
when the filter elements are removed.
t
17 .2.1 Continuous Conduction Mode
In the continuous conduction mode, each ac line current is nonzero for 120 degrees out of each line half-
cycle. For the remai ning 60 degrees, the current is zero. This mode occurs when the inductance Lis suf-
ia(t) il( t) L
f>a
+
D3
3¢ de load
ac ¢b C V
R
Ille
Fig. 17.7 Da,ic unco11trollcd 3¢ hridgc rcctificl' circt1i1, with de-side l C tihc1.

616 Line-Commutated Rectifiers
Fig. 17.8 Ac lirie current waveform i,,(1). fol' lhc case

when inductor L is large. The phase is drawn with re~pet:l 0 Wt
to the zero crossing of the line-to-neutral voltage v.,.(I). 90· 1so· 210· 360"
-i L
ficiently large, as well as whe n the fi lte r elements Land Ca re removed en tire ly.
In the limit , when l is very large, then the curr ent il(t ) is esse ntiall y constant. The cu rren t in
ww
phase a, i,,(1), is then as shown in Fig. 17.8. It can be shown tha t the Fourier se1ies for this waveform is
iJt)"' :E ,;kli. sin ("f)sin (' 3)sin (nwt) (17.6)
w.E
a; 1.l,7.11 ... ,
which is simil ar to the spectrum of the square wave of the single -phase case, but with the triplen harmon -
ics missing. Th e THO of thi s waveform is 31%, and the disto 1tion factor is 3/rc"' 95 .5%. As in the case of
asy
the square wave, the amplitude of the odd nontri plen 11th harm onic is (l /11 ) times the fun da mental amp li·
tude . So this wavefor m conta ins 20% fifth harmonic, 14% seven th harm on ic, 9% eleventh harmonic , etc.
It is interes ting th at , in compar ison wi th the square -wave si ngle-phas e case, the missi ng 60° in the three-
En
phase case impro ves the THO and power factor, by remov ing the trip len harm onics.
With a less-t han -in fi nite value of induct ance , the output rippl e causes the ac line currents to be
rounded , as in the typical waveform of Fig. 17.9. This wavefo rm has a 31.9 % THD, wi th a disto rtion fac-
gin
tor that is not much differe nt from the wavefo rm of Fig. 17.8.
THD=3l.9%
eer
ing
.ne
Fig. 17.9 Continuous conduction mo<le ac; line-11e1Jt

ral voltages an<lpl1ase a cmrent , for a moderate value of
t
inductanc~.
17.2.2 Discontinuous Conduction Mode
If the indu cta nce is furth e r reduced, then the thr ee -pha se rec tifi er enters the di scontinuous co nduct ion
mode. The rect ifier then begins to peak-detect , and the current wave forms become narrow pulses of hig h
amplitude , occurrin g near the peaks of the Ii ne - line voltages. The phase a line curre nt i"(I) co ntains two
positive and two negative pulses, at the positive and negati ve peaks of the lin e-lin e voltag es yab(r) and
v,,p). As in the sing le-phase case, the total harm onic distort ion becomes quit e large in th is case, and the

17.3 Phas e Control 617
THD=99 .3%
ww
w.E
Fig. 17.Hl Discontinuous conduccion mode ac line-neurral voltagt!s and phase a current.
pow er factor can be significa ntl y degraded.

A typical waveform is given in Fig. 17.10. This waveform has a THO of 99.3 %, and a dis tortion
asy
factor of 7 1%. Thi s wou ld be considered unacceptab le in high -power applicat ions , excep t perhaps at
light load.
17.3 PHASE CONTROL

En
gin
There are a wide var iety of scheme s for contro lling the de output of a 3,, rectifier using thyristors [ 1,2).
The most common one is show n in Fig. 17. 11, in which the six diodes of Fig. 17.7 are rep laced by silicon
tance.
eer
controlled rectifiers (SCRs). Typical waveforms are given in Fig. 17 .12, for large de-side filter induc -
If Q 1 were an uncontrolled diode , it would conduct whenever the line -to-line voltage v.,0 or v,,"is
ing
the largest in magn itude of the six line -line voltages vab•vb"'v,.0 , vba' v,:h• and v,.,.. Thi s occurs for 120° of
each cycle, beginn ing at the point where V0 t,=v cb· In Fig. 17.12, this occur s at Wt= 60°. The output volt -
age of the controlle d rect ifie r is controlled by de lay ing the firing ofQ 1 by an angle 0:, such that Q 1 begin s
.ne
co nductin g at wt= 60 ° + a . This has the effect of reducing the de outpu t voltage .
There can be no de component of voltage across inductor L Hence, in steady -state, the de com -
ponent of the rectifier ou tput voltage vR(t) must equal th e de load voltage V. But vR(t) is peri odic, with
period equa l to six times the ac line period (or 60°). So the de co mponent of vH(t) can be found by Fou-
rier analys is, and is equal lo the average value of v,..(t). Over one 60 ° interv al, for example
(60. + a) :5rot:5 (I 20· + a), vit) follows the line -line voltage v.,b(l) a: 3 V,,.sin (cm+ 30.) .The average is
t
therefore
L
+
3¢ de load
ac V
R
¢c
Fig, 17.11 Basic controlled 3,i bridge rec1ilier circuil, with de-side L----C
filter.

618 Li11e-Co11111111ta1
ed Recrifier.r
i/t) i
_..la
!
- van<t) = v,nsi n (rot)
I
f-H ·--tO i-!
.......
""' 1-t---t-.
I-t.-.......
--t----..... --t.-·
--,t+--.-~ .-t-.
(Jj/
:,,o· I 90· 11so· 210· \ _ ii
Fig. 17.12 Waveforms for the

controlled rectifier of Fig. 17.1 1,
with large de filter inductance .
i 'k I
ww
w.E
asy Upper thyristor:
Lower thyristor:
Q3
Q5
i
;
Q,
Q5
Q,
Q6
Q2
Q6
[
1
Q2
Q4
!
l
:
Q3
Q4
En
gin
<>
')(l' to.
V=¾J_. .1<l +u
/3 V. , sin(0 +3 0' ) d0 ( 17.7)
-·- '1/2°
n VL-l.., rur:s t,;.'OS ,·,
eer
u.
where VL ·L. , ,,,.,. is ther ms lin e-to- line voltage. T hi s eq uation is plotte d in Fig. 17.13. It can be seen that, if
ing
it is necessary to reduce the de outp ut voltage to values close to zero , then the dela y angle 0: must be
1.5
.ne
l<'ig. 17.13 Variation of the de output

0.5
t
voltage V with del ay ungle a , for the 0

pha se-controlled circ uit of Fig. 17.11.
--0.5
-I
0 30 60 90 120 150 180

ex,degrees

17.3 Phase Control 619
increased to close to 90°. With a small indu ctance, the control led rect ifi er can also operate in disco ntinu -
ous co nduction mod e, w it h modified output voltage ch,m1cteristics.
17.3.I Inverter Mode
If the de load is capable of supply ing power , then it is possible for the direct ion of power flow to reve rse.
For example, consider the three -pha se controlled rectifier circuit of Fig. 17.14. The resis tive load is
replaced by a voltage source and thevenin -equiva lent resistance, capable of either supp lyin g or cons um-
ww
ing power. The de load power is equal to VIL, w hi c h is pos itive (rec tifi er mode) whe n both Vand IL are
positive. The th yristo r is a unidirection al-current switch , which cannot conduct negat ive curren t, and
hence / 1_ must always be posit ive. However, it is possib le to cause the output voltage V to be negative , by
w.E
increasing the de lay angle u. The de load powe r VILthen becomes a negative quanti ty (inverte r mode) ,
meaning that power flows from the de load into the 3~ac syste m.
Provided that the de-side filter induct,mce Lis suffic ientl y large, then Eq. (17.7) is valid even
when the delay ang le a is greater th an 90°. It can be seen in Fig. 17.13 that the de output voltage V
asy
becomes negative for a.> 90°, and hence the power flow indeed reve rses . Delay angles approaching 180°
are possible, wit h the max imum angle limited by commu tati on of the thyristor devices .
17.3.2 Harmonics and Power Factor

En
gin
Let us next cons ider the h,umon ic conten t and power factor of the phase-controll ed rectifier wit h large
inductance . Comparison of the line current waveform of Fig. 17.12 with that of the uncon trolled rectifier
eer
(Fig. 17.8) reveals that th e waveshapes ,ue ident ical. The only difference is the phase lag a present in the
phase -con trolled rectifier. Th is has the effect of shifti ng the fund amental co mpone nt of current (and the
harmonics as well) by angle a;, The Four ier series is therefore
, ()t = ,,~ t.t~

,,, 4 1ls m
'F.ii ....11ft , (mt). ('rn)
2 sm T .~.m (11w1-11a ) ing (11,8)
.ne
Hence the harm oni c ampli tud es are the same (the fifth harmonic a mpl itu de is 20% of the fundamental,
etc.), the THD is again 3 1%, and the distortion factor is again 95.5%. But there is phase lag in the funda -
men tal co mpon en t of current , wh ich leads to a di splace men t facto r of cos(a.). The powe r fac tor is there -
fore
t
3¢
ac
¢c
Fig. 17.14 If the load is eapahle of supplying power, then the 311bridge circuit functions as an inverter for V < 0
and ex> 90'.

620 Line-Commutated Rectifien
IIS IIsin a
Jfig. 17.lS Fundameutal componenl complex power diagram
for the 3¢ bridge circu it operating in rectifier mode.
s
11 II cos a
ww
P
power factor= 0.9551 cos (a) I ( 17,9)
w.E
whi ch can be qu ite low whe n the de o ut pu t vo ltage Vis low.
It is at first so mew hat pu zzli ng that the in trod uction of phase co ntro l ca n cause the fu nda me n ta l
current to lag the voltage . Ap parently, the rect ifier co nsu mes reac tive power e qu a l to
asy Q = .f3 l o,nmVL-L.mu sin a= IL 3 -{1Vl· L. "'" sin a ( 17.10)
En
We nor mally ass ociate lagg in g c urre nt and the co nsumpt ion of react ive power w ith ind uct ive e nergy
storage. But th is is not what is happ e n ing in the rec tifier ; indeed , the inductor and capac ito r ca n be
gin
removed e ntire ly fro m the rec tifier ci rc u it, and a lagg in g fun da me nta l curr ent is still obta ine d by phase
co ntro l. It is simp ly the delay of the swi tching o f the rec tifiers that cau ses the cu rre nt to lag, a nd no
energy stora ge is in volved. So two mechan isms cause the ph ase-co ntro lle d rec tifie r to ope rate w ith low
eer
powe r factor : the lagging fu nd ame ntal compo nent of current , and the generat io n of cu rr ent ha rm oni cs .
Equat ion (17 .10) ca n be furt her interp reted . Note th at the de o utp ut powe r P is equ al to the de
indu ctor curr ent 11,times the de out put vo ltage V. By use of Eq . (l 7.7), th is can be writte n
3,'2
pa, IL 1t v ,, t.,mr,cos u ing (17 . 11)
.ne
Co mpar ison of Eqs . ( 17. lO) an d (17 . 11) reveals that the rectifie r funda me nta l volt-a mperes c an be
expressed usin g the co nventional conc epts of co mp lex powe r S = P + jQ , where P is the real (avera ge)
power co nsumed and Q is the fu nd ame nta l reactive power cons um ed . Th e co mp lex power phasor dia-
gram , tre at ing th e fun d ame ntal co mp onents only , is ill ust rate d in Fig. 17.15.
t
17.3.3 Commutation
Let's consider ne xt w hat ha ppens du rin g the sw itc h ing tr ansiti ons . In the ph ase -controlled rectifier c irc uit
of Fig. 17.16, the de-side inducto r L,1 is large in value , suc h that its curr e nt ripple is neg ligible. Indu cto rs
La, Lb, and L,. are also prese nt in the ac lines; these may be ph ys ical indu c tors o f the rect ifier c irc u it , or
th ey may repre se nt the so urce imp eda nce of the powe r sys tem, typ ic ally the le ak age induct ance s of a
nea rby tra nsfo rm e r. These inductor s are re lat ively s mall in va lue .
Consider the sw itc h in g tra nsit io n illu stra ted in Fig. 17.17. Th yristo rs Q 3 and Q5 in it ia ll yco n-
duct. At time t, 1• th yr istor Q 1 is ga ted o n, and the de c urre nt iL beg ins to sh ift fro m Q3 to Q 1 . The ac li ne
curre nts i"(t) a nd ( .(t) ca nn ot be disco nt inu ous, since indu ctors La and Le are pres ent in the line s. So dur -

17.3 Phase Control 621
ww
Fig. 17.16 Controlled 31'!rectitier circuit, with small ac-side inductances.
in g th e inte rva l tc1 < t < t.,2 , th yris tors Q 1 and Q3 both co nduc t, a nd the vo ltagev,./ is zero. Voltage is
w.E
appli ed ac ro ss indu ctors L" an d L,, ca usin g the ir curre nts to cha nge ; for success ful co mm utat ion, suffi-
cie nt vo lt-seco nd s mu st be app lied to ca use the curre nts to cha nge fro m il to zero, and vice vers a. An y
stored charge th at re mains in thyr istor Q 1 w he n curre nt i, (t) reac hes zero mu st also be remove d, and
hence 1)t) actua lly co ntinu es negat ive as di scussed in Chapte r 4. Whe n the reverse recovery process of
th yris tors Q1 and Q5 .

asy
Q 3 is co mp lete, then Q3 is fina lly in the o ff -state, and the nex t sub inte rva l begi ns wit h the cond uct ion of
1l1e com mut at io n process descr ibed above has seve ral effec ts on the co nverter behav ior. First, it
En
can be see n tha t the th yr istor brid ge de-side voltage vit) is redu ced in val ue durin g th e comm uta ti o n
interval. Hence, its average va lue {vd) and the de out pu t voltage Vare reduced. 1l1e amou nt of reduction
gin
is depend en t on the de loa d cu rre nt: a larger de loa d c urr ent lea d s to a longe r co mmu tatio n interval, and
hence to a greate r reduc tion in (v,1}. So the rec tifie r has an effec tive output res istance . Seco nd, the maxi -
mum val ue of the delay an gle ct is li m ited to some va lue less than 180°. If a exceeds th is lim it, the n
eer
in suffic ie nt volt-seco nds are ava ilab le to change ind uctor c urre nt icCt)from it, to zero, lead ing to cm11mu
tationfai lure. Third , whe n the rect ifie r ac-side induc tors are sm all or zero , so that L", Lb. and L,. represe nt
-
ing
.ne
Fig. 17,17 Swi1ch1ngtransition waveforms,

t
for the rccti lier of Fig. 17. 16. iQ3! Ql Q,

Conduc ting Q3 Qli
thyristors: IQ,! Q6!
Q5 ,Q5;
l
:
:
i
Qs Qsl Q6
IJ<)l
l1
il
0
i. •
;Ji
)! i,,
: :
~
Ii\--l.! or
~l r

622 Li11e-C
o111111

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Erickson, Robert W.(Author). Fundamentals of Power Electronics. Second Edition.

Secaucus, NJ, USA: Kluwer Academic Publishers, 2000. p (1).

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All rights reserved

Created in the United States of America

V isit Kluwer Online at: http://kluweronline .com

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3.3. 1 Inductor Voltag e Equation 46

4.4 Summary of Key Points 101

The Discontinuous Conduction Mode

5.2 An alys is of the Conversion Ra tio M (D,K) 112

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6.1.4 Diff ere nti al Con nection of the Load 138

ww 6.4 Converter Evaluation and Design

7.2.9 Exa mpl e : A Nonid eal Flyback Converter 204

7.4 Circuit Averaging and Averaged Switch Modeling

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7.5.2 Example: Manipulat ion of the Buck- Boost Converter Model

ww 8.1 Review of Bode Plots

8.S Measurement of AC Transfer Functions and Impedances 3 17

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9.4.1 The Phase Margin Test 341

ww 9.6 Measurement of Loop Gains

10.4.1 RrCb Parallel Damping 395

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11.3 High -Fre quency Dynam ics of Conve rters in DCM 43 1

12 Current Programmed Control 439

13.2 Transfo rmer Modeling 501

13.3.2 Low-Frequency Coppe r Loss 508

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13.5 Several Types of Magnet ic Devices, The ir B- H Loops,

Probl ems 563

15.l.3 Copper Loss 567

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15.5 Summary 583

ww 16.3 Power Factor 594

17.1 The Single- Phase Full-Wave Rec tifier

17.2 l11eThree-Phase Bridge Rec tifier 6 15

17.3.3 Commutation 620

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18.2 Realizat ion of a Nea r-Ideal Rectifier 640

V Resonant Converte rs 703

Series Resonant DC- DC Converter Examp le

19.2.2 Subharmonic Modes of the Series Resonant Conve rter 7 17

19.2.3 Para llel Resonant DC- DC Conve11er Example 718

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19.4.4 Another Example 737

20 Soft Swit.ching 761

ww 20. 1 Soft -Switching Mechanisms

The Zero -Vo ltage Transition Full - Br id ge Converte r

Appendix B Simulation ot· Converters 813

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B.2.3 Example : DCM Boost Rectif ier 832

Appendix C Middlebrook'sExtra Element Theorem 843

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Power Switchi11g Power

Fig. 1.2 A c;ontroller is genernlly required.

The powe r Jost in the converter is