EE809: Analog Integrated Circuit Design

Week-3
th st
27 Sep – 01 Oct 2021

EE809 Fall 2021 Hammad M. Cheema Slide 1

RIMMS, NUST
Last week’s topics
• MOSFET I/V curves
• Operation regions
• Second order effects
– Body effect, CLM, Sub-threshold conduction,
Breakdown voltages
• Transistor layout & folding
• MOSFET Capacitances
• Small Signal Model

EE809 Fall 2021 Hammad M. Cheema Slide 2

RIMMS, NUST
This week’s topics
• End problems - Chp2
• Chp-3: Single Stage Amplifiers
– Analog design octagon
– Common Source amplifier with various loads

EE809 Fall 2021 Hammad M. Cheema Slide 3

RIMMS, NUST
End problem 2.1
For W/L=50/0.5, plot the drain current of an
NFET and a PFET as a function of |VGS| as
|VGS| varies from 0 to 3V. Assume |VDS|=3V.

EE809 Fall 2021 Hammad M. Cheema Slide 4

RIMMS, NUST
End Problem 2.2
For W/L=50/0.5 and |ID|=0.5mA, calculate the
transconductance and output impedance of
both NMOS and PMOS devices. Also, find the
“intrinsic gain,” defined as gmr0

EE809 Fall 2021 Hammad M. Cheema Slide 5

RIMMS, NUST
 Chp3: Analog Design Octagon
• Along with gain and
speed, other parameters
also important for
amplifiers
• Input and output
impedances decide
interaction with
preceding and
subsequent stages
• Performance parameters
trade with each other
– Multi-dimensional
optimization problem

EE809 Fall 2021 Hammad M. Cheema Slide 6

RIMMS, NUST
 Common-Source stage with resistive load
• Input → Gate, Output →Drain, Source→ Ground
• Gate source voltage generates drain current that is
converted into output voltage through a resistor

𝐴𝑣 = −𝑔𝑚 𝑅𝐷

Deep Triode Region

EE809 Fall 2021 Hammad M. Cheema Slide 7

RIMMS, NUST
CS stage with channel length modulation
• Resistance (r0) decreases the gain of the
amplifier

𝐴𝑣 = −𝑔𝑚 (𝑅𝐷 ||𝑟0 )

EE809 Fall 2021 Hammad M. Cheema Slide 8

RIMMS, NUST
Diode connected load
• A MOSFET can operate as a small-signal resistor if its gate and drain
are shorted, called a “diode-connected” device
• Transistor always operates in saturation

• Impedance of the device can be found from small-signal equivalent

model

EE809 Fall 2021 Hammad M. Cheema Slide 9

RIMMS, NUST
Diode connected load (From Source Side)

• Including body-effect, impedance “looking into” the

source terminal of diode-connected device is found as

1
𝑅𝐷𝐶𝐿 ≅
With body effect ignored 𝑔𝑚
EE809 Fall 2021 Hammad M. Cheema Slide 10
RIMMS, NUST
Transistor from Source Side
• Find RX if λ = 0

• Set independent sources to zero, apply VX and find resulting IX

• Result is same compared to when drain
of M1 is at ac ground, but only when λ = 0

• Loosely said that looking into source of

MOSFET, we see 1/gm when λ = γ = 0

EE809 Fall 2021 Hammad M. Cheema Slide 11

RIMMS, NUST 11
 CS stage with diode connected load
• The gain becomes independent of bias current and
only dependent on aspect ratios
𝑔𝑚1 1
𝐴𝑣 = −
𝑔𝑚2 1 + η
𝑔𝑚1
𝐴𝑣 ≅ −
𝑔𝑚2

𝑊 Τ𝐿 1
𝐴𝑣 ≅ −
𝑊 Τ𝐿 2

EE809 Fall 2021 Hammad M. Cheema Slide 12

RIMMS, NUST
 CS stage with PMOS diode-connected load
• PMOS diode-connected load
can also be used
• Offers the same resistance as
NMOS diode connected load
• Circuit is free from body
effect…why?

• Disadvantage: Limited voltage

swings as VD & VG are at same 𝜇𝑛 𝑊 Τ𝐿 1
potential. So, VD can go to 𝐴𝑣 ≅ −
maximum VDD – |VTH| 𝜇𝑝 𝑊 Τ𝐿 2

EE809 Fall 2021 Hammad M. Cheema Slide 13

RIMMS, NUST
CS stage with diode connected load & Channel
length modulation
• r0 of both M1 & M2 will be
included in the voltage
gain expression

1
𝐴𝑣 ≅ −𝑔𝑚1 ||𝑟02 ||𝑟01
𝑔𝑚2

EE809 Fall 2021 Hammad M. Cheema Slide 14

RIMMS, NUST
 Current source load
• MOSFET transistor biased in saturation region with a
DC voltage only offers resistance r0

• A NMOS current source will have its source grounded

to keep VGS constant

• A PMOS current source will have its source connected

to VDD to keep VGS constant

EE809 Fall 2021 Hammad M. Cheema Slide 15

RIMMS, NUST
 CS stage with current source load
• MOSFET transistor biased in saturation region with a
DC voltage only offers resistance r0
• VDS2 can go much lower allowing larger voltage swings

𝐴𝑣 ≅ −𝑔𝑚1 𝑟01 ||𝑟02

EE809 Fall 2021 Hammad M. Cheema Slide 16

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 CS stage with Triode load
• Transistor in deep-triode
region can also be used
as a load for CS stage.
• Disadvantage:
Dependence of RON2 on
µp Cox, Vb & |VTHp| that
vary with temperature
and process

EE809 Fall 2021 Hammad M. Cheema Slide 17

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 The End

EE809 Fall 2021 Hammad M. Cheema Slide 18

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