For New Designs: SIM6827M

500V / 600V High Voltage 3-phase Motor Driver ICs
SIM6800M Series Data Sheet
Description Package
The SIM6800M series are high voltage 3-phase motor DIP40
driver ICs in which transistors, a pre-driver IC (MIC), Mold Dimensions: 36.0 mm × 14.8 mm × 4.0 mm
and bootstrap circuits (diodes and resistors) are highly
integrated. 40
These products can run on a 3-shunt current detection
system and optimally control the inverter systems of
small- to medium-capacity motors that require universal
21
input standards.
:
ns
1
Features
g
● Built-in Bootstrap Diodes with Current Limiting
M si
Resistors (60 Ω) 20 Leadform 2971
27 De
● CMOS-compatible Input (3.3 V or 5 V)
● Bare Lead Frame: Pb-free (RoHS Compliant) Not to scale
● Isolation Voltage: 1500 V (for 1 min)
68 w
UL-recognized Component (File No.: E118037) Selection Guide
(SIM6880M UL Recognition Pending)
e
● Fault Signal Output at Protection Activation (FO Pin) Part
VDSS/VCES IO Feature
● High-side Shutdown Signal Input (SD Pin)
IM N Number
● Protections Include: 2.0 A SIM6811M
, S or
Overcurrent Limit (OCL): Auto-restart
500 V 2.5 A Power MOSFET SIM6812M
Overcurrent Protection (OCP): Auto-restart
M df
Undervoltage Lockout for Power Supply 3.0 A SIM6813M

High-side (UVLO_VB): Auto-restart IGBT with FRD,
Low-side (UVLO_VCC): Auto-restart
22 de
3.0 A low switching SIM6880M

Thermal Shutdown (TSD): Auto-restart dissipation
68 n
IGBT with FRD,

Typical Application (SIM681xM) 600 V
5.0 A low switching SIM6822M
M me
dissipation
VB1A
VCC 21
VB1B IGBT with FRD,
VCC1 17 30 5.0 A SIM6827M
SI m
CBOOT1 low noise

20 VB2
o
CBOOT2
ec
23 VB3 Applications
CBOOT3
COM1 16
For motor drives such as:
R
HIN3 VDC
HIN3 15
HIN2 28VBB
14
● Refrigerator Compressor Motor
HIN2
HIN1
HIN1 13
● Fan Motor and Pump Motor for Washer and Dryer

ot
SD 12
31 U
● Fan Motor for Air Conditioner, Air Purifier, and
N
OCL 10 19 V
LIN3
LIN3 9 MIC
26 V1 M
Electric Fan
LIN2
LIN2 8
LIN1 35 V2
LIN1 7
Controller
5V COM2 W1
6 24
RFO VCC2 5 37 W2
FO 4
Fault
OCP 3
LS1
CFO 11
LS2 2 33 LS2
RO LS3A 1 40 LS3B
CS CDC
RS
CO
GND
SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 1

Jan. 21, 2019 https://www.sanken-ele.co.jp/en
© SANKEN ELECTRIC CO., LTD. 2014
SIM6800M Series
Contents
Description ------------------------------------------------------------------------------------------------------ 1
Contents --------------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings----------------------------------------------------------------------------- 4
2. Recommended Operating Conditions ----------------------------------------------------------------- 5
3. Electrical Characteristics -------------------------------------------------------------------------------- 6
3.1 Characteristics of Control Parts------------------------------------------------------------------ 6
3.2 Bootstrap Diode Characteristics ----------------------------------------------------------------- 7
3.3 Thermal Resistance Characteristics ------------------------------------------------------------- 7
:
3.4 Transistor Characteristics ------------------------------------------------------------------------- 8
ns
3.4.1 SIM6811M -------------------------------------------------------------------------------------- 9
3.4.2 SIM6812M -------------------------------------------------------------------------------------- 9
g
3.4.3 SIM6813M ------------------------------------------------------------------------------------ 10
M si
3.4.4 SIM6880M ------------------------------------------------------------------------------------ 10
27 De
3.4.5 SIM6822M ------------------------------------------------------------------------------------ 11
3.4.6 SIM6827M ------------------------------------------------------------------------------------ 11
4. Mechanical Characteristics --------------------------------------------------------------------------- 12
68 w
5. Insulation Distance -------------------------------------------------------------------------------------- 12
e
IM N
6. Truth Table ----------------------------------------------------------------------------------------------- 13
7. Block Diagrams ------------------------------------------------------------------------------------------ 14
, S or
8. Pin Configuration Definitions------------------------------------------------------------------------- 15
M df
9. Typical Applications ------------------------------------------------------------------------------------ 16

10. Physical Dimensions ------------------------------------------------------------------------------------ 17
22 de
11. Marking Diagram --------------------------------------------------------------------------------------- 18

68 n
12. Functional Descriptions -------------------------------------------------------------------------------- 19

12.1 Turning On and Off the IC ---------------------------------------------------------------------- 19
M me
12.2 Pin Descriptions ----------------------------------------------------------------------------------- 19

12.2.1 U, V, V1, V2, W1, and W2 ----------------------------------------------------------------- 19
SI m
12.2.2 VB1A, VB1B, VB2, and VB3 -------------------------------------------------------------- 19

12.2.3 VCC1 and VCC2 ---------------------------------------------------------------------------- 20
o
12.2.4 COM1 and COM2--------------------------------------------------------------------------- 20

ec
12.2.5 HIN1, HIN2, and HIN3; LIN1, LIN2, and LIN3 -------------------------------------- 21
12.2.6 VBB -------------------------------------------------------------------------------------------- 21
R
12.2.7 LS1, LS2, LS3A, and LS3B ---------------------------------------------------------------- 22

12.2.8 OCP and OCL ------------------------------------------------------------------------------- 22
ot
12.2.9 SD----------------------------------------------------------------------------------------------- 22
12.2.10 FO ---------------------------------------------------------------------------------------------- 22
N
12.3 Protection Functions ------------------------------------------------------------------------------ 23

12.3.1 Fault Signal Output ------------------------------------------------------------------------- 23
12.3.2 Shutdown Signal Input --------------------------------------------------------------------- 23
12.3.3 Undervoltage Lockout for Power Supply (UVLO) ----------------------------------- 23
12.3.4 Overcurrent Limit (OCL) ----------------------------------------------------------------- 24
12.3.5 Overcurrent Protection (OCP) ----------------------------------------------------------- 25
12.3.6 Thermal Shutdown (TSD) ----------------------------------------------------------------- 26
13. Design Notes ---------------------------------------------------------------------------------------------- 26
13.1 PCB Pattern Layout ------------------------------------------------------------------------------ 26
13.2 Considerations in Heatsink Mounting -------------------------------------------------------- 26
13.3 Considerations in IC Characteristics Measurement --------------------------------------- 27
14. Calculating Power Losses and Estimating Junction Temperatures --------------------------- 28
14.1 IGBT ------------------------------------------------------------------------------------------------- 28

SIM6800M Series
14.1.1 IGBT Steady-state Loss, PON -------------------------------------------------------------- 28

14.1.2 IGBT Switching Loss, PSW ----------------------------------------------------------------- 28
14.1.3 Estimating Junction Temperature of IGBT -------------------------------------------- 28
14.2 Power MOSFET ----------------------------------------------------------------------------------- 29
14.2.1 Power MOSFET Steady-state Loss, PRON----------------------------------------------- 29
14.2.2 Power MOSFET Switching Loss, PSW --------------------------------------------------- 29
14.2.3 Body Diode Steady-state Loss, PSD ------------------------------------------------------- 29
14.2.4 Estimating Junction Temperature of Power MOSFET ------------------------------ 30
15. Performance Curves ------------------------------------------------------------------------------------ 31
15.1 Transient Thermal Resistance Curves -------------------------------------------------------- 31
15.2 Performance Curves of Control Parts--------------------------------------------------------- 32
:
15.3 Performance Curves of Output Parts --------------------------------------------------------- 37
ns
15.3.1 Output Transistor Performance Curves ------------------------------------------------ 37
15.3.2 Switching Losses ----------------------------------------------------------------------------- 39
g
15.4 Allowable Effective Current Curves ----------------------------------------------------------- 42
M si
15.4.1 SIM6811M ------------------------------------------------------------------------------------ 42
15.4.2 SIM6812M ------------------------------------------------------------------------------------ 43
27 De
15.4.3 SIM6813M ------------------------------------------------------------------------------------ 44
15.4.4 SIM6880M ------------------------------------------------------------------------------------ 45
15.4.5 SIM6822M ------------------------------------------------------------------------------------ 46
68 w
15.4.6 SIM6827M ------------------------------------------------------------------------------------ 47
e
15.5 Short Circuit SOAs (Safe Operating Areas) -------------------------------------------------
IM N 48
16. Pattern Layout Example ------------------------------------------------------------------------------- 49
, S or
17. Typical Motor Driver Application ------------------------------------------------------------------- 51
Important Notes ---------------------------------------------------------------------------------------------- 52
M df
22 de
68 n
M me
SI mo
ec
R
ot
N

SIM6800M Series
1. Absolute Maximum Ratings

Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); current coming
out of the IC (sourcing) is negative current (−).
Unless specifically noted, TA = 25 °C, COM1 = COM2 = COM.
Parameter Symbol Conditions Rating Unit Remarks
400 SIM681xM
Main Supply Voltage (DC) VDC VBB–LSx V SIM682xM
450
SIM6880M
450 SIM681xM
Main Power Voltage (Surge) VDC(SURGE) VBB–LSx V SIM682xM
500
:
SIM6880M
ns
VCC = 15 V,
VDSS ID = 1 µA, VIN = 0 V
500 SIM681xM
IGBT / Power MOSFET
g
V SIM682xM
Breakdown Voltage VCES
VCC = 15 V,
600
M si
IC = 1 mA, VIN = 0 V SIM6880M
27 De
VCC VCCx–COM 20
Logic Supply Voltage VB1B–U, V
VBS VB2–V, 20
VB3–W1
68 w
2 SIM6811M
e 2.5 SIM6812M
IM N TC = 25 °C, SIM6813M
Output Current (1) IO 3 A
TJ < 150 °C SIM6880M
, S or
SIM6822M
5
SIM6827M
M df
3 SIM6811M
TC = 25 °C, 3.75 SIM6812M
22 de
VCC = 15 V, SIM6813M
Output Current (Pulse) IOP PW ≤ 1 ms, 4.5 A
SIM6880M
68 n
single pulse
SIM6822M
7.5
M me
SIM6827M
HINx–COM,
Input Voltage VIN LINx–COM
− 0.5 to 7 V
SI m
FO Pin Voltage VFO FO–COM −0.5 to 7 V

OCP Pin Voltage VOCP OCP–COM −10 to 5 V
o
−0.5 to 7
ec
SD Pin Voltage VSD SD–COM V

Operating Case
TC(OP) −30 to 100 °C
R
Temperature(2)
Junction Temperature(3) TJ 150 °C
ot
Storage Temperature TSTG −40 to 150 °C

Between surface of the
N
Isolation Voltage( 4) VISO(RMS) case and each pin; AC, 1500 V

60 Hz, 1 min
(1)
Should be derated depending on an actual case temperature. See Section 15.4.
(2)
Refers to a case temperature measured during IC operation.
(3)
Refers to the junction temperature of each chip built in the IC, including the controller IC (MIC), transistors, and fast
recovery diodes.
(4)
Refers to voltage conditions to be applied between the case and all pins. All pins have to be shorted.

SIM6800M Series
2. Recommended Operating Conditions

Unless specifically noted, COM1 = COM2 = COM.
Parameter Symbol Conditions Min. Typ. Max. Unit Remarks
Main Supply Voltage VDC VBB–COM — 300 400 V
VCC VCCx–COM 13.5 15.0 16.5 V
Logic Supply Voltage VB1B–U,
VBS VB2–V, 13.5 — 16.5 V
VB3–W1
Input Voltage
VIN 0 — 5.5 V
(HINx, LINx, OCP, SD, FO)
:
tIN(MIN)ON 0.5 — — μs
ns
Minimum Input Pulse Width
tIN(MIN)OFF 0.5 — — μs
g
Dead Time of Input Signal tDEAD 1.5 — — μs
M si
FO Pin Pull-up Resistor RFO 3.3 — 10 kΩ
27 De
FO Pin Pull-up Voltage VFO 3.0 — 5.5 V
FO Pin Noise Filter Capacitor CFO 0.001 — 0.01 μF
68 w
Bootstrap Capacitor CBOOT 1 — 220 μF
e
IM N IP ≤ 3 A 390 — — SIM6811M
IP ≤ 3.75 A 270 — — SIM6812M
Shunt Resistor RS mΩ SIM6813M
, S or
IP ≤ 4.5 A 270 — —
SIM6880M
SIM6822M
M df
IP ≤ 7.5 A 150 — —
SIM6827M
RC Filter Resistor RO — — 100 Ω
22 de
SIM6822M
1000 — 2200 SIM6827M
68 n
SIM6880M
RC Filter Capacitor CO pF
M me
SIM6811M
1000 — 10000 SIM6812M
SIM6813M
SI m
PWM Carrier Frequency fC — — 20 kHz

o
Operating Case Temperature TC(OP) — — 100 °C

ec
R
ot
N

SIM6800M Series
3. Electrical Characteristics
Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); current coming
out of the IC (sourcing) is negative current (−).
Unless specifically noted, TA = 25 °C, VCC = 15 V, COM1 = COM2 = COM.
3.1 Characteristics of Control Parts

Power Supply Operation
:
VCC(ON) VCCx–COM 10.5 11.5 12.5 V
ns
Logic Operation Start VB1B–U,
Voltage VBS(ON) VB2–V, 9.5 10.5 11.5 V
g
VB3–W1
M si
VCC(OFF) VCCx–COM 10.0 11.0 12.0 V
27 De
Logic Operation Stop VB1B–U,
Voltage VBS(OFF) VB2–V, 9.0 10.0 11.0 V
VB3–W1
68 w
VCC1 = VCC2,
ICC VCC pin current in 3-phase — 3.2 4.5 mA
e
IM N operation
Logic Supply Current VB1B–U or VB2–V or
VB3–W1; HINx = 5 V;
IBS — 140 400 μA
, S or
VBx pin current in 1-phase
operation
M df
Input Signal
High Level Input
Threshold Voltage VIH — 2.0 2.5 V
22 de
(HINx, LINx, SD, FO)

Low Level Input
68 n
Threshold Voltage VIL 1.0 1.5 — V

M me
(HINx, LINx, SD, FO)

High Level Input
IIH VIN = 5 V — 230 500 μA
Current (HINx, LINx)
SI m
Low Level Input Current

IIL VIN = 0 V — — 2 μA
(HINx, LINx)
o
Fault Signal Output

ec
FO Pin Voltage at Fault

VFOL VFO = 5 V, RFO = 10 kΩ 0 — 0.5 V
R
Signal Output
FO Pin Voltage in
VFOH VFO = 5 V, RFO = 10 kΩ 4.8 — — V
ot
Normal Operation
Protection
N
OCL Pin Output Voltage

VOCL(L) 0 — 0.5 V
(L)
OCL Pin Output Voltage
VOCL(H) 4.5 — 5.5 V
(H)
Current Limit Reference
VLIM 0.6175 0.6500 0.6825 V
Voltage
OCP Threshold Voltage VTRIP 0.9 1.0 1.1 V
OCP Hold Time tP 20 25 — μs
OCP Blanking Time tBK(OCP) — 2 — μs
Current Limit Blanking
tBK(OCL) — 2 — μs
Time

SIM6800M Series

TSD Operating
TDH 135 150 — °C
Temperature
TSD Releasing
TDL 105 120 — °C
Temperature
3.2 Bootstrap Diode Characteristics

Bootstrap Diode Leakage
:
ILBD VR = 500 V — — 10 μA
ns
Current
Bootstrap Diode Forward
VFB IFB = 0.15 A — 1.0 1.3 V
g
Voltage
Bootstrap Diode Series
M si
RBOOT 45 60 75 Ω
Resistor
27 De
3.3 Thermal Resistance Characteristics
68 w
e
IM NRJ-C
All power MOSFETs
— — 3.6 °C/W SIM681xM
operating
, S or
Junction-to-Case Thermal R(J- SIM682xM
All IGBTs operating — — 3.6 °C/W
Resistance( 1) C)Q
(2)
SIM6880M
M df
All freewheeling diodes SIM682xM

R(J-C)F(3) — — 4.2 °C/W
operating SIM6880M
All power MOSFETs
22 de
RJ-A — — 25 °C/W SIM681xM

operating
Junction-to-Ambient SIM682xM
R(J-A)Q All IGBTs operating — — 25 °C/W
68 n
Thermal Resistance SIM6880M

M me
All freewheeling diodes SIM682xM

R(J-A)F — — 29 °C/W
operating SIM6880M
SI m
(1)
Refers to a case temperature at the measurement point described in Figure 3-1, below.
o
(2)
Refers to steady-state thermal resistance between the junction of the built-in transistors and the case. For transient
ec
thermal characteristics, see Section 15.1.

(3)
Refers to steady-state thermal resistance between the junction of the built-in freewheeling diodes and the case.
R
ot
N

SIM6800M Series
Measurement point
40 21
:
ns
5 mm
g
M si
27 De
68 w
1 20
e
IM N
Figure 3-1. Case Temperature Measurement Point
, S or
3.4 Transistor Characteristics

M df
Figure 3-2 provides the definitions of switching characteristics described in this and the following sections.
22 de
HINx/
68 n
LINx
M me
0
trr
toff
ton
td(off) tf
SI m
td(on) tr
ID / IC
90%
o
ec
10%
0
R
VDS /
VCE
ot
N
Figure 3-2. Switching Characteristics Definitions

SIM6800M Series
3.4.1 SIM6811M
Parameter Symbol Conditions Min. Typ. Max. Unit
Drain-to-Source Leakage Current IDSS VDS = 500 V, VIN = 0 V — — 100 µA
Drain-to-Source On Resistance RDS(ON) ID = 1.0 A, VIN = 5 V — 3.2 4.0 Ω
Source-to-Drain Diode Forward
VSD ISD =1.0 A, VIN = 0 V — 1.0 1.5 V
Voltage
High-side Switching
Source-to-Drain Diode Reverse
trr — 150 — ns
Recovery Time
VDC = 300 V, IC = 1.0 A,
:
Turn-on Delay Time td(on) — 770 — ns
ns
inductive load,
Rise Time tr VIN = 0→5 V or 5→0 V, — 70 — ns
g
Turn-off Delay Time td(off) TJ = 25 °C — 690 — ns
M si
Fall Time tf — 30 — ns
27 De
Low-side Switching
trr — 150 — ns
Recovery Time
68 w
Turn-on Delay Time td(on) VDC = 300 V, IC = 1.0 A, — 690 — ns
inductive load,
Rise Time
e tr VIN = 0→5 V or 5→0 V, — 90 — ns
IM N TJ = 25 °C
Turn-off Delay Time td(off) — 650 — ns
, S or
M df
3.4.2 SIM6812M
22 de

68 n
Drain-to-Source Leakage Current ICES VDS = 500 V, VIN = 0 V — — 100 µA

M me
Drain-to-Source On Resistance VCE(SAT) ID = 1.25 A, VIN = 5 V — 2.0 2.4 Ω

VF ISD =1.25 A, VIN = 0 V — 1.0 1.5 V
Voltage
SI m
High-side Switching
o

ec
trr — 140 — ns
Recovery Time
R
inductive load,
ot

N
Low-side Switching
trr — 155 — ns
Recovery Time
inductive load,

SIM6800M Series
3.4.3 SIM6813M
Drain-to-Source Leakage Current IDSS VDS = 500 V, VIN = 0 V — — 100 µA
Drain-to-Source On Resistance RDS(ON) ID = 1.5 A, VIN = 5 V — 1.4 1.7 Ω
VSD ISD =1.5 A, VIN = 0 V — 1.0 1.5 V
Voltage
High-side Switching
trr — 170 — ns
Recovery Time
:
VDC = 300 V, IC = 1.5 A,
ns
Turn-on Delay Time td(on) — 820 — ns
inductive load,
g
M si
27 De
Low-side Switching
68 w
trr — 180 — ns
Recovery Time
VDC = 300 V, IC = 1.5 A,
e
Turn-on Delay Time IM N td(on) — 760 — ns
inductive load,
TJ = 25 °C
, S or
Turn-off Delay Time td(off) — 750 — ns
M df
22 de
3.4.4 SIM6880M
68 n

M me
Collector-to-Emitter Leakage
ICES VCE = 600 V, VIN = 0 V — — 1 mA
Current
Collector-to-Emitter Saturation
VCE(SAT) IC = 3.0 A, VIN = 5 V — 1.85 2.30 V
SI m
Voltage
Diode Forward Voltage VF IF = 3.0 A, VIN = 0 V — 2.0 2.4 V
o
ec
High-side Switching
Diode Reverse Recovery Time trr — 100 — ns
R

ot
inductive load,
Rise Time tr — 120 — ns
VIN = 0→5 V or 5→0 V,
N

Low-side Switching
inductive load,
VIN = 0→5 V or 5→0 V,

SIM6800M Series
3.4.5 SIM6822M
ICES VCE = 600 V, VIN = 0 V — — 1 mA
Current
VCE(SAT) IC = 5 A, VIN = 5 V — 1.75 2.2 V
Voltage
Diode Forward Voltage VF IF = 5 A, VIN = 0 V — 2.0 2.4 V
High-side Switching
:
ns
Turn-on Delay Time td(on) VDC = 300 V, IC = 5 A, — 740 — ns
inductive load,
VIN = 0→5 V or 5→0 V,
g
M si
27 De
Low-side Switching
68 w
e inductive load,
Rise Time
IM N tr
VIN = 0→5 V or 5→0 V,
— 100 — ns
, S or

M df
3.4.6 SIM6827M
22 de

68 n
ICES VCE = 600 V, VIN = 0 V — — 1 mA
M me
Current
VCE(SAT) IC = 5 A, VIN = 5 V — 1.75 2.2 V
Voltage
SI m
Diode Forward Voltage VF IF = 5 A, VIN = 0 V — 2.0 2.4 V

o
High-side Switching
ec

R

inductive load,
ot
VIN = 0→5 V or 5→0 V,

N

Low-side Switching
inductive load,
VIN = 0→5 V or 5→0 V,

SIM6800M Series
4. Mechanical Characteristics
Parameter Conditions Min. Typ. Max. Unit Remarks
Heatsink Mounting
* 0.294 — 0.441 N∙m
Screw Torque
Flatness of Heatsink
See Figure 4-1. 0 — 60 μm
Attachment Area
Package Weight — 5.2 — g
* When mounting a heatsink, it is recommended to use a metric screw of M2.5 and a plain washer of 6.0 mm (φ)
together at each end of it. For more details about screw tightening, see Section 13.2.
:
g ns
M si
Heatsink
27 De
Measurement position
68 we
IM N
-+
, S or
M df
-
+
22 de
Heasink
68 n
Figure 4-1. Flatness Measurement Position

M me
SI m
5. Insulation Distance
o
Parameter Conditions Min. Typ. Max. Unit Remarks

ec
Clearance Between heatsink* and 1.5 — 2.1 mm

R
Creepage leads. See Figure 5-1. 1.7 — — mm

* Refers to when a heatsink to be mounted is flat. If your application requires a clearance exceeding the maximum
ot
distance given above, use an alternative (e.g., a convex heatsink) that will meet the target requirement.
N
Creepage
Clearance
Heatsink
Figure 5-1. Insulation Distance Definitions

SIM6800M Series
6. Truth Table
Table 6-1 is a truth table that provides the logic level definitions of operation modes.
In the case where HINx and LINx signals in each phase are high at the same time, both the high- and low-side
transistors become on (simultaneous on-state). Therefore, HINx and LINx signals, the input signals for the HINx and
LINx pins, require dead time setting so that such a simultaneous on-state event can be avoided.
After the IC recovers from a UVLO_VCC condition, the low-side transistors resume switching in accordance with
the input logic levels of the LINx signals (level-triggered), whereas the high-side transistors resume switching at the
next rising edge of an HINx signal (edge-triggered).
After the IC recovers from a UVLO_VB condition, the high-side transistors resume switching at the next rising edge
of an HINx signal (edge-triggered).
:
ns
Table 6-1. Truth Table for Operation Modes
Mode HINx LINx High-side Transistor Low-side Transistor
g
M si
L L OFF OFF
H L ON OFF
27 De
Normal Operation
L H OFF ON
H H ON ON
68 w
L L OFF OFF
e
External Shutdown Signal Input
IM N H L ON OFF
FO = Low Level L H OFF OFF
H H ON OFF
, S or
L L OFF OFF
Undervoltage Lockout for
M df
H L OFF OFF
High-side Power Supply
(UVLO_VB) L H OFF ON
22 de
H H OFF ON
L L OFF OFF
68 n
Undervoltage Lockout for H L OFF OFF

Low-side Power Supply
M me
(UVLO_VCC) L H OFF OFF

H H OFF OFF
SI m
L L OFF OFF
H L ON OFF
o
Overcurrent Protection (OCP)

L H OFF OFF
ec
H H ON OFF
R
L L OFF OFF
Overcurrent Limit (OCL) H L OFF OFF
ot
(OCL = SD) L H OFF ON

N
H H OFF ON
L L OFF OFF
H L ON OFF
Thermal Shutdown (TSD)
L H OFF OFF
H H ON OFF

SIM6800M Series
7. Block Diagrams
VB1B
30
21 VB1A
20 VB2
23 VB3
VCC1 17 UVLO UVLO UVLO UVLO 28 VBB
HIN3 15
HIN2 14 Input
Logic High Side
:
HIN1 13 24 W1
Level Shift Driver
ns
SD 12 19 V
COM1 16 26 V1
g
31 U
M si
OCL 10 35 V2
LIN3 9 37 W2
27 De
Input Logic
LIN2 8 Low
(OCP reset)
LIN1 7 Side
Driver 11 LS1
68 w
COM2 6
33 LS2
e
VCC2 5 UVLO
IM N 2 LS2
FO 4 Thermal 40 LS3B
Shutdown 1 LS3A
, S or
OCP 3 OCP and OCL

M df
Figure 7-1. SIM681xM

22 de
VB1B
68 n
30
M me
21 VB1A
20 VB2
23 VB3
SI m
VCC1 17 UVLO UVLO UVLO UVLO 28 VBB

o
HIN3 15
ec
HIN2 14 Input
Logic High Side
HIN1 13 24 W1
R
Level Shift Driver

SD 12 19 V
COM1 16 26 V1
ot
31 U
OCL 10 35 V2
N
LIN3 9 37 W2
Input Logic
LIN2 8 Low
(OCP reset)
LIN1 7 Side
Driver 11 LS1
COM2 6
33 LS2
VCC2 5 UVLO 2 LS2
FO 4 Thermal 40 LS3B
Shutdown 1 LS3A
OCP 3 OCP and OCL
Figure 7-2. SIM682xM or SIM688xM

SIM6800M Series
8. Pin Configuration Definitions

Top view
40
40 21
1
21
1 20
20
Pin Number Pin Name Description
1 LS3A W-phase IGBT emitter, or power MOSFET source
:
2 LS2 V-phase IGBT emitter, or power MOSFET source
ns
3 OCP Overcurrent protection signal input
4 FO Fault signal output and shutdown signal input
g
5 VCC2 Low-side logic supply voltage input
M si
6 COM2 Low-side logic ground
27 De
7 LIN1 Logic input for U-phase low-side gate driver
8 LIN2 Logic input for V-phase low-side gate driver
9 LIN3 Logic input for W-phase low-side gate driver
68 w
10 OCL Overcurrent limit signal input
e
11 LS1 IM N U-phase IGBT emitter, or power MOSFET source
12 SD High-side shutdown signal input
13 HIN1 Logic input for U-phase high-side gate driver
, S or
14 HIN2 Logic input for V-phase high-side gate driver
15 HIN3 Logic input for W-phase high-side gate driver
M df
16 COM1 High-side logic ground

17 VCC1 High-side logic supply voltage input
22 de
18 — (Pin removed)
19 V Bootstrap capacitor connection for V-phase
68 n
20 VB2 V-phase high-side floating supply voltage input

M me
21 VB1A U-phase high-side floating supply voltage input

SI m
23 VB3 W-phase high-side floating supply voltage input

24 W1 W-phase output (connected to W2 externally)
o
25 NC (No connection)
ec
26 V1 V-phase output (connected to V2 externally)

R
28 VBB Positive DC bus supply voltage

ot
30 VB1B U-phase high-side floating supply voltage input

N
31 U U-phase output
33 LS2 (Pin trimmed) V-phase IGBT emitter, or power MOSFET source
35 V2 V-phase output (connected to V1 externally)
37 W2 W-phase output (connected to W1 externally)
40 LS3B W-phase IGBT emitter, or power MOSFET source

SIM6800M Series
9. Typical Applications
CR filters and Zener diodes should be added to your application as needed. This is to protect each pin against surge
voltages causing malfunctions, and to avoid the IC being used under the conditions exceeding the absolute maximum
ratings where critical damage is inevitable. Then, check all the pins thoroughly under actual operating conditions to
ensure that your application works flawlessly.
VB2 20
CBOOT2
V 19
VCC 21 VB1A
VCC1 17 23 VB3
:
ns
CBOOT3
COM1
GND 16 24 W1
HIN3
HIN3 15
26 V1
g
HIN2
HIN2 14
VDC
M si
HIN1
HIN1 13
SD 28 VBB
Controller
12
27 De
LS1 11 VB1B
OCL 10 30
MIC
LIN3
LIN3 9
31 U
68 w
LIN2 M
LIN2 8 CBOOT1
LIN1
LIN1 7 33 LS2
e
5V COM2 6
35 V2
RFO
IM N VCC2 5
FO 4 37 W2
CS CDC
, S or
Fault
OCP 3
CFO LS2 2
M df
RO LS3A 1 40 LS3B
CO RS
22 de
Figure 9-1. SIM681xM Typical Application Using a Single Shunt Resistor

68 n
M me
VB2 20
CBOOT2
V 19
SI m
VCC 21 VB1A
o
VCC1 17 23 VB3
ec
CBOOT3
COM1
GND 16 24 W1
HIN3 15
R
HIN3
HIN2 26 V1
HIN2 14
HIN1 VDC
HIN1 13
28 VBB
ot
SD
Controller
12
LS1 11 VB1B
N
OCL 10 30
MIC
LIN3
LIN3 9
LIN2 31 U M
LIN2 8 CBOOT1
LIN1
LIN1 7 33 LS2
5V COM2 6
VCC2 35 V2
RFO 5
FO 4 37 W2
CS CDC
Fault
OCP 3
CO1 RO1 LS2 2
CFO RO2 LS3A 1 40 LS3B
CO2
CO3 RO3
RS1 RS2 RS3
Figure 9-2. SIM681xM Typical Application Using Three Shunt Resistors

SIM6800M Series
10. Physical Dimensions
● DIP40 Package
-0.05
+0.1
+0.4
7.6
8.35 ±0.3
-0.3
1.15 max.
0.42
1.8 ±0.3
2-R1.5
7.4 ±0.15
40 21
:
ns 17.4±0.5
14.8 ±0.3
14.0 ±0.2
Top view
g
Pin 1 indicator
M si
φ3.2±0.2
1
27 De
20
8.35 ±0.3
Gate burr
1.8 ±0.1
68 we
36 ±0.3
4 ±0.2
IM N
, S or
M df
16.7
+0.1
0.52 -0.05
22 de
1.778 ±0.25
68 n
33.782±0.3
M me
(Ends of pins)
NOTES: 1.7 min

.
SI m
- Dimensions in millimeters
- Bare lead frame: Pb-free (RoHS compliant)
o
- The leads illustrated above are for reference only, and may not be actual states of
ec
being bent.
- Maximum gate burr height is 0.3 mm.
R
● Reference Through Hole Size and Layout

ot
40 21
N
φ1.1 typ.
33.7
17.4 typ.
0.04
8.7
Center of screw hole
1 20
Pin pich: 1.778
33.782
Unit: mm

SIM6800M Series
11. Marking Diagram
40 21
SIM68xxM Part Number
YMDDX
:
ns
1 20
g
M si
Lot Number:
27 De
Y is the last digit of the year of manufacture (0 to 9)
M is the month of the year (1 to 9, O, N, or D)
DD is the day of the month (01 to 31)
68 w
X is the control number
e
IM N
, S or
M df
22 de
68 n
M me
SI mo
ec
R
ot
N

SIM6800M Series
12. Functional Descriptions 12.2.2 VB1A, VB1B, VB2, and VB3

Unless specifically noted, this section uses the These pins are connected to bootstrap capacitors for
following definitions: the high-side floating supply.
In actual applications, use either of the VB1A or
● All the characteristic values given in this section are
VB1B pin because they are internally connected.
typical values.
Voltages across the VBx and these output pins should be
● All the circuit diagrams listed in this section represent
maintained within the recommended range (i.e., the
the type of IC that incorporates power MOSFETs. All
Logic Supply Voltage, VBS) given in Section 2.
the functional descriptions in this section are also
A bootstrap capacitor, CBOOTx, should be connected in
applicable to the type of IC that incorporates IGBTs.
each of the traces between the VB1A (VB1B) and U
● For pin and peripheral component descriptions, this
pins, the VB2 and V pins, the VB3 and W1 (W2) pins.
:
section employs a notation system that denotes a pin
For proper startup, turn on the low-side transistor first,
ns
name with the arbitrary letter “x”, depending on
then fully charge the bootstrap capacitor, CBOOTx.
context. Thus, “the VCCx pin” is used when referring
For the capacitance of the bootstrap capacitors,
g
to either or both of the VCC1 and VCC2 pins.
CBOOTx, choose the values that satisfy Equations (1) and
● The COM1 pin is always connected to the COM2 pin.
M si
(2). Note that capacitance tolerance and DC bias
27 De
characteristics must be taken into account when you
choose appropriate values for CBOOTx.
12.1 Turning On and Off the IC
CBOOTx (µF) > 800 × t L(OFF)
68 w
The procedures listed below provide recommended (1)
startup and shutdown sequences. To turn on the IC
e
properly, do not apply any voltage on the VBB, HINx,
IM N
and LINx pins until the VCCx pin voltage has reached a 1 µF ≤ CBOOTx ≤ 220 µF (2)
stable state (VCC(ON) ≥ 12.5 V).
, S or
It is required to fully charge bootstrap capacitors, In Equation (1), let tL(OFF) be the maximum off-time of
CBOOTx, at startup (see Section 12.2.2). the low-side transistor (i.e., the non-charging time of
M df
To turn off the IC, set the HINx and LINx pins to CBOOTx), measured in seconds.
logic low (or “L”), and then decrease the VCCx pin
voltage. Even while the high-side transistor is off, voltage
22 de
across the bootstrap capacitor keeps decreasing due to

power dissipation in the IC. When the VBx pin voltage
68 n
12.2 Pin Descriptions decreases to VBS(OFF) or less, the high-side undervoltage

M me
lockout (UVLO_VB) starts operating (see Section

12.3.3.1). Therefore, actual board checking should be
done thoroughly to validate that voltage across the VBx
SI m
12.2.1 U, V, V1, V2, W1, and W2 pin maintains over 11.0 V (VBS > VBS(OFF)) during a low-
These pins are the outputs of the three phases, and frequency operation such as a startup period.
o
serve as the connection terminals to the 3-phase motor. As Figure 12-1 shows, a bootstrap diode, DBOOTx, and
ec
The V1 and W1 pins must be connected to the V2 and a current-limiting resistor, RBOOTx, are internally placed
W2 pins on a PCB, respectively. in series between the VCC1 and VBx pins.
R
The U, V (V1) and W1 pins are the grounds for the Time constant for the charging time of CBOOTx, τ, can
VB1A (VB1B), VB2, and VB3 pins. be computed by Equation (3):
ot
The U, V and W1 pins are connected to the negative

nodes of bootstrap capacitors, CBOOTx. The V pin is τ = CBOOTx × R BOOTx , (3)
N
internally connected to the V1 pin.

Since high voltages are applied to these output pins where CBOOTx is the optimized capacitance of the
(U, V, V1, V2, W1, and W2), it is required to take bootstrap capacitor, and RBOOTx is the resistance of the
measures for insulating as follows: current-limiting resistor (60 Ω ± 25%).
● Keep enough distance between the output pins and
low-voltage traces.
● Coat the output pins with insulating resin.

SIM6800M Series
DBOOT1 RBOOT1 VB1B HINx

30
CBOOT1
DBOOT2 RBOOT2
VB2
0
20
CBOOT2
Set
DBOOT3 RBOOT3 VB3
23 0
17 VBB
28
Reset
VCC1 CBOOT3
HO3
5 HO2 0
VDC
VCC2
HO1
VCC 31 VBx–HSx VBS(ON) VBS(OFF)
MIC U
19
V
:
16 26 M 0
Stays logic high
ns
COM1 V1
6 Q
COM2 37
W2
0
g
24
W1
M si
Figure 12-1. Bootstrap Circuit Figure 12-3. Waveforms at VBx–HSx Voltage Drop
27 De
Figure 12-2 shows an internal level-shifting circuit. A
high-side output signal, HOx, is generated according to 12.2.3 VCC1 and VCC2
68 w
an input signal on the HINx pin. When an input signal
on the HINx pin transits from low to high (rising edge), These are the power supply pins for the built-in
e
a “Set” signal is generated. When the HINx input signal
IM N control IC. The VCC1 and VCC2 pins must be
transits from high to low (falling edge), a “Reset” signal externally connected on a PCB because they are not
is generated. These two signals are then transmitted to internally connected. To prevent malfunction induced by
, S or
the high-side by the level-shifting circuit and are input to supply ripples or other factors, put a 0.01 μF to 0.1 μF
the SR flip-flop circuit. Finally, the SR flip-flop circuit ceramic capacitor, CVCC, near these pins. To prevent
M df
feeds an output signal, Q (i.e., HOx). damage caused by surge voltages, put an 18 V to 20 V
Figure 12-3 is a timing diagram describing how noise Zener diode, DZ, between the VCCx and COMx pins.
or other detrimental effects will improperly influence the Voltages to be applied between the VCCx and COMx
22 de
level-shifting process. When a noise-induced rapid pins should be regulated within the recommended
voltage drop between the VBx and output pins (U, V, or operational range of VCC, given in Section 2.
68 n
W1; hereafter “VBx–HSx”) occurs after the Set signal

M me
generation, the next Reset signal cannot be sent to the

SR flip-flop circuit. And the state of an HOx signal stays
logic high (or “H”) because the SR flip-flop does not 17
SI m
VCC1
respond. With the HOx state being held high (i.e., the
high-side transistor is in an on-state), the next LINx 5
o
VCC2 MIC
signal turns on the low-side transistor and causes a VCC
ec
simultaneously-on condition, which may result in CVCC

critical damage to the IC. To protect the VBx pin against DZ
R
such a noise effect, add a bootstrap capacitor, CBOOTx, in 16

COM1
each phase. CBOOTx must be placed near the IC, and be 6
ot
COM2
connected between the VBx and HSx pins with a
minimal length of traces. To use an electrolytic capacitor,
N
add a 0.01 μF to 0.1 μF bypass capacitor, CPx, in parallel Figure 12-4. VCCx Pin Peripheral Circuit
near these pins used for the same phase.
U1 VBx 12.2.4 COM1 and COM2

These are the logic ground pins for the built-in control
S Q HOx
IC. The COM1 and COM2 pins should be connected
R
Set externally on a PCB because they are not internally
Input Pulse
HINx
logic generator Reset
HSx connected. Varying electric potential of the logic ground
can be a cause of improper operations. Therefore,
COM1
16 connect the logic ground as close and short as possible
to shunt resistors, RSx, at a single-point ground (or star
Figure 12-2. Internal Level-shifting Circuit ground) which is separated from the power ground (see
Figure 12-5).

SIM6800M Series
slightly lower than the output voltage of the

U1
VDC
microcontroller.
VBB 28
CS Table 12-1. Input Signals for HINx and LINx Pins
CDC
Parameter High Level Signal Low Level Signal
RS1 Input
16 COM1 LS1 11 3 V < VIN < 5.5 V 0 V < VIN < 0.5 V
RS2 Voltage
LS2 2
6 COM2 RS3 Input
LS3A 1 Pulse ≥0.5 μs ≥0.5 μs
Width
:
Create a single-point
PWM
OCP
ns
ground (a star ground) Carrier ≤20 kHz
near RSx, but keep it Frequency
g
Connect the COM1 separated from the Dead
and COM2 pins on power ground. ≥1.5 μs
M si
a PCB.
Time
27 De
Figure 12-5. Connections to Logic Ground
U1 5V
68 w
2 kΩ 2 kΩ
HINx
12.2.5 HIN1, HIN2, and HIN3; (LINx)
LIN1, LIN2, and LIN3
e
IM N 20 kΩ
These are the input pins of the internal motor drivers COM1
, S or
for each phase. The HINx pin acts as a high-side (COM2)
controller; the LINx pin acts as a low-side controller.
M df
Figure 12-6 shows an internal circuit diagram of the

HINx or LINx pin. This is a CMOS Schmitt trigger Figure 12-6. Internal Circuit Diagram of HINx or
circuit with a built-in 20 kΩ pull-down resistor, and its LINx Pin
22 de
input logic is active high.

Input signals across the HINx–COMx and the LINx–
68 n
COMx pins in each phase should be set within the U1

RIN1x
M me
ranges provided in Table 12-1, below. Note that dead Input

time setting must be done for HINx and LINx signals signal HINx/
LINx
because the IC does not have a dead time generator. RIN2x
SI m
The higher PWM carrier frequency rises, the more CINx

switching loss increases. Hence, the PWM carrier
o
Controller SIM68xxM
frequency must be set so that operational case
ec
temperatures and junction temperatures have sufficient

margins against the absolute maximum ranges, specified Figure 12-7. Filter Circuit for HINx or LINx Pin
R
in Section 1.
If the signals from the microcontroller become
ot
unstable, the IC may result in malfunctions. To avoid 12.2.6 VBB

this event, the outputs from the microcontroller output
N
line should not be high impedance. This is the input pin for the main supply voltage, i.e.,
Also, if the traces from the microcontroller to the the positive DC bus. All of the IGBT collectors (power
HINx or LINx pin (or both) are too long, the traces may MOSFET drains) of the high-side are connected to this
be interfered by noise. Therefore, it is recommended to pin. Voltages between the VBB and COMx pins should
add an additional filter or a pull-down resistor near the be set within the recommended range of the main supply
HINx or LINx pin as needed (see Figure 12-7). voltage, VDC, given in Section 2.
Here are filter circuit constants for reference: To suppress surge voltages, put a 0.01 μF to 0.1 μF
- RIN1x: 33 Ω to 100 Ω bypass capacitor, CS, near the VBB pin and an
- RINx: 1 kΩ to 10 kΩ electrolytic capacitor, CDC, with a minimal length of
- CINx: 100 pF to 1000 pF PCB traces to the VBB pin.
Care should be taken when adding RIN1x and RIN2x to

the traces. When they are connected to each other, the
input voltage of the HINx and LINx pins becomes

SIM6800M Series
12.2.7 LS1, LS2, LS3A, and LS3B ● Overcurrent Pprotection (OCP)

This function detects inrush currents larger than those
These are the emitter (source) pins of the low-side detected by the OCL. When the OCP pin voltage
IGBTs (power MOSFETs). For current detection, the exceeds the OCP Threshold Voltage, VTRIP, the IC
LS1, LS2, and LS3 (LS3B) pins should be connected operates as follows: the OCL pin = logic high, the low-
externally on a PCB via shunt resistors, RSx, to the side transistors = off, the FO pin = logic low.
COMx pin. In actual applications, use either of the In addition, if the OCL pin is connected to the SD pin,
LS3A or LS3B pin because they are internally connected. the high-side transistors can be turned off. For a more
When connecting a shunt resistor, place it as near as detailed OCP description, see Section 12.3.5.
possible to the IC with a minimum length of traces to the
LSx and COMx pins. Otherwise, malfunction may occur
because a longer circuit trace increases its inductance
12.2.9 SD
:
and thus increases its susceptibility to improper
ns
operations. In applications where long PCB traces are When a 5 V or 3.3 V signal is input to the SD pin, the
required, add a fast recovery diode, DRSx, between the high-side transistors turn off independently of any HINx
g
LSx and COMx pins in order to prevent the IC from signals. This is because the SD pin does not respond to a
M si
malfunctioning. pulse shorter than an internal filter of 3.3 μs (typ.).
27 De
The SD-OCL pin connection, as described in Section
U1 12.2.8, allows the IC to turn off the high-side transistors
VBB 28 VDC at OCL or OCP activation. Also, inputting the inverted
CS
68 w
signal of the FO pin to the SD pin permits all the high-
DRS1 and low-side transistors to turn off, when the IC detects
e
IM N RS1 CDC an abnormal condition (i.e., some or all of the
LS1 11
DRS2 protections such as TSD, OCP, and UVLO are activated).
RS2
, S or
16 COM1 LS2 2
DRS3
RS3 12.2.10 FO
M df
6 COM2 LS3A 1
This pin operates as the fault signal output and the
low-side shutdown signal input. Sections 12.3.1 and
22 de
12.3.2 explain the two functions in detail, respectively.

Put a shunt resistor near
Add a fast recovery
the IC with a minimum
Figure 12-9 illustrates an internal circuit diagram of the
68 n
diode to a long trace. FO pin and its peripheral circuit.

length to the LSx pin.
M me
Figure 12-8. Connections to LSx Pin VFO

U1 5V
RFO
SI m
1 MΩ 3.0 µs (typ.)
FO 2 kΩ
Blanking
12.2.8 OCP and OCL INT filter
o
50 Ω
ec
The OCP pin serves as the input for the overcurrent CFO Output SW turn-off
QFO and QFO turn-on
protections which monitor the currents going through
R
the output transistors. COM

In normal operation, the OCL pin logic level is low.
ot
In case one or more of the protections listed below are

activated by an OCP input signal, the OCL pin logic Figure 12-9. Internal Circuit Diagram of FO Pin and
N
level becomes high. If the OCL pin is connected to the Its Peripheral Circuit
SD pin so that the SD pin will respond to the OCL input
signal, the high-side transistors can be turned off when
Because of its open-collector nature, the FO pin
the protections (OCP and OCL) are activated.
should be tied by a pull-up resistor, RFO, to the external
power supply. The external power supply voltage (i.e.,
● Overcurrent Limit (OCL) the FO Pin Pull-up Voltage, VFO) should range from 3.0
When the OCP pin voltage exceeds the Current Limit V to 5.5 V. When the pull-up resistor, RFO, has a too
Reference Voltage, VLIM, the OCL pin logic level small resistance, the FO pin voltage at fault signal output
becomes high. While the OCL is in working, the output becomes high due to the saturation voltage drop of a
transistors operate according to an input signal (HINx or built-in transistor, QFO. Therefore, it is recommended to
LINx). If the OCL pin is connected to the SD pin, the use a 3.3 kΩ to 10 kΩ pull-up resistor. To suppress noise,
high-side transistors can be turned off. For a more add a filter capacitor, CFO, near the IC with minimizing a
detailed OCL description, see Section 12.3.4. trace length between the FO and COMx pins.

SIM6800M Series
To avoid the repetition of OCP activations, the Table 12-2. Shutdown Signals
external microcontroller must shut off any input signals
to the IC within an OCP hold time, tP, which occurs after Parameter High Level Signal Low Level Signal
the internal transistor (QFO) turn-on. tP is 15 μs where Input Voltage 3 V < VIN < 5.5 V 0 V < VIN < 0.5 V
minimum values of thermal characteristics are taken into
Input Pulse
account. (For more details, see Section 12.3.5.) Our — ≥6 μs
recommendation is to use a 0.001 μF to 0.01 μF filter Width
capacitor.
12.3.3 Undervoltage Lockout for

12.3 Protection Functions Power Supply (UVLO)
:
This section describes the various protection circuits In case the gate-driving voltages of the output
ns
provided in the SIM6800M series. The protection transistors decrease, their steady-state power dissipations
circuits include the undervoltage lockout for power increase. This overheating condition may cause
g
supplies (UVLO), the overcurrent protection (OCP), and permanent damage to the IC in the worst case. To
M si
the thermal shutdown (TSD). In case one or more of prevent this event, the SIM6800M series has the
27 De
these protection circuits are activated, the FO pin undervoltage lockout (UVLO) circuits for both of the
outputs a fault signal; as a result, the external high- and low-side power supplies in the monolithic IC
microcontroller can stop the operations of the three (MIC).
68 w
phases by receiving the fault signal. The external
microcontroller can also shut down IC operations by
e 12.3.3.1. Undervoltage Lockout for

inputting a fault signal to the FO pin.
IM N
In the following functional descriptions, “HOx” High-side Power Supply
denotes a gate input signal on the high-side transistor,
(UVLO_VB)
, S or
whereas “LOx” denotes a gate input signal on the low-
side transistor.. Figure 12-10 shows operational waveforms of the
M df
undervoltage lockout for high-side power supply (i.e.,

UVLO_VB).
12.3.1 Fault Signal Output
22 de
In case one or more of the following protections are HINx

68 n
actuated, an internal transistor, QFO, turns on, then the 0

FO pin becomes logic low (≤0.5 V).
M me
LINx
1) Low-side undervoltage lockout (UVLO_VCC)
0
2) Overcurrent protection (OCP)
SI m
UVLO_VB
VBx-HSx operation
3) Thermal shutdown (TSD)
VBS(ON)
o
VBS(OFF)
While the FO pin is in the low state, all the low-side
ec
transistors turn off. In normal operation, the FO pin UVLO release

0
outputs a high signal of 5 V. The fault signal output time HOx restarts at
R
positive edge after

of the FO pin at OCP activation is the OCP hold time About 3 µs UVLO_VB release.
(tP) of 25 μs (typ.), fixed by a built-in feature of the IC
HOx
ot
itself (see Section 12.3.5). The external microcontroller

0
receives the fault signals with its interrupt pin (INT), and
N
must be programmed to put the HINx and LINx pins to LOx
logic low within the predetermined OCP hold time, tP. 0
FO No FO output at
UVLO_VB.
12.3.2 Shutdown Signal Input 0
The FO pin also acts as the input pin of shutdown

signals. When the FO pin becomes logic low, all the Figure 12-10. UVLO_VB Operational Waveforms
low-side transistors turn off.
The voltages and pulse widths of the shutdown signals
to be applied between the FO and COMx pins are listed When the voltage between the VBx and output pins
in Table 12-2. (VBx–HSx shown in Figure 12-10) decreases to the
Logic Operation Stop Voltage (VBS(OFF), 10.0 V) or less,
the UVLO_VB circuit in the corresponding phase gets

SIM6800M Series
activated and sets an HOx signal to logic low. When the 12.3.4 Overcurrent Limit (OCL)
voltage between the VBx and HSx pins increases to the
Logic Operation Start Voltage (VBS(ON), 10.5 V) or more, The overcurrent limit (OCL) is a protection against
the IC releases the UVLO_VB operation. Then, the HOx relatively low overcurrent conditions. Figure 12-12
signal becomes logic high at the rising edge of the first shows an internal circuit of the OCP and OCL pins;
input command after the UVLO_VB release. Any fault Figure 12-13 shows OCL operational waveforms.
signals are not output from the FO pin during the When the OCP pin voltage increases to the Current
UVLO_VB operation. In addition, the VBx pin has an Limit Reference Voltage (VLIM, 0.6500 V) or more, and
internal UVLO_VB filter of about 3 μs, in order to remains in this condition for a period of the Current
prevent noise-induced malfunctions. Limit Blanking Time (tBK(OCP), 2 μs) or longer, the OCL
circuit is activated. Then, the OCL pin goes logic high.
During the OCL operation, the gate logic levels of the
:
low-side transistors respond to an input command on the
ns
12.3.3.2. Undervoltage Lockout for LINx pin. To turn off the high-side transistors during the
Low-side Power Supply OCL operation, connect the OCL and SD pins on a PCB.
g
(UVLO_VCC) The SD pin has an internal filter of about 3.3 μs (typ.).
M si
When the OCP pin voltage falls below VLIM (0.6500
Figure 12-11 shows operational waveforms of the
27 De
V), the OCL pin logic level becomes low. After the OCL
undervoltage lockout for low-side power supply (i.e.,
pin logic has become low, the high-side transistors
UVLO_VCC).
remain turned off until the first low-to-high transition on
When the VCC2 pin voltage decreases to the Logic
an HINx input signal occurs (i.e., edge-triggered).
68 w
Operation Stop Voltage (VCC(OFF), 11.0 V) or less, the
UVLO_VCC circuit in the corresponding phase gets
e
activated and sets both of HOx and LOx signals to logic U1
IM N
low. When the VCC2 pin voltage increases to the Logic
0.65 V
Filter
2 kΩ 10
OCL
Operation Start Voltage (VCC(ON), 11.5 V) or more, the
, S or
3 2 kΩ
IC releases the UVLO_VCC operation. Then, the IC OCP
200 kΩ
resumes the following transmissions: an LOx signal
M df
200 kΩ
according to an LINx pin input command; an HOx 6
signal according to the rising edge of the first HINx pin COM2
22 de
input command after the UVLO_VCC release. During

the UVLO_VCC operation, the FO pin becomes logic
low and sends fault signals. In addition, the VCC2 pin Figure 12-12. Internal Circuit of OCP and OCL Pins
68 n
has an internal UVLO_VCC filter of about 3 μs, in order

M me
to prevent noise-induced malfunctions.

HINx
SI m
HINx 0
LINx
o
0
ec
LINx 0
OCP
R
0
UVLO_VCC VLIM
operation
ot
VCC2
VCC(ON) 0
VCC(OFF)
N
OCL tBK(OCP)
0 (SD)
HOx 0
HOx restarts at
3.3 µs (typ.) positive edge after
0 OCL release.
HOx
About 3 µs LOx responds to input signal.
LOx 0
0 LOx
0
FO
0
Figure 12-13. OCL Operational Waveforms
(OCL = SD)
Figure 12-11. UVLO_VCC Operational Waveforms

SIM6800M Series
12.3.5 Overcurrent Protection (OCP) are shorted to ground (ground fault). In case any of these
pins falls into a state of ground fault, the output
The overcurrent protection (OCP) is a protection transistors may be destroyed.
against large inrush currents (i.e., high di/dt). Figure
12-14 is an internal circuit diagram describing the OCP U1 VTRIP VBB
pin and its peripheral circuit.
28
The OCP pin detects overcurrents with voltage across OCP 2 kΩ -
+
external shunt resistors, RSx. Because the OCP pin is 3
Blanking
internally pulled down, the OCP pin voltage increases 200 kΩ
filter
proportionally to a rise in the currents running through 1.65 µs (typ.)
the shunt resistors, RSx. CO
Output SW turn-off
Figure 12-15 is a timing chart that represents and QFO turn-on
:
operation waveforms during OCP operation. When the COM2
ns
OCP pin voltage increases to the OCP Threshold 6
Voltage (VTRIP, 1.0 V) or more, and remains in this LSx
g
A/D
condition for a period of the OCP Blanking Time (tBK, 2
M si
μs) or longer, the OCP circuit is activated. The enabled ROx DRSx RSx
27 De
OCP circuit shuts off the low-side transistors and puts COM
the FO pin into a low state. Then, output current
decreases as a result of the output transistors turn-off.
Even if the OCP pin voltage falls below VTRIP, the IC Figure 12-14. Internal Circuit Diagram of OCP Pin
68 w
holds the FO pin in the low state for a fixed OCP hold and Its Peripheral Circuit
e
time (tP) of 25 μs (typ.). Then, the output transistors
IM N
operate according to input signals. HINx
The OCP is used for detecting abnormal conditions,
, S or
such as an output transistor shorted. In case short-circuit 0
conditions occur repeatedly, the output transistors can be LINx

M df
destroyed. To prevent such event, motor operation must 0

be controlled by the external microcontroller so that it
can immediately stop the motor when fault signals are tBK tBK tBK
22 de
OCP
detected.
For proper shunt resistor setting, your application VTRIP
68 n
must meet the following: VLIM

M me
● Use the shunt resistor that has a recommended 0

HOx responds to input signal.
resistance, RSx (see Section 2). HOx
● Set the OCP pin input voltage to vary within the rated
SI m
0
OCP pin voltages, VOCP (see Section 1).
● Keep the current through the output transistors below LOx
o
the rated output current (pulse), IOP (see Section 1).

ec
0
FO restarts
It is required to use a resistor with low internal FO
automatically after tP.
R
inductance because high-frequency switching current tP
will flow through the shunt resistors, RSx. In addition, 0

ot
choose a resistor with allowable power dissipation

according to your application. Figure 12-15. OCP Operational Waveforms
N
When you connect a CR filter (i.e., a pair of a filter

resistor, RO, and a filter capacitor, CO) to the OCP pin,
care should be taken in setting the time constants of RO Table 12-3. Reference Time Constants for CR Filter
and CO. The larger the time constant, the longer the time Time Constant
that the OCP pin voltage rises to VTRIP. And this may Part Number
(µs)
cause permanent damage to the transistors.
SIM681x ≤2
Consequently, a propagation delay of the IC must be
taken into account when you determine the time SIM682x
≤0.2
constants. For RO and CO, their time constants must be SIM688x
set to the values listed in Table 12-3. And place CO as
close as possible to the IC with minimizing a trace
length between the OCP and COMx pins.
Note that overcurrents are undetectable when one or
more of the U, V/V1/V2, and W1/W2 pins or their traces

SIM6800M Series
12.3.6 Thermal Shutdown (TSD) 13. Design Notes

The SIM6800M series incorporates a thermal
shutdown (TSD) circuit. Figure 12-16 shows TSD
operational waveforms. In case of overheating (e.g., 13.1 PCB Pattern Layout
increased power dissipation due to overload, a rise in
ambient temperature at the device, etc.), the IC shuts Figure 13-1 shows a schematic diagram of a motor
down the low-side output transistors. driver circuit. The motor driver circuit consists of
The TSD circuit in the monolithic IC (MIC) monitors current paths having high frequencies and high voltages,
temperatures (see Section 7). When the temperature of which also bring about negative influences on IC
the monolithic IC (MIC) exceeds the TSD Operating operation, noise interference, and power dissipation.
Temperature (TDH, 150 °C), the TSD circuit is activated. Therefore, PCB trace layouts and component placements
:
When the temperature of the monolithic IC (MIC)
ns
play an important role in circuit designing.
decreases to the TSD Releasing Temperature (TDL, Current loops, which have high frequencies and high
120 °C) or less, the shutdown condition is released. The voltages, should be as small and wide as possible, in
g
output transistors then resume operating according to order to maintain a low-impedance state. In addition,
M si
input signals. ground traces should be as wide and short as possible so
27 De
During the TSD operation, the FO pin becomes logic that radiated EMI levels can be reduced.
low and transmits fault signals.
Note that junction temperatures of the output
transistors themselves are not monitored; therefore, do
68 w
not use the TSD function as an overtemperature
e
VDC
prevention for the output transistors.
IM N 28VBB
, S or
HINx
31 U
0 Ground traces
M df
LINx should be wide

MIC
26 V1 and short.
V2
22 de
0 35 M
TSD operation W1
24
TDH W2
68 n
Tj(MIC) 37
M me
TDL
0
LS1
SI m
HOx 11
LS2
0
2
o
LOx responds to input signals.

LS3A
LOx 1
ec
High-frequency, high-voltage
0 current loops should be as
R
small and wide as possible.

FO
Figure 13-1. High-frequency, High-voltage Current

ot
0
Paths
N
Figure 12-16. TSD Operational Waveforms

13.2 Considerations in Heatsink Mounting
The following are the key considerations and the
guidelines for mounting a heatsink:
● It is recommended to use a pair of a metric screw of
M2.5 and a plain washer of 6.0 mm (φ). To tighten
the screws, use a torque screwdriver. Tighten the two
screws firstly up to about 30% of the maximum screw
torque, then finally up to 100% of the prescribed
maximum screw torque. Perform appropriate
tightening within the range of screw torque defined in
Section 4.

SIM6800M Series
● When mounting a heatsink, it is recommended to use typical measurement circuits for breakdown voltage:
silicone greases. If a thermally conductive sheet or an Figure 13-3 shows the high-side transistor (Q1H) in the
electrically insulating sheet is used, package cracks U-phase; Figure 13-4 shows the low-side transistor (Q1L)
may be occurred due to creases at screw tightening. in the U-phase. And all the pins that are not represented
Therefore, you should conduct thorough evaluations in these figures are open.
before using these materials. When measuring the high-side transistors, leave all
● When applying a silicone grease, make sure that there the pins not be measured open. When measuring the
must be no foreign substances between the IC and a low-side transistors, connect the LSx pin to be measured
heatsink. Extreme care should be taken not to apply a to the COMx pin, then leave other unused pins open.
silicone grease onto any device pins as much as
possible. The following requirements must be met for
proper grease application:
:
ns
- Grease thickness: 100 µm
- Heatsink flatness: ±100 µm 28VBB
- Apply silicone grease within the area indicated in
g
V
Figure 13-2, below.
M si
Q1H Q2H Q3H
U
31
27 De
Screw hole Screw hole 19 V
MIC
COM116 26 V1
W1
24
68 w
7.4 COM2 6
Thermal silicone 35 V2
M2.5 grease application area Q1L Q2L Q3L
e
7.4 M2.5 37 W2
IM N
Heatsink
31.3
, S or
LS1
1.25 1.25 11
Unit: mm LS2 2 33 LS2
LS3A 1 40 LS3B
M df
Figure 13-2. Reference Application Area for Thermal

Silicone Grease
22 de
Figure 13-3. Typical Measurement Circuit for High-

side Transistor (Q1H) in U-phase
68 n
13.3 Considerations in IC Characteristics

M me
Measurement
When measuring the breakdown voltage or leakage
SI m
current of the transistors incorporated in the IC, note that

the gate and emitter (source) of each transistor should 28VBB
o
have the same potential. Moreover, care should be taken

ec
when performing the measurements, because each

Q1H Q2H Q3H
transistor is connected as follows: 31
U
R
● All the high-side collectors (drains) are internally MIC

19 V
V
connected to the VBB pin. COM116 26 V1
ot
● In the U-phase, the high-side emitter (source) and the 24

W1
COM2 6
low-side collector (drain) are internally connected, 35 V2
N
Q1L Q2L Q3L

and are also connected to the U pin. 37 W2
(In the V- and W-phases, the high- and low-side
transistors are unconnected inside the IC.)
LS1
The gates of the high-side transistors are pulled down 11
LS2 2 33 LS2
to the corresponding output (U, V/V1, and W1) pins; LS3A 1 40 LS3B
similarly, the gates of the low-side transistors are pulled
down to the COM2 pin.
When measuring the breakdown voltage or leakage
current of the transistors, note that all of the output (U, Figure 13-4. Typical Measurement Circuit for Low-
V/V1, and W1), LSx, and COMx pins must be side Transistor (Q1L) in U-phase
appropriately connected. Otherwise the switching
transistors may result in permanent damage.
The following are circuit diagrams representing

SIM6800M Series
14. Calculating Power Losses and

Estimating Junction Temperatures 1 + M × sin(φ + θ)
DT = ,
2
This section describes the procedures to calculate
power losses in switching transistors, and to estimate a M is the modulation index (0 to 1),
junction temperature. Note that the descriptions listed cosθ is the motor power factor (0 to 1),
here are applicable to the SIM6800M series, which is IM is the effective motor current (A),
controlled by a 3-phase sine-wave PWM driving α is the slope of the linear approximation in the
strategy. VCE(SAT) vs. IC curve, and
For quick and easy references, we offer calculation β is the intercept of the linear approximation in the
support tools online. Please visit our website to find out VCE(SAT) vs. IC curve.
more.
:
ns
● DT0026: SIM681xM Calculation Tool 2.0
VCC = 15 V
http://www.semicon.sanken-ele.co.jp/en/calc- 125°C
g
tool/sim681xm_caltool_en.html 1.8
y = 0.19x + 0.92
M si
1.6
VCE(SAT) (V)
75°C
● DT0027: SIM682xM and SIM6880M Calculation
27 De
1.4 25°C
Tool
http://www.semicon.sanken-ele.co.jp/en/calc- 1.2
tool/sim682xm_caltool_en.html
68 w
1.0
e
0.8
0.0 1.0 2.0 3.0 4.0 5.0
14.1 IGBT
IM N IC (A)
Total power loss in an IGBT can be obtained by
, S or
Figure 14-1. Linear Approximate Equation of
taking the sum of steady-state loss, PON, and switching VCE(SAT) vs. IC Curve
loss, PSW. The following subsections contain the
M df
mathematical procedures to calculate these losses (PON

and PSW) and the junction temperature of all IGBTs
14.1.2 IGBT Switching Loss, PSW
22 de
operating.
Switching loss in an IGBT can be calculated by
68 n
Equation (5), letting IM be the effective current value of

14.1.1 IGBT Steady-state Loss, PON the motor:
M me
Steady-state loss in an IGBT can be computed by

√2 VDC
using the VCE(SAT) vs. IC curves, listed in Section 15.3.1. PSW = × fC × αE × IM × . (5)
SI m
As expressed by the curves in Figure 14-1, linear π 300

approximations at a range the IC is actually used are
o
obtained by: VCE(SAT) = α × IC + β. The values gained by Where:

ec
the above calculation are then applied as parameters in fC is the PWM carrier frequency (Hz),
Equation (4), below. Hence, the equation to obtain the VDC is the main power supply voltage (V), i.e., the
R
IGBT steady-state loss, PON, is: VBB pin input voltage, and
αE is the slope of the switching loss curve (see Section
ot
1 π 15.3.2).
PON = � V (φ) × IC (φ) × DT × dφ
2π 0 CE(SAT)
N
14.1.3 Estimating Junction Temperature

1 1 4 of IGBT
= α� + M × cos θ� IM 2
2 2 3π
(4) The junction temperature of all IGBTs operating, TJ,
√2 1 π
+ β � + M × cos θ� IM . can be estimated with Equation (6):
π 2 8
Where: TJ = R (J−C)Q × {(PON + PSW ) × 6} + TC . (6)
VCE(SAT) is the collector-to-emitter saturation voltage of
the IGBT (V), Where:
IC is the collector current of the IGBT (A), R(J-C)Q is the junction-to-case thermal resistance
DT is the duty cycle, which is given by (°C/W) of all the IGBTs operating, and
TC is the case temperature (°C), measured at the point
defined in Figure 3-1.

SIM6800M Series
14.2 Power MOSFET VCC = 15 V

8
Total power loss in a power MOSFET can be 7 y = 0.53x + 5.64
obtained by taking the sum of the following losses: 125°C
6
steady-state loss, PRON; switching loss, PSW; the steady-
RDS(ON) (Ω)
5
state loss of a body diode, PSD. In the calculation 75°C
4
procedure we offer, the recovery loss of a body diode,
PRR, is considered negligibly small compared with the 3 25°C
ratios of other losses. 2
The following subsections contain the mathematical 1
procedures to calculate these losses (PRON, PSW, and PSD) 0
and the junction temperature of all power MOSFETs 0.0 0.5 1.0 1.5 2.0
:
operating. ID (A)
ns
g
14.2.1 Power MOSFET Steady-state Loss, RDS(ON) vs. ID Curve
M si
PRON
27 De
Steady-state loss in a power MOSFET can be 14.2.2 Power MOSFET Switching Loss,
computed by using the RDS(ON) vs. ID curves, listed in
Section 15.3.1. As expressed by the curves in Figure
PSW
68 w
14-2, linear approximations at a range the ID is actually Switching loss in a power MOSFET can be calculated
e
used are obtained by: RDS(ON) = α × ID + β. The values
IM N by Equation (8), letting IM be the effective current value
gained by the above calculation are then applied as of the motor:
parameters in Equation (7), below. Hence, the equation
, S or
to obtain the power MOSFET steady-state loss, PRON, is: √2 VDC
PSW = × fC × αE × IM × . (8)
1 π π 300
M df
PRON = � I (φ)2 × R DS(ON) (φ) × DT × dφ

2π 0 D Where:
fC is the PWM carrier frequency (Hz),
22 de
1 3 VDC is the main power supply voltage (V), i.e., the

= 2√2α � + M × cos θ� IM 3 VBB pin input voltage, and
68 n
3π 32
(7) αE is the slope of the switching loss curve (see Section
M me
1 1 15.3.2).
+2β � + M × cos θ� IM 2 .
8 3π
SI m
Where: 14.2.3 Body Diode Steady-state Loss, PSD

ID is the drain current of the power MOSFET (A),
o
RDS(ON) is the drain-to-source on-resistance of the Steady-state loss in the body diode of a power
ec
power MOSFET (Ω), MOSFET can be computed by using the VSD vs. ISD
DT is the duty cycle, which is given by curves, listed in Section 15.3.1. As expressed by the
R
curves in Figure 14-3, linear approximations at a range

1 + M × sin(φ + θ) the ISD is actually used are obtained by: VSD = α × ISD + β.
DT = ,
ot
2 The values gained by the above calculation are then

applied as parameters in Equation (9), below. Hence, the
N
M is the modulation index (0 to 1), equation to obtain the body diode steady-state loss, PSD,
cosθ is the motor power factor (0 to 1), is:
IM is the effective motor current (A),
α is the slope of the linear approximation in the RDS(ON) 1 π
PSD = � V (φ) × ISD (φ) × (1 − DT) × dφ
vs. ID curve, and 2π 0 SD
β is the intercept of the linear approximation in the
RDS(ON) vs. ID curve.
1 1 4
= α� − M × cos θ� IM 2
2 2 3π
√2 1 π (9)
+ β � − M × cos θ� IM .
π 2 8

SIM6800M Series
Where:
VSD is the source-to-drain diode forward voltage of the
power MOSFET (V),
ISD is the source-to-drain diode forward current of the
power MOSFET (A),
DT is the duty cycle, which is given by
1 + M × sin(φ + θ)
DT = ,
2
M is the modulation index (0 to 1),

cosθ is the motor power factor (0 to 1),
:
ns
IM is the effective motor current (A),
α is the slope of the linear approximation in the VSD vs.
g
ISD curve, and
β is the intercept of the linear approximation in the
M si
VSD vs. ISD curve.
27 De
1.2
68 w
25°C 75°C
1.0
0.8
e
VSD (V)
IM N y = 0.24x + 0.55
0.6
, S or
125°C
0.4
M df
0.2
0.0
0.0 0.5 1.0 1.5 2.0
22 de
ISD (A)
68 n

M me
VSD vs. ISD Curve

SI m
14.2.4 Estimating Junction Temperature

o
of Power MOSFET
ec
The junction temperature of all power MOSFETs

R
operating, TJ, can be estimated with Equation (10):
TJ = R J−C × {(PON + PSW + PSD ) × 6} + TC .

ot
(10)
N
Where:
RJ-C is the junction-to-case thermal resistance (°C/W)
of all the power MOSFETs operating, and
TC is the case temperature (°C), measured at the point
defined in Figure 3-1.

SIM6800M Series
15. Performance Curves
15.1 Transient Thermal Resistance Curves

The following graphs represent transient thermal resistance (the ratios of transient thermal resistance), with steady-
state thermal resistance = 1.
1.00
Ratio of Transient Thermal
:
ns
Resistance
0.10
g
M si
27 De
0.01
0.001 0.01 0.1 1 10
68 w
Time (s)
e
IM N
Figure 15-1. Transient Thermal Resistance Curve: SIM681xM
, S or
1.00
M df
Ratio of Transient Thermal
22 de
Resistance
0.10
68 n
M me
SI m
0.01
0.001 0.01 0.1 1 10
o
Time (s)
ec
R
Figure 15-2. Transient Thermal Resistance Curve: SIM682xM

ot
1.00
N Ratio of Transient Thermal
Resistance
0.10
0.01
0.001 0.01 0.1 1 10
Time (s)
Figure 15-3. Transient Thermal Resistance Curve: SIM6818M

SIM6800M Series
15.2 Performance Curves of Control Parts

Figure 15-4 to Figure 15-28 provide performance curves of the control parts integrated in the SIM6800M series,
including variety-dependent characteristics and thermal characteristics. TJ represents the junction temperature of the
control parts.
Table 15-1. Typical Characteristics of Control Parts

Figure Number Figure Caption
Figure 15-4 Logic Supply Current, ICC vs. TC (INx = 0 V)
Figure 15-5 Logic Supply Current, ICC vs. TC (INx = 5 V)
Figure 15-6 VCCx Pin Voltage, VCC vs. Logic Supply Current, ICC curve
:
ns
Figure 15-7 Logic Supply Current (1-phase) IBS vs. TC (HINx = 0 V)
Figure 15-8 Logic Supply Current (1-phase) IBS vs. TC (HINx = 5 V)
g
Figure 15-9 VBx Pin Voltage, VB vs. Logic Supply Current, IBS (HINx = 0 V)
Figure 15-10 Logic Operation Start Voltage, VBS(ON) vs. TC
M si
Figure 15-11 Logic Operation Stop Voltage, VBS(OFF) vs. TC
27 De
Figure 15-12 Logic Operation Start Voltage, VCC(ON) vs. TC
Figure 15-13 Logic Operation Stop Voltage, VCC(OFF) vs. TC
Figure 15-14 UVLO_VB Filtering Time vs. TC
68 w
Figure 15-15 UVLO_VCC Filtering Time vs. TC
e
Figure 15-16 High Level Input Threshold Voltage, VIH vs. TC
IM N
Figure 15-17 Low Level Input Threshold Voltage, VIL vs. TC
Figure 15-18 Input Current at High Level (HINx or LINx), IIN vs. TC
, S or
Figure 15-19 High-side Turn-on Propagation Delay vs. TC (from HINx to HOx)
Figure 15-20 Low-side Turn-on Propagation Delay vs. TC (from LINx to LOx)
M df
Figure 15-21 Minimum Transmittable Pulse Width for High-side Switching, tHIN(MIN) vs. TC
Figure 15-22 Minimum Transmittable Pulse Width for Low-side Switching, tLIN(MIN) vs. TC
Figure 15-23 SD Pin Filtering Time vs. TC
22 de
Figure 15-24 FO Pin Filtering Time vs. TC

Figure 15-25 Current Limit Reference Voltage, VLIM vs. TC
68 n
Figure 15-26 OCP Threshold Voltage, VTRIP vs. TC

M me
Figure 15-27 OCP Hold Time, tP vs. TC

Figure 15-28 OCP Blanking Time, tBK(OCP) vs. TC; Current Limit Blanking Time, tBK(OCL) vs. TC
SI mo
ec
VCCx = 15 V, HINx = 0 V, LINx = 0 V VCCx = 15 V, HINx = 5 V, LINx = 5 V

5.0 5.0
4.5 Max. 4.5 Max.
R
4.0 4.0
3.5 Typ. 3.5 Typ.
ICC (mA)
ICC (mA)
3.0 3.0
ot
Min. 2.5 Min.

2.5
2.0 2.0
N
1.5 1.5
1.0 1.0
0.5 0.5
0.0 0.0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
TC (°C) TC (°C)
Figure 15-4. Logic Supply Current, ICC vs. TC Figure 15-5. Logic Supply Current, ICC vs. TC
(INx = 0 V) (INx = 5 V)

SIM6800M Series
HINx = 0 V, LINx = 0 V VBx = 15 V, HINx = 0 V

3.8 250
3.6 200
3.4 Max.
ICC (mA)
150
IBS (µA)
Typ.
3.2
125°C
100 Min.
3.0 25°C
2.8 −30°C 50
2.6 0
:
12 13 14 15 16 17 18 19 20 -30 0 30 60 90 120 150
ns
VCC (V) TC (°C)
g
Figure 15-6. VCCx Pin Voltage, VCC vs. Logic Figure 15-7. Logic Supply Current (1-phase) IBS vs. TC
M si
Supply Current, ICC curve (HINx = 0 V)
27 De
68 w
VBx = 15 V, HINx = 5 V VBx = 15 V, HINx = 0 V
300
180
250
e Max. 160
IM N
200 140
Typ.
IBS (µA)
IBS (µA)
, S or
120
150 Min. 125°C
100
100 25°C
M df
80
50 −30°C
60
22 de
0 40
-30 0 30 60 90 120 150 12 13 14 15 16 17 18 19 20
68 n
TC (°C) VB (V)
M me
Figure 15-8. Logic Supply Current (1-phase) IBS vs. Figure 15-9. VBx Pin Voltage, VB vs. Logic Supply
TC (HINx = 5 V) Current, IBS (HINx = 0 V)
SI mo
ec
11.5 11.0
11.3 Max. 10.8 Max.
R
11.1 10.6
Typ. Typ.
10.9 10.4
10.7 10.2
ot
VBS(ON) (V)
Min.
VBS(OFF) (V)
10.5 10.0 Min.

9.8
N
10.3
10.1 9.6
9.9 9.4
9.7 9.2
9.5 9.0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
TC (°C) TC (°C)
Figure 15-10. Logic Operation Start Voltage, VBS(ON) Figure 15-11. Logic Operation Stop Voltage, VBS(OFF)
vs. TC vs. TC

SIM6800M Series
12.5 12.0
12.3 11.8
12.1 11.6
11.9 Max. 11.4 Max.
VCC(OFF) (V)
VCC(ON) (V)
11.7 11.2
11.5 Typ. 11.0 Typ.
11.3 10.8
11.1 Min. 10.6 Min.
10.9 10.4
10.7 10.2
10.5 10.0
:
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
ns
TC (°C) TC (°C)
g
Figure 15-12. Logic Operation Start Voltage, VCC(ON) Figure 15-13. Logic Operation Stop Voltage, VCC(OFF)
M si
vs. TC vs. TC
27 De
68 w
5.0 5.0
UVLO_VCC Filtering Time (µs)
UVLO_VB Filtering Time (µs)
4.5
e
4.5
4.0 IM N 4.0
3.5 Max.
3.5 Max.
3.0 3.0
, S or
2.5 Typ. 2.5 Typ.
2.0 2.0
Min. Min.
M df
1.5 1.5
1.0 1.0
0.5 0.5
22 de
0.0 0.0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
68 n
TC (°C) TC (°C)
M me
Figure 15-14. UVLO_VB Filtering Time vs. TC Figure 15-15. UVLO_VCC Filtering Time vs. TC
SI mo
2.6 2.0
ec
2.4
1.8
2.2
R
2.0 1.6 Max.

Max.
VIH (V)
VIL (V)
ot
1.8 1.4
Typ. Typ.
1.6
1.2
N
1.4 Min.
1.0 Min.
1.2
1.0 0.8
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
TC (°C) TC (°C)
Figure 15-16. High Level Input Threshold Voltage, Figure 15-17. Low Level Input Threshold Voltage, VIL
VIH vs. TC vs. TC

SIM6800M Series
INHx or INLx = 5 V 800

400
Max.
350 700
Propagation Delay (ns)

Max. Typ.
High-side Turn-on
300 600
Typ. Min.
250 500
IIN (µA)
200 Min. 400

150 300
100 200
50 100
0 0
:
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
ns
TC (°C) TC (°C)
g
Figure 15-18. Input Current at High Level (HINx or Figure 15-19. High-side Turn-on Propagation Delay vs.
M si
LINx), IIN vs. TC TC (from HINx to HOx)
27 De
68 w
700 400
Low-side Turn-on Propagation
e
350 Max.
600 IM N Max.
300
500 Typ. Typ.
tHIN(MIN) (ns)
250
Delay (ns)
400
, S or
Min. 200 Min.
300
150
M df
200 100
100 50
22 de
0 0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
68 n
TC (°C) TC (°C)
M me
Figure 15-20. Low-side Turn-on Propagation Delay Figure 15-21. Minimum Transmittable Pulse Width for
vs. TC (from LINx to LOx) High-side Switching, tHIN(MIN) vs. TC
SI mo
ec
400 6
R
350 Max. 5
300
Typ.
ot
4
tLIN(MIN) (ns)
tSD (ns)
250
Min. Max.
200 3
N
150 Typ.
2
100 Min.
1
50
0 0
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
TC (°C) TC (°C)
Figure 15-22. Minimum Transmittable Pulse Width Figure 15-23. SD Pin Filtering Time vs. TC
for Low-side Switching, tLIN(MIN) vs. TC

SIM6800M Series
6 0.750
0.725
5
0.700
Max.
VLIM (ns)
4
tFO (ns)
Max. 0.675
Typ.
3 0.650
Typ. Min.
0.625
2 Min.
0.600
1
0.575
:
0 0.550
ns
-30 0 30 60 90 120 150 -30 0 30 60 90 120 150
TC (°C) TC (°C)
g
M si
Figure 15-24. FO Pin Filtering Time vs. TC Figure 15-25. Current Limit Reference Voltage, VLIM vs.
TC
27 De
68 w
1.10 50
e
1.08 IM N 45
1.06 Max. 40
1.04 35 Max.
VTRIP (ns)
Typ. 30
, S or
1.02 Typ.
tP (µs)
25
1.00
20 Min.
0.98 Min.
M df
15
0.96
10
0.94
5
22 de
0.92 0
0.90 -30 0 30 60 90 120 150
-30 0 30 60 90 120 150
68 n
TC (°C) TC (°C)
M me
Figure 15-26. OCP Threshold Voltage, VTRIP vs. TC Figure 15-27. OCP Hold Time, tP vs. TC
SI mo
ec
4.0
3.5
R
3.0
2.5 Max.
ot
tBK (µs)
2.0 Typ.
1.5
N
Min.
1.0
0.5
0.0
-30 0 30 60 90 120 150
TC (°C)
Figure 15-28. OCP Blanking Time, tBK(OCP) vs. TC;

Current Limit Blanking Time, tBK(OCL) vs. TC

SIM6800M Series
15.3 Performance Curves of Output Parts
15.3.1 Output Transistor Performance Curves
15.3.1.1. SIM6811M
SIM6811M
VCC = 15 V
SIM6811M
8 1.2
25°C 75°C
:
7
1.0
ns
125°C
6
0.8
RDS(ON) (Ω)
VSD (V)
5
g
75°C
4 0.6
M si
3 125°C
25°C 0.4
27 De
2
0.2
1
0 0.0
68 w
0.0 0.5 1.0 1.5 2.0 0.0 0.5 1.0 1.5 2.0
ID (A) ISD (A)
e
Figure 15-29.
IM N
Power MOSFET RDS(ON) vs. ID Figure 15-30. Power MOSFET VSD vs. ISD
, S or
M df
15.3.1.2. SIM6812M
22 de
SIM6812M
SIM6812M
VCC = 15 V VCC = 15 V
68 n
5 1.2
25°C 75°C
M me
125°C
4 1
75°C
RDS(ON) (Ω)
0.8
VSD (V)
3
SI m
25°C 0.6
2 125°C
o
0.4
ec
1
0.2
R
0 0
0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.5 1.0 1.5 2.0 2.5
ot
ID (A) ISD (A)

N
Figure 15-31. Power MOSFET RDS(ON) vs. ID Figure 15-32. Power MOSFET VSD vs. ISD

SIM6800M Series
15.3.1.3. SIM6813M
SIM6813M
SIM6813M
VCC = 15 V VCC = 15 V
4.0 1.2
125°C
3.5 25°C 75°C
1
3.0
75°C 0.8
RDS(ON) (Ω)
VSD (V)
2.5
2.0 25°C 0.6
1.5 125°C
0.4
1.0
:
0.5 0.2
ns
0.0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0
g
ID (A) ISD (A)
M si
27 De
Figure 15-33. Power MOSFET RDS(ON) vs. ID Figure 15-34. Power MOSFET VSD vs. ISD
68 w
15.3.1.4. SIM6880M
e
IM N
SIM6880M
VCC = 15 V VCC = 15 V
SIM6880M
2.0 2.5
, S or
125°C
1.8 25°C
2.0
M df
1.6 75°C
VCE(SAT) (V)
VF (V)
75°C
1.4 1.5
25°C
22 de
1.2
1.0
1.0 125°C
68 n
0.5
0.8
M me
0.6 0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0
IC (A) IF (A)
SI mo
Figure 15-35. IGBT VCE(SAT) vs. IC Figure 15-36. FRD VF vs. IF

ec
R
15.3.1.5. SIM6822M and SIM6827M

ot
VCC = 15 V VCC = 15 V
SIM6822M/27M
SIM6822M/27M
2.0 2.5
N
125°C
1.8 25°C
2.0
1.6
VCE(SAT) (V)
VF (V)
75°C 1.5
1.4 75°C
25°C 125°C
1.0
1.2
1.0 0.5
0.8 0.0
0.0 1.0 2.0 3.0 4.0 5.0 0.0 1.0 2.0 3.0 4.0 5.0
IC (A) IF (A)
Figure 15-37. IGBT VCE(SAT) vs. IC Figure 15-38. FRD VF vs. IF

SIM6800M Series
15.3.2 Switching Losses

Conditions: VBB = 300 V, half-bridge circuit with inductive load.
Switching Loss, E, is the sum of turn-on loss and turn-off loss.
15.3.2.1. SIM6811M
SIM6811M
SIM6811M
VB = 15 V VCC = 15 V
250 250
:
200 200
ns
TJ = 125°C TJ = 125°C
150 150
g
E (µJ)
E (µJ)
100 100
M si
27 De
50 TJ = 25°C 50 TJ = 25°C
0 0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
68 w
ID (A) ID (A)
e
Figure 15-39.
IM N
High-side Switching Loss Figure 15-40. Low-side Switching Loss
, S or
M df
15.3.2.2. SIM6812M
22 de
SIM6812M
SIM6812M
VB = 15 V VCC = 15 V
68 n
250 250
M me
200 200
TJ = 125°C
150 TJ = 125°C 150
SI m
E (µJ)
E (µJ)
100 100
o
ec
50 50 TJ = 25°C
TJ = 25°C
R
0 0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ot
ID (A) ID (A)
N
Figure 15-41. High-side Switching Loss Figure 15-42. Low-side Switching Loss

SIM6800M Series
15.3.2.3. SIM6813M
SIM6813M
SIM6813M
VB = 15 V VCC = 15 V
300 300
250 250
200 TJ = 125°C 200 TJ = 125°C

E (µJ)
E (µJ)
150 150
100 100
:
TJ = 25°C
50 TJ = 25°C 50
ns
0 0
g
0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0
M si
ID (A) ID (A)
27 De
68 we
15.3.2.4. SIM6880M
IM N
, S or
SIM6880M
SIM6880M
VB = 15 V VB = 15 V
300 300
M df
250 250
TJ = 125°C
TJ = 125°C
22 de
200 200
E (µJ)
E (µJ)
150 150
68 n
100 100
M me
TJ = 25°C
TJ = 25°C
50 50
SI m
0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0
o
IC (A) IC (A)
ec
R
ot
N

SIM6800M Series
15.3.2.5. SIM6822M
SIM6822M
SIM6822M
VB = 15 V VCC = 15 V
400 400
350 350
300 300
250 TJ = 125°C 250 TJ = 125°C
E (µJ)
E (µJ)
200 200
150 150
100 100
:
50 50
ns
TJ = 25°C TJ = 25°C
0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
g
IC (A) IC (A)
M si
27 De
68 we
15.3.2.6. SIM6827M IM N
SIM6827M
SIM6827M
, S or
VB = 15 V VCC = 15 V
450 450
400 400
M df
350 350
300 TJ = 125°C 300 TJ = 125°C
22 de
250 250
E (µJ)
E (µJ)
200 200
68 n
150 150
100 100
M me
50 TJ = 25°C 50 TJ = 25°C
0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
SI m
IC (A) IC (A)
o
ec
R
ot
N

SIM6800M Series
15.4 Allowable Effective Current Curves

The following curves represent allowable effective currents in 3-phase sine-wave PWM driving with parameters such
as typical RDS(ON) or VCE(SAT), and typical switching losses.
Operating conditions: VBB pin input voltage, VDC = 300 V; VCC pin input voltage, VCC = 15 V; modulation index,
M = 0.9; motor power factor, cosθ = 0.8; junction temperature, TJ = 150 °C.
15.4.1 SIM6811M
:
fC = 2 kHz
ns
2.0
Allowable Effective Current (Arms)
g
M si
1.5
27 De
68 w
1.0
e
IM N
0.5
, S or
M df
0.0
25 50 75 100 125 150
22 de
TC (°C)
68 n
Figure 15-51. Allowable Effective Current (fC = 2 kHz): SIM6811M

M me
SI m
fC = 16 kHz
2.0
o
ec
1.5
R
ot
1.0
N
0.5
0.0
25 50 75 100 125 150
TC (°C)

SIM6800M Series
15.4.2 SIM6812M
fC = 2 kHz
2.5
2.0
1.5
:
ns
1.0
g
M si
0.5
27 De
0.0
68 w
25 50 75 100 125 150
TC (°C)
e
IM N
, S or
M df
fC = 16 kHz
2.5
22 de
2.0
68 n
M me
1.5
SI m
1.0
o
ec
0.5
R
ot
0.0
25 50 75 100 125 150
N
TC (°C)

SIM6800M Series
15.4.3 SIM6813M
fC = 2 kHz
3.0
2.5
2.0
1.5
:
ns
1.0
g
M si
0.5
27 De
0.0
68 w
25 50 75 100 125 150
TC (°C)
e
IM N
, S or
M df
fC = 16 kHz
3.0
22 de
2.5
68 n
M me
2.0
1.5
SI mo
1.0
ec
R
0.5
ot
0.0
25 50 75 100 125 150
N
TC (°C)

SIM6800M Series
15.4.4 SIM6880M
fC = 2 kHz
2.5
2.0
1.5
:
ns
1.0
g
M si
0.5
27 De
0.0
68 w
25 50 75 100 125 150
TC (°C)
e
IM N
, S or
M df
fC = 16 kHz
2.5
22 de
2.0
68 n
M me
1.5
SI m
1.0
o
ec
0.5
R
ot
0.0
25 50 75 100 125 150
N
TC (°C)

SIM6800M Series
15.4.5 SIM6822M
fC = 2 kHz
5.0
4.0
3.0
:
ns
2.0
g
M si
1.0
27 De
0.0
68 w
25 50 75 100 125 150
TC (°C)
e
IM N
, S or
M df
fC = 16 kHz
5.0
22 de
4.0
68 n
M me
3.0
SI m
2.0
o
ec
1.0
R
ot
0.0
25 50 75 100 125 150
N
TC (°C)

SIM6800M Series
15.4.6 SIM6827M
fC = 2 kHz
5.0
4.0
3.0
:
ns
2.0
g
M si
1.0
27 De
0.0
68 w
25 50 75 100 125 150
TC (°C)
e
IM N
, S or
M df
fC = 16 kHz
5.0
22 de
4.0
68 n
M me
3.0
SI m
2.0
o
ec
1.0
R
ot
0.0
25 50 75 100 125 150
N
TC (°C)

SIM6800M Series
15.5 Short Circuit SOAs (Safe Operating Areas)

This section provides the graphs illustrating the short circuit SOAs of the SIM6800M series devices whose output
transistors consist of built-in IGBTs.
Conditions: VDC ≤ 400 V, 13.5 V ≤ VCC ≤ 16.5 V, TJ = 125 °C, 1 pulse.
40
Collector Current, IC(Peak) (A)
:
30
g ns
M si
20
27 De
Short Circuit SOA
10
68 we
IM N
0
, S or
0 1 2 3 4 5
Pulse Width (µs)

M df
Figure 15-63. Short Circuit SOA: SIM6880M

22 de
68 n
100
M me
Collector Current, IC(Peak) (A)
SI m
75
o
ec
50
R
ot
Short Circuit SOA

25
N
0
0 1 2 3 4 5
Pulse Width (µs)
Figure 15-64. Short Circuit SOA: SIM6822M, SIM6827M

SIM6800M Series
16. Pattern Layout Example

This section contains the schematic diagrams of a PCB pattern layout example using an SIM6800M series device.
For more details on through holes, see Section 10.
:
g ns
M si
27 De
68 we
IM N
, S or
M df
Figure 16-1. Top View

22 de
68 n
M me
SI mo
ec
R
ot
N
Figure 16-2. Bottom View

SIM6800M Series
20 VB2 VB1A 21
C2 C6
19 V VB3 23
C7 C3
17 VCC1 W1 24
C8
16 COM1
15 HIN3 V1 26
:
CN1
14 HIN2
ns
CX1
13 HIN1 VBB 28 1
g
CN3 12 SD VB1B 30 2
R1
M si
1 11 LS1 C5
R2
2 10 OCL U 31
27 De
R3 C1
3 R17
R4 CN2
4 9 LIN3 LS2 33
R5
5 8 LIN2 3
R6
68 w
6 7 LIN1 V2 35 2
W2 37 1
e
IM N 6 COM2
5 VCC2
, S or
C9
4 FO
M df
CN4
3 OCP
R16
10 LS3B 40
22 de
9 2 LS2
R10
8 1 LS3A
7
68 n
6
M me
5
R19
4
R18
3
R20
SI m
2
1
o
ec
R21
R22
R23
R7
R8
R9
DZ1
C12
C11
C10
R
C4
ot
C18
C17
C16
C15
C14
C13
C19
C20
N
Figure 16-3. Circuit Diagram of PCB Pattern Layout Example

SIM6800M Series
17. Typical Motor Driver Application

This section contains the information on the typical motor driver application listed in the previous section, including
a circuit diagram, specifications, and the bill of the materials used.
● Motor Driver Specifications

IC SIM6822M
Main Supply Voltage, VDC 300 VDC (typ.)
Rated Output Power 500 W
● Circuit Diagram
:
See Figure 16-3.
ns
● Bill of Materials
g
Symbol Part Type Ratings Symbol Part Type Ratings
M si
C1 Electrolytic 47 μF, 50 V R3 General 100 Ω, 1/8 W
27 De
100 μF, 50 V 100 Ω, 1/8 W
68 w
C4 Electrolytic R6 General
C5 Ceramic 0.1 μF, 50 V R7* Metal plate 0.15 Ω, 2 W
e0.1 μF, 50 V 0.15 Ω, 2 W

C6 Ceramic
IM N R8* Metal plate
C7 Ceramic 0.1 μF, 50 V R9* Metal plate 0.15 Ω, 2 W
, S or
C8 Ceramic 0.1 μF, 50 V R10 General 100 Ω, 1/8 W
C9 Ceramic 0.1 μF, 50 V R16 General 3.3 kΩ, 1/8 W
M df
C10 Ceramic 100 pF, 50 V R17 General 0 kΩ, 1/8 W

C11 Ceramic 100 pF, 50 V R18 General 100 Ω, 1/8 W
22 de
C12 Ceramic 100 pF, 50 V R19 General 100 Ω, 1/8 W

100 Ω, 1/8 W
68 n
C13 Ceramic 100 pF, 50 V R20 General

M me
C14 Ceramic 100 pF, 50 V R21 General Open

SI m
C17 Ceramic 100 pF, 50 V ZD1 Zener diode VZ = 21 V (max.)

o
C18 Ceramic 100 pF, 50 V IPM1 IC SIM6822M

ec
C19 Ceramic 0.01 μF, 50 V CN1 Pin header Equiv. to B2P3-VH

R
C20 Ceramic 100 pF, 50 V CN2 Pin header Equiv. to B2P5-VH

CX1 Film 0.033 μF, 630 V CN3 Connector Equiv. to MA06-1
ot
R1 General 100 Ω, 1/8 W CN4 Connector Equiv. to MA10-1

R2 General 100 Ω, 1/8 W
N
* Refers to a part that requires adjustment based on operation performance in an actual application.

SIM6800M Series
Important Notes
● All data, illustrations, graphs, tables and any other information included in this document (the “Information”) as to Sanken’s
products listed herein (the “Sanken Products”) are current as of the date this document is issued. The Information is subject to any
change without notice due to improvement of the Sanken Products, etc. Please make sure to confirm with a Sanken sales
representative that the contents set forth in this document reflect the latest revisions before use.
● The Sanken Products are intended for use as components of general purpose electronic equipment or apparatus (such as home
appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Prior to use of the Sanken Products,
please put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them to
Sanken. When considering use of the Sanken Products for any applications that require higher reliability (such as transportation
equipment and its control systems, traffic signal control systems or equipment, disaster/crime alarm systems, various safety
devices, etc.), you must contact a Sanken sales representative to discuss the suitability of such use and put your signature, or affix
your name and seal, on the specification documents of the Sanken Products and return them to Sanken, prior to the use of the
:
Sanken Products. The Sanken Products are not intended for use in any applications that require extremely high reliability such as:
ns
aerospace equipment; nuclear power control systems; and medical equipment or systems, whose failure or malfunction may result
in death or serious injury to people, i.e., medical devices in Class III or a higher class as defined by relevant laws of Japan
g
(collectively, the “Specific Applications”). Sanken assumes no liability or responsibility whatsoever for any and all damages and
M si
losses that may be suffered by you, users or any third party, resulting from the use of the Sanken Products in the Specific
Applications or in manner not in compliance with the instructions set forth herein.
27 De
● In the event of using the Sanken Products by either (i) combining other products or materials or both therewith or (ii) physically,
chemically or otherwise processing or treating or both the same, you must duly consider all possible risks that may result from all
such uses in advance and proceed therewith at your own responsibility.
● Although Sanken is making efforts to enhance the quality and reliability of its products, it is impossible to completely avoid the
68 w
occurrence of any failure or defect or both in semiconductor products at a certain rate. You must take, at your own responsibility,
e
preventative measures including using a sufficient safety design and confirming safety of any equipment or systems in/for which
IM N
the Sanken Products are used, upon due consideration of a failure occurrence rate and derating, etc., in order not to cause any
human injury or death, fire accident or social harm which may result from any failure or malfunction of the Sanken Products.
Please refer to the relevant specification documents and Sanken’s official website in relation to derating.
, S or
● No anti-radioactive ray design has been adopted for the Sanken Products.
● The circuit constant, operation examples, circuit examples, pattern layout examples, design examples, recommended examples, all
M df
information and evaluation results based thereon, etc., described in this document are presented for the sole purpose of reference of
use of the Sanken Products.
● Sanken assumes no responsibility whatsoever for any and all damages and losses that may be suffered by you, users or any third
22 de
party, or any possible infringement of any and all property rights including intellectual property rights and any other rights of you,
users or any third party, resulting from the Information.
● No information in this document can be transcribed or copied or both without Sanken’s prior written consent.
68 n
● Regarding the Information, no license, express, implied or otherwise, is granted hereby under any intellectual property rights and
M me
any other rights of Sanken.

● Unless otherwise agreed in writing between Sanken and you, Sanken makes no warranty of any kind, whether express or implied,
including, without limitation, any warranty (i) as to the quality or performance of the Sanken Products (such as implied warranty
SI m
of merchantability, and implied warranty of fitness for a particular purpose or special environment), (ii) that any Sanken Product is
delivered free of claims of third parties by way of infringement or the like, (iii) that may arise from course of performance, course
o
of dealing or usage of trade, and (iv) as to the Information (including its accuracy, usefulness, and reliability).
ec
● In the event of using the Sanken Products, you must use the same after carefully examining all applicable environmental laws and
regulations that regulate the inclusion or use or both of any particular controlled substances, including, but not limited to, the EU
R
RoHS Directive, so as to be in strict compliance with such applicable laws and regulations.
● You must not use the Sanken Products or the Information for the purpose of any military applications or use, including but not
limited to the development of weapons of mass destruction. In the event of exporting the Sanken Products or the Information, or
ot
providing them for non-residents, you must comply with all applicable export control laws and regulations in each country
including the U.S. Export Administration Regulations (EAR) and the Foreign Exchange and Foreign Trade Act of Japan, and
N
follow the procedures required by such applicable laws and regulations.

● Sanken assumes no responsibility for any troubles, which may occur during the transportation of the Sanken Products including
the falling thereof, out of Sanken’s distribution network.
● Although Sanken has prepared this document with its due care to pursue the accuracy thereof, Sanken does not warrant that it is
error free and Sanken assumes no liability whatsoever for any and all damages and losses which may be suffered by you resulting
from any possible errors or omissions in connection with the Information.
● Please refer to our official website in relation to general instructions and directions for using the Sanken Products, and refer to the
relevant specification documents in relation to particular precautions when using the Sanken Products.
● All rights and title in and to any specific trademark or tradename belong to Sanken and such original right holder(s).
DSGN-CEZ-16003


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500V / 600V High Voltage 3-phase Motor Driver ICs

SIM6800M Series Data Sheet

Undervoltage Lockout for Power Supply 3.0 A SIM6813M

3.0 A low switching SIM6880M

IGBT with FRD,

CBOOT1 low noise

● Fan Motor and Pump Motor for Washer and Dryer

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 1

9. Typical Applications ------------------------------------------------------------------------------------ 16

11. Marking Diagram --------------------------------------------------------------------------------------- 18

12. Functional Descriptions -------------------------------------------------------------------------------- 19

12.2 Pin Descriptions ----------------------------------------------------------------------------------- 19

12.2.2 VB1A, VB1B, VB2, and VB3 -------------------------------------------------------------- 19

12.2.4 COM1 and COM2--------------------------------------------------------------------------- 20

12.2.7 LS1, LS2, LS3A, and LS3B ---------------------------------------------------------------- 22

12.3 Protection Functions ------------------------------------------------------------------------------ 23

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 2

14.1.1 IGBT Steady-state Loss, PON -------------------------------------------------------------- 28

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 3

1. Absolute Maximum Ratings

FO Pin Voltage VFO FO–COM −0.5 to 7 V

SD Pin Voltage VSD SD–COM V

Storage Temperature TSTG −40 to 150 °C

Isolation Voltage( 4) VISO(RMS) case and each pin; AC, 1500 V

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 4

2. Recommended Operating Conditions

PWM Carrier Frequency fC — — 20 kHz

Operating Case Temperature TC(OP) — — 100 °C

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 5

3.1 Characteristics of Control Parts

(HINx, LINx, SD, FO)

Threshold Voltage VIL 1.0 1.5 — V

(HINx, LINx, SD, FO)

Low Level Input Current

Fault Signal Output

FO Pin Voltage at Fault

OCL Pin Output Voltage

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 6

Parameter Symbol Conditions Min. Typ. Max. Unit Remarks

3.2 Bootstrap Diode Characteristics

All freewheeling diodes SIM682xM

RJ-A — — 25 °C/W SIM681xM

Thermal Resistance SIM6880M

All freewheeling diodes SIM682xM

thermal characteristics, see Section 15.1.

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 7

3.4 Transistor Characteristics

Figure 3-2. Switching Characteristics Definitions

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 8

Parameter Symbol Conditions Min. Typ. Max. Unit

Drain-to-Source Leakage Current ICES VDS = 500 V, VIN = 0 V — — 100 µA

Drain-to-Source On Resistance VCE(SAT) ID = 1.25 A, VIN = 5 V — 2.0 2.4 Ω

Source-to-Drain Diode Reverse

Turn-off Delay Time td(off) TJ = 25 °C — 700 — ns

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 9

Parameter Symbol Conditions Min. Typ. Max. Unit

Turn-on Delay Time td(on) VDC = 300 V, IC = 3.0 A, — 880 — ns

Turn-off Delay Time td(off) TJ = 25 °C — 740 — ns

SIM6800M-DSE Rev.1.8 SANKEN ELECTRIC CO., LTD 10

Fall Time tf — 100 — ns

Parameter Symbol Conditions Min. Typ. Max. Unit

Diode Forward Voltage VF IF = 5 A, VIN = 0 V — 2.0 2.4 V

Diode Reverse Recovery Time trr — 100 — ns