P ROBLEMS ◆ 259

15. If R1 in Figure 5–25 is open, the base voltage is

(a) +10 V (b) 0 V (c) 3.13 V (d) 0.7 V
16. If R1 is open, the collector current in Figure 5–25 is
(a) 5.17 mA (b) 10 mA (c) 4.83 mA (d) 0 mA

PROBLEMS Answers to all odd-numbered problems are at the end of the book.
BASIC PROBLEMS
Section 5–1 The DC Operating Point
1. The output (collector voltage) of a biased transistor amplifier is shown in Figure 5–32. Is the
transistor biased too close to cutoff or too close to saturation?

FI G URE 5– 32

≈0V

2. What is the Q-point for a biased transistor as in Figure 5–2 with IB = 150 mA, b DC = 75,
VCC = 18 V, and RC = 1.0 kÆ?
3. What is the saturation value of collector current in Problem 2?
4. What is the cutoff value of VCE in Problem 2?
5. Determine the intercept points of the dc load line on the vertical and horizontal axes of the
collector-characteristic curves for the circuit in Figure 5–33.

FI G URE 5– 33
Multisim file circuits are identified RC
with a logo and are in the Problems 10 k
RB +
folder on the companion website. VCC
Filenames correspond to figure num-
1.0 M – 20 V
bers (e.g., F05-33). VBB +
10 V –

6. Assume that you wish to bias the transistor in Figure 5–33 with IB = 20 mA. To what voltage
must you change the VBB supply? What are IC and VCE at the Q-point, given that b DC = 50?
7. Design a biased-transistor circuit using VBB = VCC = 10 V for a Q-point of IC 5 mA and VCE
4 V. Assume b DC = 100. The design involves finding RB, RC, and the minimum power rating
of the transistor. (The actual power rating should be greater.) Sketch the circuit.
8. Determine whether the transistor in Figure 5–34 is biased in cutoff, saturation, or the linear
region. Remember that IC = b DCIB is valid only in the linear region.

FI G URE 5– 34 VCC
+8 V

RC
390

RB
VBB
βDC = 75
1.5 V
10 k
260 ◆ T RANSISTOR B IAS C IRCUITS

FI G URE 5–35 IC (mA)

60 600 µ A

50 500 µ A

40 400 µ A

30 300 µ A
Q-point
20 200 µ A

10 100 µ A

0 VCE (V)
1 2 3 4 5 6 7 8 9 10

9. From the collector characteristic curves and the dc load line in Figure 5–35, determine the
following:
(a) Collector saturation current
(b) VCE at cutoff
(c) Q-point values of IB, IC, and VCE
10. From Figure 5–35 determine the following:
(a) Maximum collector current for linear operation
(b) Base current at the maximum collector current
(c) VCE at maximum collector current

Section 5–2 Voltage-Divider Bias

+15 V 11. What is the minimum value of b DC in Figure 5–36 that makes RIN(BASE) G 10R2?
12. The bias resistor R2 in Figure 5–36 is replaced by a 15 kÆ potentiometer. What minimum re-
sistance setting causes saturation?
R1 RC
22 k 1.5 k
13. If the potentiometer described in Problem 12 is set at 2 kÆ, what are the values for IC and VCE?
14. Determine all transistor terminal voltages with respect to ground in Figure 5–37.
βDC = 150 15. Show the connections required to replace the transistor in Figure 5–37 with a pnp device.
16. (a) Determine VB in Figure 5–38.
R2 RE (b) How is VB affected if the transistor is replaced by one with a b DC of 50?
4.7 k 680
17. Determine the following in Figure 5–38:
(a) Q-point values
(b) The minimum power rating of the transistor
! FI G URE 5–36 18. Determine I1, I2, and IB in Figure 5–38.

VCC
+9 V – 12 V

R1 RC R1 RC
47 k 2.2 k 33 k 1.8 k

βDC = 110 βDC = 150

R2 RE R2 RE
15 k 1.0 k 5.6 k 560

! FI G URE 5–37 ! FI G URE 5– 38

 P ROBLEMS ◆ 261

Section 5–3 Other Bias Methods

19. Analyze the circuit in Figure 5–39 to determine the correct voltages at the transistor terminals
with respect to ground. Assume b DC = 100.
VCC
+5 V 20. To what value can RE in Figure 5–39 be reduced without the transistor going into saturation?
21. Taking VBE into account in Figure 5–39, how much will IE change with a temperature increase
RC
from 25°C to 100°C? The VBE is 0.7 V at 25°C and decreases 2.5 mV per degree Celsius.
1.0 k Neglect any change in b DC.
22. When can the effect of a change in b DC be neglected in the emitter bias circuit?
RB
23. Determine IC and VCE in the pnp emitter bias circuit of Figure 5–40. Assume b DC = 100.
10 k 24. Determine VB, VC, and IC in Figure 5–41.
RE
2.2 k

–5 V
VEE VEE
+10 V
! FI G URE 5–39

RE VCC
470 +3 V
RB
RC
RB 1.8 k
10 k

RC 33 k
330 βDC = 90

–10 V
VCC

! FI G URE 5– 40 ! FI G URE 5– 41

25. What value of RC can be used to decrease IC in Problem 24 by 25 percent?

26. What is the minimum power rating for the transistor in Problem 25?
27. A collector-feedback circuit uses an npn transistor with VCC = 12 V, RC = 1.2 kÆ, and
RB = 47 kÆ. Determine the collector current and the collector voltage if b DC = 200.
VCC
+9 V
28. Determine IB, IC, and VCE for a base-biased transistor circuit with the following values:
b DC = 90, VCC = 12 V, RB = 22 kÆ, and RC = 100 Æ.
29. If b DC in Problem 28 doubles over temperature, what are the Q-point values?
RC
RB 30. You have two base bias circuits connected for testing. They are identical except that one is
15 k 100
biased with a separate VBB source and the other is biased with the base resistor connected to VCC.
Ammeters are connected to measure collector current in each circuit. You vary the VCC supply
voltage and observe that the collector current varies in one circuit, but not in the other. In which
circuit does the collector current change? Explain your observation.
31. The datasheet for a particular transistor specifies a minimum b DC of 50 and a maximum b DC
of 125. What range of Q-point values can be expected if an attempt is made to mass-produce
the circuit in Figure 5–42? Is this range acceptable if the Q-point must remain in the transis-
! FI G URE 5–42 tor’s linear region?
32. The base bias circuit in Figure 5–42 is subjected to a temperature variation from 0°C to 70°C.
The b DC decreases by 50 percent at 0°C and increases by 75 percent at 70°C from its nominal
value of 110 at 25°C. What are the changes in IC and VCE over the temperature range of
0°C to 70°C?
262 ◆ T RANSISTOR B IAS C IRCUITS

Section 5–4 Troubleshooting

33. Determine the meter readings in Figure 5–43 if R1 is open.

FI G URE 5–43 VCC

+8 V

+ −
V3
R1 RC
33 k 2.2 k

− +
V1
+ −
!DC = 200 V2
R2 RE
10 k 1.0 k

34. Assume the emitter becomes shorted to ground in Figure 5–43 by a solder splash or stray wire
clipping. What do the meters read? When you correct the problem, what do the meters read?
35. Determine the most probable failures, if any, in each circuit of Figure 5–44, based on the indi-
cated measurements.

VCC VCC
+12 V +20 V
V V
+ − + −
R1 RC R1 RC
10 k 1.0 k 100 k 10 k
V V
− + − +
mV V
+ − + −
!DC = 180 !DC = 200
R2 RE R2 RE
1.0 k 100 10 k 1.0 k

(a) (b)

VCC VCC
+10 V +9 V
V V
+ − + −
R1 RC R1 RC
12 k 680 8.2 k 1.0 k
V V
− + − +
V V
+ − + −
!DC = 100 !DC = 120
R2 RE R2 RE
27 k 1.5 k 22 k 3.3 k

(c) (d)

! FI G URE 5–44

36. Determine if the DMM readings 2 through 4 in the breadboard circuit of Figure 5–45 are cor-
rect. If they are not, isolate the problem(s). The transistor is a pnp device with a specified dc
beta range of 35 to 100.
 P ROBLEMS ◆ 263

1 2 3 4

V V V V
COM V COM V COM V COM V
V V V V
2 1 DC 3 1 DC 4 1 DC 5 1 DC

EBC

3 5

1
! FI G URE 5– 45

37. Determine each meter reading in Figure 5–45 for each of the following faults:
(a) the 680 Æ resistor open (b) the 5.6 kÆ resistor open
(c) the 10 kÆ resistor open (d) the 1.0 kÆ resistor open
(e) a short from emitter to ground (f) an open base-emitter junction

APPLICATION ACTIVITY PROBLEMS

38. Determine VB, VE, and VC in the temperature-to-voltage conversion circuit in Figure 5–29(a) if
R1 fails open.
39. What faults will cause the transistor in the temperature-to-voltage conversion circuit to go into
cutoff?
40. A thermistor with the characteristic curve shown in Figure 5–46 is used in the circuit of Figure
5–29(a). Calculate the output voltage for temperatures of 45°C, 48°C, and 53°C. Assume a stiff
voltage divider.
41. Explain how you would identify an open collector-base junction in the transistor in Figure 5–29(a).

FI G URE 5– 46 R (k )

2.6

2.4

2.2

2.0

1.8

1.6

1.4

T (°C)
45 46 47 48 49 50 51 52 53 54 55