EXPERIMENT NUMBER 1

4 BIT BINARY ADDERS AND SUBTRACTORS

Name: Jasper B. Dela cruz Date: March 3, 2022
Time: TH/6:00PM-7:00PM Room:
Section: PCEIT-29-601E Instructor: Engr. Ronald Licsi

I. OBJECTIVES:
1. To investigate the logical properties of a 4 bits-adder and subtractor.
2. To identify the Most Significant Bit (MSB) and the Least Significant Bit (LSB).
3. To construct 4 bits-adder and subtractor.
II. EQUIPMENT AND PARTS REQUIRED:
1 – 74LS83 – 4 bits binary adder
5 – LED’s
1 – 74LS86 IC (Exclusive OR)
Connecting wires
Breadboard

III. PROCEDURES:
FOR 4 bits Binary Adder

Addition is one of the basic Arithmetic Operations that performs calculations by adding
numbers. It is composed of an Augend and an Addend and the result is so called a sum;
Addition also has a carry in and a carry out result. First, identify the MSB and the LSB before
doing such operation.

1. Connect a 4 bits binary-adder circuit shown in Figure 1-1, construct a truth table for this
circuit by applying inputs A1, A2, A3, A4 as Augend and B1, B2, B3, B4 as Addend and
record the resulting sum and carry outputs result.

2. Follow Addition of Binary Rules below to complete the tables below:

1
0 0 1 1
+ 0 + 1 + 0 + 1
0 1 0 10

MICROPROCESSOR LABORATORY MANUAL 1

 3. Using the materials mentioned above, construct the circuit given the Figure below
and use extra paper for computation.

4. Do the following simulation; set Mode to 0 to perform Addition Operation

4.1) A1=0, A2=1, A3=0, A4=1 and B1=0, B2=1, B3=0, B4=1, M = 0;

SUM = S1=0, S2=0, S3=1, S4=0, CARRY OUT = 1

4.2) A1=1, A2=1, A3=1, A4=1 and B1=1, B2=1, B3=1, B4=1, M = 0;
SUM = S1=0, S2=1, S3=1, S4=1, CARRY OUT = 1

4.3) A1=1, A2=1, A3=0, A4=1 and B1=0, B2=1, B3=1, B4=1, M = 0;
SUM = S1=1, S2=0, S3=0, S4=1, CARRY OUT = 1

4.4) A1=0, A2=1, A3=1, A4=1 and B1=0, B2=1, B3=1, B4=1, M = 0;
SUM = S1=0, S2=0, S3=1, S4=1, CARRY OUT = 1

4.5) A1=1, A2=1, A3=1, A4=1 and B1=0, B2=0, B3=0, B4=0, M = 0;
SUM = S1=1, S2=1, S3=1, S4=1, CARRY OUT = 0

MICROPROCESSOR LABORATORY MANUAL 2

Table 1-1 Truth Table

A1 A2 A3 A4 B1 B2 B3 B4 SUM CARRY
0 0 0 0 0 0 0 0 S1=0, S2=0, S3=0, S4=0 0
0 0 0 1 0 0 0 1 S1=0, S2=0, S3=0, S4=0 1
0 0 1 0 1 1 1 1 S1=1, S2=1, S3=0, S4=0 1
0 0 1 1 0 0 1 1 S1=0, S2=0, S3=0, S4=1 1
0 1 0 0 0 1 0 0 S1=0, S2=0, S3=1, S4=0 0
0 1 0 1 0 1 0 1 S1=0, S2=0, S3=1, S4=0 1
0 1 1 0 0 1 1 0 S1=0, S2=0, S3=1, S4=1 0
0 1 1 1 0 1 1 1 S1=0, S2=0, S3=1, S4=1 1
1 0 0 0 1 0 0 0 S1=0, S2=1, S3=0, S4=0 0
1 1 1 1 1 0 0 1 S1=0, S2=0, S3=0, S4=1 1
1 0 1 0 1 0 1 0 S1=0, S2=1, S3=0, S4=1 0
1 0 1 1 1 0 1 1 S1=0, S2=1, S3=0, S4=1 1
1 1 0 0 1 1 0 0 S1=0, S2=1, S3=1, S4=0 0
1 1 0 1 1 1 0 1 S1=0, S2=1, S3=1, S4=0 1
1 1 1 0 1 1 1 0 S1=0, S2=1, S3=1, S4=1 0
1 1 1 1 0 0 0 0 S1=1, S2=1, S3=1, S4=1 0

Table 1-2 Truth Table

A1 A2 A3 A4 B1 B2 B3 B4 SUM CARRY
1 0 0 0 1 1 1 1 S1=0, S2=0, S3=0, S4=0 1
1 0 0 1 0 0 0 1 S1=1, S2=0, S3=0, S4=0 1
1 0 1 0 0 0 1 1 S1=1, S2=0, S3=0, S4=0 1
1 0 1 1 0 0 1 1 S1=1, S2=0, S3=0, S4=1 1
1 1 0 0 0 1 0 1 S1=1, S2=0, S3=1, S4=1 0
1 1 0 1 0 1 0 1 S1=1, S2=0, S3=1, S4=0 1
1 1 1 0 0 1 1 1 S1=1, S2=0, S3=1, S4=0 1
1 1 1 1 0 1 1 1 S1=1, S2=0, S3=1, S4=1 1
1 0 0 0 1 0 0 1 S1=0, S2=1, S3=0, S4=1 0
1 0 0 1 1 0 0 1 S1=0, S2=1, S3=0, S4=0 1
1 0 1 0 1 0 1 1 S1=0, S2=1, S3=0, S4=0 1
1 0 1 1 1 0 1 1 S1=0, S2=1, S3=0, S4=1 1
1 1 0 0 1 1 0 1 S1=0, S2=1, S3=1, S4=1 0
1 1 0 1 1 1 0 1 S1=0, S2=1, S3=1, S4=0 1
1 1 1 0 1 1 1 1 S1=0, S2=1, S3=1, S4=0 1
1 1 1 1 1 1 1 1 S1=0, S2=1, S3=1, S4=1 1

MICROPROCESSOR LABORATORY MANUAL 3

MICROPROCESSOR LABORATORY MANUAL 4
FOR 4 bits Binary Subtractor

Subtraction is one of the basic Arithmetic Operations that performs calculations by means
of complementing numbers. It is composed of a Subtrahend and a Minuend and the result is
so called a Difference.

5. Connect a 4 bits binary-subtractor circuit shown in Figure 1-2, construct a truth table for
this circuit by applying inputs A1, A2, A3, A4 as Subtrahend and B1, B2, B3, B4 as
Minuend and record the resulting Difference and barrow outputs result. Identify the
MSB and LSB before doing such operation.

6. Follow Subtraction of Binary Rules below to complete the tables below:

0 1 0 1 1
- 0 - 1 - 0 - 1
0 1 1 0

7. Using the materials mentioned above, construct the circuit given the Figure below
and use extra paper for computation.

8. Do the following simulation; Mode to 1 to perform Subtraction Operation

8.1) A1=0, A2=1, A3=0, A4=1 and B1=0, B2=1, B3=0, B4=1, M = 1;

DIF = D1=0, D2=0, D3=0, D4=0, B = 1

8.2) A1=1, A2=1, A3=1, A4=1 and B1=1, B2=1, B3=1, B4=1, M = 1;
DIF = D1=0, D2=0, D3=0, D4=0, B = 1

8.3) A1=1, A2=1, A3=0, A4=1 and B1=0, B2=1, B3=1, B4=1, M = 1;
DIF = D1=1, D2=0, D3=0, D4=1, B = 0

8.4) A1=0, A2=1, A3=1, A4=1 and B1=0, B2=1, B3=1, B4=1, M = 1;
DIF = D1=0, D2=0, D3=0, D4=0, B = 1

8.5) A1=1, A2=1, A3=1, A4=1 and B1=0, B2=0, B3=0, B4=0, M = 1;
DIF = D1=1, D2=1, D3=1, D4=1, B = 1

MICROPROCESSOR LABORATORY MANUAL 5

Table 1-3 Truth Table

A1 A2 A3 A4 B1 B2 B3 B4 DIF BORROW
0 0 0 0 0 0 0 0 D1=0, D2=0, D3=0, D4=0 1
0 0 0 1 0 0 0 1 D1=0, D2=0, D3=0, D4=0 1
0 0 1 0 0 0 1 0 D1=0, D2=0, D3=0, D4=0 1
0 0 1 1 0 0 1 1 D1=0, D2=0, D3=0, D4=0 1
0 1 0 0 0 1 0 0 D1=0, D2=0, D3=0, D4=0 1
0 1 0 1 0 1 0 1 D1=0, D2=0, D3=0, D4=0 1
0 1 1 0 0 1 1 0 D1=0, D2=0, D3=0, D4=0 1
0 1 1 1 0 1 1 1 D1=0, D2=0, D3=0, D4=0 1
1 0 0 0 1 0 0 0 D1=0, D2=0, D3=0, D4=0 1
1 0 0 1 1 0 0 1 D1=0, D2=0, D3=0, D4=0 1
1 0 1 0 1 0 1 0 D1=0, D2=0, D3=0, D4=0 1
1 0 1 1 1 0 1 1 D1=0, D2=0, D3=0, D4=0 1
1 1 0 0 1 1 0 0 D1=0, D2=0, D3=0, D4=0 1
1 1 0 1 1 1 0 1 D1=0, D2=0, D3=0, D4=0 1
1 1 1 0 1 1 1 0 D1=0, D2=0, D3=0, D4=0 1
1 1 1 1 1 1 1 1 D1=0, D2=0, D3=0, D4=0 1

Table 1-4 Truth Table

A1 A2 A3 A4 B1 B2 B3 B4 DIF BORROW
1 0 0 0 0 0 0 1 D1=1, D2=0, D3=0, D4=1 0
1 0 0 1 0 0 0 1 D1=1, D2=0, D3=0, D4=0 1
1 0 1 0 0 0 1 1 D1=1, D2=0, D3=0, D4=1 0
1 0 1 1 0 0 1 1 D1=1, D2=0, D3=0, D4=0 1
1 1 0 0 0 1 0 1 D1=1, D2=0, D3=0, D4=1 0
1 1 0 1 0 1 0 1 D1=1, D2=0, D3=0, D4=0 1
1 1 1 0 0 1 1 1 D1=1, D2=0, D3=0, D4=1 0
1 1 1 1 0 1 1 1 D1=1, D2=0, D3=0, D4=0 1
1 0 0 0 1 0 0 1 D1=0, D2=0, D3=0, D4=1 0
1 0 0 1 1 0 0 1 D1=0, D2=0, D3=0, D4=0 1
1 0 1 0 1 0 1 1 D1=0, D2=0, D3=0, D4=1 0
1 0 1 1 1 0 1 1 D1=0, D2=0, D3=0, D4=0 1
1 1 0 0 1 1 0 1 D1=0, D2=0, D3=0, D4=1 0
1 1 0 1 1 1 0 1 D1=0, D2=0, D3=0, D4=0 1
1 1 1 0 1 1 1 1 D1=0, D2=0, D3=0, D4=1 0
1 1 1 1 1 1 1 1 D1=0, D2=0, D3=0, D4=0 1

6
MICROPROCESSOR LABORATORY MANUAL
 I. DIAGRAM

Figure 1-1 The Mode is set to 0 therefore the operation is addition.

MICROPROCESSOR LABORATORY MANUAL 7

 Figure 1-2 The Mode is set to 1 therefore the operation is subtraction.

MICROPROCESSOR LABORATORY MANUAL 8

 SELF EVALUATION

1. What is the difference between cascading a 4 full-adder circuit and

using a 74LS83 IC?

The 74LS83 is a high speed 4-bit fuller Adder IC with carry out

feature. The IC has four independent stages of full adder circuits in a single
package. It is commonly used in applications where arithmetic operations are
involved.  

2. Design a 4-bits binary adder with a Seven Segment Display output.

MICROPROCESSOR LABORATORY MANUAL 9

 3. Design a 4-bits binary subtractor with a Seven Segment Display output.

4. What is a ripple carry?

The situation where a logic circuit uses multiple full adders to add n-bit
numbers, with each full adder taking the output of the previous one as an
input.

MICROPROCESSOR LABORATORY MANUAL 10

V. OBSERVATION

In this experiment on how full-adders are applied from calculation to real circuit, we
use simulation software called multisim to avoid spending a lot of money to perform
this experiment because the components are expensive. In digital electronics, a half
adder can be used to add two-bit binary values. If the input sequence is three bits
long, a full adder can be used to finish the addition process. However, if the number
of bits in the input sequence is greater, the procedure can be completed using a half
adder.

VI. CONCLUSION

In this experiment, I learn how full-adders work as well as how to build and run one
from an optimized IC that adds and subtracts three bits at a time. Using another IC
created to transfer BCD to the seven-segment display, which displays the exact
amount of the bit computed from two inputs by addition or subtraction, I learnt how to
apply a seven-segment display to the whole adder subtractor output bits in one of my
self-evaluations.

MICROPROCESSOR LABORATORY MANUAL 11