Microprocessor and Interfacing (ELE-301)

LABORATORY MANUAL
ELE-301 MICROPROCESSOR AND INTERFACING

STUDENT NAME

STUDENT ID

BATCH

LAB INSTRUCTOR:
Engr. Muhammad Aamir

Department of Biomedical Engineering-SHU

Microprocessor and Interfacing (ELE-301)

Lab Rubrics
Assessment Criteria for Lab
Outcomes Assessment:

Lab Rubrics (Hardware based)

Attributes Exceeds Expectation Meets Expectation Does not meet Marks

(3) (2) expectation (1)
1. Coding The program was The program was The program was
(Cognitive C4) exceptionally well readable only by not able to be
(CLO 4) organized and very easy someone with complied and was
to follow. experience in coding. difficult to
The code fulfilled all the The program fulfilled understand.
specification of the the specification of
problem. the problem.
The program compiles The program
with out error. compiled with minor
Program does not error such as missing
contain unnecessary syntax.
repetition Program does
contain unnecessary
repetition
2. Analysis using Accurately calculate the Calculate the output Did not perform a
Computer output by applying or required mathematical
simulation theoretical knowledge parameter but with calculation or
(Cognitive C4) gained through lecture some minor computer
(CLO 4) and demonstration. mistakes. simulation.
Used Proteus to Used proteus to
validate it with validate it with the
theoretical values. theoretical values.
Correlates the Correlate the
experimental results experimental result
with both methods and with theoretical
comments on any error values but did
or differences between comment on any
them difference or error
3. Interfacing/ Able to select the Required minor Unable to select the
implementation correct tools and guidance in selecting appropriate tools or
in hardware equipment, check the the right tools/types equipment to
(Psychomotor- calibration of the of equipment, conduct the
P3) equipment and connect calibration of the experiment and
(CLO 5) the different equipment, or wiring required guidance
components of the different components throughout the
trainer module without of the trainer experiment.
any guidance to module.
perform the experiment
4. Lab Report/ Student submitted a Student submitted a Student submitted a
Presentation genuinely original genuinely original genuinely original
(Affective- A3) manual without any manual, however, did manual but did not
(CLO-6) grammatical error or not addressed all the adequately address
formatting error and questions sufficiently. the questions.

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Microprocessor and Interfacing (ELE-301)

lastly it is not Have minor Have many

plagiarized. grammatical errors or grammatical and
formatting errors. formatting errors.
Able to explain Entire Lastly, it is not lastly, it is not
program design plagiarized. plagiarized
correctly as it is
Materials are highly Able to explain some Unable to explain
organized with required part of the program the program design
information design. Material are not
Demonstrate Materials are organized properly
cooperation through all partially organized and missing
the group. with required information
information Zero cooperation
Demonstrate between the group
cooperation after member
intervention
CLO4/PLO5 CLO4/PLO5 Total Marks
A + B+C
Marks Obtained = _____ out of 6 A) Marks Obtained = ______ x 0.5 /6=
CLO5/PLO3 CLO5/PLO3

Marks Obtained = _____ out of 3 B) Marks Obtained = ______ x 0.25 /3=

CLO6/PLO10 CLO6/PLO10

Marks Obtained = _____ out of 3 B) Marks Obtained = ______ x 0.25 /3=

*Plagiarized manual will mark ZERO.

Lab Instructor Signature: ___________________

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Microprocessor and Interfacing (ELE-301)

5 LAB EXPERIMENT

OBJECT:
Programming external interrupt of ATMEGA 32 using Microchip studio.

SOFTWARE & HARDWARE

1. AVR Studio 7
2. Microcontroller Trainer

THEORY
Interrupt driven programming routines provide a great ease to procesor as it has to run a
program wihtout overburdening itself and also greatly reduces the power consumption of the
processor.
Interrupt driven routine is basically contrary to the polling based programming routine in
which processor has to continuously wait for some condition or event but on the other hand in
interrput driven routine, processor doesn’t kepp itself busy in waiting for an event occurrence
bit it keeps its self in executing other routines and when an event occurs it stacks its current
statues and jump to routine which has to be exected when an interrupt is detected and after
the completion of that routine it pops its previous status and keep on exeuting normal routine
cycles.
Interrupt Service Routine (ISR)
An interrupt service routine (ISR) is a subroutine that the microcontroller executes when an
interrupt is invoked. It is at time referred to as an interrupt handler. When the interrput is
invoked, program goes to the memory location of the associated interrupt vector. Following
are the interrupt vector in ATMEGA 32. The lower the address of the ISR location, the higher
its priority.

Interrupt Address (hex)

Reset 0000

External Interrupt Request 0 0002

External Interrupt Request 1 0004

Pin Change Interrupt Request 0 0006

Pin Change Interrupt Request 1 0008

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Microprocessor and Interfacing (ELE-301)

Pin Change Interrupt Request 2 000A

Watchdog Time-out Interrupt 000C

Timer/Counter2 Compare Match A 000E

Timer/Counter2 Compare Match B 0010

Timer/Counter2 Overflow 0012

Timer/Counter1 Capture Event 0014

Timer/Counter1 Compare Match A 0016

Timer/Counter1 Compare Match B 0018

Timer/Counter1 Overflow 001A

Timer/Counter0 Compare Match 001C

Timer/Counter0 Overflow 0020

SPI Serial Transfer Complete 0022

USART Rx Complete 0024

USART Data Register Empty 0026

USART Tx Complete 0028

ADC Conversion Complete 002A

EEPROM ready 002C

Analog Comparator 002E

Execution of Interrupt
1. Finishes executing the current instruction
2. Saves the address of the next instruction in the stack memory
3. Jumps to interrupt vector table
4. Load memory address of the associated ISR into the program counter
5. Clear global interrupt enable flag in SREG (I=0)
6. Runs the ISR subrountine until its end
7. Sets global interrupt enable flag in SREG (I =1)
8. Loads the memory address to return to from the stack into the program counter
9. Executes the next instruction as normal or wait for next interrupts

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Microprocessor and Interfacing (ELE-301)

LAB EXCERISE A
In this lab exercise, we will used Timer interrupt to create a square wave on pin PORT B.5, while at the same time
transfer data from PORTA to PORT C.

1. Connect Port A to J1
2. Connect PORT C to J9
3. Connect PORTB to J10

CIRCUIT
1

RN2 RN1 R1
10k 10k 10k
8
7
6
5
4
3
2

8
7
6
5
4
3
2

U1 U2
9 22 7 13
RESET PC0/SCL A QA
23 1 12
PC1/SDA B QB
13 24 2 11
XTAL1 PC2/TCK C QC
12 25 6 10
XTAL2 PC3/TMS D QD
26 4 9
PC4/TDO BI/RBO QE
40 27 5 15
PA0/ADC0 PC5/TDI RBI QF
39 28 3 14
PA1/ADC1 PC6/TOSC1 LT QG
38 29
PA2/ADC2 PC7/TOSC2
37 74247
PA3/ADC3
36 14
PA4/ADC4 PD0/RXD
35 15
PA5/ADC5 PD1/TXD
34 16
PA6/ADC6 PD2/INT0
D1 33
PA7/ADC7 PD3/INT1
17
LED-BLUE 18 U3
PD4/OC1B
1 19 7 13
PB0/T0/XCK PD5/OC1A A QA
2 20 1 12
PB1/T1 PD6/ICP1 B QB
10

3 21 2 11
9
8
7
6
5
4
3
2
1

PB2/AIN0/INT2 PD7/OC2 C QC
4 6 10
PB3/AIN1/OC0 D QD
DSW1 5 4 9
ON

PB4/SS BI/RBO QE
DIPSW_10 6 5 15
PB5/MOSI RBI QF
7 32 3 14
OFF

PB6/MISO AREF LT QG
8 30
PB7/SCK AVCC
74247
11
12
13
14
15
16
17
18
19
20

ATMEGA32

CODE
#define F_CPU 4000000UL
#include <avr/io.h>
#include "avr/interrupt.h" //Interrupt coded ko

int main(void)
{
DDRB |= 0x20;

TCNT0 = -32;
TCCR0 = 0x01;

TIMSK = (1<<TOIE0); //Sirf Timer k flags ki information hoti ha

//Timer Interrupt Mask register
sei(); // status enable interrupt

DDRA = 0x00;
DDRC = 0xFF;
while (1)
{
PORTC=PINA;
}
}

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Microprocessor and Interfacing (ELE-301)

ISR(TIMER0_OVF_vect) // interrupt service routine

{
TCNT0 = -32;
PORTB ^= 0x20;
}
//(255+1-TCNT) i.e. two’s complement
//- e ka 2 complemnetr store hoga
//Pre S
LAB EXCERISE B
In this lab exercise, we will used external interrupt to increment counter and display on 7 Segment display. While
at same time it will increment PORT Bevery one second.

1. Connect J34 to INT 0 by using the banana connector.

2. Connect PORT C to J9
3. Connect PORTB to J7

CIRCUIT
B C D E F G H J K

13
12

10

15
14

13
12

10

15
14
11

11
9

9
U2 U3

QF

QF
QC
QD

QC
QD
QA
QB

QE

QA
QB

QE
QG

QG
74247 74247

BI/RBO

BI/RBO
RBI

RBI
LT

LT
C
D

C
D
A
B

A
B
U1
7
1
2
6
4
5
3

7
1
2
6
4
5
3
9 22
RESET PC0/SCL
13
12

10

15
14

13
12

10

15
14
11

11

23
9

PC1/SDA
13 24
XTAL1 PC2/TCK
U4 U5 12 25
QF

QF
QC
QD

QC
QD
QA
QB

QE

QA
QB

QE
QG

QG

XTAL2 PC3/TMS
74247 74247 26
PC4/TDO
40 27
PA0/ADC0 PC5/TDI
39 28
PA1/ADC1 PC6/TOSC1
38 29
PA2/ADC2 PC7/TOSC2
BI/RBO

BI/RBO

37
PA3/ADC3
RBI

RBI

36 14
LT

LT

PA4/ADC4 PD0/RXD
C
D

C
D
A
B

A
B

35 15
34
PA5/ADC5 PD1/TXD
16
R1
PA6/ADC6 PD2/INT0
7
1
2
6
4
5
3

7
1
2
6
4
5
3

33 17 10k
PA7/ADC7 PD3/INT1
18
PD4/OC1B
1 19
PB0/T0/XCK PD5/OC1A
2 20
PB1/T1 PD6/ICP1
3 21
PB2/AIN0/INT2 PD7/OC2
4
PB3/AIN1/OC0
5
PB4/SS
6
PB5/MOSI
7 32
PB6/MISO AREF
8 30
PB7/SCK AVCC
ATMEGA32

CODE
#define F_CPU 4000000UL
#include <avr/io.h>
#include "avr/interrupt.h"

volatile unsigned int TIM1=0;

volatile unsigned char CNT_1;
volatile unsigned char CNT_2;

int main(void)
{
PORTD = 1<<2;

TCNT0 = -4;
TCCR0 = 0x05;
TIMSK = (1<<TOIE0);
GICR = (1<<INT0);

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Microprocessor and Interfacing (ELE-301)

sei();

DDRB = 0xFF;
DDRC = 0xFF;
while (1)
{
PORTB=CNT_1;
PORTC=CNT_2;
}
}

ISR (INT0_vect)
{
CNT_2++;
}
ISR(TIMER0_OVF_vect)
{
TIM1++;

if (TIM1 == 1000)
{
CNT_1++;
TIM1=0;
}
TCNT0=-4;
}

LAB TASK
1. Explain the working of Lab Exercise B code/program.
In this code, we use the volatile keyword to ensure that certain variables are not optimized by the
compiler and can change at any time during execution. The value of TCNT0 is set for 4 cycles and
TCCR0 is set for normal mode, and 1024 pre-scaler (0x05). The TIMSK (Timer Interrupt Mask)
register contains timer interrupt control bits that detect the overflow and tell the main function about it
when TOIE0 (Timer Overflow Interrupt Enable) becomes high. The GICR (General Interrupt Control
Register) enables the external interruption (INT0) when it will become 1. Sei (Status Enable Interrupt)
it’s a pre-defined function used to enable interrupts. The first ISR is triggered by an external interrupt
(INT0) and increments the value of CNT_2 by 1 whenever someone presses the button. The second
ISR is triggered by a timer overflow and increments the value of TIM1 by 1 every second. If TIM1
reaches a value of 1000, the second ISR resets itself and increments the value of CNT_1 by 1.
2. Write a program to get data from port B and send it to port C continuously while an interrupt
will do the following: One of the timers will toggle pin PD6 every 100 microseconds. In place of
port B, port C, and PD5 pin you can use ports of your own choice. Implement in Proteus

#define F_CPU 4000000UL

#include <avr/io.h>
#include "avr/interrupt.h" //Interrupt coded ko
int main(void)
{
DDRD |= 0x40;

TCNT0 = -50;
TCCR0 = 0x02;

TIMSK = (1<<TOIE0); //Timer Interrupt Mask register Enable the

Timer/Counter 0 overflow interrupt
sei(); // status enable interrupt

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Microprocessor and Interfacing (ELE-301)

DDRA = 0x00;
DDRC = 0xFF;
while (1)
{
PORTC=PINA;
}
}

ISR(TIMER0_OVF_vect) // interrupt service routine

{
TCNT0 = -50;
PORTD ^= 0x40;
}
DIAGRAM:

Calculation and Explanation:

Time delay formula:

T(delay)=N*(OCR0)/Clock frequency of CPU
Time 100usec/2=50usec
N=1
Clk freq. =1MHz
So, 50u=1(x)/1M
OCR0=x=50 50-1=49 =0x31
In the main function, set Port B for input and Port C for output. In the while loop, continuously transfer the data
of Port B into Port C. Set PD5 (Port D pin 5) for toggling to trigger the interruption. Calculate the desired delay
and set OCR0's value. We will use Timer0 in CTC mode with no Pre-scaler, so we need to set TCCR0 accordingly
using the datasheet. Enable Timer0 to compare interrupt (OCIE0) by setting it high in TIMSK (Timer Interrupt
Mask Register). Enable the defined interrupt by setting bit 'I' through the sei() (Status Enable Interrupt) function.
Define ISR (Interrupt Service Routine) outside the main function. In the ISR, toggle PD5 (Port D pin 5) to perform
the desired interruption
3. Can PORTD.2 can be used for other functions, when it is as an external interrupt?
No, we cannot use Port D.2 for any other function when an external interrupt occurs on a particular pin
of an AVR microcontroller, the 'I' bit in the status register is automatically cleared by the AVR
hardware to prevent any other interrupts from occurring while the current interrupt is being serviced.
This is known as "interrupt masking," and it ensures that the microcontroller can focus on servicing the
current interrupt without being interrupted by another.

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Microprocessor and Interfacing (ELE-301)

4. Calculate the time delay generated by the code in Lab Exercise A?

we have:
TCNT0=-32; (32 cycles)
TCCR0=0x01;( normal mode and no pre-scaler i.e. N=1)
Clock frequency= 4MHz
We have the formula to calculate the time delay of Normal mode:
T = N* (Max +1 – TCNT) / clock frequency of CPU
T= 1* (255+1-32)/ 4M
T=56usec → Time delay generated by the code

DISCUSSION AND CONCLUSION:

An interrupt is a signal that interrupts the normal flow of a program and temporarily stops its execution to
perform a specific task. Interrupts can come from both hardware and software sources.
Hardware Interrupts:
Software Interrupts
Spurious Interrupts:
When an interrupt occurs, the microcontroller or processor temporarily halts the current program execution and
transfers control to an Interrupt Service Routine (ISR) or Interrupt Handler, which is a small piece of code that
handles the specific task associated with the interrupt. Once the ISR completes its task, the microcontroller or
processor returns to the interrupted program and resumes its execution.

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